Removed IO OUT pins

verilog/rtl/user_proj_example.v

diff --git a/verilog/rtl/user_proj_example.v b/verilog/rtl/user_proj_example.v
index 53455b4..fd5322a 100644
--- a/verilog/rtl/user_proj_example.v
+++ b/verilog/rtl/user_proj_example.v
@@ -68,7 +68,7 @@
 
     // IOs
     input  [`MPRJ_IO_PADS-1:0] io_in,
-    output [`MPRJ_IO_PADS-1:0] io_out,
+    //output [`MPRJ_IO_PADS-1:0] io_out,
     output [`MPRJ_IO_PADS-1:0] io_oeb,
 
     // IRQ
@@ -76,7 +76,7 @@
 );
 
     wire [`MPRJ_IO_PADS-1:0] io_in;
-    wire [`MPRJ_IO_PADS-1:0] io_out;
+    //wire [`MPRJ_IO_PADS-1:0] io_out;
     wire [`MPRJ_IO_PADS-1:0] io_oeb;
 
     wire mclk ;