blob: bc686f1197e2fb02ef219daaf9a4972403b40fd9 [file] [log] [blame]
* SPICE3 file created from user_analog_project_wrapper.ext - technology: sky130A
.subckt user_analog_project_wrapper gpio_analog[0] gpio_analog[10] gpio_analog[11]
+ gpio_analog[12] gpio_analog[13] gpio_analog[14] gpio_analog[15] gpio_analog[16]
+ gpio_analog[17] gpio_analog[1] gpio_analog[2] gpio_analog[3] gpio_analog[4] gpio_analog[5]
+ gpio_analog[6] gpio_analog[7] gpio_analog[8] gpio_analog[9] gpio_noesd[0] gpio_noesd[10]
+ gpio_noesd[11] gpio_noesd[12] gpio_noesd[13] gpio_noesd[14] gpio_noesd[15] gpio_noesd[16]
+ gpio_noesd[17] gpio_noesd[1] gpio_noesd[2] gpio_noesd[3] gpio_noesd[4] gpio_noesd[5]
+ gpio_noesd[6] gpio_noesd[7] gpio_noesd[8] gpio_noesd[9] io_analog[0] io_analog[10]
+ io_analog[1] io_analog[2] io_analog[3] io_analog[4] io_analog[5] io_analog[6] io_analog[7]
+ io_analog[8] io_analog[9] io_clamp_high[0] io_clamp_high[1] io_clamp_high[2] io_clamp_low[0]
+ io_clamp_low[1] io_clamp_low[2] io_in[0] io_in[10] io_in[11] io_in[12] io_in[13]
+ io_in[14] io_in[15] io_in[16] io_in[17] io_in[18] io_in[19] io_in[1] io_in[20] io_in[21]
+ io_in[22] io_in[23] io_in[24] io_in[25] io_in[26] io_in[2] io_in[3] io_in[4] io_in[5]
+ io_in[6] io_in[7] io_in[8] io_in[9] io_in_3v3[0] io_in_3v3[10] io_in_3v3[11] io_in_3v3[12]
+ io_in_3v3[13] io_in_3v3[14] io_in_3v3[15] io_in_3v3[16] io_in_3v3[17] io_in_3v3[18]
+ io_in_3v3[19] io_in_3v3[1] io_in_3v3[20] io_in_3v3[21] io_in_3v3[22] io_in_3v3[23]
+ io_in_3v3[24] io_in_3v3[25] io_in_3v3[26] io_in_3v3[2] io_in_3v3[3] io_in_3v3[4]
+ io_in_3v3[5] io_in_3v3[6] io_in_3v3[7] io_in_3v3[8] io_in_3v3[9] io_oeb[0] io_oeb[10]
+ io_oeb[11] io_oeb[12] io_oeb[13] io_oeb[14] io_oeb[15] io_oeb[16] io_oeb[17] io_oeb[18]
+ io_oeb[19] io_oeb[1] io_oeb[20] io_oeb[21] io_oeb[22] io_oeb[23] io_oeb[24] io_oeb[25]
+ io_oeb[26] io_oeb[2] io_oeb[3] io_oeb[4] io_oeb[5] io_oeb[6] io_oeb[7] io_oeb[8]
+ io_oeb[9] io_out[0] io_out[10] io_out[11] io_out[12] io_out[13] io_out[14] io_out[15]
+ io_out[16] io_out[17] io_out[18] io_out[19] io_out[1] io_out[20] io_out[21] io_out[22]
+ io_out[23] io_out[24] io_out[25] io_out[26] io_out[2] io_out[3] io_out[4] io_out[5]
+ io_out[6] io_out[7] io_out[8] io_out[9] la_data_in[0] la_data_in[100] la_data_in[101]
+ la_data_in[102] la_data_in[103] la_data_in[104] la_data_in[105] la_data_in[106]
+ la_data_in[107] la_data_in[108] la_data_in[109] la_data_in[10] la_data_in[110] la_data_in[111]
+ la_data_in[112] la_data_in[113] la_data_in[114] la_data_in[115] la_data_in[116]
+ la_data_in[117] la_data_in[118] la_data_in[119] la_data_in[11] la_data_in[120] la_data_in[121]
+ la_data_in[122] la_data_in[123] la_data_in[124] la_data_in[125] la_data_in[126]
+ la_data_in[127] la_data_in[12] la_data_in[13] la_data_in[14] la_data_in[15] la_data_in[16]
+ la_data_in[17] la_data_in[18] la_data_in[19] la_data_in[1] la_data_in[20] la_data_in[21]
+ la_data_in[22] la_data_in[23] la_data_in[24] la_data_in[25] la_data_in[26] la_data_in[27]
+ la_data_in[28] la_data_in[29] la_data_in[2] la_data_in[30] la_data_in[31] la_data_in[32]
+ la_data_in[33] la_data_in[34] la_data_in[35] la_data_in[36] la_data_in[37] la_data_in[38]
+ la_data_in[39] la_data_in[3] la_data_in[40] la_data_in[41] la_data_in[42] la_data_in[43]
+ la_data_in[44] la_data_in[45] la_data_in[46] la_data_in[47] la_data_in[48] la_data_in[49]
+ la_data_in[4] la_data_in[50] la_data_in[51] la_data_in[52] la_data_in[53] la_data_in[54]
+ la_data_in[55] la_data_in[56] la_data_in[57] la_data_in[58] la_data_in[59] la_data_in[5]
+ la_data_in[60] la_data_in[61] la_data_in[62] la_data_in[63] la_data_in[64] la_data_in[65]
+ la_data_in[66] la_data_in[67] la_data_in[68] la_data_in[69] la_data_in[6] la_data_in[70]
+ la_data_in[71] la_data_in[72] la_data_in[73] la_data_in[74] la_data_in[75] la_data_in[76]
+ la_data_in[77] la_data_in[78] la_data_in[79] la_data_in[7] la_data_in[80] la_data_in[81]
+ la_data_in[82] la_data_in[83] la_data_in[84] la_data_in[85] la_data_in[86] la_data_in[87]
+ la_data_in[88] la_data_in[89] la_data_in[8] la_data_in[90] la_data_in[91] la_data_in[92]
+ la_data_in[93] la_data_in[94] la_data_in[95] la_data_in[96] la_data_in[97] la_data_in[98]
+ la_data_in[99] la_data_in[9] la_data_out[0] la_data_out[100] la_data_out[101] la_data_out[102]
+ la_data_out[103] la_data_out[104] la_data_out[105] la_data_out[106] la_data_out[107]
+ la_data_out[108] la_data_out[109] la_data_out[10] la_data_out[110] la_data_out[111]
+ la_data_out[112] la_data_out[113] la_data_out[114] la_data_out[115] la_data_out[116]
+ la_data_out[117] la_data_out[118] la_data_out[119] la_data_out[11] la_data_out[120]
+ la_data_out[121] la_data_out[122] la_data_out[123] la_data_out[124] la_data_out[125]
+ la_data_out[126] la_data_out[127] la_data_out[12] la_data_out[13] la_data_out[14]
+ la_data_out[15] la_data_out[16] la_data_out[17] la_data_out[18] la_data_out[19]
+ la_data_out[1] la_data_out[20] la_data_out[21] la_data_out[22] la_data_out[23] la_data_out[24]
+ la_data_out[25] la_data_out[26] la_data_out[27] la_data_out[28] la_data_out[29]
+ la_data_out[2] la_data_out[30] la_data_out[31] la_data_out[32] la_data_out[33] la_data_out[34]
+ la_data_out[35] la_data_out[36] la_data_out[37] la_data_out[38] la_data_out[39]
+ la_data_out[3] la_data_out[40] la_data_out[41] la_data_out[42] la_data_out[43] la_data_out[44]
+ la_data_out[45] la_data_out[46] la_data_out[47] la_data_out[48] la_data_out[49]
+ la_data_out[4] la_data_out[50] la_data_out[51] la_data_out[52] la_data_out[53] la_data_out[54]
+ la_data_out[55] la_data_out[56] la_data_out[57] la_data_out[58] la_data_out[59]
+ la_data_out[5] la_data_out[60] la_data_out[61] la_data_out[62] la_data_out[63] la_data_out[64]
+ la_data_out[65] la_data_out[66] la_data_out[67] la_data_out[68] la_data_out[69]
+ la_data_out[6] la_data_out[70] la_data_out[71] la_data_out[72] la_data_out[73] la_data_out[74]
+ la_data_out[75] la_data_out[76] la_data_out[77] la_data_out[78] la_data_out[79]
+ la_data_out[7] la_data_out[80] la_data_out[81] la_data_out[82] la_data_out[83] la_data_out[84]
+ la_data_out[85] la_data_out[86] la_data_out[87] la_data_out[88] la_data_out[89]
+ la_data_out[8] la_data_out[90] la_data_out[91] la_data_out[92] la_data_out[93] la_data_out[94]
+ la_data_out[95] la_data_out[96] la_data_out[97] la_data_out[98] la_data_out[99]
+ la_data_out[9] la_oenb[0] la_oenb[100] la_oenb[101] la_oenb[102] la_oenb[103] la_oenb[104]
+ la_oenb[105] la_oenb[106] la_oenb[107] la_oenb[108] la_oenb[109] la_oenb[10] la_oenb[110]
+ la_oenb[111] la_oenb[112] la_oenb[113] la_oenb[114] la_oenb[115] la_oenb[116] la_oenb[117]
+ la_oenb[118] la_oenb[119] la_oenb[11] la_oenb[120] la_oenb[121] la_oenb[122] la_oenb[123]
+ la_oenb[124] la_oenb[125] la_oenb[126] la_oenb[127] la_oenb[12] la_oenb[13] la_oenb[14]
+ la_oenb[15] la_oenb[16] la_oenb[17] la_oenb[18] la_oenb[19] la_oenb[1] la_oenb[20]
+ la_oenb[21] la_oenb[22] la_oenb[23] la_oenb[24] la_oenb[25] la_oenb[26] la_oenb[27]
+ la_oenb[28] la_oenb[29] la_oenb[2] la_oenb[30] la_oenb[31] la_oenb[32] la_oenb[33]
+ la_oenb[34] la_oenb[35] la_oenb[36] la_oenb[37] la_oenb[38] la_oenb[39] la_oenb[3]
+ la_oenb[40] la_oenb[41] la_oenb[42] la_oenb[43] la_oenb[44] la_oenb[45] la_oenb[46]
+ la_oenb[47] la_oenb[48] la_oenb[49] la_oenb[4] la_oenb[50] la_oenb[51] la_oenb[52]
+ la_oenb[53] la_oenb[54] la_oenb[55] la_oenb[56] la_oenb[57] la_oenb[58] la_oenb[59]
+ la_oenb[5] la_oenb[60] la_oenb[61] la_oenb[62] la_oenb[63] la_oenb[64] la_oenb[65]
+ la_oenb[66] la_oenb[67] la_oenb[68] la_oenb[69] la_oenb[6] la_oenb[70] la_oenb[71]
+ la_oenb[72] la_oenb[73] la_oenb[74] la_oenb[75] la_oenb[76] la_oenb[77] la_oenb[78]
+ la_oenb[79] la_oenb[7] la_oenb[80] la_oenb[81] la_oenb[82] la_oenb[83] la_oenb[84]
+ la_oenb[85] la_oenb[86] la_oenb[87] la_oenb[88] la_oenb[89] la_oenb[8] la_oenb[90]
+ la_oenb[91] la_oenb[92] la_oenb[93] la_oenb[94] la_oenb[95] la_oenb[96] la_oenb[97]
+ la_oenb[98] la_oenb[99] la_oenb[9] user_clock2 user_irq[0] user_irq[1] user_irq[2]
+ vccd1 vccd2 vdda1 vdda2 vssa1 vssa2 vssd1 vssd2 wb_clk_i wb_rst_i wbs_ack_o wbs_adr_i[0]
+ wbs_adr_i[10] wbs_adr_i[11] wbs_adr_i[12] wbs_adr_i[13] wbs_adr_i[14] wbs_adr_i[15]
+ wbs_adr_i[16] wbs_adr_i[17] wbs_adr_i[18] wbs_adr_i[19] wbs_adr_i[1] wbs_adr_i[20]
+ wbs_adr_i[21] wbs_adr_i[22] wbs_adr_i[23] wbs_adr_i[24] wbs_adr_i[25] wbs_adr_i[26]
+ wbs_adr_i[27] wbs_adr_i[28] wbs_adr_i[29] wbs_adr_i[2] wbs_adr_i[30] wbs_adr_i[31]
+ wbs_adr_i[3] wbs_adr_i[4] wbs_adr_i[5] wbs_adr_i[6] wbs_adr_i[7] wbs_adr_i[8] wbs_adr_i[9]
+ wbs_cyc_i wbs_dat_i[0] wbs_dat_i[10] wbs_dat_i[11] wbs_dat_i[12] wbs_dat_i[13] wbs_dat_i[14]
+ wbs_dat_i[15] wbs_dat_i[16] wbs_dat_i[17] wbs_dat_i[18] wbs_dat_i[19] wbs_dat_i[1]
+ wbs_dat_i[20] wbs_dat_i[21] wbs_dat_i[22] wbs_dat_i[23] wbs_dat_i[24] wbs_dat_i[25]
+ wbs_dat_i[26] wbs_dat_i[27] wbs_dat_i[28] wbs_dat_i[29] wbs_dat_i[2] wbs_dat_i[30]
+ wbs_dat_i[31] wbs_dat_i[3] wbs_dat_i[4] wbs_dat_i[5] wbs_dat_i[6] wbs_dat_i[7] wbs_dat_i[8]
+ wbs_dat_i[9] wbs_dat_o[0] wbs_dat_o[10] wbs_dat_o[11] wbs_dat_o[12] wbs_dat_o[13]
+ wbs_dat_o[14] wbs_dat_o[15] wbs_dat_o[16] wbs_dat_o[17] wbs_dat_o[18] wbs_dat_o[19]
+ wbs_dat_o[1] wbs_dat_o[20] wbs_dat_o[21] wbs_dat_o[22] wbs_dat_o[23] wbs_dat_o[24]
+ wbs_dat_o[25] wbs_dat_o[26] wbs_dat_o[27] wbs_dat_o[28] wbs_dat_o[29] wbs_dat_o[2]
+ wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6]
+ wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3]
+ wbs_stb_i wbs_we_i
C0 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF
C1 divider_2/and_0/OUT divider_2/clk 0.04fF
C2 divbuf_2/IN divbuf_2/OUT5 0.00fF
C3 divbuf_7/OUT ro_complete_0/cbank_2/switch_4/vin 0.13fF
C4 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF
C5 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Z1 0.06fF
C6 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z3 0.05fF
C7 divbuf_3/OUT3 divbuf_3/OUT4 5.16fF
C8 ro_complete_1/a0 ro_complete_1/cbank_1/v 0.05fF
C9 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.13fF
C10 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/and_0/OUT 0.14fF
C11 divbuf_14/OUT divbuf_14/OUT5 43.38fF
C12 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/nand_1/z1 0.01fF
C13 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF
C14 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF
C15 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
C16 divider_1/tspc_0/Z2 divider_1/tspc_0/Z3 0.16fF
C17 divider_1/tspc_0/a_630_n680# divider_1/tspc_1/Q 0.01fF
C18 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z4 0.36fF
C19 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/Out 0.05fF
C20 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/Out 0.21fF
C21 divider_2/prescaler_0/Out divider_2/tspc_2/Z2 0.11fF
C22 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/nand_1/z1 0.22fF
C23 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/tspc_0/D 0.04fF
C24 divbuf_21/a_492_n240# divbuf_21/OUT 0.00fF
C25 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
C26 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/clk 0.45fF
C27 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_1/switch_1/vin 0.09fF
C28 divider_2/nor_0/B divider_2/tspc_1/Z1 0.03fF
C29 divbuf_5/OUT ro_complete_0/cbank_2/switch_3/vin 0.09fF
C30 divbuf_24/OUT2 divbuf_24/OUT 0.06fF
C31 divbuf_24/OUT3 divbuf_24/OUT5 0.01fF
C32 divider_2/nor_0/A divider_2/and_0/A 0.01fF
C33 divbuf_1/OUT divbuf_1/OUT4 1.11fF
C34 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_4/vin 0.20fF
C35 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z4 0.36fF
C36 divbuf_4/OUT2 divbuf_4/OUT3 1.37fF
C37 ro_complete_1/cbank_2/switch_0/vin ro_complete_1/cbank_2/v 1.45fF
C38 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.11fF
C39 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/clk 0.12fF
C40 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF
C41 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
C42 divider_1/tspc_1/Q divider_1/tspc_1/a_630_n680# 0.04fF
C43 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z3 0.16fF
C44 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/nor_1/B 0.03fF
C45 divider_1/nor_0/A divider_1/tspc_2/Z2 0.23fF
C46 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Out1 0.05fF
C47 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/pd_0/tspc_r_1/Z3 0.09fF
C48 divbuf_23/a_492_n240# divbuf_23/OUT5 0.01fF
C49 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.20fF
C50 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z2 0.19fF
C51 divbuf_19/OUT divbuf_19/a_492_n240# 0.00fF
C52 divider_2/prescaler_0/m1_2700_2190# divider_2/nor_0/A 0.01fF
C53 divider_2/tspc_1/Z2 divider_2/tspc_1/Z3 0.16fF
C54 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/D 0.15fF
C55 divider_2/mc2 divider_2/and_0/B 0.20fF
C56 ro_complete_1/a2 ro_complete_1/cbank_1/switch_3/vin 0.09fF
C57 divbuf_0/OUT2 divbuf_0/a_492_n240# 0.42fF
C58 divbuf_15/OUT5 divbuf_15/OUT2 0.02fF
C59 divbuf_15/OUT4 divbuf_15/OUT3 5.16fF
C60 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divbuf_0/IN 0.04fF
C61 pll_full_0/pd_0/DIV pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF
C62 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
C63 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF
C64 divider_0/mc2 divider_0/and_0/B 0.20fF
C65 divbuf_5/OUT2 divbuf_5/OUT3 1.37fF
C66 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/clk 0.45fF
C67 io_clamp_high[0] io_analog[4] 0.53fF
C68 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/IN 0.00fF
C69 divider_1/tspc_2/Q divider_1/tspc_1/Z4 0.15fF
C70 divider_1/tspc_0/Z4 divider_1/nor_1/B 0.22fF
C71 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z2 1.07fF
C72 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z4 0.12fF
C73 divbuf_10/OUT2 divbuf_10/OUT3 1.37fF
C74 pd_0/tspc_r_1/Z1 pd_0/tspc_r_1/Z2 0.71fF
C75 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z4 0.20fF
C76 pd_0/REF pd_0/tspc_r_1/z5 0.04fF
C77 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF
C78 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF
C79 divider_1/and_0/out1 divider_1/and_0/Z1 0.36fF
C80 divbuf_9/OUT3 divbuf_9/OUT 0.26fF
C81 divbuf_9/OUT4 divbuf_9/OUT5 20.26fF
C82 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/v 0.08fF
C83 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.09fF
C84 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/z5 0.04fF
C85 divider_2/nor_0/B divider_2/and_0/B 0.31fF
C86 divbuf_5/OUT ro_complete_0/cbank_2/v 0.05fF
C87 divider_0/nor_1/Z1 divider_0/nor_0/B 0.18fF
C88 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF
C89 ro_complete_1/a3 ro_complete_1/cbank_1/v 0.05fF
C90 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.65fF
C91 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF
C92 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z3 0.16fF
C93 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/tspc_2/Z4 0.21fF
C94 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/D 0.11fF
C95 divider_1/tspc_2/Q divider_1/tspc_2/Z3 0.05fF
C96 divider_1/prescaler_0/tspc_1/Z2 divider_1/clk 0.11fF
C97 divbuf_20/OUT5 divbuf_20/OUT 43.38fF
C98 cp_0/a_1710_n2840# cp_0/upbar 0.29fF
C99 pd_1/R pd_1/REF 0.61fF
C100 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF
C101 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/clk 0.12fF
C102 divider_2/tspc_0/Z2 divider_2/tspc_1/Q 0.14fF
C103 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z3 0.06fF
C104 divbuf_8/a_492_n240# divbuf_8/OUT 0.00fF
C105 divbuf_7/OUT divbuf_7/a_492_n240# 0.00fF
C106 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF
C107 pll_full_1/divbuf_1/OUT2 pll_full_1/divbuf_1/OUT5 0.02fF
C108 pll_full_1/divbuf_0/OUT4 pll_full_1/divbuf_0/OUT5 20.26fF
C109 pll_full_1/divbuf_0/a_492_n240# pll_full_1/divbuf_0/IN 0.13fF
C110 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
C111 divider_2/nor_0/A divider_2/tspc_2/Z1 0.03fF
C112 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z3 0.05fF
C113 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_4/vin 0.20fF
C114 divider_0/tspc_1/Q divider_0/tspc_0/Z3 0.45fF
C115 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z4 0.12fF
C116 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z4 0.28fF
C117 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_2/a_630_n680# 0.01fF
C118 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.00fF
C119 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF
C120 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF
C121 divider_0/and_0/OUT divider_0/and_0/B 0.01fF
C122 pll_full_1/divider_0/and_0/B pll_full_1/divider_0/and_0/Z1 0.07fF
C123 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z2 0.36fF
C124 divider_1/tspc_0/Z2 divider_1/tspc_0/Z4 0.36fF
C125 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z3 0.11fF
C126 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/a_630_n680# 0.19fF
C127 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z1 0.09fF
C128 pd_0/DIV pd_0/tspc_r_0/Z2 0.19fF
C129 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divbuf_0/IN 0.04fF
C130 divbuf_7/a_492_n240# divbuf_7/IN 0.13fF
C131 cp_0/upbar cp_0/down 0.02fF
C132 pd_1/tspc_r_1/Qbar1 pd_1/tspc_r_1/z5 0.20fF
C133 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/clk 0.45fF
C134 divbuf_5/OUT ro_complete_0/cbank_1/switch_2/vin 0.14fF
C135 divider_2/tspc_1/Z1 divider_2/tspc_1/Z3 0.06fF
C136 divbuf_12/OUT4 divbuf_12/OUT 1.11fF
C137 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/nor_0/B 0.20fF
C138 divider_2/and_0/A divider_2/and_0/B 0.18fF
C139 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/a1 0.14fF
C140 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/a3 0.09fF
C141 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Q 0.91fF
C142 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
C143 ro_complete_1/cbank_2/switch_5/vin ro_complete_1/cbank_2/v 1.30fF
C144 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 pll_full_1/divider_0/clk 0.12fF
C145 pll_full_1/pd_0/REF pll_full_1/pd_0/R 0.61fF
C146 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF
C147 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF
C148 io_clamp_low[2] io_clamp_high[2] 0.53fF
C149 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/R 0.33fF
C150 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF
C151 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF
C152 pd_0/R pd_0/tspc_r_1/Qbar 0.03fF
C153 divbuf_11/OUT2 divbuf_11/OUT3 1.37fF
C154 pd_1/and_pd_0/Out1 pd_1/and_pd_0/Z1 0.18fF
C155 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF
C156 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z4 0.21fF
C157 divider_2/prescaler_0/tspc_2/D divider_2/prescaler_0/nand_0/z1 0.24fF
C158 divbuf_2/OUT divbuf_2/OUT2 0.06fF
C159 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z3 0.65fF
C160 divbuf_3/IN divbuf_3/a_492_n240# 0.13fF
C161 divbuf_1/a_492_n240# divbuf_1/IN 0.13fF
C162 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/v 1.30fF
C163 pll_full_1/pd_0/tspc_r_0/Z1 pll_full_1/pd_0/tspc_r_0/Z3 0.09fF
C164 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT4 5.16fF
C165 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
C166 divbuf_6/a_492_n240# divbuf_6/OUT2 0.42fF
C167 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/clk 0.60fF
C168 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/R 0.02fF
C169 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/IN 0.13fF
C170 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
C171 divbuf_20/a_492_n240# divbuf_20/OUT2 0.42fF
C172 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF
C173 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF
C174 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
C175 divider_1/tspc_1/Z3 divider_1/tspc_1/Z4 0.65fF
C176 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Q 0.04fF
C177 divider_1/prescaler_0/Out divider_1/clk 0.51fF
C178 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Out1 0.05fF
C179 divider_2/tspc_2/Q divider_2/tspc_1/Z4 0.15fF
C180 divbuf_22/OUT5 divbuf_22/OUT 43.38fF
C181 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/z5 0.04fF
C182 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF
C183 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/z5 0.20fF
C184 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/Qbar 0.21fF
C185 divider_2/and_0/OUT divider_2/and_0/out1 0.31fF
C186 divider_2/prescaler_0/tspc_2/D divider_2/clk 0.26fF
C187 divbuf_13/a_492_n240# divbuf_13/OUT 0.00fF
C188 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/nor_0/B 0.06fF
C189 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/ro_complete_0/cbank_2/v 0.04fF
C190 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF
C191 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF
C192 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_2/D 0.16fF
C193 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.03fF
C194 divbuf_3/OUT4 divbuf_3/OUT5 20.26fF
C195 divbuf_14/a_492_n240# divbuf_14/OUT5 0.01fF
C196 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_1/z1 0.21fF
C197 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/nor_0/B 0.20fF
C198 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z3 0.05fF
C199 divbuf_21/IN divbuf_21/OUT5 0.00fF
C200 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/clk 0.12fF
C201 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/nand_1/z1 0.01fF
C202 divider_1/prescaler_0/tspc_2/Z2 divider_1/clk 0.11fF
C203 cp_0/a_1710_n2840# cp_0/out 0.61fF
C204 pd_1/DOWN pd_1/and_pd_0/Out1 0.12fF
C205 pd_1/REF pd_1/tspc_r_1/Qbar1 0.12fF
C206 divider_2/tspc_2/Q divider_2/tspc_2/Z3 0.05fF
C207 divider_2/nor_0/B divider_2/tspc_1/Q 0.51fF
C208 divbuf_12/a_492_n240# divbuf_12/IN 0.13fF
C209 divbuf_5/OUT ro_complete_0/cbank_0/switch_2/vin 0.14fF
C210 ro_complete_0/cbank_0/switch_1/vin divbuf_4/OUT 0.09fF
C211 ro_complete_0/cbank_0/switch_0/vin divbuf_2/OUT 0.09fF
C212 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF
C213 divbuf_24/OUT4 divbuf_24/OUT 1.11fF
C214 divbuf_5/OUT divbuf_5/a_492_n240# 0.00fF
C215 divbuf_3/OUT divbuf_3/OUT3 0.26fF
C216 divbuf_1/OUT2 divbuf_1/OUT3 1.37fF
C217 divider_0/tspc_1/Q divider_0/tspc_0/Z4 0.15fF
C218 divbuf_4/OUT2 divbuf_4/OUT5 0.02fF
C219 divbuf_4/OUT3 divbuf_4/OUT4 5.16fF
C220 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF
C221 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/tspc_r_1/Z1 0.71fF
C222 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Z3 0.11fF
C223 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z4 0.36fF
C224 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/clk 0.60fF
C225 divider_1/tspc_2/Z1 divider_1/tspc_2/Z3 0.06fF
C226 divider_2/tspc_1/Z2 divider_2/tspc_1/Z4 0.36fF
C227 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/D 0.05fF
C228 divbuf_23/OUT2 divbuf_23/OUT3 1.37fF
C229 divbuf_15/OUT divbuf_15/OUT3 0.26fF
C230 filter_0/v divbuf_25/OUT2 0.06fF
C231 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF
C232 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF
C233 divbuf_5/OUT2 divbuf_5/OUT5 0.02fF
C234 divbuf_5/OUT3 divbuf_5/OUT4 5.16fF
C235 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/divider_0/clk 0.12fF
C236 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF
C237 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF
C238 divbuf_10/OUT2 divbuf_10/OUT5 0.02fF
C239 divbuf_10/OUT3 divbuf_10/OUT4 5.16fF
C240 pd_0/R pd_0/and_pd_0/Z1 0.02fF
C241 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/z5 0.20fF
C242 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
C243 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF
C244 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF
C245 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF
C246 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z3 0.16fF
C247 divbuf_22/a_492_n240# divbuf_22/OUT2 0.42fF
C248 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a4 0.12fF
C249 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_1/Z4 0.02fF
C250 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Q 0.04fF
C251 divider_2/tspc_1/Z4 divider_2/nor_0/A 0.02fF
C252 divbuf_9/OUT5 divbuf_9/OUT 43.38fF
C253 divbuf_2/OUT divbuf_2/a_492_n240# 0.00fF
C254 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/z5 0.03fF
C255 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/Out 0.21fF
C256 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF
C257 ro_complete_1/a4 ro_complete_1/cbank_2/v 0.05fF
C258 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_0/vin 0.19fF
C259 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z4 0.36fF
C260 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT2 0.06fF
C261 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT3 0.01fF
C262 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
C263 divider_1/nor_1/Z1 divider_1/nor_0/B 0.18fF
C264 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/z5 0.04fF
C265 pd_1/R pd_1/tspc_r_1/Qbar1 0.30fF
C266 pd_1/tspc_r_0/Z3 pd_1/tspc_r_0/Qbar1 0.38fF
C267 pd_0/and_pd_0/Out1 pd_0/and_pd_0/Z1 0.18fF
C268 divbuf_8/IN divbuf_8/OUT5 0.00fF
C269 pll_full_1/divbuf_1/OUT3 pll_full_1/divbuf_1/OUT 0.26fF
C270 pll_full_1/divbuf_1/OUT4 pll_full_1/divbuf_1/OUT5 20.26fF
C271 divider_2/mc2 divider_2/and_0/OUT 0.05fF
C272 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z4 0.00fF
C273 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/D 0.03fF
C274 divider_2/tspc_2/Z1 divider_2/tspc_2/Z2 1.07fF
C275 divider_2/nor_0/A divider_2/tspc_2/Z3 0.38fF
C276 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z4 0.12fF
C277 divbuf_24/a_492_n240# divbuf_24/IN 0.13fF
C278 divbuf_7/OUT ro_complete_0/cbank_2/switch_5/vin 0.09fF
C279 pll_full_1/ro_complete_0/cbank_2/switch_0/vin pll_full_1/ro_complete_0/cbank_2/v 1.45fF
C280 pll_full_1/pd_0/REF pll_full_1/divbuf_1/a_492_n240# 0.13fF
C281 divider_0/mc2 divider_0/and_0/OUT 0.05fF
C282 divider_0/tspc_0/Z1 divider_0/nor_1/B 0.03fF
C283 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/nor_0/A 0.15fF
C284 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.65fF
C285 pll_full_1/ro_complete_0/cbank_2/v pll_full_1/divider_0/clk 1.36fF
C286 pll_full_1/cp_0/upbar pll_full_1/cp_0/down 0.02fF
C287 divider_1/tspc_1/Q divider_1/tspc_0/Z3 0.45fF
C288 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z4 0.12fF
C289 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z4 0.28fF
C290 pd_0/DIV pd_0/R 0.51fF
C291 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/clk 0.12fF
C292 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/Z2 1.07fF
C293 divider_1/and_0/OUT divider_1/and_0/B 0.01fF
C294 divbuf_4/OUT divbuf_2/OUT 1.95fF
C295 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.14fF
C296 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
C297 divider_2/tspc_1/Q divider_2/tspc_1/Z3 0.05fF
C298 divider_2/tspc_1/Z1 divider_2/tspc_1/Z4 0.00fF
C299 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z3 0.06fF
C300 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF
C301 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/a1 0.14fF
C302 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_1/Q 0.01fF
C303 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.05fF
C304 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/a_492_n240# 0.00fF
C305 divbuf_15/OUT divbuf_15/a_492_n240# 0.00fF
C306 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF
C307 divbuf_5/a_492_n240# divbuf_5/IN 0.13fF
C308 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/DOWN 0.03fF
C309 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z1 0.08fF
C310 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Q 0.91fF
C311 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/a_630_n680# 0.19fF
C312 pd_1/DIV pd_1/tspc_r_0/Qbar1 0.12fF
C313 pd_0/REF pd_0/tspc_r_1/Qbar1 0.12fF
C314 divbuf_11/OUT2 divbuf_11/OUT5 0.02fF
C315 divbuf_11/OUT3 divbuf_11/OUT4 5.16fF
C316 filter_0/a_4216_n2998# filter_0/v 0.36fF
C317 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF
C318 divbuf_19/OUT2 divbuf_19/OUT3 1.37fF
C319 divbuf_9/a_492_n240# divbuf_9/OUT2 0.42fF
C320 pll_full_1/divbuf_0/OUT5 pll_full_1/divbuf_0/OUT2 0.02fF
C321 divbuf_18/OUT4 divbuf_18/OUT 1.11fF
C322 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/Q 0.04fF
C323 divider_2/prescaler_0/tspc_1/Z3 divider_2/clk 0.45fF
C324 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF
C325 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF
C326 divbuf_6/OUT divbuf_6/OUT2 0.06fF
C327 ro_complete_1/a5 ro_complete_1/cbank_2/switch_0/vin 0.09fF
C328 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divbuf_0/IN 0.05fF
C329 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.33fF
C330 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/and_0/A 0.80fF
C331 pll_full_1/ro_complete_0/cbank_1/switch_2/vin pll_full_1/divider_0/clk 1.46fF
C332 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT5 0.01fF
C333 divbuf_14/IN divbuf_14/OUT5 0.00fF
C334 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/Z1 0.04fF
C335 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/clk 0.05fF
C336 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.45fF
C337 pd_1/DOWN pd_1/tspc_r_0/Z3 0.03fF
C338 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/Z3 0.38fF
C339 pll_full_1/pd_0/DIV pll_full_1/pd_0/R 0.51fF
C340 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/nor_0/A 0.15fF
C341 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF
C342 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/divider_0/clk 1.36fF
C343 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a3 0.13fF
C344 divbuf_13/IN divbuf_13/OUT5 0.00fF
C345 divbuf_2/OUT3 divbuf_2/OUT5 0.01fF
C346 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF
C347 divider_0/prescaler_0/Out divider_0/prescaler_0/m1_2700_2190# 0.11fF
C348 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/nand_0/z1 0.07fF
C349 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.05fF
C350 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF
C351 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
C352 divider_1/mc2 divider_1/nor_1/B 0.15fF
C353 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF
C354 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_1/Q 0.01fF
C355 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF
C356 divider_1/prescaler_0/tspc_0/D divider_1/prescaler_0/nand_1/z1 0.21fF
C357 divbuf_21/OUT2 divbuf_21/OUT 0.06fF
C358 divbuf_21/OUT3 divbuf_21/OUT5 0.01fF
C359 pd_1/tspc_r_1/Z3 pd_1/UP 0.03fF
C360 divider_2/prescaler_0/m1_2700_2190# divider_2/and_0/OUT 0.14fF
C361 pll_full_1/ro_complete_0/cbank_2/switch_5/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
C362 divbuf_3/OUT divbuf_3/OUT5 43.38fF
C363 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF
C364 divider_0/nor_0/B divider_0/nor_1/B 0.47fF
C365 divider_0/tspc_0/Z3 divider_0/tspc_0/Z4 0.65fF
C366 divbuf_4/OUT4 divbuf_4/OUT5 20.26fF
C367 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.05fF
C368 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/clk 0.01fF
C369 divbuf_14/OUT5 divbuf_14/OUT4 20.26fF
C370 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF
C371 divider_1/tspc_1/Q divider_1/tspc_0/Z4 0.15fF
C372 pd_0/DOWN pd_0/UP 0.46fF
C373 pd_0/tspc_r_0/Z4 pd_0/tspc_r_0/z5 0.04fF
C374 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/DOWN 0.03fF
C375 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divbuf_0/IN 0.05fF
C376 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF
C377 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/A 0.80fF
C378 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/divider_0/clk 1.46fF
C379 divbuf_19/IN divbuf_19/a_492_n240# 0.13fF
C380 divider_1/tspc_2/Z1 divider_1/tspc_2/Z4 0.00fF
C381 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF
C382 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/clk 0.05fF
C383 divbuf_23/OUT2 divbuf_23/OUT5 0.02fF
C384 divbuf_23/OUT3 divbuf_23/OUT4 5.16fF
C385 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_0/vin 0.19fF
C386 divider_2/prescaler_0/tspc_2/Z4 divider_2/prescaler_0/tspc_2/D 0.11fF
C387 pll_full_1/pd_0/UP pll_full_1/pd_0/tspc_r_1/Qbar 0.21fF
C388 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/a0 0.13fF
C389 divbuf_14/OUT2 divbuf_14/OUT5 0.02fF
C390 divider_0/nor_0/B divider_0/tspc_2/a_630_n680# 0.01fF
C391 divbuf_5/OUT4 divbuf_5/OUT5 20.26fF
C392 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/tspc_r_1/Z3 0.25fF
C393 divider_1/nor_0/Z1 divider_1/nor_0/B 0.06fF
C394 divbuf_10/OUT3 divbuf_10/OUT 0.26fF
C395 divbuf_10/OUT4 divbuf_10/OUT5 20.26fF
C396 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z4 0.36fF
C397 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z3 0.09fF
C398 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/DIV 0.19fF
C399 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF
C400 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF
C401 divbuf_10/a_492_n240# divbuf_10/OUT5 0.01fF
C402 divbuf_1/OUT5 divbuf_1/OUT 43.38fF
C403 divbuf_1/OUT2 divbuf_1/a_492_n240# 0.42fF
C404 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF
C405 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF
C406 divider_2/prescaler_0/tspc_2/Z3 divider_2/clk 0.45fF
C407 divider_0/tspc_0/Z2 divider_0/nor_0/B 0.20fF
C408 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.04fF
C409 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF
C410 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z4 0.14fF
C411 ro_complete_1/a1 ro_complete_1/cbank_1/v 0.05fF
C412 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT4 1.11fF
C413 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
C414 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/Out 0.21fF
C415 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z2 0.01fF
C416 divider_2/nor_1/Z1 divider_2/nor_1/B 0.06fF
C417 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF
C418 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/clk 0.01fF
C419 divbuf_18/OUT3 divbuf_18/OUT4 5.16fF
C420 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Z4 0.65fF
C421 divbuf_8/OUT2 divbuf_8/OUT 0.06fF
C422 divbuf_8/OUT3 divbuf_8/OUT5 0.01fF
C423 divbuf_7/OUT divbuf_7/OUT2 0.06fF
C424 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF
C425 divbuf_7/OUT ro_complete_0/cbank_2/v 0.05fF
C426 divider_2/tspc_2/Z2 divider_2/tspc_2/Z3 0.16fF
C427 divider_2/nor_0/A divider_2/tspc_2/Z4 0.21fF
C428 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF
C429 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_2/Z2 0.11fF
C430 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/clk 0.01fF
C431 divider_1/tspc_0/Z1 divider_1/nor_1/B 0.03fF
C432 pd_1/DIV pd_1/tspc_r_0/Z1 0.17fF
C433 pd_0/tspc_r_0/Qbar1 pd_0/R 0.01fF
C434 pd_0/DIV pd_0/tspc_r_0/Z4 0.02fF
C435 pd_0/DOWN pd_0/tspc_r_0/Qbar 0.21fF
C436 divbuf_7/a_492_n240# divbuf_7/OUT5 0.01fF
C437 ro_complete_0/cbank_1/switch_3/vin divbuf_6/OUT 0.14fF
C438 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z4 0.00fF
C439 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Q 0.21fF
C440 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/switch_5/vin 0.20fF
C441 ro_complete_1/a4 ro_complete_1/cbank_2/switch_1/vin 0.09fF
C442 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/v 1.30fF
C443 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z3 0.06fF
C444 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 1.07fF
C445 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.12fF
C446 divbuf_19/OUT3 divbuf_19/OUT4 5.16fF
C447 divider_2/and_0/B divider_2/and_0/Z1 0.07fF
C448 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.19fF
C449 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/clk 0.01fF
C450 io_clamp_low[2] io_analog[6] 0.53fF
C451 io_clamp_low[1] io_clamp_high[1] 0.53fF
C452 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF
C453 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z3 0.11fF
C454 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/D 0.09fF
C455 pd_0/tspc_r_1/Z3 pd_0/UP 0.03fF
C456 divbuf_11/OUT3 divbuf_11/OUT 0.26fF
C457 divbuf_11/OUT4 divbuf_11/OUT5 20.26fF
C458 divider_2/prescaler_0/tspc_1/Z4 divider_2/clk 0.12fF
C459 filter_0/v divbuf_25/OUT3 0.26fF
C460 divbuf_2/OUT divbuf_2/OUT4 1.11fF
C461 divbuf_4/OUT ro_complete_0/cbank_2/switch_0/vin 0.12fF
C462 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.19fF
C463 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
C464 divbuf_6/OUT divbuf_6/OUT4 1.11fF
C465 divbuf_3/OUT2 divbuf_3/OUT3 1.37fF
C466 ro_complete_1/a3 ro_complete_1/cbank_2/switch_2/vin 0.09fF
C467 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Q 0.22fF
C468 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/nor_1/B 0.35fF
C469 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.08fF
C470 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.05fF
C471 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF
C472 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z1 0.17fF
C473 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/UP 0.11fF
C474 divider_0/tspc_2/Q divider_0/tspc_2/a_630_n680# 0.04fF
C475 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/D 0.03fF
C476 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/nor_0/A 0.35fF
C477 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/divider_0/clk 0.29fF
C478 pll_full_0/divbuf_0/OUT4 pll_full_0/divbuf_0/OUT5 20.26fF
C479 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
C480 divider_1/tspc_0/Z1 divider_1/tspc_0/Z2 1.07fF
C481 pll_full_1/divbuf_1/a_492_n240# pll_full_1/divbuf_1/OUT2 0.42fF
C482 divbuf_20/a_492_n240# divbuf_20/OUT 0.00fF
C483 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_0/Qbar 0.21fF
C484 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z2 0.11fF
C485 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/clk 0.01fF
C486 divbuf_16/OUT2 divbuf_16/OUT 0.06fF
C487 divider_2/prescaler_0/tspc_0/Z2 divider_2/and_0/OUT 0.06fF
C488 divider_2/prescaler_0/tspc_1/Q divider_2/clk 0.60fF
C489 divbuf_13/OUT2 divbuf_13/OUT 0.06fF
C490 divbuf_13/OUT3 divbuf_13/OUT5 0.01fF
C491 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a3 0.13fF
C492 divbuf_3/OUT ro_complete_0/cbank_2/v 0.05fF
C493 divider_0/nor_0/B divider_0/tspc_1/Z1 0.03fF
C494 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/v 1.30fF
C495 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_1/B 0.00fF
C496 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF
C497 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.33fF
C498 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.38fF
C499 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.11fF
C500 divider_0/prescaler_0/tspc_1/Q divider_0/nor_0/A 0.03fF
C501 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/A 0.01fF
C502 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF
C503 divider_1/prescaler_0/Out divider_1/prescaler_0/m1_2700_2190# 0.11fF
C504 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z3 0.06fF
C505 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF
C506 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF
C507 divbuf_21/OUT4 divbuf_21/OUT 1.11fF
C508 pll_full_1/pd_0/DOWN pll_full_1/cp_0/a_1710_0# 0.04fF
C509 pll_full_1/pd_0/DIV pll_full_1/pd_0/tspc_r_0/Z4 0.02fF
C510 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF
C511 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/clk 0.01fF
C512 divider_2/prescaler_0/Out divider_2/clk 0.51fF
C513 cp_0/a_10_n50# cp_0/vbias 0.19fF
C514 pd_1/R pd_1/and_pd_0/Out1 0.33fF
C515 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z1 0.09fF
C516 pd_1/REF pd_1/tspc_r_1/Z2 0.19fF
C517 divbuf_12/a_492_n240# divbuf_12/OUT5 0.01fF
C518 divider_2/nor_1/B divider_2/tspc_0/Z1 0.03fF
C519 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_2/D 0.16fF
C520 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/clk 0.01fF
C521 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/IN 5.26fF
C522 pll_full_1/divbuf_0/OUT5 pll_full_1/divbuf_0/a_492_n240# 0.01fF
C523 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_4/vin 0.20fF
C524 divbuf_4/OUT divbuf_4/OUT3 0.26fF
C525 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/v 1.30fF
C526 divider_0/nor_0/B divider_0/tspc_1/Z2 0.30fF
C527 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/clk 0.01fF
C528 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/and_0/A 0.26fF
C529 divider_1/mc2 divider_1/nor_0/A 0.04fF
C530 divbuf_14/OUT5 divbuf_14/OUT3 0.01fF
C531 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF
C532 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
C533 divider_1/nor_0/B divider_1/nor_1/B 0.47fF
C534 divider_1/tspc_0/Z3 divider_1/tspc_0/Z4 0.65fF
C535 divider_1/nor_0/Z1 divider_1/and_0/A 0.80fF
C536 pd_0/R pd_0/REF 0.61fF
C537 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Q 0.22fF
C538 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF
C539 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF
C540 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF
C541 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/A 0.35fF
C542 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/clk 0.29fF
C543 divbuf_16/OUT divbuf_16/OUT5 43.38fF
C544 divider_1/tspc_2/Z3 divider_1/tspc_2/Z4 0.65fF
C545 divbuf_23/OUT3 divbuf_23/OUT 0.26fF
C546 divbuf_23/OUT4 divbuf_23/OUT5 20.26fF
C547 divbuf_18/OUT5 divbuf_18/OUT4 20.26fF
C548 divbuf_3/OUT ro_complete_0/cbank_1/switch_2/vin 0.09fF
C549 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z3 0.29fF
C550 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_4/vin 0.20fF
C551 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z4 0.00fF
C552 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/divider_0/clk 1.46fF
C553 divbuf_25/OUT4 divbuf_25/OUT5 20.26fF
C554 divider_0/prescaler_0/Out divider_0/tspc_2/Z3 0.45fF
C555 divider_0/nor_0/B divider_0/nor_0/A 1.21fF
C556 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/B 0.29fF
C557 divider_2/tspc_0/Z4 divider_2/nor_1/B 0.22fF
C558 divbuf_16/OUT3 divbuf_16/OUT 0.26fF
C559 divider_1/nor_0/B divider_1/tspc_2/a_630_n680# 0.01fF
C560 divbuf_10/OUT5 divbuf_10/OUT 43.38fF
C561 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.00fF
C562 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF
C563 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF
C564 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF
C565 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF
C566 divbuf_22/a_492_n240# divbuf_22/OUT 0.00fF
C567 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a4 0.09fF
C568 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a5 0.09fF
C569 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF
C570 divider_2/prescaler_0/tspc_2/Z4 divider_2/clk 0.12fF
C571 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF
C572 pll_full_1/divbuf_0/a_492_n240# pll_full_1/divbuf_0/OUT2 0.42fF
C573 divider_0/tspc_0/Z1 divider_0/tspc_1/Q 0.01fF
C574 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF
C575 ro_complete_1/a5 ro_complete_1/cbank_2/v 0.08fF
C576 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z2 1.07fF
C577 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_1/Z3 0.38fF
C578 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/nor_1/B 0.22fF
C579 pll_full_1/pd_0/tspc_r_0/Z1 pll_full_1/pd_0/tspc_r_0/Z2 0.71fF
C580 pll_full_0/divbuf_1/a_492_n240# pll_full_0/divbuf_1/OUT2 0.42fF
C581 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF
C582 divbuf_10/a_492_n240# divbuf_10/IN 0.13fF
C583 divider_1/tspc_0/Z2 divider_1/nor_0/B 0.20fF
C584 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/Out 0.04fF
C585 divbuf_21/a_492_n240# divbuf_21/IN 0.13fF
C586 pd_1/R pd_1/tspc_r_1/Z2 0.21fF
C587 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/clk 0.01fF
C588 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/A 0.26fF
C589 divbuf_8/OUT4 divbuf_8/OUT 1.11fF
C590 divbuf_7/OUT divbuf_7/OUT4 1.11fF
C591 pll_full_1/divbuf_0/OUT4 pll_full_1/divbuf_0/OUT3 5.16fF
C592 divbuf_24/a_492_n240# divbuf_24/OUT5 0.01fF
C593 divider_2/tspc_2/Z2 divider_2/tspc_2/Z4 0.36fF
C594 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/IN 5.26fF
C595 divider_0/tspc_1/Z1 divider_0/tspc_2/Q 0.01fF
C596 divider_0/nor_0/B divider_0/tspc_1/a_630_n680# 0.35fF
C597 divbuf_4/a_492_n240# divbuf_4/OUT2 0.42fF
C598 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/and_0/OUT 0.05fF
C599 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/clk 0.14fF
C600 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF
C601 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/z5 0.11fF
C602 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z4 0.00fF
C603 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/divider_0/clk 1.46fF
C604 divbuf_7/OUT2 divbuf_7/OUT3 1.37fF
C605 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_1/Z3 0.29fF
C606 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.29fF
C607 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.09fF
C608 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
C609 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Z4 0.65fF
C610 ro_complete_0/cbank_0/switch_3/vin divbuf_6/OUT 0.14fF
C611 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF
C612 ro_complete_0/cbank_0/switch_2/vin divbuf_3/OUT 0.09fF
C613 divbuf_15/OUT4 divbuf_15/OUT5 20.26fF
C614 ro_complete_1/a2 ro_complete_1/cbank_2/v 0.05fF
C615 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.16fF
C616 divbuf_25/OUT3 divbuf_25/OUT2 1.37fF
C617 divider_0/nor_0/Z1 divider_0/and_0/B 0.18fF
C618 divider_0/tspc_2/Q divider_0/tspc_1/Z2 0.14fF
C619 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF
C620 divbuf_5/a_492_n240# divbuf_5/OUT5 0.01fF
C621 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/nor_0/A 0.15fF
C622 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.32fF
C623 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/clk 0.01fF
C624 divider_1/mc2 divider_1/and_0/B 0.20fF
C625 divider_0/and_0/out1 divider_0/and_0/B 0.18fF
C626 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z4 0.28fF
C627 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z1 0.09fF
C628 pd_0/REF pd_0/tspc_r_1/Z2 0.19fF
C629 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/R 0.27fF
C630 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF
C631 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z3 0.38fF
C632 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_1/B 0.22fF
C633 divbuf_11/OUT5 divbuf_11/OUT 43.38fF
C634 divbuf_9/a_492_n240# divbuf_9/OUT 0.00fF
C635 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF
C636 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF
C637 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF
C638 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z2 0.25fF
C639 divbuf_3/OUT2 divbuf_3/OUT5 0.02fF
C640 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/a0 0.09fF
C641 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 1.07fF
C642 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.12fF
C643 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/divider_0/clk 1.46fF
C644 pll_full_1/pd_0/UP pll_full_1/pd_0/and_pd_0/Out1 0.33fF
C645 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT2 1.37fF
C646 divbuf_14/OUT divbuf_14/a_492_n240# 0.00fF
C647 divider_0/nor_0/B divider_0/and_0/B 0.31fF
C648 divider_0/tspc_2/Q divider_0/nor_0/A 0.55fF
C649 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF
C650 divbuf_6/IN divbuf_6/OUT5 0.00fF
C651 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z2 0.01fF
C652 divider_2/tspc_0/Z4 divider_2/tspc_0/Z1 0.00fF
C653 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Q 0.91fF
C654 divider_1/tspc_2/Q divider_1/tspc_2/a_630_n680# 0.04fF
C655 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/D 0.03fF
C656 divbuf_20/IN divbuf_20/OUT5 0.00fF
C657 pd_1/R pd_1/tspc_r_0/Z3 0.27fF
C658 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF
C659 divider_2/tspc_0/Z3 divider_2/nor_1/B 0.38fF
C660 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z3 0.33fF
C661 divbuf_8/a_492_n240# divbuf_8/IN 0.13fF
C662 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_1/switch_3/vin 0.09fF
C663 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
C664 divbuf_13/OUT4 divbuf_13/OUT 1.11fF
C665 divbuf_2/IN divbuf_2/a_492_n240# 0.13fF
C666 divbuf_18/OUT divbuf_18/a_492_n240# 0.00fF
C667 divider_2/and_0/OUT divider_2/and_0/Z1 0.04fF
C668 divider_2/prescaler_0/tspc_2/Q divider_2/clk 0.05fF
C669 divider_0/nor_0/B divider_0/tspc_1/Q 0.51fF
C670 pll_full_1/pd_0/UP pll_full_1/pd_0/and_pd_0/Z1 0.06fF
C671 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/Z3 0.45fF
C672 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Z2 0.01fF
C673 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.08fF
C674 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.05fF
C675 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.04fF
C676 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF
C677 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
C678 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z4 0.65fF
C679 divider_0/and_0/OUT divider_0/clk 0.04fF
C680 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_1/z5 0.02fF
C681 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF
C682 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_0/a_630_n680# 0.04fF
C683 divider_1/nor_0/B divider_1/tspc_1/Z1 0.03fF
C684 pd_0/DIV pd_0/tspc_r_0/Z3 0.65fF
C685 divider_1/prescaler_0/tspc_1/Q divider_1/nor_0/A 0.03fF
C686 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_0/A 0.15fF
C687 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF
C688 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/clk 0.01fF
C689 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/nand_0/z1 0.07fF
C690 divbuf_12/OUT2 divbuf_12/OUT3 1.37fF
C691 divbuf_4/OUT divbuf_4/OUT5 43.38fF
C692 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 4.58fF
C693 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF
C694 divider_0/tspc_2/Q divider_0/tspc_1/a_630_n680# 0.01fF
C695 divider_0/nor_0/A divider_0/and_0/A 0.01fF
C696 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/R 0.30fF
C697 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z2 0.25fF
C698 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF
C699 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF
C700 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/divider_0/clk 1.46fF
C701 divider_1/nor_0/B divider_1/tspc_1/Z2 0.30fF
C702 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z2 0.71fF
C703 pd_1/DIV pd_1/R 0.51fF
C704 pd_0/DOWN pd_0/tspc_r_1/Qbar 0.02fF
C705 pd_0/R pd_0/tspc_r_1/Qbar1 0.30fF
C706 divbuf_17/a_492_n240# divbuf_17/OUT5 0.01fF
C707 divbuf_16/OUT divbuf_16/OUT4 1.11fF
C708 divbuf_11/a_492_n240# divbuf_11/OUT2 0.42fF
C709 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF
C710 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Q 0.05fF
C711 divider_2/prescaler_0/m1_2700_2190# divider_2/clk 0.01fF
C712 divbuf_23/OUT5 divbuf_23/OUT 43.38fF
C713 divbuf_3/OUT ro_complete_0/cbank_2/switch_1/vin 0.13fF
C714 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
C715 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.09fF
C716 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z1 0.08fF
C717 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/nor_1/B 0.06fF
C718 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF
C719 divider_0/prescaler_0/m1_2700_2190# divider_0/nor_0/A 0.01fF
C720 divider_0/prescaler_0/Out divider_0/tspc_2/Z4 0.12fF
C721 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF
C722 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.15fF
C723 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF
C724 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z4 0.01fF
C725 pll_full_1/pd_0/DOWN pll_full_1/pd_0/R 0.36fF
C726 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z3 0.45fF
C727 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z2 0.01fF
C728 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF
C729 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF
C730 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF
C731 divbuf_19/OUT2 divbuf_19/OUT5 0.02fF
C732 divider_1/prescaler_0/Out divider_1/tspc_2/Z3 0.45fF
C733 divider_1/nor_0/B divider_1/nor_0/A 1.21fF
C734 divider_2/nor_0/Z1 divider_2/nor_0/B 0.06fF
C735 divbuf_22/IN divbuf_22/OUT5 0.00fF
C736 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/z5 0.11fF
C737 divbuf_13/a_492_n240# divbuf_13/IN 0.13fF
C738 divbuf_4/OUT ro_complete_0/cbank_2/v 0.05fF
C739 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF
C740 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
C741 divider_0/tspc_0/Z1 divider_0/tspc_0/Z3 0.06fF
C742 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF
C743 ro_complete_1/a0 ro_complete_1/cbank_2/switch_4/vin 0.13fF
C744 ro_complete_1/cbank_0/v ro_complete_1/cbank_1/v 1.27fF
C745 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_1/Z4 0.21fF
C746 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/nor_1/B 0.38fF
C747 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Out1 0.33fF
C748 divbuf_25/a_492_n240# divbuf_25/OUT5 0.01fF
C749 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/and_0/B 0.08fF
C750 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/a_492_n240# 0.01fF
C751 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Z4 0.04fF
C752 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Q 0.15fF
C753 divider_1/tspc_0/Z1 divider_1/tspc_1/Q 0.01fF
C754 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z3 0.06fF
C755 cp_0/a_10_n50# cp_0/a_1710_0# 0.04fF
C756 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z3 0.65fF
C757 divbuf_17/a_492_n240# divbuf_17/OUT 0.00fF
C758 divider_2/tspc_2/Q divider_2/tspc_2/a_630_n680# 0.04fF
C759 divider_2/tspc_0/Z3 divider_2/tspc_0/Z1 0.06fF
C760 pll_full_1/divbuf_0/OUT5 pll_full_1/divbuf_0/OUT3 0.01fF
C761 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_4/vin 0.20fF
C762 divbuf_24/OUT2 divbuf_24/OUT3 1.37fF
C763 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF
C764 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z2 1.07fF
C765 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/Out 0.21fF
C766 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF
C767 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.20fF
C768 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.09fF
C769 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/clk 0.11fF
C770 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/a_630_n680# 0.19fF
C771 divbuf_25/IN divbuf_25/OUT5 0.00fF
C772 divider_0/nor_0/A divider_0/tspc_2/Z1 0.03fF
C773 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF
C774 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/R 0.21fF
C775 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF
C776 pd_0/DOWN pd_0/tspc_r_0/z5 0.03fF
C777 pd_0/tspc_r_0/Z2 pd_0/R 0.21fF
C778 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF
C779 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF
C780 divider_1/tspc_1/Z1 divider_1/tspc_2/Q 0.01fF
C781 divider_1/nor_0/B divider_1/tspc_1/a_630_n680# 0.35fF
C782 divbuf_7/OUT2 divbuf_7/OUT5 0.02fF
C783 divbuf_7/OUT3 divbuf_7/OUT4 5.16fF
C784 pll_full_1/divbuf_1/OUT2 pll_full_1/divbuf_1/OUT3 1.37fF
C785 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/OUT4 1.11fF
C786 pd_1/tspc_r_1/Z4 pd_1/tspc_r_1/z5 0.04fF
C787 ro_complete_0/cbank_1/switch_1/vin divbuf_3/OUT 0.14fF
C788 divider_2/mc2 divider_2/and_0/out1 0.06fF
C789 divider_2/nor_0/Z1 divider_2/and_0/A 0.80fF
C790 divbuf_23/a_492_n240# divbuf_23/OUT2 0.42fF
C791 ro_complete_0/cbank_2/switch_3/vin divbuf_6/OUT 0.14fF
C792 divbuf_15/OUT5 divbuf_15/OUT 43.38fF
C793 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/cbank_0/v 1.30fF
C794 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_1/Q 0.01fF
C795 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.36fF
C796 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/Out 0.05fF
C797 pll_full_1/ro_complete_0/a2 pll_full_1/divider_0/clk 0.11fF
C798 divider_0/mc2 divider_0/and_0/out1 0.06fF
C799 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z3 0.05fF
C800 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.22fF
C801 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.04fF
C802 io_clamp_high[1] io_analog[5] 0.53fF
C803 divider_2/tspc_0/Z4 divider_2/tspc_0/Z3 0.65fF
C804 divider_0/and_0/A divider_0/and_0/B 0.18fF
C805 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
C806 pd_0/DOWN pd_0/and_pd_0/Z1 0.07fF
C807 io_clamp_low[0] io_clamp_high[0] 0.53fF
C808 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z4 0.21fF
C809 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/nor_1/B 0.38fF
C810 divider_1/tspc_2/Q divider_1/tspc_1/Z2 0.14fF
C811 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z2 0.01fF
C812 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/B 0.08fF
C813 divider_2/nor_1/Z1 divider_2/and_0/B 0.78fF
C814 divider_1/and_0/out1 divider_1/and_0/B 0.18fF
C815 filter_0/a_4216_n5230# filter_0/v 0.91fF
C816 ro_complete_0/cbank_1/switch_4/vin divbuf_7/OUT 0.13fF
C817 pll_full_0/pd_0/DIV pll_full_0/pd_0/R 0.51fF
C818 divbuf_17/OUT5 divbuf_17/OUT 43.38fF
C819 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_2/Q 0.19fF
C820 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/clk 0.01fF
C821 divider_2/nor_1/B divider_2/and_0/B 0.29fF
C822 divbuf_9/IN divbuf_9/OUT5 0.00fF
C823 divbuf_2/OUT ro_complete_0/cbank_2/switch_0/vin 0.09fF
C824 pll_full_1/divbuf_0/OUT3 pll_full_1/divbuf_0/OUT2 1.37fF
C825 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF
C826 divider_0/mc2 divider_0/nor_0/B 0.06fF
C827 divbuf_1/OUT divbuf_1/OUT3 0.26fF
C828 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_1/a_630_n680# 0.04fF
C829 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.16fF
C830 pll_full_1/ro_complete_0/cbank_1/switch_0/vin pll_full_1/divider_0/clk 1.58fF
C831 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_0/z1 0.24fF
C832 divbuf_6/OUT3 divbuf_6/OUT5 0.01fF
C833 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/tspc_2/Z2 0.23fF
C834 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF
C835 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF
C836 divbuf_20/OUT2 divbuf_20/OUT 0.06fF
C837 divbuf_20/OUT3 divbuf_20/OUT5 0.01fF
C838 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/Z3 0.20fF
C839 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/z5 0.20fF
C840 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z4 0.20fF
C841 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF
C842 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF
C843 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/clk 0.11fF
C844 divider_1/nor_0/B divider_1/and_0/B 0.31fF
C845 divider_1/tspc_2/Q divider_1/nor_0/A 0.55fF
C846 divider_1/and_0/OUT divider_1/prescaler_0/nand_0/z1 0.01fF
C847 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_3/vin 0.09fF
C848 divider_2/tspc_0/Z2 divider_2/nor_0/B 0.20fF
C849 divider_2/tspc_0/a_630_n680# divider_2/nor_1/B 0.35fF
C850 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z4 0.08fF
C851 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z3 0.05fF
C852 divider_2/tspc_2/a_630_n680# divider_2/nor_0/A 0.35fF
C853 divider_2/prescaler_0/tspc_0/D divider_2/clk 0.29fF
C854 divbuf_6/OUT ro_complete_0/cbank_2/v 0.05fF
C855 pll_full_0/pd_0/REF pll_full_0/divbuf_1/a_492_n240# 0.13fF
C856 divider_0/tspc_0/Z1 divider_0/tspc_0/Z4 0.00fF
C857 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z2 0.19fF
C858 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/Z4 0.15fF
C859 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/nor_1/B 0.22fF
C860 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 1.07fF
C861 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.12fF
C862 divbuf_17/IN divbuf_17/a_492_n240# 0.13fF
C863 divider_1/mc2 divider_1/and_0/OUT 0.05fF
C864 divbuf_14/OUT divbuf_14/OUT4 1.11fF
C865 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF
C866 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.26fF
C867 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/Z1 0.36fF
C868 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z1 0.06fF
C869 divider_1/nor_0/B divider_1/tspc_1/Q 0.51fF
C870 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Qbar1 0.38fF
C871 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.01fF
C872 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF
C873 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF
C874 pll_full_0/ro_complete_0/a2 pll_full_0/divider_0/clk 0.11fF
C875 pd_1/REF pd_1/tspc_r_1/Z4 0.02fF
C876 pd_1/UP pd_1/tspc_r_1/Qbar 0.21fF
C877 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF
C878 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF
C879 divider_1/and_0/OUT divider_1/clk 0.04fF
C880 divbuf_12/OUT2 divbuf_12/OUT5 0.02fF
C881 divbuf_12/OUT3 divbuf_12/OUT4 5.16fF
C882 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF
C883 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF
C884 divider_2/prescaler_0/tspc_1/Z2 divider_2/and_0/OUT 0.06fF
C885 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z3 0.33fF
C886 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Q 0.38fF
C887 divider_2/prescaler_0/tspc_0/Z2 divider_2/clk 0.11fF
C888 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT3 0.26fF
C889 divider_2/and_0/out1 divider_2/and_0/A 0.01fF
C890 divbuf_5/OUT divbuf_5/OUT3 0.26fF
C891 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.33fF
C892 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT 43.38fF
C893 divbuf_14/OUT2 divbuf_14/OUT 0.06fF
C894 divider_0/tspc_1/Q divider_0/tspc_1/Z3 0.05fF
C895 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF
C896 divider_0/Out divider_0/nor_1/B 0.22fF
C897 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_2/Z3 0.05fF
C898 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/clk 0.11fF
C899 divbuf_16/a_492_n240# divbuf_16/OUT 0.00fF
C900 divider_2/prescaler_0/Out divider_2/prescaler_0/m1_2700_2190# 0.11fF
C901 divider_1/tspc_1/Z1 divider_1/tspc_1/Z3 0.06fF
C902 divider_1/tspc_2/Q divider_1/tspc_1/a_630_n680# 0.01fF
C903 pd_1/DIV pd_1/tspc_r_0/Z4 0.02fF
C904 pll_full_1/divbuf_1/a_492_n240# pll_full_1/divbuf_1/OUT5 0.01fF
C905 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.04fF
C906 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF
C907 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/divider_0/clk 1.58fF
C908 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z2 0.23fF
C909 divider_1/nor_0/A divider_1/and_0/A 0.01fF
C910 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/a0 0.09fF
C911 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/DOWN 0.11fF
C912 divbuf_19/OUT divbuf_19/OUT3 0.26fF
C913 divbuf_19/OUT5 divbuf_19/OUT4 20.26fF
C914 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/clk 0.01fF
C915 divbuf_1/OUT2 divbuf_1/OUT 0.06fF
C916 divbuf_5/OUT ro_complete_0/cbank_1/v 0.05fF
C917 ro_complete_0/cbank_0/switch_4/vin divbuf_7/OUT 0.13fF
C918 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.11fF
C919 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
C920 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF
C921 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF
C922 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF
C923 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF
C924 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.64fF
C925 divbuf_17/IN divbuf_17/OUT5 0.00fF
C926 divider_1/prescaler_0/m1_2700_2190# divider_1/nor_0/A 0.01fF
C927 divider_1/prescaler_0/Out divider_1/tspc_2/Z4 0.12fF
C928 divider_1/tspc_1/Z2 divider_1/tspc_1/Z3 0.16fF
C929 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/D 0.15fF
C930 pd_0/tspc_r_1/Z4 pd_0/tspc_r_1/z5 0.04fF
C931 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z4 0.15fF
C932 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/nor_1/B 0.22fF
C933 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF
C934 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF
C935 divbuf_22/OUT2 divbuf_22/OUT 0.06fF
C936 divbuf_22/OUT3 divbuf_22/OUT5 0.01fF
C937 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF
C938 divider_2/mc2 divider_2/nor_0/B 0.06fF
C939 divider_2/tspc_2/Q divider_2/tspc_1/Z2 0.14fF
C940 pll_full_0/pd_0/DOWN pll_full_0/cp_0/a_1710_0# 0.04fF
C941 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/R 0.01fF
C942 divbuf_18/OUT5 divbuf_18/a_492_n240# 0.01fF
C943 divbuf_2/OUT2 divbuf_2/OUT3 1.37fF
C944 divbuf_1/OUT5 divbuf_1/OUT4 20.26fF
C945 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.43fF
C946 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF
C947 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF
C948 pll_full_1/ro_complete_0/cbank_1/switch_5/vin pll_full_1/divider_0/clk 1.46fF
C949 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
C950 divider_0/tspc_1/Z4 divider_0/nor_0/A 0.02fF
C951 divider_1/tspc_0/Z1 divider_1/tspc_0/Z3 0.06fF
C952 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z4 0.00fF
C953 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF
C954 divbuf_21/a_492_n240# divbuf_21/OUT5 0.01fF
C955 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/Z3 0.05fF
C956 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/clk 0.11fF
C957 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/switch_1/vin 0.19fF
C958 divbuf_18/OUT3 divbuf_18/OUT 0.26fF
C959 divider_2/tspc_2/Q divider_2/nor_0/A 0.55fF
C960 divider_2/nor_1/B divider_2/tspc_1/Q 0.22fF
C961 divbuf_24/OUT2 divbuf_24/OUT5 0.02fF
C962 divbuf_24/OUT3 divbuf_24/OUT4 5.16fF
C963 divbuf_3/OUT divbuf_3/a_492_n240# 0.00fF
C964 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF
C965 divider_0/nor_0/B divider_0/tspc_0/Z4 0.02fF
C966 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z4 0.00fF
C967 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Z4 0.65fF
C968 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF
C969 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/clk 0.51fF
C970 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF
C971 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF
C972 divider_0/nor_0/A divider_0/tspc_2/Z3 0.38fF
C973 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF
C974 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z3 0.06fF
C975 pd_0/tspc_r_0/Z2 pd_0/tspc_r_0/Z4 0.14fF
C976 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF
C977 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
C978 divider_1/nor_0/A divider_1/tspc_2/Z1 0.03fF
C979 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z3 0.05fF
C980 divbuf_7/OUT4 divbuf_7/OUT5 20.26fF
C981 pd_1/UP pd_1/and_pd_0/Z1 0.06fF
C982 pll_full_1/divbuf_1/OUT3 pll_full_1/divbuf_1/OUT4 5.16fF
C983 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/OUT5 43.38fF
C984 divbuf_4/OUT ro_complete_0/cbank_2/switch_1/vin 0.09fF
C985 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF
C986 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z1 0.17fF
C987 divbuf_19/OUT5 divbuf_19/a_492_n240# 0.01fF
C988 divider_2/mc2 divider_2/and_0/A 0.16fF
C989 divider_2/prescaler_0/tspc_2/Z2 divider_2/and_0/OUT 0.05fF
C990 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z3 0.05fF
C991 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/switch_5/vin 0.20fF
C992 divbuf_14/IN divbuf_14/a_492_n240# 0.13fF
C993 divider_0/mc2 divider_0/and_0/A 0.16fF
C994 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF
C995 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF
C996 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.01fF
C997 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/clk 0.11fF
C998 io_clamp_low[0] io_analog[4] 0.53fF
C999 divider_2/tspc_0/Z4 divider_2/tspc_0/a_630_n680# 0.12fF
C1000 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z3 0.05fF
C1001 pd_1/tspc_r_0/Z2 pd_1/R 0.21fF
C1002 pd_0/R pd_0/and_pd_0/Out1 0.33fF
C1003 pd_0/REF pd_0/tspc_r_1/Z4 0.02fF
C1004 pd_0/UP pd_0/tspc_r_1/Qbar 0.21fF
C1005 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
C1006 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/divider_0/clk 1.46fF
C1007 divider_2/tspc_2/Q divider_2/tspc_1/Z1 0.01fF
C1008 divider_2/tspc_1/a_630_n680# divider_2/nor_0/B 0.35fF
C1009 divider_1/and_0/A divider_1/and_0/B 0.18fF
C1010 divbuf_9/OUT2 divbuf_9/OUT 0.06fF
C1011 divbuf_9/OUT3 divbuf_9/OUT5 0.01fF
C1012 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
C1013 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.13fF
C1014 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z4 0.02fF
C1015 divider_2/tspc_1/Z2 divider_2/nor_0/A 0.15fF
C1016 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_0/D 0.32fF
C1017 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/clk 0.01fF
C1018 divider_2/nor_0/B divider_2/and_0/A 0.26fF
C1019 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.36fF
C1020 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z2 0.71fF
C1021 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF
C1022 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/z5 0.04fF
C1023 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/v 1.30fF
C1024 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/Q 0.04fF
C1025 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF
C1026 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/and_pd_0/Out1 0.05fF
C1027 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT2 0.02fF
C1028 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF
C1029 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z3 0.06fF
C1030 divbuf_20/OUT4 divbuf_20/OUT 1.11fF
C1031 divider_1/prescaler_0/tspc_2/D divider_1/prescaler_0/nand_0/z1 0.24fF
C1032 pd_1/DOWN pd_1/UP 0.46fF
C1033 pd_1/tspc_r_0/z5 pd_1/tspc_r_0/Qbar1 0.20fF
C1034 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF
C1035 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF
C1036 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/clk 0.51fF
C1037 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF
C1038 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z2 1.07fF
C1039 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z4 0.12fF
C1040 divbuf_8/a_492_n240# divbuf_8/OUT5 0.01fF
C1041 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/OUT2 0.06fF
C1042 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_3/vin 0.09fF
C1043 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
C1044 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF
C1045 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z2 0.01fF
C1046 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF
C1047 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF
C1048 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.16fF
C1049 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/clk 0.14fF
C1050 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/and_0/B 0.78fF
C1051 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/and_pd_0/Z1 0.02fF
C1052 ro_complete_1/a0 ro_complete_1/cbank_2/switch_5/vin 0.09fF
C1053 divbuf_14/OUT divbuf_14/OUT3 0.26fF
C1054 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z3 0.05fF
C1055 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z1 0.00fF
C1056 divider_1/tspc_0/Z1 divider_1/tspc_0/Z4 0.00fF
C1057 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z2 0.19fF
C1058 pd_0/DIV pd_0/tspc_r_0/Z1 0.17fF
C1059 pd_0/tspc_r_0/Qbar1 pd_0/DOWN 0.11fF
C1060 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z2 0.01fF
C1061 divider_1/and_0/OUT divider_1/and_0/out1 0.31fF
C1062 divider_1/prescaler_0/tspc_2/D divider_1/clk 0.26fF
C1063 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/z5 0.11fF
C1064 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF
C1065 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/clk 0.11fF
C1066 divbuf_5/OUT divbuf_3/OUT 3.09fF
C1067 divider_2/tspc_1/Q divider_2/tspc_0/Z1 0.01fF
C1068 divider_2/tspc_1/Z1 divider_2/tspc_1/Z2 1.07fF
C1069 divider_2/nor_0/B divider_2/tspc_1/Z3 0.38fF
C1070 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z4 0.08fF
C1071 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z3 0.05fF
C1072 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Q 0.04fF
C1073 divbuf_12/OUT3 divbuf_12/OUT 0.26fF
C1074 divbuf_12/OUT4 divbuf_12/OUT5 20.26fF
C1075 divbuf_4/OUT ro_complete_0/cbank_1/switch_1/vin 0.09fF
C1076 divbuf_5/OUT divbuf_5/OUT5 43.38fF
C1077 divbuf_1/OUT divbuf_1/a_492_n240# 0.00fF
C1078 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.08fF
C1079 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT4 1.11fF
C1080 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar 0.02fF
C1081 divbuf_14/OUT2 divbuf_14/a_492_n240# 0.42fF
C1082 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF
C1083 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF
C1084 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF
C1085 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF
C1086 divider_1/tspc_1/Q divider_1/tspc_1/Z3 0.05fF
C1087 divider_1/tspc_1/Z1 divider_1/tspc_1/Z4 0.00fF
C1088 divider_1/Out divider_1/nor_1/B 0.22fF
C1089 pd_0/R pd_0/tspc_r_1/Z2 0.21fF
C1090 divbuf_11/a_492_n240# divbuf_11/OUT 0.00fF
C1091 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF
C1092 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z2 0.25fF
C1093 divbuf_18/OUT5 divbuf_18/OUT 43.38fF
C1094 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF
C1095 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
C1096 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar 0.03fF
C1097 filter_0/v divbuf_25/OUT5 43.38fF
C1098 ro_complete_1/a4 ro_complete_1/cbank_1/v 0.05fF
C1099 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_0/Z3 0.45fF
C1100 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/nor_1/B 0.40fF
C1101 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z4 0.12fF
C1102 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.28fF
C1103 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF
C1104 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF
C1105 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/B 0.01fF
C1106 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF
C1107 divbuf_6/a_492_n240# divbuf_6/IN 0.13fF
C1108 divider_2/tspc_0/Z4 divider_2/tspc_1/Q 0.15fF
C1109 divbuf_20/a_492_n240# divbuf_20/IN 0.13fF
C1110 pll_full_1/cp_0/down pll_full_1/cp_0/a_1710_0# 0.32fF
C1111 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/R 0.21fF
C1112 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
C1113 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF
C1114 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/clk 0.14fF
C1115 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.78fF
C1116 divider_1/tspc_1/Z2 divider_1/tspc_1/Z4 0.36fF
C1117 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/D 0.05fF
C1118 divider_1/prescaler_0/tspc_0/Z3 divider_1/clk 0.64fF
C1119 pd_1/DOWN pd_1/tspc_r_0/z5 0.03fF
C1120 pd_0/UP pd_0/and_pd_0/Z1 0.06fF
C1121 divbuf_22/OUT4 divbuf_22/OUT 1.11fF
C1122 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z3 0.05fF
C1123 divider_2/tspc_0/Z3 divider_2/tspc_0/a_630_n680# 0.05fF
C1124 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/z5 0.11fF
C1125 divbuf_13/a_492_n240# divbuf_13/OUT5 0.01fF
C1126 divbuf_2/OUT2 divbuf_2/OUT5 0.02fF
C1127 divbuf_2/OUT ro_complete_0/cbank_2/v 0.08fF
C1128 divbuf_7/OUT ro_complete_0/cbank_1/switch_5/vin 0.09fF
C1129 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF
C1130 divider_0/tspc_0/a_630_n680# divider_0/Out 0.04fF
C1131 divbuf_3/OUT3 divbuf_3/OUT5 0.01fF
C1132 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.91fF
C1133 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
C1134 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.45fF
C1135 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/a_492_n240# 0.42fF
C1136 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z4 0.65fF
C1137 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF
C1138 divbuf_21/OUT2 divbuf_21/OUT3 1.37fF
C1139 pll_full_1/pd_0/DIV pll_full_1/pd_0/tspc_r_0/Qbar1 0.12fF
C1140 divider_2/prescaler_0/Out divider_2/tspc_2/Z3 0.45fF
C1141 divider_1/tspc_1/Z4 divider_1/nor_0/A 0.02fF
C1142 pd_1/tspc_r_0/Z4 pd_1/tspc_r_1/Z4 0.02fF
C1143 pd_1/REF pd_1/tspc_r_1/Z3 0.65fF
C1144 divbuf_0/OUT3 divbuf_0/OUT4 5.16fF
C1145 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
C1146 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/z5 0.03fF
C1147 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/R 0.21fF
C1148 divider_2/nor_0/A divider_2/and_0/B 0.08fF
C1149 divbuf_24/OUT3 divbuf_24/OUT 0.26fF
C1150 divbuf_24/OUT4 divbuf_24/OUT5 20.26fF
C1151 divbuf_4/OUT divbuf_4/a_492_n240# 0.00fF
C1152 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF
C1153 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Z4 0.65fF
C1154 divbuf_4/IN divbuf_4/OUT5 0.00fF
C1155 ro_complete_1/cbank_1/v ro_complete_1/cbank_2/v 1.36fF
C1156 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF
C1157 divider_0/nor_0/A divider_0/tspc_2/Z4 0.21fF
C1158 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
C1159 divider_1/nor_0/B divider_1/tspc_0/Z4 0.02fF
C1160 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z4 0.00fF
C1161 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z3 0.45fF
C1162 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/nor_1/B 0.40fF
C1163 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z4 0.12fF
C1164 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF
C1165 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF
C1166 divider_1/tspc_2/Z1 divider_1/tspc_2/Z2 1.07fF
C1167 divider_1/nor_0/A divider_1/tspc_2/Z3 0.38fF
C1168 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z4 0.12fF
C1169 divbuf_23/a_492_n240# divbuf_23/OUT 0.00fF
C1170 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Q 0.20fF
C1171 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/D 0.09fF
C1172 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF
C1173 divbuf_15/OUT divbuf_15/OUT2 0.06fF
C1174 divbuf_15/OUT5 divbuf_15/OUT3 0.01fF
C1175 ro_complete_1/a5 ro_complete_1/cbank_1/switch_0/vin 0.09fF
C1176 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/v 1.30fF
C1177 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.01fF
C1178 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF
C1179 divider_0/prescaler_0/Out divider_0/tspc_2/a_630_n680# 0.01fF
C1180 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF
C1181 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF
C1182 divbuf_5/IN divbuf_5/OUT5 0.00fF
C1183 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/divider_0/prescaler_0/nand_1/z1 0.21fF
C1184 divider_0/and_0/B divider_0/and_0/Z1 0.07fF
C1185 pll_full_1/pd_0/UP pll_full_1/pd_0/tspc_r_1/Z3 0.03fF
C1186 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z4 0.12fF
C1187 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z3 0.06fF
C1188 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z4 0.14fF
C1189 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/z5 0.11fF
C1190 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF
C1191 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
C1192 divbuf_22/a_492_n240# divbuf_22/IN 0.13fF
C1193 divbuf_9/OUT4 divbuf_9/OUT 1.11fF
C1194 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/nand_1/z1 0.22fF
C1195 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/tspc_0/D 0.04fF
C1196 divbuf_10/a_492_n240# divbuf_10/OUT2 0.42fF
C1197 ro_complete_1/a2 ro_complete_1/cbank_0/switch_3/vin 0.09fF
C1198 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF
C1199 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF
C1200 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF
C1201 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z3 0.33fF
C1202 ro_complete_1/cbank_1/switch_2/vin ro_complete_1/cbank_1/v 1.30fF
C1203 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_0/Z4 0.15fF
C1204 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.15fF
C1205 pll_full_1/ro_complete_0/a0 pll_full_1/divider_0/clk 0.11fF
C1206 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT2 0.02fF
C1207 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF
C1208 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z4 0.00fF
C1209 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/Z4 0.02fF
C1210 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/Q 0.04fF
C1211 divider_1/prescaler_0/tspc_1/Z3 divider_1/clk 0.45fF
C1212 pd_1/R pd_1/tspc_r_1/Z3 0.29fF
C1213 divbuf_8/OUT2 divbuf_8/OUT3 1.37fF
C1214 divbuf_0/OUT divbuf_0/OUT3 0.26fF
C1215 pll_full_1/divbuf_1/OUT2 pll_full_1/divbuf_1/OUT 0.06fF
C1216 pll_full_1/divbuf_1/OUT3 pll_full_1/divbuf_1/OUT5 0.01fF
C1217 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.14fF
C1218 divbuf_18/OUT3 divbuf_18/OUT5 0.01fF
C1219 divider_2/tspc_0/Z3 divider_2/tspc_1/Q 0.45fF
C1220 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z3 0.16fF
C1221 divider_2/nor_0/A divider_2/tspc_2/Z2 0.23fF
C1222 divbuf_2/OUT5 divbuf_2/a_492_n240# 0.01fF
C1223 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/v 1.30fF
C1224 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF
C1225 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF
C1226 ro_complete_1/a0 ro_complete_1/cbank_2/v 0.05fF
C1227 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.36fF
C1228 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF
C1229 divider_1/nor_1/Z1 divider_1/nor_1/B 0.06fF
C1230 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z2 0.25fF
C1231 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF
C1232 divbuf_17/OUT4 divbuf_17/OUT5 20.26fF
C1233 divbuf_7/a_492_n240# divbuf_7/OUT2 0.42fF
C1234 pd_1/UP pd_1/tspc_r_1/z5 0.03fF
C1235 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF
C1236 divbuf_12/OUT5 divbuf_12/OUT 43.38fF
C1237 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
C1238 divider_2/nor_0/B divider_2/tspc_1/Z4 0.21fF
C1239 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z2 1.07fF
C1240 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z4 0.12fF
C1241 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z2 0.01fF
C1242 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT5 43.38fF
C1243 divider_2/and_0/out1 divider_2/and_0/Z1 0.36fF
C1244 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/a_492_n240# 0.01fF
C1245 divbuf_15/OUT5 divbuf_15/a_492_n240# 0.01fF
C1246 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF
C1247 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_2/D 0.16fF
C1248 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.03fF
C1249 divbuf_25/OUT2 divbuf_25/OUT5 0.02fF
C1250 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_1/Q 0.13fF
C1251 divider_1/prescaler_0/m1_2700_2190# divider_1/and_0/OUT 0.14fF
C1252 pd_1/DIV pd_1/tspc_r_0/Z3 0.65fF
C1253 pd_0/REF pd_0/tspc_r_1/Z3 0.65fF
C1254 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z4 0.15fF
C1255 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF
C1256 pll_full_0/ro_complete_0/a0 pll_full_0/divider_0/clk 0.11fF
C1257 divbuf_17/OUT3 divbuf_17/OUT5 0.01fF
C1258 divbuf_11/IN divbuf_11/OUT5 0.00fF
C1259 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/a_492_n240# 0.00fF
C1260 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF
C1261 divbuf_9/a_492_n240# divbuf_9/IN 0.13fF
C1262 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/Qbar 0.01fF
C1263 divider_2/prescaler_0/tspc_1/Z2 divider_2/clk 0.11fF
C1264 pll_full_1/ro_complete_0/a3 pll_full_1/divider_0/clk 0.11fF
C1265 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Qbar1 0.12fF
C1266 divbuf_3/OUT2 divbuf_3/a_492_n240# 0.42fF
C1267 pll_full_1/pd_0/UP pll_full_1/pd_0/tspc_r_1/Qbar1 0.11fF
C1268 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF
C1269 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF
C1270 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF
C1271 divider_1/prescaler_0/tspc_2/Z4 divider_1/prescaler_0/tspc_2/D 0.11fF
C1272 divider_1/prescaler_0/tspc_0/Z4 divider_1/clk 0.12fF
C1273 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF
C1274 divbuf_17/OUT4 divbuf_17/OUT 1.11fF
C1275 divider_2/mc2 divider_2/prescaler_0/tspc_2/a_630_n680# 0.33fF
C1276 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z4 0.12fF
C1277 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/a_630_n680# 0.19fF
C1278 divbuf_13/OUT2 divbuf_13/OUT3 1.37fF
C1279 divbuf_2/OUT3 divbuf_2/OUT4 5.16fF
C1280 divbuf_7/OUT ro_complete_0/cbank_1/v 0.05fF
C1281 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.09fF
C1282 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z2 0.71fF
C1283 divider_0/mc2 divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF
C1284 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.09fF
C1285 ro_complete_1/a3 ro_complete_1/cbank_2/v 0.05fF
C1286 pll_full_1/pd_0/UP pll_full_1/pd_0/DOWN 4.58fF
C1287 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF
C1288 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z2 0.01fF
C1289 divider_1/tspc_0/a_630_n680# divider_1/Out 0.04fF
C1290 divider_2/prescaler_0/Out divider_2/tspc_2/Z4 0.12fF
C1291 divider_1/prescaler_0/tspc_2/Z3 divider_1/clk 0.45fF
C1292 divbuf_21/OUT2 divbuf_21/OUT5 0.02fF
C1293 divbuf_21/OUT3 divbuf_21/OUT4 5.16fF
C1294 pd_1/tspc_r_0/z5 pd_1/tspc_r_1/z5 0.02fF
C1295 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Qbar1 0.38fF
C1296 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/tspc_r_0/Z4 0.14fF
C1297 divbuf_17/OUT3 divbuf_17/OUT 0.26fF
C1298 divbuf_12/a_492_n240# divbuf_12/OUT2 0.42fF
C1299 divbuf_0/OUT3 divbuf_0/OUT5 0.01fF
C1300 divbuf_24/OUT5 divbuf_24/OUT 43.38fF
C1301 divbuf_3/OUT divbuf_3/OUT4 1.11fF
C1302 ro_complete_1/a4 ro_complete_1/cbank_1/switch_1/vin 0.09fF
C1303 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.45fF
C1304 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/tspc_0/a_630_n680# 0.01fF
C1305 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z4 0.14fF
C1306 divbuf_4/OUT3 divbuf_4/OUT5 0.01fF
C1307 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/and_pd_0/Out1 0.18fF
C1308 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF
C1309 pll_full_0/ro_complete_0/a3 pll_full_0/divider_0/clk 0.11fF
C1310 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Z4 0.65fF
C1311 divider_1/tspc_2/Z2 divider_1/tspc_2/Z3 0.16fF
C1312 divider_1/nor_0/A divider_1/tspc_2/Z4 0.21fF
C1313 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Z1 0.02fF
C1314 divbuf_4/OUT ro_complete_0/cbank_1/switch_0/vin 0.12fF
C1315 divider_2/tspc_1/Z3 divider_2/tspc_1/Z4 0.65fF
C1316 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Q 0.04fF
C1317 divbuf_23/IN divbuf_23/OUT5 0.00fF
C1318 divbuf_5/OUT ro_complete_0/cbank_2/switch_2/vin 0.14fF
C1319 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF
C1320 ro_complete_1/a3 ro_complete_1/cbank_1/switch_2/vin 0.09fF
C1321 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.11fF
C1322 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/a_492_n240# 0.00fF
C1323 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/z5 0.04fF
C1324 divider_0/prescaler_0/Out divider_0/nor_0/A 0.15fF
C1325 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF
C1326 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.14fF
C1327 divider_0/nor_1/Z1 divider_0/and_0/B 0.78fF
C1328 divbuf_5/OUT3 divbuf_5/OUT5 0.01fF
C1329 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF
C1330 divbuf_10/OUT2 divbuf_10/OUT 0.06fF
C1331 divbuf_10/OUT3 divbuf_10/OUT5 0.01fF
C1332 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF
C1333 divider_1/prescaler_0/Out divider_1/tspc_2/a_630_n680# 0.01fF
C1334 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z4 0.00fF
C1335 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Q 0.21fF
C1336 pd_0/UP pd_0/tspc_r_1/z5 0.03fF
C1337 divbuf_19/OUT5 divbuf_19/OUT 43.38fF
C1338 divider_1/and_0/B divider_1/and_0/Z1 0.07fF
C1339 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/nand_1/z1 0.01fF
C1340 divider_2/prescaler_0/tspc_2/Z2 divider_2/clk 0.11fF
C1341 ro_complete_1/a2 ro_complete_1/cbank_2/switch_3/vin 0.09fF
C1342 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/v 1.30fF
C1343 divbuf_3/OUT ro_complete_0/cbank_1/v 0.05fF
C1344 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z4 0.08fF
C1345 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF
C1346 divbuf_1/OUT4 divbuf_1/OUT3 5.16fF
C1347 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/switch_5/vin 0.20fF
C1348 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/nor_1/B 0.47fF
C1349 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/tspc_0/Z4 0.65fF
C1350 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/divider_0/tspc_2/Z4 0.65fF
C1351 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT3 0.26fF
C1352 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT4 20.26fF
C1353 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
C1354 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Qbar1 0.20fF
C1355 pll_full_0/filter_0/a_4216_n5230# pll_full_0/divider_0/clk 1.58fF
C1356 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF
C1357 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z3 0.33fF
C1358 divbuf_16/OUT2 divbuf_16/OUT5 0.02fF
C1359 divider_1/prescaler_0/tspc_1/Z4 divider_1/clk 0.12fF
C1360 pd_1/DOWN pd_1/tspc_r_1/Qbar 0.02fF
C1361 pd_1/R pd_1/UP 0.45fF
C1362 divbuf_18/IN divbuf_18/a_492_n240# 0.13fF
C1363 divider_2/tspc_0/a_630_n680# divider_2/tspc_1/Q 0.01fF
C1364 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z4 0.36fF
C1365 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_0/D 0.09fF
C1366 divbuf_8/OUT2 divbuf_8/OUT5 0.02fF
C1367 divbuf_8/OUT3 divbuf_8/OUT4 5.16fF
C1368 divbuf_0/OUT divbuf_0/OUT4 1.11fF
C1369 pll_full_1/divbuf_1/OUT4 pll_full_1/divbuf_1/OUT 1.11fF
C1370 divider_2/tspc_2/Z1 divider_2/tspc_2/Z3 0.06fF
C1371 divbuf_24/a_492_n240# divbuf_24/OUT2 0.42fF
C1372 divider_0/tspc_0/Z3 divider_0/Out 0.05fF
C1373 divider_0/tspc_0/Z2 divider_0/nor_1/B 0.40fF
C1374 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF
C1375 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/a_630_n680# 0.01fF
C1376 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF
C1377 divider_0/prescaler_0/tspc_2/Q divider_0/clk 0.05fF
C1378 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/Qbar 0.01fF
C1379 pd_0/tspc_r_0/Z3 pd_0/R 0.27fF
C1380 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF
C1381 divbuf_16/OUT3 divbuf_16/OUT2 1.37fF
C1382 divbuf_16/IN divbuf_16/OUT5 0.00fF
C1383 divider_1/prescaler_0/tspc_1/Q divider_1/clk 0.60fF
C1384 cp_0/a_1710_0# cp_0/out 0.84fF
C1385 pd_1/tspc_r_1/Z2 pd_1/tspc_r_1/Z4 0.14fF
C1386 divbuf_5/OUT divbuf_6/OUT 3.23fF
C1387 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF
C1388 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z3 0.16fF
C1389 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.19fF
C1390 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF
C1391 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF
C1392 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/tspc_1/Q 0.14fF
C1393 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/Out 0.04fF
C1394 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF
C1395 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF
C1396 divbuf_5/a_492_n240# divbuf_5/OUT2 0.42fF
C1397 divider_1/mc2 divider_1/and_0/out1 0.06fF
C1398 divbuf_14/OUT4 divbuf_14/OUT3 5.16fF
C1399 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Qbar1 0.38fF
C1400 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_1/B 0.47fF
C1401 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z4 0.65fF
C1402 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z2 0.19fF
C1403 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_1/Q 0.21fF
C1404 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_2/D 0.16fF
C1405 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/D 0.03fF
C1406 divbuf_11/OUT2 divbuf_11/OUT 0.06fF
C1407 divbuf_11/OUT3 divbuf_11/OUT5 0.01fF
C1408 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF
C1409 divbuf_2/OUT divbuf_2/OUT3 0.26fF
C1410 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/UP 0.03fF
C1411 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF
C1412 divbuf_6/OUT divbuf_6/OUT3 0.26fF
C1413 ro_complete_1/a5 ro_complete_1/cbank_1/v 0.10fF
C1414 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/cbank_0/v 1.30fF
C1415 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/and_0/B 0.18fF
C1416 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF
C1417 divider_1/mc2 divider_1/nor_0/B 0.06fF
C1418 divbuf_14/OUT2 divbuf_14/OUT3 1.37fF
C1419 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Q 0.05fF
C1420 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF
C1421 divbuf_6/a_492_n240# divbuf_6/OUT5 0.01fF
C1422 divbuf_20/a_492_n240# divbuf_20/OUT5 0.01fF
C1423 pd_1/DOWN pd_1/tspc_r_0/Qbar1 0.11fF
C1424 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Z1 0.02fF
C1425 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Qbar1 0.38fF
C1426 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF
C1427 divbuf_16/OUT3 divbuf_16/OUT5 0.01fF
C1428 divbuf_18/OUT2 divbuf_18/a_492_n240# 0.42fF
C1429 divbuf_13/OUT2 divbuf_13/OUT5 0.02fF
C1430 divbuf_13/OUT3 divbuf_13/OUT4 5.16fF
C1431 divider_2/and_0/OUT divider_2/and_0/B 0.01fF
C1432 divbuf_2/OUT4 divbuf_2/OUT5 20.26fF
C1433 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
C1434 pll_full_0/pd_0/REF pll_full_0/divbuf_1/OUT5 0.00fF
C1435 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z4 0.01fF
C1436 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF
C1437 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_1/Q 0.14fF
C1438 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/Out 0.04fF
C1439 divbuf_21/OUT3 divbuf_21/OUT 0.26fF
C1440 divbuf_21/OUT4 divbuf_21/OUT5 20.26fF
C1441 pd_1/DOWN pd_1/and_pd_0/Z1 0.07fF
C1442 pd_1/REF pd_1/tspc_r_1/Z1 0.17fF
C1443 pd_1/tspc_r_1/Qbar1 pd_1/UP 0.11fF
C1444 divider_2/prescaler_0/tspc_0/Z3 divider_2/clk 0.64fF
C1445 divider_1/prescaler_0/tspc_2/Z4 divider_1/clk 0.12fF
C1446 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/a_630_n680# 0.19fF
C1447 divbuf_0/OUT4 divbuf_0/OUT5 20.26fF
C1448 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
C1449 pll_full_0/pd_0/DOWN pll_full_0/pd_0/REF 1.48fF
C1450 divbuf_4/OUT divbuf_4/OUT2 0.06fF
C1451 ro_complete_1/a2 ro_complete_1/cbank_1/v 0.05fF
C1452 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
C1453 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF
C1454 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.06fF
C1455 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_2/a_630_n680# 0.04fF
C1456 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/D 0.03fF
C1457 divbuf_17/OUT2 divbuf_17/a_492_n240# 0.42fF
C1458 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.18fF
C1459 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
C1460 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/OUT3 0.26fF
C1461 divbuf_19/OUT2 divbuf_19/a_492_n240# 0.42fF
C1462 divider_1/tspc_2/Z2 divider_1/tspc_2/Z4 0.36fF
C1463 divbuf_23/OUT2 divbuf_23/OUT 0.06fF
C1464 divbuf_23/OUT3 divbuf_23/OUT5 0.01fF
C1465 pll_full_1/pd_0/DIV pll_full_1/divider_0/and_0/OUT 0.01fF
C1466 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.12fF
C1467 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF
C1468 divbuf_15/OUT2 divbuf_15/OUT3 1.37fF
C1469 pll_full_0/pd_0/R pll_full_0/pd_0/REF 0.61fF
C1470 ro_complete_1/a3 ro_complete_1/cbank_2/switch_1/vin 0.13fF
C1471 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_1/Z1 0.03fF
C1472 pll_full_1/ro_complete_0/a4 pll_full_1/divider_0/clk 0.01fF
C1473 divbuf_15/IN divbuf_15/a_492_n240# 0.13fF
C1474 divbuf_25/OUT3 divbuf_25/OUT5 0.01fF
C1475 divbuf_25/a_492_n240# divbuf_25/IN 0.13fF
C1476 divider_0/prescaler_0/Out divider_0/tspc_2/Z2 0.11fF
C1477 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF
C1478 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/nor_0/A 0.03fF
C1479 divider_2/Out divider_2/nor_1/B 0.22fF
C1480 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF
C1481 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
C1482 divider_1/prescaler_0/Out divider_1/nor_0/A 0.15fF
C1483 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Z4 0.65fF
C1484 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/clk 0.14fF
C1485 divider_1/nor_1/Z1 divider_1/and_0/B 0.78fF
C1486 divbuf_10/OUT4 divbuf_10/OUT 1.11fF
C1487 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z3 0.25fF
C1488 pd_0/tspc_r_1/Z2 pd_0/tspc_r_1/Z4 0.14fF
C1489 divbuf_22/a_492_n240# divbuf_22/OUT5 0.01fF
C1490 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF
C1491 divbuf_10/a_492_n240# divbuf_10/OUT 0.00fF
C1492 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
C1493 divider_2/prescaler_0/tspc_0/D divider_2/prescaler_0/nand_1/z1 0.21fF
C1494 ro_complete_1/a2 ro_complete_1/cbank_0/switch_2/vin 0.14fF
C1495 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a4 0.09fF
C1496 divbuf_0/OUT5 divbuf_0/IN 0.00fF
C1497 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF
C1498 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF
C1499 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF
C1500 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF
C1501 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/v 1.30fF
C1502 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_1/Z2 0.30fF
C1503 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/Q 0.19fF
C1504 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.01fF
C1505 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z4 0.08fF
C1506 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z3 0.05fF
C1507 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
C1508 divbuf_17/OUT2 divbuf_17/OUT5 0.02fF
C1509 cp_0/a_1710_n2840# cp_0/a_1710_0# 0.83fF
C1510 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_0/Qbar1 0.11fF
C1511 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.04fF
C1512 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF
C1513 divbuf_8/OUT3 divbuf_8/OUT 0.26fF
C1514 divbuf_8/OUT4 divbuf_8/OUT5 20.26fF
C1515 divbuf_7/OUT divbuf_7/OUT3 0.26fF
C1516 divbuf_0/OUT divbuf_0/OUT5 43.38fF
C1517 divider_2/tspc_2/Z1 divider_2/tspc_2/Z4 0.00fF
C1518 divbuf_1/OUT5 divbuf_1/IN 0.00fF
C1519 divider_0/nor_0/B divider_0/tspc_2/Q 0.22fF
C1520 divider_0/tspc_0/a_630_n680# divider_0/nor_1/B 0.35fF
C1521 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z4 0.08fF
C1522 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF
C1523 divbuf_4/a_492_n240# divbuf_4/IN 0.13fF
C1524 ro_complete_1/cbank_2/switch_2/vin ro_complete_1/cbank_2/v 1.30fF
C1525 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_2/Z3 0.45fF
C1526 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/nor_0/A 1.21fF
C1527 pll_full_1/pd_0/UP pll_full_1/pd_0/R 0.46fF
C1528 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF
C1529 divider_0/tspc_2/a_630_n680# divider_0/nor_0/A 0.35fF
C1530 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.29fF
C1531 divider_1/tspc_0/Z3 divider_1/Out 0.05fF
C1532 divider_1/tspc_0/Z2 divider_1/nor_1/B 0.40fF
C1533 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z3 0.33fF
C1534 pd_1/DIV pd_1/tspc_r_0/Z2 0.19fF
C1535 pd_0/DOWN pd_0/R 0.36fF
C1536 pd_0/tspc_r_0/Z1 pd_0/tspc_r_0/Z2 0.71fF
C1537 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z4 0.20fF
C1538 pd_0/DIV pd_0/tspc_r_0/z5 0.04fF
C1539 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z1 0.03fF
C1540 pll_full_0/ro_complete_0/a4 pll_full_0/divider_0/clk 0.01fF
C1541 divider_1/and_0/OUT divider_1/and_0/Z1 0.04fF
C1542 divider_1/prescaler_0/tspc_2/Q divider_1/clk 0.05fF
C1543 cp_0/a_1710_0# cp_0/down 0.32fF
C1544 pll_full_1/pd_0/tspc_r_0/Qbar pll_full_1/pd_0/tspc_r_0/Qbar1 0.01fF
C1545 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/nor_0/A 0.03fF
C1546 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z4 0.36fF
C1547 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF
C1548 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.09fF
C1549 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/tspc_0/Z3 0.16fF
C1550 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.06fF
C1551 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT2 0.06fF
C1552 divbuf_15/OUT2 divbuf_15/a_492_n240# 0.42fF
C1553 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.00fF
C1554 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF
C1555 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF
C1556 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF
C1557 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF
C1558 divider_0/nor_0/Z1 divider_0/and_0/A 0.80fF
C1559 pll_full_0/pd_0/DIV pll_full_0/divider_0/and_0/OUT 0.01fF
C1560 io_clamp_high[2] io_analog[6] 0.53fF
C1561 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/Z1 0.17fF
C1562 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
C1563 divider_1/mc2 divider_1/and_0/A 0.16fF
C1564 divider_0/and_0/out1 divider_0/and_0/A 0.01fF
C1565 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/nand_0/z1 0.07fF
C1566 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/D 0.05fF
C1567 pd_0/tspc_r_0/Z4 pd_0/tspc_r_1/Z4 0.02fF
C1568 pd_0/DOWN pd_0/and_pd_0/Out1 0.12fF
C1569 pd_0/REF pd_0/tspc_r_1/Z1 0.17fF
C1570 pd_0/tspc_r_1/Qbar1 pd_0/UP 0.11fF
C1571 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z2 0.30fF
C1572 divbuf_18/OUT2 divbuf_18/OUT 0.06fF
C1573 divbuf_17/OUT2 divbuf_17/OUT 0.06fF
C1574 divbuf_16/OUT5 divbuf_16/OUT4 20.26fF
C1575 divbuf_11/OUT4 divbuf_11/OUT 1.11fF
C1576 filter_0/v divbuf_25/OUT4 1.11fF
C1577 divbuf_9/a_492_n240# divbuf_9/OUT5 0.01fF
C1578 divbuf_2/OUT divbuf_2/OUT5 43.38fF
C1579 divbuf_4/OUT ro_complete_0/cbank_1/v 0.05fF
C1580 pll_full_1/divbuf_1/OUT5 pll_full_1/divbuf_1/OUT 43.38fF
C1581 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.20fF
C1582 divider_0/tspc_0/Z2 divider_0/tspc_0/a_630_n680# 0.01fF
C1583 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_2/Q 0.01fF
C1584 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_1/a_630_n680# 0.35fF
C1585 pll_full_1/ro_complete_0/a1 pll_full_1/divider_0/clk 0.11fF
C1586 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF
C1587 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z2 0.19fF
C1588 divbuf_6/OUT divbuf_6/OUT5 43.38fF
C1589 divbuf_3/IN divbuf_3/OUT5 0.00fF
C1590 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF
C1591 divider_0/nor_0/B divider_0/and_0/A 0.26fF
C1592 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/tspc_r_1/Qbar1 0.01fF
C1593 divbuf_6/OUT2 divbuf_6/OUT3 1.37fF
C1594 divbuf_20/OUT2 divbuf_20/OUT3 1.37fF
C1595 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_1/Q 0.13fF
C1596 divbuf_16/OUT3 divbuf_16/OUT4 5.16fF
C1597 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Q 0.05fF
C1598 divider_1/prescaler_0/m1_2700_2190# divider_1/clk 0.01fF
C1599 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/z5 0.04fF
C1600 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z3 0.45fF
C1601 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_0/A 1.21fF
C1602 divider_2/tspc_0/Z2 divider_2/nor_1/B 0.40fF
C1603 divbuf_13/OUT3 divbuf_13/OUT 0.26fF
C1604 divbuf_13/OUT4 divbuf_13/OUT5 20.26fF
C1605 divbuf_0/a_492_n240# divbuf_0/IN 0.13fF
C1606 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/Z2 0.14fF
C1607 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z2 0.01fF
C1608 ro_complete_1/a1 ro_complete_1/cbank_2/v 0.05fF
C1609 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/Out 0.05fF
C1610 divider_0/nor_1/B divider_0/and_0/B 0.29fF
C1611 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/DOWN 0.02fF
C1612 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF
C1613 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/B 0.18fF
C1614 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z3 0.16fF
C1615 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF
C1616 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/a_630_n680# 0.05fF
C1617 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z4 0.01fF
C1618 divbuf_21/OUT5 divbuf_21/OUT 43.38fF
C1619 divider_2/prescaler_0/tspc_0/Z4 divider_2/clk 0.12fF
C1620 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z2 0.25fF
C1621 divbuf_12/a_492_n240# divbuf_12/OUT 0.00fF
C1622 divbuf_0/OUT divbuf_0/a_492_n240# 0.00fF
C1623 divbuf_0/OUT3 divbuf_0/OUT2 1.37fF
C1624 pll_full_1/filter_0/a_4216_n5230# pll_full_1/divider_0/clk 1.58fF
C1625 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF
C1626 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/a3 0.09fF
C1627 divbuf_4/OUT divbuf_4/OUT4 1.11fF
C1628 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF
C1629 divider_0/nor_0/B divider_0/tspc_1/Z3 0.38fF
C1630 divider_0/tspc_1/Q divider_0/nor_1/B 0.22fF
C1631 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/and_0/B 0.31fF
C1632 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/nor_0/A 0.55fF
C1633 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/nand_0/z1 0.01fF
C1634 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT3 1.37fF
C1635 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF
C1636 pd_0/R pd_0/tspc_r_1/Z3 0.29fF
C1637 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_2/Q 0.01fF
C1638 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/a_630_n680# 0.35fF
C1639 pll_full_0/ro_complete_0/a1 pll_full_0/divider_0/clk 0.11fF
C1640 divider_1/nor_0/Z1 divider_1/and_0/B 0.18fF
C1641 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Q 0.15fF
C1642 divider_1/prescaler_0/tspc_0/Z2 divider_1/and_0/OUT 0.06fF
C1643 divbuf_11/a_492_n240# divbuf_11/IN 0.13fF
C1644 divbuf_23/OUT4 divbuf_23/OUT 1.11fF
C1645 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a4 0.12fF
C1646 divbuf_2/OUT ro_complete_0/cbank_1/switch_0/vin 0.09fF
C1647 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF
C1648 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
C1649 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar1 0.30fF
C1650 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_1/Q 0.51fF
C1651 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/tspc_0/Z4 0.36fF
C1652 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.05fF
C1653 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/clk 0.06fF
C1654 pll_full_1/pd_0/UP pll_full_1/pd_0/tspc_r_1/z5 0.03fF
C1655 pd_1/tspc_r_0/Qbar pd_1/tspc_r_0/Qbar1 0.01fF
C1656 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z2 0.14fF
C1657 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF
C1658 divbuf_19/IN divbuf_19/OUT5 0.00fF
C1659 divbuf_17/OUT4 divbuf_17/OUT3 5.16fF
C1660 divider_1/prescaler_0/Out divider_1/tspc_2/Z2 0.11fF
C1661 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/clk 0.01fF
C1662 divbuf_22/OUT2 divbuf_22/OUT3 1.37fF
C1663 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z4 0.20fF
C1664 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF
C1665 divider_2/mc2 divider_2/nor_1/B 0.15fF
C1666 divbuf_10/IN divbuf_10/OUT5 0.00fF
C1667 divbuf_6/OUT ro_complete_0/cbank_1/v 0.05fF
C1668 divider_0/tspc_0/Z2 divider_0/tspc_1/Q 0.14fF
C1669 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF
C1670 ro_complete_1/cbank_1/switch_0/vin ro_complete_1/cbank_1/v 1.43fF
C1671 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z3 0.06fF
C1672 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/a_630_n680# 0.01fF
C1673 divbuf_16/a_492_n240# divbuf_16/OUT2 0.42fF
C1674 divider_0/tspc_1/Z2 divider_0/nor_0/A 0.15fF
C1675 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/D 0.32fF
C1676 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF
C1677 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/and_0/A 0.01fF
C1678 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF
C1679 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
C1680 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF
C1681 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z2 1.07fF
C1682 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z4 0.12fF
C1683 divbuf_21/a_492_n240# divbuf_21/OUT2 0.42fF
C1684 pd_1/R pd_1/tspc_r_1/Qbar 0.03fF
C1685 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.31fF
C1686 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/nor_0/A 0.55fF
C1687 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF
C1688 divbuf_18/OUT2 divbuf_18/OUT3 1.37fF
C1689 divider_2/nor_1/Z1 divider_2/nor_0/B 0.18fF
C1690 divider_2/prescaler_0/Out divider_2/tspc_2/a_630_n680# 0.01fF
C1691 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_2/Q 0.19fF
C1692 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/clk 0.01fF
C1693 divbuf_8/OUT5 divbuf_8/OUT 43.38fF
C1694 divider_2/nor_1/B divider_2/nor_0/B 0.47fF
C1695 divider_2/tspc_0/Z2 divider_2/tspc_0/Z1 1.07fF
C1696 divbuf_7/OUT divbuf_7/OUT5 43.38fF
C1697 divbuf_5/OUT ro_complete_0/cbank_1/switch_3/vin 0.09fF
C1698 divider_2/tspc_2/Z3 divider_2/tspc_2/Z4 0.65fF
C1699 divbuf_24/a_492_n240# divbuf_24/OUT 0.00fF
C1700 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF
C1701 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/Z3 0.33fF
C1702 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF
C1703 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z4 0.12fF
C1704 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/switch_5/vin 0.20fF
C1705 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/nor_0/A 0.01fF
C1706 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_2/Z4 0.12fF
C1707 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z3 0.16fF
C1708 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.15fF
C1709 divbuf_16/a_492_n240# divbuf_16/IN 0.13fF
C1710 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF
C1711 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
C1712 divider_1/nor_0/B divider_1/tspc_2/Q 0.22fF
C1713 divider_1/tspc_0/a_630_n680# divider_1/nor_1/B 0.35fF
C1714 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z4 0.08fF
C1715 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z3 0.05fF
C1716 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/z5 0.20fF
C1717 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Q 0.51fF
C1718 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z4 0.36fF
C1719 divbuf_7/IN divbuf_7/OUT5 0.00fF
C1720 pd_1/UP pd_1/and_pd_0/Out1 0.33fF
C1721 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/clk 0.06fF
C1722 divider_1/tspc_2/a_630_n680# divider_1/nor_0/A 0.35fF
C1723 divider_1/prescaler_0/tspc_0/D divider_1/clk 0.29fF
C1724 divbuf_23/a_492_n240# divbuf_23/IN 0.13fF
C1725 divbuf_4/OUT divbuf_3/OUT 2.71fF
C1726 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.13fF
C1727 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF
C1728 divbuf_0/OUT5 divbuf_0/a_492_n240# 0.01fF
C1729 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF
C1730 divbuf_15/OUT4 divbuf_15/OUT 1.11fF
C1731 divbuf_1/OUT5 divbuf_1/OUT3 0.01fF
C1732 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.00fF
C1733 divider_0/tspc_2/Q divider_0/tspc_1/Z3 0.45fF
C1734 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z2 0.01fF
C1735 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF
C1736 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF
C1737 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF
C1738 io_clamp_low[1] io_analog[5] 0.53fF
C1739 divider_2/tspc_0/Z4 divider_2/tspc_0/Z2 0.36fF
C1740 divider_2/Out divider_2/tspc_0/Z3 0.05fF
C1741 divbuf_16/a_492_n240# divbuf_16/OUT5 0.01fF
C1742 divider_1/tspc_1/a_630_n680# divider_1/nor_1/B 0.00fF
C1743 divider_1/prescaler_0/tspc_1/Z2 divider_1/and_0/OUT 0.06fF
C1744 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z3 0.33fF
C1745 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Q 0.38fF
C1746 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/D 0.11fF
C1747 pd_1/tspc_r_0/Qbar pd_1/DOWN 0.21fF
C1748 pd_0/tspc_r_0/z5 pd_0/tspc_r_1/z5 0.02fF
C1749 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z2 0.25fF
C1750 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF
C1751 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF
C1752 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/A 0.01fF
C1753 divbuf_18/IN divbuf_18/OUT5 0.00fF
C1754 divider_2/tspc_1/a_630_n680# divider_2/nor_1/B 0.00fF
C1755 divider_1/and_0/out1 divider_1/and_0/A 0.01fF
C1756 divbuf_9/OUT2 divbuf_9/OUT3 1.37fF
C1757 divbuf_6/OUT divbuf_7/OUT 2.98fF
C1758 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
C1759 divbuf_3/OUT ro_complete_0/cbank_2/switch_2/vin 0.09fF
C1760 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
C1761 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF
C1762 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.06fF
C1763 divbuf_6/OUT2 divbuf_6/OUT5 0.02fF
C1764 divbuf_6/OUT3 divbuf_6/OUT4 5.16fF
C1765 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/tspc_2/Z1 0.03fF
C1766 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z3 0.05fF
C1767 divider_1/tspc_0/Z2 divider_1/tspc_0/a_630_n680# 0.01fF
C1768 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/Z3 0.65fF
C1769 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_1/Q 0.21fF
C1770 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/clk 0.01fF
C1771 divider_1/nor_0/B divider_1/and_0/A 0.26fF
C1772 divbuf_20/OUT2 divbuf_20/OUT5 0.02fF
C1773 divbuf_20/OUT3 divbuf_20/OUT4 5.16fF
C1774 pd_1/R pd_1/tspc_r_0/Qbar1 0.01fF
C1775 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/nor_0/A 0.01fF
C1776 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z4 0.12fF
C1777 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF
C1778 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF
C1779 divbuf_8/a_492_n240# divbuf_8/OUT2 0.42fF
C1780 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF
C1781 divbuf_13/OUT5 divbuf_13/OUT 43.38fF
C1782 pll_full_1/ro_complete_0/cbank_2/switch_2/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF
C1783 filter_0/v divbuf_25/a_492_n240# 0.00fF
C1784 divbuf_3/OUT divbuf_3/OUT2 0.06fF
C1785 divbuf_2/OUT2 divbuf_2/a_492_n240# 0.42fF
C1786 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF
C1787 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF
C1788 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z1 0.08fF
C1789 divider_0/mc2 divider_0/nor_1/B 0.15fF
C1790 ro_complete_1/cbank_1/switch_5/vin ro_complete_1/cbank_1/v 1.30fF
C1791 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Z3 0.05fF
C1792 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF
C1793 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
C1794 pll_full_1/divider_0/and_0/A pll_full_1/divider_0/and_0/B 0.18fF
C1795 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/a_630_n680# 0.12fF
C1796 pd_0/DIV pd_0/tspc_r_0/Qbar1 0.12fF
C1797 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF
C1798 divider_1/nor_1/B divider_1/and_0/B 0.29fF
C1799 pd_1/R pd_1/and_pd_0/Z1 0.02fF
C1800 pd_1/tspc_r_1/Qbar1 pd_1/tspc_r_1/Qbar 0.01fF
C1801 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_0/Qbar1 0.01fF
C1802 divbuf_12/IN divbuf_12/OUT5 0.00fF
C1803 divbuf_1/OUT2 divbuf_1/OUT5 0.02fF
C1804 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF
C1805 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF
C1806 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/nor_0/B 0.18fF
C1807 divbuf_5/OUT divbuf_5/OUT2 0.06fF
C1808 divider_0/nor_0/B divider_0/tspc_1/Z4 0.21fF
C1809 divider_0/tspc_0/Z3 divider_0/nor_1/B 0.38fF
C1810 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/divider_0/prescaler_0/nand_0/z1 0.24fF
C1811 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT4 5.16fF
C1812 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
C1813 divider_0/nor_0/A divider_0/and_0/B 0.08fF
C1814 divider_1/tspc_1/Z1 divider_1/tspc_1/Z2 1.07fF
C1815 divider_1/nor_0/B divider_1/tspc_1/Z3 0.38fF
C1816 divider_1/tspc_1/Q divider_1/nor_1/B 0.22fF
C1817 pd_0/R pd_0/UP 0.45fF
C1818 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF
C1819 divbuf_18/OUT2 divbuf_18/OUT5 0.02fF
C1820 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z1 0.03fF
C1821 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF
C1822 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.09fF
C1823 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/DOWN 0.03fF
C1824 divbuf_19/OUT5 divbuf_19/OUT3 0.01fF
C1825 divider_2/nor_0/B divider_2/tspc_2/a_630_n680# 0.01fF
C1826 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/D 0.03fF
C1827 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.19fF
C1828 pll_full_1/ro_complete_0/a5 pll_full_1/divider_0/clk 0.15fF
C1829 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Q 0.20fF
C1830 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF
C1831 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF
C1832 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/out1 0.31fF
C1833 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/divider_0/clk 0.26fF
C1834 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/tspc_r_1/Z4 0.14fF
C1835 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
C1836 divider_2/tspc_0/Z4 divider_2/nor_0/B 0.02fF
C1837 divbuf_19/OUT2 divbuf_19/OUT 0.06fF
C1838 divider_1/prescaler_0/tspc_2/Z2 divider_1/and_0/OUT 0.05fF
C1839 pd_1/DOWN pd_1/R 0.36fF
C1840 pd_0/UP pd_0/and_pd_0/Out1 0.33fF
C1841 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z3 0.05fF
C1842 divider_2/tspc_0/Z2 divider_2/tspc_0/Z3 0.16fF
C1843 divbuf_22/OUT2 divbuf_22/OUT5 0.02fF
C1844 divbuf_22/OUT3 divbuf_22/OUT4 5.16fF
C1845 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF
C1846 divbuf_13/a_492_n240# divbuf_13/OUT2 0.42fF
C1847 pll_full_1/pd_0/DIV pll_full_1/divider_0/clk 2.26fF
C1848 pll_full_1/divbuf_0/OUT5 pll_full_1/divbuf_0/IN 0.00fF
C1849 pll_full_1/ro_complete_0/a1 pll_full_1/ro_complete_0/cbank_2/v 0.05fF
C1850 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/R 0.27fF
C1851 divider_2/prescaler_0/tspc_1/Q divider_2/nor_0/A 0.03fF
C1852 divider_0/tspc_0/Z2 divider_0/tspc_0/Z3 0.16fF
C1853 divider_0/tspc_0/a_630_n680# divider_0/tspc_1/Q 0.01fF
C1854 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF
C1855 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/Out 0.05fF
C1856 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_1/Z3 0.05fF
C1857 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z4 0.00fF
C1858 pll_full_1/divbuf_0/IN pll_full_1/divider_0/nor_1/B 0.27fF
C1859 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF
C1860 divbuf_3/a_492_n240# divbuf_3/OUT5 0.01fF
C1861 ro_complete_1/a0 ro_complete_1/cbank_1/switch_5/vin 0.09fF
C1862 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/Qbar1 0.12fF
C1863 pll_full_1/pd_0/tspc_r_0/Z1 pll_full_1/pd_0/DIV 0.17fF
C1864 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF
C1865 divider_1/mc2 divider_1/prescaler_0/tspc_2/a_630_n680# 0.33fF
C1866 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF
C1867 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/tspc_0/D 0.04fF
C1868 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_0/B 0.18fF
C1869 divider_1/tspc_0/Z2 divider_1/tspc_1/Q 0.14fF
C1870 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z3 0.16fF
C1871 divider_2/prescaler_0/Out divider_2/nor_0/A 0.15fF
C1872 divider_1/tspc_1/Z2 divider_1/nor_0/A 0.15fF
C1873 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_0/D 0.32fF
C1874 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/clk 0.01fF
C1875 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF
C1876 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF
C1877 divbuf_0/OUT divbuf_0/OUT2 0.06fF
C1878 ro_complete_0/cbank_0/switch_0/vin divbuf_4/OUT 0.12fF
C1879 divbuf_5/OUT ro_complete_0/cbank_0/switch_3/vin 0.09fF
C1880 divbuf_24/IN divbuf_24/OUT5 0.00fF
C1881 ro_complete_1/a2 ro_complete_1/cbank_2/switch_2/vin 0.14fF
C1882 pll_full_0/pd_0/DOWN pll_full_0/pd_0/R 0.36fF
C1883 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/Z4 0.08fF
C1884 divider_0/tspc_1/Q divider_0/tspc_1/a_630_n680# 0.04fF
C1885 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF
C1886 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z4 0.36fF
C1887 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.05fF
C1888 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/clk 0.64fF
C1889 divbuf_4/a_492_n240# divbuf_4/OUT5 0.01fF
C1890 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/v 1.30fF
C1891 pll_full_1/pd_0/REF pll_full_1/pd_0/DOWN 1.48fF
C1892 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/R 0.03fF
C1893 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF
C1894 divider_0/nor_0/A divider_0/tspc_2/Z2 0.23fF
C1895 pll_full_1/pd_0/REF pll_full_1/divbuf_1/OUT5 0.00fF
C1896 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/DOWN 0.12fF
C1897 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF
C1898 pll_full_0/ro_complete_0/a5 pll_full_0/divider_0/clk 0.15fF
C1899 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z2 1.07fF
C1900 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z4 0.12fF
C1901 divbuf_7/OUT3 divbuf_7/OUT5 0.01fF
C1902 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z2 0.01fF
C1903 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/switch_1/vin 0.19fF
C1904 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF
C1905 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/clk 0.26fF
C1906 divider_2/nor_0/Z1 divider_2/and_0/B 0.18fF
C1907 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
C1908 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/a0 0.13fF
C1909 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_0/vin 0.19fF
C1910 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF
C1911 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.65fF
C1912 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/divider_0/clk 1.46fF
C1913 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF
C1914 divider_0/tspc_2/Q divider_0/tspc_1/Z4 0.15fF
C1915 divider_0/tspc_0/Z4 divider_0/nor_1/B 0.22fF
C1916 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF
C1917 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF
C1918 pll_full_1/divider_0/tspc_1/Z4 pll_full_1/divider_0/nor_0/A 0.02fF
C1919 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/DOWN 0.07fF
C1920 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/DIV 0.04fF
C1921 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
C1922 divider_2/Out divider_2/tspc_0/a_630_n680# 0.04fF
C1923 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF
C1924 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_1/Z3 0.05fF
C1925 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF
C1926 pll_full_0/divbuf_0/IN pll_full_0/divider_0/nor_1/B 0.27fF
C1927 divider_1/tspc_2/Q divider_1/tspc_1/Z3 0.45fF
C1928 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z2 0.01fF
C1929 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z4 0.08fF
C1930 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z3 0.05fF
C1931 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Q 0.04fF
C1932 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/Qbar 0.01fF
C1933 divider_2/tspc_2/Q divider_2/nor_0/B 0.22fF
C1934 divbuf_9/OUT2 divbuf_9/OUT5 0.02fF
C1935 divbuf_9/OUT3 divbuf_9/OUT4 5.16fF
C1936 divbuf_2/OUT ro_complete_0/cbank_1/v 0.10fF
C1937 ro_complete_0/cbank_0/switch_5/vin divbuf_7/OUT 0.09fF
C1938 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_0/Z4 0.02fF
C1939 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.00fF
C1940 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/divider_0/clk 1.27fF
C1941 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/REF 0.19fF
C1942 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF
C1943 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z4 0.02fF
C1944 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF
C1945 divbuf_25/a_492_n240# divbuf_25/OUT2 0.42fF
C1946 divider_0/tspc_2/Q divider_0/tspc_2/Z3 0.05fF
C1947 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF
C1948 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z2 1.07fF
C1949 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/tspc_2/Z3 0.38fF
C1950 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z4 0.12fF
C1951 pll_full_0/pd_0/DIV pll_full_0/divider_0/clk 2.26fF
C1952 divbuf_6/OUT4 divbuf_6/OUT5 20.26fF
C1953 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/a_630_n680# 0.19fF
C1954 divbuf_20/OUT3 divbuf_20/OUT 0.26fF
C1955 divbuf_20/OUT4 divbuf_20/OUT5 20.26fF
C1956 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF
C1957 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF
C1958 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/clk 0.64fF
C1959 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/D 0.05fF
C1960 pd_1/tspc_r_0/z5 pd_1/tspc_r_0/Z3 0.11fF
C1961 divbuf_1/OUT5 divbuf_1/a_492_n240# 0.01fF
C1962 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.20fF
C1963 divider_0/tspc_0/Z2 divider_0/tspc_0/Z4 0.36fF
C1964 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z3 0.11fF
C1965 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
C1966 ro_complete_1/cbank_0/v ro_complete_1/cbank_2/v 0.04fF
C1967 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Z4 0.12fF
C1968 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.06fF
C1969 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF
C1970 pd_0/tspc_r_0/Z3 pd_0/DOWN 0.03fF
C1971 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
C1972 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF
C1973 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/divider_0/clk 1.46fF
C1974 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z2 0.16fF
C1975 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z1 0.08fF
C1976 pll_full_0/divider_0/tspc_1/Z4 pll_full_0/divider_0/nor_0/A 0.02fF
C1977 divider_2/tspc_2/Q divider_2/tspc_1/a_630_n680# 0.01fF
C1978 pd_1/tspc_r_1/Z1 pd_1/tspc_r_1/Z2 0.71fF
C1979 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z4 0.20fF
C1980 pd_1/REF pd_1/tspc_r_1/z5 0.04fF
C1981 divbuf_12/OUT2 divbuf_12/OUT 0.06fF
C1982 divbuf_12/OUT3 divbuf_12/OUT5 0.01fF
C1983 divider_2/mc2 divider_2/nor_0/A 0.04fF
C1984 divider_2/nor_0/B divider_2/tspc_1/Z2 0.30fF
C1985 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z2 0.01fF
C1986 divbuf_0/OUT5 divbuf_0/OUT2 0.02fF
C1987 ro_complete_0/cbank_0/switch_1/vin divbuf_3/OUT 0.13fF
C1988 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.09fF
C1989 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF
C1990 divider_2/and_0/out1 divider_2/and_0/B 0.18fF
C1991 divbuf_5/OUT divbuf_5/OUT4 1.11fF
C1992 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/Out 0.21fF
C1993 divider_0/mc2 divider_0/nor_0/A 0.04fF
C1994 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
C1995 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF
C1996 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/clk 0.45fF
C1997 pd_1/DIV pd_1/tspc_r_0/z5 0.04fF
C1998 pll_full_1/divbuf_1/a_492_n240# pll_full_1/divbuf_1/OUT 0.00fF
C1999 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/DIV 0.65fF
C2000 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_0/Z4 0.02fF
C2001 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF
C2002 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/divider_0/clk 1.27fF
C2003 divbuf_17/OUT2 divbuf_17/OUT3 1.37fF
C2004 divider_1/nor_0/B divider_1/tspc_1/Z4 0.21fF
C2005 divider_1/tspc_0/Z3 divider_1/nor_1/B 0.38fF
C2006 divbuf_11/a_492_n240# divbuf_11/OUT5 0.01fF
C2007 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF
C2008 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z3 0.38fF
C2009 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF
C2010 divider_1/nor_0/A divider_1/and_0/B 0.08fF
C2011 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z1 0.09fF
C2012 divbuf_19/OUT divbuf_19/OUT4 1.11fF
C2013 divider_2/and_0/OUT divider_2/prescaler_0/nand_0/z1 0.01fF
C2014 divider_2/nor_0/B divider_2/nor_0/A 1.21fF
C2015 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a5 0.09fF
C2016 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF
C2017 pll_full_1/pd_0/DIV pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.03fF
C2018 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF
C2019 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z2 0.21fF
C2020 divbuf_15/OUT5 divbuf_15/IN 0.00fF
C2021 divbuf_25/OUT3 divbuf_25/OUT4 5.16fF
C2022 divbuf_6/OUT divbuf_6/a_492_n240# 0.00fF
C2023 ro_complete_1/a4 ro_complete_1/cbank_2/switch_0/vin 0.12fF
C2024 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/nor_1/B 0.03fF
C2025 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF
C2026 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Q 0.04fF
C2027 divider_0/prescaler_0/Out divider_0/clk 0.51fF
C2028 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF
C2029 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Q 0.20fF
C2030 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/D 0.09fF
C2031 divider_1/prescaler_0/tspc_0/Z2 divider_1/clk 0.11fF
C2032 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF
C2033 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF
C2034 divbuf_22/OUT3 divbuf_22/OUT 0.26fF
C2035 divbuf_22/OUT4 divbuf_22/OUT5 20.26fF
C2036 divider_2/tspc_2/Q divider_2/tspc_1/Z3 0.45fF
C2037 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z2 0.01fF
C2038 divider_2/tspc_0/Z2 divider_2/tspc_0/a_630_n680# 0.01fF
Xpd_0 vdda1 vssa1 pd_0/REF pd_0/DIV pd_0/UP pd_0/DOWN pd_0/R pd
Xpd_1 vdda1 vssa1 pd_1/REF pd_1/DIV pd_1/UP pd_1/DOWN pd_1/R pd
Xcp_0 cp_0/vbias vdda1 gnd cp_0/out cp_0/down cp_0/upbar cp
Xfilter_0 vssa1 filter_0/v filter
Xro_complete_0 divbuf_7/OUT divbuf_6/OUT divbuf_2/OUT divbuf_4/OUT divbuf_3/OUT divbuf_5/OUT
+ ro_complete
Xdivbuf_0 vdda1 divbuf_0/IN divbuf_0/OUT divbuf_0/OUT2 divbuf_0/OUT3 divbuf_0/OUT4
+ divbuf_0/OUT5 gnd divbuf
Xro_complete_1 ro_complete_1/a0 ro_complete_1/a1 ro_complete_1/a5 ro_complete_1/a4
+ ro_complete_1/a3 ro_complete_1/a2 ro_complete
Xdivbuf_1 vdda1 divbuf_1/IN divbuf_1/OUT divbuf_1/OUT2 divbuf_1/OUT3 divbuf_1/OUT4
+ divbuf_1/OUT5 gnd divbuf
Xdivbuf_2 vdda1 divbuf_2/IN divbuf_2/OUT divbuf_2/OUT2 divbuf_2/OUT3 divbuf_2/OUT4
+ divbuf_2/OUT5 gnd divbuf
Xdivbuf_3 vdda1 divbuf_3/IN divbuf_3/OUT divbuf_3/OUT2 divbuf_3/OUT3 divbuf_3/OUT4
+ divbuf_3/OUT5 gnd divbuf
Xdivbuf_4 vdda1 divbuf_4/IN divbuf_4/OUT divbuf_4/OUT2 divbuf_4/OUT3 divbuf_4/OUT4
+ divbuf_4/OUT5 gnd divbuf
Xdivbuf_5 vdda1 divbuf_5/IN divbuf_5/OUT divbuf_5/OUT2 divbuf_5/OUT3 divbuf_5/OUT4
+ divbuf_5/OUT5 gnd divbuf
Xdivbuf_6 vdda1 divbuf_6/IN divbuf_6/OUT divbuf_6/OUT2 divbuf_6/OUT3 divbuf_6/OUT4
+ divbuf_6/OUT5 gnd divbuf
Xdivbuf_10 vdda1 divbuf_10/IN divbuf_10/OUT divbuf_10/OUT2 divbuf_10/OUT3 divbuf_10/OUT4
+ divbuf_10/OUT5 gnd divbuf
Xdivbuf_20 vdda1 divbuf_20/IN divbuf_20/OUT divbuf_20/OUT2 divbuf_20/OUT3 divbuf_20/OUT4
+ divbuf_20/OUT5 vssa1 divbuf
Xdivbuf_21 vdda1 divbuf_21/IN divbuf_21/OUT divbuf_21/OUT2 divbuf_21/OUT3 divbuf_21/OUT4
+ divbuf_21/OUT5 vssa1 divbuf
Xdivbuf_7 vdda1 divbuf_7/IN divbuf_7/OUT divbuf_7/OUT2 divbuf_7/OUT3 divbuf_7/OUT4
+ divbuf_7/OUT5 gnd divbuf
Xdivbuf_11 vdda1 divbuf_11/IN divbuf_11/OUT divbuf_11/OUT2 divbuf_11/OUT3 divbuf_11/OUT4
+ divbuf_11/OUT5 gnd divbuf
Xdivbuf_22 vdda1 divbuf_22/IN divbuf_22/OUT divbuf_22/OUT2 divbuf_22/OUT3 divbuf_22/OUT4
+ divbuf_22/OUT5 vssa1 divbuf
Xdivbuf_8 vdda1 divbuf_8/IN divbuf_8/OUT divbuf_8/OUT2 divbuf_8/OUT3 divbuf_8/OUT4
+ divbuf_8/OUT5 gnd divbuf
Xdivbuf_12 vdda1 divbuf_12/IN divbuf_12/OUT divbuf_12/OUT2 divbuf_12/OUT3 divbuf_12/OUT4
+ divbuf_12/OUT5 gnd divbuf
Xdivbuf_23 vdda1 divbuf_23/IN divbuf_23/OUT divbuf_23/OUT2 divbuf_23/OUT3 divbuf_23/OUT4
+ divbuf_23/OUT5 vssa1 divbuf
Xdivbuf_9 vdda1 divbuf_9/IN divbuf_9/OUT divbuf_9/OUT2 divbuf_9/OUT3 divbuf_9/OUT4
+ divbuf_9/OUT5 gnd divbuf
Xdivbuf_13 vdda1 divbuf_13/IN divbuf_13/OUT divbuf_13/OUT2 divbuf_13/OUT3 divbuf_13/OUT4
+ divbuf_13/OUT5 gnd divbuf
Xdivbuf_24 vdda1 divbuf_24/IN divbuf_24/OUT divbuf_24/OUT2 divbuf_24/OUT3 divbuf_24/OUT4
+ divbuf_24/OUT5 vssa1 divbuf
Xdivider_0 gnd vdd divider_0/Out divider_0/clk divider_0/mc2 divider
Xdivbuf_14 vdda1 divbuf_14/IN divbuf_14/OUT divbuf_14/OUT2 divbuf_14/OUT3 divbuf_14/OUT4
+ divbuf_14/OUT5 gnd divbuf
Xdivbuf_25 vdda1 divbuf_25/IN filter_0/v divbuf_25/OUT2 divbuf_25/OUT3 divbuf_25/OUT4
+ divbuf_25/OUT5 vssa1 divbuf
Xdivbuf_15 vdda1 divbuf_15/IN divbuf_15/OUT divbuf_15/OUT2 divbuf_15/OUT3 divbuf_15/OUT4
+ divbuf_15/OUT5 gnd divbuf
Xdivider_1 vssa1 vdda1 divider_1/Out divider_1/clk divider_1/mc2 divider
Xdivbuf_16 vdda1 divbuf_16/IN divbuf_16/OUT divbuf_16/OUT2 divbuf_16/OUT3 divbuf_16/OUT4
+ divbuf_16/OUT5 vssa1 divbuf
Xdivider_2 vssa1 vdda1 divider_2/Out divider_2/clk divider_2/mc2 divider
Xdivbuf_17 vdda1 divbuf_17/IN divbuf_17/OUT divbuf_17/OUT2 divbuf_17/OUT3 divbuf_17/OUT4
+ divbuf_17/OUT5 vssa1 divbuf
Xdivbuf_18 vdda1 divbuf_18/IN divbuf_18/OUT divbuf_18/OUT2 divbuf_18/OUT3 divbuf_18/OUT4
+ divbuf_18/OUT5 vssa1 divbuf
Xdivbuf_19 vdda1 divbuf_19/IN divbuf_19/OUT divbuf_19/OUT2 divbuf_19/OUT3 divbuf_19/OUT4
+ divbuf_19/OUT5 vssa1 divbuf
Xpll_full_0 vdda1 pll_full
Xpll_full_1 vdda1 pll_full
C2039 io_analog[4] vssa1 43.96fF
C2040 io_analog[5] vssa1 44.13fF
C2041 io_analog[6] vssa1 43.46fF
C2042 io_in_3v3[0] vssa1 0.61fF
C2043 io_oeb[26] vssa1 0.61fF
C2044 io_in[0] vssa1 0.61fF
C2045 io_out[26] vssa1 0.61fF
C2046 io_out[0] vssa1 0.61fF
C2047 io_in[26] vssa1 0.61fF
C2048 io_oeb[0] vssa1 0.61fF
C2049 io_in_3v3[26] vssa1 0.61fF
C2050 io_in_3v3[1] vssa1 0.61fF
C2051 io_oeb[25] vssa1 0.61fF
C2052 io_in[1] vssa1 0.61fF
C2053 io_out[25] vssa1 0.61fF
C2054 io_out[1] vssa1 0.61fF
C2055 io_in[25] vssa1 0.61fF
C2056 io_oeb[1] vssa1 0.61fF
C2057 io_in_3v3[25] vssa1 0.61fF
C2058 io_in_3v3[2] vssa1 0.61fF
C2059 io_oeb[24] vssa1 0.61fF
C2060 io_in[2] vssa1 0.61fF
C2061 io_out[24] vssa1 0.61fF
C2062 io_out[2] vssa1 0.61fF
C2063 io_in[24] vssa1 0.61fF
C2064 io_oeb[2] vssa1 0.61fF
C2065 io_in_3v3[24] vssa1 0.61fF
C2066 io_in_3v3[3] vssa1 0.61fF
C2067 io_in[3] vssa1 0.61fF
C2068 gpio_noesd[17] vssa1 2.32fF
C2069 gpio_analog[17] vssa1 2.30fF
C2070 io_out[3] vssa1 0.61fF
C2071 io_oeb[3] vssa1 0.61fF
C2072 io_in_3v3[4] vssa1 0.61fF
C2073 io_in[4] vssa1 0.61fF
C2074 io_out[4] vssa1 0.61fF
C2075 io_oeb[4] vssa1 0.61fF
C2076 io_oeb[23] vssa1 0.61fF
C2077 io_out[23] vssa1 0.61fF
C2078 io_in[23] vssa1 0.61fF
C2079 io_in_3v3[23] vssa1 0.61fF
C2080 gpio_noesd[16] vssa1 2.30fF
C2081 gpio_analog[16] vssa1 2.30fF
C2082 io_in_3v3[5] vssa1 0.61fF
C2083 io_in[5] vssa1 0.61fF
C2084 io_out[5] vssa1 0.61fF
C2085 io_oeb[5] vssa1 0.61fF
C2086 io_oeb[22] vssa1 0.61fF
C2087 io_out[22] vssa1 0.61fF
C2088 io_in[22] vssa1 0.61fF
C2089 io_in_3v3[22] vssa1 0.61fF
C2090 gpio_noesd[15] vssa1 2.31fF
C2091 gpio_analog[15] vssa1 2.30fF
C2092 io_in_3v3[6] vssa1 0.61fF
C2093 io_in[6] vssa1 0.61fF
C2094 io_out[6] vssa1 0.61fF
C2095 io_oeb[6] vssa1 0.61fF
C2096 io_oeb[21] vssa1 0.61fF
C2097 io_out[21] vssa1 0.61fF
C2098 io_in[21] vssa1 0.61fF
C2099 io_in_3v3[21] vssa1 0.61fF
C2100 gpio_noesd[14] vssa1 2.30fF
C2101 gpio_analog[14] vssa1 2.29fF
C2102 vssd2 vssa1 38.54fF
C2103 vssd1 vssa1 13.04fF
C2104 vdda2 vssa1 38.30fF
C2105 io_oeb[20] vssa1 0.61fF
C2106 io_out[20] vssa1 0.61fF
C2107 io_in[20] vssa1 0.61fF
C2108 io_in_3v3[20] vssa1 0.61fF
C2109 gpio_noesd[13] vssa1 2.31fF
C2110 gpio_analog[13] vssa1 2.30fF
C2111 gpio_analog[0] vssa1 0.61fF
C2112 gpio_noesd[0] vssa1 0.61fF
C2113 io_in_3v3[7] vssa1 0.61fF
C2114 io_in[7] vssa1 0.61fF
C2115 io_out[7] vssa1 0.61fF
C2116 io_oeb[7] vssa1 0.61fF
C2117 io_oeb[19] vssa1 0.61fF
C2118 io_out[19] vssa1 0.61fF
C2119 io_in[19] vssa1 0.61fF
C2120 io_in_3v3[19] vssa1 0.61fF
C2121 gpio_noesd[12] vssa1 2.32fF
C2122 gpio_analog[12] vssa1 2.30fF
C2123 gpio_analog[1] vssa1 0.61fF
C2124 gpio_noesd[1] vssa1 0.61fF
C2125 io_in_3v3[8] vssa1 0.61fF
C2126 io_in[8] vssa1 0.61fF
C2127 io_out[8] vssa1 0.61fF
C2128 io_oeb[8] vssa1 0.61fF
C2129 io_oeb[18] vssa1 0.61fF
C2130 io_out[18] vssa1 0.61fF
C2131 io_in[18] vssa1 0.61fF
C2132 io_in_3v3[18] vssa1 0.61fF
C2133 gpio_noesd[11] vssa1 2.30fF
C2134 gpio_analog[11] vssa1 2.29fF
C2135 gpio_analog[2] vssa1 0.61fF
C2136 gpio_noesd[2] vssa1 0.61fF
C2137 io_in_3v3[9] vssa1 0.61fF
C2138 io_in[9] vssa1 0.61fF
C2139 io_out[9] vssa1 0.61fF
C2140 io_oeb[9] vssa1 0.61fF
C2141 io_oeb[17] vssa1 0.61fF
C2142 io_out[17] vssa1 0.61fF
C2143 io_in[17] vssa1 0.61fF
C2144 io_in_3v3[17] vssa1 0.61fF
C2145 gpio_noesd[10] vssa1 2.31fF
C2146 gpio_analog[10] vssa1 2.29fF
C2147 gpio_analog[3] vssa1 0.61fF
C2148 gpio_noesd[3] vssa1 0.61fF
C2149 io_in_3v3[10] vssa1 0.61fF
C2150 io_in[10] vssa1 0.61fF
C2151 io_out[10] vssa1 0.61fF
C2152 io_oeb[10] vssa1 0.61fF
C2153 io_oeb[16] vssa1 0.61fF
C2154 io_out[16] vssa1 0.61fF
C2155 io_in[16] vssa1 0.61fF
C2156 io_in_3v3[16] vssa1 0.61fF
C2157 gpio_noesd[9] vssa1 2.28fF
C2158 gpio_analog[9] vssa1 2.28fF
C2159 gpio_analog[4] vssa1 0.61fF
C2160 gpio_noesd[4] vssa1 0.61fF
C2161 io_in_3v3[11] vssa1 0.61fF
C2162 io_in[11] vssa1 0.61fF
C2163 io_out[11] vssa1 0.61fF
C2164 io_oeb[11] vssa1 0.61fF
C2165 io_oeb[15] vssa1 0.61fF
C2166 io_out[15] vssa1 0.61fF
C2167 io_in[15] vssa1 0.61fF
C2168 io_in_3v3[15] vssa1 0.61fF
C2169 gpio_noesd[8] vssa1 2.28fF
C2170 gpio_analog[8] vssa1 2.26fF
C2171 gpio_analog[5] vssa1 0.61fF
C2172 gpio_noesd[5] vssa1 0.61fF
C2173 io_in_3v3[12] vssa1 0.61fF
C2174 io_in[12] vssa1 0.61fF
C2175 io_out[12] vssa1 0.61fF
C2176 io_oeb[12] vssa1 0.61fF
C2177 io_oeb[14] vssa1 0.61fF
C2178 io_out[14] vssa1 0.61fF
C2179 io_in[14] vssa1 0.61fF
C2180 io_in_3v3[14] vssa1 0.61fF
C2181 gpio_noesd[7] vssa1 2.30fF
C2182 gpio_analog[7] vssa1 2.28fF
C2183 vssa2 vssa1 38.35fF
C2184 gpio_analog[6] vssa1 5.71fF
C2185 gpio_noesd[6] vssa1 5.70fF
C2186 io_in_3v3[13] vssa1 0.61fF
C2187 io_in[13] vssa1 0.61fF
C2188 io_out[13] vssa1 0.61fF
C2189 io_oeb[13] vssa1 0.61fF
C2190 vccd1 vssa1 39.84fF
C2191 vccd2 vssa1 38.46fF
C2192 io_analog[0] vssa1 19.99fF
C2193 io_analog[10] vssa1 19.36fF
C2194 io_analog[1] vssa1 13.17fF
C2195 io_analog[2] vssa1 12.57fF
C2196 io_analog[3] vssa1 12.83fF
C2197 io_clamp_high[0] vssa1 3.58fF
C2198 io_clamp_low[0] vssa1 3.58fF
C2199 io_clamp_high[1] vssa1 3.58fF
C2200 io_clamp_low[1] vssa1 3.58fF
C2201 io_clamp_high[2] vssa1 3.58fF
C2202 io_clamp_low[2] vssa1 3.58fF
C2203 io_analog[7] vssa1 12.74fF
C2204 io_analog[8] vssa1 13.08fF
C2205 io_analog[9] vssa1 13.08fF
C2206 user_irq[2] vssa1 0.63fF
C2207 user_irq[1] vssa1 0.63fF
C2208 user_irq[0] vssa1 0.63fF
C2209 user_clock2 vssa1 0.63fF
C2210 la_oenb[127] vssa1 0.63fF
C2211 la_data_out[127] vssa1 0.63fF
C2212 la_data_in[127] vssa1 0.63fF
C2213 la_oenb[126] vssa1 0.63fF
C2214 la_data_out[126] vssa1 0.63fF
C2215 la_data_in[126] vssa1 0.63fF
C2216 la_oenb[125] vssa1 0.63fF
C2217 la_data_out[125] vssa1 0.63fF
C2218 la_data_in[125] vssa1 0.63fF
C2219 la_oenb[124] vssa1 0.63fF
C2220 la_data_out[124] vssa1 0.63fF
C2221 la_data_in[124] vssa1 0.63fF
C2222 la_oenb[123] vssa1 0.63fF
C2223 la_data_out[123] vssa1 0.63fF
C2224 la_data_in[123] vssa1 0.63fF
C2225 la_oenb[122] vssa1 0.63fF
C2226 la_data_out[122] vssa1 0.63fF
C2227 la_data_in[122] vssa1 0.63fF
C2228 la_oenb[121] vssa1 0.63fF
C2229 la_data_out[121] vssa1 0.63fF
C2230 la_data_in[121] vssa1 0.63fF
C2231 la_oenb[120] vssa1 0.63fF
C2232 la_data_out[120] vssa1 0.63fF
C2233 la_data_in[120] vssa1 0.63fF
C2234 la_oenb[119] vssa1 0.63fF
C2235 la_data_out[119] vssa1 0.63fF
C2236 la_data_in[119] vssa1 0.63fF
C2237 la_oenb[118] vssa1 0.63fF
C2238 la_data_out[118] vssa1 0.63fF
C2239 la_data_in[118] vssa1 0.63fF
C2240 la_oenb[117] vssa1 0.63fF
C2241 la_data_out[117] vssa1 0.63fF
C2242 la_data_in[117] vssa1 0.63fF
C2243 la_oenb[116] vssa1 0.63fF
C2244 la_data_out[116] vssa1 0.63fF
C2245 la_data_in[116] vssa1 0.63fF
C2246 la_oenb[115] vssa1 0.63fF
C2247 la_data_out[115] vssa1 0.63fF
C2248 la_data_in[115] vssa1 0.63fF
C2249 la_oenb[114] vssa1 0.63fF
C2250 la_data_out[114] vssa1 0.63fF
C2251 la_data_in[114] vssa1 0.63fF
C2252 la_oenb[113] vssa1 0.63fF
C2253 la_data_out[113] vssa1 0.63fF
C2254 la_data_in[113] vssa1 0.63fF
C2255 la_oenb[112] vssa1 0.63fF
C2256 la_data_out[112] vssa1 0.63fF
C2257 la_data_in[112] vssa1 0.63fF
C2258 la_oenb[111] vssa1 0.63fF
C2259 la_data_out[111] vssa1 0.63fF
C2260 la_data_in[111] vssa1 0.63fF
C2261 la_oenb[110] vssa1 0.63fF
C2262 la_data_out[110] vssa1 0.63fF
C2263 la_data_in[110] vssa1 0.63fF
C2264 la_oenb[109] vssa1 0.63fF
C2265 la_data_out[109] vssa1 0.63fF
C2266 la_data_in[109] vssa1 0.63fF
C2267 la_oenb[108] vssa1 0.63fF
C2268 la_data_out[108] vssa1 0.63fF
C2269 la_data_in[108] vssa1 0.63fF
C2270 la_oenb[107] vssa1 0.63fF
C2271 la_data_out[107] vssa1 0.63fF
C2272 la_data_in[107] vssa1 0.63fF
C2273 la_oenb[106] vssa1 0.63fF
C2274 la_data_out[106] vssa1 0.63fF
C2275 la_data_in[106] vssa1 0.63fF
C2276 la_oenb[105] vssa1 0.63fF
C2277 la_data_out[105] vssa1 0.63fF
C2278 la_data_in[105] vssa1 0.63fF
C2279 la_oenb[104] vssa1 0.63fF
C2280 la_data_out[104] vssa1 0.63fF
C2281 la_data_in[104] vssa1 0.63fF
C2282 la_oenb[103] vssa1 0.63fF
C2283 la_data_out[103] vssa1 0.63fF
C2284 la_data_in[103] vssa1 0.63fF
C2285 la_oenb[102] vssa1 0.63fF
C2286 la_data_out[102] vssa1 0.63fF
C2287 la_data_in[102] vssa1 0.63fF
C2288 la_oenb[101] vssa1 0.63fF
C2289 la_data_out[101] vssa1 0.63fF
C2290 la_data_in[101] vssa1 0.63fF
C2291 la_oenb[100] vssa1 0.63fF
C2292 la_data_out[100] vssa1 0.63fF
C2293 la_data_in[100] vssa1 0.63fF
C2294 la_oenb[99] vssa1 0.63fF
C2295 la_data_out[99] vssa1 0.63fF
C2296 la_data_in[99] vssa1 0.63fF
C2297 la_oenb[98] vssa1 0.63fF
C2298 la_data_out[98] vssa1 0.63fF
C2299 la_data_in[98] vssa1 0.63fF
C2300 la_oenb[97] vssa1 0.63fF
C2301 la_data_out[97] vssa1 0.63fF
C2302 la_data_in[97] vssa1 0.63fF
C2303 la_oenb[96] vssa1 0.63fF
C2304 la_data_out[96] vssa1 0.63fF
C2305 la_data_in[96] vssa1 0.63fF
C2306 la_oenb[95] vssa1 0.63fF
C2307 la_data_out[95] vssa1 0.63fF
C2308 la_data_in[95] vssa1 0.63fF
C2309 la_oenb[94] vssa1 0.63fF
C2310 la_data_out[94] vssa1 0.63fF
C2311 la_data_in[94] vssa1 0.63fF
C2312 la_oenb[93] vssa1 0.63fF
C2313 la_data_out[93] vssa1 0.63fF
C2314 la_data_in[93] vssa1 0.63fF
C2315 la_oenb[92] vssa1 0.63fF
C2316 la_data_out[92] vssa1 0.63fF
C2317 la_data_in[92] vssa1 0.63fF
C2318 la_oenb[91] vssa1 0.63fF
C2319 la_data_out[91] vssa1 0.63fF
C2320 la_data_in[91] vssa1 0.63fF
C2321 la_oenb[90] vssa1 0.63fF
C2322 la_data_out[90] vssa1 0.63fF
C2323 la_data_in[90] vssa1 0.63fF
C2324 la_oenb[89] vssa1 0.63fF
C2325 la_data_out[89] vssa1 0.63fF
C2326 la_data_in[89] vssa1 0.63fF
C2327 la_oenb[88] vssa1 0.63fF
C2328 la_data_out[88] vssa1 0.63fF
C2329 la_data_in[88] vssa1 0.63fF
C2330 la_oenb[87] vssa1 0.63fF
C2331 la_data_out[87] vssa1 0.63fF
C2332 la_data_in[87] vssa1 0.63fF
C2333 la_oenb[86] vssa1 0.63fF
C2334 la_data_out[86] vssa1 0.63fF
C2335 la_data_in[86] vssa1 0.63fF
C2336 la_oenb[85] vssa1 0.63fF
C2337 la_data_out[85] vssa1 0.63fF
C2338 la_data_in[85] vssa1 0.63fF
C2339 la_oenb[84] vssa1 0.63fF
C2340 la_data_out[84] vssa1 0.63fF
C2341 la_data_in[84] vssa1 0.63fF
C2342 la_oenb[83] vssa1 0.63fF
C2343 la_data_out[83] vssa1 0.63fF
C2344 la_data_in[83] vssa1 0.63fF
C2345 la_oenb[82] vssa1 0.63fF
C2346 la_data_out[82] vssa1 0.63fF
C2347 la_data_in[82] vssa1 0.63fF
C2348 la_oenb[81] vssa1 0.63fF
C2349 la_data_out[81] vssa1 0.63fF
C2350 la_data_in[81] vssa1 0.63fF
C2351 la_oenb[80] vssa1 0.63fF
C2352 la_data_out[80] vssa1 0.63fF
C2353 la_data_in[80] vssa1 0.63fF
C2354 la_oenb[79] vssa1 0.63fF
C2355 la_data_out[79] vssa1 0.63fF
C2356 la_data_in[79] vssa1 0.63fF
C2357 la_oenb[78] vssa1 0.63fF
C2358 la_data_out[78] vssa1 0.63fF
C2359 la_data_in[78] vssa1 0.63fF
C2360 la_oenb[77] vssa1 0.63fF
C2361 la_data_out[77] vssa1 0.63fF
C2362 la_data_in[77] vssa1 0.63fF
C2363 la_oenb[76] vssa1 0.63fF
C2364 la_data_out[76] vssa1 0.63fF
C2365 la_data_in[76] vssa1 0.63fF
C2366 la_oenb[75] vssa1 0.63fF
C2367 la_data_out[75] vssa1 0.63fF
C2368 la_data_in[75] vssa1 0.63fF
C2369 la_oenb[74] vssa1 0.63fF
C2370 la_data_out[74] vssa1 0.63fF
C2371 la_data_in[74] vssa1 0.63fF
C2372 la_oenb[73] vssa1 0.63fF
C2373 la_data_out[73] vssa1 0.63fF
C2374 la_data_in[73] vssa1 0.63fF
C2375 la_oenb[72] vssa1 0.63fF
C2376 la_data_out[72] vssa1 0.63fF
C2377 la_data_in[72] vssa1 0.63fF
C2378 la_oenb[71] vssa1 0.63fF
C2379 la_data_out[71] vssa1 0.63fF
C2380 la_data_in[71] vssa1 0.63fF
C2381 la_oenb[70] vssa1 0.63fF
C2382 la_data_out[70] vssa1 0.63fF
C2383 la_data_in[70] vssa1 0.63fF
C2384 la_oenb[69] vssa1 0.63fF
C2385 la_data_out[69] vssa1 0.63fF
C2386 la_data_in[69] vssa1 0.63fF
C2387 la_oenb[68] vssa1 0.63fF
C2388 la_data_out[68] vssa1 0.63fF
C2389 la_data_in[68] vssa1 0.63fF
C2390 la_oenb[67] vssa1 0.63fF
C2391 la_data_out[67] vssa1 0.63fF
C2392 la_data_in[67] vssa1 0.63fF
C2393 la_oenb[66] vssa1 0.63fF
C2394 la_data_out[66] vssa1 0.63fF
C2395 la_data_in[66] vssa1 0.63fF
C2396 la_oenb[65] vssa1 0.63fF
C2397 la_data_out[65] vssa1 0.63fF
C2398 la_data_in[65] vssa1 0.63fF
C2399 la_oenb[64] vssa1 0.63fF
C2400 la_data_out[64] vssa1 0.63fF
C2401 la_data_in[64] vssa1 0.63fF
C2402 la_oenb[63] vssa1 0.63fF
C2403 la_data_out[63] vssa1 0.63fF
C2404 la_data_in[63] vssa1 0.63fF
C2405 la_oenb[62] vssa1 0.63fF
C2406 la_data_out[62] vssa1 0.63fF
C2407 la_data_in[62] vssa1 0.63fF
C2408 la_oenb[61] vssa1 0.63fF
C2409 la_data_out[61] vssa1 0.63fF
C2410 la_data_in[61] vssa1 0.63fF
C2411 la_oenb[60] vssa1 0.63fF
C2412 la_data_out[60] vssa1 0.63fF
C2413 la_data_in[60] vssa1 0.63fF
C2414 la_oenb[59] vssa1 0.63fF
C2415 la_data_out[59] vssa1 0.63fF
C2416 la_data_in[59] vssa1 0.63fF
C2417 la_oenb[58] vssa1 0.63fF
C2418 la_data_out[58] vssa1 0.63fF
C2419 la_data_in[58] vssa1 0.63fF
C2420 la_oenb[57] vssa1 0.63fF
C2421 la_data_out[57] vssa1 0.63fF
C2422 la_data_in[57] vssa1 0.63fF
C2423 la_oenb[56] vssa1 0.63fF
C2424 la_data_out[56] vssa1 0.63fF
C2425 la_data_in[56] vssa1 0.63fF
C2426 la_oenb[55] vssa1 0.63fF
C2427 la_data_out[55] vssa1 0.63fF
C2428 la_data_in[55] vssa1 0.63fF
C2429 la_oenb[54] vssa1 0.63fF
C2430 la_data_out[54] vssa1 0.63fF
C2431 la_data_in[54] vssa1 0.63fF
C2432 la_oenb[53] vssa1 0.63fF
C2433 la_data_out[53] vssa1 0.63fF
C2434 la_data_in[53] vssa1 0.63fF
C2435 la_oenb[52] vssa1 0.63fF
C2436 la_data_out[52] vssa1 0.63fF
C2437 la_data_in[52] vssa1 0.63fF
C2438 la_oenb[51] vssa1 0.63fF
C2439 la_data_out[51] vssa1 0.63fF
C2440 la_data_in[51] vssa1 0.63fF
C2441 la_oenb[50] vssa1 0.63fF
C2442 la_data_out[50] vssa1 0.63fF
C2443 la_data_in[50] vssa1 0.63fF
C2444 la_oenb[49] vssa1 0.63fF
C2445 la_data_out[49] vssa1 0.63fF
C2446 la_data_in[49] vssa1 0.63fF
C2447 la_oenb[48] vssa1 0.63fF
C2448 la_data_out[48] vssa1 0.63fF
C2449 la_data_in[48] vssa1 0.63fF
C2450 la_oenb[47] vssa1 0.63fF
C2451 la_data_out[47] vssa1 0.63fF
C2452 la_data_in[47] vssa1 0.63fF
C2453 la_oenb[46] vssa1 0.63fF
C2454 la_data_out[46] vssa1 0.63fF
C2455 la_data_in[46] vssa1 0.63fF
C2456 la_oenb[45] vssa1 0.63fF
C2457 la_data_out[45] vssa1 0.63fF
C2458 la_data_in[45] vssa1 0.63fF
C2459 la_oenb[44] vssa1 0.63fF
C2460 la_data_out[44] vssa1 0.63fF
C2461 la_data_in[44] vssa1 0.63fF
C2462 la_oenb[43] vssa1 0.63fF
C2463 la_data_out[43] vssa1 0.63fF
C2464 la_data_in[43] vssa1 0.63fF
C2465 la_oenb[42] vssa1 0.63fF
C2466 la_data_out[42] vssa1 0.63fF
C2467 la_data_in[42] vssa1 0.63fF
C2468 la_oenb[41] vssa1 0.63fF
C2469 la_data_out[41] vssa1 0.63fF
C2470 la_data_in[41] vssa1 0.63fF
C2471 la_oenb[40] vssa1 0.63fF
C2472 la_data_out[40] vssa1 0.63fF
C2473 la_data_in[40] vssa1 0.63fF
C2474 la_oenb[39] vssa1 0.63fF
C2475 la_data_out[39] vssa1 0.63fF
C2476 la_data_in[39] vssa1 0.63fF
C2477 la_oenb[38] vssa1 0.63fF
C2478 la_data_out[38] vssa1 0.63fF
C2479 la_data_in[38] vssa1 0.63fF
C2480 la_oenb[37] vssa1 0.63fF
C2481 la_data_out[37] vssa1 0.63fF
C2482 la_data_in[37] vssa1 0.63fF
C2483 la_oenb[36] vssa1 0.63fF
C2484 la_data_out[36] vssa1 0.63fF
C2485 la_data_in[36] vssa1 0.63fF
C2486 la_oenb[35] vssa1 0.63fF
C2487 la_data_out[35] vssa1 0.63fF
C2488 la_data_in[35] vssa1 0.63fF
C2489 la_oenb[34] vssa1 0.63fF
C2490 la_data_out[34] vssa1 0.63fF
C2491 la_data_in[34] vssa1 0.63fF
C2492 la_oenb[33] vssa1 0.63fF
C2493 la_data_out[33] vssa1 0.63fF
C2494 la_data_in[33] vssa1 0.63fF
C2495 la_oenb[32] vssa1 0.63fF
C2496 la_data_out[32] vssa1 0.63fF
C2497 la_data_in[32] vssa1 0.63fF
C2498 la_oenb[31] vssa1 0.63fF
C2499 la_data_out[31] vssa1 0.63fF
C2500 la_data_in[31] vssa1 0.63fF
C2501 la_oenb[30] vssa1 0.63fF
C2502 la_data_out[30] vssa1 0.63fF
C2503 la_data_in[30] vssa1 0.63fF
C2504 la_oenb[29] vssa1 0.63fF
C2505 la_data_out[29] vssa1 0.63fF
C2506 la_data_in[29] vssa1 0.63fF
C2507 la_oenb[28] vssa1 0.63fF
C2508 la_data_out[28] vssa1 0.63fF
C2509 la_data_in[28] vssa1 0.63fF
C2510 la_oenb[27] vssa1 0.63fF
C2511 la_data_out[27] vssa1 0.63fF
C2512 la_data_in[27] vssa1 0.63fF
C2513 la_oenb[26] vssa1 0.63fF
C2514 la_data_out[26] vssa1 0.63fF
C2515 la_data_in[26] vssa1 0.63fF
C2516 la_oenb[25] vssa1 0.63fF
C2517 la_data_out[25] vssa1 0.63fF
C2518 la_data_in[25] vssa1 0.63fF
C2519 la_oenb[24] vssa1 0.63fF
C2520 la_data_out[24] vssa1 0.63fF
C2521 la_data_in[24] vssa1 0.63fF
C2522 la_oenb[23] vssa1 0.63fF
C2523 la_data_out[23] vssa1 0.63fF
C2524 la_data_in[23] vssa1 0.63fF
C2525 la_oenb[22] vssa1 0.63fF
C2526 la_data_out[22] vssa1 0.63fF
C2527 la_data_in[22] vssa1 0.63fF
C2528 la_oenb[21] vssa1 0.63fF
C2529 la_data_out[21] vssa1 0.63fF
C2530 la_data_in[21] vssa1 0.63fF
C2531 la_oenb[20] vssa1 0.63fF
C2532 la_data_out[20] vssa1 0.63fF
C2533 la_data_in[20] vssa1 0.63fF
C2534 la_oenb[19] vssa1 0.63fF
C2535 la_data_out[19] vssa1 0.63fF
C2536 la_data_in[19] vssa1 0.63fF
C2537 la_oenb[18] vssa1 0.63fF
C2538 la_data_out[18] vssa1 0.63fF
C2539 la_data_in[18] vssa1 0.63fF
C2540 la_oenb[17] vssa1 0.63fF
C2541 la_data_out[17] vssa1 0.63fF
C2542 la_data_in[17] vssa1 0.63fF
C2543 la_oenb[16] vssa1 0.63fF
C2544 la_data_out[16] vssa1 0.63fF
C2545 la_data_in[16] vssa1 0.63fF
C2546 la_oenb[15] vssa1 0.63fF
C2547 la_data_out[15] vssa1 0.63fF
C2548 la_data_in[15] vssa1 0.63fF
C2549 la_oenb[14] vssa1 0.63fF
C2550 la_data_out[14] vssa1 0.63fF
C2551 la_data_in[14] vssa1 0.63fF
C2552 la_oenb[13] vssa1 0.63fF
C2553 la_data_out[13] vssa1 0.63fF
C2554 la_data_in[13] vssa1 0.63fF
C2555 la_oenb[12] vssa1 0.63fF
C2556 la_data_out[12] vssa1 0.63fF
C2557 la_data_in[12] vssa1 0.63fF
C2558 la_oenb[11] vssa1 0.63fF
C2559 la_data_out[11] vssa1 0.63fF
C2560 la_data_in[11] vssa1 0.63fF
C2561 la_oenb[10] vssa1 0.63fF
C2562 la_data_out[10] vssa1 0.63fF
C2563 la_data_in[10] vssa1 0.63fF
C2564 la_oenb[9] vssa1 0.63fF
C2565 la_data_out[9] vssa1 0.63fF
C2566 la_data_in[9] vssa1 0.63fF
C2567 la_oenb[8] vssa1 0.63fF
C2568 la_data_out[8] vssa1 0.63fF
C2569 la_data_in[8] vssa1 0.63fF
C2570 la_oenb[7] vssa1 0.63fF
C2571 la_data_out[7] vssa1 0.63fF
C2572 la_data_in[7] vssa1 0.63fF
C2573 la_oenb[6] vssa1 0.63fF
C2574 la_data_out[6] vssa1 0.63fF
C2575 la_data_in[6] vssa1 0.63fF
C2576 la_oenb[5] vssa1 0.63fF
C2577 la_data_out[5] vssa1 0.63fF
C2578 la_data_in[5] vssa1 0.63fF
C2579 la_oenb[4] vssa1 0.63fF
C2580 la_data_out[4] vssa1 0.63fF
C2581 la_data_in[4] vssa1 0.63fF
C2582 la_oenb[3] vssa1 0.63fF
C2583 la_data_out[3] vssa1 0.63fF
C2584 la_data_in[3] vssa1 0.63fF
C2585 la_oenb[2] vssa1 0.63fF
C2586 la_data_out[2] vssa1 0.63fF
C2587 la_data_in[2] vssa1 0.63fF
C2588 la_oenb[1] vssa1 0.63fF
C2589 la_data_out[1] vssa1 0.63fF
C2590 la_data_in[1] vssa1 0.63fF
C2591 la_oenb[0] vssa1 0.63fF
C2592 la_data_out[0] vssa1 0.63fF
C2593 la_data_in[0] vssa1 0.63fF
C2594 wbs_dat_o[31] vssa1 0.63fF
C2595 wbs_dat_i[31] vssa1 0.63fF
C2596 wbs_adr_i[31] vssa1 0.63fF
C2597 wbs_dat_o[30] vssa1 0.63fF
C2598 wbs_dat_i[30] vssa1 0.63fF
C2599 wbs_adr_i[30] vssa1 0.63fF
C2600 wbs_dat_o[29] vssa1 0.63fF
C2601 wbs_dat_i[29] vssa1 0.63fF
C2602 wbs_adr_i[29] vssa1 0.63fF
C2603 wbs_dat_o[28] vssa1 0.63fF
C2604 wbs_dat_i[28] vssa1 0.63fF
C2605 wbs_adr_i[28] vssa1 0.63fF
C2606 wbs_dat_o[27] vssa1 0.63fF
C2607 wbs_dat_i[27] vssa1 0.63fF
C2608 wbs_adr_i[27] vssa1 0.63fF
C2609 wbs_dat_o[26] vssa1 0.63fF
C2610 wbs_dat_i[26] vssa1 0.63fF
C2611 wbs_adr_i[26] vssa1 0.63fF
C2612 wbs_dat_o[25] vssa1 0.63fF
C2613 wbs_dat_i[25] vssa1 0.63fF
C2614 wbs_adr_i[25] vssa1 0.63fF
C2615 wbs_dat_o[24] vssa1 0.63fF
C2616 wbs_dat_i[24] vssa1 0.63fF
C2617 wbs_adr_i[24] vssa1 0.63fF
C2618 wbs_dat_o[23] vssa1 0.63fF
C2619 wbs_dat_i[23] vssa1 0.63fF
C2620 wbs_adr_i[23] vssa1 0.63fF
C2621 wbs_dat_o[22] vssa1 0.63fF
C2622 wbs_dat_i[22] vssa1 0.63fF
C2623 wbs_adr_i[22] vssa1 0.63fF
C2624 wbs_dat_o[21] vssa1 0.63fF
C2625 wbs_dat_i[21] vssa1 0.63fF
C2626 wbs_adr_i[21] vssa1 0.63fF
C2627 wbs_dat_o[20] vssa1 0.63fF
C2628 wbs_dat_i[20] vssa1 0.63fF
C2629 wbs_adr_i[20] vssa1 0.63fF
C2630 wbs_dat_o[19] vssa1 0.63fF
C2631 wbs_dat_i[19] vssa1 0.63fF
C2632 wbs_adr_i[19] vssa1 0.63fF
C2633 wbs_dat_o[18] vssa1 0.63fF
C2634 wbs_dat_i[18] vssa1 0.63fF
C2635 wbs_adr_i[18] vssa1 0.63fF
C2636 wbs_dat_o[17] vssa1 0.63fF
C2637 wbs_dat_i[17] vssa1 0.63fF
C2638 wbs_adr_i[17] vssa1 0.63fF
C2639 wbs_dat_o[16] vssa1 0.63fF
C2640 wbs_dat_i[16] vssa1 0.63fF
C2641 wbs_adr_i[16] vssa1 0.63fF
C2642 wbs_dat_o[15] vssa1 0.63fF
C2643 wbs_dat_i[15] vssa1 0.63fF
C2644 wbs_adr_i[15] vssa1 0.63fF
C2645 wbs_dat_o[14] vssa1 0.63fF
C2646 wbs_dat_i[14] vssa1 0.63fF
C2647 wbs_adr_i[14] vssa1 0.63fF
C2648 wbs_dat_o[13] vssa1 0.63fF
C2649 wbs_dat_i[13] vssa1 0.63fF
C2650 wbs_adr_i[13] vssa1 0.63fF
C2651 wbs_dat_o[12] vssa1 0.63fF
C2652 wbs_dat_i[12] vssa1 0.63fF
C2653 wbs_adr_i[12] vssa1 0.63fF
C2654 wbs_dat_o[11] vssa1 0.63fF
C2655 wbs_dat_i[11] vssa1 0.63fF
C2656 wbs_adr_i[11] vssa1 0.63fF
C2657 wbs_dat_o[10] vssa1 0.63fF
C2658 wbs_dat_i[10] vssa1 0.63fF
C2659 wbs_adr_i[10] vssa1 0.63fF
C2660 wbs_dat_o[9] vssa1 0.63fF
C2661 wbs_dat_i[9] vssa1 0.63fF
C2662 wbs_adr_i[9] vssa1 0.63fF
C2663 wbs_dat_o[8] vssa1 0.63fF
C2664 wbs_dat_i[8] vssa1 0.63fF
C2665 wbs_adr_i[8] vssa1 0.63fF
C2666 wbs_dat_o[7] vssa1 0.63fF
C2667 wbs_dat_i[7] vssa1 0.63fF
C2668 wbs_adr_i[7] vssa1 0.63fF
C2669 wbs_dat_o[6] vssa1 0.63fF
C2670 wbs_dat_i[6] vssa1 0.63fF
C2671 wbs_adr_i[6] vssa1 0.63fF
C2672 wbs_dat_o[5] vssa1 0.63fF
C2673 wbs_dat_i[5] vssa1 0.63fF
C2674 wbs_adr_i[5] vssa1 0.63fF
C2675 wbs_dat_o[4] vssa1 0.63fF
C2676 wbs_dat_i[4] vssa1 0.63fF
C2677 wbs_adr_i[4] vssa1 0.63fF
C2678 wbs_sel_i[3] vssa1 0.63fF
C2679 wbs_dat_o[3] vssa1 0.63fF
C2680 wbs_dat_i[3] vssa1 0.63fF
C2681 wbs_adr_i[3] vssa1 0.63fF
C2682 wbs_sel_i[2] vssa1 0.63fF
C2683 wbs_dat_o[2] vssa1 0.63fF
C2684 wbs_dat_i[2] vssa1 0.63fF
C2685 wbs_adr_i[2] vssa1 0.63fF
C2686 wbs_sel_i[1] vssa1 0.63fF
C2687 wbs_dat_o[1] vssa1 0.63fF
C2688 wbs_dat_i[1] vssa1 0.63fF
C2689 wbs_adr_i[1] vssa1 0.63fF
C2690 wbs_sel_i[0] vssa1 0.63fF
C2691 wbs_dat_o[0] vssa1 0.63fF
C2692 wbs_dat_i[0] vssa1 0.63fF
C2693 wbs_adr_i[0] vssa1 0.63fF
C2694 wbs_we_i vssa1 0.63fF
C2695 wbs_stb_i vssa1 0.63fF
C2696 wbs_cyc_i vssa1 0.63fF
C2697 wbs_ack_o vssa1 0.63fF
C2698 wb_rst_i vssa1 0.63fF
C2699 wb_clk_i vssa1 0.63fF
C2700 m2_494098_659718# vssa1 0.80fF **FLOATING
C2701 pll_full_1/divider_0/and_0/Z1 vssa1 0.65fF
C2702 pll_full_1/divider_0/and_0/B vssa1 2.45fF
C2703 pll_full_1/divider_0/and_0/A vssa1 2.35fF
C2704 pll_full_1/divider_0/and_0/out1 vssa1 2.99fF
C2705 pll_full_1/divider_0/tspc_2/Z4 vssa1 0.86fF
C2706 pll_full_1/divider_0/tspc_2/Z3 vssa1 2.26fF
C2707 pll_full_1/divider_0/tspc_2/Z2 vssa1 1.46fF
C2708 pll_full_1/divider_0/tspc_2/Z1 vssa1 0.99fF
C2709 pll_full_1/divider_0/nor_0/A vssa1 7.08fF
C2710 pll_full_1/divider_0/tspc_2/a_630_n680# vssa1 1.15fF **FLOATING
C2711 pll_full_1/divider_0/tspc_1/Z4 vssa1 0.86fF
C2712 pll_full_1/divider_0/tspc_1/Z3 vssa1 2.26fF
C2713 pll_full_1/divider_0/tspc_1/Z2 vssa1 1.46fF
C2714 pll_full_1/divider_0/tspc_1/Z1 vssa1 0.99fF
C2715 pll_full_1/divider_0/nor_0/B vssa1 7.12fF
C2716 pll_full_1/divider_0/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING
C2717 pll_full_1/divider_0/tspc_2/Q vssa1 3.14fF
C2718 pll_full_1/divider_0/tspc_0/Z4 vssa1 0.86fF
C2719 pll_full_1/divbuf_0/IN vssa1 9.89fF
C2720 pll_full_1/divider_0/tspc_0/Z3 vssa1 2.26fF
C2721 pll_full_1/divider_0/tspc_0/Z2 vssa1 1.46fF
C2722 pll_full_1/divider_0/tspc_0/Z1 vssa1 0.99fF
C2723 pll_full_1/divider_0/nor_1/B vssa1 6.48fF
C2724 pll_full_1/divider_0/tspc_0/a_630_n680# vssa1 1.14fF **FLOATING
C2725 pll_full_1/divider_0/tspc_1/Q vssa1 3.12fF
C2726 pll_full_1/divider_0/clk vssa1 33.42fF
C2727 pll_full_1/divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF
C2728 pll_full_1/divider_0/prescaler_0/tspc_0/D vssa1 2.64fF
C2729 pll_full_1/divider_0/prescaler_0/tspc_2/Q vssa1 3.72fF
C2730 pll_full_1/divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF
C2731 pll_full_1/divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF
C2732 pll_full_1/divider_0/prescaler_0/tspc_2/D vssa1 3.12fF
C2733 pll_full_1/divider_0/and_0/OUT vssa1 5.67fF
C2734 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF
C2735 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF
C2736 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 vssa1 1.19fF
C2737 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF
C2738 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.47fF **FLOATING
C2739 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING
C2740 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF
C2741 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF
C2742 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF
C2743 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF
C2744 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING
C2745 pll_full_1/divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING
C2746 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF
C2747 pll_full_1/divider_0/prescaler_0/Out vssa1 4.59fF
C2748 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF
C2749 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF
C2750 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF
C2751 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING
C2752 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING
C2753 pll_full_1/divider_0/nor_1/Z1 vssa1 1.34fF
C2754 pll_full_1/divider_0/nor_0/Z1 vssa1 1.34fF
C2755 pll_full_1/divbuf_1/OUT vssa1 363.82fF
C2756 pll_full_1/divbuf_1/OUT5 vssa1 350.37fF
C2757 pll_full_1/divbuf_1/OUT4 vssa1 133.72fF
C2758 pll_full_1/divbuf_1/OUT3 vssa1 34.03fF
C2759 pll_full_1/divbuf_1/OUT2 vssa1 8.71fF
C2760 pll_full_1/divbuf_1/a_492_n240# vssa1 2.46fF **FLOATING
C2761 pll_full_1/divbuf_0/OUT5 vssa1 350.37fF
C2762 pll_full_1/divbuf_0/OUT4 vssa1 133.72fF
C2763 pll_full_1/divbuf_0/OUT3 vssa1 34.03fF
C2764 pll_full_1/divbuf_0/OUT2 vssa1 8.71fF
C2765 pll_full_1/divbuf_0/a_492_n240# vssa1 2.46fF **FLOATING
C2766 pll_full_1/ro_complete_0/cbank_2/v vssa1 16.43fF
C2767 pll_full_1/ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF
C2768 pll_full_1/ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF
C2769 pll_full_1/ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF
C2770 pll_full_1/ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF
C2771 pll_full_1/ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF
C2772 pll_full_1/ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF
C2773 pll_full_1/ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF
C2774 pll_full_1/ro_complete_0/a0 vssa1 5.35fF
C2775 pll_full_1/ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF
C2776 pll_full_1/ro_complete_0/a1 vssa1 6.54fF
C2777 pll_full_1/ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF
C2778 pll_full_1/ro_complete_0/a3 vssa1 5.96fF
C2779 pll_full_1/ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF
C2780 pll_full_1/ro_complete_0/a2 vssa1 5.21fF
C2781 pll_full_1/ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF
C2782 pll_full_1/ro_complete_0/a4 vssa1 5.81fF
C2783 pll_full_1/ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF
C2784 pll_full_1/ro_complete_0/a5 vssa1 6.74fF
C2785 pll_full_1/ro_complete_0/cbank_0/v vssa1 15.12fF
C2786 pll_full_1/ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF
C2787 pll_full_1/ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF
C2788 pll_full_1/ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF
C2789 pll_full_1/ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF
C2790 pll_full_1/ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF
C2791 pll_full_1/ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF
C2792 pll_full_1/ro_complete_0/ro_var_extend_0/vcont vssa1 0.27fF
C2793 pll_full_1/filter_0/a_4216_n5230# vssa1 418.90fF **FLOATING
C2794 pll_full_1/filter_0/a_4216_n2998# vssa1 1.39fF **FLOATING
C2795 pll_full_1/cp_0/down vssa1 1.54fF
C2796 pll_full_1/cp_0/upbar vssa1 1.79fF
C2797 pll_full_1/cp_0/a_7110_n2840# vssa1 0.17fF **FLOATING
C2798 pll_full_1/cp_0/a_3060_n2840# vssa1 1.71fF **FLOATING
C2799 pll_full_1/cp_0/a_7110_0# vssa1 0.17fF **FLOATING
C2800 pll_full_1/cp_0/a_6370_0# vssa1 0.40fF **FLOATING
C2801 pll_full_1/cp_0/a_3060_0# vssa1 2.49fF **FLOATING
C2802 pll_full_1/cp_0/a_1710_0# vssa1 7.47fF **FLOATING
C2803 pll_full_1/pd_0/and_pd_0/Z1 vssa1 0.39fF
C2804 pll_full_1/pd_0/and_pd_0/Out1 vssa1 2.22fF
C2805 pll_full_1/pd_0/tspc_r_1/z5 vssa1 1.10fF
C2806 pll_full_1/pd_0/tspc_r_1/Z4 vssa1 1.07fF
C2807 pll_full_1/pd_0/tspc_r_1/Qbar vssa1 0.88fF
C2808 pll_full_1/pd_0/tspc_r_1/Z2 vssa1 1.22fF
C2809 pll_full_1/pd_0/tspc_r_1/Z1 vssa1 0.67fF
C2810 pll_full_1/pd_0/UP vssa1 6.41fF
C2811 pll_full_1/pd_0/tspc_r_1/Qbar1 vssa1 1.34fF
C2812 pll_full_1/pd_0/tspc_r_1/Z3 vssa1 2.12fF
C2813 pll_full_1/pd_0/REF vssa1 6.48fF
C2814 pll_full_1/pd_0/tspc_r_0/z5 vssa1 1.10fF
C2815 pll_full_1/pd_0/tspc_r_0/Z4 vssa1 1.07fF
C2816 pll_full_1/pd_0/R vssa1 3.05fF
C2817 pll_full_1/pd_0/tspc_r_0/Qbar vssa1 0.79fF
C2818 pll_full_1/pd_0/tspc_r_0/Z2 vssa1 1.22fF
C2819 pll_full_1/pd_0/tspc_r_0/Z1 vssa1 0.67fF
C2820 pll_full_1/pd_0/DOWN vssa1 7.34fF
C2821 pll_full_1/pd_0/tspc_r_0/Qbar1 vssa1 1.34fF
C2822 pll_full_1/pd_0/tspc_r_0/Z3 vssa1 2.12fF
C2823 pll_full_1/pd_0/DIV vssa1 372.69fF
C2824 pll_full_0/divider_0/and_0/Z1 vssa1 0.65fF
C2825 pll_full_0/divider_0/and_0/B vssa1 2.45fF
C2826 pll_full_0/divider_0/and_0/A vssa1 2.35fF
C2827 pll_full_0/divider_0/and_0/out1 vssa1 2.99fF
C2828 pll_full_0/divider_0/tspc_2/Z4 vssa1 0.86fF
C2829 pll_full_0/divider_0/tspc_2/Z3 vssa1 2.26fF
C2830 pll_full_0/divider_0/tspc_2/Z2 vssa1 1.46fF
C2831 pll_full_0/divider_0/tspc_2/Z1 vssa1 0.99fF
C2832 pll_full_0/divider_0/nor_0/A vssa1 7.08fF
C2833 pll_full_0/divider_0/tspc_2/a_630_n680# vssa1 1.15fF **FLOATING
C2834 pll_full_0/divider_0/tspc_1/Z4 vssa1 0.86fF
C2835 pll_full_0/divider_0/tspc_1/Z3 vssa1 2.26fF
C2836 pll_full_0/divider_0/tspc_1/Z2 vssa1 1.46fF
C2837 pll_full_0/divider_0/tspc_1/Z1 vssa1 0.99fF
C2838 pll_full_0/divider_0/nor_0/B vssa1 7.12fF
C2839 pll_full_0/divider_0/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING
C2840 pll_full_0/divider_0/tspc_2/Q vssa1 3.14fF
C2841 pll_full_0/divider_0/tspc_0/Z4 vssa1 0.86fF
C2842 pll_full_0/divbuf_0/IN vssa1 9.89fF
C2843 pll_full_0/divider_0/tspc_0/Z3 vssa1 2.26fF
C2844 pll_full_0/divider_0/tspc_0/Z2 vssa1 1.46fF
C2845 pll_full_0/divider_0/tspc_0/Z1 vssa1 0.99fF
C2846 pll_full_0/divider_0/nor_1/B vssa1 6.48fF
C2847 pll_full_0/divider_0/tspc_0/a_630_n680# vssa1 1.14fF **FLOATING
C2848 pll_full_0/divider_0/tspc_1/Q vssa1 3.12fF
C2849 pll_full_0/divider_0/clk vssa1 33.42fF
C2850 pll_full_0/divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF
C2851 pll_full_0/divider_0/prescaler_0/tspc_0/D vssa1 2.64fF
C2852 pll_full_0/divider_0/prescaler_0/tspc_2/Q vssa1 3.72fF
C2853 pll_full_0/divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF
C2854 pll_full_0/divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF
C2855 pll_full_0/divider_0/prescaler_0/tspc_2/D vssa1 3.12fF
C2856 pll_full_0/divider_0/and_0/OUT vssa1 5.67fF
C2857 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF
C2858 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF
C2859 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 vssa1 1.19fF
C2860 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF
C2861 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.47fF **FLOATING
C2862 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING
C2863 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF
C2864 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF
C2865 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF
C2866 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF
C2867 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING
C2868 pll_full_0/divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING
C2869 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF
C2870 pll_full_0/divider_0/prescaler_0/Out vssa1 4.59fF
C2871 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF
C2872 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF
C2873 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF
C2874 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING
C2875 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING
C2876 pll_full_0/divider_0/nor_1/Z1 vssa1 1.34fF
C2877 pll_full_0/divider_0/nor_0/Z1 vssa1 1.34fF
C2878 pll_full_0/divbuf_1/OUT vssa1 363.82fF
C2879 pll_full_0/divbuf_1/OUT5 vssa1 350.37fF
C2880 pll_full_0/divbuf_1/OUT4 vssa1 133.72fF
C2881 pll_full_0/divbuf_1/OUT3 vssa1 34.03fF
C2882 pll_full_0/divbuf_1/OUT2 vssa1 8.71fF
C2883 pll_full_0/divbuf_1/a_492_n240# vssa1 2.46fF **FLOATING
C2884 pll_full_0/divbuf_0/OUT5 vssa1 350.37fF
C2885 pll_full_0/divbuf_0/OUT4 vssa1 133.72fF
C2886 pll_full_0/divbuf_0/OUT3 vssa1 34.03fF
C2887 pll_full_0/divbuf_0/OUT2 vssa1 8.71fF
C2888 pll_full_0/divbuf_0/a_492_n240# vssa1 2.46fF **FLOATING
C2889 pll_full_0/ro_complete_0/cbank_2/v vssa1 16.43fF
C2890 pll_full_0/ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF
C2891 pll_full_0/ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF
C2892 pll_full_0/ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF
C2893 pll_full_0/ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF
C2894 pll_full_0/ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF
C2895 pll_full_0/ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF
C2896 pll_full_0/ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF
C2897 pll_full_0/ro_complete_0/a0 vssa1 5.35fF
C2898 pll_full_0/ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF
C2899 pll_full_0/ro_complete_0/a1 vssa1 6.54fF
C2900 pll_full_0/ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF
C2901 pll_full_0/ro_complete_0/a3 vssa1 5.96fF
C2902 pll_full_0/ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF
C2903 pll_full_0/ro_complete_0/a2 vssa1 5.21fF
C2904 pll_full_0/ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF
C2905 pll_full_0/ro_complete_0/a4 vssa1 5.81fF
C2906 pll_full_0/ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF
C2907 pll_full_0/ro_complete_0/a5 vssa1 6.74fF
C2908 pll_full_0/ro_complete_0/cbank_0/v vssa1 15.12fF
C2909 pll_full_0/ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF
C2910 pll_full_0/ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF
C2911 pll_full_0/ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF
C2912 pll_full_0/ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF
C2913 pll_full_0/ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF
C2914 pll_full_0/ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF
C2915 pll_full_0/ro_complete_0/ro_var_extend_0/vcont vssa1 0.27fF
C2916 pll_full_0/filter_0/a_4216_n5230# vssa1 418.90fF **FLOATING
C2917 pll_full_0/filter_0/a_4216_n2998# vssa1 1.39fF **FLOATING
C2918 pll_full_0/cp_0/down vssa1 1.54fF
C2919 pll_full_0/cp_0/upbar vssa1 1.79fF
C2920 pll_full_0/cp_0/a_7110_n2840# vssa1 0.17fF **FLOATING
C2921 pll_full_0/cp_0/a_3060_n2840# vssa1 1.71fF **FLOATING
C2922 pll_full_0/cp_0/a_7110_0# vssa1 0.17fF **FLOATING
C2923 pll_full_0/cp_0/a_6370_0# vssa1 0.40fF **FLOATING
C2924 pll_full_0/cp_0/a_3060_0# vssa1 2.49fF **FLOATING
C2925 pll_full_0/cp_0/a_1710_0# vssa1 7.47fF **FLOATING
C2926 pll_full_0/pd_0/and_pd_0/Z1 vssa1 0.39fF
C2927 pll_full_0/pd_0/and_pd_0/Out1 vssa1 2.22fF
C2928 pll_full_0/pd_0/tspc_r_1/z5 vssa1 1.10fF
C2929 pll_full_0/pd_0/tspc_r_1/Z4 vssa1 1.07fF
C2930 pll_full_0/pd_0/tspc_r_1/Qbar vssa1 0.88fF
C2931 pll_full_0/pd_0/tspc_r_1/Z2 vssa1 1.22fF
C2932 pll_full_0/pd_0/tspc_r_1/Z1 vssa1 0.67fF
C2933 pll_full_0/pd_0/UP vssa1 6.41fF
C2934 pll_full_0/pd_0/tspc_r_1/Qbar1 vssa1 1.34fF
C2935 pll_full_0/pd_0/tspc_r_1/Z3 vssa1 2.12fF
C2936 pll_full_0/pd_0/REF vssa1 6.48fF
C2937 pll_full_0/pd_0/tspc_r_0/z5 vssa1 1.10fF
C2938 pll_full_0/pd_0/tspc_r_0/Z4 vssa1 1.07fF
C2939 pll_full_0/pd_0/R vssa1 3.05fF
C2940 pll_full_0/pd_0/tspc_r_0/Qbar vssa1 0.79fF
C2941 pll_full_0/pd_0/tspc_r_0/Z2 vssa1 1.22fF
C2942 pll_full_0/pd_0/tspc_r_0/Z1 vssa1 0.67fF
C2943 pll_full_0/pd_0/DOWN vssa1 7.34fF
C2944 pll_full_0/pd_0/tspc_r_0/Qbar1 vssa1 1.34fF
C2945 pll_full_0/pd_0/tspc_r_0/Z3 vssa1 2.12fF
C2946 pll_full_0/pd_0/DIV vssa1 372.69fF
C2947 divbuf_19/OUT vssa1 363.82fF
C2948 divbuf_19/OUT5 vssa1 350.37fF
C2949 divbuf_19/OUT4 vssa1 133.72fF
C2950 divbuf_19/OUT3 vssa1 34.03fF
C2951 divbuf_19/OUT2 vssa1 8.71fF
C2952 divbuf_19/IN vssa1 0.89fF
C2953 divbuf_19/a_492_n240# vssa1 2.46fF **FLOATING
C2954 divbuf_18/OUT vssa1 363.82fF
C2955 divbuf_18/OUT5 vssa1 350.37fF
C2956 divbuf_18/OUT4 vssa1 133.72fF
C2957 divbuf_18/OUT3 vssa1 34.03fF
C2958 divbuf_18/OUT2 vssa1 8.71fF
C2959 divbuf_18/IN vssa1 0.89fF
C2960 divbuf_18/a_492_n240# vssa1 2.46fF **FLOATING
C2961 divbuf_17/OUT vssa1 363.82fF
C2962 divbuf_17/OUT5 vssa1 350.37fF
C2963 divbuf_17/OUT4 vssa1 133.72fF
C2964 divbuf_17/OUT3 vssa1 34.03fF
C2965 divbuf_17/OUT2 vssa1 8.71fF
C2966 divbuf_17/IN vssa1 0.89fF
C2967 divbuf_17/a_492_n240# vssa1 2.46fF **FLOATING
C2968 divider_2/and_0/Z1 vssa1 0.74fF
C2969 divider_2/and_0/B vssa1 2.25fF
C2970 divider_2/and_0/A vssa1 2.19fF
C2971 divider_2/and_0/out1 vssa1 2.93fF
C2972 divider_2/tspc_2/Z4 vssa1 0.86fF
C2973 divider_2/tspc_2/Z3 vssa1 2.26fF
C2974 divider_2/tspc_2/Z2 vssa1 1.46fF
C2975 divider_2/tspc_2/Z1 vssa1 0.99fF
C2976 divider_2/nor_0/A vssa1 7.04fF
C2977 divider_2/tspc_2/a_630_n680# vssa1 1.15fF **FLOATING
C2978 divider_2/tspc_1/Z4 vssa1 0.86fF
C2979 divider_2/tspc_1/Z3 vssa1 2.26fF
C2980 divider_2/tspc_1/Z2 vssa1 1.46fF
C2981 divider_2/tspc_1/Z1 vssa1 0.99fF
C2982 divider_2/nor_0/B vssa1 7.05fF
C2983 divider_2/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING
C2984 divider_2/tspc_2/Q vssa1 3.14fF
C2985 divider_2/tspc_0/Z4 vssa1 0.86fF
C2986 divider_2/Out vssa1 1.60fF
C2987 divider_2/tspc_0/Z3 vssa1 2.26fF
C2988 divider_2/tspc_0/Z2 vssa1 1.46fF
C2989 divider_2/tspc_0/Z1 vssa1 0.99fF
C2990 divider_2/nor_1/B vssa1 6.44fF
C2991 divider_2/tspc_0/a_630_n680# vssa1 1.14fF **FLOATING
C2992 divider_2/tspc_1/Q vssa1 3.12fF
C2993 divider_2/clk vssa1 5.63fF
C2994 divider_2/prescaler_0/nand_1/z1 vssa1 0.36fF
C2995 divider_2/prescaler_0/tspc_0/D vssa1 2.64fF
C2996 divider_2/prescaler_0/tspc_2/Q vssa1 3.74fF
C2997 divider_2/prescaler_0/tspc_1/Q vssa1 3.61fF
C2998 divider_2/prescaler_0/nand_0/z1 vssa1 0.36fF
C2999 divider_2/prescaler_0/tspc_2/D vssa1 3.12fF
C3000 divider_2/and_0/OUT vssa1 5.62fF
C3001 divider_2/prescaler_0/tspc_2/Z4 vssa1 0.86fF
C3002 divider_2/prescaler_0/tspc_2/Z3 vssa1 2.26fF
C3003 divider_2/prescaler_0/tspc_2/Z2 vssa1 1.46fF
C3004 divider_2/prescaler_0/tspc_2/Z1 vssa1 0.99fF
C3005 divider_2/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING
C3006 divider_2/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING
C3007 divider_2/prescaler_0/tspc_1/Z4 vssa1 0.86fF
C3008 divider_2/prescaler_0/tspc_1/Z3 vssa1 2.26fF
C3009 divider_2/prescaler_0/tspc_1/Z2 vssa1 1.48fF
C3010 divider_2/prescaler_0/tspc_1/Z1 vssa1 0.99fF
C3011 divider_2/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING
C3012 divider_2/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING
C3013 divider_2/prescaler_0/tspc_0/Z4 vssa1 0.86fF
C3014 divider_2/prescaler_0/Out vssa1 4.59fF
C3015 divider_2/prescaler_0/tspc_0/Z3 vssa1 2.26fF
C3016 divider_2/prescaler_0/tspc_0/Z2 vssa1 1.46fF
C3017 divider_2/prescaler_0/tspc_0/Z1 vssa1 0.99fF
C3018 divider_2/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING
C3019 divider_2/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING
C3020 divider_2/nor_1/Z1 vssa1 1.34fF
C3021 divider_2/mc2 vssa1 5.29fF
C3022 divider_2/nor_0/Z1 vssa1 1.34fF
C3023 divbuf_16/OUT vssa1 363.82fF
C3024 divbuf_16/OUT5 vssa1 350.37fF
C3025 divbuf_16/OUT4 vssa1 133.72fF
C3026 divbuf_16/OUT3 vssa1 34.03fF
C3027 divbuf_16/OUT2 vssa1 8.71fF
C3028 divbuf_16/IN vssa1 0.89fF
C3029 divbuf_16/a_492_n240# vssa1 2.46fF **FLOATING
C3030 divider_1/and_0/Z1 vssa1 0.74fF
C3031 divider_1/and_0/B vssa1 2.25fF
C3032 divider_1/and_0/A vssa1 2.19fF
C3033 divider_1/and_0/out1 vssa1 2.93fF
C3034 divider_1/tspc_2/Z4 vssa1 0.86fF
C3035 divider_1/tspc_2/Z3 vssa1 2.26fF
C3036 divider_1/tspc_2/Z2 vssa1 1.46fF
C3037 divider_1/tspc_2/Z1 vssa1 0.99fF
C3038 divider_1/nor_0/A vssa1 7.04fF
C3039 divider_1/tspc_2/a_630_n680# vssa1 1.15fF **FLOATING
C3040 divider_1/tspc_1/Z4 vssa1 0.86fF
C3041 divider_1/tspc_1/Z3 vssa1 2.26fF
C3042 divider_1/tspc_1/Z2 vssa1 1.46fF
C3043 divider_1/tspc_1/Z1 vssa1 0.99fF
C3044 divider_1/nor_0/B vssa1 7.05fF
C3045 divider_1/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING
C3046 divider_1/tspc_2/Q vssa1 3.14fF
C3047 divider_1/tspc_0/Z4 vssa1 0.86fF
C3048 divider_1/Out vssa1 1.60fF
C3049 divider_1/tspc_0/Z3 vssa1 2.26fF
C3050 divider_1/tspc_0/Z2 vssa1 1.46fF
C3051 divider_1/tspc_0/Z1 vssa1 0.99fF
C3052 divider_1/nor_1/B vssa1 6.33fF
C3053 divider_1/tspc_0/a_630_n680# vssa1 1.14fF **FLOATING
C3054 divider_1/tspc_1/Q vssa1 3.12fF
C3055 divider_1/clk vssa1 5.63fF
C3056 divider_1/prescaler_0/nand_1/z1 vssa1 0.36fF
C3057 divider_1/prescaler_0/tspc_0/D vssa1 2.64fF
C3058 divider_1/prescaler_0/tspc_2/Q vssa1 3.74fF
C3059 divider_1/prescaler_0/tspc_1/Q vssa1 3.61fF
C3060 divider_1/prescaler_0/nand_0/z1 vssa1 0.36fF
C3061 divider_1/prescaler_0/tspc_2/D vssa1 3.12fF
C3062 divider_1/and_0/OUT vssa1 5.62fF
C3063 divider_1/prescaler_0/tspc_2/Z4 vssa1 0.86fF
C3064 divider_1/prescaler_0/tspc_2/Z3 vssa1 2.26fF
C3065 divider_1/prescaler_0/tspc_2/Z2 vssa1 1.46fF
C3066 divider_1/prescaler_0/tspc_2/Z1 vssa1 0.99fF
C3067 divider_1/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING
C3068 divider_1/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING
C3069 divider_1/prescaler_0/tspc_1/Z4 vssa1 0.86fF
C3070 divider_1/prescaler_0/tspc_1/Z3 vssa1 2.26fF
C3071 divider_1/prescaler_0/tspc_1/Z2 vssa1 1.48fF
C3072 divider_1/prescaler_0/tspc_1/Z1 vssa1 0.99fF
C3073 divider_1/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING
C3074 divider_1/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING
C3075 divider_1/prescaler_0/tspc_0/Z4 vssa1 0.86fF
C3076 divider_1/prescaler_0/Out vssa1 4.59fF
C3077 divider_1/prescaler_0/tspc_0/Z3 vssa1 2.26fF
C3078 divider_1/prescaler_0/tspc_0/Z2 vssa1 1.46fF
C3079 divider_1/prescaler_0/tspc_0/Z1 vssa1 0.99fF
C3080 divider_1/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING
C3081 divider_1/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING
C3082 divider_1/nor_1/Z1 vssa1 1.34fF
C3083 divider_1/mc2 vssa1 5.29fF
C3084 divider_1/nor_0/Z1 vssa1 1.34fF
C3085 divbuf_15/OUT vssa1 363.82fF
C3086 divbuf_15/OUT5 vssa1 350.37fF
C3087 divbuf_15/OUT4 vssa1 133.72fF
C3088 divbuf_15/OUT3 vssa1 34.03fF
C3089 divbuf_15/OUT2 vssa1 8.71fF
C3090 divbuf_15/IN vssa1 0.89fF
C3091 divbuf_15/a_492_n240# vssa1 2.46fF **FLOATING
C3092 divbuf_25/OUT5 vssa1 350.37fF
C3093 divbuf_25/OUT4 vssa1 133.72fF
C3094 divbuf_25/OUT3 vssa1 34.03fF
C3095 divbuf_25/OUT2 vssa1 8.71fF
C3096 divbuf_25/IN vssa1 0.89fF
C3097 divbuf_25/a_492_n240# vssa1 2.46fF **FLOATING
C3098 divbuf_14/OUT vssa1 363.82fF
C3099 divbuf_14/OUT5 vssa1 350.37fF
C3100 divbuf_14/OUT4 vssa1 133.72fF
C3101 divbuf_14/OUT3 vssa1 34.03fF
C3102 divbuf_14/OUT2 vssa1 8.71fF
C3103 divbuf_14/IN vssa1 0.89fF
C3104 divbuf_14/a_492_n240# vssa1 2.46fF **FLOATING
C3105 divider_0/and_0/Z1 vssa1 0.74fF
C3106 divider_0/and_0/B vssa1 2.25fF
C3107 divider_0/and_0/A vssa1 2.19fF
C3108 divider_0/and_0/out1 vssa1 2.93fF
C3109 divider_0/tspc_2/Z4 vssa1 0.86fF
C3110 divider_0/tspc_2/Z3 vssa1 2.26fF
C3111 divider_0/tspc_2/Z2 vssa1 1.46fF
C3112 divider_0/tspc_2/Z1 vssa1 0.99fF
C3113 divider_0/nor_0/A vssa1 7.04fF
C3114 divider_0/tspc_2/a_630_n680# vssa1 1.15fF **FLOATING
C3115 divider_0/tspc_1/Z4 vssa1 0.86fF
C3116 divider_0/tspc_1/Z3 vssa1 2.26fF
C3117 divider_0/tspc_1/Z2 vssa1 1.46fF
C3118 divider_0/tspc_1/Z1 vssa1 0.99fF
C3119 divider_0/nor_0/B vssa1 7.05fF
C3120 divider_0/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING
C3121 divider_0/tspc_2/Q vssa1 3.14fF
C3122 divider_0/tspc_0/Z4 vssa1 0.86fF
C3123 divider_0/Out vssa1 1.60fF
C3124 divider_0/tspc_0/Z3 vssa1 2.26fF
C3125 divider_0/tspc_0/Z2 vssa1 1.46fF
C3126 divider_0/tspc_0/Z1 vssa1 0.99fF
C3127 divider_0/nor_1/B vssa1 6.33fF
C3128 divider_0/tspc_0/a_630_n680# vssa1 1.14fF **FLOATING
C3129 divider_0/tspc_1/Q vssa1 3.12fF
C3130 divider_0/clk vssa1 5.63fF
C3131 divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF
C3132 divider_0/prescaler_0/tspc_0/D vssa1 2.64fF
C3133 divider_0/prescaler_0/tspc_2/Q vssa1 3.64fF
C3134 divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF
C3135 divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF
C3136 divider_0/prescaler_0/tspc_2/D vssa1 3.12fF
C3137 divider_0/and_0/OUT vssa1 5.62fF
C3138 divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF
C3139 divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF
C3140 divider_0/prescaler_0/tspc_2/Z2 vssa1 1.46fF
C3141 divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF
C3142 divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING
C3143 divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING
C3144 divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF
C3145 divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF
C3146 divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF
C3147 divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF
C3148 divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING
C3149 divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING
C3150 divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF
C3151 divider_0/prescaler_0/Out vssa1 4.59fF
C3152 divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF
C3153 divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF
C3154 divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF
C3155 divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING
C3156 divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING
C3157 divider_0/nor_1/Z1 vssa1 1.34fF
C3158 divider_0/mc2 vssa1 5.29fF
C3159 divider_0/nor_0/Z1 vssa1 1.34fF
C3160 divbuf_24/OUT vssa1 363.82fF
C3161 divbuf_24/OUT5 vssa1 350.37fF
C3162 divbuf_24/OUT4 vssa1 133.72fF
C3163 divbuf_24/OUT3 vssa1 34.03fF
C3164 divbuf_24/OUT2 vssa1 8.71fF
C3165 divbuf_24/IN vssa1 0.89fF
C3166 divbuf_24/a_492_n240# vssa1 2.46fF **FLOATING
C3167 divbuf_13/OUT vssa1 363.82fF
C3168 divbuf_13/OUT5 vssa1 350.37fF
C3169 divbuf_13/OUT4 vssa1 133.72fF
C3170 divbuf_13/OUT3 vssa1 34.03fF
C3171 divbuf_13/OUT2 vssa1 8.71fF
C3172 divbuf_13/IN vssa1 0.89fF
C3173 divbuf_13/a_492_n240# vssa1 2.46fF **FLOATING
C3174 divbuf_9/OUT vssa1 363.82fF
C3175 divbuf_9/OUT5 vssa1 350.37fF
C3176 divbuf_9/OUT4 vssa1 133.72fF
C3177 divbuf_9/OUT3 vssa1 34.03fF
C3178 divbuf_9/OUT2 vssa1 8.71fF
C3179 divbuf_9/IN vssa1 0.89fF
C3180 divbuf_9/a_492_n240# vssa1 2.46fF **FLOATING
C3181 divbuf_23/OUT vssa1 363.82fF
C3182 divbuf_23/OUT5 vssa1 350.37fF
C3183 divbuf_23/OUT4 vssa1 133.72fF
C3184 divbuf_23/OUT3 vssa1 34.03fF
C3185 divbuf_23/OUT2 vssa1 8.71fF
C3186 divbuf_23/IN vssa1 0.89fF
C3187 divbuf_23/a_492_n240# vssa1 2.46fF **FLOATING
C3188 divbuf_12/OUT vssa1 363.82fF
C3189 divbuf_12/OUT5 vssa1 350.37fF
C3190 divbuf_12/OUT4 vssa1 133.72fF
C3191 divbuf_12/OUT3 vssa1 34.03fF
C3192 divbuf_12/OUT2 vssa1 8.71fF
C3193 divbuf_12/IN vssa1 0.89fF
C3194 divbuf_12/a_492_n240# vssa1 2.46fF **FLOATING
C3195 divbuf_8/OUT vssa1 363.82fF
C3196 divbuf_8/OUT5 vssa1 350.37fF
C3197 divbuf_8/OUT4 vssa1 133.72fF
C3198 divbuf_8/OUT3 vssa1 34.03fF
C3199 divbuf_8/OUT2 vssa1 8.71fF
C3200 divbuf_8/IN vssa1 0.89fF
C3201 divbuf_8/a_492_n240# vssa1 2.46fF **FLOATING
C3202 divbuf_22/OUT vssa1 363.82fF
C3203 divbuf_22/OUT5 vssa1 350.37fF
C3204 divbuf_22/OUT4 vssa1 133.72fF
C3205 divbuf_22/OUT3 vssa1 34.03fF
C3206 divbuf_22/OUT2 vssa1 8.71fF
C3207 divbuf_22/IN vssa1 0.89fF
C3208 divbuf_22/a_492_n240# vssa1 2.46fF **FLOATING
C3209 divbuf_11/OUT vssa1 363.82fF
C3210 divbuf_11/OUT5 vssa1 350.37fF
C3211 divbuf_11/OUT4 vssa1 133.72fF
C3212 divbuf_11/OUT3 vssa1 34.03fF
C3213 divbuf_11/OUT2 vssa1 8.71fF
C3214 divbuf_11/IN vssa1 0.89fF
C3215 divbuf_11/a_492_n240# vssa1 2.46fF **FLOATING
C3216 divbuf_7/OUT5 vssa1 350.37fF
C3217 divbuf_7/OUT4 vssa1 133.72fF
C3218 divbuf_7/OUT3 vssa1 34.03fF
C3219 divbuf_7/OUT2 vssa1 8.71fF
C3220 divbuf_7/IN vssa1 0.89fF
C3221 divbuf_7/a_492_n240# vssa1 2.46fF **FLOATING
C3222 divbuf_21/OUT vssa1 363.82fF
C3223 divbuf_21/OUT5 vssa1 350.37fF
C3224 divbuf_21/OUT4 vssa1 133.72fF
C3225 divbuf_21/OUT3 vssa1 34.03fF
C3226 divbuf_21/OUT2 vssa1 8.71fF
C3227 divbuf_21/IN vssa1 0.89fF
C3228 divbuf_21/a_492_n240# vssa1 2.46fF **FLOATING
C3229 divbuf_20/OUT vssa1 363.82fF
C3230 divbuf_20/OUT5 vssa1 350.37fF
C3231 divbuf_20/OUT4 vssa1 133.72fF
C3232 divbuf_20/OUT3 vssa1 34.03fF
C3233 divbuf_20/OUT2 vssa1 8.71fF
C3234 divbuf_20/IN vssa1 0.89fF
C3235 divbuf_20/a_492_n240# vssa1 2.46fF **FLOATING
C3236 divbuf_10/OUT vssa1 363.82fF
C3237 divbuf_10/OUT5 vssa1 350.37fF
C3238 divbuf_10/OUT4 vssa1 133.72fF
C3239 divbuf_10/OUT3 vssa1 34.03fF
C3240 divbuf_10/OUT2 vssa1 8.71fF
C3241 divbuf_10/IN vssa1 0.89fF
C3242 divbuf_10/a_492_n240# vssa1 2.46fF **FLOATING
C3243 divbuf_6/OUT5 vssa1 350.37fF
C3244 divbuf_6/OUT4 vssa1 133.72fF
C3245 divbuf_6/OUT3 vssa1 34.03fF
C3246 divbuf_6/OUT2 vssa1 8.71fF
C3247 divbuf_6/IN vssa1 0.89fF
C3248 divbuf_6/a_492_n240# vssa1 2.46fF **FLOATING
C3249 divbuf_5/OUT5 vssa1 350.37fF
C3250 divbuf_5/OUT4 vssa1 133.72fF
C3251 divbuf_5/OUT3 vssa1 34.03fF
C3252 divbuf_5/OUT2 vssa1 8.71fF
C3253 divbuf_5/IN vssa1 0.89fF
C3254 divbuf_5/a_492_n240# vssa1 2.46fF **FLOATING
C3255 divbuf_4/OUT5 vssa1 350.37fF
C3256 divbuf_4/OUT4 vssa1 133.72fF
C3257 divbuf_4/OUT3 vssa1 34.03fF
C3258 divbuf_4/OUT2 vssa1 8.71fF
C3259 divbuf_4/IN vssa1 0.89fF
C3260 divbuf_4/a_492_n240# vssa1 2.46fF **FLOATING
C3261 divbuf_3/OUT5 vssa1 350.37fF
C3262 divbuf_3/OUT4 vssa1 133.72fF
C3263 divbuf_3/OUT3 vssa1 34.03fF
C3264 divbuf_3/OUT2 vssa1 8.71fF
C3265 divbuf_3/IN vssa1 0.89fF
C3266 divbuf_3/a_492_n240# vssa1 2.46fF **FLOATING
C3267 divbuf_2/OUT5 vssa1 350.37fF
C3268 divbuf_2/OUT4 vssa1 133.72fF
C3269 divbuf_2/OUT3 vssa1 34.03fF
C3270 divbuf_2/OUT2 vssa1 8.71fF
C3271 divbuf_2/IN vssa1 0.89fF
C3272 divbuf_2/a_492_n240# vssa1 2.46fF **FLOATING
C3273 divbuf_1/OUT vssa1 363.82fF
C3274 divbuf_1/OUT5 vssa1 350.37fF
C3275 divbuf_1/OUT4 vssa1 133.72fF
C3276 divbuf_1/OUT3 vssa1 34.03fF
C3277 divbuf_1/OUT2 vssa1 8.71fF
C3278 divbuf_1/IN vssa1 0.89fF
C3279 divbuf_1/a_492_n240# vssa1 2.46fF **FLOATING
C3280 ro_complete_1/cbank_2/v vssa1 16.43fF
C3281 ro_complete_1/cbank_2/switch_5/vin vssa1 0.78fF
C3282 ro_complete_1/cbank_2/switch_4/vin vssa1 1.50fF
C3283 ro_complete_1/cbank_2/switch_2/vin vssa1 1.30fF
C3284 ro_complete_1/cbank_2/switch_3/vin vssa1 0.56fF
C3285 ro_complete_1/cbank_2/switch_1/vin vssa1 1.14fF
C3286 ro_complete_1/cbank_2/switch_0/vin vssa1 1.02fF
C3287 ro_complete_1/cbank_1/v vssa1 16.43fF
C3288 ro_complete_1/cbank_1/switch_5/vin vssa1 0.78fF
C3289 ro_complete_1/a0 vssa1 5.35fF
C3290 ro_complete_1/cbank_1/switch_4/vin vssa1 1.50fF
C3291 ro_complete_1/a1 vssa1 6.54fF
C3292 ro_complete_1/cbank_1/switch_2/vin vssa1 1.30fF
C3293 ro_complete_1/a3 vssa1 5.96fF
C3294 ro_complete_1/cbank_1/switch_3/vin vssa1 0.56fF
C3295 ro_complete_1/a2 vssa1 5.21fF
C3296 ro_complete_1/cbank_1/switch_1/vin vssa1 1.14fF
C3297 ro_complete_1/a4 vssa1 5.81fF
C3298 ro_complete_1/cbank_1/switch_0/vin vssa1 1.02fF
C3299 ro_complete_1/a5 vssa1 6.74fF
C3300 ro_complete_1/cbank_0/v vssa1 15.12fF
C3301 ro_complete_1/cbank_0/switch_5/vin vssa1 0.78fF
C3302 ro_complete_1/cbank_0/switch_4/vin vssa1 1.50fF
C3303 ro_complete_1/cbank_0/switch_2/vin vssa1 1.30fF
C3304 ro_complete_1/cbank_0/switch_3/vin vssa1 0.56fF
C3305 ro_complete_1/cbank_0/switch_1/vin vssa1 1.14fF
C3306 ro_complete_1/cbank_0/switch_0/vin vssa1 1.02fF
C3307 ro_complete_1/ro_var_extend_0/vcont vssa1 0.27fF
C3308 divbuf_0/OUT vssa1 363.82fF
C3309 divbuf_0/OUT5 vssa1 350.37fF
C3310 divbuf_0/OUT4 vssa1 133.72fF
C3311 divbuf_0/OUT3 vssa1 34.03fF
C3312 divbuf_0/OUT2 vssa1 8.71fF
C3313 divbuf_0/IN vssa1 0.89fF
C3314 divbuf_0/a_492_n240# vssa1 2.46fF **FLOATING
C3315 ro_complete_0/cbank_2/v vssa1 16.43fF
C3316 ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF
C3317 ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF
C3318 ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF
C3319 ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF
C3320 ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF
C3321 ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF
C3322 ro_complete_0/cbank_1/v vssa1 16.46fF
C3323 ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF
C3324 divbuf_7/OUT vssa1 405.76fF
C3325 ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF
C3326 divbuf_6/OUT vssa1 402.77fF
C3327 ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF
C3328 divbuf_3/OUT vssa1 394.74fF
C3329 ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF
C3330 divbuf_5/OUT vssa1 397.92fF
C3331 ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF
C3332 divbuf_4/OUT vssa1 391.26fF
C3333 ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF
C3334 divbuf_2/OUT vssa1 387.66fF
C3335 ro_complete_0/cbank_0/v vssa1 15.12fF
C3336 ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF
C3337 ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF
C3338 ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF
C3339 ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF
C3340 ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF
C3341 ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF
C3342 ro_complete_0/ro_var_extend_0/vcont vssa1 0.27fF
C3343 filter_0/v vssa1 477.90fF
C3344 filter_0/a_4216_n5230# vssa1 418.47fF **FLOATING
C3345 filter_0/a_4216_n2998# vssa1 1.03fF **FLOATING
C3346 cp_0/down vssa1 1.54fF
C3347 cp_0/vbias vssa1 2.41fF
C3348 cp_0/out vssa1 5.34fF
C3349 cp_0/upbar vssa1 1.50fF
C3350 cp_0/a_7110_n2840# vssa1 0.17fF **FLOATING
C3351 cp_0/a_3060_n2840# vssa1 1.71fF **FLOATING
C3352 cp_0/a_7110_0# vssa1 0.17fF **FLOATING
C3353 cp_0/a_6370_0# vssa1 0.40fF **FLOATING
C3354 cp_0/a_3060_0# vssa1 1.66fF **FLOATING
C3355 cp_0/a_1710_0# vssa1 5.89fF **FLOATING
C3356 cp_0/a_1710_n2840# vssa1 4.91fF **FLOATING
C3357 cp_0/a_10_n50# vssa1 2.96fF **FLOATING
C3358 pd_1/and_pd_0/Z1 vssa1 0.39fF
C3359 pd_1/and_pd_0/Out1 vssa1 2.22fF
C3360 pd_1/tspc_r_1/z5 vssa1 1.10fF
C3361 pd_1/tspc_r_1/Z4 vssa1 1.07fF
C3362 pd_1/tspc_r_1/Qbar vssa1 0.88fF
C3363 pd_1/tspc_r_1/Z2 vssa1 1.22fF
C3364 pd_1/tspc_r_1/Z1 vssa1 0.67fF
C3365 pd_1/UP vssa1 2.21fF
C3366 pd_1/tspc_r_1/Qbar1 vssa1 1.34fF
C3367 pd_1/tspc_r_1/Z3 vssa1 2.12fF
C3368 pd_1/REF vssa1 1.80fF
C3369 pd_1/tspc_r_0/z5 vssa1 1.10fF
C3370 pd_1/tspc_r_0/Z4 vssa1 1.07fF
C3371 pd_1/R vssa1 3.05fF
C3372 pd_1/tspc_r_0/Qbar vssa1 0.79fF
C3373 pd_1/tspc_r_0/Z2 vssa1 1.22fF
C3374 pd_1/tspc_r_0/Z1 vssa1 0.67fF
C3375 pd_1/DOWN vssa1 3.08fF
C3376 pd_1/tspc_r_0/Qbar1 vssa1 1.34fF
C3377 pd_1/tspc_r_0/Z3 vssa1 2.12fF
C3378 pd_1/DIV vssa1 1.82fF
C3379 pd_0/and_pd_0/Z1 vssa1 0.39fF
C3380 pd_0/and_pd_0/Out1 vssa1 2.22fF
C3381 pd_0/tspc_r_1/z5 vssa1 1.10fF
C3382 pd_0/tspc_r_1/Z4 vssa1 1.07fF
C3383 pd_0/tspc_r_1/Qbar vssa1 0.88fF
C3384 pd_0/tspc_r_1/Z2 vssa1 1.22fF
C3385 pd_0/tspc_r_1/Z1 vssa1 0.67fF
C3386 pd_0/UP vssa1 2.21fF
C3387 pd_0/tspc_r_1/Qbar1 vssa1 1.34fF
C3388 pd_0/tspc_r_1/Z3 vssa1 2.12fF
C3389 pd_0/REF vssa1 1.80fF
C3390 pd_0/tspc_r_0/z5 vssa1 1.10fF
C3391 pd_0/tspc_r_0/Z4 vssa1 1.07fF
C3392 pd_0/R vssa1 3.05fF
C3393 pd_0/tspc_r_0/Qbar vssa1 0.79fF
C3394 pd_0/tspc_r_0/Z2 vssa1 1.22fF
C3395 pd_0/tspc_r_0/Z1 vssa1 0.67fF
C3396 pd_0/DOWN vssa1 3.08fF
C3397 pd_0/tspc_r_0/Qbar1 vssa1 1.34fF
C3398 pd_0/tspc_r_0/Z3 vssa1 2.12fF
C3399 pd_0/DIV vssa1 1.82fF
.ends