all-modules
diff --git a/gds/user_analog_project_wrapper.gds b/gds/user_analog_project_wrapper.gds index 21ecc19..3647d8c 100644 --- a/gds/user_analog_project_wrapper.gds +++ b/gds/user_analog_project_wrapper.gds Binary files differ
diff --git a/mag/user_analog_project_wrapper.mag b/mag/user_analog_project_wrapper.mag index 9fc6b79..76e2fe5 100644 --- a/mag/user_analog_project_wrapper.mag +++ b/mag/user_analog_project_wrapper.mag
@@ -1,6 +1,6 @@ magic tech sky130A -timestamp 1642810278 +timestamp 1642811007 << metal2 >> rect 262 -400 318 240 rect 853 -400 909 240 @@ -700,10 +700,26 @@ rect -50 0 0 352000 rect 292000 0 292050 352000 rect -50 -50 292050 0 +use cp cp_0 +timestamp 1640911461 +transform 1 0 54462 0 1 195288 +box -415 -1715 4690 2035 +use ro_div_new ro_div_new_0 +timestamp 1642811007 +transform 1 0 231684 0 1 228641 +box 0 0 9875 6770 +use pd pd_0 +timestamp 1642811007 +transform 1 0 103126 0 1 258815 +box -215 -855 1685 810 use divider divider_0 -timestamp 1640957771 +timestamp 1642811007 transform 1 0 166638 0 1 265093 box -490 -235 4690 2150 +use filter filter_0 +timestamp 1640983258 +transform 1 0 77692 0 1 317254 +box -1800 -11005 6240 390 use divbuf divbuf_6 timestamp 1641017053 transform 1 0 245858 0 1 309157 @@ -728,10 +744,6 @@ timestamp 1641017053 transform 1 0 246176 0 1 318860 box -460 -1085 31200 495 -use ro_complete ro_complete_1 -timestamp 1642133792 -transform 1 0 247313 0 1 328719 -box -57 -5330 4455 1440 use divbuf divbuf_0 timestamp 1641017053 transform 1 0 244268 0 1 335005 @@ -740,18 +752,18 @@ timestamp 1641017053 transform 1 0 244347 0 1 337471 box -460 -1085 31200 495 -use cp cp_0 -timestamp 1640911461 -transform 1 0 54462 0 1 195288 -box -415 -1715 4690 2035 -use pd pd_0 -timestamp 1640958486 -transform 1 0 103126 0 1 258815 -box -215 -855 1685 810 -use filter filter_0 -timestamp 1640983258 -transform 1 0 77692 0 1 317254 -box -1800 -11005 6240 390 +use ro_complete ro_complete_1 +timestamp 1642811007 +transform 1 0 247313 0 1 328719 +box -57 -5330 4455 1440 +use pll_full pll_full_0 +timestamp 1642811007 +transform 1 0 183060 0 1 147974 +box -5415 -2690 26430 12835 +use pd_div_new pd_div_new_0 +timestamp 1642811007 +transform 1 0 106361 0 1 170578 +box 0 0 7220 2385 << labels >> flabel metal3 s 291760 134615 292400 134671 0 FreeSans 560 0 0 0 gpio_analog[0] port 0 nsew signal bidirectional
diff --git a/netgen/user_analog_project_wrapper.spice b/netgen/user_analog_project_wrapper.spice index d122e00..1b7992f 100644 --- a/netgen/user_analog_project_wrapper.spice +++ b/netgen/user_analog_project_wrapper.spice
@@ -106,483 +106,1419 @@ + wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6] + wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3] + wbs_stb_i wbs_we_i -C0 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF -C1 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF -C2 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF -C3 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF -C4 divider_0/nor_0/Z1 divider_0/and_0/B 0.78fF -C5 divbuf_5/a_492_n240# divbuf_5/OUT 0.00fF -C6 divbuf_0/OUT divbuf_0/OUT5 43.38fF -C7 divider_0/nor_1/B divider_0/and_0/B 0.31fF -C8 divider_0/tspc_1/Q divider_0/tspc_2/Z2 0.14fF -C9 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF -C10 divbuf_6/OUT4 divbuf_6/OUT 1.11fF -C11 divbuf_1/a_492_n240# divbuf_1/OUT2 0.42fF -C12 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF -C13 divider_0/tspc_0/Q divider_0/tspc_0/a_630_n680# 0.04fF -C14 divbuf_4/a_492_n240# divbuf_4/IN 0.13fF -C15 divider_0/and_0/OUT divider_0/clk 0.04fF -C16 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/Qbar 0.01fF -C17 pd_0/tspc_r_0/Z3 pd_0/R 0.27fF -C18 ro_complete_0/a4 ro_complete_0/cbank_1/v 0.05fF -C19 divider_0/tspc_1/Z3 divider_0/tspc_1/Q 0.05fF -C20 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF -C21 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Qbar1 0.38fF -C22 io_clamp_high[0] io_analog[4] 0.53fF -C23 divbuf_4/OUT5 divbuf_4/OUT 43.38fF -C24 divider_0/nor_1/B divider_0/tspc_2/Z4 0.02fF -C25 pd_0/tspc_r_0/Z4 pd_0/tspc_r_1/Z4 0.02fF -C26 pd_0/DOWN pd_0/and_pd_0/Out1 0.12fF -C27 pd_0/REF pd_0/tspc_r_1/Z1 0.17fF -C28 divbuf_6/a_492_n240# divbuf_6/IN 0.13fF -C29 divbuf_4/OUT4 divbuf_4/OUT 1.11fF -C30 divbuf_0/OUT divbuf_0/a_492_n240# 0.00fF -C31 divbuf_0/OUT3 divbuf_0/OUT2 1.37fF -C32 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF -C33 divbuf_3/OUT3 divbuf_3/OUT 0.26fF -C34 divbuf_3/OUT4 divbuf_3/OUT5 20.26fF -C35 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z3 0.05fF -C36 divbuf_7/OUT2 divbuf_7/OUT3 1.37fF -C37 ro_complete_0/a5 ro_complete_0/cbank_1/switch_0/vin 0.09fF -C38 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF -C39 divider_0/nor_1/B divider_0/tspc_0/a_630_n680# 0.01fF -C40 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF -C41 divider_0/tspc_2/Z3 divider_0/Out 0.05fF -C42 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF -C43 ro_complete_0/a1 ro_complete_0/cbank_1/v 0.05fF -C44 divider_0/and_0/A divider_0/and_0/B 0.18fF -C45 divbuf_5/IN divbuf_5/OUT5 0.00fF -C46 ro_complete_0/a2 ro_complete_0/cbank_1/switch_3/vin 0.09fF -C47 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_0/z1 0.24fF -C48 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/Out 0.19fF -C49 divbuf_0/OUT5 divbuf_0/a_492_n240# 0.01fF -C50 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z2 0.01fF -C51 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.26fF -C52 pd_0/DOWN pd_0/R 0.36fF -C53 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z4 0.20fF -C54 pd_0/DIV pd_0/tspc_r_0/z5 0.04fF -C55 pd_0/tspc_r_0/Z1 pd_0/tspc_r_0/Z2 0.71fF -C56 ro_complete_0/a3 ro_complete_0/cbank_2/switch_2/vin 0.09fF -C57 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF -C58 pd_0/tspc_r_1/Qbar1 pd_0/UP 0.11fF -C59 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF -C60 cp_0/a_10_n50# cp_0/vbias 0.19fF -C61 pd_0/tspc_r_0/z5 pd_0/tspc_r_1/z5 0.02fF -C62 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z2 0.25fF -C63 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.45fF -C64 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF -C65 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF -C66 divbuf_3/OUT5 divbuf_3/OUT 43.38fF -C67 divbuf_7/OUT2 divbuf_7/OUT5 0.02fF -C68 divbuf_7/OUT3 divbuf_7/OUT4 5.16fF -C69 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF -C70 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z4 0.00fF -C71 pd_0/R pd_0/tspc_r_1/Z3 0.29fF -C72 divbuf_1/OUT5 divbuf_1/OUT 43.38fF -C73 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF -C74 divbuf_5/OUT2 divbuf_5/OUT 0.06fF -C75 divbuf_5/OUT3 divbuf_5/OUT5 0.01fF -C76 divbuf_4/a_492_n240# divbuf_4/OUT 0.00fF -C77 divbuf_0/OUT divbuf_0/OUT2 0.06fF -C78 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a4 0.12fF -C79 ro_complete_0/a2 ro_complete_0/cbank_0/switch_3/vin 0.09fF -C80 divbuf_3/a_492_n240# divbuf_3/OUT2 0.42fF -C81 divider_0/and_0/OUT divider_0/prescaler_0/tspc_0/Q 0.04fF -C82 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF -C83 pd_0/UP pd_0/and_pd_0/Out1 0.33fF -C84 divbuf_2/OUT2 divbuf_2/OUT3 1.37fF -C85 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF -C86 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Q 0.04fF -C87 divider_0/tspc_2/a_630_n680# divider_0/nor_0/B 0.35fF -C88 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/z5 0.20fF -C89 divbuf_2/OUT5 divbuf_2/IN 0.00fF -C90 ro_complete_0/a5 ro_complete_0/cbank_1/v 0.10fF -C91 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/a0 0.09fF -C92 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF -C93 divider_0/prescaler_0/Out divider_0/tspc_0/Z2 0.11fF -C94 divbuf_1/a_492_n240# divbuf_1/IN 0.13fF -C95 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF -C96 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF -C97 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/Qbar 0.01fF -C98 pd_0/tspc_r_1/Z1 pd_0/tspc_r_1/Z2 0.71fF -C99 divbuf_6/a_492_n240# divbuf_6/OUT5 0.01fF -C100 divbuf_0/OUT5 divbuf_0/OUT2 0.02fF -C101 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a3 0.13fF -C102 divider_0/mc2 divider_0/nor_1/A 0.04fF -C103 divider_0/nor_1/A divider_0/prescaler_0/Out 0.15fF -C104 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.64fF -C105 cp_0/a_1710_0# cp_0/a_1710_n2840# 0.83fF -C106 pd_0/DIV pd_0/tspc_r_0/Qbar1 0.12fF -C107 divbuf_7/OUT3 divbuf_7/OUT 0.26fF -C108 divbuf_7/OUT4 divbuf_7/OUT5 20.26fF -C109 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF -C110 divider_0/tspc_0/Z1 divider_0/nor_1/A 0.03fF -C111 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Z4 0.65fF -C112 pd_0/R pd_0/UP 0.45fF -C113 io_clamp_low[2] io_analog[6] 0.53fF -C114 ro_complete_0/a0 ro_complete_0/cbank_2/switch_4/vin 0.13fF -C115 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF -C116 divider_0/tspc_0/Z4 divider_0/prescaler_0/Out 0.12fF -C117 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF -C118 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF -C119 divider_0/and_0/B divider_0/and_0/Z1 0.07fF -C120 divbuf_5/OUT4 divbuf_5/OUT 1.11fF -C121 ro_complete_0/a2 ro_complete_0/cbank_2/switch_3/vin 0.09fF -C122 divider_0/tspc_0/Z4 divider_0/tspc_0/Z1 0.00fF -C123 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z3 0.33fF -C124 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF -C125 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Out1 0.05fF -C126 divbuf_2/OUT2 divbuf_2/OUT5 0.02fF -C127 divbuf_2/OUT3 divbuf_2/OUT4 5.16fF -C128 divbuf_0/OUT2 divbuf_0/a_492_n240# 0.42fF -C129 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF -C130 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF -C131 divbuf_2/OUT2 divbuf_2/OUT 0.06fF -C132 ro_complete_0/a2 ro_complete_0/cbank_2/v 0.05fF -C133 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_0/D 0.16fF -C134 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Q 0.05fF -C135 divider_0/and_0/out1 divider_0/and_0/A 0.01fF -C136 divbuf_5/a_492_n240# divbuf_5/IN 0.13fF -C137 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF -C138 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z4 0.20fF -C139 pd_0/REF pd_0/tspc_r_1/z5 0.04fF -C140 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF -C141 divbuf_6/OUT2 divbuf_6/OUT3 1.37fF -C142 divbuf_1/OUT5 divbuf_1/OUT2 0.02fF -C143 divider_0/nor_1/A divider_0/tspc_0/Z2 0.23fF -C144 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF -C145 pd_0/tspc_r_0/Z3 pd_0/DOWN 0.03fF -C146 pd_0/and_pd_0/Out1 pd_0/and_pd_0/Z1 0.18fF -C147 divbuf_7/OUT5 divbuf_7/OUT 43.38fF -C148 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF -C149 divbuf_1/OUT5 divbuf_1/a_492_n240# 0.01fF -C150 divider_0/nor_1/Z1 divider_0/and_0/B 0.18fF -C151 divider_0/nor_1/B divider_0/nor_0/B 0.47fF -C152 divider_0/tspc_0/Q divider_0/tspc_0/Z3 0.05fF -C153 divider_0/tspc_0/Z4 divider_0/tspc_0/Z2 0.36fF -C154 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF -C155 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.01fF -C156 pd_0/R pd_0/tspc_r_1/Qbar 0.03fF -C157 divbuf_2/a_492_n240# divbuf_2/OUT5 0.01fF -C158 ro_complete_0/a2 ro_complete_0/cbank_0/switch_2/vin 0.14fF -C159 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a4 0.09fF -C160 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a5 0.09fF -C161 divider_0/tspc_0/Q divider_0/nor_1/B 0.22fF -C162 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF -C163 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z4 0.08fF -C164 divbuf_3/a_492_n240# divbuf_3/OUT 0.00fF -C165 divbuf_7/a_492_n240# divbuf_7/OUT2 0.42fF -C166 divbuf_2/OUT4 divbuf_2/OUT5 20.26fF -C167 divbuf_2/a_492_n240# divbuf_2/OUT 0.00fF -C168 divider_0/tspc_0/Z4 divider_0/nor_1/A 0.21fF -C169 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF -C170 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF -C171 divider_0/tspc_2/a_630_n680# divider_0/Out 0.04fF -C172 divider_0/nor_0/B divider_0/tspc_2/Z2 0.40fF -C173 divider_0/prescaler_0/tspc_0/Q divider_0/clk 0.05fF -C174 divbuf_2/OUT4 divbuf_2/OUT 1.11fF -C175 divider_0/tspc_1/Z2 divider_0/nor_1/A 0.15fF -C176 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF -C177 divider_0/mc2 divider_0/and_0/B 0.20fF -C178 divider_0/nor_0/Z1 divider_0/nor_1/B 0.18fF -C179 ro_complete_0/a0 ro_complete_0/cbank_2/switch_5/vin 0.09fF -C180 cp_0/upbar cp_0/down 0.02fF -C181 pd_0/R pd_0/and_pd_0/Z1 0.02fF -C182 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/z5 0.20fF -C183 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF -C184 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.03fF -C185 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF -C186 divbuf_6/OUT2 divbuf_6/OUT5 0.02fF -C187 divbuf_6/OUT3 divbuf_6/OUT4 5.16fF -C188 divbuf_1/OUT divbuf_1/OUT3 0.26fF -C189 divbuf_1/OUT5 divbuf_1/OUT4 20.26fF -C190 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF -C191 divider_0/tspc_0/Q divider_0/tspc_1/Z3 0.45fF -C192 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z1 0.09fF -C193 pd_0/DIV pd_0/tspc_r_0/Z2 0.19fF -C194 filter_0/a_4216_n2998# filter_0/v 0.31fF -C195 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.05fF -C196 io_clamp_low[2] io_clamp_high[2] 0.53fF -C197 io_clamp_high[1] io_analog[5] 0.53fF -C198 divider_0/nor_1/A divider_0/tspc_1/Z4 0.02fF -C199 divider_0/nor_1/B divider_0/tspc_2/Z2 0.20fF -C200 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF -C201 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF -C202 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF -C203 divbuf_4/OUT2 divbuf_4/OUT5 0.02fF -C204 divbuf_3/IN divbuf_3/OUT5 0.00fF -C205 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF -C206 divider_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.01fF -C207 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/Q 0.19fF -C208 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.14fF -C209 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_0/vin 0.19fF -C210 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF -C211 divider_0/nor_1/B divider_0/tspc_1/Z3 0.38fF -C212 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF -C213 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z4 0.08fF -C214 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF -C215 divider_0/nor_0/B divider_0/Out 0.22fF -C216 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.29fF -C217 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF -C218 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF -C219 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF -C220 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF -C221 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF -C222 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF -C223 divbuf_5/a_492_n240# divbuf_5/OUT5 0.01fF -C224 ro_complete_0/a0 ro_complete_0/cbank_2/v 0.05fF -C225 divider_0/tspc_1/Q divider_0/tspc_2/Z1 0.01fF -C226 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF -C227 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF -C228 divider_0/nor_1/B divider_0/and_0/A 0.26fF -C229 divbuf_6/OUT3 divbuf_6/OUT 0.26fF -C230 divbuf_6/OUT4 divbuf_6/OUT5 20.26fF -C231 divider_0/mc2 divider_0/and_0/OUT 0.05fF -C232 divider_0/nor_1/A divider_0/and_0/B 0.08fF -C233 pd_0/DIV pd_0/R 0.51fF -C234 ro_complete_0/a4 ro_complete_0/cbank_2/switch_0/vin 0.12fF -C235 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF -C236 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF -C237 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF -C238 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Q 0.20fF -C239 pd_0/REF pd_0/tspc_r_1/Qbar1 0.12fF -C240 io_clamp_low[0] io_analog[4] 0.53fF -C241 divbuf_1/OUT5 divbuf_1/IN 0.00fF -C242 ro_complete_0/a3 ro_complete_0/cbank_2/v 0.05fF -C243 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF -C244 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.06fF -C245 divbuf_4/OUT3 divbuf_4/OUT 0.26fF -C246 divbuf_4/OUT4 divbuf_4/OUT5 20.26fF -C247 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF -C248 divbuf_3/OUT2 divbuf_3/OUT 0.06fF -C249 divbuf_3/OUT3 divbuf_3/OUT5 0.01fF -C250 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z2 0.01fF -C251 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/D 0.32fF -C252 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF -C253 divbuf_7/a_492_n240# divbuf_7/OUT 0.00fF -C254 ro_complete_0/a3 ro_complete_0/cbank_1/switch_2/vin 0.09fF -C255 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z4 0.12fF -C256 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF -C257 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF -C258 pd_0/DOWN pd_0/UP 0.46fF -C259 pd_0/tspc_r_0/Z4 pd_0/tspc_r_0/z5 0.04fF -C260 divbuf_1/OUT2 divbuf_1/OUT3 1.37fF -C261 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF -C262 divider_0/tspc_1/a_630_n680# divider_0/nor_0/B 0.00fF -C263 divider_0/tspc_0/a_630_n680# divider_0/nor_1/A 0.35fF -C264 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF -C265 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF -C266 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF -C267 divbuf_5/OUT2 divbuf_5/OUT3 1.37fF -C268 divider_0/tspc_0/Q divider_0/tspc_1/a_630_n680# 0.01fF -C269 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF -C270 divider_0/tspc_1/Q divider_0/tspc_2/Z3 0.45fF -C271 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF -C272 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/Out 0.08fF -C273 divbuf_6/OUT5 divbuf_6/OUT 43.38fF -C274 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a1 0.14fF -C275 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF -C276 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a3 0.09fF -C277 divider_0/tspc_0/Z4 divider_0/tspc_0/a_630_n680# 0.12fF -C278 divbuf_4/a_492_n240# divbuf_4/OUT2 0.42fF -C279 pd_0/tspc_r_0/Qbar1 pd_0/R 0.01fF -C280 pd_0/DIV pd_0/tspc_r_0/Z4 0.02fF -C281 pd_0/DOWN pd_0/tspc_r_0/Qbar 0.21fF -C282 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF -C283 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF -C284 divider_0/mc2 divider_0/and_0/out1 0.06fF -C285 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Q 0.04fF -C286 io_clamp_low[1] io_clamp_high[1] 0.53fF -C287 pd_0/tspc_r_1/Z3 pd_0/UP 0.03fF -C288 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z1 0.09fF -C289 pd_0/REF pd_0/tspc_r_1/Z2 0.19fF -C290 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF -C291 divbuf_6/a_492_n240# divbuf_6/OUT2 0.42fF -C292 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.35fF -C293 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF -C294 divbuf_3/OUT4 divbuf_3/OUT 1.11fF -C295 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF -C296 divider_0/prescaler_0/tspc_0/Q divider_0/prescaler_0/tspc_2/D 0.04fF -C297 divbuf_7/IN divbuf_7/OUT5 0.00fF -C298 ro_complete_0/a3 ro_complete_0/cbank_2/switch_1/vin 0.13fF -C299 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF -C300 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF -C301 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF -C302 pd_0/R pd_0/REF 0.61fF -C303 divbuf_1/OUT3 divbuf_1/OUT4 5.16fF -C304 ro_complete_0/a4 ro_complete_0/cbank_2/v 0.05fF -C305 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF -C306 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF -C307 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF -C308 cp_0/a_1710_0# cp_0/out 0.84fF -C309 pd_0/DOWN pd_0/tspc_r_1/Qbar 0.02fF -C310 divbuf_5/OUT2 divbuf_5/OUT5 0.02fF -C311 divbuf_5/OUT3 divbuf_5/OUT4 5.16fF -C312 divbuf_4/a_492_n240# divbuf_4/OUT5 0.01fF -C313 divbuf_3/a_492_n240# divbuf_3/IN 0.13fF -C314 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF -C315 divider_0/tspc_1/Q divider_0/tspc_2/Z4 0.15fF -C316 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF -C317 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/Out 0.11fF -C318 pd_0/tspc_r_1/Z4 pd_0/tspc_r_1/z5 0.04fF -C319 divbuf_2/a_492_n240# divbuf_2/IN 0.13fF -C320 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a1 0.14fF -C321 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z3 0.05fF -C322 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C323 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/z5 0.11fF -C324 filter_0/a_4216_n5230# filter_0/v 0.19fF -C325 ro_complete_0/a5 ro_complete_0/cbank_2/switch_0/vin 0.09fF -C326 divider_0/prescaler_0/Out divider_0/clk 0.51fF -C327 ro_complete_0/a1 ro_complete_0/cbank_2/v 0.05fF -C328 pd_0/DOWN pd_0/and_pd_0/Z1 0.07fF -C329 divider_0/prescaler_0/tspc_0/Q divider_0/prescaler_0/nand_1/z1 0.01fF -C330 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/Out 0.05fF -C331 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF -C332 pd_0/DIV pd_0/tspc_r_0/Z3 0.65fF -C333 divbuf_7/OUT2 divbuf_7/OUT 0.06fF -C334 divbuf_7/OUT3 divbuf_7/OUT5 0.01fF -C335 ro_complete_0/a2 ro_complete_0/cbank_1/v 0.05fF -C336 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/a0 0.13fF -C337 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z4 0.36fF -C338 divider_0/mc2 divider_0/nor_0/B 0.15fF -C339 pd_0/R pd_0/tspc_r_1/Qbar1 0.30fF -C340 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.45fF -C341 cp_0/a_1710_0# cp_0/down 0.32fF -C342 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF -C343 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF -C344 divbuf_5/OUT3 divbuf_5/OUT 0.26fF -C345 divbuf_5/OUT4 divbuf_5/OUT5 20.26fF -C346 divbuf_2/a_492_n240# divbuf_2/OUT2 0.42fF -C347 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF -C348 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF -C349 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/Out 0.28fF -C350 ro_complete_0/a4 ro_complete_0/cbank_2/switch_1/vin 0.09fF -C351 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF -C352 divider_0/and_0/OUT divider_0/and_0/B 0.01fF -C353 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/Out 0.91fF -C354 pd_0/DOWN pd_0/tspc_r_0/z5 0.03fF -C355 pd_0/tspc_r_0/Z2 pd_0/R 0.21fF -C356 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF -C357 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C358 divider_0/prescaler_0/Out divider_0/tspc_0/Z3 0.45fF -C359 io_clamp_low[0] io_clamp_high[0] 0.53fF -C360 divbuf_0/IN divbuf_0/OUT5 0.00fF -C361 divider_0/mc2 divider_0/nor_1/B 0.06fF -C362 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF -C363 divider_0/tspc_0/Z1 divider_0/tspc_0/Z3 0.06fF -C364 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF -C365 pd_0/R pd_0/and_pd_0/Out1 0.33fF -C366 pd_0/REF pd_0/tspc_r_1/Z4 0.02fF -C367 pd_0/UP pd_0/tspc_r_1/Qbar 0.21fF -C368 divbuf_6/a_492_n240# divbuf_6/OUT 0.00fF -C369 ro_complete_0/a4 ro_complete_0/cbank_1/switch_1/vin 0.09fF -C370 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_1/z1 0.21fF -C371 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Qbar1 0.38fF -C372 divbuf_7/OUT4 divbuf_7/OUT 1.11fF -C373 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF -C374 io_clamp_high[2] io_analog[6] 0.53fF -C375 ro_complete_0/a5 ro_complete_0/cbank_2/v 0.08fF -C376 ro_complete_0/a0 ro_complete_0/cbank_1/switch_5/vin 0.09fF -C377 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF -C378 divider_0/nor_1/Z1 divider_0/and_0/A 0.80fF -C379 pd_0/R pd_0/tspc_r_1/Z2 0.21fF -C380 divbuf_5/OUT5 divbuf_5/OUT 43.38fF -C381 divbuf_0/OUT3 divbuf_0/OUT4 5.16fF -C382 divbuf_0/IN divbuf_0/a_492_n240# 0.13fF -C383 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF -C384 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF -C385 divbuf_3/a_492_n240# divbuf_3/OUT5 0.01fF -C386 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF -C387 pd_0/UP pd_0/and_pd_0/Z1 0.06fF -C388 divbuf_7/a_492_n240# divbuf_7/IN 0.13fF -C389 divbuf_2/OUT3 divbuf_2/OUT5 0.01fF -C390 divider_0/tspc_0/Q divider_0/nor_1/A 0.55fF -C391 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF -C392 divider_0/nor_0/B divider_0/tspc_2/Z1 0.03fF -C393 pd_0/tspc_r_0/Z2 pd_0/tspc_r_0/Z4 0.14fF -C394 divbuf_2/OUT3 divbuf_2/OUT 0.26fF -C395 divider_0/mc2 divider_0/and_0/A 0.16fF -C396 divider_0/and_0/out1 divider_0/and_0/B 0.18fF -C397 divider_0/tspc_0/Z2 divider_0/tspc_0/Z3 0.16fF -C398 divbuf_5/a_492_n240# divbuf_5/OUT2 0.42fF -C399 divbuf_0/OUT divbuf_0/OUT3 0.26fF -C400 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF -C401 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/z5 0.11fF -C402 divider_0/nor_1/A divider_0/prescaler_0/tspc_1/Q 0.03fF -C403 divider_0/tspc_1/Q divider_0/tspc_2/a_630_n680# 0.01fF -C404 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/Out 0.11fF -C405 divbuf_6/IN divbuf_6/OUT5 0.00fF -C406 divbuf_1/OUT divbuf_1/OUT2 0.06fF -C407 divbuf_1/OUT5 divbuf_1/OUT3 0.01fF -C408 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF -C409 divider_0/tspc_0/Q divider_0/tspc_1/Z2 0.14fF -C410 divider_0/nor_1/A divider_0/tspc_0/Z3 0.38fF -C411 pd_0/DIV pd_0/tspc_r_0/Z1 0.17fF -C412 pd_0/tspc_r_0/Qbar1 pd_0/DOWN 0.11fF -C413 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF -C414 divider_0/nor_1/B divider_0/nor_1/A 1.21fF -C415 io_clamp_low[1] io_analog[5] 0.53fF -C416 divbuf_1/OUT divbuf_1/a_492_n240# 0.00fF -C417 divider_0/mc2 divider_0/prescaler_0/tspc_0/a_630_n680# 0.33fF -C418 ro_complete_0/a0 ro_complete_0/cbank_1/v 0.05fF -C419 divider_0/tspc_0/Z4 divider_0/tspc_0/Z3 0.65fF -C420 cp_0/a_1710_n2840# cp_0/out 0.61fF -C421 divbuf_4/IN divbuf_4/OUT5 0.00fF -C422 divbuf_0/OUT3 divbuf_0/OUT5 0.01fF -C423 divider_0/tspc_0/Q divider_0/tspc_1/Z1 0.01fF -C424 divbuf_3/OUT2 divbuf_3/OUT3 1.37fF -C425 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.44fF -C426 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/Out 0.21fF -C427 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Z1 0.02fF -C428 ro_complete_0/a2 ro_complete_0/cbank_2/switch_2/vin 0.14fF -C429 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF -C430 divider_0/nor_1/B divider_0/tspc_1/Z2 0.30fF -C431 divider_0/tspc_0/Q divider_0/tspc_1/Z4 0.15fF -C432 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF -C433 divbuf_4/OUT2 divbuf_4/OUT3 1.37fF -C434 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF -C435 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF -C436 divider_0/nor_0/B divider_0/tspc_2/Z3 0.38fF -C437 cp_0/a_1710_n2840# cp_0/upbar 0.29fF -C438 divbuf_2/OUT5 divbuf_2/OUT 43.38fF -C439 ro_complete_0/a3 ro_complete_0/cbank_1/v 0.05fF -C440 divbuf_0/OUT divbuf_0/OUT4 1.11fF -C441 divider_0/tspc_1/Q divider_0/nor_0/B 0.22fF -C442 divider_0/and_0/OUT divider_0/prescaler_0/tspc_0/D 0.03fF -C443 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF -C444 pd_0/UP pd_0/tspc_r_1/z5 0.03fF -C445 pd_0/tspc_r_1/Z2 pd_0/tspc_r_1/Z4 0.14fF -C446 divbuf_6/OUT2 divbuf_6/OUT 0.06fF -C447 divbuf_6/OUT3 divbuf_6/OUT5 0.01fF -C448 divbuf_1/OUT divbuf_1/OUT4 1.11fF -C449 divider_0/nor_1/B divider_0/tspc_1/Z1 0.03fF -C450 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF -C451 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF -C452 divider_0/nor_1/A divider_0/and_0/A 0.01fF -C453 cp_0/a_1710_0# cp_0/a_10_n50# 0.04fF -C454 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z2 0.25fF -C455 divider_0/prescaler_0/m1_2700_2190# divider_0/nor_1/A 0.01fF -C456 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF -C457 divider_0/nor_1/B divider_0/tspc_1/Z4 0.21fF -C458 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.15fF -C459 divider_0/nor_0/B divider_0/and_0/B 0.29fF -C460 pd_0/REF pd_0/tspc_r_1/Z3 0.65fF -C461 divbuf_0/OUT4 divbuf_0/OUT5 20.26fF -C462 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF -C463 divbuf_4/OUT2 divbuf_4/OUT 0.06fF -C464 divbuf_4/OUT3 divbuf_4/OUT5 0.01fF -C465 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF -C466 divbuf_3/OUT2 divbuf_3/OUT5 0.02fF -C467 divbuf_3/OUT3 divbuf_3/OUT4 5.16fF -C468 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/Out 0.04fF -C469 divbuf_7/a_492_n240# divbuf_7/OUT5 0.01fF -C470 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF -C471 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF -C472 divider_0/nor_1/B divider_0/tspc_1/Q 0.51fF -C473 divbuf_4/OUT3 divbuf_4/OUT4 5.16fF -C474 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF -C475 divider_0/nor_0/B divider_0/tspc_2/Z4 0.22fF +C0 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF +C1 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C2 ro_div_new_0/ro_complete_0/cbank_2/switch_5/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF +C3 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF +C4 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/tspc_2/Z4 0.12fF +C5 ro_div_new_0/divider_0/tspc_2/Z1 ro_div_new_0/divider_0/tspc_2/Z2 1.07fF +C6 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/tspc_2/Z3 0.38fF +C7 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF +C8 divbuf_2/OUT5 divbuf_2/OUT 43.38fF +C9 ro_complete_0/a3 ro_complete_0/cbank_1/v 0.05fF +C10 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C11 pd_div_new_0/pd_0/tspc_r_0/Z2 pd_div_new_0/pd_0/DIV 0.19fF +C12 divbuf_5/OUT5 divbuf_5/OUT 43.38fF +C13 pd_0/tspc_r_1/z5 pd_0/tspc_r_1/Z3 0.11fF +C14 pd_div_new_0/divider_0/tspc_2/a_630_n680# pd_div_new_0/divider_0/nor_0/B 0.35fF +C15 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF +C16 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_0/Z4 0.04fF +C17 io_clamp_low[0] io_analog[4] 0.53fF +C18 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.04fF +C19 ro_div_new_0/ro_complete_0/cbank_0/v ro_div_new_0/divider_0/clk 1.27fF +C20 pd_div_new_0/pd_0/tspc_r_1/Z2 pd_div_new_0/pd_0/tspc_r_1/Z4 0.14fF +C21 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF +C22 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF +C23 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/divider_0/clk 1.27fF +C24 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF +C25 pd_0/UP pd_0/tspc_r_1/Qbar 0.21fF +C26 pd_div_new_0/divider_0/tspc_1/Z2 pd_div_new_0/divider_0/tspc_1/a_630_n680# 0.01fF +C27 pd_div_new_0/divider_0/prescaler_0/m1_2700_2190# pd_div_new_0/divider_0/and_0/OUT 0.14fF +C28 pd_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# pd_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.20fF +C29 pd_div_new_0/divider_0/nor_0/Z1 pd_div_new_0/divider_0/nor_0/B 0.06fF +C30 divbuf_7/a_492_n240# divbuf_7/IN 0.13fF +C31 divider_0/tspc_0/Q divider_0/nor_1/A 0.55fF +C32 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Z1 0.06fF +C33 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF +C34 divider_0/nor_0/B divider_0/tspc_2/Z1 0.03fF +C35 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/OUT5 0.02fF +C36 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/nor_0/B 0.22fF +C37 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.03fF +C38 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.09fF +C39 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_new_0/divider_0/prescaler_0/Out 0.08fF +C40 divbuf_0/IN divbuf_0/a_492_n240# 0.13fF +C41 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF +C42 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF +C43 pd_0/DOWN pd_0/UP 0.46fF +C44 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF +C45 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/A 0.80fF +C46 pd_0/R pd_0/tspc_r_0/Qbar1 0.01fF +C47 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z4 pd_div_new_0/divider_0/clk 0.12fF +C48 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C49 divider_0/mc2 divider_0/and_0/A 0.16fF +C50 divider_0/and_0/out1 divider_0/and_0/B 0.18fF +C51 divider_0/tspc_0/Z2 divider_0/tspc_0/Z3 0.16fF +C52 ro_div_new_0/divider_0/tspc_0/Z4 ro_div_new_0/divider_0/tspc_0/a_630_n680# 0.12fF +C53 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.05fF +C54 divbuf_1/OUT4 divbuf_1/OUT 1.11fF +C55 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/and_0/out1 0.31fF +C56 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/and_0/A 0.01fF +C57 ro_complete_0/a2 ro_complete_0/cbank_2/v 0.05fF +C58 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF +C59 pd_div_new_0/pd_0/DOWN pd_div_new_0/pd_0/R 0.36fF +C60 pd_div_new_0/pd_0/tspc_r_0/Z1 pd_div_new_0/pd_0/tspc_r_0/Z2 0.71fF +C61 pd_div_new_0/pd_0/tspc_r_0/Z3 pd_div_new_0/pd_0/tspc_r_0/Z4 0.20fF +C62 divbuf_5/a_492_n240# divbuf_5/OUT2 0.42fF +C63 pd_0/tspc_r_0/Z1 pd_0/DIV 0.17fF +C64 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.04fF +C65 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/clk 0.45fF +C66 ro_div_new_0/ro_complete_0/a5 ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF +C67 pd_div_new_0/divider_0/tspc_0/Z2 pd_div_new_0/divider_0/prescaler_0/Out 0.11fF +C68 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z3 pd_div_new_0/divider_0/clk 0.64fF +C69 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/tspc_r_0/Qbar1 0.01fF +C70 ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin ro_div_new_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF +C71 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/OUT2 0.42fF +C72 divider_0/nor_1/A divider_0/prescaler_0/tspc_1/Q 0.03fF +C73 divider_0/tspc_1/Q divider_0/tspc_2/a_630_n680# 0.01fF +C74 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/Out 0.11fF +C75 ro_div_new_0/divider_0/tspc_1/Z2 ro_div_new_0/divider_0/tspc_1/Z3 0.16fF +C76 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF +C77 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/and_0/B 0.29fF +C78 pd_div_new_0/pd_0/tspc_r_0/Z4 pd_div_new_0/pd_0/tspc_r_1/Z4 0.02fF +C79 pd_div_new_0/pd_0/DOWN pd_div_new_0/pd_0/and_pd_0/Out1 0.12fF +C80 pd_div_new_0/pd_0/REF pd_div_new_0/pd_0/tspc_r_1/Z1 0.17fF +C81 pd_div_new_0/pd_0/tspc_r_1/Qbar1 pd_div_new_0/pd_0/UP 0.11fF +C82 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.04fF +C83 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/nor_1/A 0.55fF +C84 divbuf_6/IN divbuf_6/OUT5 0.00fF +C85 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z3 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF +C86 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/B 0.35fF +C87 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF +C88 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/z5 0.04fF +C89 divider_0/tspc_0/Q divider_0/tspc_1/Z2 0.14fF +C90 ro_div_new_0/divider_0/nor_0/Z1 ro_div_new_0/divider_0/nor_0/B 0.06fF +C91 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF +C92 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF +C93 divider_0/nor_1/A divider_0/tspc_0/Z3 0.38fF +C94 divbuf_1/IN divbuf_1/OUT5 0.00fF +C95 divbuf_3/OUT2 divbuf_3/OUT5 0.02fF +C96 divbuf_3/OUT3 divbuf_3/OUT4 5.16fF +C97 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z2 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C98 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF +C99 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.78fF +C100 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin ro_div_new_0/ro_complete_0/a3 0.13fF +C101 pd_0/DOWN pd_0/tspc_r_0/Qbar1 0.11fF +C102 pd_div_new_0/divider_0/tspc_1/a_630_n680# pd_div_new_0/divider_0/tspc_1/Z4 0.12fF +C103 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z1 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF +C104 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z3 pd_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C105 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z2 0.11fF +C106 pd_0/REF pd_0/tspc_r_1/Z3 0.65fF +C107 pd_div_new_0/divider_0/and_0/B pd_div_new_0/divider_0/and_0/Z1 0.07fF +C108 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z2 0.19fF +C109 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF +C110 divider_0/nor_1/B divider_0/nor_1/A 1.21fF +C111 cp_0/down cp_0/upbar 0.02fF +C112 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF +C113 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/prescaler_0/Out 0.04fF +C114 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF +C115 divbuf_4/OUT2 divbuf_4/OUT5 0.02fF +C116 divbuf_4/OUT3 divbuf_4/OUT4 5.16fF +C117 pd_0/and_pd_0/Out1 pd_0/R 0.33fF +C118 pd_div_new_0/divider_0/nor_0/Z1 pd_div_new_0/divider_0/nor_1/B 0.18fF +C119 pd_div_new_0/divider_0/tspc_0/Z3 pd_div_new_0/divider_0/tspc_0/a_630_n680# 0.05fF +C120 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF +C121 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/clk 0.12fF +C122 divider_0/mc2 divider_0/prescaler_0/tspc_0/a_630_n680# 0.33fF +C123 pd_div_new_0/divider_0/nor_1/A pd_div_new_0/divider_0/tspc_0/Q 0.55fF +C124 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z4 pd_div_new_0/divider_0/clk 0.12fF +C125 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/z5 0.03fF +C126 divider_0/tspc_0/Z4 divider_0/tspc_0/Z3 0.65fF +C127 ro_div_new_0/divider_0/tspc_2/Z2 ro_div_new_0/divider_0/tspc_2/Z3 0.16fF +C128 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/tspc_2/Z4 0.22fF +C129 pd_div_new_0/pd_0/R pd_div_new_0/pd_0/tspc_r_1/Z3 0.29fF +C130 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z2 0.14fF +C131 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/IN 0.00fF +C132 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z2 pd_div_new_0/divider_0/and_0/OUT 0.05fF +C133 pd_div_new_0/pd_0/R pd_div_new_0/pd_0/DIV 0.51fF +C134 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/Out 0.15fF +C135 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/clk 0.64fF +C136 io_clamp_low[1] io_clamp_high[1] 0.53fF +C137 divider_0/tspc_0/Q divider_0/tspc_1/Z1 0.01fF +C138 pd_0/tspc_r_0/Qbar pd_0/tspc_r_0/Qbar1 0.01fF +C139 pd_div_new_0/divider_0/tspc_2/a_630_n680# pd_div_new_0/divider_0/tspc_2/Z2 0.01fF +C140 pd_div_new_0/divider_0/prescaler_0/tspc_1/Q pd_div_new_0/divider_0/clk 0.60fF +C141 ro_div_new_0/divider_0/nor_1/Z1 ro_div_new_0/divider_0/nor_1/B 0.06fF +C142 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF +C143 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/Out 0.21fF +C144 ro_div_new_0/divider_0/tspc_1/Z3 ro_div_new_0/divider_0/tspc_1/Z4 0.65fF +C145 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF +C146 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT3 0.26fF +C147 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF +C148 ro_complete_0/a2 ro_complete_0/cbank_0/switch_2/vin 0.14fF +C149 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/nor_1/A 0.03fF +C150 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF +C151 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF +C152 pd_0/and_pd_0/Out1 pd_0/tspc_r_1/Qbar 0.05fF +C153 pd_div_new_0/divider_0/tspc_1/Q pd_div_new_0/divider_0/tspc_1/a_630_n680# 0.04fF +C154 pd_div_new_0/divider_0/nor_1/A pd_div_new_0/divider_0/tspc_0/Z2 0.23fF +C155 pd_div_new_0/divider_0/prescaler_0/m1_2700_2190# pd_div_new_0/divider_0/prescaler_0/tspc_0/D 0.16fF +C156 pd_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# pd_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.04fF +C157 divider_0/tspc_0/Q divider_0/tspc_1/Z4 0.15fF +C158 divider_0/nor_1/B divider_0/tspc_1/Z2 0.30fF +C159 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF +C160 pd_div_new_0/divider_0/and_0/out1 pd_div_new_0/divider_0/and_0/A 0.01fF +C161 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/tspc_1/Z2 0.01fF +C162 ro_div_new_0/divider_0/tspc_0/Z4 ro_div_new_0/divider_0/tspc_0/Z1 0.00fF +C163 pll_full_0/pd_0/DOWN pll_full_0/cp_0/a_1710_0# 0.04fF +C164 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z2 0.71fF +C165 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF +C166 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF +C167 divider_0/nor_0/B divider_0/tspc_2/Z3 0.38fF +C168 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/Z2 0.14fF +C169 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/prescaler_0/nand_0/z1 0.01fF +C170 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/IN 0.13fF +C171 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C172 pd_0/tspc_r_0/z5 pd_0/tspc_r_1/z5 0.02fF +C173 pd_0/DOWN pd_0/and_pd_0/Out1 0.12fF +C174 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z3 0.65fF +C175 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF +C176 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C177 divbuf_4/a_492_n240# divbuf_4/IN 0.13fF +C178 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z3 pd_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.13fF +C179 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF +C180 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/clk 0.04fF +C181 pd_div_new_0/pd_0/tspc_r_0/Qbar1 pd_div_new_0/pd_0/tspc_r_0/z5 0.20fF +C182 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z1 0.01fF +C183 divbuf_2/OUT5 divbuf_2/a_492_n240# 0.01fF +C184 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/clk 0.12fF +C185 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF +C186 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z4 pd_div_new_0/divider_0/clk 0.12fF +C187 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF +C188 divider_0/tspc_1/Q divider_0/nor_0/B 0.22fF +C189 divider_0/and_0/OUT divider_0/prescaler_0/tspc_0/D 0.03fF +C190 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF +C191 ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF +C192 ro_div_new_0/divider_0/tspc_1/Z3 ro_div_new_0/divider_0/tspc_1/Q 0.05fF +C193 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/clk 0.45fF +C194 pd_div_new_0/pd_0/tspc_r_0/z5 pd_div_new_0/pd_0/tspc_r_1/z5 0.02fF +C195 pd_div_new_0/pd_0/tspc_r_1/Z3 pd_div_new_0/pd_0/tspc_r_1/Z2 0.25fF +C196 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z4 0.15fF +C197 divbuf_2/a_492_n240# divbuf_2/OUT 0.00fF +C198 divbuf_0/a_492_n240# divbuf_0/OUT5 0.01fF +C199 pd_div_new_0/divider_0/nor_1/A pd_div_new_0/divider_0/tspc_1/Z2 0.15fF +C200 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF +C201 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/clk 0.60fF +C202 divbuf_6/OUT2 divbuf_6/OUT 0.06fF +C203 divbuf_6/OUT3 divbuf_6/OUT5 0.01fF +C204 divider_0/nor_1/B divider_0/tspc_1/Z1 0.03fF +C205 pd_0/tspc_r_1/Z2 pd_0/REF 0.19fF +C206 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C207 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF +C208 divider_0/nor_1/A divider_0/and_0/A 0.01fF +C209 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/and_0/B 0.20fF +C210 divbuf_1/OUT2 divbuf_1/OUT 0.06fF +C211 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF +C212 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_0/D 0.16fF +C213 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.05fF +C214 divbuf_3/OUT3 divbuf_3/OUT 0.26fF +C215 divbuf_3/OUT4 divbuf_3/OUT5 20.26fF +C216 pd_div_new_0/divider_0/nor_1/B pd_div_new_0/divider_0/nor_0/B 0.47fF +C217 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z3 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C218 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF +C219 divider_0/prescaler_0/m1_2700_2190# divider_0/nor_1/A 0.01fF +C220 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF +C221 divider_0/nor_1/B divider_0/tspc_1/Z4 0.21fF +C222 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.15fF +C223 divider_0/nor_0/B divider_0/and_0/B 0.29fF +C224 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/tspc_1/Z4 0.12fF +C225 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/tspc_0/Z3 0.05fF +C226 divbuf_0/OUT divbuf_0/OUT4 1.11fF +C227 ro_complete_0/a4 ro_complete_0/cbank_1/switch_1/vin 0.09fF +C228 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF +C229 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF +C230 divbuf_4/OUT3 divbuf_4/OUT 0.26fF +C231 divbuf_4/OUT4 divbuf_4/OUT5 20.26fF +C232 pd_0/tspc_r_1/Z1 pd_0/tspc_r_1/Z3 0.09fF +C233 pd_div_new_0/divider_0/tspc_1/Z2 pd_div_new_0/divider_0/tspc_0/Q 0.14fF +C234 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF +C235 ro_div_new_0/divider_0/tspc_2/Z2 ro_div_new_0/divider_0/tspc_2/Z4 0.36fF +C236 ro_div_new_0/divider_0/tspc_2/Z3 ro_div_new_0/divider_0/Out 0.05fF +C237 ro_complete_0/a1 ro_complete_0/cbank_1/v 0.05fF +C238 pd_div_new_0/pd_0/R pd_div_new_0/pd_0/UP 0.45fF +C239 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/divider_0/clk 1.32fF +C240 pd_div_new_0/divider_0/prescaler_0/m1_2700_2190# pd_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C241 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z2 pd_div_new_0/divider_0/prescaler_0/tspc_0/D 0.09fF +C242 pd_div_new_0/pd_0/tspc_r_0/Z4 pd_div_new_0/pd_0/DIV 0.02fF +C243 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z2 0.23fF +C244 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/clk 0.12fF +C245 pd_div_new_0/divider_0/and_0/OUT pd_div_new_0/divider_0/and_0/Z1 0.04fF +C246 pd_div_new_0/divider_0/tspc_2/a_630_n680# pd_div_new_0/pd_0/DIV 0.04fF +C247 pd_div_new_0/divider_0/nor_0/B pd_div_new_0/divider_0/tspc_2/Z2 0.40fF +C248 pd_div_new_0/divider_0/prescaler_0/tspc_0/Q pd_div_new_0/divider_0/clk 0.05fF +C249 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF +C250 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF +C251 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a2 0.09fF +C252 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/Out 0.04fF +C253 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF +C254 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF +C255 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT5 43.38fF +C256 ro_complete_0/a2 ro_complete_0/cbank_2/switch_3/vin 0.09fF +C257 ro_div_new_0/divider_0/and_0/A ro_div_new_0/divider_0/and_0/B 0.18fF +C258 pll_full_0/pd_0/DIV pll_full_0/divider_0/and_0/OUT 0.01fF +C259 pd_div_new_0/pd_0/UP pd_div_new_0/pd_0/and_pd_0/Out1 0.33fF +C260 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF +C261 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin ro_div_new_0/ro_complete_0/a4 0.09fF +C262 pd_div_new_0/divider_0/nor_1/A pd_div_new_0/divider_0/tspc_1/Z4 0.02fF +C263 pd_div_new_0/divider_0/prescaler_0/m1_2700_2190# pd_div_new_0/divider_0/prescaler_0/nand_0/z1 0.07fF +C264 divbuf_7/a_492_n240# divbuf_7/OUT5 0.01fF +C265 pd_0/tspc_r_1/Z4 pd_0/tspc_r_1/Z3 0.20fF +C266 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z1 0.17fF +C267 divider_0/nor_1/B divider_0/tspc_1/Q 0.51fF +C268 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF +C269 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/tspc_1/Q 0.04fF +C270 ro_div_new_0/divider_0/tspc_0/Q ro_div_new_0/divider_0/nor_1/B 0.22fF +C271 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF +C272 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF +C273 divider_0/nor_0/B divider_0/tspc_2/Z4 0.22fF +C274 ro_div_new_0/divider_0/prescaler_0/tspc_0/D ro_div_new_0/divider_0/prescaler_0/nand_0/z1 0.24fF +C275 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/Out 0.19fF +C276 ro_div_new_0/ro_complete_0/cbank_2/v ro_div_new_0/divider_0/clk 1.36fF +C277 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C278 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z2 pd_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF +C279 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/nor_0/B 0.47fF +C280 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C281 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/divider_0/clk 1.36fF +C282 pd_0/R pd_0/tspc_r_1/Z3 0.29fF +C283 pd_0/DIV pd_0/tspc_r_0/Qbar1 0.12fF +C284 pd_div_new_0/divider_0/tspc_1/Z1 pd_div_new_0/divider_0/tspc_0/Q 0.01fF +C285 pd_div_new_0/divider_0/tspc_0/a_630_n680# pd_div_new_0/divider_0/prescaler_0/Out 0.01fF +C286 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z4 pd_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C287 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z1 pd_div_new_0/divider_0/prescaler_0/tspc_2/D 0.03fF +C288 pd_div_new_0/divider_0/prescaler_0/m1_2700_2190# pd_div_new_0/divider_0/clk 0.01fF +C289 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF +C290 pll_full_0/divbuf_0/a_492_n240# pll_full_0/pd_0/DIV 0.00fF +C291 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z2 0.21fF +C292 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF +C293 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF +C294 divider_0/nor_0/Z1 divider_0/and_0/B 0.78fF +C295 cp_0/down cp_0/a_1710_0# 0.32fF +C296 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C297 ro_div_new_0/divider_0/prescaler_0/tspc_0/D ro_div_new_0/divider_0/clk 0.26fF +C298 ro_complete_0/a3 ro_complete_0/cbank_2/switch_2/vin 0.09fF +C299 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF +C300 divbuf_5/a_492_n240# divbuf_5/OUT 0.00fF +C301 pd_div_new_0/divider_0/tspc_1/Z4 pd_div_new_0/divider_0/tspc_0/Q 0.15fF +C302 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/DOWN 0.03fF +C303 divider_0/nor_1/B divider_0/and_0/B 0.31fF +C304 divider_0/tspc_1/Q divider_0/tspc_2/Z2 0.14fF +C305 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF +C306 ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin ro_div_new_0/divider_0/clk 1.30fF +C307 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF +C308 pd_div_new_0/pd_0/tspc_r_1/Qbar1 pd_div_new_0/pd_0/tspc_r_1/Qbar 0.01fF +C309 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF +C310 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C311 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/divider_0/clk 1.46fF +C312 divbuf_6/OUT4 divbuf_6/OUT 1.11fF +C313 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF +C314 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divbuf_0/IN 0.04fF +C315 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z2 0.40fF +C316 pll_full_0/divider_0/prescaler_0/tspc_0/Q pll_full_0/divider_0/clk 0.05fF +C317 pll_full_0/pd_0/REF pll_full_0/pd_0/DOWN 1.48fF +C318 divider_0/tspc_0/Q divider_0/tspc_0/a_630_n680# 0.04fF +C319 divider_0/and_0/OUT divider_0/clk 0.04fF +C320 divbuf_0/OUT3 divbuf_0/OUT4 5.16fF +C321 ro_div_new_0/divider_0/tspc_0/Z1 ro_div_new_0/divider_0/tspc_0/Z3 0.06fF +C322 ro_div_new_0/ro_complete_0/cbank_1/switch_0/vin ro_div_new_0/ro_complete_0/a5 0.09fF +C323 pd_0/tspc_r_0/Z3 pd_0/R 0.27fF +C324 pd_div_new_0/divider_0/mc2 pd_div_new_0/divider_0/nor_1/A 0.04fF +C325 divbuf_3/OUT5 divbuf_3/OUT 43.38fF +C326 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_1/A 0.15fF +C327 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF +C328 pd_0/tspc_r_1/Z1 pd_0/tspc_r_1/Z2 0.71fF +C329 pd_div_new_0/divider_0/nor_1/B pd_div_new_0/divider_0/tspc_2/Z2 0.20fF +C330 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/divider_0/clk 0.05fF +C331 divider_0/tspc_1/Z3 divider_0/tspc_1/Q 0.05fF +C332 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF +C333 pd_div_new_0/pd_0/tspc_r_0/Z3 pd_div_new_0/pd_0/DOWN 0.03fF +C334 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C335 pd_div_new_0/divider_0/nor_1/Z1 pd_div_new_0/divider_0/nor_1/B 0.06fF +C336 divbuf_4/OUT5 divbuf_4/OUT 43.38fF +C337 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C338 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF +C339 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/clk 0.01fF +C340 pd_0/tspc_r_0/Z4 pd_0/tspc_r_1/Z4 0.02fF +C341 pd_div_new_0/divider_0/nor_1/A pd_div_new_0/divider_0/and_0/B 0.08fF +C342 pd_div_new_0/divider_0/prescaler_0/tspc_1/Q pd_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.19fF +C343 pd_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# pd_div_new_0/divider_0/clk 0.14fF +C344 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/and_0/OUT 0.05fF +C345 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C346 pll_full_0/pd_0/UP pll_full_0/pd_0/DOWN 4.58fF +C347 divider_0/nor_1/B divider_0/tspc_2/Z4 0.02fF +C348 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/a4 0.12fF +C349 pd_0/tspc_r_0/Z2 pd_0/tspc_r_0/Z3 0.25fF +C350 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_0/a_630_n680# 0.04fF +C351 divbuf_0/OUT divbuf_0/OUT5 43.38fF +C352 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF +C353 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/z5 0.20fF +C354 pd_div_new_0/divider_0/tspc_1/Z1 pd_div_new_0/divider_0/tspc_1/Z2 1.07fF +C355 pd_div_new_0/divider_0/nor_1/B pd_div_new_0/divider_0/tspc_1/Z3 0.38fF +C356 pd_div_new_0/divider_0/tspc_0/a_630_n680# pd_div_new_0/divider_0/nor_1/A 0.35fF +C357 pd_div_new_0/divider_0/prescaler_0/m1_2700_2190# pd_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF +C358 pd_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# pd_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF +C359 divbuf_6/a_492_n240# divbuf_6/IN 0.13fF +C360 io_clamp_low[0] io_clamp_high[0] 0.53fF +C361 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF +C362 pd_0/tspc_r_1/Z2 pd_0/tspc_r_1/Z4 0.14fF +C363 pd_div_new_0/divider_0/nor_0/B pd_div_new_0/pd_0/DIV 0.28fF +C364 pd_div_new_0/divider_0/tspc_2/Z1 pd_div_new_0/divider_0/tspc_2/Z3 0.06fF +C365 pd_div_new_0/divider_0/prescaler_0/tspc_2/D pd_div_new_0/divider_0/clk 0.29fF +C366 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF +C367 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF +C368 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z3 0.05fF +C369 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF +C370 ro_div_new_0/ro_complete_0/cbank_0/switch_5/vin ro_div_new_0/ro_complete_0/a0 0.09fF +C371 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF +C372 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a4 0.09fF +C373 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C374 pd_0/tspc_r_0/Z3 pd_0/DOWN 0.03fF +C375 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF +C376 divbuf_3/a_492_n240# divbuf_3/OUT2 0.42fF +C377 pd_0/R pd_0/tspc_r_1/Z2 0.21fF +C378 pd_div_new_0/divider_0/tspc_1/Z2 pd_div_new_0/divider_0/tspc_1/Z4 0.36fF +C379 pd_div_new_0/divider_0/tspc_0/Z1 pd_div_new_0/divider_0/tspc_0/Z4 0.00fF +C380 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z2 pd_div_new_0/divider_0/and_0/OUT 0.06fF +C381 pd_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# pd_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF +C382 pd_div_new_0/divider_0/prescaler_0/m1_2700_2190# pd_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.38fF +C383 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z2 pd_div_new_0/divider_0/clk 0.11fF +C384 divbuf_7/OUT2 divbuf_7/OUT3 1.37fF +C385 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Z3 0.27fF +C386 divider_0/nor_1/B divider_0/tspc_0/a_630_n680# 0.01fF +C387 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF +C388 pd_div_new_0/divider_0/and_0/out1 pd_div_new_0/divider_0/and_0/Z1 0.36fF +C389 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF +C390 divider_0/tspc_2/Z3 divider_0/Out 0.05fF +C391 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.04fF +C392 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_new_0/divider_0/clk 0.45fF +C393 divbuf_2/OUT2 divbuf_2/OUT3 1.37fF +C394 pd_0/UP pd_0/and_pd_0/Out1 0.33fF +C395 pd_0/tspc_r_0/Z2 pd_0/tspc_r_0/Z4 0.14fF +C396 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z2 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C397 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z4 0.02fF +C398 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z2 0.20fF +C399 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/clk 0.01fF +C400 divbuf_4/a_492_n240# divbuf_4/OUT5 0.01fF +C401 pd_div_new_0/divider_0/tspc_1/Q pd_div_new_0/divider_0/tspc_2/Z1 0.01fF +C402 pd_div_new_0/divider_0/tspc_0/a_630_n680# pd_div_new_0/divider_0/tspc_0/Q 0.04fF +C403 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z3 pd_div_new_0/divider_0/prescaler_0/tspc_2/D 0.05fF +C404 pd_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# pd_div_new_0/divider_0/clk 0.01fF +C405 pd_div_new_0/divider_0/nor_1/B pd_div_new_0/divider_0/and_0/A 0.26fF +C406 pll_full_0/pd_0/REF pll_full_0/pd_0/R 0.61fF +C407 divider_0/and_0/A divider_0/and_0/B 0.18fF +C408 ro_div_new_0/divider_0/tspc_0/Q ro_div_new_0/divider_0/nor_1/A 0.55fF +C409 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.05fF +C410 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/nor_0/B 0.35fF +C411 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF +C412 divbuf_2/OUT5 divbuf_2/IN 0.00fF +C413 ro_complete_0/a4 ro_complete_0/cbank_1/v 0.05fF +C414 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/a0 0.09fF +C415 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C416 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C417 pd_div_new_0/pd_0/tspc_r_0/Z3 pd_div_new_0/pd_0/DIV 0.65fF +C418 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/Out 0.01fF +C419 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.19fF +C420 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/clk 0.14fF +C421 divbuf_5/IN divbuf_5/OUT5 0.00fF +C422 cp_0/out cp_0/a_1710_n2840# 0.61fF +C423 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_0/z1 0.24fF +C424 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/Out 0.19fF +C425 io_clamp_high[2] io_analog[6] 0.53fF +C426 ro_div_new_0/divider_0/prescaler_0/Out ro_div_new_0/divider_0/tspc_0/Z2 0.11fF +C427 pd_div_new_0/pd_0/tspc_r_1/Z1 pd_div_new_0/pd_0/tspc_r_1/Z2 0.71fF +C428 pd_div_new_0/pd_0/tspc_r_1/Z3 pd_div_new_0/pd_0/tspc_r_1/Z4 0.20fF +C429 pd_div_new_0/pd_0/REF pd_div_new_0/pd_0/tspc_r_1/z5 0.04fF +C430 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF +C431 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z3 0.38fF +C432 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF +C433 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF +C434 pd_div_new_0/divider_0/tspc_1/Z1 pd_div_new_0/divider_0/tspc_1/Z4 0.00fF +C435 pd_div_new_0/divider_0/tspc_0/a_630_n680# pd_div_new_0/divider_0/tspc_0/Z2 0.01fF +C436 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z4 pd_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF +C437 pll_full_0/divider_0/nor_0/B pll_full_0/divbuf_0/IN 0.29fF +C438 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF +C439 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/clk 0.29fF +C440 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF +C441 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z2 0.01fF +C442 pll_full_0/pd_0/REF pll_full_0/divbuf_1/OUT5 0.00fF +C443 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.26fF +C444 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF +C445 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/Out 0.11fF +C446 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF +C447 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z1 0.09fF +C448 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF +C449 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF +C450 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF +C451 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF +C452 pd_0/tspc_r_1/Qbar1 pd_0/REF 0.12fF +C453 pd_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# pd_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.15fF +C454 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z2 pd_div_new_0/divider_0/and_0/OUT 0.06fF +C455 pd_div_new_0/divider_0/nor_1/Z1 pd_div_new_0/divider_0/and_0/A 0.80fF +C456 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF +C457 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF +C458 ro_div_new_0/divider_0/tspc_0/Q ro_div_new_0/divider_0/tspc_1/Z2 0.14fF +C459 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C460 divbuf_0/OUT3 divbuf_0/OUT5 0.01fF +C461 cp_0/a_10_n50# cp_0/a_1710_0# 0.04fF +C462 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/prescaler_0/Out 0.15fF +C463 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/clk 0.64fF +C464 pd_div_new_0/pd_0/tspc_r_0/Z3 pd_div_new_0/pd_0/tspc_r_0/Z1 0.09fF +C465 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z1 0.01fF +C466 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF +C467 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/clk 0.01fF +C468 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/A 0.26fF +C469 pd_div_new_0/divider_0/prescaler_0/tspc_1/Q pd_div_new_0/divider_0/prescaler_0/tspc_2/D 0.32fF +C470 pd_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# pd_div_new_0/divider_0/clk 0.01fF +C471 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C472 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.45fF +C473 ro_complete_0/a5 ro_complete_0/cbank_0/switch_0/vin 0.09fF +C474 ro_div_new_0/divider_0/nor_1/Z1 ro_div_new_0/divider_0/and_0/B 0.18fF +C475 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF +C476 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/nor_1/A 1.21fF +C477 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin ro_div_new_0/divider_0/clk 1.30fF +C478 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF +C479 ro_complete_0/a0 ro_complete_0/cbank_2/switch_4/vin 0.13fF +C480 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF +C481 pd_0/tspc_r_0/z5 pd_0/DOWN 0.03fF +C482 pd_div_new_0/pd_0/R pd_div_new_0/pd_0/tspc_r_1/Qbar 0.03fF +C483 pll_full_0/ro_complete_0/a4 pll_full_0/divider_0/clk 0.11fF +C484 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin 0.19fF +C485 pd_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# pd_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF +C486 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z1 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C487 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/B 0.08fF +C488 pd_div_new_0/divider_0/tspc_2/Z1 pd_div_new_0/divider_0/tspc_2/Z4 0.00fF +C489 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF +C490 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/and_0/out1 0.06fF +C491 ro_div_new_0/divider_0/tspc_0/Z4 ro_div_new_0/divider_0/tspc_0/Z3 0.65fF +C492 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF +C493 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C494 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_new_0/divider_0/clk 0.01fF +C495 ro_div_new_0/divider_0/and_0/B ro_div_new_0/divider_0/and_0/Z1 0.07fF +C496 pd_div_new_0/pd_0/tspc_r_1/Qbar pd_div_new_0/pd_0/and_pd_0/Out1 0.05fF +C497 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF +C498 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF +C499 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF +C500 divbuf_7/OUT2 divbuf_7/OUT5 0.02fF +C501 divbuf_7/OUT3 divbuf_7/OUT4 5.16fF +C502 pd_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# pd_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF +C503 pd_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# pd_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF +C504 pd_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# pd_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.04fF +C505 pll_full_0/pd_0/R pll_full_0/pd_0/DOWN 0.36fF +C506 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF +C507 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z4 0.00fF +C508 divbuf_1/OUT3 divbuf_1/OUT4 5.16fF +C509 ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.44fF +C510 pll_full_0/ro_complete_0/a5 pll_full_0/divider_0/clk 0.15fF +C511 divbuf_1/a_492_n240# divbuf_1/IN 0.13fF +C512 ro_complete_0/a5 ro_complete_0/cbank_1/switch_0/vin 0.09fF +C513 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 ro_div_new_0/divider_0/clk 0.12fF +C514 pll_full_0/pd_0/DIV pll_full_0/divider_0/clk 2.26fF +C515 divbuf_2/OUT2 divbuf_2/OUT5 0.02fF +C516 divbuf_2/OUT3 divbuf_2/OUT4 5.16fF +C517 divbuf_0/OUT divbuf_0/a_492_n240# 0.00fF +C518 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/switch_1/vin 0.19fF +C519 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF +C520 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF +C521 pd_div_new_0/divider_0/tspc_1/Q pd_div_new_0/divider_0/tspc_2/Z3 0.45fF +C522 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z4 pd_div_new_0/divider_0/prescaler_0/tspc_2/D 0.11fF +C523 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z1 pd_div_new_0/divider_0/prescaler_0/Out 0.08fF +C524 filter_0/a_4216_n5230# filter_0/v 0.19fF +C525 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF +C526 ro_div_new_0/divider_0/tspc_0/Q ro_div_new_0/divider_0/tspc_1/Z4 0.15fF +C527 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Z2 0.30fF +C528 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C529 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF +C530 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C531 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/tspc_2/Z2 0.01fF +C532 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/clk 0.60fF +C533 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C534 divbuf_2/OUT2 divbuf_2/OUT 0.06fF +C535 divbuf_5/OUT2 divbuf_5/OUT 0.06fF +C536 divbuf_5/OUT3 divbuf_5/OUT5 0.01fF +C537 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z2 0.01fF +C538 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/D 0.32fF +C539 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/clk 0.01fF +C540 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z1 0.09fF +C541 divider_0/and_0/OUT divider_0/prescaler_0/tspc_0/Q 0.04fF +C542 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF +C543 io_clamp_low[1] io_analog[5] 0.53fF +C544 ro_div_new_0/ro_complete_0/cbank_1/switch_4/vin ro_div_new_0/divider_0/clk 1.30fF +C545 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT5 0.01fF +C546 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT4 5.16fF +C547 divbuf_1/a_492_n240# divbuf_1/OUT5 0.01fF +C548 ro_complete_0/a5 ro_complete_0/cbank_2/v 0.08fF +C549 ro_div_new_0/divider_0/and_0/out1 ro_div_new_0/divider_0/and_0/A 0.01fF +C550 pd_div_new_0/pd_0/R pd_div_new_0/pd_0/and_pd_0/Z1 0.02fF +C551 pd_div_new_0/pd_0/tspc_r_1/Qbar1 pd_div_new_0/pd_0/tspc_r_1/z5 0.20fF +C552 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF +C553 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C554 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF +C555 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/divider_0/clk 1.46fF +C556 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF +C557 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Q 0.04fF +C558 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF +C559 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C560 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Out1 0.33fF +C561 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/DIV 0.65fF +C562 divider_0/tspc_2/a_630_n680# divider_0/nor_0/B 0.35fF +C563 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.13fF +C564 pd_0/tspc_r_0/Z3 pd_0/DIV 0.65fF +C565 pd_div_new_0/pd_0/and_pd_0/Out1 pd_div_new_0/pd_0/and_pd_0/Z1 0.18fF +C566 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_0/B 0.00fF +C567 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/nor_1/A 0.35fF +C568 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF +C569 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF +C570 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF +C571 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF +C572 pd_0/UP pd_0/tspc_r_1/Z3 0.03fF +C573 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF +C574 cp_0/vbias cp_0/a_10_n50# 0.19fF +C575 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/and_0/OUT 0.05fF +C576 divider_0/prescaler_0/Out divider_0/tspc_0/Z2 0.11fF +C577 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_0/Z2 0.23fF +C578 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 ro_div_new_0/divider_0/clk 0.12fF +C579 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT3 0.26fF +C580 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/switch_1/vin 0.20fF +C581 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z3 0.45fF +C582 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF +C583 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/Out 0.08fF +C584 pd_div_new_0/divider_0/prescaler_0/tspc_0/Q pd_div_new_0/divider_0/prescaler_0/tspc_2/D 0.04fF +C585 pd_div_new_0/divider_0/prescaler_0/tspc_1/Q pd_div_new_0/divider_0/prescaler_0/nand_1/z1 0.22fF +C586 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF +C587 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF +C588 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF +C589 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C590 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/nor_1/A 0.01fF +C591 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Z4 0.21fF +C592 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT3 1.37fF +C593 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF +C594 pd_div_new_0/pd_0/REF pd_div_new_0/pd_0/tspc_r_1/Qbar1 0.12fF +C595 divbuf_2/a_492_n240# divbuf_2/IN 0.13fF +C596 pd_0/DIV pd_0/tspc_r_0/Z4 0.02fF +C597 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z2 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C598 pd_div_new_0/divider_0/mc2 pd_div_new_0/divider_0/and_0/B 0.20fF +C599 divbuf_6/a_492_n240# divbuf_6/OUT5 0.01fF +C600 pd_div_new_0/divider_0/tspc_2/Z3 pd_div_new_0/divider_0/tspc_2/Z4 0.65fF +C601 divider_0/mc2 divider_0/nor_1/A 0.04fF +C602 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/Z2 0.14fF +C603 divider_0/nor_1/A divider_0/prescaler_0/Out 0.15fF +C604 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.64fF +C605 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C606 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C607 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/clk 0.01fF +C608 pll_full_0/pd_0/DIV pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF +C609 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.04fF +C610 divbuf_3/a_492_n240# divbuf_3/OUT 0.00fF +C611 divbuf_0/OUT2 divbuf_0/OUT5 0.02fF +C612 pd_div_new_0/divider_0/tspc_0/Z3 pd_div_new_0/divider_0/tspc_0/Z4 0.65fF +C613 pd_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# pd_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF +C614 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z1 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C615 divbuf_7/OUT3 divbuf_7/OUT 0.26fF +C616 divbuf_7/OUT4 divbuf_7/OUT5 20.26fF +C617 ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin ro_div_new_0/ro_complete_0/a4 0.12fF +C618 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/Z3 0.38fF +C619 divider_0/tspc_0/Z1 divider_0/nor_1/A 0.03fF +C620 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Z4 0.65fF +C621 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF +C622 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF +C623 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF +C624 divbuf_2/OUT4 divbuf_2/OUT5 20.26fF +C625 ro_complete_0/a2 ro_complete_0/cbank_1/v 0.05fF +C626 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_1/B 0.18fF +C627 pd_0/tspc_r_1/Qbar1 pd_0/R 0.30fF +C628 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/clk 0.11fF +C629 pd_div_new_0/divider_0/tspc_1/a_630_n680# pd_div_new_0/divider_0/nor_0/B 0.00fF +C630 pd_div_new_0/divider_0/tspc_1/Q pd_div_new_0/divider_0/tspc_2/Z4 0.15fF +C631 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z3 pd_div_new_0/divider_0/prescaler_0/Out 0.11fF +C632 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z2 pd_div_new_0/divider_0/clk 0.11fF +C633 divider_0/tspc_0/Z4 divider_0/prescaler_0/Out 0.12fF +C634 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF +C635 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF +C636 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF +C637 divider_0/and_0/B divider_0/and_0/Z1 0.07fF +C638 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Q 0.51fF +C639 ro_div_new_0/divider_0/tspc_1/Z1 ro_div_new_0/divider_0/tspc_1/Z3 0.06fF +C640 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/and_0/Z1 0.04fF +C641 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/Out 0.04fF +C642 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/tspc_2/Z2 0.40fF +C643 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q ro_div_new_0/divider_0/clk 0.05fF +C644 divbuf_2/OUT4 divbuf_2/OUT 1.11fF +C645 pd_div_new_0/pd_0/DOWN pd_div_new_0/pd_0/UP 0.49fF +C646 pd_div_new_0/pd_0/tspc_r_0/Z4 pd_div_new_0/pd_0/tspc_r_0/z5 0.04fF +C647 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF +C648 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C649 pd_div_new_0/divider_0/prescaler_0/m1_2700_2190# pd_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C650 pd_div_new_0/pd_0/tspc_r_0/Z1 pd_div_new_0/pd_0/DIV 0.17fF +C651 pll_full_0/divider_0/prescaler_0/tspc_0/Q pll_full_0/divider_0/prescaler_0/tspc_2/D 0.04fF +C652 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF +C653 divbuf_5/OUT4 divbuf_5/OUT 1.11fF +C654 pd_0/tspc_r_1/z5 pd_0/REF 0.04fF +C655 divider_0/tspc_0/Z4 divider_0/tspc_0/Z1 0.00fF +C656 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z3 0.33fF +C657 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/nor_0/B 0.15fF +C658 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF +C659 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF +C660 divbuf_1/OUT3 divbuf_1/OUT2 1.37fF +C661 ro_div_new_0/divider_0/tspc_1/Z2 ro_div_new_0/divider_0/nor_1/A 0.15fF +C662 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT4 20.26fF +C663 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C664 ro_complete_0/a0 ro_complete_0/cbank_2/switch_5/vin 0.09fF +C665 pd_0/tspc_r_0/z5 pd_0/DIV 0.04fF +C666 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C667 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/Qbar 0.01fF +C668 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Qbar1 0.38fF +C669 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF +C670 pd_div_new_0/divider_0/prescaler_0/Out pd_div_new_0/divider_0/clk 0.51fF +C671 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF +C672 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF +C673 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF +C674 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/and_0/B 0.31fF +C675 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C676 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.03fF +C677 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.44fF +C678 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/Out 0.12fF +C679 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF +C680 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C681 ro_div_new_0/divider_0/nor_0/Z1 ro_div_new_0/divider_0/nor_1/B 0.18fF +C682 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF +C683 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_0/D 0.16fF +C684 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Q 0.05fF +C685 ro_div_new_0/divider_0/tspc_0/Q ro_div_new_0/divider_0/tspc_0/a_630_n680# 0.04fF +C686 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C687 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.09fF +C688 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF +C689 divider_0/and_0/out1 divider_0/and_0/A 0.01fF +C690 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT5 43.38fF +C691 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF +C692 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C693 divbuf_1/OUT3 divbuf_1/OUT 0.26fF +C694 divbuf_1/OUT4 divbuf_1/OUT5 20.26fF +C695 pd_div_new_0/pd_0/DOWN pd_div_new_0/pd_0/tspc_r_0/Qbar 0.21fF +C696 pd_div_new_0/pd_0/tspc_r_0/Qbar1 pd_div_new_0/pd_0/R 0.01fF +C697 divbuf_2/OUT2 divbuf_2/a_492_n240# 0.42fF +C698 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.45fF +C699 pll_full_0/filter_0/a_4216_n5230# pll_full_0/divider_0/clk 1.58fF +C700 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z1 0.00fF +C701 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF +C702 divbuf_5/a_492_n240# divbuf_5/IN 0.13fF +C703 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z4 0.15fF +C704 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/Out 0.11fF +C705 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/clk 0.11fF +C706 pd_div_new_0/divider_0/prescaler_0/tspc_0/Q pd_div_new_0/divider_0/prescaler_0/nand_1/z1 0.01fF +C707 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z3 pd_div_new_0/divider_0/prescaler_0/Out 0.05fF +C708 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z2 pd_div_new_0/divider_0/clk 0.11fF +C709 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF +C710 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF +C711 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.20fF +C712 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT2 0.06fF +C713 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT5 0.02fF +C714 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF +C715 ro_complete_0/a2 ro_complete_0/cbank_1/switch_3/vin 0.09fF +C716 pd_div_new_0/pd_0/tspc_r_1/Z3 pd_div_new_0/pd_0/UP 0.03fF +C717 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z3 0.05fF +C718 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C719 divbuf_6/OUT2 divbuf_6/OUT3 1.37fF +C720 pd_div_new_0/divider_0/nor_1/B pd_div_new_0/divider_0/tspc_1/a_630_n680# 0.35fF +C721 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z2 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF +C722 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z4 0.02fF +C723 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C724 divider_0/nor_1/A divider_0/tspc_0/Z2 0.23fF +C725 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF +C726 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_1/Z4 0.02fF +C727 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_2/Z4 0.02fF +C728 ro_div_new_0/ro_complete_0/cbank_1/switch_5/vin ro_div_new_0/divider_0/clk 1.30fF +C729 pd_div_new_0/divider_0/tspc_0/Z1 pd_div_new_0/divider_0/tspc_0/Z3 0.06fF +C730 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z1 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C731 divbuf_3/IN divbuf_3/OUT5 0.00fF +C732 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF +C733 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/divider_0/clk 1.46fF +C734 divbuf_7/OUT5 divbuf_7/OUT 43.38fF +C735 ro_div_new_0/ro_complete_0/a5 ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin 0.09fF +C736 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z2 pd_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C737 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z2 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF +C738 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/clk 0.51fF +C739 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z3 0.25fF +C740 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/DOWN 0.11fF +C741 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF +C742 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF +C743 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.19fF +C744 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/prescaler_0/Out 0.01fF +C745 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.19fF +C746 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/clk 0.14fF +C747 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT2 0.06fF +C748 pd_div_new_0/divider_0/mc2 pd_div_new_0/divider_0/and_0/OUT 0.05fF +C749 divbuf_4/IN divbuf_4/OUT5 0.00fF +C750 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z4 pd_div_new_0/divider_0/prescaler_0/Out 0.28fF +C751 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF +C752 pll_full_0/pd_0/R pll_full_0/pd_0/DIV 0.51fF +C753 divider_0/nor_1/Z1 divider_0/and_0/B 0.18fF +C754 divider_0/nor_1/B divider_0/nor_0/B 0.47fF +C755 divider_0/tspc_0/Z4 divider_0/tspc_0/Z2 0.36fF +C756 divider_0/tspc_0/Q divider_0/tspc_0/Z3 0.05fF +C757 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF +C758 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.01fF +C759 cp_0/a_1710_n2840# cp_0/upbar 0.29fF +C760 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_0/a_630_n680# 0.01fF +C761 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/nor_0/B 0.00fF +C762 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C763 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/Out 0.22fF +C764 ro_div_new_0/divider_0/tspc_2/Z1 ro_div_new_0/divider_0/tspc_2/Z3 0.06fF +C765 ro_div_new_0/divider_0/prescaler_0/tspc_2/D ro_div_new_0/divider_0/clk 0.29fF +C766 pd_div_new_0/pd_0/R pd_div_new_0/pd_0/REF 0.61fF +C767 divbuf_0/a_492_n240# divbuf_0/OUT2 0.42fF +C768 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF +C769 pd_0/tspc_r_0/z5 pd_0/tspc_r_0/Qbar1 0.20fF +C770 pll_full_0/divider_0/prescaler_0/tspc_0/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF +C771 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF +C772 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/clk 0.11fF +C773 divider_0/tspc_0/Q divider_0/nor_1/B 0.22fF +C774 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z4 0.08fF +C775 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF +C776 pd_div_new_0/divider_0/and_0/OUT pd_div_new_0/divider_0/and_0/B 0.01fF +C777 pd_div_new_0/divider_0/prescaler_0/tspc_1/Q pd_div_new_0/divider_0/prescaler_0/Out 0.91fF +C778 io_clamp_high[0] io_analog[4] 0.53fF +C779 divbuf_0/OUT3 divbuf_0/OUT 0.26fF +C780 ro_div_new_0/divider_0/tspc_1/Z2 ro_div_new_0/divider_0/tspc_1/Z4 0.36fF +C781 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/and_0/OUT 0.06fF +C782 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF +C783 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF +C784 ro_div_new_0/divider_0/and_0/out1 ro_div_new_0/divider_0/and_0/Z1 0.36fF +C785 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF +C786 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF +C787 ro_complete_0/a0 ro_complete_0/cbank_2/v 0.05fF +C788 pd_div_new_0/divider_0/tspc_1/Z3 pd_div_new_0/divider_0/tspc_1/a_630_n680# 0.05fF +C789 pd_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# pd_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C790 divbuf_7/a_492_n240# divbuf_7/OUT2 0.42fF +C791 divider_0/tspc_0/Z4 divider_0/nor_1/A 0.21fF +C792 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF +C793 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.33fF +C794 pd_div_new_0/divider_0/prescaler_0/Out pd_div_new_0/divider_0/tspc_0/Z4 0.12fF +C795 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C796 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF +C797 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF +C798 divider_0/tspc_2/a_630_n680# divider_0/Out 0.04fF +C799 divider_0/nor_0/B divider_0/tspc_2/Z2 0.40fF +C800 divider_0/prescaler_0/tspc_0/Q divider_0/clk 0.05fF +C801 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF +C802 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/Z1 0.01fF +C803 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.05fF +C804 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/IN 5.26fF +C805 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.18fF +C806 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z2 0.36fF +C807 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_0/Z3 0.05fF +C808 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C809 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF +C810 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/clk 0.01fF +C811 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z2 pd_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C812 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_0/Z3 0.11fF +C813 divider_0/tspc_1/Z2 divider_0/nor_1/A 0.15fF +C814 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF +C815 divider_0/mc2 divider_0/and_0/B 0.20fF +C816 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/and_0/B 0.08fF +C817 pd_div_new_0/pd_0/tspc_r_0/Z3 pd_div_new_0/pd_0/tspc_r_0/z5 0.11fF +C818 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/nor_1/B 0.22fF +C819 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C820 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/prescaler_0/Out 0.28fF +C821 pd_0/tspc_r_1/z5 pd_0/tspc_r_1/Z4 0.04fF +C822 pd_div_new_0/divider_0/prescaler_0/tspc_2/D pd_div_new_0/divider_0/prescaler_0/nand_1/z1 0.21fF +C823 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Qbar1 0.01fF +C824 divider_0/nor_0/Z1 divider_0/nor_1/B 0.18fF +C825 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF +C826 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.03fF +C827 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF +C828 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF +C829 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF +C830 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.04fF +C831 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.11fF +C832 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/clk 0.11fF +C833 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a1 0.14fF +C834 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/switch_1/vin 0.19fF +C835 ro_complete_0/a3 ro_complete_0/cbank_2/v 0.05fF +C836 pd_div_new_0/pd_0/tspc_r_1/Z3 pd_div_new_0/pd_0/tspc_r_1/Z1 0.09fF +C837 pd_div_new_0/pd_0/REF pd_div_new_0/pd_0/tspc_r_1/Z2 0.19fF +C838 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/nor_1/A 0.21fF +C839 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF +C840 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/Out 0.91fF +C841 divbuf_6/OUT2 divbuf_6/OUT5 0.02fF +C842 divbuf_6/OUT3 divbuf_6/OUT4 5.16fF +C843 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF +C844 divider_0/tspc_0/Q divider_0/tspc_1/Z3 0.45fF +C845 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/and_0/A 0.16fF +C846 ro_div_new_0/ro_complete_0/cbank_1/switch_4/vin ro_div_new_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF +C847 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.15fF +C848 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/and_0/OUT 0.06fF +C849 divbuf_1/OUT2 divbuf_1/OUT5 0.02fF +C850 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF +C851 divbuf_3/OUT2 divbuf_3/OUT 0.06fF +C852 divbuf_3/OUT3 divbuf_3/OUT5 0.01fF +C853 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C854 pd_div_new_0/divider_0/nor_1/A pd_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.03fF +C855 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z2 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF +C856 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z3 0.45fF +C857 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z2 0.25fF +C858 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.05fF +C859 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT5 0.01fF +C860 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/tspc_0/Z2 0.01fF +C861 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.32fF +C862 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/clk 0.01fF +C863 ro_complete_0/a3 ro_complete_0/cbank_1/switch_2/vin 0.09fF +C864 divbuf_4/OUT2 divbuf_4/OUT 0.06fF +C865 divbuf_4/OUT3 divbuf_4/OUT5 0.01fF +C866 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z3 0.06fF +C867 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C868 pd_0/tspc_r_1/Z1 pd_0/REF 0.17fF +C869 pd_div_new_0/divider_0/nor_1/A pd_div_new_0/divider_0/tspc_0/Z4 0.21fF +C870 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin ro_div_new_0/ro_complete_0/a1 0.14fF +C871 ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin ro_div_new_0/ro_complete_0/a3 0.09fF +C872 divider_0/nor_1/A divider_0/tspc_1/Z4 0.02fF +C873 divider_0/nor_1/B divider_0/tspc_2/Z2 0.20fF +C874 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF +C875 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF +C876 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF +C877 ro_div_new_0/divider_0/tspc_2/Z1 ro_div_new_0/divider_0/tspc_2/Z4 0.00fF +C878 divbuf_1/OUT5 divbuf_1/OUT 43.38fF +C879 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF +C880 pd_div_new_0/pd_0/DOWN pd_div_new_0/pd_0/tspc_r_1/Qbar 0.02fF +C881 pd_div_new_0/pd_0/R pd_div_new_0/pd_0/tspc_r_1/Qbar1 0.30fF +C882 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z3 0.45fF +C883 pll_full_0/ro_complete_0/a2 pll_full_0/divider_0/clk 0.11fF +C884 pd_div_new_0/divider_0/mc2 pd_div_new_0/divider_0/and_0/out1 0.06fF +C885 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z1 pd_div_new_0/divider_0/prescaler_0/tspc_0/D 0.15fF +C886 pd_div_new_0/divider_0/nor_1/B pd_div_new_0/divider_0/nor_1/A 1.21fF +C887 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF +C888 pd_div_new_0/divider_0/tspc_2/a_630_n680# pd_div_new_0/divider_0/tspc_2/Z3 0.05fF +C889 pd_div_new_0/divider_0/nor_0/B pd_div_new_0/divider_0/tspc_2/Z1 0.03fF +C890 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Qbar1 0.12fF +C891 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF +C892 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF +C893 ro_div_new_0/ro_complete_0/cbank_0/switch_5/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF +C894 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C895 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF +C896 divider_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.01fF +C897 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/Q 0.19fF +C898 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.14fF +C899 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/nor_1/A 0.35fF +C900 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF +C901 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF +C902 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/divider_0/clk 0.05fF +C903 pd_div_new_0/divider_0/mc2 pd_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.33fF +C904 pll_full_0/ro_complete_0/a0 pll_full_0/divider_0/clk 0.01fF +C905 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C906 pd_0/tspc_r_1/Z4 pd_0/REF 0.02fF +C907 pd_div_new_0/divider_0/and_0/out1 pd_div_new_0/divider_0/and_0/B 0.18fF +C908 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF +C909 divider_0/nor_1/B divider_0/tspc_1/Z3 0.38fF +C910 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z4 0.08fF +C911 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF +C912 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/tspc_1/Z3 0.05fF +C913 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/DIV 0.17fF +C914 divider_0/nor_0/B divider_0/Out 0.22fF +C915 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF +C916 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.29fF +C917 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/Z3 0.45fF +C918 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.11fF +C919 ro_complete_0/a2 ro_complete_0/cbank_2/switch_2/vin 0.14fF +C920 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a3 0.09fF +C921 pd_0/tspc_r_1/Qbar1 pd_0/UP 0.11fF +C922 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z3 pd_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF +C923 divbuf_4/a_492_n240# divbuf_4/OUT2 0.42fF +C924 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF +C925 pd_0/R pd_0/REF 0.61fF +C926 pd_div_new_0/divider_0/tspc_1/Q pd_div_new_0/divider_0/tspc_2/a_630_n680# 0.01fF +C927 pd_div_new_0/divider_0/nor_1/B pd_div_new_0/divider_0/tspc_0/Q 0.22fF +C928 pd_div_new_0/divider_0/prescaler_0/m1_2700_2190# pd_div_new_0/divider_0/prescaler_0/Out 0.11fF +C929 ro_div_new_0/ro_complete_0/cbank_1/switch_0/vin ro_div_new_0/divider_0/clk 1.45fF +C930 ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF +C931 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/UP 0.11fF +C932 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/DOWN 0.03fF +C933 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF +C934 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF +C935 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF +C936 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF +C937 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.44fF +C938 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF +C939 pd_div_new_0/pd_0/DOWN pd_div_new_0/pd_0/tspc_r_0/z5 0.03fF +C940 pd_div_new_0/pd_0/tspc_r_0/Z2 pd_div_new_0/pd_0/R 0.21fF +C941 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z2 0.01fF +C942 divbuf_0/OUT divbuf_0/OUT2 0.06fF +C943 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF +C944 divbuf_5/a_492_n240# divbuf_5/OUT5 0.01fF +C945 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Z2 0.21fF +C946 pd_div_new_0/divider_0/tspc_0/Z2 pd_div_new_0/divider_0/tspc_0/Z4 0.36fF +C947 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF +C948 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C949 divider_0/tspc_1/Q divider_0/tspc_2/Z1 0.01fF +C950 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF +C951 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF +C952 divider_0/nor_1/B divider_0/and_0/A 0.26fF +C953 cp_0/a_1710_n2840# cp_0/a_1710_0# 0.83fF +C954 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/and_0/OUT 0.14fF +C955 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/divider_0/clk 0.05fF +C956 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF +C957 pd_div_new_0/pd_0/DOWN pd_div_new_0/pd_0/and_pd_0/Z1 0.07fF +C958 pll_full_0/ro_complete_0/a3 pll_full_0/divider_0/clk 0.11fF +C959 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z2 pd_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF +C960 divbuf_6/OUT3 divbuf_6/OUT 0.26fF +C961 divbuf_6/OUT4 divbuf_6/OUT5 20.26fF +C962 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF +C963 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z1 0.03fF +C964 divider_0/mc2 divider_0/and_0/OUT 0.05fF +C965 pd_0/tspc_r_1/Z2 pd_0/tspc_r_1/Z3 0.25fF +C966 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF +C967 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar 0.02fF +C968 divider_0/nor_1/A divider_0/and_0/B 0.08fF +C969 ro_div_new_0/divider_0/tspc_0/Z1 ro_div_new_0/divider_0/tspc_0/Z2 1.07fF +C970 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 ro_div_new_0/divider_0/clk 0.12fF +C971 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF +C972 divbuf_3/OUT4 divbuf_3/OUT 1.11fF +C973 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C974 ro_div_new_0/ro_complete_0/cbank_1/switch_0/vin ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin 0.19fF +C975 pd_div_new_0/divider_0/nor_0/Z1 pd_div_new_0/divider_0/and_0/B 0.78fF +C976 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z3 0.65fF +C977 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF +C978 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z3 0.16fF +C979 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF +C980 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF +C981 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Q 0.20fF +C982 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF +C983 ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF +C984 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.04fF +C985 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/prescaler_0/nand_1/z1 0.22fF +C986 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF +C987 pd_div_new_0/pd_0/tspc_r_0/Z3 pd_div_new_0/pd_0/tspc_r_0/Qbar1 0.38fF +C988 ro_complete_0/a3 ro_complete_0/cbank_2/switch_1/vin 0.13fF +C989 pd_0/and_pd_0/Z1 pd_0/R 0.02fF +C990 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z4 0.20fF +C991 pd_div_new_0/divider_0/tspc_0/Z1 pd_div_new_0/divider_0/nor_1/A 0.03fF +C992 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF +C993 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF +C994 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/Out 0.11fF +C995 divbuf_4/OUT4 divbuf_4/OUT 1.11fF +C996 pd_div_new_0/divider_0/tspc_1/Z3 pd_div_new_0/divider_0/tspc_0/Q 0.45fF +C997 pd_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# pd_div_new_0/divider_0/prescaler_0/Out 0.21fF +C998 pd_div_new_0/divider_0/nor_1/A pd_div_new_0/divider_0/and_0/A 0.01fF +C999 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/DIV 0.12fF +C1000 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF +C1001 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.06fF +C1002 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin ro_div_new_0/ro_complete_0/a1 0.14fF +C1003 ro_div_new_0/divider_0/tspc_0/Z1 ro_div_new_0/divider_0/nor_1/A 0.03fF +C1004 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C1005 ro_div_new_0/divider_0/tspc_2/Z3 ro_div_new_0/divider_0/tspc_2/Z4 0.65fF +C1006 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF +C1007 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF +C1008 pd_div_new_0/divider_0/prescaler_0/m1_2700_2190# pd_div_new_0/divider_0/nor_1/A 0.01fF +C1009 pd_div_new_0/divider_0/nor_1/B pd_div_new_0/divider_0/tspc_1/Z2 0.30fF +C1010 pd_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# pd_div_new_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1011 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z3 pd_div_new_0/divider_0/prescaler_0/tspc_0/D 0.05fF +C1012 pd_div_new_0/pd_0/tspc_r_0/z5 pd_div_new_0/pd_0/DIV 0.04fF +C1013 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z3 0.38fF +C1014 pd_div_new_0/divider_0/tspc_2/a_630_n680# pd_div_new_0/divider_0/tspc_2/Z4 0.12fF +C1015 pd_div_new_0/divider_0/tspc_2/Z1 pd_div_new_0/divider_0/tspc_2/Z2 1.07fF +C1016 pd_div_new_0/divider_0/nor_0/B pd_div_new_0/divider_0/tspc_2/Z3 0.38fF +C1017 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/UP 0.03fF +C1018 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF +C1019 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/OUT5 0.01fF +C1020 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF +C1021 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z2 0.01fF +C1022 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/D 0.32fF +C1023 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF +C1024 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF +C1025 ro_div_new_0/divider_0/tspc_0/Z4 ro_div_new_0/divider_0/prescaler_0/Out 0.12fF +C1026 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF +C1027 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C1028 divbuf_3/a_492_n240# divbuf_3/IN 0.13fF +C1029 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF +C1030 pd_div_new_0/pd_0/tspc_r_1/Z4 pd_div_new_0/pd_0/tspc_r_1/z5 0.04fF +C1031 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF +C1032 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.20fF +C1033 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/nor_1/A 1.21fF +C1034 pd_0/and_pd_0/Z1 pd_0/tspc_r_1/Qbar 0.02fF +C1035 divbuf_7/a_492_n240# divbuf_7/OUT 0.00fF +C1036 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF +C1037 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z4 0.12fF +C1038 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF +C1039 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF +C1040 ro_div_new_0/divider_0/tspc_0/Q ro_div_new_0/divider_0/tspc_1/Z1 0.01fF +C1041 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C1042 ro_div_new_0/divider_0/nor_0/Z1 ro_div_new_0/divider_0/and_0/B 0.78fF +C1043 ro_div_new_0/ro_complete_0/a1 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF +C1044 divbuf_0/OUT3 divbuf_0/OUT2 1.37fF +C1045 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/Z4 0.15fF +C1046 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_new_0/divider_0/prescaler_0/Out 0.11fF +C1047 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/clk 0.11fF +C1048 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF +C1049 pd_0/DOWN pd_0/and_pd_0/Z1 0.07fF +C1050 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z3 pd_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF +C1051 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z1 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C1052 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF +C1053 pd_div_new_0/divider_0/tspc_1/Q pd_div_new_0/divider_0/nor_0/B 0.22fF +C1054 pd_div_new_0/divider_0/and_0/OUT pd_div_new_0/divider_0/prescaler_0/tspc_0/D 0.03fF +C1055 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z2 pd_div_new_0/divider_0/prescaler_0/tspc_2/D 0.09fF +C1056 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar 0.03fF +C1057 divider_0/tspc_1/a_630_n680# divider_0/nor_0/B 0.00fF +C1058 divider_0/tspc_0/a_630_n680# divider_0/nor_1/A 0.35fF +C1059 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF +C1060 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF +C1061 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF +C1062 filter_0/v filter_0/a_4216_n2998# 0.31fF +C1063 pd_0/tspc_r_0/z5 pd_0/tspc_r_0/Z3 0.11fF +C1064 pd_div_new_0/pd_0/tspc_r_0/Z2 pd_div_new_0/pd_0/tspc_r_0/Z4 0.14fF +C1065 divbuf_5/OUT2 divbuf_5/OUT3 1.37fF +C1066 pd_div_new_0/divider_0/nor_1/B pd_div_new_0/divider_0/tspc_1/Z1 0.03fF +C1067 pd_div_new_0/divider_0/tspc_0/Z1 pd_div_new_0/divider_0/tspc_0/Z2 1.07fF +C1068 pd_div_new_0/divider_0/mc2 pd_div_new_0/divider_0/nor_0/B 0.15fF +C1069 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/Out 0.21fF +C1070 pd_div_new_0/divider_0/and_0/OUT pd_div_new_0/divider_0/and_0/out1 0.31fF +C1071 divider_0/tspc_0/Q divider_0/tspc_1/a_630_n680# 0.01fF +C1072 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF +C1073 ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin ro_div_new_0/ro_complete_0/a0 0.13fF +C1074 pll_full_0/pd_0/REF pll_full_0/divbuf_1/a_492_n240# 0.13fF +C1075 divider_0/tspc_1/Q divider_0/tspc_2/Z3 0.45fF +C1076 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF +C1077 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/Out 0.08fF +C1078 io_clamp_low[2] io_analog[6] 0.53fF +C1079 ro_complete_0/a5 ro_complete_0/cbank_2/switch_0/vin 0.09fF +C1080 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.16fF +C1081 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF +C1082 ro_div_new_0/divider_0/prescaler_0/Out ro_div_new_0/divider_0/clk 0.51fF +C1083 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C1084 ro_complete_0/a1 ro_complete_0/cbank_2/v 0.05fF +C1085 pd_div_new_0/pd_0/R pd_div_new_0/pd_0/and_pd_0/Out1 0.33fF +C1086 pd_div_new_0/pd_0/UP pd_div_new_0/pd_0/tspc_r_1/Qbar 0.21fF +C1087 pd_div_new_0/pd_0/REF pd_div_new_0/pd_0/tspc_r_1/Z4 0.02fF +C1088 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z2 0.30fF +C1089 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1090 divbuf_6/OUT5 divbuf_6/OUT 43.38fF +C1091 pd_div_new_0/divider_0/tspc_1/Z2 pd_div_new_0/divider_0/tspc_1/Z3 0.16fF +C1092 pd_div_new_0/divider_0/nor_1/B pd_div_new_0/divider_0/tspc_1/Z4 0.21fF +C1093 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF +C1094 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF +C1095 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z3 0.38fF +C1096 ro_div_new_0/ro_complete_0/a5 ro_div_new_0/ro_complete_0/cbank_2/v 0.08fF +C1097 pd_div_new_0/divider_0/nor_0/B pd_div_new_0/divider_0/and_0/B 0.29fF +C1098 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar1 0.30fF +C1099 divider_0/tspc_0/Z4 divider_0/tspc_0/a_630_n680# 0.12fF +C1100 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF +C1101 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C1102 pd_0/tspc_r_0/z5 pd_0/tspc_r_0/Z4 0.04fF +C1103 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin ro_div_new_0/divider_0/clk 1.30fF +C1104 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z1 0.71fF +C1105 divider_0/mc2 divider_0/and_0/out1 0.06fF +C1106 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Q 0.04fF +C1107 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Z1 0.03fF +C1108 ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin ro_div_new_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF +C1109 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q ro_div_new_0/divider_0/prescaler_0/nand_1/z1 0.01fF +C1110 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/prescaler_0/Out 0.05fF +C1111 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/clk 0.11fF +C1112 pd_div_new_0/pd_0/tspc_r_0/Qbar1 pd_div_new_0/pd_0/DOWN 0.11fF +C1113 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/a0 0.13fF +C1114 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF +C1115 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF +C1116 pd_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# pd_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF +C1117 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_0/B 0.22fF +C1118 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF +C1119 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF +C1120 pd_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# pd_div_new_0/divider_0/prescaler_0/Out 0.04fF +C1121 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF +C1122 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF +C1123 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/DIV 0.19fF +C1124 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF +C1125 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF +C1126 ro_div_new_0/divider_0/nor_1/Z1 ro_div_new_0/divider_0/and_0/A 0.80fF +C1127 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/divider_0/clk 0.05fF +C1128 ro_complete_0/a5 ro_complete_0/cbank_1/v 0.10fF +C1129 pd_div_new_0/pd_0/R pd_div_new_0/pd_0/tspc_r_1/Z2 0.21fF +C1130 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z1 0.03fF +C1131 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/a_630_n680# 0.12fF +C1132 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF +C1133 divbuf_6/a_492_n240# divbuf_6/OUT2 0.42fF +C1134 pd_0/UP pd_0/tspc_r_1/z5 0.03fF +C1135 pd_div_new_0/divider_0/nor_1/B pd_div_new_0/divider_0/tspc_1/Q 0.51fF +C1136 pd_div_new_0/divider_0/tspc_1/Z1 pd_div_new_0/divider_0/tspc_1/Z3 0.06fF +C1137 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF +C1138 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/A 0.01fF +C1139 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.35fF +C1140 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF +C1141 pd_div_new_0/divider_0/tspc_2/Z2 pd_div_new_0/divider_0/tspc_2/Z3 0.16fF +C1142 pd_div_new_0/divider_0/nor_0/B pd_div_new_0/divider_0/tspc_2/Z4 0.22fF +C1143 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1144 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF +C1145 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C1146 divider_0/prescaler_0/tspc_0/Q divider_0/prescaler_0/tspc_2/D 0.04fF +C1147 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF +C1148 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/nor_0/B 0.47fF +C1149 ro_div_new_0/divider_0/tspc_0/Z4 ro_div_new_0/divider_0/tspc_0/Z2 0.36fF +C1150 ro_div_new_0/divider_0/tspc_0/Q ro_div_new_0/divider_0/tspc_0/Z3 0.05fF +C1151 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C1152 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF +C1153 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C1154 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.20fF +C1155 pd_0/tspc_r_0/Z2 pd_0/R 0.21fF +C1156 pd_div_new_0/divider_0/mc2 pd_div_new_0/divider_0/nor_1/B 0.06fF +C1157 pd_div_new_0/pd_0/UP pd_div_new_0/pd_0/and_pd_0/Z1 0.06fF +C1158 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/nor_1/A 0.01fF +C1159 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF +C1160 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z4 0.21fF +C1161 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.15fF +C1162 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF +C1163 divbuf_7/IN divbuf_7/OUT5 0.00fF +C1164 pd_0/R pd_0/tspc_r_1/Qbar 0.03fF +C1165 pd_div_new_0/divider_0/tspc_1/Z3 pd_div_new_0/divider_0/tspc_1/Z4 0.65fF +C1166 pd_div_new_0/divider_0/tspc_0/Z3 pd_div_new_0/divider_0/prescaler_0/Out 0.45fF +C1167 pd_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# pd_div_new_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF +C1168 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z3 pd_div_new_0/divider_0/clk 0.45fF +C1169 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.29fF +C1170 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/DOWN 0.21fF +C1171 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF +C1172 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C1173 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF +C1174 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 ro_div_new_0/divider_0/prescaler_0/Out 0.28fF +C1175 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF +C1176 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF +C1177 pd_0/DOWN pd_0/R 0.36fF +C1178 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z3 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C1179 divbuf_4/a_492_n240# divbuf_4/OUT 0.00fF +C1180 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF +C1181 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/R 0.29fF +C1182 pd_div_new_0/divider_0/nor_1/B pd_div_new_0/divider_0/and_0/B 0.31fF +C1183 pd_div_new_0/divider_0/tspc_1/Q pd_div_new_0/divider_0/tspc_2/Z2 0.14fF +C1184 pd_div_new_0/divider_0/tspc_0/a_630_n680# pd_div_new_0/divider_0/tspc_0/Z4 0.12fF +C1185 pd_div_new_0/divider_0/and_0/OUT pd_div_new_0/divider_0/prescaler_0/nand_0/z1 0.01fF +C1186 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF +C1187 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF +C1188 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF +C1189 ro_div_new_0/divider_0/tspc_0/Z4 ro_div_new_0/divider_0/nor_1/A 0.21fF +C1190 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C1191 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF +C1192 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z4 0.02fF +C1193 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a4 0.12fF +C1194 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/and_0/B 0.01fF +C1195 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/prescaler_0/Out 0.91fF +C1196 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF +C1197 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C1198 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1199 pd_div_new_0/divider_0/nor_1/B pd_div_new_0/divider_0/tspc_0/a_630_n680# 0.01fF +C1200 pd_div_new_0/pd_0/tspc_r_0/Qbar1 pd_div_new_0/pd_0/DIV 0.12fF +C1201 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/Out 0.04fF +C1202 divbuf_5/OUT2 divbuf_5/OUT5 0.02fF +C1203 divbuf_5/OUT3 divbuf_5/OUT4 5.16fF +C1204 pd_div_new_0/divider_0/and_0/OUT pd_div_new_0/divider_0/clk 0.04fF +C1205 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_0/switch_0/vin 0.09fF +C1206 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/DIV 0.04fF +C1207 divider_0/tspc_1/Q divider_0/tspc_2/Z4 0.15fF +C1208 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/Out 0.11fF +C1209 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF +C1210 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF +C1211 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/nand_0/z1 0.07fF +C1212 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C1213 ro_div_new_0/ro_complete_0/a1 ro_div_new_0/divider_0/clk 0.05fF +C1214 ro_div_new_0/divider_0/prescaler_0/Out ro_div_new_0/divider_0/tspc_0/Z3 0.45fF +C1215 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT4 5.16fF +C1216 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF +C1217 pd_div_new_0/pd_0/tspc_r_1/Z3 pd_div_new_0/pd_0/tspc_r_1/z5 0.11fF +C1218 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Q 0.51fF +C1219 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF +C1220 pll_full_0/ro_complete_0/a1 pll_full_0/divider_0/clk 0.11fF +C1221 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF +C1222 pd_0/DOWN pd_0/tspc_r_1/Qbar 0.02fF +C1223 pd_div_new_0/divider_0/tspc_1/Z3 pd_div_new_0/divider_0/tspc_1/Q 0.05fF +C1224 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF +C1225 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z4 0.22fF +C1226 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z3 0.05fF +C1227 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C1228 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF +C1229 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C1230 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/clk 0.01fF +C1231 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF +C1232 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF +C1233 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin ro_div_new_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF +C1234 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/Z3 0.38fF +C1235 pd_div_new_0/divider_0/nor_1/B pd_div_new_0/divider_0/tspc_2/Z4 0.02fF +C1236 pd_div_new_0/divider_0/nor_1/Z1 pd_div_new_0/divider_0/and_0/B 0.18fF +C1237 pd_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# pd_div_new_0/divider_0/clk 0.01fF +C1238 divider_0/prescaler_0/Out divider_0/clk 0.51fF +C1239 ro_div_new_0/divider_0/tspc_0/Q ro_div_new_0/divider_0/tspc_1/Z3 0.45fF +C1240 ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF +C1241 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a2 0.09fF +C1242 ro_div_new_0/divider_0/prescaler_0/tspc_2/D ro_div_new_0/divider_0/prescaler_0/nand_1/z1 0.21fF +C1243 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF +C1244 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1245 pd_div_new_0/pd_0/tspc_r_0/Z3 pd_div_new_0/pd_0/tspc_r_0/Z2 0.25fF +C1246 pd_div_new_0/divider_0/tspc_0/Z3 pd_div_new_0/divider_0/nor_1/A 0.38fF +C1247 pd_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# pd_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C1248 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.31fF +C1249 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z2 0.14fF +C1250 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF +C1251 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C1252 ro_div_new_0/ro_complete_0/a5 ro_div_new_0/divider_0/clk 0.10fF +C1253 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF +C1254 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1255 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C1256 ro_complete_0/a4 ro_complete_0/cbank_2/v 0.05fF +C1257 ro_complete_0/a0 ro_complete_0/cbank_1/switch_5/vin 0.09fF +C1258 pd_div_new_0/pd_0/REF pd_div_new_0/pd_0/tspc_r_1/Z3 0.65fF +C1259 pd_0/DOWN pd_0/tspc_r_0/Qbar 0.21fF +C1260 pd_div_new_0/divider_0/mc2 pd_div_new_0/divider_0/and_0/A 0.16fF +C1261 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z1 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C1262 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/clk 0.05fF +C1263 pd_div_new_0/divider_0/tspc_2/Z2 pd_div_new_0/divider_0/tspc_2/Z4 0.36fF +C1264 pd_div_new_0/divider_0/tspc_2/Z3 pd_div_new_0/pd_0/DIV 0.05fF +C1265 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/z5 0.20fF +C1266 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF +C1267 divider_0/prescaler_0/tspc_0/Q divider_0/prescaler_0/nand_1/z1 0.01fF +C1268 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/Out 0.05fF +C1269 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF +C1270 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_2/Z2 0.20fF +C1271 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF +C1272 divbuf_3/a_492_n240# divbuf_3/OUT5 0.01fF +C1273 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF +C1274 pd_0/tspc_r_0/Z2 pd_0/tspc_r_0/Z1 0.71fF +C1275 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Q 0.05fF +C1276 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF +C1277 pd_div_new_0/divider_0/tspc_0/Z3 pd_div_new_0/divider_0/tspc_0/Q 0.05fF +C1278 divbuf_7/OUT2 divbuf_7/OUT 0.06fF +C1279 divbuf_7/OUT3 divbuf_7/OUT5 0.01fF +C1280 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/nor_1/B 0.06fF +C1281 pd_div_new_0/divider_0/and_0/A pd_div_new_0/divider_0/and_0/B 0.18fF +C1282 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z4 0.36fF +C1283 divider_0/mc2 divider_0/nor_0/B 0.15fF +C1284 ro_div_new_0/ro_complete_0/cbank_0/v ro_div_new_0/ro_complete_0/cbank_2/v 0.04fF +C1285 divbuf_1/a_492_n240# divbuf_1/OUT2 0.42fF +C1286 divbuf_2/OUT3 divbuf_2/OUT5 0.01fF +C1287 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a1 0.14fF +C1288 pd_0/UP pd_0/and_pd_0/Z1 0.06fF +C1289 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z4 0.02fF +C1290 pd_div_new_0/divider_0/prescaler_0/tspc_0/D pd_div_new_0/divider_0/prescaler_0/nand_0/z1 0.24fF +C1291 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z2 pd_div_new_0/divider_0/prescaler_0/Out 0.19fF +C1292 cp_0/out cp_0/a_1710_0# 0.84fF +C1293 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF +C1294 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF +C1295 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF +C1296 ro_div_new_0/divider_0/tspc_1/Z1 ro_div_new_0/divider_0/tspc_1/Z2 1.07fF +C1297 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Z3 0.38fF +C1298 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF +C1299 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF +C1300 pll_full_0/divbuf_1/a_492_n240# pll_full_0/divbuf_1/OUT5 0.01fF +C1301 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF +C1302 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/tspc_2/Z3 0.05fF +C1303 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/tspc_2/Z1 0.03fF +C1304 divbuf_2/OUT3 divbuf_2/OUT 0.26fF +C1305 divbuf_0/IN divbuf_0/OUT5 0.00fF +C1306 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C1307 divbuf_5/OUT3 divbuf_5/OUT 0.26fF +C1308 divbuf_5/OUT4 divbuf_5/OUT5 20.26fF +C1309 pd_div_new_0/divider_0/tspc_0/Z3 pd_div_new_0/divider_0/tspc_0/Z2 0.16fF +C1310 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z3 0.05fF +C1311 io_clamp_low[2] io_clamp_high[2] 0.53fF +C1312 pd_div_new_0/divider_0/prescaler_0/tspc_0/D pd_div_new_0/divider_0/clk 0.26fF +C1313 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF +C1314 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/tspc_0/Q 0.01fF +C1315 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_0/vin 0.19fF +C1316 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/Out 0.28fF +C1317 io_clamp_high[1] io_analog[5] 0.53fF +C1318 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.38fF +C1319 pll_full_0/divbuf_1/OUT4 pll_full_0/divbuf_1/OUT5 20.26fF +C1320 divbuf_1/a_492_n240# divbuf_1/OUT 0.00fF +C1321 ro_div_new_0/divider_0/and_0/out1 ro_div_new_0/divider_0/and_0/B 0.18fF +C1322 ro_div_new_0/divider_0/tspc_0/Z2 ro_div_new_0/divider_0/tspc_0/Z3 0.16fF +C1323 pd_div_new_0/pd_0/UP pd_div_new_0/pd_0/tspc_r_1/z5 0.03fF +C1324 divbuf_0/OUT4 divbuf_0/OUT5 20.26fF +C1325 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF +C1326 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF +C1327 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C1328 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z4 pd_div_new_0/divider_0/prescaler_0/tspc_0/D 0.11fF +C1329 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF +C1330 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divbuf_0/IN 0.05fF +C1331 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_0/Z4 0.02fF +C1332 divider_0/and_0/OUT divider_0/and_0/B 0.01fF +C1333 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/Out 0.91fF +C1334 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/a_492_n240# 0.00fF +C1335 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/OUT3 1.37fF +C1336 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.03fF +C1337 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/a_630_n680# 0.01fF +C1338 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/clk 0.01fF +C1339 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/and_0/A 0.26fF +C1340 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C1341 pd_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# pd_div_new_0/divider_0/clk 0.01fF +C1342 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF +C1343 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C1344 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.15fF +C1345 divider_0/prescaler_0/Out divider_0/tspc_0/Z3 0.45fF +C1346 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT4 1.11fF +C1347 pll_full_0/divbuf_1/a_492_n240# pll_full_0/divbuf_1/OUT2 0.42fF +C1348 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT4 1.11fF +C1349 divbuf_1/OUT3 divbuf_1/OUT5 0.01fF +C1350 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_0/Z3 0.38fF +C1351 pd_div_new_0/pd_0/tspc_r_0/Qbar1 pd_div_new_0/pd_0/tspc_r_0/Qbar 0.01fF +C1352 pd_div_new_0/pd_0/tspc_r_0/Z3 pd_div_new_0/pd_0/R 0.27fF +C1353 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF +C1354 pd_0/R pd_0/DIV 0.51fF +C1355 pd_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# pd_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C1356 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF +C1357 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/Out 0.19fF +C1358 divider_0/mc2 divider_0/nor_1/B 0.06fF +C1359 pd_div_new_0/divider_0/tspc_1/a_630_n680# pd_div_new_0/divider_0/tspc_0/Q 0.01fF +C1360 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF +C1361 ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF +C1362 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z4 0.14fF +C1363 divider_0/tspc_0/Z1 divider_0/tspc_0/Z3 0.06fF +C1364 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF +C1365 ro_div_new_0/divider_0/tspc_1/Z1 ro_div_new_0/divider_0/tspc_1/Z4 0.00fF +C1366 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF +C1367 pd_div_new_0/pd_0/tspc_r_1/Z3 pd_div_new_0/pd_0/tspc_r_1/Qbar1 0.38fF +C1368 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z2 0.01fF +C1369 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/divider_0/clk 1.61fF +C1370 ro_complete_0/a0 ro_complete_0/cbank_1/v 0.05fF +C1371 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z1 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF +C1372 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z3 pd_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.05fF +C1373 divbuf_6/a_492_n240# divbuf_6/OUT 0.00fF +C1374 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/clk 0.26fF +C1375 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/nor_1/B 0.35fF +C1376 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C1377 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF +C1378 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_1/z1 0.21fF +C1379 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a3 0.13fF +C1380 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C1381 pd_0/tspc_r_0/Z2 pd_0/DIV 0.19fF +C1382 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z1 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C1383 pd_div_new_0/pd_0/tspc_r_1/Qbar pd_div_new_0/pd_0/and_pd_0/Z1 0.02fF +C1384 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF +C1385 divbuf_3/OUT2 divbuf_3/OUT3 1.37fF +C1386 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z1 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF +C1387 divbuf_7/OUT4 divbuf_7/OUT 1.11fF +C1388 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/Out 0.21fF +C1389 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/divider_0/clk 1.46fF +C1390 ro_complete_0/a4 ro_complete_0/cbank_2/switch_1/vin 0.09fF +C1391 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF +C1392 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF +C1393 pd_0/and_pd_0/Out1 pd_0/and_pd_0/Z1 0.18fF +C1394 pd_0/UP pd_0/R 0.45fF +C1395 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/clk 0.45fF +C1396 divbuf_4/OUT2 divbuf_4/OUT3 1.37fF +C1397 pd_div_new_0/divider_0/nor_1/A pd_div_new_0/divider_0/prescaler_0/Out 0.15fF +C1398 pd_div_new_0/divider_0/and_0/OUT pd_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.04fF +C1399 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z3 pd_div_new_0/divider_0/clk 0.45fF +C1400 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF +C1401 divider_0/nor_1/Z1 divider_0/and_0/A 0.80fF +C1402 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/nor_1/A 0.04fF +Xpd_div_new_0/pd_0 VDD gnd pd_div_new_0/pd_0/REF pd_div_new_0/pd_0/DIV pd_div_new_0/pd_0/UP ++ pd_div_new_0/pd_0/DOWN pd_div_new_0/pd_0/R pd +Xpd_div_new_0/divider_0 gnd vdd pd_div_new_0/pd_0/DIV pd_div_new_0/divider_0/clk pd_div_new_0/divider_0/mc2 ++ divider Xpd_0 VDD gnd pd_0/REF pd_0/DIV pd_0/UP pd_0/DOWN pd_0/R pd +Xro_div_new_0/ro_complete_0 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/a1 ++ ro_div_new_0/ro_complete_0/a5 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/a3 ++ ro_div_new_0/ro_complete_0/a2 ro_complete +Xro_div_new_0/divider_0 gnd vdd ro_div_new_0/divider_0/Out ro_div_new_0/divider_0/clk ++ ro_div_new_0/divider_0/mc2 divider Xcp_0 cp_0/vbias vdd gnd cp_0/out cp_0/down cp_0/upbar cp Xfilter_0 gnd filter_0/v filter Xro_complete_0 ro_complete_0/a0 ro_complete_0/a1 ro_complete_0/a5 ro_complete_0/a4 @@ -604,842 +1540,1123 @@ Xdivbuf_7 VDD divbuf_7/IN divbuf_7/OUT divbuf_7/OUT2 divbuf_7/OUT3 divbuf_7/OUT4 divbuf_7/OUT5 + gnd divbuf Xdivider_0 gnd vdd divider_0/Out divider_0/clk divider_0/mc2 divider -C476 io_analog[4] vdd 25.05fF -C477 io_analog[5] vdd 25.05fF -C478 io_analog[6] vdd 25.05fF -C479 io_in_3v3[0] vdd 0.61fF -C480 io_oeb[26] vdd 0.61fF -C481 io_in[0] vdd 0.61fF -C482 io_out[26] vdd 0.61fF -C483 io_out[0] vdd 0.61fF -C484 io_in[26] vdd 0.61fF -C485 io_oeb[0] vdd 0.61fF -C486 io_in_3v3[26] vdd 0.61fF -C487 io_in_3v3[1] vdd 0.61fF -C488 io_oeb[25] vdd 0.61fF -C489 io_in[1] vdd 0.61fF -C490 io_out[25] vdd 0.61fF -C491 io_out[1] vdd 0.61fF -C492 io_in[25] vdd 0.61fF -C493 io_oeb[1] vdd 0.61fF -C494 io_in_3v3[25] vdd 0.61fF -C495 io_in_3v3[2] vdd 0.61fF -C496 io_oeb[24] vdd 0.61fF -C497 io_in[2] vdd 0.61fF -C498 io_out[24] vdd 0.61fF -C499 io_out[2] vdd 0.61fF -C500 io_in[24] vdd 0.61fF -C501 io_oeb[2] vdd 0.61fF -C502 io_in_3v3[24] vdd 0.61fF -C503 io_in_3v3[3] vdd 0.61fF -C504 gpio_noesd[17] vdd 0.61fF -C505 io_in[3] vdd 0.61fF -C506 gpio_analog[17] vdd 0.61fF -C507 io_out[3] vdd 0.61fF -C508 io_oeb[3] vdd 0.61fF -C509 io_in_3v3[4] vdd 0.61fF -C510 io_in[4] vdd 0.61fF -C511 io_out[4] vdd 0.61fF -C512 io_oeb[4] vdd 0.61fF -C513 io_oeb[23] vdd 0.61fF -C514 io_out[23] vdd 0.61fF -C515 io_in[23] vdd 0.61fF -C516 io_in_3v3[23] vdd 0.61fF -C517 gpio_noesd[16] vdd 0.61fF -C518 gpio_analog[16] vdd 0.61fF -C519 io_in_3v3[5] vdd 0.61fF -C520 io_in[5] vdd 0.61fF -C521 io_out[5] vdd 0.61fF -C522 io_oeb[5] vdd 0.61fF -C523 io_oeb[22] vdd 0.61fF -C524 io_out[22] vdd 0.61fF -C525 io_in[22] vdd 0.61fF -C526 io_in_3v3[22] vdd 0.61fF -C527 gpio_noesd[15] vdd 0.61fF -C528 gpio_analog[15] vdd 0.61fF -C529 io_in_3v3[6] vdd 0.61fF -C530 io_in[6] vdd 0.61fF -C531 io_out[6] vdd 0.61fF -C532 io_oeb[6] vdd 0.61fF -C533 io_oeb[21] vdd 0.61fF -C534 io_out[21] vdd 0.61fF -C535 io_in[21] vdd 0.61fF -C536 io_in_3v3[21] vdd 0.61fF -C537 gpio_noesd[14] vdd 0.61fF -C538 gpio_analog[14] vdd 0.61fF -C539 vssa1 vdd 26.08fF -C540 vssd2 vdd 13.04fF -C541 vssd1 vdd 13.04fF -C542 vdda2 vdd 13.04fF -C543 vdda1 vdd 26.08fF -C544 io_oeb[20] vdd 0.61fF -C545 io_out[20] vdd 0.61fF -C546 io_in[20] vdd 0.61fF -C547 io_in_3v3[20] vdd 0.61fF -C548 gpio_noesd[13] vdd 0.61fF -C549 gpio_analog[13] vdd 0.61fF -C550 gpio_analog[0] vdd 0.61fF -C551 gpio_noesd[0] vdd 0.61fF -C552 io_in_3v3[7] vdd 0.61fF -C553 io_in[7] vdd 0.61fF -C554 io_out[7] vdd 0.61fF -C555 io_oeb[7] vdd 0.61fF -C556 io_oeb[19] vdd 0.61fF -C557 io_out[19] vdd 0.61fF -C558 io_in[19] vdd 0.61fF -C559 io_in_3v3[19] vdd 0.61fF -C560 gpio_noesd[12] vdd 0.61fF -C561 gpio_analog[12] vdd 0.61fF -C562 gpio_analog[1] vdd 0.61fF -C563 gpio_noesd[1] vdd 0.61fF -C564 io_in_3v3[8] vdd 0.61fF -C565 io_in[8] vdd 0.61fF -C566 io_out[8] vdd 0.61fF -C567 io_oeb[8] vdd 0.61fF -C568 io_oeb[18] vdd 0.61fF -C569 io_out[18] vdd 0.61fF -C570 io_in[18] vdd 0.61fF -C571 io_in_3v3[18] vdd 0.61fF -C572 gpio_noesd[11] vdd 0.61fF -C573 gpio_analog[11] vdd 0.61fF -C574 gpio_analog[2] vdd 0.61fF -C575 gpio_noesd[2] vdd 0.61fF -C576 io_in_3v3[9] vdd 0.61fF -C577 io_in[9] vdd 0.61fF -C578 io_out[9] vdd 0.61fF -C579 io_oeb[9] vdd 0.61fF -C580 io_oeb[17] vdd 0.61fF -C581 io_out[17] vdd 0.61fF -C582 io_in[17] vdd 0.61fF -C583 io_in_3v3[17] vdd 0.61fF -C584 gpio_noesd[10] vdd 0.61fF -C585 gpio_analog[10] vdd 0.61fF -C586 gpio_analog[3] vdd 0.61fF -C587 gpio_noesd[3] vdd 0.61fF -C588 io_in_3v3[10] vdd 0.61fF -C589 io_in[10] vdd 0.61fF -C590 io_out[10] vdd 0.61fF -C591 io_oeb[10] vdd 0.61fF -C592 io_oeb[16] vdd 0.61fF -C593 io_out[16] vdd 0.61fF -C594 io_in[16] vdd 0.61fF -C595 io_in_3v3[16] vdd 0.61fF -C596 gpio_noesd[9] vdd 0.61fF -C597 gpio_analog[9] vdd 0.61fF -C598 gpio_analog[4] vdd 0.61fF -C599 gpio_noesd[4] vdd 0.61fF -C600 io_in_3v3[11] vdd 0.61fF -C601 io_in[11] vdd 0.61fF -C602 io_out[11] vdd 0.61fF -C603 io_oeb[11] vdd 0.61fF -C604 io_oeb[15] vdd 0.61fF -C605 io_out[15] vdd 0.61fF -C606 io_in[15] vdd 0.61fF -C607 io_in_3v3[15] vdd 0.61fF -C608 gpio_noesd[8] vdd 0.61fF -C609 gpio_analog[8] vdd 0.61fF -C610 gpio_analog[5] vdd 0.61fF -C611 gpio_noesd[5] vdd 0.61fF -C612 io_in_3v3[12] vdd 0.61fF -C613 io_in[12] vdd 0.61fF -C614 io_out[12] vdd 0.61fF -C615 io_oeb[12] vdd 0.61fF -C616 io_oeb[14] vdd 0.61fF -C617 io_out[14] vdd 0.61fF -C618 io_in[14] vdd 0.61fF -C619 io_in_3v3[14] vdd 0.61fF -C620 gpio_noesd[7] vdd 0.61fF -C621 gpio_analog[7] vdd 0.61fF -C622 vssa2 vdd 13.04fF -C623 gpio_analog[6] vdd 0.61fF -C624 gpio_noesd[6] vdd 0.61fF -C625 io_in_3v3[13] vdd 0.61fF -C626 io_in[13] vdd 0.61fF -C627 io_out[13] vdd 0.61fF -C628 io_oeb[13] vdd 0.61fF -C629 vccd1 vdd 13.04fF -C630 vccd2 vdd 13.04fF -C631 io_analog[0] vdd 6.83fF -C632 io_analog[10] vdd 6.83fF -C633 io_analog[1] vdd 6.83fF -C634 io_analog[2] vdd 6.83fF -C635 io_analog[3] vdd 6.83fF -C636 io_clamp_high[0] vdd 3.58fF -C637 io_clamp_low[0] vdd 3.58fF -C638 io_clamp_high[1] vdd 3.58fF -C639 io_clamp_low[1] vdd 3.58fF -C640 io_clamp_high[2] vdd 3.58fF -C641 io_clamp_low[2] vdd 3.58fF -C642 io_analog[7] vdd 6.83fF -C643 io_analog[8] vdd 6.83fF -C644 io_analog[9] vdd 6.83fF -C645 user_irq[2] vdd 0.63fF -C646 user_irq[1] vdd 0.63fF -C647 user_irq[0] vdd 0.63fF -C648 user_clock2 vdd 0.63fF -C649 la_oenb[127] vdd 0.63fF -C650 la_data_out[127] vdd 0.63fF -C651 la_data_in[127] vdd 0.63fF -C652 la_oenb[126] vdd 0.63fF -C653 la_data_out[126] vdd 0.63fF -C654 la_data_in[126] vdd 0.63fF -C655 la_oenb[125] vdd 0.63fF -C656 la_data_out[125] vdd 0.63fF -C657 la_data_in[125] vdd 0.63fF -C658 la_oenb[124] vdd 0.63fF -C659 la_data_out[124] vdd 0.63fF -C660 la_data_in[124] vdd 0.63fF -C661 la_oenb[123] vdd 0.63fF -C662 la_data_out[123] vdd 0.63fF -C663 la_data_in[123] vdd 0.63fF -C664 la_oenb[122] vdd 0.63fF -C665 la_data_out[122] vdd 0.63fF -C666 la_data_in[122] vdd 0.63fF -C667 la_oenb[121] vdd 0.63fF -C668 la_data_out[121] vdd 0.63fF -C669 la_data_in[121] vdd 0.63fF -C670 la_oenb[120] vdd 0.63fF -C671 la_data_out[120] vdd 0.63fF -C672 la_data_in[120] vdd 0.63fF -C673 la_oenb[119] vdd 0.63fF -C674 la_data_out[119] vdd 0.63fF -C675 la_data_in[119] vdd 0.63fF -C676 la_oenb[118] vdd 0.63fF -C677 la_data_out[118] vdd 0.63fF -C678 la_data_in[118] vdd 0.63fF -C679 la_oenb[117] vdd 0.63fF -C680 la_data_out[117] vdd 0.63fF -C681 la_data_in[117] vdd 0.63fF -C682 la_oenb[116] vdd 0.63fF -C683 la_data_out[116] vdd 0.63fF -C684 la_data_in[116] vdd 0.63fF -C685 la_oenb[115] vdd 0.63fF -C686 la_data_out[115] vdd 0.63fF -C687 la_data_in[115] vdd 0.63fF -C688 la_oenb[114] vdd 0.63fF -C689 la_data_out[114] vdd 0.63fF -C690 la_data_in[114] vdd 0.63fF -C691 la_oenb[113] vdd 0.63fF -C692 la_data_out[113] vdd 0.63fF -C693 la_data_in[113] vdd 0.63fF -C694 la_oenb[112] vdd 0.63fF -C695 la_data_out[112] vdd 0.63fF -C696 la_data_in[112] vdd 0.63fF -C697 la_oenb[111] vdd 0.63fF -C698 la_data_out[111] vdd 0.63fF -C699 la_data_in[111] vdd 0.63fF -C700 la_oenb[110] vdd 0.63fF -C701 la_data_out[110] vdd 0.63fF -C702 la_data_in[110] vdd 0.63fF -C703 la_oenb[109] vdd 0.63fF -C704 la_data_out[109] vdd 0.63fF -C705 la_data_in[109] vdd 0.63fF -C706 la_oenb[108] vdd 0.63fF -C707 la_data_out[108] vdd 0.63fF -C708 la_data_in[108] vdd 0.63fF -C709 la_oenb[107] vdd 0.63fF -C710 la_data_out[107] vdd 0.63fF -C711 la_data_in[107] vdd 0.63fF -C712 la_oenb[106] vdd 0.63fF -C713 la_data_out[106] vdd 0.63fF -C714 la_data_in[106] vdd 0.63fF -C715 la_oenb[105] vdd 0.63fF -C716 la_data_out[105] vdd 0.63fF -C717 la_data_in[105] vdd 0.63fF -C718 la_oenb[104] vdd 0.63fF -C719 la_data_out[104] vdd 0.63fF -C720 la_data_in[104] vdd 0.63fF -C721 la_oenb[103] vdd 0.63fF -C722 la_data_out[103] vdd 0.63fF -C723 la_data_in[103] vdd 0.63fF -C724 la_oenb[102] vdd 0.63fF -C725 la_data_out[102] vdd 0.63fF -C726 la_data_in[102] vdd 0.63fF -C727 la_oenb[101] vdd 0.63fF -C728 la_data_out[101] vdd 0.63fF -C729 la_data_in[101] vdd 0.63fF -C730 la_oenb[100] vdd 0.63fF -C731 la_data_out[100] vdd 0.63fF -C732 la_data_in[100] vdd 0.63fF -C733 la_oenb[99] vdd 0.63fF -C734 la_data_out[99] vdd 0.63fF -C735 la_data_in[99] vdd 0.63fF -C736 la_oenb[98] vdd 0.63fF -C737 la_data_out[98] vdd 0.63fF -C738 la_data_in[98] vdd 0.63fF -C739 la_oenb[97] vdd 0.63fF -C740 la_data_out[97] vdd 0.63fF -C741 la_data_in[97] vdd 0.63fF -C742 la_oenb[96] vdd 0.63fF -C743 la_data_out[96] vdd 0.63fF -C744 la_data_in[96] vdd 0.63fF -C745 la_oenb[95] vdd 0.63fF -C746 la_data_out[95] vdd 0.63fF -C747 la_data_in[95] vdd 0.63fF -C748 la_oenb[94] vdd 0.63fF -C749 la_data_out[94] vdd 0.63fF -C750 la_data_in[94] vdd 0.63fF -C751 la_oenb[93] vdd 0.63fF -C752 la_data_out[93] vdd 0.63fF -C753 la_data_in[93] vdd 0.63fF -C754 la_oenb[92] vdd 0.63fF -C755 la_data_out[92] vdd 0.63fF -C756 la_data_in[92] vdd 0.63fF -C757 la_oenb[91] vdd 0.63fF -C758 la_data_out[91] vdd 0.63fF -C759 la_data_in[91] vdd 0.63fF -C760 la_oenb[90] vdd 0.63fF -C761 la_data_out[90] vdd 0.63fF -C762 la_data_in[90] vdd 0.63fF -C763 la_oenb[89] vdd 0.63fF -C764 la_data_out[89] vdd 0.63fF -C765 la_data_in[89] vdd 0.63fF -C766 la_oenb[88] vdd 0.63fF -C767 la_data_out[88] vdd 0.63fF -C768 la_data_in[88] vdd 0.63fF -C769 la_oenb[87] vdd 0.63fF -C770 la_data_out[87] vdd 0.63fF -C771 la_data_in[87] vdd 0.63fF -C772 la_oenb[86] vdd 0.63fF -C773 la_data_out[86] vdd 0.63fF -C774 la_data_in[86] vdd 0.63fF -C775 la_oenb[85] vdd 0.63fF -C776 la_data_out[85] vdd 0.63fF -C777 la_data_in[85] vdd 0.63fF -C778 la_oenb[84] vdd 0.63fF -C779 la_data_out[84] vdd 0.63fF -C780 la_data_in[84] vdd 0.63fF -C781 la_oenb[83] vdd 0.63fF -C782 la_data_out[83] vdd 0.63fF -C783 la_data_in[83] vdd 0.63fF -C784 la_oenb[82] vdd 0.63fF -C785 la_data_out[82] vdd 0.63fF -C786 la_data_in[82] vdd 0.63fF -C787 la_oenb[81] vdd 0.63fF -C788 la_data_out[81] vdd 0.63fF -C789 la_data_in[81] vdd 0.63fF -C790 la_oenb[80] vdd 0.63fF -C791 la_data_out[80] vdd 0.63fF -C792 la_data_in[80] vdd 0.63fF -C793 la_oenb[79] vdd 0.63fF -C794 la_data_out[79] vdd 0.63fF -C795 la_data_in[79] vdd 0.63fF -C796 la_oenb[78] vdd 0.63fF -C797 la_data_out[78] vdd 0.63fF -C798 la_data_in[78] vdd 0.63fF -C799 la_oenb[77] vdd 0.63fF -C800 la_data_out[77] vdd 0.63fF -C801 la_data_in[77] vdd 0.63fF -C802 la_oenb[76] vdd 0.63fF -C803 la_data_out[76] vdd 0.63fF -C804 la_data_in[76] vdd 0.63fF -C805 la_oenb[75] vdd 0.63fF -C806 la_data_out[75] vdd 0.63fF -C807 la_data_in[75] vdd 0.63fF -C808 la_oenb[74] vdd 0.63fF -C809 la_data_out[74] vdd 0.63fF -C810 la_data_in[74] vdd 0.63fF -C811 la_oenb[73] vdd 0.63fF -C812 la_data_out[73] vdd 0.63fF -C813 la_data_in[73] vdd 0.63fF -C814 la_oenb[72] vdd 0.63fF -C815 la_data_out[72] vdd 0.63fF -C816 la_data_in[72] vdd 0.63fF -C817 la_oenb[71] vdd 0.63fF -C818 la_data_out[71] vdd 0.63fF -C819 la_data_in[71] vdd 0.63fF -C820 la_oenb[70] vdd 0.63fF -C821 la_data_out[70] vdd 0.63fF -C822 la_data_in[70] vdd 0.63fF -C823 la_oenb[69] vdd 0.63fF -C824 la_data_out[69] vdd 0.63fF -C825 la_data_in[69] vdd 0.63fF -C826 la_oenb[68] vdd 0.63fF -C827 la_data_out[68] vdd 0.63fF -C828 la_data_in[68] vdd 0.63fF -C829 la_oenb[67] vdd 0.63fF -C830 la_data_out[67] vdd 0.63fF -C831 la_data_in[67] vdd 0.63fF -C832 la_oenb[66] vdd 0.63fF -C833 la_data_out[66] vdd 0.63fF -C834 la_data_in[66] vdd 0.63fF -C835 la_oenb[65] vdd 0.63fF -C836 la_data_out[65] vdd 0.63fF -C837 la_data_in[65] vdd 0.63fF -C838 la_oenb[64] vdd 0.63fF -C839 la_data_out[64] vdd 0.63fF -C840 la_data_in[64] vdd 0.63fF -C841 la_oenb[63] vdd 0.63fF -C842 la_data_out[63] vdd 0.63fF -C843 la_data_in[63] vdd 0.63fF -C844 la_oenb[62] vdd 0.63fF -C845 la_data_out[62] vdd 0.63fF -C846 la_data_in[62] vdd 0.63fF -C847 la_oenb[61] vdd 0.63fF -C848 la_data_out[61] vdd 0.63fF -C849 la_data_in[61] vdd 0.63fF -C850 la_oenb[60] vdd 0.63fF -C851 la_data_out[60] vdd 0.63fF -C852 la_data_in[60] vdd 0.63fF -C853 la_oenb[59] vdd 0.63fF -C854 la_data_out[59] vdd 0.63fF -C855 la_data_in[59] vdd 0.63fF -C856 la_oenb[58] vdd 0.63fF -C857 la_data_out[58] vdd 0.63fF -C858 la_data_in[58] vdd 0.63fF -C859 la_oenb[57] vdd 0.63fF -C860 la_data_out[57] vdd 0.63fF -C861 la_data_in[57] vdd 0.63fF -C862 la_oenb[56] vdd 0.63fF -C863 la_data_out[56] vdd 0.63fF -C864 la_data_in[56] vdd 0.63fF -C865 la_oenb[55] vdd 0.63fF -C866 la_data_out[55] vdd 0.63fF -C867 la_data_in[55] vdd 0.63fF -C868 la_oenb[54] vdd 0.63fF -C869 la_data_out[54] vdd 0.63fF -C870 la_data_in[54] vdd 0.63fF -C871 la_oenb[53] vdd 0.63fF -C872 la_data_out[53] vdd 0.63fF -C873 la_data_in[53] vdd 0.63fF -C874 la_oenb[52] vdd 0.63fF -C875 la_data_out[52] vdd 0.63fF -C876 la_data_in[52] vdd 0.63fF -C877 la_oenb[51] vdd 0.63fF -C878 la_data_out[51] vdd 0.63fF -C879 la_data_in[51] vdd 0.63fF -C880 la_oenb[50] vdd 0.63fF -C881 la_data_out[50] vdd 0.63fF -C882 la_data_in[50] vdd 0.63fF -C883 la_oenb[49] vdd 0.63fF -C884 la_data_out[49] vdd 0.63fF -C885 la_data_in[49] vdd 0.63fF -C886 la_oenb[48] vdd 0.63fF -C887 la_data_out[48] vdd 0.63fF -C888 la_data_in[48] vdd 0.63fF -C889 la_oenb[47] vdd 0.63fF -C890 la_data_out[47] vdd 0.63fF -C891 la_data_in[47] vdd 0.63fF -C892 la_oenb[46] vdd 0.63fF -C893 la_data_out[46] vdd 0.63fF -C894 la_data_in[46] vdd 0.63fF -C895 la_oenb[45] vdd 0.63fF -C896 la_data_out[45] vdd 0.63fF -C897 la_data_in[45] vdd 0.63fF -C898 la_oenb[44] vdd 0.63fF -C899 la_data_out[44] vdd 0.63fF -C900 la_data_in[44] vdd 0.63fF -C901 la_oenb[43] vdd 0.63fF -C902 la_data_out[43] vdd 0.63fF -C903 la_data_in[43] vdd 0.63fF -C904 la_oenb[42] vdd 0.63fF -C905 la_data_out[42] vdd 0.63fF -C906 la_data_in[42] vdd 0.63fF -C907 la_oenb[41] vdd 0.63fF -C908 la_data_out[41] vdd 0.63fF -C909 la_data_in[41] vdd 0.63fF -C910 la_oenb[40] vdd 0.63fF -C911 la_data_out[40] vdd 0.63fF -C912 la_data_in[40] vdd 0.63fF -C913 la_oenb[39] vdd 0.63fF -C914 la_data_out[39] vdd 0.63fF -C915 la_data_in[39] vdd 0.63fF -C916 la_oenb[38] vdd 0.63fF -C917 la_data_out[38] vdd 0.63fF -C918 la_data_in[38] vdd 0.63fF -C919 la_oenb[37] vdd 0.63fF -C920 la_data_out[37] vdd 0.63fF -C921 la_data_in[37] vdd 0.63fF -C922 la_oenb[36] vdd 0.63fF -C923 la_data_out[36] vdd 0.63fF -C924 la_data_in[36] vdd 0.63fF -C925 la_oenb[35] vdd 0.63fF -C926 la_data_out[35] vdd 0.63fF -C927 la_data_in[35] vdd 0.63fF -C928 la_oenb[34] vdd 0.63fF -C929 la_data_out[34] vdd 0.63fF -C930 la_data_in[34] vdd 0.63fF -C931 la_oenb[33] vdd 0.63fF -C932 la_data_out[33] vdd 0.63fF -C933 la_data_in[33] vdd 0.63fF -C934 la_oenb[32] vdd 0.63fF -C935 la_data_out[32] vdd 0.63fF -C936 la_data_in[32] vdd 0.63fF -C937 la_oenb[31] vdd 0.63fF -C938 la_data_out[31] vdd 0.63fF -C939 la_data_in[31] vdd 0.63fF -C940 la_oenb[30] vdd 0.63fF -C941 la_data_out[30] vdd 0.63fF -C942 la_data_in[30] vdd 0.63fF -C943 la_oenb[29] vdd 0.63fF -C944 la_data_out[29] vdd 0.63fF -C945 la_data_in[29] vdd 0.63fF -C946 la_oenb[28] vdd 0.63fF -C947 la_data_out[28] vdd 0.63fF -C948 la_data_in[28] vdd 0.63fF -C949 la_oenb[27] vdd 0.63fF -C950 la_data_out[27] vdd 0.63fF -C951 la_data_in[27] vdd 0.63fF -C952 la_oenb[26] vdd 0.63fF -C953 la_data_out[26] vdd 0.63fF -C954 la_data_in[26] vdd 0.63fF -C955 la_oenb[25] vdd 0.63fF -C956 la_data_out[25] vdd 0.63fF -C957 la_data_in[25] vdd 0.63fF -C958 la_oenb[24] vdd 0.63fF -C959 la_data_out[24] vdd 0.63fF -C960 la_data_in[24] vdd 0.63fF -C961 la_oenb[23] vdd 0.63fF -C962 la_data_out[23] vdd 0.63fF -C963 la_data_in[23] vdd 0.63fF -C964 la_oenb[22] vdd 0.63fF -C965 la_data_out[22] vdd 0.63fF -C966 la_data_in[22] vdd 0.63fF -C967 la_oenb[21] vdd 0.63fF -C968 la_data_out[21] vdd 0.63fF -C969 la_data_in[21] vdd 0.63fF -C970 la_oenb[20] vdd 0.63fF -C971 la_data_out[20] vdd 0.63fF -C972 la_data_in[20] vdd 0.63fF -C973 la_oenb[19] vdd 0.63fF -C974 la_data_out[19] vdd 0.63fF -C975 la_data_in[19] vdd 0.63fF -C976 la_oenb[18] vdd 0.63fF -C977 la_data_out[18] vdd 0.63fF -C978 la_data_in[18] vdd 0.63fF -C979 la_oenb[17] vdd 0.63fF -C980 la_data_out[17] vdd 0.63fF -C981 la_data_in[17] vdd 0.63fF -C982 la_oenb[16] vdd 0.63fF -C983 la_data_out[16] vdd 0.63fF -C984 la_data_in[16] vdd 0.63fF -C985 la_oenb[15] vdd 0.63fF -C986 la_data_out[15] vdd 0.63fF -C987 la_data_in[15] vdd 0.63fF -C988 la_oenb[14] vdd 0.63fF -C989 la_data_out[14] vdd 0.63fF -C990 la_data_in[14] vdd 0.63fF -C991 la_oenb[13] vdd 0.63fF -C992 la_data_out[13] vdd 0.63fF -C993 la_data_in[13] vdd 0.63fF -C994 la_oenb[12] vdd 0.63fF -C995 la_data_out[12] vdd 0.63fF -C996 la_data_in[12] vdd 0.63fF -C997 la_oenb[11] vdd 0.63fF -C998 la_data_out[11] vdd 0.63fF -C999 la_data_in[11] vdd 0.63fF -C1000 la_oenb[10] vdd 0.63fF -C1001 la_data_out[10] vdd 0.63fF -C1002 la_data_in[10] vdd 0.63fF -C1003 la_oenb[9] vdd 0.63fF -C1004 la_data_out[9] vdd 0.63fF -C1005 la_data_in[9] vdd 0.63fF -C1006 la_oenb[8] vdd 0.63fF -C1007 la_data_out[8] vdd 0.63fF -C1008 la_data_in[8] vdd 0.63fF -C1009 la_oenb[7] vdd 0.63fF -C1010 la_data_out[7] vdd 0.63fF -C1011 la_data_in[7] vdd 0.63fF -C1012 la_oenb[6] vdd 0.63fF -C1013 la_data_out[6] vdd 0.63fF -C1014 la_data_in[6] vdd 0.63fF -C1015 la_oenb[5] vdd 0.63fF -C1016 la_data_out[5] vdd 0.63fF -C1017 la_data_in[5] vdd 0.63fF -C1018 la_oenb[4] vdd 0.63fF -C1019 la_data_out[4] vdd 0.63fF -C1020 la_data_in[4] vdd 0.63fF -C1021 la_oenb[3] vdd 0.63fF -C1022 la_data_out[3] vdd 0.63fF -C1023 la_data_in[3] vdd 0.63fF -C1024 la_oenb[2] vdd 0.63fF -C1025 la_data_out[2] vdd 0.63fF -C1026 la_data_in[2] vdd 0.63fF -C1027 la_oenb[1] vdd 0.63fF -C1028 la_data_out[1] vdd 0.63fF -C1029 la_data_in[1] vdd 0.63fF -C1030 la_oenb[0] vdd 0.63fF -C1031 la_data_out[0] vdd 0.63fF -C1032 la_data_in[0] vdd 0.63fF -C1033 wbs_dat_o[31] vdd 0.63fF -C1034 wbs_dat_i[31] vdd 0.63fF -C1035 wbs_adr_i[31] vdd 0.63fF -C1036 wbs_dat_o[30] vdd 0.63fF -C1037 wbs_dat_i[30] vdd 0.63fF -C1038 wbs_adr_i[30] vdd 0.63fF -C1039 wbs_dat_o[29] vdd 0.63fF -C1040 wbs_dat_i[29] vdd 0.63fF -C1041 wbs_adr_i[29] vdd 0.63fF -C1042 wbs_dat_o[28] vdd 0.63fF -C1043 wbs_dat_i[28] vdd 0.63fF -C1044 wbs_adr_i[28] vdd 0.63fF -C1045 wbs_dat_o[27] vdd 0.63fF -C1046 wbs_dat_i[27] vdd 0.63fF -C1047 wbs_adr_i[27] vdd 0.63fF -C1048 wbs_dat_o[26] vdd 0.63fF -C1049 wbs_dat_i[26] vdd 0.63fF -C1050 wbs_adr_i[26] vdd 0.63fF -C1051 wbs_dat_o[25] vdd 0.63fF -C1052 wbs_dat_i[25] vdd 0.63fF -C1053 wbs_adr_i[25] vdd 0.63fF -C1054 wbs_dat_o[24] vdd 0.63fF -C1055 wbs_dat_i[24] vdd 0.63fF -C1056 wbs_adr_i[24] vdd 0.63fF -C1057 wbs_dat_o[23] vdd 0.63fF -C1058 wbs_dat_i[23] vdd 0.63fF -C1059 wbs_adr_i[23] vdd 0.63fF -C1060 wbs_dat_o[22] vdd 0.63fF -C1061 wbs_dat_i[22] vdd 0.63fF -C1062 wbs_adr_i[22] vdd 0.63fF -C1063 wbs_dat_o[21] vdd 0.63fF -C1064 wbs_dat_i[21] vdd 0.63fF -C1065 wbs_adr_i[21] vdd 0.63fF -C1066 wbs_dat_o[20] vdd 0.63fF -C1067 wbs_dat_i[20] vdd 0.63fF -C1068 wbs_adr_i[20] vdd 0.63fF -C1069 wbs_dat_o[19] vdd 0.63fF -C1070 wbs_dat_i[19] vdd 0.63fF -C1071 wbs_adr_i[19] vdd 0.63fF -C1072 wbs_dat_o[18] vdd 0.63fF -C1073 wbs_dat_i[18] vdd 0.63fF -C1074 wbs_adr_i[18] vdd 0.63fF -C1075 wbs_dat_o[17] vdd 0.63fF -C1076 wbs_dat_i[17] vdd 0.63fF -C1077 wbs_adr_i[17] vdd 0.63fF -C1078 wbs_dat_o[16] vdd 0.63fF -C1079 wbs_dat_i[16] vdd 0.63fF -C1080 wbs_adr_i[16] vdd 0.63fF -C1081 wbs_dat_o[15] vdd 0.63fF -C1082 wbs_dat_i[15] vdd 0.63fF -C1083 wbs_adr_i[15] vdd 0.63fF -C1084 wbs_dat_o[14] vdd 0.63fF -C1085 wbs_dat_i[14] vdd 0.63fF -C1086 wbs_adr_i[14] vdd 0.63fF -C1087 wbs_dat_o[13] vdd 0.63fF -C1088 wbs_dat_i[13] vdd 0.63fF -C1089 wbs_adr_i[13] vdd 0.63fF -C1090 wbs_dat_o[12] vdd 0.63fF -C1091 wbs_dat_i[12] vdd 0.63fF -C1092 wbs_adr_i[12] vdd 0.63fF -C1093 wbs_dat_o[11] vdd 0.63fF -C1094 wbs_dat_i[11] vdd 0.63fF -C1095 wbs_adr_i[11] vdd 0.63fF -C1096 wbs_dat_o[10] vdd 0.63fF -C1097 wbs_dat_i[10] vdd 0.63fF -C1098 wbs_adr_i[10] vdd 0.63fF -C1099 wbs_dat_o[9] vdd 0.63fF -C1100 wbs_dat_i[9] vdd 0.63fF -C1101 wbs_adr_i[9] vdd 0.63fF -C1102 wbs_dat_o[8] vdd 0.63fF -C1103 wbs_dat_i[8] vdd 0.63fF -C1104 wbs_adr_i[8] vdd 0.63fF -C1105 wbs_dat_o[7] vdd 0.63fF -C1106 wbs_dat_i[7] vdd 0.63fF -C1107 wbs_adr_i[7] vdd 0.63fF -C1108 wbs_dat_o[6] vdd 0.63fF -C1109 wbs_dat_i[6] vdd 0.63fF -C1110 wbs_adr_i[6] vdd 0.63fF -C1111 wbs_dat_o[5] vdd 0.63fF -C1112 wbs_dat_i[5] vdd 0.63fF -C1113 wbs_adr_i[5] vdd 0.63fF -C1114 wbs_dat_o[4] vdd 0.63fF -C1115 wbs_dat_i[4] vdd 0.63fF -C1116 wbs_adr_i[4] vdd 0.63fF -C1117 wbs_sel_i[3] vdd 0.63fF -C1118 wbs_dat_o[3] vdd 0.63fF -C1119 wbs_dat_i[3] vdd 0.63fF -C1120 wbs_adr_i[3] vdd 0.63fF -C1121 wbs_sel_i[2] vdd 0.63fF -C1122 wbs_dat_o[2] vdd 0.63fF -C1123 wbs_dat_i[2] vdd 0.63fF -C1124 wbs_adr_i[2] vdd 0.63fF -C1125 wbs_sel_i[1] vdd 0.63fF -C1126 wbs_dat_o[1] vdd 0.63fF -C1127 wbs_dat_i[1] vdd 0.63fF -C1128 wbs_adr_i[1] vdd 0.63fF -C1129 wbs_sel_i[0] vdd 0.63fF -C1130 wbs_dat_o[0] vdd 0.63fF -C1131 wbs_dat_i[0] vdd 0.63fF -C1132 wbs_adr_i[0] vdd 0.63fF -C1133 wbs_we_i vdd 0.63fF -C1134 wbs_stb_i vdd 0.63fF -C1135 wbs_cyc_i vdd 0.63fF -C1136 wbs_ack_o vdd 0.63fF -C1137 wb_rst_i vdd 0.63fF -C1138 wb_clk_i vdd 0.63fF -C1139 divider_0/and_0/Z1 vdd 0.74fF -C1140 divider_0/and_0/B vdd 2.25fF -C1141 divider_0/and_0/A vdd 2.19fF -C1142 divider_0/and_0/out1 vdd 2.93fF -C1143 divider_0/tspc_2/Z4 vdd 0.86fF -C1144 divider_0/Out vdd 1.60fF -C1145 divider_0/tspc_2/Z3 vdd 2.26fF -C1146 divider_0/tspc_2/Z2 vdd 1.46fF -C1147 divider_0/tspc_2/Z1 vdd 0.99fF -C1148 divider_0/nor_0/B vdd 6.33fF -C1149 divider_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING -C1150 divider_0/tspc_1/Z4 vdd 0.86fF -C1151 divider_0/tspc_1/Q vdd 3.12fF -C1152 divider_0/tspc_1/Z3 vdd 2.26fF -C1153 divider_0/tspc_1/Z2 vdd 1.46fF -C1154 divider_0/tspc_1/Z1 vdd 0.99fF -C1155 divider_0/nor_1/B vdd 7.05fF -C1156 divider_0/tspc_1/a_630_n680# vdd 1.15fF **FLOATING -C1157 divider_0/tspc_0/Z4 vdd 0.86fF -C1158 divider_0/tspc_0/Q vdd 3.14fF -C1159 divider_0/tspc_0/Z3 vdd 2.26fF -C1160 divider_0/tspc_0/Z2 vdd 1.46fF -C1161 divider_0/tspc_0/Z1 vdd 0.99fF -C1162 divider_0/nor_1/A vdd 7.04fF -C1163 divider_0/tspc_0/a_630_n680# vdd 1.15fF **FLOATING -C1164 divider_0/clk vdd 5.63fF -C1165 divider_0/prescaler_0/Out vdd 4.59fF -C1166 divider_0/prescaler_0/nand_1/z1 vdd 0.36fF -C1167 divider_0/prescaler_0/tspc_2/D vdd 2.64fF -C1168 divider_0/prescaler_0/tspc_0/Q vdd 3.64fF -C1169 divider_0/prescaler_0/tspc_1/Q vdd 3.61fF -C1170 divider_0/prescaler_0/nand_0/z1 vdd 0.36fF -C1171 divider_0/prescaler_0/tspc_0/D vdd 3.12fF -C1172 divider_0/and_0/OUT vdd 5.62fF -C1173 divider_0/prescaler_0/tspc_2/Z4 vdd 0.86fF -C1174 divider_0/prescaler_0/tspc_2/Z3 vdd 2.26fF -C1175 divider_0/prescaler_0/tspc_2/Z2 vdd 1.46fF -C1176 divider_0/prescaler_0/tspc_2/Z1 vdd 0.99fF -C1177 divider_0/prescaler_0/tspc_2/a_630_n680# vdd 1.16fF **FLOATING -C1178 divider_0/prescaler_0/tspc_2/a_740_n680# vdd 2.11fF **FLOATING -C1179 divider_0/prescaler_0/tspc_1/Z4 vdd 0.86fF -C1180 divider_0/prescaler_0/tspc_1/Z3 vdd 2.26fF -C1181 divider_0/prescaler_0/tspc_1/Z2 vdd 1.48fF -C1182 divider_0/prescaler_0/tspc_1/Z1 vdd 0.99fF -C1183 divider_0/prescaler_0/tspc_1/a_630_n680# vdd 1.14fF **FLOATING -C1184 divider_0/prescaler_0/m1_2700_2190# vdd 4.22fF **FLOATING -C1185 divider_0/prescaler_0/tspc_0/Z4 vdd 0.86fF -C1186 divider_0/prescaler_0/tspc_0/Z3 vdd 2.26fF -C1187 divider_0/prescaler_0/tspc_0/Z2 vdd 1.46fF -C1188 divider_0/prescaler_0/tspc_0/Z1 vdd 0.99fF -C1189 divider_0/prescaler_0/tspc_0/a_630_n680# vdd 1.14fF **FLOATING -C1190 divider_0/prescaler_0/tspc_0/a_740_n680# vdd 2.11fF **FLOATING -C1191 divider_0/nor_1/Z1 vdd 1.34fF -C1192 divider_0/nor_0/Z1 vdd 1.34fF -C1193 divider_0/mc2 vdd 5.29fF -C1194 divbuf_7/OUT vdd 363.82fF -C1195 divbuf_7/OUT5 vdd 350.37fF -C1196 divbuf_7/OUT4 vdd 133.72fF -C1197 divbuf_7/OUT3 vdd 34.03fF -C1198 divbuf_7/OUT2 vdd 8.71fF -C1199 divbuf_7/IN vdd 0.89fF -C1200 divbuf_7/a_492_n240# vdd 2.46fF **FLOATING -C1201 divbuf_6/OUT vdd 363.82fF -C1202 divbuf_6/OUT5 vdd 350.37fF -C1203 divbuf_6/OUT4 vdd 133.72fF -C1204 divbuf_6/OUT3 vdd 34.03fF -C1205 divbuf_6/OUT2 vdd 8.71fF -C1206 divbuf_6/IN vdd 0.89fF -C1207 divbuf_6/a_492_n240# vdd 2.46fF **FLOATING -C1208 divbuf_5/OUT vdd 363.82fF -C1209 divbuf_5/OUT5 vdd 350.37fF -C1210 divbuf_5/OUT4 vdd 133.72fF -C1211 divbuf_5/OUT3 vdd 34.03fF -C1212 divbuf_5/OUT2 vdd 8.71fF -C1213 divbuf_5/IN vdd 0.89fF -C1214 divbuf_5/a_492_n240# vdd 2.46fF **FLOATING -C1215 divbuf_4/OUT vdd 363.82fF -C1216 divbuf_4/OUT5 vdd 350.37fF -C1217 divbuf_4/OUT4 vdd 133.72fF -C1218 divbuf_4/OUT3 vdd 34.03fF -C1219 divbuf_4/OUT2 vdd 8.71fF -C1220 divbuf_4/IN vdd 0.89fF -C1221 divbuf_4/a_492_n240# vdd 2.46fF **FLOATING -C1222 divbuf_3/OUT vdd 363.82fF -C1223 divbuf_3/OUT5 vdd 350.37fF -C1224 divbuf_3/OUT4 vdd 133.72fF -C1225 divbuf_3/OUT3 vdd 34.03fF -C1226 divbuf_3/OUT2 vdd 8.71fF -C1227 divbuf_3/IN vdd 0.89fF -C1228 divbuf_3/a_492_n240# vdd 2.46fF **FLOATING -C1229 divbuf_2/OUT vdd 363.82fF -C1230 divbuf_2/OUT5 vdd 350.37fF -C1231 divbuf_2/OUT4 vdd 133.72fF -C1232 divbuf_2/OUT3 vdd 34.03fF -C1233 divbuf_2/OUT2 vdd 8.71fF -C1234 divbuf_2/IN vdd 0.89fF -C1235 divbuf_2/a_492_n240# vdd 2.46fF **FLOATING -C1236 divbuf_1/OUT vdd 363.82fF -C1237 divbuf_1/OUT5 vdd 350.37fF -C1238 divbuf_1/OUT4 vdd 133.72fF -C1239 divbuf_1/OUT3 vdd 34.03fF -C1240 divbuf_1/OUT2 vdd 8.71fF -C1241 divbuf_1/IN vdd 0.89fF -C1242 divbuf_1/a_492_n240# vdd 2.46fF **FLOATING -C1243 divbuf_0/OUT vdd 363.82fF -C1244 divbuf_0/OUT5 vdd 350.37fF -C1245 divbuf_0/OUT4 vdd 133.72fF -C1246 divbuf_0/OUT3 vdd 34.03fF -C1247 divbuf_0/OUT2 vdd 8.71fF -C1248 divbuf_0/IN vdd 0.89fF -C1249 divbuf_0/a_492_n240# vdd 2.46fF **FLOATING -C1250 ro_complete_0/cbank_2/v vdd 17.84fF -C1251 ro_complete_0/cbank_2/switch_5/vin vdd 0.78fF -C1252 ro_complete_0/cbank_2/switch_4/vin vdd 1.50fF -C1253 ro_complete_0/cbank_2/switch_2/vin vdd 1.30fF -C1254 ro_complete_0/cbank_2/switch_3/vin vdd 0.56fF -C1255 ro_complete_0/cbank_2/switch_1/vin vdd 1.14fF -C1256 ro_complete_0/cbank_2/switch_0/vin vdd 1.02fF -C1257 ro_complete_0/cbank_1/v vdd 16.34fF -C1258 ro_complete_0/cbank_1/switch_5/vin vdd 0.78fF -C1259 ro_complete_0/a0 vdd 7.88fF -C1260 ro_complete_0/cbank_1/switch_4/vin vdd 1.50fF -C1261 ro_complete_0/a1 vdd 5.39fF -C1262 ro_complete_0/cbank_1/switch_2/vin vdd 1.30fF -C1263 ro_complete_0/a3 vdd 6.85fF -C1264 ro_complete_0/cbank_1/switch_3/vin vdd 0.56fF -C1265 ro_complete_0/a2 vdd 5.48fF -C1266 ro_complete_0/cbank_1/switch_1/vin vdd 1.14fF -C1267 ro_complete_0/a4 vdd 5.36fF -C1268 ro_complete_0/cbank_1/switch_0/vin vdd 1.02fF -C1269 ro_complete_0/a5 vdd 5.19fF -C1270 ro_complete_0/cbank_0/v vdd 14.98fF -C1271 ro_complete_0/cbank_0/switch_5/vin vdd 0.78fF -C1272 ro_complete_0/cbank_0/switch_4/vin vdd 1.50fF -C1273 ro_complete_0/cbank_0/switch_2/vin vdd 1.30fF -C1274 ro_complete_0/cbank_0/switch_3/vin vdd 0.56fF -C1275 ro_complete_0/cbank_0/switch_1/vin vdd 1.14fF -C1276 ro_complete_0/cbank_0/switch_0/vin vdd 1.02fF -C1277 ro_complete_0/ro_var_extend_0/vcont vdd 0.27fF -C1278 filter_0/v vdd 85.69fF -C1279 filter_0/a_4216_n5230# vdd 418.47fF **FLOATING -C1280 filter_0/a_4216_n2998# vdd 1.03fF **FLOATING -C1281 cp_0/down vdd 1.54fF -C1282 cp_0/vbias vdd 2.41fF -C1283 cp_0/out vdd 5.26fF -C1284 cp_0/upbar vdd 1.50fF -C1285 cp_0/a_7110_n2840# vdd 0.17fF **FLOATING -C1286 cp_0/a_3060_n2840# vdd 1.71fF **FLOATING -C1287 cp_0/a_7110_0# vdd 0.17fF **FLOATING -C1288 cp_0/a_6370_0# vdd 0.40fF **FLOATING -C1289 cp_0/a_3060_0# vdd 1.65fF **FLOATING -C1290 cp_0/a_1710_0# vdd 5.76fF **FLOATING -C1291 cp_0/a_1710_n2840# vdd 4.89fF **FLOATING -C1292 cp_0/a_10_n50# vdd 2.96fF **FLOATING -C1293 pd_0/and_pd_0/Z1 vdd 0.39fF -C1294 pd_0/and_pd_0/Out1 vdd 2.22fF -C1295 pd_0/tspc_r_1/z5 vdd 1.10fF -C1296 pd_0/tspc_r_1/Z4 vdd 1.07fF -C1297 pd_0/tspc_r_1/Qbar vdd 0.88fF -C1298 pd_0/tspc_r_1/Z2 vdd 1.22fF -C1299 pd_0/tspc_r_1/Z1 vdd 0.67fF -C1300 pd_0/UP vdd 2.21fF -C1301 pd_0/tspc_r_1/Qbar1 vdd 1.34fF -C1302 pd_0/tspc_r_1/Z3 vdd 2.12fF -C1303 pd_0/REF vdd 1.80fF -C1304 pd_0/tspc_r_0/z5 vdd 1.10fF -C1305 pd_0/tspc_r_0/Z4 vdd 1.07fF -C1306 pd_0/R vdd 3.05fF -C1307 pd_0/tspc_r_0/Qbar vdd 0.79fF -C1308 pd_0/tspc_r_0/Z2 vdd 1.22fF -C1309 pd_0/tspc_r_0/Z1 vdd 0.67fF -C1310 pd_0/DOWN vdd 3.08fF -C1311 pd_0/tspc_r_0/Qbar1 vdd 1.34fF -C1312 pd_0/tspc_r_0/Z3 vdd 2.12fF -C1313 pd_0/DIV vdd 1.82fF +Xpll_full_0 vdd pll_full +C1403 io_analog[4] vdd 25.05fF +C1404 io_analog[5] vdd 25.05fF +C1405 io_analog[6] vdd 25.05fF +C1406 io_in_3v3[0] vdd 0.61fF +C1407 io_oeb[26] vdd 0.61fF +C1408 io_in[0] vdd 0.61fF +C1409 io_out[26] vdd 0.61fF +C1410 io_out[0] vdd 0.61fF +C1411 io_in[26] vdd 0.61fF +C1412 io_oeb[0] vdd 0.61fF +C1413 io_in_3v3[26] vdd 0.61fF +C1414 io_in_3v3[1] vdd 0.61fF +C1415 io_oeb[25] vdd 0.61fF +C1416 io_in[1] vdd 0.61fF +C1417 io_out[25] vdd 0.61fF +C1418 io_out[1] vdd 0.61fF +C1419 io_in[25] vdd 0.61fF +C1420 io_oeb[1] vdd 0.61fF +C1421 io_in_3v3[25] vdd 0.61fF +C1422 io_in_3v3[2] vdd 0.61fF +C1423 io_oeb[24] vdd 0.61fF +C1424 io_in[2] vdd 0.61fF +C1425 io_out[24] vdd 0.61fF +C1426 io_out[2] vdd 0.61fF +C1427 io_in[24] vdd 0.61fF +C1428 io_oeb[2] vdd 0.61fF +C1429 io_in_3v3[24] vdd 0.61fF +C1430 io_in_3v3[3] vdd 0.61fF +C1431 gpio_noesd[17] vdd 0.61fF +C1432 io_in[3] vdd 0.61fF +C1433 gpio_analog[17] vdd 0.61fF +C1434 io_out[3] vdd 0.61fF +C1435 io_oeb[3] vdd 0.61fF +C1436 io_in_3v3[4] vdd 0.61fF +C1437 io_in[4] vdd 0.61fF +C1438 io_out[4] vdd 0.61fF +C1439 io_oeb[4] vdd 0.61fF +C1440 io_oeb[23] vdd 0.61fF +C1441 io_out[23] vdd 0.61fF +C1442 io_in[23] vdd 0.61fF +C1443 io_in_3v3[23] vdd 0.61fF +C1444 gpio_noesd[16] vdd 0.61fF +C1445 gpio_analog[16] vdd 0.61fF +C1446 io_in_3v3[5] vdd 0.61fF +C1447 io_in[5] vdd 0.61fF +C1448 io_out[5] vdd 0.61fF +C1449 io_oeb[5] vdd 0.61fF +C1450 io_oeb[22] vdd 0.61fF +C1451 io_out[22] vdd 0.61fF +C1452 io_in[22] vdd 0.61fF +C1453 io_in_3v3[22] vdd 0.61fF +C1454 gpio_noesd[15] vdd 0.61fF +C1455 gpio_analog[15] vdd 0.61fF +C1456 io_in_3v3[6] vdd 0.61fF +C1457 io_in[6] vdd 0.61fF +C1458 io_out[6] vdd 0.61fF +C1459 io_oeb[6] vdd 0.61fF +C1460 io_oeb[21] vdd 0.61fF +C1461 io_out[21] vdd 0.61fF +C1462 io_in[21] vdd 0.61fF +C1463 io_in_3v3[21] vdd 0.61fF +C1464 gpio_noesd[14] vdd 0.61fF +C1465 gpio_analog[14] vdd 0.61fF +C1466 vssa1 vdd 26.08fF +C1467 vssd2 vdd 13.04fF +C1468 vssd1 vdd 13.04fF +C1469 vdda2 vdd 13.04fF +C1470 vdda1 vdd 26.08fF +C1471 io_oeb[20] vdd 0.61fF +C1472 io_out[20] vdd 0.61fF +C1473 io_in[20] vdd 0.61fF +C1474 io_in_3v3[20] vdd 0.61fF +C1475 gpio_noesd[13] vdd 0.61fF +C1476 gpio_analog[13] vdd 0.61fF +C1477 gpio_analog[0] vdd 0.61fF +C1478 gpio_noesd[0] vdd 0.61fF +C1479 io_in_3v3[7] vdd 0.61fF +C1480 io_in[7] vdd 0.61fF +C1481 io_out[7] vdd 0.61fF +C1482 io_oeb[7] vdd 0.61fF +C1483 io_oeb[19] vdd 0.61fF +C1484 io_out[19] vdd 0.61fF +C1485 io_in[19] vdd 0.61fF +C1486 io_in_3v3[19] vdd 0.61fF +C1487 gpio_noesd[12] vdd 0.61fF +C1488 gpio_analog[12] vdd 0.61fF +C1489 gpio_analog[1] vdd 0.61fF +C1490 gpio_noesd[1] vdd 0.61fF +C1491 io_in_3v3[8] vdd 0.61fF +C1492 io_in[8] vdd 0.61fF +C1493 io_out[8] vdd 0.61fF +C1494 io_oeb[8] vdd 0.61fF +C1495 io_oeb[18] vdd 0.61fF +C1496 io_out[18] vdd 0.61fF +C1497 io_in[18] vdd 0.61fF +C1498 io_in_3v3[18] vdd 0.61fF +C1499 gpio_noesd[11] vdd 0.61fF +C1500 gpio_analog[11] vdd 0.61fF +C1501 gpio_analog[2] vdd 0.61fF +C1502 gpio_noesd[2] vdd 0.61fF +C1503 io_in_3v3[9] vdd 0.61fF +C1504 io_in[9] vdd 0.61fF +C1505 io_out[9] vdd 0.61fF +C1506 io_oeb[9] vdd 0.61fF +C1507 io_oeb[17] vdd 0.61fF +C1508 io_out[17] vdd 0.61fF +C1509 io_in[17] vdd 0.61fF +C1510 io_in_3v3[17] vdd 0.61fF +C1511 gpio_noesd[10] vdd 0.61fF +C1512 gpio_analog[10] vdd 0.61fF +C1513 gpio_analog[3] vdd 0.61fF +C1514 gpio_noesd[3] vdd 0.61fF +C1515 io_in_3v3[10] vdd 0.61fF +C1516 io_in[10] vdd 0.61fF +C1517 io_out[10] vdd 0.61fF +C1518 io_oeb[10] vdd 0.61fF +C1519 io_oeb[16] vdd 0.61fF +C1520 io_out[16] vdd 0.61fF +C1521 io_in[16] vdd 0.61fF +C1522 io_in_3v3[16] vdd 0.61fF +C1523 gpio_noesd[9] vdd 0.61fF +C1524 gpio_analog[9] vdd 0.61fF +C1525 gpio_analog[4] vdd 0.61fF +C1526 gpio_noesd[4] vdd 0.61fF +C1527 io_in_3v3[11] vdd 0.61fF +C1528 io_in[11] vdd 0.61fF +C1529 io_out[11] vdd 0.61fF +C1530 io_oeb[11] vdd 0.61fF +C1531 io_oeb[15] vdd 0.61fF +C1532 io_out[15] vdd 0.61fF +C1533 io_in[15] vdd 0.61fF +C1534 io_in_3v3[15] vdd 0.61fF +C1535 gpio_noesd[8] vdd 0.61fF +C1536 gpio_analog[8] vdd 0.61fF +C1537 gpio_analog[5] vdd 0.61fF +C1538 gpio_noesd[5] vdd 0.61fF +C1539 io_in_3v3[12] vdd 0.61fF +C1540 io_in[12] vdd 0.61fF +C1541 io_out[12] vdd 0.61fF +C1542 io_oeb[12] vdd 0.61fF +C1543 io_oeb[14] vdd 0.61fF +C1544 io_out[14] vdd 0.61fF +C1545 io_in[14] vdd 0.61fF +C1546 io_in_3v3[14] vdd 0.61fF +C1547 gpio_noesd[7] vdd 0.61fF +C1548 gpio_analog[7] vdd 0.61fF +C1549 vssa2 vdd 13.04fF +C1550 gpio_analog[6] vdd 0.61fF +C1551 gpio_noesd[6] vdd 0.61fF +C1552 io_in_3v3[13] vdd 0.61fF +C1553 io_in[13] vdd 0.61fF +C1554 io_out[13] vdd 0.61fF +C1555 io_oeb[13] vdd 0.61fF +C1556 vccd1 vdd 13.04fF +C1557 vccd2 vdd 13.04fF +C1558 io_analog[0] vdd 6.83fF +C1559 io_analog[10] vdd 6.83fF +C1560 io_analog[1] vdd 6.83fF +C1561 io_analog[2] vdd 6.83fF +C1562 io_analog[3] vdd 6.83fF +C1563 io_clamp_high[0] vdd 3.58fF +C1564 io_clamp_low[0] vdd 3.58fF +C1565 io_clamp_high[1] vdd 3.58fF +C1566 io_clamp_low[1] vdd 3.58fF +C1567 io_clamp_high[2] vdd 3.58fF +C1568 io_clamp_low[2] vdd 3.58fF +C1569 io_analog[7] vdd 6.83fF +C1570 io_analog[8] vdd 6.83fF +C1571 io_analog[9] vdd 6.83fF +C1572 user_irq[2] vdd 0.63fF +C1573 user_irq[1] vdd 0.63fF +C1574 user_irq[0] vdd 0.63fF +C1575 user_clock2 vdd 0.63fF +C1576 la_oenb[127] vdd 0.63fF +C1577 la_data_out[127] vdd 0.63fF +C1578 la_data_in[127] vdd 0.63fF +C1579 la_oenb[126] vdd 0.63fF +C1580 la_data_out[126] vdd 0.63fF +C1581 la_data_in[126] vdd 0.63fF +C1582 la_oenb[125] vdd 0.63fF +C1583 la_data_out[125] vdd 0.63fF +C1584 la_data_in[125] vdd 0.63fF +C1585 la_oenb[124] vdd 0.63fF +C1586 la_data_out[124] vdd 0.63fF +C1587 la_data_in[124] vdd 0.63fF +C1588 la_oenb[123] vdd 0.63fF +C1589 la_data_out[123] vdd 0.63fF +C1590 la_data_in[123] vdd 0.63fF +C1591 la_oenb[122] vdd 0.63fF +C1592 la_data_out[122] vdd 0.63fF +C1593 la_data_in[122] vdd 0.63fF +C1594 la_oenb[121] vdd 0.63fF +C1595 la_data_out[121] vdd 0.63fF +C1596 la_data_in[121] vdd 0.63fF +C1597 la_oenb[120] vdd 0.63fF +C1598 la_data_out[120] vdd 0.63fF +C1599 la_data_in[120] vdd 0.63fF +C1600 la_oenb[119] vdd 0.63fF +C1601 la_data_out[119] vdd 0.63fF +C1602 la_data_in[119] vdd 0.63fF +C1603 la_oenb[118] vdd 0.63fF +C1604 la_data_out[118] vdd 0.63fF +C1605 la_data_in[118] vdd 0.63fF +C1606 la_oenb[117] vdd 0.63fF +C1607 la_data_out[117] vdd 0.63fF +C1608 la_data_in[117] vdd 0.63fF +C1609 la_oenb[116] vdd 0.63fF +C1610 la_data_out[116] vdd 0.63fF +C1611 la_data_in[116] vdd 0.63fF +C1612 la_oenb[115] vdd 0.63fF +C1613 la_data_out[115] vdd 0.63fF +C1614 la_data_in[115] vdd 0.63fF +C1615 la_oenb[114] vdd 0.63fF +C1616 la_data_out[114] vdd 0.63fF +C1617 la_data_in[114] vdd 0.63fF +C1618 la_oenb[113] vdd 0.63fF +C1619 la_data_out[113] vdd 0.63fF +C1620 la_data_in[113] vdd 0.63fF +C1621 la_oenb[112] vdd 0.63fF +C1622 la_data_out[112] vdd 0.63fF +C1623 la_data_in[112] vdd 0.63fF +C1624 la_oenb[111] vdd 0.63fF +C1625 la_data_out[111] vdd 0.63fF +C1626 la_data_in[111] vdd 0.63fF +C1627 la_oenb[110] vdd 0.63fF +C1628 la_data_out[110] vdd 0.63fF +C1629 la_data_in[110] vdd 0.63fF +C1630 la_oenb[109] vdd 0.63fF +C1631 la_data_out[109] vdd 0.63fF +C1632 la_data_in[109] vdd 0.63fF +C1633 la_oenb[108] vdd 0.63fF +C1634 la_data_out[108] vdd 0.63fF +C1635 la_data_in[108] vdd 0.63fF +C1636 la_oenb[107] vdd 0.63fF +C1637 la_data_out[107] vdd 0.63fF +C1638 la_data_in[107] vdd 0.63fF +C1639 la_oenb[106] vdd 0.63fF +C1640 la_data_out[106] vdd 0.63fF +C1641 la_data_in[106] vdd 0.63fF +C1642 la_oenb[105] vdd 0.63fF +C1643 la_data_out[105] vdd 0.63fF +C1644 la_data_in[105] vdd 0.63fF +C1645 la_oenb[104] vdd 0.63fF +C1646 la_data_out[104] vdd 0.63fF +C1647 la_data_in[104] vdd 0.63fF +C1648 la_oenb[103] vdd 0.63fF +C1649 la_data_out[103] vdd 0.63fF +C1650 la_data_in[103] vdd 0.63fF +C1651 la_oenb[102] vdd 0.63fF +C1652 la_data_out[102] vdd 0.63fF +C1653 la_data_in[102] vdd 0.63fF +C1654 la_oenb[101] vdd 0.63fF +C1655 la_data_out[101] vdd 0.63fF +C1656 la_data_in[101] vdd 0.63fF +C1657 la_oenb[100] vdd 0.63fF +C1658 la_data_out[100] vdd 0.63fF +C1659 la_data_in[100] vdd 0.63fF +C1660 la_oenb[99] vdd 0.63fF +C1661 la_data_out[99] vdd 0.63fF +C1662 la_data_in[99] vdd 0.63fF +C1663 la_oenb[98] vdd 0.63fF +C1664 la_data_out[98] vdd 0.63fF +C1665 la_data_in[98] vdd 0.63fF +C1666 la_oenb[97] vdd 0.63fF +C1667 la_data_out[97] vdd 0.63fF +C1668 la_data_in[97] vdd 0.63fF +C1669 la_oenb[96] vdd 0.63fF +C1670 la_data_out[96] vdd 0.63fF +C1671 la_data_in[96] vdd 0.63fF +C1672 la_oenb[95] vdd 0.63fF +C1673 la_data_out[95] vdd 0.63fF +C1674 la_data_in[95] vdd 0.63fF +C1675 la_oenb[94] vdd 0.63fF +C1676 la_data_out[94] vdd 0.63fF +C1677 la_data_in[94] vdd 0.63fF +C1678 la_oenb[93] vdd 0.63fF +C1679 la_data_out[93] vdd 0.63fF +C1680 la_data_in[93] vdd 0.63fF +C1681 la_oenb[92] vdd 0.63fF +C1682 la_data_out[92] vdd 0.63fF +C1683 la_data_in[92] vdd 0.63fF +C1684 la_oenb[91] vdd 0.63fF +C1685 la_data_out[91] vdd 0.63fF +C1686 la_data_in[91] vdd 0.63fF +C1687 la_oenb[90] vdd 0.63fF +C1688 la_data_out[90] vdd 0.63fF +C1689 la_data_in[90] vdd 0.63fF +C1690 la_oenb[89] vdd 0.63fF +C1691 la_data_out[89] vdd 0.63fF +C1692 la_data_in[89] vdd 0.63fF +C1693 la_oenb[88] vdd 0.63fF +C1694 la_data_out[88] vdd 0.63fF +C1695 la_data_in[88] vdd 0.63fF +C1696 la_oenb[87] vdd 0.63fF +C1697 la_data_out[87] vdd 0.63fF +C1698 la_data_in[87] vdd 0.63fF +C1699 la_oenb[86] vdd 0.63fF +C1700 la_data_out[86] vdd 0.63fF +C1701 la_data_in[86] vdd 0.63fF +C1702 la_oenb[85] vdd 0.63fF +C1703 la_data_out[85] vdd 0.63fF +C1704 la_data_in[85] vdd 0.63fF +C1705 la_oenb[84] vdd 0.63fF +C1706 la_data_out[84] vdd 0.63fF +C1707 la_data_in[84] vdd 0.63fF +C1708 la_oenb[83] vdd 0.63fF +C1709 la_data_out[83] vdd 0.63fF +C1710 la_data_in[83] vdd 0.63fF +C1711 la_oenb[82] vdd 0.63fF +C1712 la_data_out[82] vdd 0.63fF +C1713 la_data_in[82] vdd 0.63fF +C1714 la_oenb[81] vdd 0.63fF +C1715 la_data_out[81] vdd 0.63fF +C1716 la_data_in[81] vdd 0.63fF +C1717 la_oenb[80] vdd 0.63fF +C1718 la_data_out[80] vdd 0.63fF +C1719 la_data_in[80] vdd 0.63fF +C1720 la_oenb[79] vdd 0.63fF +C1721 la_data_out[79] vdd 0.63fF +C1722 la_data_in[79] vdd 0.63fF +C1723 la_oenb[78] vdd 0.63fF +C1724 la_data_out[78] vdd 0.63fF +C1725 la_data_in[78] vdd 0.63fF +C1726 la_oenb[77] vdd 0.63fF +C1727 la_data_out[77] vdd 0.63fF +C1728 la_data_in[77] vdd 0.63fF +C1729 la_oenb[76] vdd 0.63fF +C1730 la_data_out[76] vdd 0.63fF +C1731 la_data_in[76] vdd 0.63fF +C1732 la_oenb[75] vdd 0.63fF +C1733 la_data_out[75] vdd 0.63fF +C1734 la_data_in[75] vdd 0.63fF +C1735 la_oenb[74] vdd 0.63fF +C1736 la_data_out[74] vdd 0.63fF +C1737 la_data_in[74] vdd 0.63fF +C1738 la_oenb[73] vdd 0.63fF +C1739 la_data_out[73] vdd 0.63fF +C1740 la_data_in[73] vdd 0.63fF +C1741 la_oenb[72] vdd 0.63fF +C1742 la_data_out[72] vdd 0.63fF +C1743 la_data_in[72] vdd 0.63fF +C1744 la_oenb[71] vdd 0.63fF +C1745 la_data_out[71] vdd 0.63fF +C1746 la_data_in[71] vdd 0.63fF +C1747 la_oenb[70] vdd 0.63fF +C1748 la_data_out[70] vdd 0.63fF +C1749 la_data_in[70] vdd 0.63fF +C1750 la_oenb[69] vdd 0.63fF +C1751 la_data_out[69] vdd 0.63fF +C1752 la_data_in[69] vdd 0.63fF +C1753 la_oenb[68] vdd 0.63fF +C1754 la_data_out[68] vdd 0.63fF +C1755 la_data_in[68] vdd 0.63fF +C1756 la_oenb[67] vdd 0.63fF +C1757 la_data_out[67] vdd 0.63fF +C1758 la_data_in[67] vdd 0.63fF +C1759 la_oenb[66] vdd 0.63fF +C1760 la_data_out[66] vdd 0.63fF +C1761 la_data_in[66] vdd 0.63fF +C1762 la_oenb[65] vdd 0.63fF +C1763 la_data_out[65] vdd 0.63fF +C1764 la_data_in[65] vdd 0.63fF +C1765 la_oenb[64] vdd 0.63fF +C1766 la_data_out[64] vdd 0.63fF +C1767 la_data_in[64] vdd 0.63fF +C1768 la_oenb[63] vdd 0.63fF +C1769 la_data_out[63] vdd 0.63fF +C1770 la_data_in[63] vdd 0.63fF +C1771 la_oenb[62] vdd 0.63fF +C1772 la_data_out[62] vdd 0.63fF +C1773 la_data_in[62] vdd 0.63fF +C1774 la_oenb[61] vdd 0.63fF +C1775 la_data_out[61] vdd 0.63fF +C1776 la_data_in[61] vdd 0.63fF +C1777 la_oenb[60] vdd 0.63fF +C1778 la_data_out[60] vdd 0.63fF +C1779 la_data_in[60] vdd 0.63fF +C1780 la_oenb[59] vdd 0.63fF +C1781 la_data_out[59] vdd 0.63fF +C1782 la_data_in[59] vdd 0.63fF +C1783 la_oenb[58] vdd 0.63fF +C1784 la_data_out[58] vdd 0.63fF +C1785 la_data_in[58] vdd 0.63fF +C1786 la_oenb[57] vdd 0.63fF +C1787 la_data_out[57] vdd 0.63fF +C1788 la_data_in[57] vdd 0.63fF +C1789 la_oenb[56] vdd 0.63fF +C1790 la_data_out[56] vdd 0.63fF +C1791 la_data_in[56] vdd 0.63fF +C1792 la_oenb[55] vdd 0.63fF +C1793 la_data_out[55] vdd 0.63fF +C1794 la_data_in[55] vdd 0.63fF +C1795 la_oenb[54] vdd 0.63fF +C1796 la_data_out[54] vdd 0.63fF +C1797 la_data_in[54] vdd 0.63fF +C1798 la_oenb[53] vdd 0.63fF +C1799 la_data_out[53] vdd 0.63fF +C1800 la_data_in[53] vdd 0.63fF +C1801 la_oenb[52] vdd 0.63fF +C1802 la_data_out[52] vdd 0.63fF +C1803 la_data_in[52] vdd 0.63fF +C1804 la_oenb[51] vdd 0.63fF +C1805 la_data_out[51] vdd 0.63fF +C1806 la_data_in[51] vdd 0.63fF +C1807 la_oenb[50] vdd 0.63fF +C1808 la_data_out[50] vdd 0.63fF +C1809 la_data_in[50] vdd 0.63fF +C1810 la_oenb[49] vdd 0.63fF +C1811 la_data_out[49] vdd 0.63fF +C1812 la_data_in[49] vdd 0.63fF +C1813 la_oenb[48] vdd 0.63fF +C1814 la_data_out[48] vdd 0.63fF +C1815 la_data_in[48] vdd 0.63fF +C1816 la_oenb[47] vdd 0.63fF +C1817 la_data_out[47] vdd 0.63fF +C1818 la_data_in[47] vdd 0.63fF +C1819 la_oenb[46] vdd 0.63fF +C1820 la_data_out[46] vdd 0.63fF +C1821 la_data_in[46] vdd 0.63fF +C1822 la_oenb[45] vdd 0.63fF +C1823 la_data_out[45] vdd 0.63fF +C1824 la_data_in[45] vdd 0.63fF +C1825 la_oenb[44] vdd 0.63fF +C1826 la_data_out[44] vdd 0.63fF +C1827 la_data_in[44] vdd 0.63fF +C1828 la_oenb[43] vdd 0.63fF +C1829 la_data_out[43] vdd 0.63fF +C1830 la_data_in[43] vdd 0.63fF +C1831 la_oenb[42] vdd 0.63fF +C1832 la_data_out[42] vdd 0.63fF +C1833 la_data_in[42] vdd 0.63fF +C1834 la_oenb[41] vdd 0.63fF +C1835 la_data_out[41] vdd 0.63fF +C1836 la_data_in[41] vdd 0.63fF +C1837 la_oenb[40] vdd 0.63fF +C1838 la_data_out[40] vdd 0.63fF +C1839 la_data_in[40] vdd 0.63fF +C1840 la_oenb[39] vdd 0.63fF +C1841 la_data_out[39] vdd 0.63fF +C1842 la_data_in[39] vdd 0.63fF +C1843 la_oenb[38] vdd 0.63fF +C1844 la_data_out[38] vdd 0.63fF +C1845 la_data_in[38] vdd 0.63fF +C1846 la_oenb[37] vdd 0.63fF +C1847 la_data_out[37] vdd 0.63fF +C1848 la_data_in[37] vdd 0.63fF +C1849 la_oenb[36] vdd 0.63fF +C1850 la_data_out[36] vdd 0.63fF +C1851 la_data_in[36] vdd 0.63fF +C1852 la_oenb[35] vdd 0.63fF +C1853 la_data_out[35] vdd 0.63fF +C1854 la_data_in[35] vdd 0.63fF +C1855 la_oenb[34] vdd 0.63fF +C1856 la_data_out[34] vdd 0.63fF +C1857 la_data_in[34] vdd 0.63fF +C1858 la_oenb[33] vdd 0.63fF +C1859 la_data_out[33] vdd 0.63fF +C1860 la_data_in[33] vdd 0.63fF +C1861 la_oenb[32] vdd 0.63fF +C1862 la_data_out[32] vdd 0.63fF +C1863 la_data_in[32] vdd 0.63fF +C1864 la_oenb[31] vdd 0.63fF +C1865 la_data_out[31] vdd 0.63fF +C1866 la_data_in[31] vdd 0.63fF +C1867 la_oenb[30] vdd 0.63fF +C1868 la_data_out[30] vdd 0.63fF +C1869 la_data_in[30] vdd 0.63fF +C1870 la_oenb[29] vdd 0.63fF +C1871 la_data_out[29] vdd 0.63fF +C1872 la_data_in[29] vdd 0.63fF +C1873 la_oenb[28] vdd 0.63fF +C1874 la_data_out[28] vdd 0.63fF +C1875 la_data_in[28] vdd 0.63fF +C1876 la_oenb[27] vdd 0.63fF +C1877 la_data_out[27] vdd 0.63fF +C1878 la_data_in[27] vdd 0.63fF +C1879 la_oenb[26] vdd 0.63fF +C1880 la_data_out[26] vdd 0.63fF +C1881 la_data_in[26] vdd 0.63fF +C1882 la_oenb[25] vdd 0.63fF +C1883 la_data_out[25] vdd 0.63fF +C1884 la_data_in[25] vdd 0.63fF +C1885 la_oenb[24] vdd 0.63fF +C1886 la_data_out[24] vdd 0.63fF +C1887 la_data_in[24] vdd 0.63fF +C1888 la_oenb[23] vdd 0.63fF +C1889 la_data_out[23] vdd 0.63fF +C1890 la_data_in[23] vdd 0.63fF +C1891 la_oenb[22] vdd 0.63fF +C1892 la_data_out[22] vdd 0.63fF +C1893 la_data_in[22] vdd 0.63fF +C1894 la_oenb[21] vdd 0.63fF +C1895 la_data_out[21] vdd 0.63fF +C1896 la_data_in[21] vdd 0.63fF +C1897 la_oenb[20] vdd 0.63fF +C1898 la_data_out[20] vdd 0.63fF +C1899 la_data_in[20] vdd 0.63fF +C1900 la_oenb[19] vdd 0.63fF +C1901 la_data_out[19] vdd 0.63fF +C1902 la_data_in[19] vdd 0.63fF +C1903 la_oenb[18] vdd 0.63fF +C1904 la_data_out[18] vdd 0.63fF +C1905 la_data_in[18] vdd 0.63fF +C1906 la_oenb[17] vdd 0.63fF +C1907 la_data_out[17] vdd 0.63fF +C1908 la_data_in[17] vdd 0.63fF +C1909 la_oenb[16] vdd 0.63fF +C1910 la_data_out[16] vdd 0.63fF +C1911 la_data_in[16] vdd 0.63fF +C1912 la_oenb[15] vdd 0.63fF +C1913 la_data_out[15] vdd 0.63fF +C1914 la_data_in[15] vdd 0.63fF +C1915 la_oenb[14] vdd 0.63fF +C1916 la_data_out[14] vdd 0.63fF +C1917 la_data_in[14] vdd 0.63fF +C1918 la_oenb[13] vdd 0.63fF +C1919 la_data_out[13] vdd 0.63fF +C1920 la_data_in[13] vdd 0.63fF +C1921 la_oenb[12] vdd 0.63fF +C1922 la_data_out[12] vdd 0.63fF +C1923 la_data_in[12] vdd 0.63fF +C1924 la_oenb[11] vdd 0.63fF +C1925 la_data_out[11] vdd 0.63fF +C1926 la_data_in[11] vdd 0.63fF +C1927 la_oenb[10] vdd 0.63fF +C1928 la_data_out[10] vdd 0.63fF +C1929 la_data_in[10] vdd 0.63fF +C1930 la_oenb[9] vdd 0.63fF +C1931 la_data_out[9] vdd 0.63fF +C1932 la_data_in[9] vdd 0.63fF +C1933 la_oenb[8] vdd 0.63fF +C1934 la_data_out[8] vdd 0.63fF +C1935 la_data_in[8] vdd 0.63fF +C1936 la_oenb[7] vdd 0.63fF +C1937 la_data_out[7] vdd 0.63fF +C1938 la_data_in[7] vdd 0.63fF +C1939 la_oenb[6] vdd 0.63fF +C1940 la_data_out[6] vdd 0.63fF +C1941 la_data_in[6] vdd 0.63fF +C1942 la_oenb[5] vdd 0.63fF +C1943 la_data_out[5] vdd 0.63fF +C1944 la_data_in[5] vdd 0.63fF +C1945 la_oenb[4] vdd 0.63fF +C1946 la_data_out[4] vdd 0.63fF +C1947 la_data_in[4] vdd 0.63fF +C1948 la_oenb[3] vdd 0.63fF +C1949 la_data_out[3] vdd 0.63fF +C1950 la_data_in[3] vdd 0.63fF +C1951 la_oenb[2] vdd 0.63fF +C1952 la_data_out[2] vdd 0.63fF +C1953 la_data_in[2] vdd 0.63fF +C1954 la_oenb[1] vdd 0.63fF +C1955 la_data_out[1] vdd 0.63fF +C1956 la_data_in[1] vdd 0.63fF +C1957 la_oenb[0] vdd 0.63fF +C1958 la_data_out[0] vdd 0.63fF +C1959 la_data_in[0] vdd 0.63fF +C1960 wbs_dat_o[31] vdd 0.63fF +C1961 wbs_dat_i[31] vdd 0.63fF +C1962 wbs_adr_i[31] vdd 0.63fF +C1963 wbs_dat_o[30] vdd 0.63fF +C1964 wbs_dat_i[30] vdd 0.63fF +C1965 wbs_adr_i[30] vdd 0.63fF +C1966 wbs_dat_o[29] vdd 0.63fF +C1967 wbs_dat_i[29] vdd 0.63fF +C1968 wbs_adr_i[29] vdd 0.63fF +C1969 wbs_dat_o[28] vdd 0.63fF +C1970 wbs_dat_i[28] vdd 0.63fF +C1971 wbs_adr_i[28] vdd 0.63fF +C1972 wbs_dat_o[27] vdd 0.63fF +C1973 wbs_dat_i[27] vdd 0.63fF +C1974 wbs_adr_i[27] vdd 0.63fF +C1975 wbs_dat_o[26] vdd 0.63fF +C1976 wbs_dat_i[26] vdd 0.63fF +C1977 wbs_adr_i[26] vdd 0.63fF +C1978 wbs_dat_o[25] vdd 0.63fF +C1979 wbs_dat_i[25] vdd 0.63fF +C1980 wbs_adr_i[25] vdd 0.63fF +C1981 wbs_dat_o[24] vdd 0.63fF +C1982 wbs_dat_i[24] vdd 0.63fF +C1983 wbs_adr_i[24] vdd 0.63fF +C1984 wbs_dat_o[23] vdd 0.63fF +C1985 wbs_dat_i[23] vdd 0.63fF +C1986 wbs_adr_i[23] vdd 0.63fF +C1987 wbs_dat_o[22] vdd 0.63fF +C1988 wbs_dat_i[22] vdd 0.63fF +C1989 wbs_adr_i[22] vdd 0.63fF +C1990 wbs_dat_o[21] vdd 0.63fF +C1991 wbs_dat_i[21] vdd 0.63fF +C1992 wbs_adr_i[21] vdd 0.63fF +C1993 wbs_dat_o[20] vdd 0.63fF +C1994 wbs_dat_i[20] vdd 0.63fF +C1995 wbs_adr_i[20] vdd 0.63fF +C1996 wbs_dat_o[19] vdd 0.63fF +C1997 wbs_dat_i[19] vdd 0.63fF +C1998 wbs_adr_i[19] vdd 0.63fF +C1999 wbs_dat_o[18] vdd 0.63fF +C2000 wbs_dat_i[18] vdd 0.63fF +C2001 wbs_adr_i[18] vdd 0.63fF +C2002 wbs_dat_o[17] vdd 0.63fF +C2003 wbs_dat_i[17] vdd 0.63fF +C2004 wbs_adr_i[17] vdd 0.63fF +C2005 wbs_dat_o[16] vdd 0.63fF +C2006 wbs_dat_i[16] vdd 0.63fF +C2007 wbs_adr_i[16] vdd 0.63fF +C2008 wbs_dat_o[15] vdd 0.63fF +C2009 wbs_dat_i[15] vdd 0.63fF +C2010 wbs_adr_i[15] vdd 0.63fF +C2011 wbs_dat_o[14] vdd 0.63fF +C2012 wbs_dat_i[14] vdd 0.63fF +C2013 wbs_adr_i[14] vdd 0.63fF +C2014 wbs_dat_o[13] vdd 0.63fF +C2015 wbs_dat_i[13] vdd 0.63fF +C2016 wbs_adr_i[13] vdd 0.63fF +C2017 wbs_dat_o[12] vdd 0.63fF +C2018 wbs_dat_i[12] vdd 0.63fF +C2019 wbs_adr_i[12] vdd 0.63fF +C2020 wbs_dat_o[11] vdd 0.63fF +C2021 wbs_dat_i[11] vdd 0.63fF +C2022 wbs_adr_i[11] vdd 0.63fF +C2023 wbs_dat_o[10] vdd 0.63fF +C2024 wbs_dat_i[10] vdd 0.63fF +C2025 wbs_adr_i[10] vdd 0.63fF +C2026 wbs_dat_o[9] vdd 0.63fF +C2027 wbs_dat_i[9] vdd 0.63fF +C2028 wbs_adr_i[9] vdd 0.63fF +C2029 wbs_dat_o[8] vdd 0.63fF +C2030 wbs_dat_i[8] vdd 0.63fF +C2031 wbs_adr_i[8] vdd 0.63fF +C2032 wbs_dat_o[7] vdd 0.63fF +C2033 wbs_dat_i[7] vdd 0.63fF +C2034 wbs_adr_i[7] vdd 0.63fF +C2035 wbs_dat_o[6] vdd 0.63fF +C2036 wbs_dat_i[6] vdd 0.63fF +C2037 wbs_adr_i[6] vdd 0.63fF +C2038 wbs_dat_o[5] vdd 0.63fF +C2039 wbs_dat_i[5] vdd 0.63fF +C2040 wbs_adr_i[5] vdd 0.63fF +C2041 wbs_dat_o[4] vdd 0.63fF +C2042 wbs_dat_i[4] vdd 0.63fF +C2043 wbs_adr_i[4] vdd 0.63fF +C2044 wbs_sel_i[3] vdd 0.63fF +C2045 wbs_dat_o[3] vdd 0.63fF +C2046 wbs_dat_i[3] vdd 0.63fF +C2047 wbs_adr_i[3] vdd 0.63fF +C2048 wbs_sel_i[2] vdd 0.63fF +C2049 wbs_dat_o[2] vdd 0.63fF +C2050 wbs_dat_i[2] vdd 0.63fF +C2051 wbs_adr_i[2] vdd 0.63fF +C2052 wbs_sel_i[1] vdd 0.63fF +C2053 wbs_dat_o[1] vdd 0.63fF +C2054 wbs_dat_i[1] vdd 0.63fF +C2055 wbs_adr_i[1] vdd 0.63fF +C2056 wbs_sel_i[0] vdd 0.63fF +C2057 wbs_dat_o[0] vdd 0.63fF +C2058 wbs_dat_i[0] vdd 0.63fF +C2059 wbs_adr_i[0] vdd 0.63fF +C2060 wbs_we_i vdd 0.63fF +C2061 wbs_stb_i vdd 0.63fF +C2062 wbs_cyc_i vdd 0.63fF +C2063 wbs_ack_o vdd 0.63fF +C2064 wb_rst_i vdd 0.63fF +C2065 wb_clk_i vdd 0.63fF +C2066 pll_full_0/divider_0/and_0/Z1 vdd 0.65fF +C2067 pll_full_0/divider_0/and_0/B vdd 2.45fF +C2068 pll_full_0/divider_0/and_0/A vdd 2.35fF +C2069 pll_full_0/divider_0/and_0/out1 vdd 2.99fF +C2070 pll_full_0/divider_0/tspc_2/Z4 vdd 0.86fF +C2071 pll_full_0/divbuf_0/IN vdd 9.95fF +C2072 pll_full_0/divider_0/tspc_2/Z3 vdd 2.26fF +C2073 pll_full_0/divider_0/tspc_2/Z2 vdd 1.46fF +C2074 pll_full_0/divider_0/tspc_2/Z1 vdd 0.99fF +C2075 pll_full_0/divider_0/nor_0/B vdd 6.48fF +C2076 pll_full_0/divider_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING +C2077 pll_full_0/divider_0/tspc_1/Z4 vdd 0.86fF +C2078 pll_full_0/divider_0/tspc_1/Q vdd 3.12fF +C2079 pll_full_0/divider_0/tspc_1/Z3 vdd 2.26fF +C2080 pll_full_0/divider_0/tspc_1/Z2 vdd 1.46fF +C2081 pll_full_0/divider_0/tspc_1/Z1 vdd 0.99fF +C2082 pll_full_0/divider_0/nor_1/B vdd 7.12fF +C2083 pll_full_0/divider_0/tspc_1/a_630_n680# vdd 1.15fF **FLOATING +C2084 pll_full_0/divider_0/tspc_0/Z4 vdd 0.86fF +C2085 pll_full_0/divider_0/tspc_0/Q vdd 3.14fF +C2086 pll_full_0/divider_0/tspc_0/Z3 vdd 2.26fF +C2087 pll_full_0/divider_0/tspc_0/Z2 vdd 1.46fF +C2088 pll_full_0/divider_0/tspc_0/Z1 vdd 0.99fF +C2089 pll_full_0/divider_0/nor_1/A vdd 7.08fF +C2090 pll_full_0/divider_0/tspc_0/a_630_n680# vdd 1.15fF **FLOATING +C2091 pll_full_0/divider_0/clk vdd 31.85fF +C2092 pll_full_0/divider_0/prescaler_0/Out vdd 4.59fF +C2093 pll_full_0/divider_0/prescaler_0/nand_1/z1 vdd 0.36fF +C2094 pll_full_0/divider_0/prescaler_0/tspc_2/D vdd 2.64fF +C2095 pll_full_0/divider_0/prescaler_0/tspc_0/Q vdd 3.64fF +C2096 pll_full_0/divider_0/prescaler_0/tspc_1/Q vdd 3.61fF +C2097 pll_full_0/divider_0/prescaler_0/nand_0/z1 vdd 0.36fF +C2098 pll_full_0/divider_0/prescaler_0/tspc_0/D vdd 3.12fF +C2099 pll_full_0/divider_0/and_0/OUT vdd 5.67fF +C2100 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 vdd 0.86fF +C2101 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 vdd 2.26fF +C2102 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 vdd 1.46fF +C2103 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 vdd 0.99fF +C2104 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# vdd 1.16fF **FLOATING +C2105 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# vdd 2.11fF **FLOATING +C2106 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 vdd 0.86fF +C2107 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 vdd 2.26fF +C2108 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 vdd 1.48fF +C2109 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 vdd 0.99fF +C2110 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# vdd 1.14fF **FLOATING +C2111 pll_full_0/divider_0/prescaler_0/m1_2700_2190# vdd 4.22fF **FLOATING +C2112 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 vdd 0.86fF +C2113 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 vdd 2.26fF +C2114 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 vdd 1.19fF +C2115 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 vdd 0.99fF +C2116 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# vdd 1.47fF **FLOATING +C2117 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# vdd 2.11fF **FLOATING +C2118 pll_full_0/divider_0/nor_1/Z1 vdd 1.34fF +C2119 pll_full_0/divider_0/nor_0/Z1 vdd 1.34fF +C2120 pll_full_0/divbuf_1/OUT vdd 363.82fF +C2121 pll_full_0/divbuf_1/OUT5 vdd 350.37fF +C2122 pll_full_0/divbuf_1/OUT4 vdd 133.72fF +C2123 pll_full_0/divbuf_1/OUT3 vdd 34.03fF +C2124 pll_full_0/divbuf_1/OUT2 vdd 8.71fF +C2125 pll_full_0/divbuf_1/a_492_n240# vdd 2.46fF **FLOATING +C2126 pll_full_0/divbuf_0/OUT5 vdd 350.37fF +C2127 pll_full_0/divbuf_0/OUT4 vdd 133.72fF +C2128 pll_full_0/divbuf_0/OUT3 vdd 34.03fF +C2129 pll_full_0/divbuf_0/OUT2 vdd 8.71fF +C2130 pll_full_0/divbuf_0/a_492_n240# vdd 2.46fF **FLOATING +C2131 pll_full_0/ro_complete_0/cbank_2/v vdd 17.88fF +C2132 pll_full_0/ro_complete_0/cbank_2/switch_5/vin vdd 0.78fF +C2133 pll_full_0/ro_complete_0/cbank_2/switch_4/vin vdd 1.50fF +C2134 pll_full_0/ro_complete_0/cbank_2/switch_2/vin vdd 1.30fF +C2135 pll_full_0/ro_complete_0/cbank_2/switch_3/vin vdd 0.56fF +C2136 pll_full_0/ro_complete_0/cbank_2/switch_1/vin vdd 1.14fF +C2137 pll_full_0/ro_complete_0/cbank_2/switch_0/vin vdd 1.02fF +C2138 pll_full_0/ro_complete_0/cbank_1/switch_5/vin vdd 0.78fF +C2139 pll_full_0/ro_complete_0/a0 vdd 7.88fF +C2140 pll_full_0/ro_complete_0/cbank_1/switch_4/vin vdd 1.50fF +C2141 pll_full_0/ro_complete_0/a1 vdd 5.39fF +C2142 pll_full_0/ro_complete_0/cbank_1/switch_2/vin vdd 1.30fF +C2143 pll_full_0/ro_complete_0/a3 vdd 6.85fF +C2144 pll_full_0/ro_complete_0/cbank_1/switch_3/vin vdd 0.56fF +C2145 pll_full_0/ro_complete_0/a2 vdd 5.48fF +C2146 pll_full_0/ro_complete_0/cbank_1/switch_1/vin vdd 1.14fF +C2147 pll_full_0/ro_complete_0/a4 vdd 5.36fF +C2148 pll_full_0/ro_complete_0/cbank_1/switch_0/vin vdd 1.02fF +C2149 pll_full_0/ro_complete_0/a5 vdd 5.19fF +C2150 pll_full_0/ro_complete_0/cbank_0/v vdd 15.02fF +C2151 pll_full_0/ro_complete_0/cbank_0/switch_5/vin vdd 0.78fF +C2152 pll_full_0/ro_complete_0/cbank_0/switch_4/vin vdd 1.50fF +C2153 pll_full_0/ro_complete_0/cbank_0/switch_2/vin vdd 1.30fF +C2154 pll_full_0/ro_complete_0/cbank_0/switch_3/vin vdd 0.56fF +C2155 pll_full_0/ro_complete_0/cbank_0/switch_1/vin vdd 1.14fF +C2156 pll_full_0/ro_complete_0/cbank_0/switch_0/vin vdd 1.02fF +C2157 pll_full_0/ro_complete_0/ro_var_extend_0/vcont vdd 0.27fF +C2158 pll_full_0/filter_0/a_4216_n5230# vdd 419.25fF **FLOATING +C2159 pll_full_0/filter_0/a_4216_n2998# vdd 1.39fF **FLOATING +C2160 pll_full_0/cp_0/down vdd 1.54fF +C2161 pll_full_0/cp_0/upbar vdd 1.79fF +C2162 pll_full_0/cp_0/a_7110_n2840# vdd 0.17fF **FLOATING +C2163 pll_full_0/cp_0/a_3060_n2840# vdd 1.71fF **FLOATING +C2164 pll_full_0/cp_0/a_7110_0# vdd 0.17fF **FLOATING +C2165 pll_full_0/cp_0/a_6370_0# vdd 0.40fF **FLOATING +C2166 pll_full_0/cp_0/a_3060_0# vdd 2.49fF **FLOATING +C2167 pll_full_0/cp_0/a_1710_0# vdd 7.47fF **FLOATING +C2168 pll_full_0/pd_0/and_pd_0/Z1 vdd 0.39fF +C2169 pll_full_0/pd_0/and_pd_0/Out1 vdd 2.22fF +C2170 pll_full_0/pd_0/tspc_r_1/z5 vdd 1.10fF +C2171 pll_full_0/pd_0/tspc_r_1/Z4 vdd 1.07fF +C2172 pll_full_0/pd_0/tspc_r_1/Qbar vdd 0.88fF +C2173 pll_full_0/pd_0/tspc_r_1/Z2 vdd 1.22fF +C2174 pll_full_0/pd_0/tspc_r_1/Z1 vdd 0.67fF +C2175 pll_full_0/pd_0/UP vdd 6.61fF +C2176 pll_full_0/pd_0/tspc_r_1/Qbar1 vdd 1.34fF +C2177 pll_full_0/pd_0/tspc_r_1/Z3 vdd 2.12fF +C2178 pll_full_0/pd_0/REF vdd 6.44fF +C2179 pll_full_0/pd_0/tspc_r_0/z5 vdd 1.10fF +C2180 pll_full_0/pd_0/tspc_r_0/Z4 vdd 1.07fF +C2181 pll_full_0/pd_0/R vdd 3.05fF +C2182 pll_full_0/pd_0/tspc_r_0/Qbar vdd 0.79fF +C2183 pll_full_0/pd_0/tspc_r_0/Z2 vdd 1.22fF +C2184 pll_full_0/pd_0/tspc_r_0/Z1 vdd 0.67fF +C2185 pll_full_0/pd_0/DOWN vdd 7.24fF +C2186 pll_full_0/pd_0/tspc_r_0/Qbar1 vdd 1.34fF +C2187 pll_full_0/pd_0/tspc_r_0/Z3 vdd 2.12fF +C2188 pll_full_0/pd_0/DIV vdd 371.87fF +C2189 divider_0/and_0/Z1 vdd 0.74fF +C2190 divider_0/and_0/B vdd 2.25fF +C2191 divider_0/and_0/A vdd 2.19fF +C2192 divider_0/and_0/out1 vdd 2.93fF +C2193 divider_0/tspc_2/Z4 vdd 0.86fF +C2194 divider_0/Out vdd 1.60fF +C2195 divider_0/tspc_2/Z3 vdd 2.26fF +C2196 divider_0/tspc_2/Z2 vdd 1.46fF +C2197 divider_0/tspc_2/Z1 vdd 0.99fF +C2198 divider_0/nor_0/B vdd 6.33fF +C2199 divider_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING +C2200 divider_0/tspc_1/Z4 vdd 0.86fF +C2201 divider_0/tspc_1/Q vdd 3.12fF +C2202 divider_0/tspc_1/Z3 vdd 2.26fF +C2203 divider_0/tspc_1/Z2 vdd 1.46fF +C2204 divider_0/tspc_1/Z1 vdd 0.99fF +C2205 divider_0/nor_1/B vdd 7.05fF +C2206 divider_0/tspc_1/a_630_n680# vdd 1.15fF **FLOATING +C2207 divider_0/tspc_0/Z4 vdd 0.86fF +C2208 divider_0/tspc_0/Q vdd 3.14fF +C2209 divider_0/tspc_0/Z3 vdd 2.26fF +C2210 divider_0/tspc_0/Z2 vdd 1.46fF +C2211 divider_0/tspc_0/Z1 vdd 0.99fF +C2212 divider_0/nor_1/A vdd 7.04fF +C2213 divider_0/tspc_0/a_630_n680# vdd 1.15fF **FLOATING +C2214 divider_0/clk vdd 5.63fF +C2215 divider_0/prescaler_0/Out vdd 4.59fF +C2216 divider_0/prescaler_0/nand_1/z1 vdd 0.36fF +C2217 divider_0/prescaler_0/tspc_2/D vdd 2.64fF +C2218 divider_0/prescaler_0/tspc_0/Q vdd 3.64fF +C2219 divider_0/prescaler_0/tspc_1/Q vdd 3.61fF +C2220 divider_0/prescaler_0/nand_0/z1 vdd 0.36fF +C2221 divider_0/prescaler_0/tspc_0/D vdd 3.12fF +C2222 divider_0/and_0/OUT vdd 5.62fF +C2223 divider_0/prescaler_0/tspc_2/Z4 vdd 0.86fF +C2224 divider_0/prescaler_0/tspc_2/Z3 vdd 2.26fF +C2225 divider_0/prescaler_0/tspc_2/Z2 vdd 1.46fF +C2226 divider_0/prescaler_0/tspc_2/Z1 vdd 0.99fF +C2227 divider_0/prescaler_0/tspc_2/a_630_n680# vdd 1.16fF **FLOATING +C2228 divider_0/prescaler_0/tspc_2/a_740_n680# vdd 2.11fF **FLOATING +C2229 divider_0/prescaler_0/tspc_1/Z4 vdd 0.86fF +C2230 divider_0/prescaler_0/tspc_1/Z3 vdd 2.26fF +C2231 divider_0/prescaler_0/tspc_1/Z2 vdd 1.48fF +C2232 divider_0/prescaler_0/tspc_1/Z1 vdd 0.99fF +C2233 divider_0/prescaler_0/tspc_1/a_630_n680# vdd 1.14fF **FLOATING +C2234 divider_0/prescaler_0/m1_2700_2190# vdd 4.22fF **FLOATING +C2235 divider_0/prescaler_0/tspc_0/Z4 vdd 0.86fF +C2236 divider_0/prescaler_0/tspc_0/Z3 vdd 2.26fF +C2237 divider_0/prescaler_0/tspc_0/Z2 vdd 1.46fF +C2238 divider_0/prescaler_0/tspc_0/Z1 vdd 0.99fF +C2239 divider_0/prescaler_0/tspc_0/a_630_n680# vdd 1.14fF **FLOATING +C2240 divider_0/prescaler_0/tspc_0/a_740_n680# vdd 2.11fF **FLOATING +C2241 divider_0/nor_1/Z1 vdd 1.34fF +C2242 divider_0/nor_0/Z1 vdd 1.34fF +C2243 divider_0/mc2 vdd 5.29fF +C2244 divbuf_7/OUT vdd 363.82fF +C2245 divbuf_7/OUT5 vdd 350.37fF +C2246 divbuf_7/OUT4 vdd 133.72fF +C2247 divbuf_7/OUT3 vdd 34.03fF +C2248 divbuf_7/OUT2 vdd 8.71fF +C2249 divbuf_7/IN vdd 0.89fF +C2250 divbuf_7/a_492_n240# vdd 2.46fF **FLOATING +C2251 divbuf_6/OUT vdd 363.82fF +C2252 divbuf_6/OUT5 vdd 350.37fF +C2253 divbuf_6/OUT4 vdd 133.72fF +C2254 divbuf_6/OUT3 vdd 34.03fF +C2255 divbuf_6/OUT2 vdd 8.71fF +C2256 divbuf_6/IN vdd 0.89fF +C2257 divbuf_6/a_492_n240# vdd 2.46fF **FLOATING +C2258 divbuf_5/OUT vdd 363.82fF +C2259 divbuf_5/OUT5 vdd 350.37fF +C2260 divbuf_5/OUT4 vdd 133.72fF +C2261 divbuf_5/OUT3 vdd 34.03fF +C2262 divbuf_5/OUT2 vdd 8.71fF +C2263 divbuf_5/IN vdd 0.89fF +C2264 divbuf_5/a_492_n240# vdd 2.46fF **FLOATING +C2265 divbuf_4/OUT vdd 363.82fF +C2266 divbuf_4/OUT5 vdd 350.37fF +C2267 divbuf_4/OUT4 vdd 133.72fF +C2268 divbuf_4/OUT3 vdd 34.03fF +C2269 divbuf_4/OUT2 vdd 8.71fF +C2270 divbuf_4/IN vdd 0.89fF +C2271 divbuf_4/a_492_n240# vdd 2.46fF **FLOATING +C2272 divbuf_3/OUT vdd 363.82fF +C2273 divbuf_3/OUT5 vdd 350.37fF +C2274 divbuf_3/OUT4 vdd 133.72fF +C2275 divbuf_3/OUT3 vdd 34.03fF +C2276 divbuf_3/OUT2 vdd 8.71fF +C2277 divbuf_3/IN vdd 0.89fF +C2278 divbuf_3/a_492_n240# vdd 2.46fF **FLOATING +C2279 divbuf_2/OUT vdd 363.82fF +C2280 divbuf_2/OUT5 vdd 350.37fF +C2281 divbuf_2/OUT4 vdd 133.72fF +C2282 divbuf_2/OUT3 vdd 34.03fF +C2283 divbuf_2/OUT2 vdd 8.71fF +C2284 divbuf_2/IN vdd 0.89fF +C2285 divbuf_2/a_492_n240# vdd 2.46fF **FLOATING +C2286 divbuf_1/OUT vdd 363.82fF +C2287 divbuf_1/OUT5 vdd 350.37fF +C2288 divbuf_1/OUT4 vdd 133.72fF +C2289 divbuf_1/OUT3 vdd 34.03fF +C2290 divbuf_1/OUT2 vdd 8.71fF +C2291 divbuf_1/IN vdd 0.89fF +C2292 divbuf_1/a_492_n240# vdd 2.46fF **FLOATING +C2293 divbuf_0/OUT vdd 363.82fF +C2294 divbuf_0/OUT5 vdd 350.37fF +C2295 divbuf_0/OUT4 vdd 133.72fF +C2296 divbuf_0/OUT3 vdd 34.03fF +C2297 divbuf_0/OUT2 vdd 8.71fF +C2298 divbuf_0/IN vdd 0.89fF +C2299 divbuf_0/a_492_n240# vdd 2.46fF **FLOATING +C2300 ro_complete_0/cbank_2/v vdd 17.84fF +C2301 ro_complete_0/cbank_2/switch_5/vin vdd 0.78fF +C2302 ro_complete_0/cbank_2/switch_4/vin vdd 1.50fF +C2303 ro_complete_0/cbank_2/switch_2/vin vdd 1.30fF +C2304 ro_complete_0/cbank_2/switch_3/vin vdd 0.56fF +C2305 ro_complete_0/cbank_2/switch_1/vin vdd 1.14fF +C2306 ro_complete_0/cbank_2/switch_0/vin vdd 1.02fF +C2307 ro_complete_0/cbank_1/v vdd 16.34fF +C2308 ro_complete_0/cbank_1/switch_5/vin vdd 0.78fF +C2309 ro_complete_0/a0 vdd 7.88fF +C2310 ro_complete_0/cbank_1/switch_4/vin vdd 1.50fF +C2311 ro_complete_0/a1 vdd 5.39fF +C2312 ro_complete_0/cbank_1/switch_2/vin vdd 1.30fF +C2313 ro_complete_0/a3 vdd 6.85fF +C2314 ro_complete_0/cbank_1/switch_3/vin vdd 0.56fF +C2315 ro_complete_0/a2 vdd 5.48fF +C2316 ro_complete_0/cbank_1/switch_1/vin vdd 1.14fF +C2317 ro_complete_0/a4 vdd 5.36fF +C2318 ro_complete_0/cbank_1/switch_0/vin vdd 1.02fF +C2319 ro_complete_0/a5 vdd 5.19fF +C2320 ro_complete_0/cbank_0/v vdd 14.98fF +C2321 ro_complete_0/cbank_0/switch_5/vin vdd 0.78fF +C2322 ro_complete_0/cbank_0/switch_4/vin vdd 1.50fF +C2323 ro_complete_0/cbank_0/switch_2/vin vdd 1.30fF +C2324 ro_complete_0/cbank_0/switch_3/vin vdd 0.56fF +C2325 ro_complete_0/cbank_0/switch_1/vin vdd 1.14fF +C2326 ro_complete_0/cbank_0/switch_0/vin vdd 1.02fF +C2327 ro_complete_0/ro_var_extend_0/vcont vdd 0.27fF +C2328 filter_0/v vdd 85.69fF +C2329 filter_0/a_4216_n5230# vdd 418.47fF **FLOATING +C2330 filter_0/a_4216_n2998# vdd 1.03fF **FLOATING +C2331 cp_0/down vdd 1.54fF +C2332 cp_0/vbias vdd 2.41fF +C2333 cp_0/out vdd 5.26fF +C2334 cp_0/upbar vdd 1.50fF +C2335 cp_0/a_7110_n2840# vdd 0.17fF **FLOATING +C2336 cp_0/a_3060_n2840# vdd 1.71fF **FLOATING +C2337 cp_0/a_7110_0# vdd 0.17fF **FLOATING +C2338 cp_0/a_6370_0# vdd 0.40fF **FLOATING +C2339 cp_0/a_3060_0# vdd 1.65fF **FLOATING +C2340 cp_0/a_1710_0# vdd 5.76fF **FLOATING +C2341 cp_0/a_1710_n2840# vdd 4.89fF **FLOATING +C2342 cp_0/a_10_n50# vdd 2.96fF **FLOATING +C2343 ro_div_new_0/divider_0/and_0/Z1 vdd 0.74fF +C2344 ro_div_new_0/divider_0/and_0/B vdd 2.25fF +C2345 ro_div_new_0/divider_0/and_0/A vdd 2.19fF +C2346 ro_div_new_0/divider_0/and_0/out1 vdd 2.93fF +C2347 ro_div_new_0/divider_0/tspc_2/Z4 vdd 0.86fF +C2348 ro_div_new_0/divider_0/Out vdd 1.60fF +C2349 ro_div_new_0/divider_0/tspc_2/Z3 vdd 2.26fF +C2350 ro_div_new_0/divider_0/tspc_2/Z2 vdd 1.46fF +C2351 ro_div_new_0/divider_0/tspc_2/Z1 vdd 0.99fF +C2352 ro_div_new_0/divider_0/nor_0/B vdd 6.33fF +C2353 ro_div_new_0/divider_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING +C2354 ro_div_new_0/divider_0/tspc_1/Z4 vdd 0.86fF +C2355 ro_div_new_0/divider_0/tspc_1/Q vdd 3.12fF +C2356 ro_div_new_0/divider_0/tspc_1/Z3 vdd 2.26fF +C2357 ro_div_new_0/divider_0/tspc_1/Z2 vdd 1.46fF +C2358 ro_div_new_0/divider_0/tspc_1/Z1 vdd 0.99fF +C2359 ro_div_new_0/divider_0/nor_1/B vdd 7.05fF +C2360 ro_div_new_0/divider_0/tspc_1/a_630_n680# vdd 1.15fF **FLOATING +C2361 ro_div_new_0/divider_0/tspc_0/Z4 vdd 0.86fF +C2362 ro_div_new_0/divider_0/tspc_0/Q vdd 3.14fF +C2363 ro_div_new_0/divider_0/tspc_0/Z3 vdd 2.26fF +C2364 ro_div_new_0/divider_0/tspc_0/Z2 vdd 1.46fF +C2365 ro_div_new_0/divider_0/tspc_0/Z1 vdd 0.99fF +C2366 ro_div_new_0/divider_0/nor_1/A vdd 7.04fF +C2367 ro_div_new_0/divider_0/tspc_0/a_630_n680# vdd 1.15fF **FLOATING +C2368 ro_div_new_0/divider_0/clk vdd 23.58fF +C2369 ro_div_new_0/divider_0/prescaler_0/Out vdd 4.59fF +C2370 ro_div_new_0/divider_0/prescaler_0/nand_1/z1 vdd 0.36fF +C2371 ro_div_new_0/divider_0/prescaler_0/tspc_2/D vdd 2.64fF +C2372 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q vdd 3.64fF +C2373 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q vdd 3.61fF +C2374 ro_div_new_0/divider_0/prescaler_0/nand_0/z1 vdd 0.36fF +C2375 ro_div_new_0/divider_0/prescaler_0/tspc_0/D vdd 3.12fF +C2376 ro_div_new_0/divider_0/and_0/OUT vdd 5.62fF +C2377 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 vdd 0.86fF +C2378 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 vdd 2.26fF +C2379 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 vdd 1.46fF +C2380 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 vdd 0.99fF +C2381 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# vdd 1.16fF **FLOATING +C2382 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# vdd 2.11fF **FLOATING +C2383 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 vdd 0.86fF +C2384 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 vdd 2.26fF +C2385 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 vdd 1.48fF +C2386 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 vdd 0.99fF +C2387 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# vdd 1.14fF **FLOATING +C2388 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# vdd 4.22fF **FLOATING +C2389 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 vdd 0.86fF +C2390 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 vdd 2.26fF +C2391 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 vdd 1.46fF +C2392 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 vdd 0.99fF +C2393 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# vdd 1.14fF **FLOATING +C2394 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# vdd 2.11fF **FLOATING +C2395 ro_div_new_0/divider_0/nor_1/Z1 vdd 1.34fF +C2396 ro_div_new_0/divider_0/nor_0/Z1 vdd 1.34fF +C2397 ro_div_new_0/divider_0/mc2 vdd 5.29fF +C2398 ro_div_new_0/ro_complete_0/cbank_2/v vdd 17.84fF +C2399 ro_div_new_0/ro_complete_0/cbank_2/switch_5/vin vdd 0.78fF +C2400 ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin vdd 1.50fF +C2401 ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin vdd 1.30fF +C2402 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin vdd 0.56fF +C2403 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin vdd 1.14fF +C2404 ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin vdd 1.02fF +C2405 ro_div_new_0/ro_complete_0/cbank_1/switch_5/vin vdd 0.78fF +C2406 ro_div_new_0/ro_complete_0/a0 vdd 7.88fF +C2407 ro_div_new_0/ro_complete_0/cbank_1/switch_4/vin vdd 1.50fF +C2408 ro_div_new_0/ro_complete_0/a1 vdd 5.39fF +C2409 ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin vdd 1.30fF +C2410 ro_div_new_0/ro_complete_0/a3 vdd 6.85fF +C2411 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin vdd 0.56fF +C2412 ro_div_new_0/ro_complete_0/a2 vdd 5.48fF +C2413 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin vdd 1.14fF +C2414 ro_div_new_0/ro_complete_0/a4 vdd 5.36fF +C2415 ro_div_new_0/ro_complete_0/cbank_1/switch_0/vin vdd 1.02fF +C2416 ro_div_new_0/ro_complete_0/a5 vdd 5.19fF +C2417 ro_div_new_0/ro_complete_0/cbank_0/v vdd 14.98fF +C2418 ro_div_new_0/ro_complete_0/cbank_0/switch_5/vin vdd 0.78fF +C2419 ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin vdd 1.50fF +C2420 ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin vdd 1.30fF +C2421 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin vdd 0.56fF +C2422 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin vdd 1.14fF +C2423 ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin vdd 1.02fF +C2424 ro_div_new_0/ro_complete_0/ro_var_extend_0/vcont vdd 0.27fF +C2425 pd_0/and_pd_0/Z1 vdd 0.39fF +C2426 pd_0/and_pd_0/Out1 vdd 2.22fF +C2427 pd_0/tspc_r_1/z5 vdd 1.10fF +C2428 pd_0/tspc_r_1/Z4 vdd 1.07fF +C2429 pd_0/tspc_r_1/Qbar vdd 0.88fF +C2430 pd_0/tspc_r_1/Z2 vdd 1.22fF +C2431 pd_0/tspc_r_1/Z1 vdd 0.67fF +C2432 pd_0/UP vdd 2.21fF +C2433 pd_0/tspc_r_1/Qbar1 vdd 1.34fF +C2434 pd_0/tspc_r_1/Z3 vdd 2.12fF +C2435 pd_0/REF vdd 1.80fF +C2436 pd_0/tspc_r_0/z5 vdd 1.10fF +C2437 pd_0/tspc_r_0/Z4 vdd 1.07fF +C2438 pd_0/R vdd 3.05fF +C2439 pd_0/tspc_r_0/Qbar vdd 0.79fF +C2440 pd_0/tspc_r_0/Z2 vdd 1.22fF +C2441 pd_0/tspc_r_0/Z1 vdd 0.67fF +C2442 pd_0/DOWN vdd 3.08fF +C2443 pd_0/tspc_r_0/Qbar1 vdd 1.34fF +C2444 pd_0/tspc_r_0/Z3 vdd 2.12fF +C2445 pd_0/DIV vdd 1.82fF +C2446 pd_div_new_0/divider_0/and_0/Z1 vdd 0.74fF +C2447 pd_div_new_0/divider_0/and_0/B vdd 2.25fF +C2448 pd_div_new_0/divider_0/and_0/A vdd 2.19fF +C2449 pd_div_new_0/divider_0/and_0/out1 vdd 2.93fF +C2450 pd_div_new_0/divider_0/tspc_2/Z4 vdd 0.86fF +C2451 pd_div_new_0/pd_0/DIV vdd 4.20fF +C2452 pd_div_new_0/divider_0/tspc_2/Z3 vdd 2.26fF +C2453 pd_div_new_0/divider_0/tspc_2/Z2 vdd 1.46fF +C2454 pd_div_new_0/divider_0/tspc_2/Z1 vdd 0.99fF +C2455 pd_div_new_0/divider_0/nor_0/B vdd 6.33fF +C2456 pd_div_new_0/divider_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING +C2457 pd_div_new_0/divider_0/tspc_1/Z4 vdd 0.86fF +C2458 pd_div_new_0/divider_0/tspc_1/Q vdd 3.12fF +C2459 pd_div_new_0/divider_0/tspc_1/Z3 vdd 2.26fF +C2460 pd_div_new_0/divider_0/tspc_1/Z2 vdd 1.46fF +C2461 pd_div_new_0/divider_0/tspc_1/Z1 vdd 0.99fF +C2462 pd_div_new_0/divider_0/nor_1/B vdd 7.05fF +C2463 pd_div_new_0/divider_0/tspc_1/a_630_n680# vdd 1.15fF **FLOATING +C2464 pd_div_new_0/divider_0/tspc_0/Z4 vdd 0.86fF +C2465 pd_div_new_0/divider_0/tspc_0/Q vdd 3.14fF +C2466 pd_div_new_0/divider_0/tspc_0/Z3 vdd 2.26fF +C2467 pd_div_new_0/divider_0/tspc_0/Z2 vdd 1.46fF +C2468 pd_div_new_0/divider_0/tspc_0/Z1 vdd 0.99fF +C2469 pd_div_new_0/divider_0/nor_1/A vdd 7.04fF +C2470 pd_div_new_0/divider_0/tspc_0/a_630_n680# vdd 1.15fF **FLOATING +C2471 pd_div_new_0/divider_0/clk vdd 5.70fF +C2472 pd_div_new_0/divider_0/prescaler_0/Out vdd 4.59fF +C2473 pd_div_new_0/divider_0/prescaler_0/nand_1/z1 vdd 0.36fF +C2474 pd_div_new_0/divider_0/prescaler_0/tspc_2/D vdd 2.64fF +C2475 pd_div_new_0/divider_0/prescaler_0/tspc_0/Q vdd 3.64fF +C2476 pd_div_new_0/divider_0/prescaler_0/tspc_1/Q vdd 3.61fF +C2477 pd_div_new_0/divider_0/prescaler_0/nand_0/z1 vdd 0.36fF +C2478 pd_div_new_0/divider_0/prescaler_0/tspc_0/D vdd 3.12fF +C2479 pd_div_new_0/divider_0/and_0/OUT vdd 5.62fF +C2480 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z4 vdd 0.86fF +C2481 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z3 vdd 2.26fF +C2482 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z2 vdd 1.46fF +C2483 pd_div_new_0/divider_0/prescaler_0/tspc_2/Z1 vdd 0.99fF +C2484 pd_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# vdd 1.16fF **FLOATING +C2485 pd_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# vdd 2.11fF **FLOATING +C2486 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z4 vdd 0.86fF +C2487 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z3 vdd 2.26fF +C2488 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z2 vdd 1.48fF +C2489 pd_div_new_0/divider_0/prescaler_0/tspc_1/Z1 vdd 0.99fF +C2490 pd_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# vdd 1.14fF **FLOATING +C2491 pd_div_new_0/divider_0/prescaler_0/m1_2700_2190# vdd 4.22fF **FLOATING +C2492 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z4 vdd 0.86fF +C2493 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z3 vdd 2.26fF +C2494 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z2 vdd 1.46fF +C2495 pd_div_new_0/divider_0/prescaler_0/tspc_0/Z1 vdd 0.99fF +C2496 pd_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# vdd 1.14fF **FLOATING +C2497 pd_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# vdd 2.11fF **FLOATING +C2498 pd_div_new_0/divider_0/nor_1/Z1 vdd 1.34fF +C2499 pd_div_new_0/divider_0/nor_0/Z1 vdd 1.34fF +C2500 pd_div_new_0/divider_0/mc2 vdd 5.29fF +C2501 pd_div_new_0/pd_0/and_pd_0/Z1 vdd 0.39fF +C2502 pd_div_new_0/pd_0/and_pd_0/Out1 vdd 2.22fF +C2503 pd_div_new_0/pd_0/tspc_r_1/z5 vdd 1.10fF +C2504 pd_div_new_0/pd_0/tspc_r_1/Z4 vdd 1.07fF +C2505 pd_div_new_0/pd_0/tspc_r_1/Qbar vdd 0.88fF +C2506 pd_div_new_0/pd_0/tspc_r_1/Z2 vdd 1.22fF +C2507 pd_div_new_0/pd_0/tspc_r_1/Z1 vdd 0.67fF +C2508 pd_div_new_0/pd_0/UP vdd 2.31fF +C2509 pd_div_new_0/pd_0/tspc_r_1/Qbar1 vdd 1.34fF +C2510 pd_div_new_0/pd_0/tspc_r_1/Z3 vdd 2.12fF +C2511 pd_div_new_0/pd_0/REF vdd 1.87fF +C2512 pd_div_new_0/pd_0/tspc_r_0/z5 vdd 1.10fF +C2513 pd_div_new_0/pd_0/tspc_r_0/Z4 vdd 1.07fF +C2514 pd_div_new_0/pd_0/R vdd 3.05fF +C2515 pd_div_new_0/pd_0/tspc_r_0/Qbar vdd 0.79fF +C2516 pd_div_new_0/pd_0/tspc_r_0/Z2 vdd 1.22fF +C2517 pd_div_new_0/pd_0/tspc_r_0/Z1 vdd 0.67fF +C2518 pd_div_new_0/pd_0/DOWN vdd 3.17fF +C2519 pd_div_new_0/pd_0/tspc_r_0/Qbar1 vdd 1.34fF +C2520 pd_div_new_0/pd_0/tspc_r_0/Z3 vdd 2.12fF .ends