open vdda1
diff --git a/gds/user_analog_project_wrapper.gds b/gds/user_analog_project_wrapper.gds index e629dc3..90914cb 100644 --- a/gds/user_analog_project_wrapper.gds +++ b/gds/user_analog_project_wrapper.gds Binary files differ
diff --git a/mag/user_analog_project_wrapper.mag b/mag/user_analog_project_wrapper.mag index 9ff137f..62062d4 100644 --- a/mag/user_analog_project_wrapper.mag +++ b/mag/user_analog_project_wrapper.mag
@@ -1,6 +1,6 @@ magic tech sky130A -timestamp 1643054636 +timestamp 1643057442 << nwell >> rect 26424 264625 26589 264812 rect 23497 264291 23832 264611 @@ -1918,13 +1918,14 @@ rect 238022 306014 240372 306879 rect 157010 281056 159393 281993 rect 157010 277890 159389 281056 -rect 255819 277906 272994 277912 -rect 255819 277890 275442 277906 -rect 9908 276989 275442 277890 -rect 9908 275847 273813 276989 +rect 255819 277890 258398 277912 +rect 9908 275109 258398 277890 +rect 259291 277906 272994 277912 +rect 259291 276989 275442 277906 +rect 259291 275847 273813 276989 rect 275123 275847 275442 276989 -rect 9908 275136 275442 275847 -rect 9908 275109 272994 275136 +rect 259291 275136 275442 275847 +rect 259291 275109 272994 275136 rect 9908 274941 256191 275109 rect 9908 274937 14729 274941 rect 17925 274937 256191 274941
diff --git a/netgen/user_analog_project_wrapper.spice b/netgen/user_analog_project_wrapper.spice index 866040c..4b93383 100644 --- a/netgen/user_analog_project_wrapper.spice +++ b/netgen/user_analog_project_wrapper.spice
@@ -88,7 +88,7 @@ + la_oenb[85] la_oenb[86] la_oenb[87] la_oenb[88] la_oenb[89] la_oenb[8] la_oenb[90] + la_oenb[91] la_oenb[92] la_oenb[93] la_oenb[94] la_oenb[95] la_oenb[96] la_oenb[97] + la_oenb[98] la_oenb[99] la_oenb[9] user_clock2 user_irq[0] user_irq[1] user_irq[2] -+ vccd1 vccd2 vssa1 vdda2 vssa2 vssd1 vssd2 wb_clk_i wb_rst_i wbs_ack_o wbs_adr_i[0] ++ vccd1 vccd2 vdda1 vdda2 vssa1 vssa2 vssd1 vssd2 wb_clk_i wb_rst_i wbs_ack_o wbs_adr_i[0] + wbs_adr_i[10] wbs_adr_i[11] wbs_adr_i[12] wbs_adr_i[13] wbs_adr_i[14] wbs_adr_i[15] + wbs_adr_i[16] wbs_adr_i[17] wbs_adr_i[18] wbs_adr_i[19] wbs_adr_i[1] wbs_adr_i[20] + wbs_adr_i[21] wbs_adr_i[22] wbs_adr_i[23] wbs_adr_i[24] wbs_adr_i[25] wbs_adr_i[26] @@ -106,1661 +106,1661 @@ + wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6] + wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3] + wbs_stb_i wbs_we_i -C0 divider_1/prescaler_0/tspc_2/Z4 divider_1/prescaler_0/tspc_2/D 0.11fF -C1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF -C2 divbuf_18/IN divbuf_18/OUT5 0.00fF -C3 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/a_630_n680# 0.19fF -C4 divbuf_13/OUT2 divbuf_13/OUT3 1.37fF -C5 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF -C6 divider_0/mc2 divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF -C7 divider_0/nor_1/Z1 divider_0/nor_0/B 0.18fF -C8 divbuf_2/OUT4 divbuf_2/OUT 1.11fF -C9 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/a1 0.14fF -C10 divbuf_25/OUT divbuf_25/OUT4 1.11fF -C11 divider_0/nor_1/B divider_0/tspc_0/Z1 0.03fF -C12 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF -C13 pd_0/DIV pd_0/tspc_r_0/Z3 0.65fF -C14 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z2 0.01fF -C15 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/Out 0.21fF -C16 divbuf_5/a_492_n240# divbuf_5/IN 0.13fF -C17 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z2 0.01fF -C18 divider_1/prescaler_0/tspc_2/Z3 divider_1/clk 0.45fF -C19 divbuf_21/OUT2 divbuf_21/OUT5 0.02fF -C20 divbuf_21/OUT3 divbuf_21/OUT4 5.16fF -C21 divbuf_12/a_492_n240# divbuf_12/OUT2 0.42fF -C22 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z1 0.09fF -C23 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z2 0.19fF -C24 divbuf_24/OUT5 divbuf_24/OUT 43.38fF -C25 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/a_492_n240# 0.01fF -C26 divbuf_14/OUT divbuf_14/OUT5 43.38fF -C27 ro_complete_1/a5 ro_complete_1/cbank_2/switch_0/vin 0.09fF -C28 divider_2/tspc_1/Q divider_2/tspc_0/Z2 0.14fF -C29 pd_1/DIV pd_1/R 0.51fF -C30 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z2 0.71fF -C31 pd_0/DOWN pd_0/tspc_r_1/Qbar 0.02fF -C32 pd_0/R pd_0/tspc_r_1/Qbar1 0.30fF -C33 divider_2/tspc_1/Q divider_2/tspc_0/Z4 0.15fF -C34 divider_1/tspc_1/Z3 divider_1/nor_0/B 0.38fF -C35 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Z4 0.65fF -C36 pll_full_0/ro_complete_0/a3 pll_full_0/divider_0/clk 0.11fF -C37 divider_2/mc2 divider_2/nor_0/B 0.06fF -C38 divbuf_23/IN divbuf_23/OUT5 0.00fF -C39 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/R 0.27fF -C40 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Q 0.04fF -C41 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/z5 0.04fF -C42 divbuf_2/OUT3 divbuf_2/OUT5 0.01fF -C43 pll_full_0/pd_0/DIV pll_full_0/divider_0/clk 2.26fF -C44 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z4 0.12fF -C45 divider_0/prescaler_0/Out divider_0/tspc_2/Z2 0.11fF -C46 divider_0/tspc_0/Z3 divider_0/tspc_0/Z2 0.16fF -C47 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF -C48 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.14fF -C49 divider_0/nor_1/Z1 divider_0/and_0/B 0.78fF -C50 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF -C51 divider_1/nor_0/B divider_1/tspc_1/Q 0.51fF -C52 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z4 0.00fF -C53 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Q 0.21fF -C54 divbuf_10/OUT3 divbuf_10/OUT5 0.01fF -C55 divbuf_10/OUT2 divbuf_10/OUT 0.06fF -C56 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF -C57 divider_2/tspc_0/Z2 divider_2/nor_0/B 0.20fF -C58 divider_1/and_0/B divider_1/and_0/Z1 0.07fF -C59 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF -C60 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF -C61 divbuf_17/OUT5 divbuf_17/OUT 43.38fF -C62 divider_2/nor_0/B divider_2/tspc_0/Z4 0.02fF -C63 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/nand_1/z1 0.01fF -C64 divider_2/prescaler_0/tspc_2/Z2 divider_2/clk 0.11fF -C65 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF -C66 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z4 0.08fF -C67 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF -C68 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C69 divbuf_4/OUT3 divbuf_4/OUT 0.26fF -C70 divbuf_4/OUT4 divbuf_4/OUT5 20.26fF -C71 cp_0/a_10_n50# cp_0/a_1710_0# 0.04fF -C72 pll_full_0/divbuf_0/IN pll_full_0/divider_0/tspc_0/a_630_n680# 0.04fF -C73 divider_1/tspc_0/Z1 divider_1/tspc_0/Z3 0.06fF -C74 divider_1/prescaler_0/tspc_1/Z4 divider_1/clk 0.12fF -C75 divbuf_17/OUT4 divbuf_17/OUT 1.11fF -C76 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z2 0.01fF -C77 divider_2/tspc_2/Q divider_2/tspc_1/Z3 0.45fF -C78 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z4 0.36fF -C79 divbuf_8/OUT2 divbuf_8/OUT5 0.02fF -C80 divbuf_8/OUT3 divbuf_8/OUT4 5.16fF -C81 io_clamp_low[1] io_clamp_high[1] 0.53fF -C82 divbuf_24/a_492_n240# divbuf_24/OUT2 0.42fF -C83 divider_2/tspc_2/Z3 divider_2/tspc_2/Z4 0.65fF -C84 divider_0/Out divider_0/nor_1/B 0.22fF -C85 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF -C86 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_0/vin 0.19fF -C87 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/a0 0.13fF -C88 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF -C89 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF -C90 divider_0/prescaler_0/tspc_2/Q divider_0/clk 0.05fF -C91 pd_0/DOWN pd_0/tspc_r_0/z5 0.03fF -C92 pd_0/tspc_r_0/Z2 pd_0/R 0.21fF -C93 divbuf_5/OUT3 divbuf_5/OUT 0.26fF -C94 divbuf_5/OUT4 divbuf_5/OUT5 20.26fF -C95 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF -C96 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF -C97 divider_1/nor_1/B divider_1/nor_0/B 0.47fF -C98 divider_1/tspc_1/Z1 divider_1/tspc_1/Z2 1.07fF -C99 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z1 0.08fF -C100 pd_1/tspc_r_1/Z4 pd_1/tspc_r_1/z5 0.04fF -C101 divider_1/tspc_2/a_630_n680# divider_1/nor_0/A 0.35fF -C102 divider_1/prescaler_0/tspc_1/Q divider_1/clk 0.60fF -C103 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/nor_0/A 0.03fF -C104 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/Z2 0.40fF -C105 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF -C106 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z3 0.16fF -C107 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.00fF -C108 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF -C109 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF -C110 divbuf_1/OUT2 divbuf_1/a_492_n240# 0.42fF -C111 divbuf_1/OUT5 divbuf_1/OUT 43.38fF -C112 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF -C113 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF -C114 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT3 1.37fF -C115 ro_complete_1/a1 ro_complete_1/cbank_1/v 0.05fF -C116 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/IN 0.13fF -C117 divider_0/and_0/out1 divider_0/and_0/B 0.18fF -C118 pd_0/DOWN pd_0/and_pd_0/Z1 0.07fF -C119 divider_1/mc2 divider_1/nor_0/A 0.04fF -C120 divider_1/tspc_0/Z1 divider_1/tspc_0/Z2 1.07fF -C121 divbuf_19/a_492_n240# divbuf_19/OUT2 0.42fF -C122 divbuf_17/OUT3 divbuf_17/OUT 0.26fF -C123 divbuf_11/OUT3 divbuf_11/OUT5 0.01fF -C124 divbuf_11/OUT2 divbuf_11/OUT 0.06fF -C125 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a5 0.09fF -C126 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/UP 0.03fF -C127 divider_0/nor_0/B divider_0/tspc_2/a_630_n680# 0.01fF -C128 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Q 0.05fF -C129 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF -C130 ro_complete_0/a0 ro_complete_0/cbank_2/v 0.05fF -C131 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF -C132 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/Z3 0.20fF -C133 divbuf_20/a_492_n240# divbuf_20/OUT5 0.01fF -C134 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_0/A 0.15fF -C135 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z3 0.45fF -C136 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z2 0.19fF -C137 divbuf_16/OUT divbuf_16/OUT3 0.26fF -C138 divider_1/prescaler_0/tspc_0/Z2 divider_1/clk 0.11fF -C139 divider_1/nor_1/B divider_1/and_0/B 0.29fF -C140 divider_2/mc2 divider_2/and_0/out1 0.06fF -C141 divider_2/and_0/OUT divider_2/and_0/B 0.01fF -C142 divbuf_13/OUT2 divbuf_13/OUT5 0.02fF -C143 divbuf_13/OUT3 divbuf_13/OUT4 5.16fF -C144 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF -C145 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z4 0.01fF -C146 ro_complete_1/a4 ro_complete_1/cbank_2/switch_1/vin 0.09fF -C147 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/v 1.30fF -C148 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF -C149 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Qbar1 0.38fF -C150 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/Out 0.04fF -C151 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/Out 0.04fF -C152 pd_1/REF pd_1/tspc_r_1/Z4 0.02fF -C153 pd_1/UP pd_1/tspc_r_1/Qbar 0.21fF -C154 divbuf_21/OUT3 divbuf_21/OUT 0.26fF -C155 divbuf_21/OUT4 divbuf_21/OUT5 20.26fF -C156 divider_1/tspc_0/Z2 divider_1/tspc_0/Z3 0.16fF -C157 divider_1/prescaler_0/tspc_2/Z4 divider_1/clk 0.12fF -C158 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z4 0.12fF -C159 divider_2/tspc_1/Z2 divider_2/nor_0/B 0.30fF -C160 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/a_630_n680# 0.19fF -C161 divbuf_14/OUT divbuf_14/a_492_n240# 0.00fF -C162 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF -C163 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.06fF -C164 ro_complete_0/a4 ro_complete_0/cbank_2/switch_0/vin 0.12fF -C165 pll_full_0/pd_0/DIV pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF -C166 divbuf_15/OUT3 divbuf_15/OUT4 5.16fF -C167 divbuf_3/OUT2 divbuf_3/OUT3 1.37fF -C168 ro_complete_1/a3 ro_complete_1/cbank_2/switch_2/vin 0.09fF -C169 pd_1/DIV pd_1/tspc_r_0/Z4 0.02fF -C170 divbuf_6/a_492_n240# divbuf_6/OUT 0.00fF -C171 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.18fF -C172 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF -C173 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C174 divider_1/tspc_0/Z4 divider_1/tspc_1/Q 0.15fF -C175 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z1 0.03fF -C176 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF -C177 divider_2/prescaler_0/tspc_0/Z3 divider_2/clk 0.64fF -C178 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF -C179 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/z5 0.04fF -C180 divbuf_23/OUT3 divbuf_23/OUT5 0.01fF -C181 divbuf_23/OUT2 divbuf_23/OUT 0.06fF -C182 pll_full_0/pd_0/R pll_full_0/pd_0/REF 0.61fF -C183 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF -C184 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a3 0.13fF -C185 ro_complete_0/a3 ro_complete_0/cbank_2/v 0.05fF -C186 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT2 0.02fF -C187 divbuf_3/OUT3 divbuf_3/OUT 0.26fF -C188 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/v 1.30fF -C189 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C190 pd_0/tspc_r_1/Z4 pd_0/tspc_r_1/z5 0.04fF -C191 divbuf_10/OUT4 divbuf_10/OUT 1.11fF -C192 divider_1/tspc_0/a_630_n680# divider_1/tspc_1/Q 0.01fF -C193 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Z4 0.65fF -C194 divbuf_22/a_492_n240# divbuf_22/OUT5 0.01fF -C195 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF -C196 divider_2/prescaler_0/tspc_0/D divider_2/prescaler_0/nand_1/z1 0.21fF -C197 divider_2/nor_0/B divider_2/and_0/A 0.26fF -C198 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF -C199 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF -C200 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/Q 0.19fF -C201 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.01fF -C202 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/v 1.30fF -C203 divider_1/tspc_0/Z4 divider_1/nor_1/B 0.22fF -C204 divbuf_4/OUT5 divbuf_4/OUT 43.38fF -C205 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF -C206 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF -C207 divbuf_8/OUT3 divbuf_8/OUT 0.26fF -C208 divbuf_8/OUT4 divbuf_8/OUT5 20.26fF -C209 divbuf_17/IN divbuf_17/OUT5 0.00fF -C210 divbuf_17/OUT2 divbuf_17/OUT 0.06fF -C211 ro_complete_0/a3 ro_complete_0/cbank_1/switch_2/vin 0.09fF -C212 divider_0/tspc_1/Z1 divider_0/nor_0/B 0.03fF -C213 divider_0/tspc_1/Z3 divider_0/tspc_1/a_630_n680# 0.05fF -C214 divider_0/tspc_0/a_630_n680# divider_0/nor_1/B 0.35fF -C215 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF -C216 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z4 0.08fF -C217 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_4/vin 0.20fF -C218 divbuf_15/OUT divbuf_15/OUT4 1.11fF -C219 divider_0/nor_0/A divider_0/tspc_2/Z2 0.23fF -C220 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.29fF -C221 pd_0/tspc_r_0/Z2 pd_0/tspc_r_0/Z4 0.14fF -C222 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF -C223 divider_1/tspc_1/Z2 divider_1/tspc_1/Z3 0.16fF -C224 divider_1/nor_1/B divider_1/tspc_0/a_630_n680# 0.35fF -C225 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z3 0.11fF -C226 divbuf_5/OUT5 divbuf_5/OUT 43.38fF -C227 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF -C228 pll_full_0/ro_complete_0/a4 pll_full_0/divider_0/clk 0.01fF -C229 pd_1/UP pd_1/and_pd_0/Z1 0.06fF -C230 divbuf_7/a_492_n240# divbuf_7/OUT 0.00fF -C231 divider_2/prescaler_0/Out divider_2/tspc_2/a_630_n680# 0.01fF -C232 divider_1/and_0/OUT divider_1/and_0/Z1 0.04fF -C233 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z2 0.01fF -C234 divider_1/prescaler_0/tspc_2/Q divider_1/clk 0.05fF -C235 divider_2/nor_0/B divider_2/tspc_1/Z4 0.21fF -C236 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z4 0.36fF -C237 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF -C238 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT4 5.16fF -C239 divbuf_15/IN divbuf_15/OUT5 0.00fF -C240 divider_0/mc2 divider_0/and_0/out1 0.06fF -C241 divider_0/nor_0/B divider_0/nor_1/B 0.47fF -C242 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF -C243 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF -C244 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF -C245 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF -C246 divider_0/nor_0/Z1 divider_0/and_0/A 0.80fF -C247 ro_complete_1/a5 ro_complete_1/cbank_2/v 0.08fF -C248 pd_1/tspc_r_0/Z2 pd_1/R 0.21fF -C249 pd_0/R pd_0/and_pd_0/Out1 0.33fF -C250 pd_0/REF pd_0/tspc_r_1/Z4 0.02fF -C251 pd_0/UP pd_0/tspc_r_1/Qbar 0.21fF -C252 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C253 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF -C254 divbuf_10/a_492_n240# divbuf_10/IN 0.13fF -C255 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF -C256 divbuf_11/OUT4 divbuf_11/OUT 1.11fF -C257 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/A 0.01fF -C258 divider_2/tspc_0/Z2 divider_2/tspc_0/Z1 1.07fF -C259 divider_2/nor_0/Z1 divider_2/and_0/A 0.80fF -C260 divider_1/and_0/out1 divider_1/and_0/B 0.18fF -C261 divbuf_9/a_492_n240# divbuf_9/OUT5 0.01fF -C262 divider_2/tspc_0/Z1 divider_2/tspc_0/Z4 0.00fF -C263 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF -C264 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z2 0.19fF -C265 divider_0/Out divider_0/tspc_0/a_630_n680# 0.04fF -C266 divbuf_15/a_492_n240# divbuf_15/OUT 0.00fF -C267 divider_0/tspc_1/Q divider_0/tspc_0/Z1 0.01fF -C268 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF -C269 divider_0/nor_0/B divider_0/nor_0/A 1.21fF -C270 divbuf_4/a_492_n240# divbuf_4/OUT2 0.42fF -C271 pd_1/DOWN pd_1/UP 0.46fF -C272 pd_1/tspc_r_0/z5 pd_1/tspc_r_0/Qbar1 0.20fF -C273 divider_1/nor_0/B divider_1/tspc_2/a_630_n680# 0.01fF -C274 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Q 0.05fF -C275 divider_1/prescaler_0/Out divider_1/clk 0.51fF -C276 divbuf_20/OUT2 divbuf_20/OUT3 1.37fF -C277 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/nor_0/A 0.01fF -C278 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z4 0.12fF -C279 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z2 0.01fF -C280 divbuf_13/OUT3 divbuf_13/OUT 0.26fF -C281 divbuf_13/OUT4 divbuf_13/OUT5 20.26fF -C282 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a1 0.14fF -C283 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF -C284 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a3 0.09fF -C285 divbuf_15/OUT2 divbuf_15/a_492_n240# 0.42fF -C286 ro_complete_1/a2 ro_complete_1/cbank_2/v 0.05fF -C287 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF -C288 divider_1/prescaler_0/m1_2700_2190# divider_1/and_0/OUT 0.14fF -C289 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF -C290 divider_0/nor_1/B divider_0/and_0/B 0.29fF -C291 pd_0/DIV pd_0/tspc_r_0/Z1 0.17fF -C292 pd_0/tspc_r_0/Qbar1 pd_0/DOWN 0.11fF -C293 divbuf_5/a_492_n240# divbuf_5/OUT5 0.01fF -C294 divider_1/mc2 divider_1/nor_0/B 0.06fF -C295 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z3 0.06fF -C296 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/z5 0.11fF -C297 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF -C298 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_1/Q 0.13fF -C299 divbuf_21/OUT5 divbuf_21/OUT 43.38fF -C300 pll_full_0/divider_0/tspc_1/Z4 pll_full_0/divider_0/nor_0/A 0.02fF -C301 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_0/Z2 0.20fF -C302 divbuf_12/a_492_n240# divbuf_12/OUT 0.00fF -C303 divider_2/and_0/out1 divider_2/and_0/A 0.01fF -C304 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF -C305 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF -C306 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF -C307 divider_0/tspc_1/a_630_n680# divider_0/nor_0/B 0.35fF -C308 divider_0/tspc_1/Q divider_0/nor_1/B 0.22fF -C309 divbuf_3/OUT2 divbuf_3/OUT5 0.02fF -C310 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/a0 0.09fF -C311 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF -C312 divbuf_15/OUT4 divbuf_15/OUT5 20.26fF -C313 divider_0/nor_0/A divider_0/and_0/B 0.08fF -C314 pd_0/R pd_0/tspc_r_1/Z2 0.21fF -C315 divbuf_6/IN divbuf_6/OUT5 0.00fF -C316 divbuf_19/OUT5 divbuf_19/IN 0.00fF -C317 divider_1/tspc_2/Q divider_1/tspc_1/Z4 0.15fF -C318 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_0/B 0.30fF -C319 pll_full_0/ro_complete_0/a1 pll_full_0/divider_0/clk 0.11fF -C320 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z3 0.65fF -C321 divider_2/prescaler_0/tspc_0/Z4 divider_2/clk 0.12fF -C322 divbuf_11/a_492_n240# divbuf_11/IN 0.13fF -C323 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF -C324 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF -C325 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z3 0.38fF -C326 divbuf_23/OUT4 divbuf_23/OUT 1.11fF -C327 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar1 0.30fF -C328 divbuf_2/IN divbuf_2/a_492_n240# 0.13fF -C329 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT3 0.01fF -C330 divbuf_25/OUT3 divbuf_25/OUT5 0.01fF -C331 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.05fF -C332 divbuf_3/OUT5 divbuf_3/OUT 43.38fF -C333 divider_2/nor_1/B divider_2/tspc_1/a_630_n680# 0.00fF -C334 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/Out 0.05fF -C335 pd_1/DOWN pd_1/tspc_r_0/z5 0.03fF -C336 pd_0/UP pd_0/and_pd_0/Z1 0.06fF -C337 divider_1/tspc_2/Q divider_1/tspc_2/Z3 0.05fF -C338 divider_1/mc2 divider_1/and_0/B 0.20fF -C339 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.04fF -C340 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF -C341 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF -C342 divbuf_18/OUT2 divbuf_18/a_492_n240# 0.42fF -C343 divider_2/mc2 divider_2/nor_0/A 0.04fF -C344 divider_2/tspc_0/Z2 divider_2/tspc_0/Z3 0.16fF -C345 divbuf_22/OUT2 divbuf_22/OUT3 1.37fF -C346 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF -C347 divbuf_18/OUT5 divbuf_18/a_492_n240# 0.01fF -C348 divider_2/prescaler_0/tspc_1/Q divider_2/nor_0/A 0.03fF -C349 divider_2/tspc_0/Z3 divider_2/tspc_0/Z4 0.65fF -C350 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF -C351 divbuf_15/a_492_n240# divbuf_15/OUT5 0.01fF -C352 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/D 0.32fF -C353 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF -C354 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF -C355 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C356 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF -C357 pd_1/tspc_r_0/Z4 pd_1/tspc_r_1/Z4 0.02fF -C358 pd_1/REF pd_1/tspc_r_1/Z3 0.65fF -C359 divbuf_21/a_492_n240# divbuf_21/OUT2 0.42fF -C360 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_2/Q 0.19fF -C361 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/clk 0.01fF -C362 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z2 0.14fF -C363 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF -C364 divbuf_8/OUT5 divbuf_8/OUT 43.38fF -C365 io_clamp_low[0] io_clamp_high[0] 0.53fF -C366 divbuf_24/a_492_n240# divbuf_24/OUT 0.00fF -C367 divider_0/tspc_1/Q divider_0/tspc_1/a_630_n680# 0.04fF -C368 divider_0/tspc_1/Z3 divider_0/nor_0/B 0.38fF -C369 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z4 0.12fF -C370 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF -C371 ro_complete_0/a3 ro_complete_0/cbank_2/switch_1/vin 0.13fF -C372 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF -C373 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF -C374 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C375 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z4 0.28fF -C376 cp_0/a_1710_0# cp_0/out 0.84fF -C377 divbuf_7/IN divbuf_7/OUT5 0.00fF -C378 divider_2/prescaler_0/Out divider_2/nor_0/A 0.15fF -C379 divider_1/nor_0/A divider_1/tspc_2/Z2 0.23fF -C380 divider_1/prescaler_0/tspc_0/D divider_1/clk 0.29fF -C381 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/clk 0.06fF -C382 divbuf_23/a_492_n240# divbuf_23/IN 0.13fF -C383 divider_2/nor_1/B divider_2/tspc_1/Q 0.22fF -C384 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 4.58fF -C385 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF -C386 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF -C387 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF -C388 ro_complete_0/a4 ro_complete_0/cbank_2/v 0.05fF -C389 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF -C390 ro_complete_1/a0 ro_complete_1/cbank_2/switch_4/vin 0.13fF -C391 ro_complete_1/cbank_0/v ro_complete_1/cbank_1/v 1.27fF -C392 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z4 0.14fF -C393 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/z5 0.11fF -C394 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF -C395 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/a_740_n680# 0.33fF -C396 divider_1/nor_0/B divider_1/tspc_0/Z2 0.20fF -C397 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Q 0.91fF -C398 divider_1/prescaler_0/tspc_1/Z2 divider_1/and_0/OUT 0.06fF -C399 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z3 0.33fF -C400 divbuf_9/OUT2 divbuf_9/OUT3 1.37fF -C401 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF -C402 divider_0/tspc_0/Z4 divider_0/tspc_0/Z1 0.00fF -C403 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF -C404 divider_2/nor_1/B divider_2/nor_0/B 0.47fF -C405 pd_1/R pd_1/tspc_r_1/Z3 0.29fF -C406 divbuf_20/OUT2 divbuf_20/OUT5 0.02fF -C407 divbuf_20/OUT3 divbuf_20/OUT4 5.16fF -C408 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF -C409 divider_1/nor_0/B divider_1/nor_0/A 1.21fF -C410 divbuf_8/a_492_n240# divbuf_8/OUT2 0.42fF -C411 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF -C412 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT5 43.38fF -C413 divider_2/nor_0/A divider_2/tspc_2/Z1 0.03fF -C414 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z3 0.05fF -C415 divbuf_13/OUT5 divbuf_13/OUT 43.38fF -C416 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a1 0.14fF -C417 divbuf_25/OUT3 divbuf_25/OUT 0.26fF -C418 divider_0/tspc_1/Z3 divider_0/tspc_1/Q 0.05fF -C419 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z1 0.08fF -C420 divider_0/mc2 divider_0/nor_1/B 0.15fF -C421 io_clamp_high[2] io_analog[6] 0.53fF -C422 divbuf_19/OUT4 divbuf_19/OUT5 20.26fF -C423 divbuf_16/OUT5 divbuf_16/a_492_n240# 0.01fF -C424 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_2/D 0.16fF -C425 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/cbank_0/v 1.30fF -C426 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF -C427 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C428 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z2 0.25fF -C429 divider_1/tspc_2/Q divider_1/tspc_1/Z1 0.01fF -C430 divider_1/tspc_0/Z4 divider_1/tspc_0/Z1 0.00fF -C431 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF -C432 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z4 0.00fF -C433 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z1 0.01fF -C434 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF -C435 pd_1/UP pd_1/tspc_r_1/z5 0.03fF -C436 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/A 0.26fF -C437 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_1/Q 0.21fF -C438 divider_1/and_0/OUT divider_1/and_0/out1 0.31fF -C439 divbuf_12/IN divbuf_12/OUT5 0.00fF -C440 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/R 0.01fF -C441 ro_complete_0/a5 ro_complete_0/cbank_2/switch_0/vin 0.09fF -C442 divider_0/mc2 divider_0/nor_0/A 0.04fF -C443 divider_0/tspc_0/Z4 divider_0/nor_1/B 0.22fF -C444 divbuf_1/OUT divbuf_1/OUT3 0.26fF -C445 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C446 pd_1/DIV pd_1/tspc_r_0/Z3 0.65fF -C447 pd_0/REF pd_0/tspc_r_1/Z3 0.65fF -C448 divbuf_19/OUT5 divbuf_19/OUT 43.38fF -C449 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z2 0.16fF -C450 divider_1/tspc_1/a_630_n680# divider_1/nor_0/B 0.35fF -C451 divbuf_6/OUT3 divbuf_6/OUT5 0.01fF -C452 divbuf_6/OUT2 divbuf_6/OUT 0.06fF -C453 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF -C454 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF -C455 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z4 0.21fF -C456 divbuf_17/OUT4 divbuf_17/OUT5 20.26fF -C457 divider_1/nor_0/A divider_1/and_0/B 0.08fF -C458 divider_2/tspc_1/Z2 divider_2/nor_0/A 0.15fF -C459 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/D 0.03fF -C460 ro_complete_0/a1 ro_complete_0/cbank_2/v 0.05fF -C461 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT4 20.26fF -C462 divbuf_16/OUT5 divbuf_16/OUT 43.38fF -C463 divbuf_14/OUT divbuf_14/OUT3 0.26fF -C464 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Q 0.20fF -C465 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF -C466 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF -C467 divider_2/tspc_1/Q divider_2/tspc_1/a_630_n680# 0.04fF -C468 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C469 divider_1/tspc_0/Z4 divider_1/tspc_0/Z3 0.65fF -C470 divider_1/prescaler_0/tspc_2/Z2 divider_1/and_0/OUT 0.05fF -C471 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/nor_0/A 0.55fF -C472 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z4 0.21fF -C473 divbuf_22/OUT2 divbuf_22/OUT5 0.02fF -C474 divbuf_22/OUT3 divbuf_22/OUT4 5.16fF -C475 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF -C476 divbuf_13/a_492_n240# divbuf_13/OUT2 0.42fF -C477 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF -C478 divider_0/tspc_2/Q divider_0/tspc_1/Z2 0.14fF -C479 divider_0/tspc_0/a_630_n680# divider_0/tspc_1/Q 0.01fF -C480 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF -C481 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/Out 0.05fF -C482 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF -C483 divbuf_14/OUT5 divbuf_14/OUT4 20.26fF -C484 divider_0/nor_0/B divider_0/and_0/B 0.31fF -C485 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/tspc_0/D 0.04fF -C486 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF -C487 pd_1/tspc_r_0/z5 pd_1/tspc_r_1/z5 0.02fF -C488 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Qbar1 0.38fF -C489 divbuf_17/OUT3 divbuf_17/OUT5 0.01fF -C490 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z3 0.05fF -C491 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_0/D 0.32fF -C492 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/clk 0.01fF -C493 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z2 0.36fF -C494 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF -C495 divider_2/tspc_1/a_630_n680# divider_2/nor_0/B 0.35fF -C496 divider_2/tspc_1/Z1 divider_2/tspc_1/Z2 1.07fF -C497 divbuf_24/IN divbuf_24/OUT5 0.00fF -C498 divider_2/nor_0/A divider_2/and_0/A 0.01fF -C499 divbuf_1/OUT2 divbuf_1/OUT 0.06fF -C500 ro_complete_0/a2 ro_complete_0/cbank_1/v 0.05fF -C501 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/a0 0.13fF -C502 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT3 0.01fF -C503 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT2 0.06fF -C504 divider_0/tspc_1/Q divider_0/nor_0/B 0.51fF -C505 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF -C506 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF -C507 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF -C508 divbuf_17/OUT3 divbuf_17/OUT4 5.16fF -C509 divider_1/mc2 divider_1/and_0/OUT 0.05fF -C510 divider_1/tspc_0/Z4 divider_1/tspc_0/Z2 0.36fF -C511 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z2 1.07fF -C512 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF -C513 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF -C514 pll_full_0/ro_complete_0/a5 pll_full_0/divider_0/clk 0.15fF -C515 cp_0/a_1710_0# cp_0/down 0.32fF -C516 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Z1 0.02fF -C517 divider_2/prescaler_0/Out divider_2/tspc_2/Z2 0.11fF -C518 divider_1/tspc_2/Z1 divider_1/tspc_2/Z3 0.06fF -C519 divbuf_7/OUT3 divbuf_7/OUT5 0.01fF -C520 divbuf_7/OUT2 divbuf_7/OUT 0.06fF -C521 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/clk 0.26fF -C522 divider_2/prescaler_0/m1_2700_2190# divider_2/nor_0/A 0.01fF -C523 divbuf_2/OUT2 divbuf_2/OUT3 1.37fF -C524 divbuf_1/OUT5 divbuf_1/OUT4 20.26fF -C525 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.43fF -C526 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF -C527 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF -C528 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C529 pd_0/UP pd_0/tspc_r_1/z5 0.03fF -C530 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/a_740_n680# 0.08fF -C531 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z2 0.01fF -C532 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z3 0.05fF -C533 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z4 0.08fF -C534 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/D 0.09fF -C535 divbuf_10/a_492_n240# divbuf_10/OUT5 0.01fF -C536 divbuf_9/OUT2 divbuf_9/OUT5 0.02fF -C537 divbuf_9/OUT3 divbuf_9/OUT4 5.16fF -C538 divider_2/tspc_1/Z4 divider_2/nor_0/A 0.02fF -C539 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF -C540 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z4 0.02fF -C541 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF -C542 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF -C543 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/a_492_n240# 0.01fF -C544 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z3 0.33fF -C545 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF -C546 divbuf_4/a_492_n240# divbuf_4/OUT 0.00fF -C547 divider_2/tspc_1/Q divider_2/nor_0/B 0.51fF -C548 pd_1/DOWN pd_1/tspc_r_1/Qbar 0.02fF -C549 pd_1/R pd_1/UP 0.45fF -C550 divbuf_20/OUT3 divbuf_20/OUT 0.26fF -C551 divbuf_20/OUT4 divbuf_20/OUT5 20.26fF -C552 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF -C553 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/clk 0.64fF -C554 divider_2/mc2 divider_2/and_0/B 0.20fF -C555 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/tspc_r_0/Qbar1 0.01fF -C556 divbuf_18/a_492_n240# divbuf_18/OUT 0.00fF -C557 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z4 0.12fF -C558 divider_2/tspc_2/Z1 divider_2/tspc_2/Z2 1.07fF -C559 divider_2/nor_0/A divider_2/tspc_2/Z3 0.38fF -C560 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C561 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z3 0.11fF -C562 ro_complete_0/a4 ro_complete_0/cbank_2/switch_1/vin 0.09fF -C563 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF -C564 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/switch_5/vin 0.20fF -C565 io_clamp_low[1] io_analog[5] 0.53fF -C566 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF -C567 divider_2/nor_1/B divider_2/nor_1/Z1 0.06fF -C568 divbuf_16/IN divbuf_16/a_492_n240# 0.13fF -C569 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/nand_0/z1 0.07fF -C570 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/Qbar 0.01fF -C571 pd_0/tspc_r_0/Z3 pd_0/R 0.27fF -C572 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z3 0.45fF -C573 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C574 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF -C575 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/divider_0/clk 1.46fF -C576 divider_1/tspc_2/Q divider_1/tspc_1/Z3 0.45fF -C577 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z4 0.65fF -C578 pd_1/tspc_r_1/Z2 pd_1/tspc_r_1/Z4 0.14fF -C579 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/Z2 1.07fF -C580 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/D 0.05fF -C581 divider_2/tspc_1/Z1 divider_2/tspc_1/Z4 0.00fF -C582 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z2 0.01fF -C583 divbuf_12/OUT3 divbuf_12/OUT5 0.01fF -C584 divbuf_12/OUT2 divbuf_12/OUT 0.06fF -C585 divider_2/and_0/out1 divider_2/and_0/Z1 0.36fF -C586 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF -C587 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF -C588 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/v 1.30fF -C589 divider_1/prescaler_0/m1_2700_2190# divider_1/clk 0.01fF -C590 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Qbar1 0.38fF -C591 divbuf_6/OUT4 divbuf_6/OUT 1.11fF -C592 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF -C593 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/divider_0/clk 1.27fF -C594 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z2 0.36fF -C595 divbuf_17/OUT2 divbuf_17/OUT5 0.02fF -C596 divbuf_11/a_492_n240# divbuf_11/OUT5 0.01fF -C597 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF -C598 divider_2/and_0/OUT divider_2/prescaler_0/nand_0/z1 0.01fF -C599 divbuf_25/OUT2 divbuf_25/OUT3 1.37fF -C600 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z2 0.21fF -C601 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Q 0.04fF -C602 divider_0/prescaler_0/Out divider_0/clk 0.51fF -C603 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF -C604 ro_complete_1/a0 ro_complete_1/cbank_2/switch_5/vin 0.09fF -C605 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF -C606 divider_2/nor_1/B divider_2/tspc_0/Z1 0.03fF -C607 pd_1/DOWN pd_1/tspc_r_0/Qbar1 0.11fF -C608 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Z1 0.02fF -C609 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF -C610 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z1 0.06fF -C611 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF -C612 divider_1/tspc_1/Z2 divider_1/nor_0/A 0.15fF -C613 divider_1/prescaler_0/Out divider_1/tspc_2/Z3 0.45fF -C614 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Q 0.20fF -C615 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/D 0.09fF -C616 divbuf_22/OUT3 divbuf_22/OUT 0.26fF -C617 divbuf_22/OUT4 divbuf_22/OUT5 20.26fF -C618 divider_2/and_0/OUT divider_2/clk 0.04fF -C619 ro_complete_0/a4 ro_complete_0/cbank_1/switch_1/vin 0.09fF -C620 divider_0/mc2 divider_0/nor_0/B 0.06fF -C621 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z4 0.12fF -C622 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Z1 0.06fF -C623 divider_1/nor_0/Z1 divider_1/nor_0/B 0.06fF -C624 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/nand_1/z1 0.01fF -C625 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF -C626 divbuf_1/OUT divbuf_1/a_492_n240# 0.00fF -C627 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF -C628 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C629 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/Out 0.21fF -C630 pd_1/DOWN pd_1/and_pd_0/Z1 0.07fF -C631 pd_1/REF pd_1/tspc_r_1/Z1 0.17fF -C632 pd_1/tspc_r_1/Qbar1 pd_1/UP 0.11fF -C633 divbuf_21/a_492_n240# divbuf_21/OUT 0.00fF -C634 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C635 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/clk 0.45fF -C636 divider_2/nor_0/Z1 divider_2/nor_0/B 0.06fF -C637 divider_1/nor_0/B divider_1/and_0/B 0.31fF -C638 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/tspc_0/D 0.04fF -C639 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/nand_1/z1 0.22fF -C640 divider_2/tspc_1/Z2 divider_2/tspc_1/Z3 0.16fF -C641 divbuf_24/OUT3 divbuf_24/OUT5 0.01fF -C642 divbuf_24/OUT2 divbuf_24/OUT 0.06fF -C643 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF -C644 divider_0/tspc_0/Z4 divider_0/nor_0/B 0.02fF -C645 divider_0/tspc_2/Q divider_0/tspc_1/Z4 0.15fF -C646 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z4 0.36fF -C647 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT4 1.11fF -C648 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF -C649 ro_complete_1/a4 ro_complete_1/cbank_1/v 0.05fF -C650 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C651 divbuf_6/a_492_n240# divbuf_6/IN 0.13fF -C652 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/nor_0/B 0.22fF -C653 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/nor_1/B 0.38fF -C654 divbuf_17/a_492_n240# divbuf_17/OUT 0.00fF -C655 divbuf_17/OUT3 divbuf_17/OUT2 1.37fF -C656 divider_2/nor_1/B divider_2/Out 0.22fF -C657 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/clk 0.01fF -C658 divider_1/tspc_1/Z2 divider_1/tspc_1/a_630_n680# 0.01fF -C659 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z3 0.16fF -C660 divbuf_7/OUT4 divbuf_7/OUT 1.11fF -C661 divider_1/tspc_2/Z1 divider_1/tspc_2/Z4 0.00fF -C662 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/D 0.15fF -C663 divbuf_23/a_492_n240# divbuf_23/OUT5 0.01fF -C664 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar 0.02fF -C665 divbuf_2/OUT2 divbuf_2/OUT5 0.02fF -C666 ro_complete_0/a5 ro_complete_0/cbank_2/v 0.08fF -C667 ro_complete_0/a0 ro_complete_0/cbank_1/switch_5/vin 0.09fF -C668 divbuf_14/OUT2 divbuf_14/OUT5 0.02fF -C669 divider_0/tspc_2/Q divider_0/tspc_2/Z3 0.05fF -C670 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF -C671 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF -C672 divider_0/mc2 divider_0/and_0/B 0.20fF -C673 divider_1/nor_0/Z1 divider_1/and_0/B 0.18fF -C674 divbuf_3/OUT3 divbuf_3/OUT5 0.01fF -C675 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z3 0.25fF -C676 pd_0/tspc_r_1/Z2 pd_0/tspc_r_1/Z4 0.14fF -C677 divbuf_10/OUT2 divbuf_10/OUT3 1.37fF -C678 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF -C679 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF -C680 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z4 0.12fF -C681 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z2 1.07fF -C682 filter_0/a_4216_n2998# filter_0/v 0.31fF -C683 divider_2/tspc_0/Z2 divider_2/tspc_0/a_630_n680# 0.01fF -C684 divider_2/tspc_0/a_630_n680# divider_2/tspc_0/Z4 0.12fF -C685 divbuf_9/OUT3 divbuf_9/OUT 0.26fF -C686 divbuf_9/OUT4 divbuf_9/OUT5 20.26fF -C687 divbuf_0/OUT4 divbuf_0/OUT5 20.26fF -C688 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF -C689 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF -C690 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF -C691 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z3 0.05fF -C692 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z4 0.08fF -C693 divbuf_25/a_492_n240# divbuf_25/IN 0.13fF -C694 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF -C695 divider_2/nor_1/B divider_2/tspc_0/Z3 0.38fF -C696 divbuf_4/IN divbuf_4/OUT5 0.00fF -C697 ro_complete_1/cbank_1/v ro_complete_1/cbank_2/v 1.36fF -C698 cp_0/a_1710_n2840# cp_0/a_1710_0# 0.83fF -C699 divbuf_20/OUT5 divbuf_20/OUT 43.38fF -C700 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF -C701 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/clk 0.12fF -C702 divider_1/prescaler_0/tspc_1/Z2 divider_1/clk 0.11fF -C703 divbuf_8/a_492_n240# divbuf_8/OUT 0.00fF -C704 divbuf_18/IN divbuf_18/a_492_n240# 0.13fF -C705 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z3 0.06fF -C706 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/D 0.03fF -C707 divider_2/tspc_2/Z2 divider_2/tspc_2/Z3 0.16fF -C708 divider_2/nor_0/A divider_2/tspc_2/Z4 0.21fF -C709 divbuf_0/OUT5 divbuf_0/IN 0.00fF -C710 divider_0/tspc_1/Q divider_0/tspc_0/Z4 0.15fF -C711 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z4 0.28fF -C712 ro_complete_1/a5 ro_complete_1/cbank_1/switch_0/vin 0.09fF -C713 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/v 1.30fF -C714 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Q 0.38fF -C715 divider_0/and_0/OUT divider_0/and_0/B 0.01fF -C716 pd_1/DIV pd_1/tspc_r_0/Z2 0.19fF -C717 pd_0/DOWN pd_0/R 0.36fF -C718 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z4 0.20fF -C719 pd_0/DIV pd_0/tspc_r_0/z5 0.04fF -C720 pd_0/tspc_r_0/Z1 pd_0/tspc_r_0/Z2 0.71fF -C721 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF -C722 divider_1/tspc_0/Z4 divider_1/nor_0/B 0.02fF -C723 divbuf_5/IN divbuf_5/OUT5 0.00fF -C724 divbuf_7/a_492_n240# divbuf_7/IN 0.13fF -C725 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/clk 0.45fF -C726 divbuf_19/OUT5 divbuf_19/OUT2 0.02fF -C727 divbuf_19/OUT4 divbuf_19/OUT3 5.16fF -C728 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/D 0.11fF -C729 divbuf_12/OUT4 divbuf_12/OUT 1.11fF -C730 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF -C731 divider_2/tspc_1/Z3 divider_2/tspc_1/Z4 0.65fF -C732 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/z5 0.03fF -C733 divider_2/and_0/A divider_2/and_0/B 0.18fF -C734 ro_complete_1/a2 ro_complete_1/cbank_0/switch_3/vin 0.09fF -C735 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Q 0.91fF -C736 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C737 ro_complete_1/cbank_1/switch_2/vin ro_complete_1/cbank_1/v 1.30fF -C738 divbuf_19/OUT5 divbuf_19/a_492_n240# 0.01fF -C739 divbuf_16/OUT5 divbuf_16/OUT3 0.01fF -C740 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/clk 0.01fF -C741 divbuf_25/IN divbuf_25/OUT5 0.00fF -C742 pd_0/tspc_r_0/Z4 pd_0/tspc_r_1/Z4 0.02fF -C743 pd_0/DOWN pd_0/and_pd_0/Out1 0.12fF -C744 pd_0/REF pd_0/tspc_r_1/Z1 0.17fF -C745 pd_0/tspc_r_1/Qbar1 pd_0/UP 0.11fF -C746 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF -C747 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF -C748 divider_1/tspc_1/Z1 divider_1/tspc_1/Z4 0.00fF -C749 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF -C750 divbuf_11/OUT2 divbuf_11/OUT3 1.37fF -C751 divider_2/mc2 divider_2/and_0/OUT 0.05fF -C752 divider_2/nor_1/Z1 divider_2/nor_0/B 0.18fF -C753 divbuf_19/OUT divbuf_19/OUT3 0.26fF -C754 divider_2/nor_0/B divider_2/tspc_2/a_630_n680# 0.01fF -C755 divider_2/prescaler_0/tspc_2/D divider_2/prescaler_0/nand_0/z1 0.24fF -C756 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF -C757 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z3 0.65fF -C758 divbuf_2/OUT5 divbuf_2/a_492_n240# 0.01fF -C759 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/v 1.30fF -C760 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF -C761 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/OUT3 1.37fF -C762 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C763 ro_complete_1/a0 ro_complete_1/cbank_2/v 0.05fF -C764 divider_2/tspc_1/Q divider_2/tspc_0/Z1 0.01fF -C765 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/z5 0.04fF -C766 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C767 divider_1/prescaler_0/Out divider_1/tspc_2/Z4 0.12fF -C768 divider_1/nor_1/B divider_1/Out 0.22fF -C769 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Q 0.04fF -C770 divbuf_20/a_492_n240# divbuf_20/OUT2 0.42fF -C771 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/nor_0/A 0.15fF -C772 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF -C773 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C774 divbuf_22/OUT5 divbuf_22/OUT 43.38fF -C775 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF -C776 divbuf_13/a_492_n240# divbuf_13/OUT 0.00fF -C777 divider_2/prescaler_0/tspc_2/D divider_2/clk 0.26fF -C778 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF -C779 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF -C780 divbuf_2/OUT3 divbuf_2/OUT 0.26fF -C781 divbuf_25/a_492_n240# divbuf_25/OUT5 0.01fF -C782 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_1/z1 0.21fF -C783 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z3 0.33fF -C784 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z2 0.25fF -C785 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/nand_1/z1 0.01fF -C786 divider_1/prescaler_0/tspc_2/Z2 divider_1/clk 0.11fF -C787 divbuf_21/IN divbuf_21/OUT5 0.00fF -C788 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/clk 0.12fF -C789 divbuf_12/a_492_n240# divbuf_12/IN 0.13fF -C790 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z1 0.17fF -C791 divbuf_24/OUT4 divbuf_24/OUT 1.11fF -C792 divbuf_3/OUT2 divbuf_3/a_492_n240# 0.42fF -C793 pd_0/R pd_0/tspc_r_1/Z3 0.29fF -C794 divider_1/tspc_1/Z2 divider_1/nor_0/B 0.30fF -C795 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z4 0.36fF -C796 divider_1/tspc_2/Z3 divider_1/tspc_2/Z4 0.65fF -C797 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/A 0.35fF -C798 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/clk 0.60fF -C799 divbuf_23/OUT2 divbuf_23/OUT3 1.37fF -C800 pll_full_0/pd_0/DIV pll_full_0/pd_0/R 0.51fF -C801 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/D 0.05fF -C802 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/Out 0.04fF -C803 divbuf_14/OUT2 divbuf_14/a_492_n240# 0.42fF -C804 divider_0/tspc_0/Z3 divider_0/tspc_0/Z1 0.06fF -C805 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF -C806 divbuf_2/OUT3 divbuf_2/OUT4 5.16fF -C807 ro_complete_0/a0 ro_complete_0/cbank_1/v 0.05fF -C808 divbuf_3/a_492_n240# divbuf_3/OUT 0.00fF -C809 ro_complete_1/a3 ro_complete_1/cbank_2/v 0.05fF -C810 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF -C811 divbuf_17/a_492_n240# divbuf_17/IN 0.13fF -C812 pd_1/tspc_r_0/Qbar pd_1/tspc_r_0/Qbar1 0.01fF -C813 divbuf_10/OUT2 divbuf_10/OUT5 0.02fF -C814 divbuf_10/OUT3 divbuf_10/OUT4 5.16fF -C815 divbuf_16/OUT divbuf_16/OUT4 1.11fF -C816 divider_1/tspc_2/Q divider_1/tspc_2/a_630_n680# 0.04fF -C817 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF -C818 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z3 0.16fF -C819 filter_0/a_4216_n5230# filter_0/v 0.19fF -C820 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C821 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF -C822 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF -C823 divbuf_22/a_492_n240# divbuf_22/OUT2 0.42fF -C824 divbuf_9/OUT5 divbuf_9/OUT 43.38fF -C825 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF -C826 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/Out 0.21fF -C827 divbuf_0/OUT4 divbuf_0/OUT 1.11fF -C828 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/z5 0.03fF -C829 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z4 0.12fF -C830 ro_complete_1/a4 ro_complete_1/cbank_1/switch_1/vin 0.09fF -C831 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.45fF -C832 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C833 divbuf_4/OUT3 divbuf_4/OUT5 0.01fF -C834 divbuf_4/OUT2 divbuf_4/OUT 0.06fF -C835 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/a_630_n680# 0.05fF -C836 divider_2/tspc_1/Q divider_2/tspc_0/Z3 0.45fF -C837 divider_1/nor_1/Z1 divider_1/nor_1/B 0.06fF -C838 pd_1/R pd_1/tspc_r_1/Qbar 0.03fF -C839 divider_2/tspc_2/Q divider_2/tspc_1/Z2 0.14fF -C840 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z4 0.00fF -C841 divbuf_8/IN divbuf_8/OUT5 0.00fF -C842 divbuf_24/a_492_n240# divbuf_24/IN 0.13fF -C843 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT2 0.06fF -C844 divider_2/tspc_2/Z2 divider_2/tspc_2/Z4 0.36fF -C845 divider_0/mc2 divider_0/and_0/OUT 0.05fF -C846 divider_0/tspc_0/Z3 divider_0/nor_1/B 0.38fF -C847 ro_complete_0/a2 ro_complete_0/cbank_2/switch_2/vin 0.14fF -C848 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF -C849 io_clamp_high[0] io_analog[4] 0.53fF -C850 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Q 0.04fF -C851 ro_complete_1/a3 ro_complete_1/cbank_1/switch_2/vin 0.09fF -C852 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/z5 0.20fF -C853 divbuf_5/OUT3 divbuf_5/OUT5 0.01fF -C854 divbuf_5/OUT2 divbuf_5/OUT 0.06fF -C855 divider_1/tspc_0/Z4 divider_1/tspc_0/a_630_n680# 0.12fF -C856 pd_1/UP pd_1/and_pd_0/Out1 0.33fF -C857 divider_1/and_0/OUT divider_1/and_0/B 0.01fF -C858 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/Z1 0.03fF -C859 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/clk 0.12fF -C860 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/DOWN 0.03fF -C861 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z3 0.06fF -C862 divbuf_25/a_492_n240# divbuf_25/OUT 0.00fF -C863 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF -C864 ro_complete_1/a2 ro_complete_1/cbank_2/switch_3/vin 0.09fF -C865 divbuf_0/OUT5 divbuf_0/OUT2 0.02fF -C866 ro_complete_0/a3 ro_complete_0/cbank_1/v 0.05fF -C867 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/a_740_n680# 0.19fF -C868 divider_0/and_0/out1 divider_0/and_0/A 0.01fF -C869 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF -C870 divbuf_1/OUT4 divbuf_1/OUT3 5.16fF -C871 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/switch_5/vin 0.20fF -C872 pd_1/tspc_r_0/Qbar pd_1/DOWN 0.21fF -C873 pd_0/tspc_r_0/z5 pd_0/tspc_r_1/z5 0.02fF -C874 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z2 0.25fF -C875 divider_1/tspc_1/Z3 divider_1/tspc_1/Z4 0.65fF -C876 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/a_630_n680# 0.19fF -C877 divbuf_11/OUT2 divbuf_11/OUT5 0.02fF -C878 divbuf_11/OUT3 divbuf_11/OUT4 5.16fF -C879 divbuf_18/OUT2 divbuf_18/OUT3 1.37fF -C880 divbuf_18/OUT3 divbuf_18/OUT5 0.01fF -C881 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/Q 0.04fF -C882 divider_2/prescaler_0/tspc_1/Z3 divider_2/clk 0.45fF -C883 divider_2/nor_0/B divider_2/nor_0/A 1.21fF -C884 divbuf_9/a_492_n240# divbuf_9/OUT2 0.42fF -C885 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF -C886 divider_0/tspc_0/Z3 divider_0/Out 0.05fF -C887 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/Out 0.11fF -C888 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.45fF -C889 pd_1/R pd_1/tspc_r_0/Qbar1 0.01fF -C890 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z2 0.11fF -C891 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF -C892 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/divider_0/clk 1.36fF -C893 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z1 0.08fF -C894 divider_2/prescaler_0/tspc_0/Z2 divider_2/and_0/OUT 0.06fF -C895 divbuf_13/IN divbuf_13/OUT5 0.00fF -C896 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT 43.38fF -C897 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF -C898 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF -C899 divider_0/prescaler_0/Out divider_0/prescaler_0/m1_2700_2190# 0.11fF -C900 divbuf_25/OUT divbuf_25/OUT5 43.38fF -C901 divider_0/prescaler_0/tspc_1/Q divider_0/nor_0/A 0.03fF -C902 divider_0/nor_1/B divider_0/tspc_0/Z2 0.40fF -C903 divbuf_2/OUT5 divbuf_2/OUT 43.38fF -C904 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF -C905 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF -C906 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF -C907 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C908 pd_0/DIV pd_0/tspc_r_0/Qbar1 0.12fF -C909 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z3 0.05fF -C910 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z4 0.08fF -C911 divbuf_5/a_492_n240# divbuf_5/OUT2 0.42fF -C912 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_1/Q 0.45fF -C913 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF -C914 pd_1/R pd_1/and_pd_0/Z1 0.02fF -C915 pd_1/tspc_r_1/Qbar1 pd_1/tspc_r_1/Qbar 0.01fF -C916 divbuf_21/OUT3 divbuf_21/OUT5 0.01fF -C917 divbuf_21/OUT2 divbuf_21/OUT 0.06fF -C918 divider_1/prescaler_0/tspc_0/D divider_1/prescaler_0/nand_1/z1 0.21fF -C919 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z2 0.25fF -C920 divider_2/tspc_1/Z1 divider_2/nor_0/B 0.03fF -C921 divider_2/tspc_2/Q divider_2/tspc_1/Z4 0.15fF -C922 divider_2/prescaler_0/m1_2700_2190# divider_2/and_0/OUT 0.14fF -C923 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/switch_1/vin 0.19fF -C924 divbuf_0/a_492_n240# divbuf_0/IN 0.13fF -C925 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/a_492_n240# 0.00fF -C926 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z2 0.01fF -C927 divbuf_14/OUT4 divbuf_14/OUT3 5.16fF -C928 ro_complete_1/a5 ro_complete_1/cbank_1/v 0.10fF -C929 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/cbank_0/v 1.30fF -C930 pd_0/R pd_0/UP 0.45fF -C931 divider_2/nor_1/B divider_2/and_0/B 0.29fF -C932 divbuf_6/a_492_n240# divbuf_6/OUT5 0.01fF -C933 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF -C934 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/A 0.80fF -C935 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/divider_0/clk 1.46fF -C936 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF -C937 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF -C938 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/clk 0.05fF -C939 divbuf_23/OUT2 divbuf_23/OUT5 0.02fF -C940 divbuf_23/OUT3 divbuf_23/OUT4 5.16fF -C941 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z4 0.02fF -C942 divbuf_18/OUT4 divbuf_18/OUT3 5.16fF -C943 divider_2/tspc_2/Q divider_2/tspc_2/Z3 0.05fF -C944 divider_2/prescaler_0/tspc_2/Z4 divider_2/prescaler_0/tspc_2/D 0.11fF -C945 divbuf_2/OUT4 divbuf_2/OUT5 20.26fF -C946 divider_0/tspc_1/Z2 divider_0/nor_0/A 0.15fF -C947 divider_0/prescaler_0/Out divider_0/tspc_2/Z3 0.45fF -C948 pd_1/DOWN pd_1/R 0.36fF -C949 pd_0/UP pd_0/and_pd_0/Out1 0.33fF -C950 divbuf_16/OUT2 divbuf_16/a_492_n240# 0.42fF -C951 divider_1/tspc_2/Q divider_1/nor_0/A 0.55fF -C952 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z4 0.36fF -C953 divbuf_10/OUT3 divbuf_10/OUT 0.26fF -C954 divbuf_10/OUT4 divbuf_10/OUT5 20.26fF -C955 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.00fF -C956 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF -C957 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF -C958 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF -C959 divider_2/prescaler_0/tspc_2/Z3 divider_2/clk 0.45fF -C960 divbuf_0/OUT5 divbuf_0/OUT 43.38fF -C961 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF -C962 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z4 0.14fF -C963 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.04fF -C964 ro_complete_1/a2 ro_complete_1/cbank_1/v 0.05fF -C965 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/a_492_n240# 0.42fF -C966 divbuf_4/OUT4 divbuf_4/OUT 1.11fF -C967 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C968 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF -C969 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF -C970 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/clk 0.01fF -C971 divbuf_8/OUT3 divbuf_8/OUT5 0.01fF -C972 divbuf_8/OUT2 divbuf_8/OUT 0.06fF -C973 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z3 0.05fF -C974 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Z4 0.65fF -C975 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT3 0.26fF -C976 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF -C977 divider_0/tspc_1/Z2 divider_0/tspc_1/a_630_n680# 0.01fF -C978 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF -C979 ro_complete_1/a3 ro_complete_1/cbank_2/switch_1/vin 0.13fF -C980 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/IN 0.00fF -C981 divbuf_15/OUT divbuf_15/OUT3 0.26fF -C982 divider_0/nor_0/A divider_0/tspc_2/Z1 0.03fF -C983 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF -C984 divbuf_16/OUT divbuf_16/OUT2 0.06fF -C985 divider_1/tspc_2/Q divider_1/tspc_1/a_630_n680# 0.01fF -C986 divider_1/tspc_1/Z1 divider_1/tspc_1/Z3 0.06fF -C987 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z2 0.19fF -C988 divbuf_5/OUT4 divbuf_5/OUT 1.11fF -C989 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF -C990 cp_0/upbar cp_0/down 0.02fF -C991 divbuf_7/a_492_n240# divbuf_7/OUT5 0.01fF -C992 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z4 0.00fF -C993 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Q 0.21fF -C994 pll_full_0/pd_0/DOWN pll_full_0/pd_0/REF 1.48fF -C995 divbuf_19/OUT2 divbuf_19/OUT3 1.37fF -C996 divider_2/and_0/B divider_2/and_0/Z1 0.07fF -C997 ro_complete_1/a2 ro_complete_1/cbank_0/switch_2/vin 0.14fF -C998 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a4 0.09fF -C999 divbuf_0/OUT divbuf_0/OUT2 0.06fF -C1000 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF -C1001 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF -C1002 divbuf_15/OUT2 divbuf_15/OUT3 1.37fF -C1003 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/v 1.30fF -C1004 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/Qbar 0.01fF -C1005 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF -C1006 divider_1/and_0/out1 divider_1/and_0/A 0.01fF -C1007 divider_1/tspc_0/Z3 divider_1/Out 0.05fF -C1008 divbuf_11/OUT3 divbuf_11/OUT 0.26fF -C1009 divbuf_11/OUT4 divbuf_11/OUT5 20.26fF -C1010 divider_2/prescaler_0/tspc_1/Z4 divider_2/clk 0.12fF -C1011 divider_0/tspc_0/Z3 divider_0/tspc_0/a_630_n680# 0.05fF -C1012 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF -C1013 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF -C1014 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z1 0.17fF -C1015 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/UP 0.11fF -C1016 divbuf_1/OUT5 divbuf_1/IN 0.00fF -C1017 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT4 5.16fF -C1018 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C1019 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/D 0.03fF -C1020 divbuf_4/a_492_n240# divbuf_4/IN 0.13fF -C1021 ro_complete_1/cbank_2/switch_2/vin ro_complete_1/cbank_2/v 1.30fF -C1022 divbuf_17/a_492_n240# divbuf_17/OUT5 0.01fF -C1023 divider_2/tspc_1/Q divider_2/tspc_1/Z3 0.05fF -C1024 divider_2/nor_1/B divider_2/tspc_0/a_630_n680# 0.35fF -C1025 pd_1/tspc_r_0/z5 pd_1/tspc_r_0/Z3 0.11fF -C1026 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z3 0.11fF -C1027 divider_1/prescaler_0/tspc_0/Z3 divider_1/clk 0.64fF -C1028 divbuf_20/a_492_n240# divbuf_20/OUT 0.00fF -C1029 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/clk 0.01fF -C1030 divbuf_13/OUT3 divbuf_13/OUT5 0.01fF -C1031 divbuf_13/OUT2 divbuf_13/OUT 0.06fF -C1032 divider_2/tspc_2/a_630_n680# divider_2/nor_0/A 0.35fF -C1033 divider_2/prescaler_0/tspc_1/Q divider_2/clk 0.60fF -C1034 divbuf_15/IN divbuf_15/a_492_n240# 0.13fF -C1035 divbuf_25/OUT2 divbuf_25/a_492_n240# 0.42fF -C1036 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF -C1037 divbuf_0/OUT5 divbuf_0/a_492_n240# 0.01fF -C1038 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF -C1039 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF -C1040 pd_0/tspc_r_0/Z3 pd_0/DOWN 0.03fF -C1041 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z4 0.65fF -C1042 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF -C1043 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF -C1044 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z4 0.12fF -C1045 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z2 1.07fF -C1046 cp_0/a_1710_n2840# cp_0/out 0.61fF -C1047 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z4 0.20fF -C1048 pd_1/REF pd_1/tspc_r_1/z5 0.04fF -C1049 pd_1/tspc_r_1/Z1 pd_1/tspc_r_1/Z2 0.71fF -C1050 divider_1/prescaler_0/tspc_1/Q divider_1/nor_0/A 0.03fF -C1051 divbuf_21/OUT4 divbuf_21/OUT 1.11fF -C1052 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF -C1053 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/clk 0.01fF -C1054 divider_2/tspc_1/Z3 divider_2/nor_0/B 0.38fF -C1055 divider_2/tspc_0/Z1 divider_2/tspc_0/Z3 0.06fF -C1056 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_2/D 0.16fF -C1057 divbuf_12/a_492_n240# divbuf_12/OUT5 0.01fF -C1058 divbuf_15/OUT2 divbuf_15/OUT 0.06fF -C1059 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF -C1060 ro_complete_0/a4 ro_complete_0/cbank_1/v 0.05fF -C1061 divbuf_3/IN divbuf_3/OUT5 0.00fF -C1062 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF -C1063 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C1064 divbuf_15/OUT3 divbuf_15/OUT5 0.01fF -C1065 divider_0/nor_0/A divider_0/and_0/A 0.01fF -C1066 pd_1/DIV pd_1/tspc_r_0/z5 0.04fF -C1067 divbuf_6/OUT2 divbuf_6/OUT3 1.37fF -C1068 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/nor_0/B 0.03fF -C1069 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/a_630_n680# 0.05fF -C1070 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF -C1071 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF -C1072 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF -C1073 divider_2/prescaler_0/Out divider_2/clk 0.51fF -C1074 divbuf_16/OUT4 divbuf_16/OUT3 5.16fF -C1075 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z2 0.23fF -C1076 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/clk 0.29fF -C1077 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/z5 0.11fF -C1078 divbuf_23/OUT3 divbuf_23/OUT 0.26fF -C1079 divbuf_23/OUT4 divbuf_23/OUT5 20.26fF -C1080 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z3 0.29fF -C1081 divbuf_25/OUT2 divbuf_25/OUT5 0.02fF -C1082 divbuf_25/OUT3 divbuf_25/OUT4 5.16fF -C1083 divider_0/prescaler_0/m1_2700_2190# divider_0/nor_0/A 0.01fF -C1084 divider_0/prescaler_0/Out divider_0/tspc_2/Z4 0.12fF -C1085 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z2 0.01fF -C1086 divbuf_0/a_492_n240# divbuf_0/OUT2 0.42fF -C1087 divbuf_3/OUT4 divbuf_3/OUT 1.11fF -C1088 ro_complete_1/a1 ro_complete_1/cbank_2/v 0.05fF -C1089 divbuf_10/OUT5 divbuf_10/OUT 43.38fF -C1090 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_1/B 0.47fF -C1091 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF -C1092 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF -C1093 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF -C1094 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF -C1095 divider_1/mc2 divider_1/and_0/A 0.16fF -C1096 divider_1/prescaler_0/Out divider_1/tspc_2/a_630_n680# 0.01fF -C1097 divbuf_22/a_492_n240# divbuf_22/OUT 0.00fF -C1098 divbuf_18/OUT3 divbuf_18/OUT 0.26fF -C1099 divider_2/nor_0/B divider_2/and_0/B 0.31fF -C1100 divider_2/tspc_0/Z3 divider_2/Out 0.05fF -C1101 divider_2/prescaler_0/tspc_2/Z4 divider_2/clk 0.12fF -C1102 divbuf_0/OUT4 divbuf_0/OUT3 5.16fF -C1103 divider_0/tspc_0/Z3 divider_0/tspc_1/Q 0.45fF -C1104 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF -C1105 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF -C1106 divbuf_14/OUT2 divbuf_14/OUT3 1.37fF -C1107 divider_0/tspc_1/Z4 divider_0/nor_0/A 0.02fF -C1108 divider_0/nor_0/B divider_0/tspc_0/Z2 0.20fF -C1109 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF -C1110 divbuf_21/a_492_n240# divbuf_21/IN 0.13fF -C1111 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z1 0.01fF -C1112 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/clk 0.01fF -C1113 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_0/A 1.21fF -C1114 divbuf_8/OUT4 divbuf_8/OUT 1.11fF -C1115 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT4 1.11fF -C1116 divbuf_24/a_492_n240# divbuf_24/OUT5 0.01fF -C1117 ro_complete_0/a5 ro_complete_0/cbank_1/switch_0/vin 0.09fF -C1118 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF -C1119 divider_0/tspc_1/Z2 divider_0/nor_0/B 0.30fF -C1120 divbuf_15/OUT divbuf_15/OUT5 43.38fF -C1121 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF -C1122 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF -C1123 divider_0/nor_0/A divider_0/tspc_2/Z3 0.38fF -C1124 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/divider_0/clk 1.46fF -C1125 divider_1/tspc_2/Q divider_1/nor_0/B 0.22fF -C1126 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Out1 0.05fF -C1127 divbuf_7/OUT2 divbuf_7/OUT3 1.37fF -C1128 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF -C1129 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.29fF -C1130 divider_1/nor_0/A divider_1/tspc_2/Z1 0.03fF -C1131 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z3 0.05fF -C1132 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Z4 0.65fF -C1133 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/clk 0.14fF -C1134 ro_complete_0/a1 ro_complete_0/cbank_1/v 0.05fF -C1135 divbuf_15/OUT2 divbuf_15/OUT5 0.02fF -C1136 divbuf_14/OUT divbuf_14/OUT4 1.11fF -C1137 divider_0/nor_0/Z1 divider_0/and_0/B 0.18fF -C1138 divider_0/tspc_2/Q divider_0/tspc_2/a_630_n680# 0.04fF -C1139 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF -C1140 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF -C1141 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF -C1142 ro_complete_1/cbank_1/switch_0/vin ro_complete_1/cbank_1/v 1.43fF -C1143 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z4 0.20fF -C1144 pd_0/REF pd_0/tspc_r_1/z5 0.04fF -C1145 pd_0/tspc_r_1/Z1 pd_0/tspc_r_1/Z2 0.71fF -C1146 divbuf_10/a_492_n240# divbuf_10/OUT2 0.42fF -C1147 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF -C1148 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_0/B 0.35fF -C1149 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_1/B 0.22fF -C1150 divider_1/tspc_1/Z3 divider_1/tspc_1/Q 0.05fF -C1151 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_1/Q 0.13fF -C1152 divbuf_11/OUT5 divbuf_11/OUT 43.38fF -C1153 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/B 0.08fF -C1154 divider_2/nor_0/Z1 divider_2/and_0/B 0.18fF -C1155 divbuf_9/a_492_n240# divbuf_9/OUT 0.00fF -C1156 ro_complete_0/a2 ro_complete_0/cbank_1/switch_3/vin 0.09fF -C1157 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF -C1158 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z2 0.25fF -C1159 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF -C1160 divbuf_14/OUT5 divbuf_14/a_492_n240# 0.01fF -C1161 divider_0/tspc_1/Q divider_0/tspc_0/Z2 0.14fF -C1162 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF -C1163 divider_2/tspc_1/Q divider_2/tspc_0/a_630_n680# 0.01fF -C1164 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/switch_5/vin 0.20fF -C1165 cp_0/a_1710_n2840# cp_0/upbar 0.29fF -C1166 pd_1/R pd_1/REF 0.61fF -C1167 divbuf_20/IN divbuf_20/OUT5 0.00fF -C1168 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF -C1169 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z4 0.28fF -C1170 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/D 0.03fF -C1171 divider_1/prescaler_0/tspc_0/Z4 divider_1/clk 0.12fF -C1172 divbuf_8/a_492_n240# divbuf_8/IN 0.13fF -C1173 divider_2/tspc_2/Q divider_2/tspc_1/a_630_n680# 0.01fF -C1174 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z3 0.33fF -C1175 divbuf_13/OUT4 divbuf_13/OUT 1.11fF -C1176 divider_2/and_0/OUT divider_2/and_0/Z1 0.04fF -C1177 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z2 0.01fF -C1178 divider_2/prescaler_0/tspc_2/Q divider_2/clk 0.05fF -C1179 divbuf_0/OUT divbuf_0/a_492_n240# 0.00fF -C1180 divbuf_25/OUT2 divbuf_25/OUT 0.06fF -C1181 divbuf_1/OUT5 divbuf_1/OUT3 0.01fF -C1182 io_clamp_low[2] io_analog[6] 0.53fF -C1183 divbuf_17/a_492_n240# divbuf_17/OUT2 0.42fF -C1184 divider_0/and_0/OUT divider_0/clk 0.04fF -C1185 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z1 0.09fF -C1186 pd_0/DIV pd_0/tspc_r_0/Z2 0.19fF -C1187 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF -C1188 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C1189 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z3 0.16fF -C1190 divbuf_5/a_492_n240# divbuf_5/OUT 0.00fF -C1191 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF -C1192 pd_1/tspc_r_1/Qbar1 pd_1/tspc_r_1/z5 0.20fF -C1193 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF -C1194 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/clk 0.01fF -C1195 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Q 0.91fF -C1196 divbuf_12/OUT2 divbuf_12/OUT3 1.37fF -C1197 divider_2/tspc_0/Z2 divider_2/tspc_0/Z4 0.36fF -C1198 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/nand_0/z1 0.07fF -C1199 divider_2/prescaler_0/tspc_0/Z2 divider_2/clk 0.11fF -C1200 divbuf_16/OUT5 divbuf_16/IN 0.00fF -C1201 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/a_492_n240# 0.00fF -C1202 divider_2/and_0/out1 divider_2/and_0/B 0.18fF -C1203 ro_complete_0/a3 ro_complete_0/cbank_2/switch_2/vin 0.09fF -C1204 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF -C1205 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF -C1206 pd_0/R pd_0/tspc_r_1/Qbar 0.03fF -C1207 divbuf_19/OUT4 divbuf_19/OUT 1.11fF -C1208 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z1 0.06fF -C1209 divider_1/nor_1/B divider_1/tspc_1/Q 0.22fF -C1210 divbuf_6/OUT2 divbuf_6/OUT5 0.02fF -C1211 divbuf_6/OUT3 divbuf_6/OUT4 5.16fF -C1212 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.04fF -C1213 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/nor_0/B 0.38fF -C1214 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF -C1215 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF -C1216 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/divider_0/clk 1.46fF -C1217 pd_1/and_pd_0/Out1 pd_1/and_pd_0/Z1 0.18fF -C1218 divbuf_11/a_492_n240# divbuf_11/OUT2 0.42fF -C1219 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF -C1220 divider_1/nor_0/A divider_1/and_0/A 0.01fF -C1221 divbuf_23/OUT5 divbuf_23/OUT 43.38fF -C1222 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Q 0.05fF -C1223 divider_2/prescaler_0/m1_2700_2190# divider_2/clk 0.01fF -C1224 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF -C1225 divbuf_2/OUT2 divbuf_2/a_492_n240# 0.42fF -C1226 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF -C1227 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF -C1228 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF -C1229 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.15fF -C1230 ro_complete_1/cbank_1/switch_5/vin ro_complete_1/cbank_1/v 1.30fF -C1231 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z4 0.65fF -C1232 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Out1 0.05fF -C1233 divider_1/prescaler_0/Out divider_1/nor_0/A 0.15fF -C1234 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF -C1235 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF -C1236 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF -C1237 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z4 0.01fF -C1238 divbuf_22/IN divbuf_22/OUT5 0.00fF -C1239 divbuf_13/a_492_n240# divbuf_13/IN 0.13fF -C1240 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/v 1.30fF -C1241 divider_0/tspc_2/Q divider_0/tspc_1/Z1 0.01fF -C1242 divider_0/tspc_0/Z3 divider_0/tspc_0/Z4 0.65fF -C1243 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF -C1244 divbuf_1/OUT2 divbuf_1/OUT5 0.02fF -C1245 divbuf_0/OUT5 divbuf_0/OUT3 0.01fF -C1246 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF -C1247 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Out1 0.33fF -C1248 divider_0/nor_0/B divider_0/and_0/A 0.26fF -C1249 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/a_630_n680# 0.19fF -C1250 pd_1/DOWN pd_1/and_pd_0/Out1 0.12fF -C1251 pd_1/REF pd_1/tspc_r_1/Qbar1 0.12fF -C1252 pll_full_0/filter_0/a_4216_n5230# pll_full_0/divider_0/clk 1.58fF -C1253 divbuf_16/OUT2 divbuf_16/OUT3 1.37fF -C1254 divider_1/tspc_1/Z4 divider_1/nor_0/A 0.02fF -C1255 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z1 0.00fF -C1256 divider_2/tspc_2/Q divider_2/nor_0/B 0.22fF -C1257 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Q 0.15fF -C1258 divider_2/nor_1/Z1 divider_2/and_0/B 0.78fF -C1259 divbuf_24/OUT2 divbuf_24/OUT3 1.37fF -C1260 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/DOWN 0.11fF -C1261 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF -C1262 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT2 0.02fF -C1263 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF -C1264 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF -C1265 divider_0/nor_0/A divider_0/tspc_2/Z4 0.21fF -C1266 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Q 0.05fF -C1267 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF -C1268 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF -C1269 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z4 0.12fF -C1270 divider_1/tspc_2/Z1 divider_1/tspc_2/Z2 1.07fF -C1271 divider_1/nor_0/A divider_1/tspc_2/Z3 0.38fF -C1272 divbuf_7/OUT2 divbuf_7/OUT5 0.02fF -C1273 divbuf_7/OUT3 divbuf_7/OUT4 5.16fF -C1274 divbuf_23/a_492_n240# divbuf_23/OUT2 0.42fF -C1275 divbuf_14/IN divbuf_14/OUT5 0.00fF -C1276 divider_0/tspc_2/Q divider_0/nor_0/A 0.55fF -C1277 divider_0/nor_0/B divider_0/tspc_1/Z4 0.21fF -C1278 divbuf_0/OUT3 divbuf_0/OUT2 1.37fF -C1279 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/a_492_n240# 0.42fF -C1280 divbuf_3/a_492_n240# divbuf_3/OUT5 0.01fF -C1281 ro_complete_1/a0 ro_complete_1/cbank_1/switch_5/vin 0.09fF -C1282 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C1283 divider_0/and_0/A divider_0/and_0/B 0.18fF -C1284 pd_0/R pd_0/and_pd_0/Z1 0.02fF -C1285 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/z5 0.20fF -C1286 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_0/a_740_n680# 0.21fF -C1287 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z4 0.12fF -C1288 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_1/Q 0.21fF -C1289 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z2 0.01fF -C1290 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/D 0.03fF -C1291 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/nor_1/B 0.22fF -C1292 divbuf_18/OUT2 divbuf_18/OUT5 0.02fF -C1293 divider_1/and_0/out1 divider_1/and_0/Z1 0.36fF -C1294 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_2/Q 0.19fF -C1295 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/clk 0.01fF -C1296 divbuf_9/IN divbuf_9/OUT5 0.00fF -C1297 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a4 0.12fF -C1298 ro_complete_0/a2 ro_complete_0/cbank_0/switch_3/vin 0.09fF -C1299 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF -C1300 divider_0/tspc_0/Z4 divider_0/tspc_0/Z2 0.36fF -C1301 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_0/z1 0.24fF -C1302 ro_complete_1/a2 ro_complete_1/cbank_2/switch_2/vin 0.14fF -C1303 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF -C1304 divbuf_4/a_492_n240# divbuf_4/OUT5 0.01fF -C1305 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/v 1.30fF -C1306 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divbuf_0/IN 0.05fF -C1307 pd_1/R pd_1/tspc_r_1/Qbar1 0.30fF -C1308 pd_1/tspc_r_0/Z3 pd_1/tspc_r_0/Qbar1 0.38fF -C1309 pd_0/and_pd_0/Out1 pd_0/and_pd_0/Z1 0.18fF -C1310 divbuf_20/OUT3 divbuf_20/OUT5 0.01fF -C1311 divbuf_20/OUT2 divbuf_20/OUT 0.06fF -C1312 divider_1/and_0/OUT divider_1/prescaler_0/nand_0/z1 0.01fF -C1313 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF -C1314 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF -C1315 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/clk 0.11fF -C1316 divider_2/mc2 divider_2/and_0/A 0.16fF -C1317 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF -C1318 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z3 0.05fF -C1319 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z4 0.08fF -C1320 divider_2/nor_0/A divider_2/tspc_2/Z2 0.23fF -C1321 divider_2/prescaler_0/tspc_0/D divider_2/clk 0.29fF -C1322 divbuf_14/OUT divbuf_14/OUT2 0.06fF -C1323 divider_0/tspc_2/Q divider_0/tspc_1/a_630_n680# 0.01fF -C1324 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z2 0.19fF -C1325 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF -C1326 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.26fF -C1327 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_0/vin 0.19fF -C1328 pd_0/DIV pd_0/R 0.51fF -C1329 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z2 0.14fF -C1330 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.01fF -C1331 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF -C1332 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF -C1333 pll_full_0/ro_complete_0/a2 pll_full_0/divider_0/clk 0.11fF -C1334 divider_1/mc2 divider_1/prescaler_0/tspc_2/a_630_n680# 0.33fF -C1335 divider_1/nor_1/Z1 divider_1/nor_0/B 0.18fF -C1336 divider_1/tspc_2/Q divider_1/tspc_1/Z2 0.14fF -C1337 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z4 0.36fF -C1338 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/Out 0.05fF -C1339 cp_0/a_10_n50# cp_0/vbias 0.19fF -C1340 divider_1/and_0/OUT divider_1/clk 0.04fF -C1341 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.31fF -C1342 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF -C1343 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF -C1344 divider_2/prescaler_0/tspc_1/Z2 divider_2/and_0/OUT 0.06fF -C1345 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z3 0.33fF -C1346 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Q 0.38fF -C1347 divbuf_12/OUT2 divbuf_12/OUT5 0.02fF -C1348 divbuf_12/OUT3 divbuf_12/OUT4 5.16fF -C1349 pll_full_0/pd_0/DOWN pll_full_0/pd_0/R 0.36fF -C1350 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/a_630_n680# 0.19fF -C1351 ro_complete_0/a5 ro_complete_0/cbank_1/v 0.10fF -C1352 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/a0 0.09fF -C1353 pd_1/DIV pd_1/tspc_r_0/Qbar1 0.12fF -C1354 pd_0/REF pd_0/tspc_r_1/Qbar1 0.12fF -C1355 divbuf_6/OUT3 divbuf_6/OUT 0.26fF -C1356 divbuf_6/OUT4 divbuf_6/OUT5 20.26fF -C1357 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_0/B 0.51fF -C1358 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF -C1359 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/divider_0/clk 1.58fF -C1360 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z1 0.00fF -C1361 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF -C1362 divbuf_18/OUT4 divbuf_18/OUT5 20.26fF -C1363 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/clk 0.01fF -C1364 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF -C1365 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF -C1366 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.64fF -C1367 divbuf_1/OUT5 divbuf_1/a_492_n240# 0.01fF -C1368 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF -C1369 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF -C1370 ro_complete_1/cbank_0/v ro_complete_1/cbank_2/v 0.04fF -C1371 pd_1/DOWN pd_1/tspc_r_0/Z3 0.03fF -C1372 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF -C1373 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF -C1374 divbuf_19/a_492_n240# divbuf_19/IN 0.13fF -C1375 divider_2/prescaler_0/Out divider_2/prescaler_0/m1_2700_2190# 0.11fF -C1376 divider_1/prescaler_0/Out divider_1/tspc_2/Z2 0.11fF -C1377 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/D 0.15fF -C1378 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/clk 0.14fF -C1379 divider_1/nor_1/Z1 divider_1/and_0/B 0.78fF -C1380 divbuf_22/OUT3 divbuf_22/OUT5 0.01fF -C1381 divbuf_22/OUT2 divbuf_22/OUT 0.06fF -C1382 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z2 0.71fF -C1383 divider_2/and_0/OUT divider_2/and_0/out1 0.31fF -C1384 divbuf_0/OUT divbuf_0/OUT3 0.26fF -C1385 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a3 0.13fF -C1386 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF -C1387 divider_0/tspc_2/Q divider_0/tspc_1/Z3 0.45fF -C1388 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF -C1389 divbuf_2/OUT2 divbuf_2/OUT 0.06fF -C1390 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C1391 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF -C1392 pd_1/tspc_r_1/Z3 pd_1/UP 0.03fF -C1393 divbuf_21/a_492_n240# divbuf_21/OUT5 0.01fF -C1394 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/clk 0.11fF -C1395 divider_1/tspc_0/a_630_n680# divider_1/Out 0.04fF -C1396 divider_1/nor_0/B divider_1/and_0/A 0.26fF -C1397 divider_2/tspc_1/Z1 divider_2/tspc_1/Z3 0.06fF -C1398 pll_full_0/pd_0/DOWN pll_full_0/cp_0/a_1710_0# 0.04fF -C1399 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/R 0.21fF -C1400 divider_2/nor_0/A divider_2/and_0/B 0.08fF -C1401 divbuf_24/OUT2 divbuf_24/OUT5 0.02fF -C1402 divbuf_24/OUT3 divbuf_24/OUT4 5.16fF -C1403 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF -C1404 pll_full_0/pd_0/DIV pll_full_0/divider_0/and_0/OUT 0.01fF -C1405 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT3 0.26fF -C1406 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT4 20.26fF -C1407 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z4 0.00fF -C1408 divbuf_16/OUT5 divbuf_16/OUT4 20.26fF -C1409 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF -C1410 ro_complete_1/a4 ro_complete_1/cbank_2/switch_0/vin 0.12fF -C1411 pd_0/DOWN pd_0/UP 0.46fF -C1412 pd_0/tspc_r_0/Z4 pd_0/tspc_r_0/z5 0.04fF -C1413 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF -C1414 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z3 0.06fF -C1415 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C1416 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF -C1417 divbuf_7/OUT3 divbuf_7/OUT 0.26fF -C1418 divbuf_7/OUT4 divbuf_7/OUT5 20.26fF -C1419 divider_2/prescaler_0/Out divider_2/tspc_2/Z3 0.45fF -C1420 divider_1/tspc_2/Z2 divider_1/tspc_2/Z3 0.16fF -C1421 divider_1/nor_0/A divider_1/tspc_2/Z4 0.21fF -C1422 divider_2/tspc_2/Q divider_2/tspc_2/a_630_n680# 0.04fF -C1423 divider_2/prescaler_0/tspc_2/Z2 divider_2/and_0/OUT 0.05fF -C1424 divbuf_2/IN divbuf_2/OUT5 0.00fF -C1425 ro_complete_0/a0 ro_complete_0/cbank_2/switch_4/vin 0.13fF -C1426 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF -C1427 divbuf_14/IN divbuf_14/a_492_n240# 0.13fF -C1428 divider_0/mc2 divider_0/and_0/A 0.16fF -C1429 divider_0/prescaler_0/Out divider_0/tspc_2/a_630_n680# 0.01fF -C1430 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF -C1431 divider_1/nor_0/Z1 divider_1/and_0/A 0.80fF -C1432 divbuf_3/OUT3 divbuf_3/OUT4 5.16fF -C1433 ro_complete_1/a0 ro_complete_1/cbank_1/v 0.05fF -C1434 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z3 0.09fF -C1435 divider_1/tspc_0/Z1 divider_1/tspc_1/Q 0.01fF -C1436 divider_1/nor_0/B divider_1/tspc_1/Z4 0.21fF -C1437 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/D 0.05fF -C1438 divbuf_10/a_492_n240# divbuf_10/OUT 0.00fF -C1439 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C1440 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/divider_0/clk 1.46fF -C1441 divider_1/and_0/A divider_1/and_0/B 0.18fF -C1442 divbuf_9/OUT3 divbuf_9/OUT5 0.01fF -C1443 divbuf_9/OUT2 divbuf_9/OUT 0.06fF -C1444 divider_2/tspc_0/a_630_n680# divider_2/Out 0.04fF -C1445 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_0/D 0.32fF -C1446 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/clk 0.01fF -C1447 ro_complete_0/a2 ro_complete_0/cbank_2/switch_3/vin 0.09fF -C1448 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF -C1449 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/z5 0.04fF -C1450 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z2 0.71fF -C1451 divbuf_1/OUT divbuf_1/OUT4 1.11fF -C1452 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_4/vin 0.20fF -C1453 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF -C1454 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF -C1455 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/Q 0.04fF -C1456 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF -C1457 divider_1/mc2 divider_1/nor_1/B 0.15fF -C1458 divbuf_4/OUT2 divbuf_4/OUT3 1.37fF -C1459 ro_complete_1/cbank_2/switch_0/vin ro_complete_1/cbank_2/v 1.45fF -C1460 divider_1/prescaler_0/tspc_2/D divider_1/prescaler_0/nand_0/z1 0.24fF -C1461 divbuf_20/OUT4 divbuf_20/OUT 1.11fF -C1462 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C1463 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/clk 0.51fF -C1464 divbuf_8/a_492_n240# divbuf_8/OUT5 0.01fF -C1465 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z4 0.12fF -C1466 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z2 1.07fF -C1467 io_clamp_low[2] io_clamp_high[2] 0.53fF -C1468 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/DOWN 0.21fF -C1469 divider_2/tspc_2/Z1 divider_2/tspc_2/Z3 0.06fF -C1470 ro_complete_1/a2 ro_complete_1/cbank_1/switch_3/vin 0.09fF -C1471 divider_0/tspc_2/Q divider_0/nor_0/B 0.22fF -C1472 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF -C1473 divbuf_2/a_492_n240# divbuf_2/OUT 0.00fF -C1474 io_clamp_high[1] io_analog[5] 0.53fF -C1475 divbuf_14/OUT5 divbuf_14/OUT3 0.01fF -C1476 pd_1/DIV pd_1/tspc_r_0/Z1 0.17fF -C1477 pd_0/tspc_r_0/Qbar1 pd_0/R 0.01fF -C1478 pd_0/DIV pd_0/tspc_r_0/Z4 0.02fF -C1479 pd_0/DOWN pd_0/tspc_r_0/Qbar 0.21fF -C1480 divider_1/nor_1/B divider_1/tspc_0/Z1 0.03fF -C1481 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z4 0.01fF -C1482 divbuf_5/OUT2 divbuf_5/OUT3 1.37fF -C1483 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_0/B 0.18fF -C1484 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z4 0.12fF -C1485 divider_1/tspc_1/Q divider_1/tspc_0/Z3 0.45fF -C1486 divider_1/prescaler_0/tspc_2/D divider_1/clk 0.26fF -C1487 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF -C1488 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/clk 0.11fF -C1489 divbuf_12/OUT3 divbuf_12/OUT 0.26fF -C1490 divbuf_12/OUT4 divbuf_12/OUT5 20.26fF -C1491 divider_2/tspc_1/Z2 divider_2/tspc_1/Z4 0.36fF -C1492 divider_2/tspc_0/a_630_n680# divider_2/tspc_0/Z3 0.05fF -C1493 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z3 0.05fF -C1494 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z4 0.08fF -C1495 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Q 0.04fF -C1496 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/z5 0.20fF -C1497 ro_complete_0/a2 ro_complete_0/cbank_2/v 0.05fF -C1498 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF -C1499 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF -C1500 divbuf_3/OUT2 divbuf_3/OUT 0.06fF -C1501 ro_complete_1/a3 ro_complete_1/cbank_1/v 0.05fF -C1502 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF -C1503 pd_0/tspc_r_1/Z3 pd_0/UP 0.03fF -C1504 divbuf_16/OUT divbuf_16/a_492_n240# 0.00fF -C1505 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Q 0.15fF -C1506 divider_1/prescaler_0/tspc_0/Z2 divider_1/and_0/OUT 0.06fF -C1507 divbuf_6/OUT5 divbuf_6/OUT 43.38fF -C1508 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/nor_0/B 0.02fF -C1509 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z4 0.15fF -C1510 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF -C1511 divbuf_11/a_492_n240# divbuf_11/OUT 0.00fF -C1512 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF -C1513 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a4 0.12fF -C1514 divbuf_19/OUT divbuf_19/OUT2 0.06fF -C1515 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF -C1516 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar 0.03fF -C1517 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_4/vin 0.20fF -C1518 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF -C1519 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF -C1520 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF -C1521 divbuf_20/a_492_n240# divbuf_20/IN 0.13fF -C1522 divbuf_19/a_492_n240# divbuf_19/OUT 0.00fF -C1523 divider_1/tspc_0/Z2 divider_1/tspc_1/Q 0.14fF -C1524 divider_1/nor_1/B divider_1/tspc_0/Z3 0.38fF -C1525 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/D 0.05fF -C1526 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/clk 0.01fF -C1527 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/Z3 0.05fF -C1528 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z2 0.16fF -C1529 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C1530 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF -C1531 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/clk 0.14fF -C1532 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.78fF -C1533 divbuf_18/OUT2 divbuf_18/OUT 0.06fF -C1534 divbuf_22/OUT4 divbuf_22/OUT 1.11fF -C1535 divbuf_13/a_492_n240# divbuf_13/OUT5 0.01fF -C1536 divbuf_18/OUT5 divbuf_18/OUT 43.38fF -C1537 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF -C1538 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/a1 0.14fF -C1539 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/a3 0.09fF -C1540 divider_2/nor_1/B divider_2/mc2 0.15fF -C1541 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.45fF -C1542 ro_complete_1/cbank_2/switch_5/vin ro_complete_1/cbank_2/v 1.30fF -C1543 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF -C1544 pd_1/R pd_1/and_pd_0/Out1 0.33fF -C1545 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z1 0.09fF -C1546 pd_1/REF pd_1/tspc_r_1/Z2 0.19fF -C1547 divbuf_21/OUT2 divbuf_21/OUT3 1.37fF -C1548 divbuf_24/OUT3 divbuf_24/OUT 0.26fF -C1549 divbuf_24/OUT4 divbuf_24/OUT5 20.26fF -C1550 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z4 0.14fF -C1551 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Z4 0.65fF -C1552 divbuf_3/IN divbuf_3/a_492_n240# 0.13fF -C1553 divbuf_1/a_492_n240# divbuf_1/IN 0.13fF -C1554 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/v 1.30fF -C1555 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C1556 divider_2/nor_1/B divider_2/tspc_0/Z2 0.40fF -C1557 divider_1/prescaler_0/m1_2700_2190# divider_1/nor_0/A 0.01fF -C1558 pd_0/R pd_0/REF 0.61fF -C1559 divbuf_6/a_492_n240# divbuf_6/OUT2 0.42fF -C1560 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z4 0.15fF -C1561 pll_full_0/divbuf_0/IN pll_full_0/divider_0/nor_1/B 0.27fF -C1562 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF -C1563 divider_2/nor_1/B divider_2/tspc_0/Z4 0.22fF -C1564 divider_1/tspc_1/Z1 divider_1/nor_0/B 0.03fF -C1565 divider_1/tspc_1/Z3 divider_1/tspc_1/a_630_n680# 0.05fF -C1566 divider_1/nor_1/B divider_1/tspc_0/Z2 0.40fF -C1567 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z4 0.00fF -C1568 divbuf_7/OUT5 divbuf_7/OUT 43.38fF -C1569 divider_2/mc2 divider_2/prescaler_0/tspc_2/a_630_n680# 0.33fF -C1570 divider_2/prescaler_0/Out divider_2/tspc_2/Z4 0.12fF -C1571 divider_1/tspc_2/Z2 divider_1/tspc_2/Z4 0.36fF -C1572 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF -C1573 divider_2/tspc_2/Q divider_2/nor_0/A 0.55fF -C1574 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Q 0.20fF -C1575 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/D 0.09fF -C1576 divbuf_23/a_492_n240# divbuf_23/OUT 0.00fF -C1577 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z3 0.05fF -C1578 divider_0/prescaler_0/Out divider_0/nor_0/A 0.15fF -C1579 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF -C1580 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF -C1581 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF -C1582 divbuf_3/OUT4 divbuf_3/OUT5 20.26fF -C1583 divbuf_25/OUT4 divbuf_25/OUT5 20.26fF -C1584 divider_0/and_0/B divider_0/and_0/Z1 0.07fF -C1585 divbuf_10/IN divbuf_10/OUT5 0.00fF -C1586 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF -C1587 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C1588 divider_1/mc2 divider_1/and_0/out1 0.06fF -C1589 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Q 0.04fF -C1590 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z3 0.06fF -C1591 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/D 0.11fF -C1592 divbuf_22/a_492_n240# divbuf_22/IN 0.13fF -C1593 divbuf_18/OUT4 divbuf_18/OUT 1.11fF -C1594 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/tspc_0/D 0.04fF -C1595 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/nand_1/z1 0.22fF -C1596 divbuf_9/OUT4 divbuf_9/OUT 1.11fF -C1597 ro_complete_0/a2 ro_complete_0/cbank_0/switch_2/vin 0.14fF -C1598 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a4 0.09fF -C1599 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a5 0.09fF -C1600 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z3 0.33fF -C1601 pll_full_0/pd_0/REF pll_full_0/divbuf_1/OUT5 0.00fF -C1602 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF -C1603 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF -C1604 divbuf_16/OUT5 divbuf_16/OUT2 0.02fF -C1605 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF -C1606 divbuf_1/OUT2 divbuf_1/OUT3 1.37fF -C1607 divbuf_4/OUT2 divbuf_4/OUT5 0.02fF -C1608 divbuf_4/OUT3 divbuf_4/OUT4 5.16fF -C1609 pd_1/R pd_1/tspc_r_1/Z2 0.21fF -C1610 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/Q 0.04fF -C1611 divider_1/prescaler_0/tspc_1/Z3 divider_1/clk 0.45fF -C1612 divbuf_8/OUT2 divbuf_8/OUT3 1.37fF -C1613 divider_2/tspc_2/Q divider_2/tspc_1/Z1 0.01fF -C1614 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z3 0.16fF -C1615 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_0/D 0.09fF -C1616 divider_2/tspc_2/Z1 divider_2/tspc_2/Z4 0.00fF -C1617 pll_full_0/pd_0/REF pll_full_0/divbuf_1/a_492_n240# 0.13fF -C1618 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF -C1619 io_clamp_low[0] io_analog[4] 0.53fF -C1620 divider_0/tspc_2/a_630_n680# divider_0/nor_0/A 0.35fF -C1621 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF -C1622 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF -C1623 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/z5 0.11fF -C1624 divbuf_5/OUT2 divbuf_5/OUT5 0.02fF -C1625 divbuf_5/OUT3 divbuf_5/OUT4 5.16fF -C1626 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF -C1627 divider_1/nor_1/B divider_1/tspc_1/a_630_n680# 0.00fF -C1628 divbuf_7/a_492_n240# divbuf_7/OUT2 0.42fF -C1629 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF -C1630 divbuf_19/OUT5 divbuf_19/OUT3 0.01fF -C1631 divbuf_12/OUT5 divbuf_12/OUT 43.38fF -C1632 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF -C1633 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z4 0.12fF -C1634 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z2 1.07fF -C1635 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF -C1636 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_2/D 0.16fF -C1637 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.03fF -C1638 ro_complete_1/a4 ro_complete_1/cbank_2/v 0.05fF -C1639 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_0/vin 0.19fF -C1640 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z1 0.09fF -C1641 pd_0/REF pd_0/tspc_r_1/Z2 0.19fF -C1642 divider_1/tspc_1/Z2 divider_1/tspc_1/Z4 0.36fF -C1643 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF -C1644 pll_full_0/ro_complete_0/a0 pll_full_0/divider_0/clk 0.11fF -C1645 divbuf_11/IN divbuf_11/OUT5 0.00fF -C1646 divbuf_9/a_492_n240# divbuf_9/IN 0.13fF -C1647 divider_2/prescaler_0/tspc_1/Z2 divider_2/clk 0.11fF -C1648 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/IN 5.26fF -C1649 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Qbar1 0.12fF -C1650 ro_complete_0/a0 ro_complete_0/cbank_2/switch_5/vin 0.09fF -C1651 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF -C1652 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF -C1653 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF -C1654 pd_1/R pd_1/tspc_r_0/Z3 0.27fF +C0 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Qbar1 0.38fF +C1 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/IN 0.00fF +C2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF +C3 divbuf_14/OUT2 divbuf_14/OUT3 1.37fF +C4 divider_0/tspc_1/Z4 divider_0/nor_0/A 0.02fF +C5 divider_0/nor_0/B divider_0/tspc_0/Z2 0.20fF +C6 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF +C7 ro_complete_1/a5 ro_complete_1/cbank_1/v 0.10fF +C8 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/cbank_0/v 1.30fF +C9 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z1 0.01fF +C10 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/clk 0.01fF +C11 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_0/A 1.21fF +C12 divbuf_6/a_492_n240# divbuf_6/OUT5 0.01fF +C13 divider_0/tspc_1/Z2 divider_0/nor_0/B 0.30fF +C14 divbuf_23/OUT2 divbuf_23/OUT5 0.02fF +C15 divbuf_23/OUT3 divbuf_23/OUT4 5.16fF +C16 pd_1/DOWN pd_1/tspc_r_0/Qbar1 0.11fF +C17 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Z1 0.02fF +C18 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF +C19 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF +C20 pll_full_0/divbuf_1/a_492_n240# pll_full_0/divbuf_1/IN 0.13fF +C21 divbuf_15/OUT divbuf_15/OUT5 43.38fF +C22 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF +C23 divider_0/nor_0/A divider_0/tspc_2/Z3 0.38fF +C24 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF +C25 divider_1/tspc_2/Q divider_1/nor_0/B 0.22fF +C26 divbuf_2/OUT4 divbuf_2/OUT5 20.26fF +C27 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/divider_0/clk 1.46fF +C28 divider_1/nor_0/A divider_1/tspc_2/Z1 0.03fF +C29 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z3 0.05fF +C30 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF +C31 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.29fF +C32 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Z4 0.65fF +C33 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/clk 0.14fF +C34 divbuf_10/OUT3 divbuf_10/OUT 0.26fF +C35 divbuf_10/OUT4 divbuf_10/OUT5 20.26fF +C36 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF +C37 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF +C38 pd_1/DOWN pd_1/and_pd_0/Z1 0.07fF +C39 pd_1/tspc_r_1/Qbar1 pd_1/UP 0.11fF +C40 pd_1/REF pd_1/tspc_r_1/Z1 0.17fF +C41 divider_0/tspc_0/a_630_n680# divider_0/nor_1/B 0.35fF +C42 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF +C43 divbuf_0/OUT4 divbuf_0/OUT5 20.26fF +C44 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF +C45 divider_1/tspc_1/Z3 divider_1/tspc_1/Q 0.05fF +C46 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_1/Q 0.13fF +C47 ro_complete_1/a2 ro_complete_1/cbank_1/v 0.05fF +C48 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF +C49 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_0/B 0.35fF +C50 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_1/B 0.22fF +C51 divider_2/nor_0/Z1 divider_2/and_0/B 0.18fF +C52 divbuf_4/OUT4 divbuf_4/OUT 1.11fF +C53 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/B 0.08fF +C54 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF +C55 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z2 0.25fF +C56 divbuf_8/OUT2 divbuf_8/OUT 0.06fF +C57 divbuf_8/OUT3 divbuf_8/OUT5 0.01fF +C58 divbuf_14/OUT5 divbuf_14/a_492_n240# 0.01fF +C59 divider_0/tspc_1/Q divider_0/tspc_0/Z2 0.14fF +C60 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF +C61 divbuf_15/IN divbuf_15/OUT5 0.00fF +C62 divider_0/mc2 divider_0/and_0/out1 0.06fF +C63 divider_0/nor_0/Z1 divider_0/and_0/A 0.80fF +C64 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF +C65 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z4 0.28fF +C66 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/D 0.03fF +C67 divider_1/prescaler_0/tspc_0/Z4 divider_1/clk 0.12fF +C68 ro_complete_1/a3 ro_complete_1/cbank_2/switch_1/vin 0.13fF +C69 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF +C70 divider_2/tspc_2/Q divider_2/tspc_1/a_630_n680# 0.01fF +C71 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z3 0.33fF +C72 divbuf_5/OUT4 divbuf_5/OUT 1.11fF +C73 divider_2/and_0/OUT divider_2/and_0/Z1 0.04fF +C74 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z2 0.01fF +C75 divider_2/prescaler_0/tspc_2/Q divider_2/clk 0.05fF +C76 divbuf_7/a_492_n240# divbuf_7/OUT5 0.01fF +C77 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z3 0.25fF +C78 pd_0/tspc_r_1/Z2 pd_0/tspc_r_1/Z4 0.14fF +C79 divider_0/and_0/OUT divider_0/clk 0.04fF +C80 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF +C81 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C82 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C83 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z3 0.16fF +C84 ro_complete_1/a2 ro_complete_1/cbank_0/switch_2/vin 0.14fF +C85 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a4 0.09fF +C86 divbuf_0/OUT5 divbuf_0/IN 0.00fF +C87 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF +C88 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF +C89 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Q 0.91fF +C90 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/v 1.30fF +C91 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF +C92 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/clk 0.01fF +C93 divider_2/tspc_0/Z2 divider_2/tspc_0/Z4 0.36fF +C94 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/nand_0/z1 0.07fF +C95 divider_2/prescaler_0/tspc_0/Z2 divider_2/clk 0.11fF +C96 divider_2/and_0/out1 divider_2/and_0/B 0.18fF +C97 divbuf_11/OUT3 divbuf_11/OUT 0.26fF +C98 divbuf_11/OUT4 divbuf_11/OUT5 20.26fF +C99 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF +C100 cp_0/a_1710_n2840# cp_0/a_1710_0# 0.83fF +C101 divbuf_15/OUT2 divbuf_15/a_492_n240# 0.42fF +C102 divider_0/tspc_0/Z3 divider_0/tspc_0/a_630_n680# 0.05fF +C103 divbuf_0/OUT divbuf_0/OUT5 43.38fF +C104 divider_1/prescaler_0/m1_2700_2190# divider_1/and_0/OUT 0.14fF +C105 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/nor_0/B 0.38fF +C106 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.04fF +C107 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C108 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF +C109 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/divider_0/clk 1.46fF +C110 divbuf_19/OUT4 divbuf_19/OUT 1.11fF +C111 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z1 0.06fF +C112 divider_1/nor_1/B divider_1/tspc_1/Q 0.22fF +C113 divbuf_1/OUT5 divbuf_1/IN 0.00fF +C114 divider_1/nor_0/A divider_1/and_0/A 0.01fF +C115 divbuf_4/a_492_n240# divbuf_4/IN 0.13fF +C116 ro_complete_1/cbank_2/switch_2/vin ro_complete_1/cbank_2/v 1.30fF +C117 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF +C118 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Q 0.05fF +C119 divider_2/prescaler_0/m1_2700_2190# divider_2/clk 0.01fF +C120 divbuf_20/a_492_n240# divbuf_20/OUT 0.00fF +C121 pd_1/DIV pd_1/tspc_r_0/Z2 0.19fF +C122 pd_0/DOWN pd_0/R 0.36fF +C123 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z4 0.20fF +C124 pd_0/tspc_r_0/Z1 pd_0/tspc_r_0/Z2 0.71fF +C125 pd_0/DIV pd_0/tspc_r_0/z5 0.04fF +C126 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF +C127 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.15fF +C128 cp_0/a_1710_0# cp_0/down 0.32fF +C129 pll_full_0/divbuf_0/OUT pll_full_0/divbuf_0/OUT3 0.26fF +C130 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF +C131 divbuf_13/OUT2 divbuf_13/OUT 0.06fF +C132 divbuf_13/OUT3 divbuf_13/OUT5 0.01fF +C133 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z4 0.65fF +C134 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF +C135 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF +C136 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF +C137 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF +C138 divider_1/prescaler_0/Out divider_1/nor_0/A 0.15fF +C139 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z4 0.01fF +C140 divbuf_21/OUT4 divbuf_21/OUT 1.11fF +C141 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Out1 0.33fF +C142 pd_0/tspc_r_0/Z4 pd_0/tspc_r_1/Z4 0.02fF +C143 pd_0/DOWN pd_0/and_pd_0/Out1 0.12fF +C144 pd_0/tspc_r_1/Qbar1 pd_0/UP 0.11fF +C145 pd_0/REF pd_0/tspc_r_1/Z1 0.17fF +C146 divbuf_12/a_492_n240# divbuf_12/OUT5 0.01fF +C147 divider_0/nor_0/B divider_0/and_0/A 0.26fF +C148 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/a_630_n680# 0.19fF +C149 divbuf_25/OUT3 divbuf_25/OUT5 0.01fF +C150 pll_full_0/filter_0/a_4216_n5230# pll_full_0/divider_0/clk 1.58fF +C151 ro_complete_0/a4 ro_complete_0/cbank_1/v 0.05fF +C152 divider_2/nor_1/B divider_2/tspc_1/a_630_n680# 0.00fF +C153 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z1 0.00fF +C154 divbuf_16/OUT2 divbuf_16/OUT3 1.37fF +C155 divider_1/tspc_1/Z4 divider_1/nor_0/A 0.02fF +C156 divbuf_3/IN divbuf_3/OUT5 0.00fF +C157 divider_2/tspc_2/Q divider_2/nor_0/B 0.22fF +C158 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Q 0.15fF +C159 divider_2/nor_1/Z1 divider_2/and_0/B 0.78fF +C160 divbuf_6/OUT2 divbuf_6/OUT3 1.37fF +C161 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/DOWN 0.11fF +C162 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT2 0.02fF +C163 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF +C164 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/z5 0.04fF +C165 divbuf_23/OUT3 divbuf_23/OUT 0.26fF +C166 divbuf_23/OUT4 divbuf_23/OUT5 20.26fF +C167 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF +C168 divider_0/nor_0/A divider_0/tspc_2/Z4 0.21fF +C169 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF +C170 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Q 0.05fF +C171 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF +C172 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF +C173 divbuf_0/a_492_n240# divbuf_0/IN 0.13fF +C174 divider_1/tspc_2/Z1 divider_1/tspc_2/Z2 1.07fF +C175 divider_1/nor_0/A divider_1/tspc_2/Z3 0.38fF +C176 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z4 0.12fF +C177 divbuf_3/OUT4 divbuf_3/OUT 1.11fF +C178 ro_complete_1/a1 ro_complete_1/cbank_2/v 0.05fF +C179 divbuf_10/OUT5 divbuf_10/OUT 43.38fF +C180 divbuf_22/a_492_n240# divbuf_22/OUT 0.00fF +C181 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/a_492_n240# 0.42fF +C182 divbuf_14/IN divbuf_14/OUT5 0.00fF +C183 divider_0/nor_0/B divider_0/tspc_1/Z4 0.21fF +C184 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z2 0.25fF +C185 divider_0/and_0/A divider_0/and_0/B 0.18fF +C186 divbuf_0/OUT3 divbuf_0/OUT2 1.37fF +C187 divbuf_0/OUT divbuf_0/a_492_n240# 0.00fF +C188 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C189 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_0/a_740_n680# 0.21fF +C190 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z4 0.12fF +C191 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_1/Q 0.21fF +C192 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z2 0.01fF +C193 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/D 0.03fF +C194 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/nor_1/B 0.22fF +C195 divbuf_18/OUT2 divbuf_18/OUT5 0.02fF +C196 divider_1/and_0/out1 divider_1/and_0/Z1 0.36fF +C197 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_2/Q 0.19fF +C198 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/clk 0.01fF +C199 divbuf_21/a_492_n240# divbuf_21/IN 0.13fF +C200 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF +C201 divbuf_8/OUT4 divbuf_8/OUT 1.11fF +C202 pd_0/R pd_0/tspc_r_1/Z3 0.29fF +C203 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF +C204 divider_0/tspc_0/Z4 divider_0/tspc_0/Z2 0.36fF +C205 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_0/z1 0.24fF +C206 divbuf_24/a_492_n240# divbuf_24/OUT5 0.01fF +C207 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a4 0.12fF +C208 ro_complete_0/a5 ro_complete_0/cbank_1/switch_0/vin 0.09fF +C209 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF +C210 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divbuf_1/IN 0.05fF +C211 divider_1/and_0/OUT divider_1/prescaler_0/nand_0/z1 0.01fF +C212 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF +C213 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF +C214 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/clk 0.11fF +C215 divider_2/mc2 divider_2/and_0/A 0.16fF +C216 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF +C217 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z4 0.08fF +C218 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z3 0.05fF +C219 divider_2/nor_0/A divider_2/tspc_2/Z2 0.23fF +C220 divider_2/prescaler_0/tspc_0/D divider_2/clk 0.29fF +C221 divbuf_7/OUT2 divbuf_7/OUT3 1.37fF +C222 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z2 0.19fF +C223 pd_1/tspc_r_0/Qbar pd_1/tspc_r_0/Qbar1 0.01fF +C224 io_clamp_low[2] io_analog[6] 0.53fF +C225 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.26fF +C226 divider_1/mc2 divider_1/prescaler_0/tspc_2/a_630_n680# 0.33fF +C227 divider_1/nor_1/Z1 divider_1/nor_0/B 0.18fF +C228 divider_1/tspc_2/Q divider_1/tspc_1/Z2 0.14fF +C229 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z4 0.36fF +C230 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/Out 0.05fF +C231 ro_complete_0/a1 ro_complete_0/cbank_1/v 0.05fF +C232 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z2 0.14fF +C233 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.01fF +C234 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C235 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF +C236 pll_full_0/ro_complete_0/a2 pll_full_0/divider_0/clk 0.11fF +C237 divider_2/nor_1/B divider_2/nor_0/B 0.47fF +C238 divider_1/and_0/OUT divider_1/clk 0.04fF +C239 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.31fF +C240 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF +C241 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF +C242 ro_complete_1/cbank_1/switch_0/vin ro_complete_1/cbank_1/v 1.43fF +C243 divider_2/prescaler_0/tspc_1/Z2 divider_2/and_0/OUT 0.06fF +C244 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z3 0.33fF +C245 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Q 0.38fF +C246 divbuf_10/a_492_n240# divbuf_10/OUT2 0.42fF +C247 pll_full_0/pd_0/DOWN pll_full_0/pd_0/R 0.36fF +C248 divbuf_11/OUT5 divbuf_11/OUT 43.38fF +C249 divbuf_9/a_492_n240# divbuf_9/OUT 0.00fF +C250 pd_1/R pd_1/tspc_r_1/Qbar 0.03fF +C251 divbuf_25/OUT3 divbuf_25/OUT 0.26fF +C252 divider_0/mc2 divider_0/nor_1/B 0.15fF +C253 ro_complete_0/a2 ro_complete_0/cbank_1/switch_3/vin 0.09fF +C254 divbuf_16/OUT5 divbuf_16/a_492_n240# 0.01fF +C255 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_2/D 0.16fF +C256 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z1 0.00fF +C257 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF +C258 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_0/B 0.51fF +C259 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C260 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/divider_0/clk 1.58fF +C261 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF +C262 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/switch_5/vin 0.20fF +C263 divbuf_18/OUT4 divbuf_18/OUT5 20.26fF +C264 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/clk 0.01fF +C265 divbuf_20/IN divbuf_20/OUT5 0.00fF +C266 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF +C267 divbuf_8/a_492_n240# divbuf_8/IN 0.13fF +C268 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/z5 0.20fF +C269 pll_full_0/divbuf_0/OUT pll_full_0/divbuf_0/OUT4 1.11fF +C270 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF +C271 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF +C272 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF +C273 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.64fF +C274 divbuf_13/OUT4 divbuf_13/OUT 1.11fF +C275 pd_1/UP pd_1/and_pd_0/Out1 0.33fF +C276 divider_0/mc2 divider_0/nor_0/A 0.04fF +C277 divbuf_0/OUT5 divbuf_0/a_492_n240# 0.01fF +C278 divbuf_19/a_492_n240# divbuf_19/IN 0.13fF +C279 divider_2/prescaler_0/Out divider_2/prescaler_0/m1_2700_2190# 0.11fF +C280 divider_1/prescaler_0/Out divider_1/tspc_2/Z2 0.11fF +C281 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/D 0.15fF +C282 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/clk 0.14fF +C283 divider_1/nor_1/Z1 divider_1/and_0/B 0.78fF +C284 divbuf_1/OUT5 divbuf_1/OUT3 0.01fF +C285 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C286 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF +C287 divbuf_5/a_492_n240# divbuf_5/OUT 0.00fF +C288 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z2 0.71fF +C289 divider_2/and_0/OUT divider_2/and_0/out1 0.31fF +C290 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF +C291 pd_1/tspc_r_0/Qbar pd_1/DOWN 0.21fF +C292 pd_0/tspc_r_0/z5 pd_0/tspc_r_1/z5 0.02fF +C293 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z2 0.25fF +C294 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF +C295 divbuf_12/OUT2 divbuf_12/OUT3 1.37fF +C296 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C297 divbuf_16/OUT5 divbuf_16/IN 0.00fF +C298 divbuf_16/OUT5 divbuf_16/OUT 43.38fF +C299 divbuf_14/OUT divbuf_14/OUT3 0.26fF +C300 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF +C301 ro_complete_0/a3 ro_complete_0/cbank_2/switch_2/vin 0.09fF +C302 divider_2/tspc_1/Q divider_2/tspc_1/a_630_n680# 0.04fF +C303 divider_1/tspc_0/a_630_n680# divider_1/Out 0.04fF +C304 divider_1/nor_0/B divider_1/and_0/A 0.26fF +C305 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF +C306 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/clk 0.11fF +C307 divider_2/tspc_1/Z1 divider_2/tspc_1/Z3 0.06fF +C308 divbuf_6/OUT2 divbuf_6/OUT5 0.02fF +C309 divbuf_6/OUT3 divbuf_6/OUT4 5.16fF +C310 pll_full_0/pd_0/DOWN pll_full_0/cp_0/a_1710_0# 0.04fF +C311 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/R 0.21fF +C312 divider_2/nor_0/A divider_2/and_0/B 0.08fF +C313 divbuf_11/a_492_n240# divbuf_11/OUT2 0.42fF +C314 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z4 0.00fF +C315 pd_1/R pd_1/tspc_r_0/Qbar1 0.01fF +C316 pll_full_0/pd_0/DIV pll_full_0/divider_0/and_0/OUT 0.01fF +C317 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT4 20.26fF +C318 divbuf_23/OUT5 divbuf_23/OUT 43.38fF +C319 divider_0/tspc_2/Q divider_0/tspc_1/Z2 0.14fF +C320 divider_0/tspc_0/a_630_n680# divider_0/tspc_1/Q 0.01fF +C321 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF +C322 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF +C323 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF +C324 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C325 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z3 0.06fF +C326 divbuf_2/OUT2 divbuf_2/a_492_n240# 0.42fF +C327 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF +C328 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF +C329 divider_2/prescaler_0/Out divider_2/tspc_2/Z3 0.45fF +C330 divider_1/tspc_2/Z2 divider_1/tspc_2/Z3 0.16fF +C331 divider_1/nor_0/A divider_1/tspc_2/Z4 0.21fF +C332 ro_complete_1/cbank_1/switch_5/vin ro_complete_1/cbank_1/v 1.30fF +C333 divider_2/tspc_2/Q divider_2/tspc_2/a_630_n680# 0.04fF +C334 divider_2/prescaler_0/tspc_2/Z2 divider_2/and_0/OUT 0.05fF +C335 pd_0/DIV pd_0/tspc_r_0/Qbar1 0.12fF +C336 divbuf_22/IN divbuf_22/OUT5 0.00fF +C337 divbuf_14/IN divbuf_14/a_492_n240# 0.13fF +C338 divider_0/prescaler_0/Out divider_0/tspc_2/a_630_n680# 0.01fF +C339 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF +C340 pd_1/R pd_1/and_pd_0/Z1 0.02fF +C341 pd_1/tspc_r_1/Qbar1 pd_1/tspc_r_1/Qbar 0.01fF +C342 divbuf_13/a_492_n240# divbuf_13/IN 0.13fF +C343 divbuf_1/OUT2 divbuf_1/OUT5 0.02fF +C344 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF +C345 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C346 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/divider_0/clk 1.46fF +C347 divider_1/tspc_0/Z1 divider_1/tspc_1/Q 0.01fF +C348 divider_1/nor_0/B divider_1/tspc_1/Z4 0.21fF +C349 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/D 0.05fF +C350 divider_1/and_0/A divider_1/and_0/B 0.18fF +C351 divider_2/tspc_0/a_630_n680# divider_2/Out 0.04fF +C352 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_0/D 0.32fF +C353 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/clk 0.01fF +C354 pd_0/R pd_0/UP 0.45fF +C355 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF +C356 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z2 0.71fF +C357 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/z5 0.04fF +C358 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/Q 0.04fF +C359 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF +C360 pll_full_0/divbuf_0/OUT pll_full_0/divbuf_0/a_492_n240# 0.00fF +C361 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF +C362 divbuf_24/OUT2 divbuf_24/OUT3 1.37fF +C363 divider_1/mc2 divider_1/nor_1/B 0.15fF +C364 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C365 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/clk 0.51fF +C366 divider_1/prescaler_0/tspc_2/D divider_1/prescaler_0/nand_0/z1 0.24fF +C367 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z2 1.07fF +C368 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z4 0.12fF +C369 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/DOWN 0.21fF +C370 divider_2/tspc_2/Z1 divider_2/tspc_2/Z3 0.06fF +C371 divbuf_7/OUT2 divbuf_7/OUT5 0.02fF +C372 divbuf_7/OUT3 divbuf_7/OUT4 5.16fF +C373 pd_1/DOWN pd_1/R 0.36fF +C374 pd_0/UP pd_0/and_pd_0/Out1 0.33fF +C375 pll_full_0/pd_0/REF pll_full_0/divbuf_0/OUT5 0.00fF +C376 divbuf_23/a_492_n240# divbuf_23/OUT2 0.42fF +C377 divbuf_14/OUT5 divbuf_14/OUT3 0.01fF +C378 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z3 0.33fF +C379 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_0/B 0.18fF +C380 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z4 0.12fF +C381 divider_1/nor_1/B divider_1/tspc_0/Z1 0.03fF +C382 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z4 0.01fF +C383 divider_2/tspc_1/Q divider_2/nor_0/B 0.51fF +C384 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF +C385 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/clk 0.11fF +C386 divider_1/tspc_1/Q divider_1/tspc_0/Z3 0.45fF +C387 divider_1/prescaler_0/tspc_2/D divider_1/clk 0.26fF +C388 divbuf_3/a_492_n240# divbuf_3/OUT5 0.01fF +C389 ro_complete_1/a0 ro_complete_1/cbank_1/switch_5/vin 0.09fF +C390 divider_2/tspc_1/Z2 divider_2/tspc_1/Z4 0.36fF +C391 divider_2/tspc_0/a_630_n680# divider_2/tspc_0/Z3 0.05fF +C392 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z4 0.08fF +C393 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z3 0.05fF +C394 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Q 0.04fF +C395 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/z5 0.20fF +C396 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF +C397 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF +C398 divbuf_9/IN divbuf_9/OUT5 0.00fF +C399 divbuf_0/OUT divbuf_0/OUT2 0.06fF +C400 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a4 0.12fF +C401 ro_complete_0/a2 ro_complete_0/cbank_0/switch_3/vin 0.09fF +C402 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF +C403 divider_2/nor_1/B divider_2/nor_1/Z1 0.06fF +C404 divbuf_16/IN divbuf_16/a_492_n240# 0.13fF +C405 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/nand_0/z1 0.07fF +C406 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/nor_0/B 0.02fF +C407 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z4 0.15fF +C408 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF +C409 divbuf_16/OUT divbuf_16/a_492_n240# 0.00fF +C410 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Q 0.15fF +C411 divider_1/prescaler_0/tspc_0/Z2 divider_1/and_0/OUT 0.06fF +C412 ro_complete_1/a2 ro_complete_1/cbank_2/switch_2/vin 0.14fF +C413 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF +C414 divbuf_4/a_492_n240# divbuf_4/OUT5 0.01fF +C415 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/v 1.30fF +C416 divbuf_19/OUT divbuf_19/OUT2 0.06fF +C417 divbuf_20/OUT2 divbuf_20/OUT 0.06fF +C418 divbuf_20/OUT3 divbuf_20/OUT5 0.01fF +C419 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar 0.03fF +C420 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF +C421 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF +C422 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF +C423 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF +C424 divider_1/prescaler_0/m1_2700_2190# divider_1/clk 0.01fF +C425 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/Z3 0.05fF +C426 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z2 0.16fF +C427 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C428 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF +C429 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/clk 0.14fF +C430 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.78fF +C431 divbuf_19/a_492_n240# divbuf_19/OUT 0.00fF +C432 divider_1/tspc_0/Z2 divider_1/tspc_1/Q 0.14fF +C433 divider_1/nor_1/B divider_1/tspc_0/Z3 0.38fF +C434 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/D 0.05fF +C435 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/clk 0.01fF +C436 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_0/vin 0.19fF +C437 divbuf_18/OUT2 divbuf_18/OUT 0.06fF +C438 divbuf_18/OUT5 divbuf_18/OUT 43.38fF +C439 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF +C440 divbuf_12/OUT2 divbuf_12/OUT5 0.02fF +C441 divbuf_12/OUT3 divbuf_12/OUT4 5.16fF +C442 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/Qbar 0.01fF +C443 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.45fF +C444 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/a_630_n680# 0.19fF +C445 ro_complete_0/a5 ro_complete_0/cbank_1/v 0.10fF +C446 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/a0 0.09fF +C447 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C448 divider_2/nor_1/B divider_2/tspc_0/Z1 0.03fF +C449 divbuf_6/OUT3 divbuf_6/OUT 0.26fF +C450 divbuf_6/OUT4 divbuf_6/OUT5 20.26fF +C451 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z4 0.14fF +C452 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Z4 0.65fF +C453 pd_1/tspc_r_0/z5 pd_1/tspc_r_0/Z3 0.11fF +C454 divider_0/mc2 divider_0/nor_0/B 0.06fF +C455 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z4 0.12fF +C456 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C457 divider_1/nor_0/Z1 divider_1/nor_0/B 0.06fF +C458 divider_1/tspc_1/Z1 divider_1/nor_0/B 0.03fF +C459 divider_1/tspc_1/Z3 divider_1/tspc_1/a_630_n680# 0.05fF +C460 divider_1/nor_1/B divider_1/tspc_0/Z2 0.40fF +C461 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z4 0.00fF +C462 divbuf_1/OUT5 divbuf_1/a_492_n240# 0.01fF +C463 pll_full_0/divbuf_1/IN pll_full_0/divider_0/nor_1/B 0.27fF +C464 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z4 0.15fF +C465 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF +C466 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF +C467 divider_2/mc2 divider_2/prescaler_0/tspc_2/a_630_n680# 0.33fF +C468 divider_2/prescaler_0/Out divider_2/tspc_2/Z4 0.12fF +C469 divider_1/tspc_2/Z2 divider_1/tspc_2/Z4 0.36fF +C470 ro_complete_1/cbank_0/v ro_complete_1/cbank_2/v 0.04fF +C471 divider_2/tspc_2/Q divider_2/nor_0/A 0.55fF +C472 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Q 0.20fF +C473 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/D 0.09fF +C474 divbuf_22/OUT2 divbuf_22/OUT 0.06fF +C475 divbuf_22/OUT3 divbuf_22/OUT5 0.01fF +C476 pd_0/tspc_r_0/Z3 pd_0/DOWN 0.03fF +C477 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF +C478 divider_0/prescaler_0/Out divider_0/nor_0/A 0.15fF +C479 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF +C480 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF +C481 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z4 0.20fF +C482 pd_1/tspc_r_1/Z1 pd_1/tspc_r_1/Z2 0.71fF +C483 pd_1/REF pd_1/tspc_r_1/z5 0.04fF +C484 divider_0/tspc_2/Q divider_0/tspc_1/Z4 0.15fF +C485 divbuf_25/OUT4 divbuf_25/OUT5 20.26fF +C486 divider_0/and_0/B divider_0/and_0/Z1 0.07fF +C487 divbuf_0/OUT5 divbuf_0/OUT2 0.02fF +C488 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a3 0.13fF +C489 divider_1/mc2 divider_1/and_0/out1 0.06fF +C490 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Q 0.04fF +C491 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z3 0.06fF +C492 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/D 0.11fF +C493 divbuf_2/OUT2 divbuf_2/OUT 0.06fF +C494 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF +C495 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C496 divbuf_17/a_492_n240# divbuf_17/OUT 0.00fF +C497 divider_2/nor_1/B divider_2/Out 0.22fF +C498 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/clk 0.01fF +C499 divbuf_18/OUT4 divbuf_18/OUT 1.11fF +C500 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/tspc_0/D 0.04fF +C501 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/nand_1/z1 0.22fF +C502 divbuf_21/a_492_n240# divbuf_21/OUT5 0.01fF +C503 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF +C504 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF +C505 pd_1/DIV pd_1/tspc_r_0/z5 0.04fF +C506 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF +C507 divbuf_24/OUT2 divbuf_24/OUT5 0.02fF +C508 divbuf_24/OUT3 divbuf_24/OUT4 5.16fF +C509 divider_0/tspc_2/Q divider_0/tspc_2/Z3 0.05fF +C510 divider_0/mc2 divider_0/and_0/B 0.20fF +C511 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a5 0.09fF +C512 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF +C513 divider_1/nor_0/Z1 divider_1/and_0/B 0.18fF +C514 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/Q 0.04fF +C515 divider_1/prescaler_0/tspc_1/Z3 divider_1/clk 0.45fF +C516 ro_complete_1/a4 ro_complete_1/cbank_2/switch_0/vin 0.12fF +C517 divider_2/tspc_2/Q divider_2/tspc_1/Z1 0.01fF +C518 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z3 0.16fF +C519 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_0/D 0.09fF +C520 io_clamp_low[2] io_clamp_high[2] 0.53fF +C521 divider_2/tspc_2/Z1 divider_2/tspc_2/Z4 0.00fF +C522 divbuf_7/OUT3 divbuf_7/OUT 0.26fF +C523 divbuf_7/OUT4 divbuf_7/OUT5 20.26fF +C524 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF +C525 io_clamp_high[1] io_analog[5] 0.53fF +C526 divider_0/tspc_2/a_630_n680# divider_0/nor_0/A 0.35fF +C527 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF +C528 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z4 0.08fF +C529 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z3 0.05fF +C530 divider_1/nor_1/B divider_1/tspc_1/a_630_n680# 0.00fF +C531 divbuf_2/IN divbuf_2/OUT5 0.00fF +C532 ro_complete_0/a0 ro_complete_0/cbank_2/switch_4/vin 0.13fF +C533 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF +C534 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF +C535 divider_2/nor_1/B divider_2/tspc_0/Z3 0.38fF +C536 divbuf_19/OUT5 divbuf_19/OUT3 0.01fF +C537 divbuf_3/OUT3 divbuf_3/OUT4 5.16fF +C538 ro_complete_1/a0 ro_complete_1/cbank_1/v 0.05fF +C539 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF +C540 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF +C541 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z2 1.07fF +C542 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z4 0.12fF +C543 divbuf_10/a_492_n240# divbuf_10/OUT 0.00fF +C544 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF +C545 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_2/D 0.16fF +C546 divbuf_9/OUT2 divbuf_9/OUT 0.06fF +C547 divbuf_9/OUT3 divbuf_9/OUT5 0.01fF +C548 ro_complete_0/a2 ro_complete_0/cbank_2/switch_3/vin 0.09fF +C549 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Q 0.38fF +C550 divider_1/tspc_1/Z2 divider_1/tspc_1/Z4 0.36fF +C551 divbuf_1/OUT divbuf_1/OUT4 1.11fF +C552 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_4/vin 0.20fF +C553 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF +C554 pll_full_0/ro_complete_0/a0 pll_full_0/divider_0/clk 0.11fF +C555 divbuf_4/OUT2 divbuf_4/OUT3 1.37fF +C556 ro_complete_1/cbank_2/switch_0/vin ro_complete_1/cbank_2/v 1.45fF +C557 divider_2/prescaler_0/tspc_1/Z2 divider_2/clk 0.11fF +C558 divbuf_20/OUT4 divbuf_20/OUT 1.11fF +C559 pll_full_0/pd_0/DIV pll_full_0/divbuf_1/IN 5.26fF +C560 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Qbar1 0.12fF +C561 divbuf_8/a_492_n240# divbuf_8/OUT5 0.01fF +C562 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF +C563 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF +C564 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF +C565 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Out1 0.05fF +C566 ro_complete_1/a2 ro_complete_1/cbank_1/switch_3/vin 0.09fF +C567 divbuf_0/OUT2 divbuf_0/a_492_n240# 0.42fF +C568 divbuf_16/OUT5 divbuf_16/OUT3 0.01fF +C569 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/clk 0.01fF +C570 divider_1/prescaler_0/tspc_2/Z4 divider_1/prescaler_0/tspc_2/D 0.11fF +C571 divbuf_2/a_492_n240# divbuf_2/OUT 0.00fF +C572 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF +C573 divbuf_18/IN divbuf_18/OUT5 0.00fF +C574 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/a_630_n680# 0.19fF +C575 divbuf_5/OUT2 divbuf_5/OUT3 1.37fF +C576 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z4 0.20fF +C577 pd_0/tspc_r_1/Z1 pd_0/tspc_r_1/Z2 0.71fF +C578 pd_0/REF pd_0/tspc_r_1/z5 0.04fF +C579 divbuf_12/OUT3 divbuf_12/OUT 0.26fF +C580 divbuf_12/OUT4 divbuf_12/OUT5 20.26fF +C581 divbuf_25/OUT divbuf_25/OUT4 1.11fF +C582 divider_0/nor_1/B divider_0/tspc_0/Z1 0.03fF +C583 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF +C584 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z2 0.01fF +C585 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/Out 0.21fF +C586 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z2 0.01fF +C587 ro_complete_0/a2 ro_complete_0/cbank_2/v 0.05fF +C588 divider_2/tspc_1/Q divider_2/tspc_0/Z1 0.01fF +C589 divider_1/prescaler_0/tspc_2/Z3 divider_1/clk 0.45fF +C590 divbuf_3/OUT2 divbuf_3/OUT 0.06fF +C591 ro_complete_1/a3 ro_complete_1/cbank_1/v 0.05fF +C592 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z1 0.09fF +C593 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z2 0.19fF +C594 divbuf_6/OUT5 divbuf_6/OUT 43.38fF +C595 divbuf_11/a_492_n240# divbuf_11/OUT 0.00fF +C596 cp_0/a_1710_n2840# cp_0/upbar 0.29fF +C597 pd_1/R pd_1/REF 0.61fF +C598 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/a_492_n240# 0.01fF +C599 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF +C600 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF +C601 pll_full_0/ro_complete_0/a3 pll_full_0/divider_0/clk 0.11fF +C602 divider_1/tspc_1/Z3 divider_1/nor_0/B 0.38fF +C603 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Z4 0.65fF +C604 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_4/vin 0.20fF +C605 divider_2/mc2 divider_2/nor_0/B 0.06fF +C606 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/R 0.27fF +C607 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Q 0.04fF +C608 divbuf_20/a_492_n240# divbuf_20/IN 0.13fF +C609 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/z5 0.04fF +C610 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z1 0.09fF +C611 pd_0/DIV pd_0/tspc_r_0/Z2 0.19fF +C612 divbuf_22/OUT4 divbuf_22/OUT 1.11fF +C613 divider_0/prescaler_0/Out divider_0/tspc_2/Z2 0.11fF +C614 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF +C615 cp_0/upbar cp_0/down 0.02fF +C616 pd_1/tspc_r_1/Qbar1 pd_1/tspc_r_1/z5 0.20fF +C617 pll_full_0/pd_0/DIV pll_full_0/divider_0/clk 2.26fF +C618 divbuf_13/a_492_n240# divbuf_13/OUT5 0.01fF +C619 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF +C620 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF +C621 divider_1/nor_0/B divider_1/tspc_1/Q 0.51fF +C622 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z4 0.00fF +C623 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Q 0.21fF +C624 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/a1 0.14fF +C625 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/a3 0.09fF +C626 divider_2/tspc_0/Z2 divider_2/nor_0/B 0.20fF +C627 divider_1/and_0/B divider_1/and_0/Z1 0.07fF +C628 ro_complete_1/cbank_2/switch_5/vin ro_complete_1/cbank_2/v 1.30fF +C629 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF +C630 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF +C631 divbuf_17/OUT5 divbuf_17/OUT 43.38fF +C632 divider_2/nor_0/B divider_2/tspc_0/Z4 0.02fF +C633 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/nand_1/z1 0.01fF +C634 divider_2/prescaler_0/tspc_2/Z2 divider_2/clk 0.11fF +C635 divbuf_21/OUT2 divbuf_21/OUT3 1.37fF +C636 pd_0/R pd_0/tspc_r_1/Qbar 0.03fF +C637 pd_1/and_pd_0/Out1 pd_1/and_pd_0/Z1 0.18fF +C638 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C639 divbuf_24/OUT3 divbuf_24/OUT 0.26fF +C640 divbuf_24/OUT4 divbuf_24/OUT5 20.26fF +C641 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/Out 0.04fF +C642 divider_0/tspc_0/Z3 divider_0/tspc_0/Z1 0.06fF +C643 pll_full_0/divbuf_1/IN pll_full_0/divider_0/tspc_0/a_630_n680# 0.04fF +C644 divbuf_17/a_492_n240# divbuf_17/IN 0.13fF +C645 divider_1/tspc_0/Z1 divider_1/tspc_0/Z3 0.06fF +C646 divider_1/prescaler_0/tspc_1/Z4 divider_1/clk 0.12fF +C647 divbuf_3/IN divbuf_3/a_492_n240# 0.13fF +C648 divbuf_1/a_492_n240# divbuf_1/IN 0.13fF +C649 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/v 1.30fF +C650 divbuf_17/OUT4 divbuf_17/OUT 1.11fF +C651 divider_2/tspc_2/Q divider_2/tspc_1/Z3 0.45fF +C652 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z2 0.01fF +C653 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z4 0.36fF +C654 divbuf_6/a_492_n240# divbuf_6/OUT2 0.42fF +C655 divider_2/tspc_2/Z3 divider_2/tspc_2/Z4 0.65fF +C656 divbuf_7/OUT5 divbuf_7/OUT 43.38fF +C657 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF +C658 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Out1 0.05fF +C659 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/Out 0.21fF +C660 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF +C661 divbuf_23/a_492_n240# divbuf_23/OUT 0.00fF +C662 io_clamp_low[0] io_analog[4] 0.53fF +C663 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF +C664 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF +C665 divider_0/prescaler_0/tspc_2/Q divider_0/clk 0.05fF +C666 divider_1/nor_1/B divider_1/nor_0/B 0.47fF +C667 divider_1/tspc_1/Z1 divider_1/tspc_1/Z2 1.07fF +C668 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z1 0.08fF +C669 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z4 0.12fF +C670 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF +C671 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF +C672 divider_2/tspc_1/Q divider_2/tspc_0/Z3 0.45fF +C673 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/nor_0/A 0.03fF +C674 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/Z2 0.40fF +C675 divider_1/tspc_2/a_630_n680# divider_1/nor_0/A 0.35fF +C676 divider_1/prescaler_0/tspc_1/Q divider_1/clk 0.60fF +C677 divbuf_3/OUT4 divbuf_3/OUT5 20.26fF +C678 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF +C679 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z3 0.16fF +C680 divbuf_10/IN divbuf_10/OUT5 0.00fF +C681 divbuf_22/a_492_n240# divbuf_22/IN 0.13fF +C682 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT3 1.37fF +C683 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.00fF +C684 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF +C685 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF +C686 cp_0/a_1710_n2840# cp_0/out 0.61fF +C687 pd_1/DOWN pd_1/and_pd_0/Out1 0.12fF +C688 pd_1/REF pd_1/tspc_r_1/Qbar1 0.12fF +C689 divider_0/mc2 divider_0/and_0/OUT 0.05fF +C690 divider_0/tspc_0/Z3 divider_0/nor_1/B 0.38fF +C691 divbuf_9/OUT4 divbuf_9/OUT 1.11fF +C692 divider_0/and_0/out1 divider_0/and_0/B 0.18fF +C693 ro_complete_0/a2 ro_complete_0/cbank_0/switch_2/vin 0.14fF +C694 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a4 0.09fF +C695 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a5 0.09fF +C696 divider_1/mc2 divider_1/nor_0/A 0.04fF +C697 divider_1/tspc_0/Z1 divider_1/tspc_0/Z2 1.07fF +C698 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Q 0.04fF +C699 divbuf_1/OUT2 divbuf_1/OUT3 1.37fF +C700 divbuf_19/a_492_n240# divbuf_19/OUT2 0.42fF +C701 divbuf_17/OUT3 divbuf_17/OUT 0.26fF +C702 divbuf_4/OUT2 divbuf_4/OUT5 0.02fF +C703 divbuf_4/OUT3 divbuf_4/OUT4 5.16fF +C704 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/UP 0.03fF +C705 divbuf_8/OUT2 divbuf_8/OUT3 1.37fF +C706 divider_0/nor_0/B divider_0/tspc_2/a_630_n680# 0.01fF +C707 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Q 0.05fF +C708 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF +C709 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF +C710 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z2 0.19fF +C711 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/a_740_n680# 0.19fF +C712 divbuf_16/OUT divbuf_16/OUT3 0.26fF +C713 divider_1/prescaler_0/tspc_0/Z2 divider_1/clk 0.11fF +C714 divider_1/nor_1/B divider_1/and_0/B 0.29fF +C715 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_0/A 0.15fF +C716 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z3 0.45fF +C717 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF +C718 divider_2/mc2 divider_2/and_0/out1 0.06fF +C719 divbuf_5/OUT2 divbuf_5/OUT5 0.02fF +C720 divbuf_5/OUT3 divbuf_5/OUT4 5.16fF +C721 pll_full_0/pd_0/DIV pll_full_0/divbuf_1/OUT2 0.06fF +C722 divider_2/and_0/OUT divider_2/and_0/B 0.01fF +C723 divbuf_7/a_492_n240# divbuf_7/OUT2 0.42fF +C724 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF +C725 divbuf_12/OUT5 divbuf_12/OUT 43.38fF +C726 pd_0/R pd_0/and_pd_0/Z1 0.02fF +C727 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/z5 0.20fF +C728 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF +C729 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/Out 0.11fF +C730 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/Out 0.04fF +C731 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/Out 0.04fF +C732 divider_1/tspc_0/Z2 divider_1/tspc_0/Z3 0.16fF +C733 divider_1/prescaler_0/tspc_2/Z4 divider_1/clk 0.12fF +C734 ro_complete_1/a4 ro_complete_1/cbank_2/v 0.05fF +C735 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_0/vin 0.19fF +C736 divider_2/tspc_1/Z2 divider_2/nor_0/B 0.30fF +C737 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z4 0.12fF +C738 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/a_630_n680# 0.19fF +C739 divbuf_11/IN divbuf_11/OUT5 0.00fF +C740 pll_full_0/pd_0/DIV pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF +C741 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.06fF +C742 divbuf_9/a_492_n240# divbuf_9/IN 0.13fF +C743 pd_1/R pd_1/tspc_r_1/Qbar1 0.30fF +C744 pd_1/tspc_r_0/Z3 pd_1/tspc_r_0/Qbar1 0.38fF +C745 pd_0/and_pd_0/Out1 pd_0/and_pd_0/Z1 0.18fF +C746 divbuf_15/OUT3 divbuf_15/OUT4 5.16fF +C747 divider_1/tspc_0/Z4 divider_1/tspc_1/Q 0.15fF +C748 ro_complete_0/a0 ro_complete_0/cbank_2/switch_5/vin 0.09fF +C749 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.18fF +C750 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF +C751 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C752 divider_2/prescaler_0/tspc_0/Z3 divider_2/clk 0.64fF +C753 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z1 0.03fF +C754 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF +C755 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF +C756 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/z5 0.04fF +C757 pd_0/DIV pd_0/R 0.51fF +C758 pll_full_0/pd_0/R pll_full_0/pd_0/REF 0.61fF +C759 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT2 0.02fF +C760 divbuf_13/OUT2 divbuf_13/OUT3 1.37fF +C761 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C762 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF +C763 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z2 0.01fF +C764 divider_1/tspc_0/a_630_n680# divider_1/tspc_1/Q 0.01fF +C765 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Z4 0.65fF +C766 divbuf_2/OUT4 divbuf_2/OUT 1.11fF +C767 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/a1 0.14fF +C768 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF +C769 divider_2/nor_1/B divider_2/and_0/B 0.29fF +C770 divbuf_5/a_492_n240# divbuf_5/IN 0.13fF +C771 divider_2/prescaler_0/tspc_0/D divider_2/prescaler_0/nand_1/z1 0.21fF +C772 divider_2/nor_0/B divider_2/and_0/A 0.26fF +C773 divbuf_21/OUT2 divbuf_21/OUT5 0.02fF +C774 divbuf_21/OUT3 divbuf_21/OUT4 5.16fF +C775 pd_1/DIV pd_1/tspc_r_0/Qbar1 0.12fF +C776 pd_0/REF pd_0/tspc_r_1/Qbar1 0.12fF +C777 divbuf_12/a_492_n240# divbuf_12/OUT2 0.42fF +C778 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/Q 0.19fF +C779 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.01fF +C780 divbuf_24/OUT5 divbuf_24/OUT 43.38fF +C781 filter_0/a_4216_n2998# filter_0/v 0.31fF +C782 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF +C783 divider_1/tspc_0/Z4 divider_1/nor_1/B 0.22fF +C784 ro_complete_1/a5 ro_complete_1/cbank_2/switch_0/vin 0.09fF +C785 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF +C786 divbuf_17/OUT2 divbuf_17/OUT 0.06fF +C787 divbuf_17/IN divbuf_17/OUT5 0.00fF +C788 io_clamp_low[1] io_clamp_high[1] 0.53fF +C789 divider_0/tspc_1/Z1 divider_0/nor_0/B 0.03fF +C790 divider_0/tspc_1/Z3 divider_0/tspc_1/a_630_n680# 0.05fF +C791 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z4 0.08fF +C792 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF +C793 pd_1/DOWN pd_1/tspc_r_0/Z3 0.03fF +C794 divbuf_23/IN divbuf_23/OUT5 0.00fF +C795 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.04fF +C796 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF +C797 divbuf_15/OUT divbuf_15/OUT4 1.11fF +C798 divider_0/nor_0/A divider_0/tspc_2/Z2 0.23fF +C799 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.29fF +C800 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF +C801 pll_full_0/ro_complete_0/a4 pll_full_0/divider_0/clk 0.01fF +C802 divider_1/tspc_1/Z2 divider_1/tspc_1/Z3 0.16fF +C803 divider_1/nor_1/B divider_1/tspc_0/a_630_n680# 0.35fF +C804 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z3 0.11fF +C805 divbuf_2/OUT3 divbuf_2/OUT5 0.01fF +C806 divider_2/prescaler_0/Out divider_2/tspc_2/a_630_n680# 0.01fF +C807 divider_1/and_0/OUT divider_1/and_0/Z1 0.04fF +C808 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z2 0.01fF +C809 divider_1/prescaler_0/tspc_2/Q divider_1/clk 0.05fF +C810 divider_2/nor_0/B divider_2/tspc_1/Z4 0.21fF +C811 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z4 0.36fF +C812 divbuf_10/OUT2 divbuf_10/OUT 0.06fF +C813 divbuf_10/OUT3 divbuf_10/OUT5 0.01fF +C814 divider_0/nor_0/B divider_0/nor_1/B 0.47fF +C815 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF +C816 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF +C817 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF +C818 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF +C819 pd_1/tspc_r_1/Z3 pd_1/UP 0.03fF +C820 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT4 5.16fF +C821 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C822 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF +C823 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF +C824 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF +C825 divider_2/tspc_0/Z2 divider_2/tspc_0/Z1 1.07fF +C826 divider_2/nor_0/Z1 divider_2/and_0/A 0.80fF +C827 divider_1/and_0/out1 divider_1/and_0/B 0.18fF +C828 divbuf_4/OUT3 divbuf_4/OUT 0.26fF +C829 divbuf_4/OUT4 divbuf_4/OUT5 20.26fF +C830 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/A 0.01fF +C831 divider_2/tspc_0/Z1 divider_2/tspc_0/Z4 0.00fF +C832 pd_0/DOWN pd_0/UP 0.46fF +C833 pd_0/tspc_r_0/Z4 pd_0/tspc_r_0/z5 0.04fF +C834 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF +C835 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z2 0.19fF +C836 divbuf_8/OUT2 divbuf_8/OUT5 0.02fF +C837 divbuf_8/OUT3 divbuf_8/OUT4 5.16fF +C838 divbuf_15/a_492_n240# divbuf_15/OUT 0.00fF +C839 divider_0/tspc_1/Q divider_0/tspc_0/Z1 0.01fF +C840 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF +C841 divider_0/nor_0/B divider_0/nor_0/A 1.21fF +C842 divbuf_24/a_492_n240# divbuf_24/OUT2 0.42fF +C843 divbuf_15/OUT2 divbuf_15/OUT3 1.37fF +C844 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_0/vin 0.19fF +C845 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/nor_0/A 0.01fF +C846 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z4 0.12fF +C847 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z2 0.01fF +C848 divider_1/nor_0/B divider_1/tspc_2/a_630_n680# 0.01fF +C849 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Q 0.05fF +C850 divider_1/prescaler_0/Out divider_1/clk 0.51fF +C851 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/a0 0.13fF +C852 divbuf_5/OUT3 divbuf_5/OUT 0.26fF +C853 divbuf_5/OUT4 divbuf_5/OUT5 20.26fF +C854 pll_full_0/pd_0/DIV pll_full_0/divbuf_1/OUT4 1.11fF +C855 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z3 0.09fF +C856 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF +C857 divider_0/nor_1/B divider_0/and_0/B 0.29fF +C858 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF +C859 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C860 divider_1/mc2 divider_1/nor_0/B 0.06fF +C861 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z3 0.06fF +C862 divbuf_1/OUT5 divbuf_1/OUT 43.38fF +C863 divbuf_1/OUT2 divbuf_1/a_492_n240# 0.42fF +C864 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF +C865 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF +C866 divbuf_17/a_492_n240# divbuf_17/OUT5 0.01fF +C867 divider_2/tspc_1/Q divider_2/tspc_1/Z3 0.05fF +C868 divider_2/nor_1/B divider_2/tspc_0/a_630_n680# 0.35fF +C869 pll_full_0/divider_0/tspc_1/Z4 pll_full_0/divider_0/nor_0/A 0.02fF +C870 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_0/Z2 0.20fF +C871 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_1/Q 0.13fF +C872 ro_complete_1/a1 ro_complete_1/cbank_1/v 0.05fF +C873 divider_2/and_0/out1 divider_2/and_0/A 0.01fF +C874 divbuf_11/OUT2 divbuf_11/OUT 0.06fF +C875 divbuf_11/OUT3 divbuf_11/OUT5 0.01fF +C876 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF +C877 divider_0/tspc_1/a_630_n680# divider_0/nor_0/B 0.35fF +C878 divider_0/tspc_1/Q divider_0/nor_1/B 0.22fF +C879 divbuf_15/IN divbuf_15/a_492_n240# 0.13fF +C880 divbuf_25/OUT2 divbuf_25/a_492_n240# 0.42fF +C881 divbuf_15/OUT4 divbuf_15/OUT5 20.26fF +C882 divider_0/nor_0/A divider_0/and_0/B 0.08fF +C883 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF +C884 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_0/B 0.30fF +C885 pll_full_0/ro_complete_0/a1 pll_full_0/divider_0/clk 0.11fF +C886 divbuf_19/OUT5 divbuf_19/IN 0.00fF +C887 divider_1/tspc_2/Q divider_1/tspc_1/Z4 0.15fF +C888 ro_complete_0/a0 ro_complete_0/cbank_2/v 0.05fF +C889 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF +C890 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z3 0.38fF +C891 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF +C892 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z3 0.65fF +C893 divider_2/prescaler_0/tspc_0/Z4 divider_2/clk 0.12fF +C894 divbuf_20/a_492_n240# divbuf_20/OUT5 0.01fF +C895 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar1 0.30fF +C896 pd_1/DIV pd_1/tspc_r_0/Z1 0.17fF +C897 pd_0/tspc_r_0/Qbar1 pd_0/R 0.01fF +C898 pd_0/DOWN pd_0/tspc_r_0/Qbar 0.21fF +C899 pd_0/DIV pd_0/tspc_r_0/Z4 0.02fF +C900 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.05fF +C901 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT3 0.01fF +C902 divbuf_15/OUT2 divbuf_15/OUT 0.06fF +C903 divbuf_13/OUT2 divbuf_13/OUT5 0.02fF +C904 divbuf_13/OUT3 divbuf_13/OUT4 5.16fF +C905 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/Out 0.05fF +C906 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.04fF +C907 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF +C908 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF +C909 divider_1/tspc_2/Q divider_1/tspc_2/Z3 0.05fF +C910 divider_1/mc2 divider_1/and_0/B 0.20fF +C911 ro_complete_1/a4 ro_complete_1/cbank_2/switch_1/vin 0.09fF +C912 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/v 1.30fF +C913 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF +C914 divbuf_18/OUT2 divbuf_18/a_492_n240# 0.42fF +C915 divider_2/mc2 divider_2/nor_0/A 0.04fF +C916 divider_2/tspc_0/Z2 divider_2/tspc_0/Z3 0.16fF +C917 divbuf_18/OUT5 divbuf_18/a_492_n240# 0.01fF +C918 divider_2/prescaler_0/tspc_1/Q divider_2/nor_0/A 0.03fF +C919 divider_2/tspc_0/Z3 divider_2/tspc_0/Z4 0.65fF +C920 divbuf_21/OUT3 divbuf_21/OUT 0.26fF +C921 divbuf_21/OUT4 divbuf_21/OUT5 20.26fF +C922 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF +C923 pd_0/tspc_r_1/Z3 pd_0/UP 0.03fF +C924 divbuf_15/a_492_n240# divbuf_15/OUT5 0.01fF +C925 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/D 0.32fF +C926 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF +C927 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF +C928 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C929 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF +C930 divbuf_25/OUT2 divbuf_25/OUT5 0.02fF +C931 divbuf_25/OUT3 divbuf_25/OUT4 5.16fF +C932 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z2 0.01fF +C933 ro_complete_0/a4 ro_complete_0/cbank_2/switch_0/vin 0.12fF +C934 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_2/Q 0.19fF +C935 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/clk 0.01fF +C936 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z2 0.14fF +C937 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF +C938 divbuf_3/OUT2 divbuf_3/OUT3 1.37fF +C939 ro_complete_1/a3 ro_complete_1/cbank_2/switch_2/vin 0.09fF +C940 divbuf_6/a_492_n240# divbuf_6/OUT 0.00fF +C941 divider_0/tspc_1/Z3 divider_0/nor_0/B 0.38fF +C942 divider_0/tspc_1/Q divider_0/tspc_1/a_630_n680# 0.04fF +C943 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF +C944 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z4 0.12fF +C945 divbuf_23/OUT2 divbuf_23/OUT 0.06fF +C946 divbuf_23/OUT3 divbuf_23/OUT5 0.01fF +C947 divider_0/tspc_0/Z3 divider_0/tspc_1/Q 0.45fF +C948 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF +C949 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF +C950 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF +C951 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C952 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z4 0.28fF +C953 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a3 0.13fF +C954 ro_complete_0/a3 ro_complete_0/cbank_2/v 0.05fF +C955 divider_2/prescaler_0/Out divider_2/nor_0/A 0.15fF +C956 divider_1/nor_0/A divider_1/tspc_2/Z2 0.23fF +C957 divider_1/prescaler_0/tspc_0/D divider_1/clk 0.29fF +C958 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/clk 0.06fF +C959 divbuf_3/OUT3 divbuf_3/OUT 0.26fF +C960 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/v 1.30fF +C961 divbuf_10/OUT4 divbuf_10/OUT 1.11fF +C962 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 4.58fF +C963 divbuf_22/a_492_n240# divbuf_22/OUT5 0.01fF +C964 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF +C965 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF +C966 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF +C967 cp_0/a_10_n50# cp_0/vbias 0.19fF +C968 pd_1/R pd_1/and_pd_0/Out1 0.33fF +C969 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z1 0.09fF +C970 pd_1/REF pd_1/tspc_r_1/Z2 0.19fF +C971 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/a_740_n680# 0.33fF +C972 divider_1/nor_0/B divider_1/tspc_0/Z2 0.20fF +C973 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Q 0.91fF +C974 divider_1/prescaler_0/tspc_1/Z2 divider_1/and_0/OUT 0.06fF +C975 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z3 0.33fF +C976 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/v 1.30fF +C977 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF +C978 divbuf_4/OUT5 divbuf_4/OUT 43.38fF +C979 divbuf_8/OUT3 divbuf_8/OUT 0.26fF +C980 divbuf_8/OUT4 divbuf_8/OUT5 20.26fF +C981 pd_0/R pd_0/REF 0.61fF +C982 divider_0/tspc_0/Z4 divider_0/tspc_0/Z1 0.00fF +C983 divbuf_15/OUT2 divbuf_15/OUT5 0.02fF +C984 divbuf_14/OUT divbuf_14/OUT4 1.11fF +C985 divider_0/nor_0/Z1 divider_0/and_0/B 0.18fF +C986 divider_0/tspc_2/Q divider_0/tspc_2/a_630_n680# 0.04fF +C987 ro_complete_0/a3 ro_complete_0/cbank_1/switch_2/vin 0.09fF +C988 divider_1/nor_0/B divider_1/nor_0/A 1.21fF +C989 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_4/vin 0.20fF +C990 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF +C991 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF +C992 divbuf_5/OUT5 divbuf_5/OUT 43.38fF +C993 divider_2/nor_0/A divider_2/tspc_2/Z1 0.03fF +C994 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z3 0.05fF +C995 divbuf_7/a_492_n240# divbuf_7/OUT 0.00fF +C996 divider_0/tspc_1/Z3 divider_0/tspc_1/Q 0.05fF +C997 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z1 0.08fF +C998 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF +C999 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1000 divbuf_19/OUT4 divbuf_19/OUT5 20.26fF +C1001 divider_1/tspc_2/Q divider_1/tspc_1/Z1 0.01fF +C1002 divider_1/tspc_0/Z4 divider_1/tspc_0/Z1 0.00fF +C1003 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF +C1004 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z4 0.00fF +C1005 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF +C1006 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z1 0.01fF +C1007 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C1008 divider_2/tspc_1/Q divider_2/tspc_0/a_630_n680# 0.01fF +C1009 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_1/Q 0.21fF +C1010 divider_1/and_0/OUT divider_1/and_0/out1 0.31fF +C1011 ro_complete_1/a5 ro_complete_1/cbank_2/v 0.08fF +C1012 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/A 0.26fF +C1013 divbuf_10/a_492_n240# divbuf_10/IN 0.13fF +C1014 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/R 0.01fF +C1015 divbuf_11/OUT4 divbuf_11/OUT 1.11fF +C1016 divider_0/tspc_0/Z4 divider_0/nor_1/B 0.22fF +C1017 divbuf_9/a_492_n240# divbuf_9/OUT5 0.01fF +C1018 pd_1/R pd_1/tspc_r_1/Z2 0.21fF +C1019 divbuf_25/OUT2 divbuf_25/OUT 0.06fF +C1020 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C1021 divider_0/Out divider_0/tspc_0/a_630_n680# 0.04fF +C1022 divbuf_17/a_492_n240# divbuf_17/OUT2 0.42fF +C1023 divbuf_19/OUT5 divbuf_19/OUT 43.38fF +C1024 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z2 0.16fF +C1025 divider_1/tspc_1/a_630_n680# divider_1/nor_0/B 0.35fF +C1026 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C1027 divbuf_17/OUT4 divbuf_17/OUT5 20.26fF +C1028 divider_1/nor_0/A divider_1/and_0/B 0.08fF +C1029 divbuf_4/a_492_n240# divbuf_4/OUT2 0.42fF +C1030 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF +C1031 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z4 0.21fF +C1032 divider_2/tspc_1/Z2 divider_2/nor_0/A 0.15fF +C1033 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/D 0.03fF +C1034 divbuf_20/OUT2 divbuf_20/OUT3 1.37fF +C1035 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/z5 0.11fF +C1036 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Q 0.20fF +C1037 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF +C1038 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF +C1039 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT4 20.26fF +C1040 divbuf_13/OUT3 divbuf_13/OUT 0.26fF +C1041 divbuf_13/OUT4 divbuf_13/OUT5 20.26fF +C1042 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C1043 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a1 0.14fF +C1044 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF +C1045 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a3 0.09fF +C1046 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/nor_0/A 0.55fF +C1047 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z4 0.21fF +C1048 divider_1/tspc_0/Z4 divider_1/tspc_0/Z3 0.65fF +C1049 divider_1/prescaler_0/tspc_2/Z2 divider_1/and_0/OUT 0.05fF +C1050 ro_complete_1/a2 ro_complete_1/cbank_2/v 0.05fF +C1051 divbuf_5/a_492_n240# divbuf_5/OUT5 0.01fF +C1052 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF +C1053 divbuf_21/OUT5 divbuf_21/OUT 43.38fF +C1054 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF +C1055 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/Out 0.05fF +C1056 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z1 0.09fF +C1057 pd_0/REF pd_0/tspc_r_1/Z2 0.19fF +C1058 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF +C1059 divbuf_12/a_492_n240# divbuf_12/OUT 0.00fF +C1060 divbuf_14/OUT5 divbuf_14/OUT4 20.26fF +C1061 divider_0/nor_0/B divider_0/and_0/B 0.31fF +C1062 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/tspc_0/D 0.04fF +C1063 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF +C1064 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF +C1065 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF +C1066 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF +C1067 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z2 0.36fF +C1068 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF +C1069 divbuf_17/OUT3 divbuf_17/OUT5 0.01fF +C1070 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z3 0.05fF +C1071 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_0/D 0.32fF +C1072 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/clk 0.01fF +C1073 divbuf_3/OUT2 divbuf_3/OUT5 0.02fF +C1074 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/a0 0.09fF +C1075 divider_2/tspc_1/Z1 divider_2/tspc_1/Z2 1.07fF +C1076 divider_2/tspc_1/a_630_n680# divider_2/nor_0/B 0.35fF +C1077 divbuf_6/IN divbuf_6/OUT5 0.00fF +C1078 io_clamp_low[0] io_clamp_high[0] 0.53fF +C1079 divider_2/nor_0/A divider_2/and_0/A 0.01fF +C1080 divbuf_11/a_492_n240# divbuf_11/IN 0.13fF +C1081 divider_0/tspc_1/Q divider_0/nor_0/B 0.51fF +C1082 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF +C1083 pd_1/R pd_1/tspc_r_0/Z3 0.27fF +C1084 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT3 0.01fF +C1085 divbuf_23/OUT4 divbuf_23/OUT 1.11fF +C1086 divider_0/tspc_2/Q divider_0/tspc_1/Z1 0.01fF +C1087 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF +C1088 divider_0/tspc_0/Z3 divider_0/tspc_0/Z4 0.65fF +C1089 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF +C1090 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF +C1091 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF +C1092 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF +C1093 pll_full_0/ro_complete_0/a5 pll_full_0/divider_0/clk 0.15fF +C1094 divbuf_17/OUT3 divbuf_17/OUT4 5.16fF +C1095 divider_1/mc2 divider_1/and_0/OUT 0.05fF +C1096 divider_1/tspc_0/Z4 divider_1/tspc_0/Z2 0.36fF +C1097 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z2 1.07fF +C1098 divbuf_2/IN divbuf_2/a_492_n240# 0.13fF +C1099 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/clk 0.26fF +C1100 divider_2/prescaler_0/Out divider_2/tspc_2/Z2 0.11fF +C1101 divider_1/tspc_2/Z1 divider_1/tspc_2/Z3 0.06fF +C1102 divbuf_3/OUT5 divbuf_3/OUT 43.38fF +C1103 divider_2/prescaler_0/m1_2700_2190# divider_2/nor_0/A 0.01fF +C1104 pd_0/DIV pd_0/tspc_r_0/Z3 0.65fF +C1105 divbuf_22/OUT2 divbuf_22/OUT3 1.37fF +C1106 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF +C1107 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF +C1108 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C1109 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/a_740_n680# 0.08fF +C1110 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z2 0.01fF +C1111 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z4 0.08fF +C1112 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z3 0.05fF +C1113 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/D 0.09fF +C1114 pll_full_0/pd_0/DIV pll_full_0/divbuf_1/OUT5 43.38fF +C1115 divider_2/tspc_1/Z4 divider_2/nor_0/A 0.02fF +C1116 divbuf_21/a_492_n240# divbuf_21/OUT2 0.42fF +C1117 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF +C1118 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF +C1119 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z4 0.02fF +C1120 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z2 0.71fF +C1121 pd_1/DIV pd_1/R 0.51fF +C1122 pd_0/DOWN pd_0/tspc_r_1/Qbar 0.02fF +C1123 pd_0/R pd_0/tspc_r_1/Qbar1 0.30fF +C1124 divbuf_8/OUT5 divbuf_8/OUT 43.38fF +C1125 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF +C1126 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/a_492_n240# 0.01fF +C1127 divbuf_24/a_492_n240# divbuf_24/OUT 0.00fF +C1128 divider_0/tspc_2/Q divider_0/nor_0/A 0.55fF +C1129 ro_complete_0/a3 ro_complete_0/cbank_2/switch_1/vin 0.13fF +C1130 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1131 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF +C1132 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/clk 0.64fF +C1133 divider_2/mc2 divider_2/and_0/B 0.20fF +C1134 pll_full_0/pd_0/DIV pll_full_0/divbuf_1/a_492_n240# 0.00fF +C1135 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/tspc_r_0/Qbar1 0.01fF +C1136 divbuf_18/a_492_n240# divbuf_18/OUT 0.00fF +C1137 divider_2/tspc_2/Z1 divider_2/tspc_2/Z2 1.07fF +C1138 divider_2/nor_0/A divider_2/tspc_2/Z3 0.38fF +C1139 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z4 0.12fF +C1140 divbuf_7/IN divbuf_7/OUT5 0.00fF +C1141 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z3 0.11fF +C1142 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C1143 divbuf_23/a_492_n240# divbuf_23/IN 0.13fF +C1144 io_clamp_high[2] io_analog[6] 0.53fF +C1145 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF +C1146 divider_2/nor_1/B divider_2/tspc_1/Q 0.22fF +C1147 divider_1/tspc_2/Q divider_1/tspc_1/Z3 0.45fF +C1148 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z4 0.65fF +C1149 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z3 0.45fF +C1150 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1151 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C1152 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/divider_0/clk 1.46fF +C1153 ro_complete_0/a4 ro_complete_0/cbank_2/v 0.05fF +C1154 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF +C1155 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/Z2 1.07fF +C1156 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/D 0.05fF +C1157 ro_complete_1/a0 ro_complete_1/cbank_2/switch_4/vin 0.13fF +C1158 ro_complete_1/cbank_0/v ro_complete_1/cbank_1/v 1.27fF +C1159 divider_2/tspc_1/Z1 divider_2/tspc_1/Z4 0.00fF +C1160 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z2 0.01fF +C1161 divider_2/and_0/out1 divider_2/and_0/Z1 0.36fF +C1162 pll_full_0/pd_0/REF pll_full_0/divbuf_0/a_492_n240# 0.13fF +C1163 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF +C1164 cp_0/a_10_n50# cp_0/a_1710_0# 0.04fF +C1165 divbuf_14/OUT divbuf_14/OUT2 0.06fF +C1166 divider_0/tspc_2/Q divider_0/tspc_1/a_630_n680# 0.01fF +C1167 divbuf_9/OUT2 divbuf_9/OUT3 1.37fF +C1168 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF +C1169 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z2 0.36fF +C1170 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF +C1171 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF +C1172 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/divider_0/clk 1.27fF +C1173 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF +C1174 divbuf_17/OUT2 divbuf_17/OUT5 0.02fF +C1175 divider_2/and_0/OUT divider_2/prescaler_0/nand_0/z1 0.01fF +C1176 divbuf_20/OUT2 divbuf_20/OUT5 0.02fF +C1177 divbuf_20/OUT3 divbuf_20/OUT4 5.16fF +C1178 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z2 0.21fF +C1179 divbuf_8/a_492_n240# divbuf_8/OUT2 0.42fF +C1180 pd_0/DOWN pd_0/tspc_r_0/z5 0.03fF +C1181 pd_0/tspc_r_0/Z2 pd_0/R 0.21fF +C1182 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Q 0.04fF +C1183 divider_0/prescaler_0/Out divider_0/clk 0.51fF +C1184 pd_1/tspc_r_1/Z4 pd_1/tspc_r_1/z5 0.04fF +C1185 divbuf_13/OUT5 divbuf_13/OUT 43.38fF +C1186 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a1 0.14fF +C1187 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF +C1188 divider_1/tspc_1/Z2 divider_1/nor_0/A 0.15fF +C1189 divider_1/prescaler_0/Out divider_1/tspc_2/Z3 0.45fF +C1190 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Q 0.20fF +C1191 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/D 0.09fF +C1192 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/cbank_0/v 1.30fF +C1193 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF +C1194 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z1 0.06fF +C1195 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF +C1196 divider_2/and_0/OUT divider_2/clk 0.04fF +C1197 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Z1 0.06fF +C1198 divbuf_12/IN divbuf_12/OUT5 0.00fF +C1199 pd_0/DOWN pd_0/and_pd_0/Z1 0.07fF +C1200 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF +C1201 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C1202 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/nand_1/z1 0.01fF +C1203 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF +C1204 filter_0/a_4216_n5230# filter_0/v 0.19fF +C1205 ro_complete_0/a5 ro_complete_0/cbank_2/switch_0/vin 0.09fF +C1206 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/Out 0.21fF +C1207 divider_2/nor_0/Z1 divider_2/nor_0/B 0.06fF +C1208 divider_1/nor_0/B divider_1/and_0/B 0.31fF +C1209 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/tspc_0/D 0.04fF +C1210 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/nand_1/z1 0.22fF +C1211 divbuf_1/OUT divbuf_1/OUT3 0.26fF +C1212 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C1213 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/clk 0.45fF +C1214 divider_2/tspc_1/Z2 divider_2/tspc_1/Z3 0.16fF +C1215 divbuf_6/OUT2 divbuf_6/OUT 0.06fF +C1216 divbuf_6/OUT3 divbuf_6/OUT5 0.01fF +C1217 divider_0/tspc_0/Z4 divider_0/nor_0/B 0.02fF +C1218 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z4 0.36fF +C1219 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/Z3 0.20fF +C1220 divider_0/tspc_2/Q divider_0/tspc_1/Z3 0.45fF +C1221 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1222 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF +C1223 divbuf_17/OUT3 divbuf_17/OUT2 1.37fF +C1224 divider_1/tspc_1/Z2 divider_1/tspc_1/a_630_n680# 0.01fF +C1225 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z3 0.16fF +C1226 ro_complete_0/a1 ro_complete_0/cbank_2/v 0.05fF +C1227 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/nor_0/B 0.22fF +C1228 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/nor_1/B 0.38fF +C1229 divider_1/tspc_2/Z1 divider_1/tspc_2/Z4 0.00fF +C1230 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/D 0.15fF +C1231 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Qbar1 0.38fF +C1232 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar 0.02fF +C1233 divbuf_22/OUT2 divbuf_22/OUT5 0.02fF +C1234 divbuf_22/OUT3 divbuf_22/OUT4 5.16fF +C1235 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT 43.38fF +C1236 divbuf_14/OUT2 divbuf_14/OUT5 0.02fF +C1237 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF +C1238 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF +C1239 divbuf_13/a_492_n240# divbuf_13/OUT2 0.42fF +C1240 pd_1/UP pd_1/tspc_r_1/Qbar 0.21fF +C1241 pd_1/REF pd_1/tspc_r_1/Z4 0.02fF +C1242 divbuf_16/OUT5 divbuf_16/OUT4 20.26fF +C1243 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z2 1.07fF +C1244 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z4 0.12fF +C1245 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF +C1246 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF +C1247 divider_2/tspc_0/Z2 divider_2/tspc_0/a_630_n680# 0.01fF +C1248 divider_2/tspc_0/a_630_n680# divider_2/tspc_0/Z4 0.12fF +C1249 pd_1/DIV pd_1/tspc_r_0/Z4 0.02fF +C1250 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF +C1251 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF +C1252 divbuf_25/a_492_n240# divbuf_25/IN 0.13fF +C1253 divbuf_24/IN divbuf_24/OUT5 0.00fF +C1254 divider_0/mc2 divider_0/and_0/A 0.16fF +C1255 divbuf_1/OUT2 divbuf_1/OUT 0.06fF +C1256 ro_complete_0/a2 ro_complete_0/cbank_1/v 0.05fF +C1257 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/a0 0.13fF +C1258 divider_1/nor_0/Z1 divider_1/and_0/A 0.80fF +C1259 divider_1/prescaler_0/tspc_1/Z2 divider_1/clk 0.11fF +C1260 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF +C1261 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/clk 0.12fF +C1262 divbuf_18/IN divbuf_18/a_492_n240# 0.13fF +C1263 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z3 0.06fF +C1264 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/D 0.03fF +C1265 divider_2/tspc_2/Z2 divider_2/tspc_2/Z3 0.16fF +C1266 divider_2/nor_0/A divider_2/tspc_2/Z4 0.21fF +C1267 divbuf_7/OUT2 divbuf_7/OUT 0.06fF +C1268 divbuf_7/OUT3 divbuf_7/OUT5 0.01fF +C1269 divider_0/tspc_1/Q divider_0/tspc_0/Z4 0.15fF +C1270 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z4 0.28fF +C1271 pd_0/tspc_r_1/Z4 pd_0/tspc_r_1/z5 0.04fF +C1272 io_clamp_low[1] io_analog[5] 0.53fF +C1273 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF +C1274 divider_0/and_0/OUT divider_0/and_0/B 0.01fF +C1275 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF +C1276 divider_1/tspc_0/Z4 divider_1/nor_0/B 0.02fF +C1277 divbuf_2/OUT2 divbuf_2/OUT3 1.37fF +C1278 divbuf_1/OUT5 divbuf_1/OUT4 20.26fF +C1279 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.43fF +C1280 divbuf_19/OUT5 divbuf_19/OUT2 0.02fF +C1281 divbuf_19/OUT4 divbuf_19/OUT3 5.16fF +C1282 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/D 0.11fF +C1283 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/clk 0.45fF +C1284 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF +C1285 divider_2/tspc_1/Z3 divider_2/tspc_1/Z4 0.65fF +C1286 divbuf_10/a_492_n240# divbuf_10/OUT5 0.01fF +C1287 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/z5 0.03fF +C1288 divider_2/and_0/A divider_2/and_0/B 0.18fF +C1289 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Q 0.91fF +C1290 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C1291 divbuf_9/OUT2 divbuf_9/OUT5 0.02fF +C1292 divbuf_9/OUT3 divbuf_9/OUT4 5.16fF +C1293 divider_0/tspc_2/Q divider_0/nor_0/B 0.22fF +C1294 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF +C1295 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF +C1296 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF +C1297 divbuf_19/OUT5 divbuf_19/a_492_n240# 0.01fF +C1298 divbuf_25/IN divbuf_25/OUT5 0.00fF +C1299 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/switch_1/vin 0.19fF +C1300 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF +C1301 divider_1/tspc_1/Z1 divider_1/tspc_1/Z4 0.00fF +C1302 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF +C1303 divider_2/mc2 divider_2/and_0/OUT 0.05fF +C1304 divider_2/nor_1/Z1 divider_2/nor_0/B 0.18fF +C1305 divbuf_4/a_492_n240# divbuf_4/OUT 0.00fF +C1306 divbuf_19/OUT divbuf_19/OUT3 0.26fF +C1307 divider_2/nor_0/B divider_2/tspc_2/a_630_n680# 0.01fF +C1308 divider_2/prescaler_0/tspc_2/D divider_2/prescaler_0/nand_0/z1 0.24fF +C1309 divbuf_20/OUT3 divbuf_20/OUT 0.26fF +C1310 divbuf_20/OUT4 divbuf_20/OUT5 20.26fF +C1311 pd_0/tspc_r_0/Z2 pd_0/tspc_r_0/Z4 0.14fF +C1312 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF +C1313 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z3 0.65fF +C1314 pd_1/UP pd_1/and_pd_0/Z1 0.06fF +C1315 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/OUT3 1.37fF +C1316 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C1317 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C1318 ro_complete_0/a4 ro_complete_0/cbank_2/switch_1/vin 0.09fF +C1319 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF +C1320 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/nor_0/A 0.15fF +C1321 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF +C1322 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C1323 divider_1/prescaler_0/Out divider_1/tspc_2/Z4 0.12fF +C1324 divider_1/nor_1/B divider_1/Out 0.22fF +C1325 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Q 0.04fF +C1326 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/switch_5/vin 0.20fF +C1327 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF +C1328 divider_2/prescaler_0/tspc_2/D divider_2/clk 0.26fF +C1329 pd_1/tspc_r_0/Z2 pd_1/R 0.21fF +C1330 pd_0/R pd_0/and_pd_0/Out1 0.33fF +C1331 pd_0/UP pd_0/tspc_r_1/Qbar 0.21fF +C1332 pd_0/REF pd_0/tspc_r_1/Z4 0.02fF +C1333 divbuf_12/OUT2 divbuf_12/OUT 0.06fF +C1334 divbuf_12/OUT3 divbuf_12/OUT5 0.01fF +C1335 divbuf_25/a_492_n240# divbuf_25/OUT5 0.01fF +C1336 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_1/z1 0.21fF +C1337 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z3 0.33fF +C1338 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1339 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/clk 0.12fF +C1340 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/nand_1/z1 0.01fF +C1341 divider_1/prescaler_0/tspc_2/Z2 divider_1/clk 0.11fF +C1342 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/v 1.30fF +C1343 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z1 0.17fF +C1344 divbuf_6/OUT4 divbuf_6/OUT 1.11fF +C1345 divbuf_11/a_492_n240# divbuf_11/OUT5 0.01fF +C1346 pd_1/DOWN pd_1/UP 0.46fF +C1347 pd_1/tspc_r_0/z5 pd_1/tspc_r_0/Qbar1 0.20fF +C1348 divbuf_25/OUT2 divbuf_25/OUT3 1.37fF +C1349 divider_2/nor_1/B divider_2/mc2 0.15fF +C1350 divider_1/tspc_1/Z2 divider_1/nor_0/B 0.30fF +C1351 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z4 0.36fF +C1352 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF +C1353 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/A 0.35fF +C1354 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/clk 0.60fF +C1355 divider_1/tspc_2/Z3 divider_1/tspc_2/Z4 0.65fF +C1356 ro_complete_1/a0 ro_complete_1/cbank_2/switch_5/vin 0.09fF +C1357 pll_full_0/pd_0/DIV pll_full_0/pd_0/R 0.51fF +C1358 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/D 0.05fF +C1359 divbuf_22/OUT3 divbuf_22/OUT 0.26fF +C1360 divbuf_22/OUT4 divbuf_22/OUT5 20.26fF +C1361 pd_0/tspc_r_0/Qbar1 pd_0/DOWN 0.11fF +C1362 pd_0/DIV pd_0/tspc_r_0/Z1 0.17fF +C1363 divbuf_14/OUT2 divbuf_14/a_492_n240# 0.42fF +C1364 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF +C1365 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/z5 0.11fF +C1366 ro_complete_0/a4 ro_complete_0/cbank_1/switch_1/vin 0.09fF +C1367 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF +C1368 divider_2/nor_1/B divider_2/tspc_0/Z2 0.40fF +C1369 divbuf_16/OUT divbuf_16/OUT4 1.11fF +C1370 divider_1/prescaler_0/m1_2700_2190# divider_1/nor_0/A 0.01fF +C1371 divider_1/tspc_2/Q divider_1/tspc_2/a_630_n680# 0.04fF +C1372 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF +C1373 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z3 0.16fF +C1374 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C1375 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF +C1376 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF +C1377 divbuf_1/OUT divbuf_1/a_492_n240# 0.00fF +C1378 divider_2/nor_1/B divider_2/tspc_0/Z4 0.22fF +C1379 divbuf_21/a_492_n240# divbuf_21/OUT 0.00fF +C1380 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/z5 0.03fF +C1381 pd_0/R pd_0/tspc_r_1/Z2 0.21fF +C1382 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C1383 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z3 0.05fF +C1384 divbuf_24/OUT2 divbuf_24/OUT 0.06fF +C1385 divbuf_24/OUT3 divbuf_24/OUT5 0.01fF +C1386 divider_1/nor_1/Z1 divider_1/nor_1/B 0.06fF +C1387 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF +C1388 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/a_630_n680# 0.05fF +C1389 ro_complete_1/a4 ro_complete_1/cbank_1/v 0.05fF +C1390 divider_2/tspc_2/Q divider_2/tspc_1/Z2 0.14fF +C1391 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z4 0.00fF +C1392 divbuf_6/a_492_n240# divbuf_6/IN 0.13fF +C1393 divider_2/tspc_2/Z2 divider_2/tspc_2/Z4 0.36fF +C1394 divbuf_7/OUT4 divbuf_7/OUT 1.11fF +C1395 divbuf_23/a_492_n240# divbuf_23/OUT5 0.01fF +C1396 pd_1/DOWN pd_1/tspc_r_0/z5 0.03fF +C1397 pd_0/UP pd_0/and_pd_0/Z1 0.06fF +C1398 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z3 0.33fF +C1399 divbuf_16/OUT5 divbuf_16/OUT2 0.02fF +C1400 divider_1/tspc_0/Z4 divider_1/tspc_0/a_630_n680# 0.12fF +C1401 divbuf_2/OUT2 divbuf_2/OUT5 0.02fF +C1402 ro_complete_0/a5 ro_complete_0/cbank_2/v 0.08fF +C1403 ro_complete_0/a0 ro_complete_0/cbank_1/switch_5/vin 0.09fF +C1404 divider_1/and_0/OUT divider_1/and_0/B 0.01fF +C1405 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/Z1 0.03fF +C1406 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/clk 0.12fF +C1407 divbuf_3/OUT3 divbuf_3/OUT5 0.01fF +C1408 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/DOWN 0.03fF +C1409 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z3 0.06fF +C1410 divbuf_10/OUT2 divbuf_10/OUT3 1.37fF +C1411 divbuf_25/a_492_n240# divbuf_25/OUT 0.00fF +C1412 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF +C1413 divbuf_9/OUT3 divbuf_9/OUT 0.26fF +C1414 divbuf_9/OUT4 divbuf_9/OUT5 20.26fF +C1415 pd_1/tspc_r_0/Z4 pd_1/tspc_r_1/Z4 0.02fF +C1416 pd_1/REF pd_1/tspc_r_1/Z3 0.65fF +C1417 divider_0/and_0/out1 divider_0/and_0/A 0.01fF +C1418 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF +C1419 divbuf_0/OUT3 divbuf_0/OUT4 5.16fF +C1420 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF +C1421 divider_1/tspc_1/Z3 divider_1/tspc_1/Z4 0.65fF +C1422 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/a_630_n680# 0.19fF +C1423 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF +C1424 divbuf_18/OUT2 divbuf_18/OUT3 1.37fF +C1425 divbuf_4/IN divbuf_4/OUT5 0.00fF +C1426 ro_complete_1/cbank_1/v ro_complete_1/cbank_2/v 1.36fF +C1427 divbuf_18/OUT3 divbuf_18/OUT5 0.01fF +C1428 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/Q 0.04fF +C1429 divider_2/prescaler_0/tspc_1/Z3 divider_2/clk 0.45fF +C1430 divider_2/nor_0/B divider_2/nor_0/A 1.21fF +C1431 divbuf_20/OUT5 divbuf_20/OUT 43.38fF +C1432 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF +C1433 divbuf_8/a_492_n240# divbuf_8/OUT 0.00fF +C1434 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.03fF +C1435 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.45fF +C1436 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z1 0.08fF +C1437 ro_complete_1/a5 ro_complete_1/cbank_1/switch_0/vin 0.09fF +C1438 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/v 1.30fF +C1439 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z2 0.11fF +C1440 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C1441 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/divider_0/clk 1.36fF +C1442 divider_2/prescaler_0/tspc_0/Z2 divider_2/and_0/OUT 0.06fF +C1443 divbuf_5/IN divbuf_5/OUT5 0.00fF +C1444 divbuf_7/a_492_n240# divbuf_7/IN 0.13fF +C1445 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF +C1446 divider_0/prescaler_0/Out divider_0/prescaler_0/m1_2700_2190# 0.11fF +C1447 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF +C1448 divbuf_12/OUT4 divbuf_12/OUT 1.11fF +C1449 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z4 0.14fF +C1450 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/z5 0.11fF +C1451 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF +C1452 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C1453 divbuf_25/OUT divbuf_25/OUT5 43.38fF +C1454 divider_0/prescaler_0/tspc_1/Q divider_0/nor_0/A 0.03fF +C1455 divider_0/nor_1/B divider_0/tspc_0/Z2 0.40fF +C1456 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_1/Q 0.45fF +C1457 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF +C1458 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z4 0.08fF +C1459 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z3 0.05fF +C1460 ro_complete_1/a2 ro_complete_1/cbank_0/switch_3/vin 0.09fF +C1461 divider_1/prescaler_0/tspc_0/D divider_1/prescaler_0/nand_1/z1 0.21fF +C1462 ro_complete_1/cbank_1/switch_2/vin ro_complete_1/cbank_1/v 1.30fF +C1463 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z2 0.25fF +C1464 divider_2/tspc_1/Z1 divider_2/nor_0/B 0.03fF +C1465 divider_2/tspc_2/Q divider_2/tspc_1/Z4 0.15fF +C1466 divider_2/prescaler_0/m1_2700_2190# divider_2/and_0/OUT 0.14fF +C1467 divbuf_11/OUT2 divbuf_11/OUT3 1.37fF +C1468 pd_1/R pd_1/tspc_r_1/Z3 0.29fF +C1469 divider_0/mc2 divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF +C1470 divider_0/nor_1/Z1 divider_0/nor_0/B 0.18fF +C1471 divbuf_14/OUT4 divbuf_14/OUT3 5.16fF +C1472 divbuf_0/OUT divbuf_0/OUT3 0.26fF +C1473 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C1474 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/A 0.80fF +C1475 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/divider_0/clk 1.46fF +C1476 divbuf_2/OUT5 divbuf_2/a_492_n240# 0.01fF +C1477 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/v 1.30fF +C1478 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF +C1479 ro_complete_1/a0 ro_complete_1/cbank_2/v 0.05fF +C1480 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF +C1481 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF +C1482 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/clk 0.05fF +C1483 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z4 0.02fF +C1484 divbuf_18/OUT4 divbuf_18/OUT3 5.16fF +C1485 divider_2/tspc_2/Q divider_2/tspc_2/Z3 0.05fF +C1486 divider_2/prescaler_0/tspc_2/Z4 divider_2/prescaler_0/tspc_2/D 0.11fF +C1487 divbuf_20/a_492_n240# divbuf_20/OUT2 0.42fF +C1488 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z2 0.25fF +C1489 divbuf_22/OUT5 divbuf_22/OUT 43.38fF +C1490 divider_0/tspc_1/Z2 divider_0/nor_0/A 0.15fF +C1491 divider_0/prescaler_0/Out divider_0/tspc_2/Z3 0.45fF +C1492 divbuf_13/a_492_n240# divbuf_13/OUT 0.00fF +C1493 pd_1/UP pd_1/tspc_r_1/z5 0.03fF +C1494 divbuf_14/OUT divbuf_14/OUT5 43.38fF +C1495 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF +C1496 divider_2/tspc_1/Q divider_2/tspc_0/Z2 0.14fF +C1497 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.00fF +C1498 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF +C1499 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF +C1500 divbuf_16/OUT2 divbuf_16/a_492_n240# 0.42fF +C1501 divider_1/tspc_2/Q divider_1/nor_0/A 0.55fF +C1502 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z4 0.36fF +C1503 divbuf_2/OUT3 divbuf_2/OUT 0.26fF +C1504 divider_2/tspc_1/Q divider_2/tspc_0/Z4 0.15fF +C1505 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF +C1506 divider_2/prescaler_0/tspc_2/Z3 divider_2/clk 0.45fF +C1507 divbuf_21/IN divbuf_21/OUT5 0.00fF +C1508 pd_1/DIV pd_1/tspc_r_0/Z3 0.65fF +C1509 pd_0/REF pd_0/tspc_r_1/Z3 0.65fF +C1510 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z4 0.14fF +C1511 divbuf_12/a_492_n240# divbuf_12/IN 0.13fF +C1512 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/a_492_n240# 0.42fF +C1513 divbuf_24/OUT4 divbuf_24/OUT 1.11fF +C1514 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z4 0.12fF +C1515 divider_0/tspc_0/Z3 divider_0/tspc_0/Z2 0.16fF +C1516 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.14fF +C1517 divider_0/nor_1/Z1 divider_0/and_0/B 0.78fF +C1518 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C1519 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF +C1520 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF +C1521 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/clk 0.01fF +C1522 divbuf_3/OUT2 divbuf_3/a_492_n240# 0.42fF +C1523 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z3 0.05fF +C1524 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Z4 0.65fF +C1525 divider_0/tspc_1/Z2 divider_0/tspc_1/a_630_n680# 0.01fF +C1526 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1527 divbuf_23/OUT2 divbuf_23/OUT3 1.37fF +C1528 io_clamp_high[0] io_analog[4] 0.53fF +C1529 divbuf_15/OUT divbuf_15/OUT3 0.26fF +C1530 divider_0/nor_0/A divider_0/tspc_2/Z1 0.03fF +C1531 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF +C1532 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z4 0.08fF +C1533 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF +C1534 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF +C1535 divbuf_16/OUT divbuf_16/OUT2 0.06fF +C1536 divider_1/tspc_2/Q divider_1/tspc_1/a_630_n680# 0.01fF +C1537 divider_1/tspc_1/Z1 divider_1/tspc_1/Z3 0.06fF +C1538 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z2 0.19fF +C1539 divbuf_2/OUT3 divbuf_2/OUT4 5.16fF +C1540 ro_complete_0/a0 ro_complete_0/cbank_1/v 0.05fF +C1541 divbuf_3/a_492_n240# divbuf_3/OUT 0.00fF +C1542 ro_complete_1/a3 ro_complete_1/cbank_2/v 0.05fF +C1543 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z4 0.00fF +C1544 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Q 0.21fF +C1545 divbuf_10/OUT2 divbuf_10/OUT5 0.02fF +C1546 divbuf_10/OUT3 divbuf_10/OUT4 5.16fF +C1547 pll_full_0/pd_0/DOWN pll_full_0/pd_0/REF 1.48fF +C1548 divbuf_19/OUT2 divbuf_19/OUT3 1.37fF +C1549 divider_2/and_0/B divider_2/and_0/Z1 0.07fF +C1550 divbuf_22/a_492_n240# divbuf_22/OUT2 0.42fF +C1551 pd_1/tspc_r_0/z5 pd_1/tspc_r_1/z5 0.02fF +C1552 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Qbar1 0.38fF +C1553 divbuf_9/OUT5 divbuf_9/OUT 43.38fF +C1554 divider_0/Out divider_0/nor_1/B 0.22fF +C1555 divbuf_0/OUT3 divbuf_0/OUT5 0.01fF +C1556 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF +C1557 ro_complete_1/a4 ro_complete_1/cbank_1/switch_1/vin 0.09fF +C1558 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.45fF +C1559 divider_1/and_0/out1 divider_1/and_0/A 0.01fF +C1560 divider_1/tspc_0/Z3 divider_1/Out 0.05fF +C1561 divbuf_4/OUT2 divbuf_4/OUT 0.06fF +C1562 divbuf_4/OUT3 divbuf_4/OUT5 0.01fF +C1563 divider_2/prescaler_0/tspc_1/Z4 divider_2/clk 0.12fF +C1564 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF +C1565 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF +C1566 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/UP 0.11fF +C1567 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z1 0.17fF +C1568 divbuf_8/IN divbuf_8/OUT5 0.00fF +C1569 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/D 0.03fF +C1570 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Z1 0.02fF +C1571 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT4 5.16fF +C1572 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C1573 divbuf_24/a_492_n240# divbuf_24/IN 0.13fF +C1574 ro_complete_0/a2 ro_complete_0/cbank_2/switch_2/vin 0.14fF +C1575 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF +C1576 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/clk 0.01fF +C1577 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z3 0.11fF +C1578 divider_1/prescaler_0/tspc_0/Z3 divider_1/clk 0.64fF +C1579 ro_complete_1/a3 ro_complete_1/cbank_1/switch_2/vin 0.09fF +C1580 divbuf_5/OUT2 divbuf_5/OUT 0.06fF +C1581 divbuf_5/OUT3 divbuf_5/OUT5 0.01fF +C1582 pll_full_0/pd_0/DIV pll_full_0/divbuf_1/OUT3 0.26fF +C1583 divider_2/tspc_2/a_630_n680# divider_2/nor_0/A 0.35fF +C1584 divider_2/prescaler_0/tspc_1/Q divider_2/clk 0.60fF +C1585 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF +C1586 pd_0/UP pd_0/tspc_r_1/z5 0.03fF +C1587 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF +C1588 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z2 1.07fF +C1589 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z4 0.12fF +C1590 ro_complete_1/a2 ro_complete_1/cbank_2/switch_3/vin 0.09fF +C1591 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/v 1.30fF +C1592 ro_complete_0/a3 ro_complete_0/cbank_1/v 0.05fF +C1593 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z4 0.65fF +C1594 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C1595 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C1596 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF +C1597 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/clk 0.01fF +C1598 divider_1/prescaler_0/tspc_1/Q divider_1/nor_0/A 0.03fF +C1599 divbuf_1/OUT4 divbuf_1/OUT3 5.16fF +C1600 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/switch_5/vin 0.20fF +C1601 divider_2/tspc_1/Z3 divider_2/nor_0/B 0.38fF +C1602 divider_2/tspc_0/Z1 divider_2/tspc_0/Z3 0.06fF +C1603 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_2/D 0.16fF +C1604 divbuf_11/OUT2 divbuf_11/OUT5 0.02fF +C1605 divbuf_11/OUT3 divbuf_11/OUT4 5.16fF +C1606 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF +C1607 pd_1/DOWN pd_1/tspc_r_1/Qbar 0.02fF +C1608 pd_1/R pd_1/UP 0.45fF +C1609 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z4 0.01fF +C1610 divbuf_9/a_492_n240# divbuf_9/OUT2 0.42fF +C1611 divbuf_15/OUT3 divbuf_15/OUT5 0.01fF +C1612 divider_0/nor_0/A divider_0/and_0/A 0.01fF +C1613 divbuf_0/OUT divbuf_0/OUT4 1.11fF +C1614 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF +C1615 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C1616 divider_0/tspc_0/Z3 divider_0/Out 0.05fF +C1617 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/nor_0/B 0.03fF +C1618 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/a_630_n680# 0.05fF +C1619 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF +C1620 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF +C1621 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF +C1622 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z2 0.23fF +C1623 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/clk 0.29fF +C1624 divider_2/prescaler_0/Out divider_2/clk 0.51fF +C1625 divbuf_16/OUT4 divbuf_16/OUT3 5.16fF +C1626 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/z5 0.11fF +C1627 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z3 0.29fF +C1628 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/Qbar 0.01fF +C1629 pd_0/tspc_r_0/Z3 pd_0/R 0.27fF +C1630 pll_full_0/divbuf_0/OUT pll_full_0/divbuf_0/OUT2 0.06fF +C1631 divider_0/prescaler_0/m1_2700_2190# divider_0/nor_0/A 0.01fF +C1632 divider_0/prescaler_0/Out divider_0/tspc_2/Z4 0.12fF +C1633 cp_0/a_1710_0# cp_0/out 0.84fF +C1634 pd_1/tspc_r_1/Z2 pd_1/tspc_r_1/Z4 0.14fF +C1635 divbuf_14/OUT divbuf_14/a_492_n240# 0.00fF +C1636 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF +C1637 divbuf_13/IN divbuf_13/OUT5 0.00fF +C1638 divider_1/mc2 divider_1/and_0/A 0.16fF +C1639 divider_1/prescaler_0/Out divider_1/tspc_2/a_630_n680# 0.01fF +C1640 divbuf_2/OUT5 divbuf_2/OUT 43.38fF +C1641 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF +C1642 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF +C1643 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_1/B 0.47fF +C1644 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF +C1645 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF +C1646 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF +C1647 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF +C1648 divbuf_5/a_492_n240# divbuf_5/OUT2 0.42fF +C1649 divbuf_18/OUT3 divbuf_18/OUT 0.26fF +C1650 divider_2/nor_0/B divider_2/and_0/B 0.31fF +C1651 divider_2/tspc_0/Z3 divider_2/Out 0.05fF +C1652 divider_2/prescaler_0/tspc_2/Z4 divider_2/clk 0.12fF +C1653 divbuf_21/OUT2 divbuf_21/OUT 0.06fF +C1654 divbuf_21/OUT3 divbuf_21/OUT5 0.01fF Xpd_0 vssa1 vssa1 pd_0/REF pd_0/DIV pd_0/UP pd_0/DOWN pd_0/R pd Xpd_1 VDD vssa1 pd_1/REF pd_1/DIV pd_1/UP pd_1/DOWN pd_1/R pd Xcp_0 cp_0/vbias vssa1 gnd cp_0/out cp_0/down cp_0/upbar cp @@ -1891,1183 +1891,1184 @@ C1718 vssd2 gnd 38.54fF C1719 vssd1 gnd 13.04fF C1720 vdda2 gnd 38.30fF -C1721 io_oeb[20] gnd 0.61fF -C1722 io_out[20] gnd 0.61fF -C1723 io_in[20] gnd 0.61fF -C1724 io_in_3v3[20] gnd 0.61fF -C1725 gpio_noesd[13] gnd 2.31fF -C1726 gpio_analog[13] gnd 2.30fF -C1727 gpio_analog[0] gnd 0.61fF -C1728 gpio_noesd[0] gnd 0.61fF -C1729 io_in_3v3[7] gnd 0.61fF -C1730 io_in[7] gnd 0.61fF -C1731 io_out[7] gnd 0.61fF -C1732 io_oeb[7] gnd 0.61fF -C1733 io_oeb[19] gnd 0.61fF -C1734 io_out[19] gnd 0.61fF -C1735 io_in[19] gnd 0.61fF -C1736 io_in_3v3[19] gnd 0.61fF -C1737 gpio_noesd[12] gnd 2.32fF -C1738 gpio_analog[12] gnd 2.30fF -C1739 gpio_analog[1] gnd 0.61fF -C1740 gpio_noesd[1] gnd 0.61fF -C1741 io_in_3v3[8] gnd 0.61fF -C1742 io_in[8] gnd 0.61fF -C1743 io_out[8] gnd 0.61fF -C1744 io_oeb[8] gnd 0.61fF -C1745 io_oeb[18] gnd 0.61fF -C1746 io_out[18] gnd 0.61fF -C1747 io_in[18] gnd 0.61fF -C1748 io_in_3v3[18] gnd 0.61fF -C1749 gpio_noesd[11] gnd 2.30fF -C1750 gpio_analog[11] gnd 2.29fF -C1751 gpio_analog[2] gnd 0.61fF -C1752 gpio_noesd[2] gnd 0.61fF -C1753 io_in_3v3[9] gnd 0.61fF -C1754 io_in[9] gnd 0.61fF -C1755 io_out[9] gnd 0.61fF -C1756 io_oeb[9] gnd 0.61fF -C1757 io_oeb[17] gnd 0.61fF -C1758 io_out[17] gnd 0.61fF -C1759 io_in[17] gnd 0.61fF -C1760 io_in_3v3[17] gnd 0.61fF -C1761 gpio_noesd[10] gnd 2.31fF -C1762 gpio_analog[10] gnd 2.29fF -C1763 gpio_analog[3] gnd 0.61fF -C1764 gpio_noesd[3] gnd 0.61fF -C1765 io_in_3v3[10] gnd 0.61fF -C1766 io_in[10] gnd 0.61fF -C1767 io_out[10] gnd 0.61fF -C1768 io_oeb[10] gnd 0.61fF -C1769 io_oeb[16] gnd 0.61fF -C1770 io_out[16] gnd 0.61fF -C1771 io_in[16] gnd 0.61fF -C1772 io_in_3v3[16] gnd 0.61fF -C1773 gpio_noesd[9] gnd 2.28fF -C1774 gpio_analog[9] gnd 2.28fF -C1775 gpio_analog[4] gnd 0.61fF -C1776 gpio_noesd[4] gnd 0.61fF -C1777 io_in_3v3[11] gnd 0.61fF -C1778 io_in[11] gnd 0.61fF -C1779 io_out[11] gnd 0.61fF -C1780 io_oeb[11] gnd 0.61fF -C1781 io_oeb[15] gnd 0.61fF -C1782 io_out[15] gnd 0.61fF -C1783 io_in[15] gnd 0.61fF -C1784 io_in_3v3[15] gnd 0.61fF -C1785 gpio_noesd[8] gnd 2.28fF -C1786 gpio_analog[8] gnd 2.26fF -C1787 gpio_analog[5] gnd 0.61fF -C1788 gpio_noesd[5] gnd 0.61fF -C1789 io_in_3v3[12] gnd 0.61fF -C1790 io_in[12] gnd 0.61fF -C1791 io_out[12] gnd 0.61fF -C1792 io_oeb[12] gnd 0.61fF -C1793 io_oeb[14] gnd 0.61fF -C1794 io_out[14] gnd 0.61fF -C1795 io_in[14] gnd 0.61fF -C1796 io_in_3v3[14] gnd 0.61fF -C1797 gpio_noesd[7] gnd 2.30fF -C1798 gpio_analog[7] gnd 2.28fF -C1799 vssa2 gnd 38.35fF -C1800 gpio_analog[6] gnd 5.71fF -C1801 gpio_noesd[6] gnd 5.70fF -C1802 io_in_3v3[13] gnd 0.61fF -C1803 io_in[13] gnd 0.61fF -C1804 io_out[13] gnd 0.61fF -C1805 io_oeb[13] gnd 0.61fF -C1806 vccd1 gnd 39.84fF -C1807 vccd2 gnd 38.46fF -C1808 io_analog[0] gnd 19.99fF -C1809 io_analog[10] gnd 19.36fF -C1810 io_analog[1] gnd 13.17fF -C1811 io_analog[2] gnd 12.57fF -C1812 io_analog[3] gnd 12.83fF -C1813 io_clamp_high[0] gnd 3.58fF -C1814 io_clamp_low[0] gnd 3.58fF -C1815 io_clamp_high[1] gnd 3.58fF -C1816 io_clamp_low[1] gnd 3.58fF -C1817 io_clamp_high[2] gnd 3.58fF -C1818 io_clamp_low[2] gnd 3.58fF -C1819 io_analog[7] gnd 12.74fF -C1820 io_analog[8] gnd 13.08fF -C1821 io_analog[9] gnd 13.08fF -C1822 user_irq[2] gnd 0.63fF -C1823 user_irq[1] gnd 0.63fF -C1824 user_irq[0] gnd 0.63fF -C1825 user_clock2 gnd 0.63fF -C1826 la_oenb[127] gnd 0.63fF -C1827 la_data_out[127] gnd 0.63fF -C1828 la_data_in[127] gnd 0.63fF -C1829 la_oenb[126] gnd 0.63fF -C1830 la_data_out[126] gnd 0.63fF -C1831 la_data_in[126] gnd 0.63fF -C1832 la_oenb[125] gnd 0.63fF -C1833 la_data_out[125] gnd 0.63fF -C1834 la_data_in[125] gnd 0.63fF -C1835 la_oenb[124] gnd 0.63fF -C1836 la_data_out[124] gnd 0.63fF -C1837 la_data_in[124] gnd 0.63fF -C1838 la_oenb[123] gnd 0.63fF -C1839 la_data_out[123] gnd 0.63fF -C1840 la_data_in[123] gnd 0.63fF -C1841 la_oenb[122] gnd 0.63fF -C1842 la_data_out[122] gnd 0.63fF -C1843 la_data_in[122] gnd 0.63fF -C1844 la_oenb[121] gnd 0.63fF -C1845 la_data_out[121] gnd 0.63fF -C1846 la_data_in[121] gnd 0.63fF -C1847 la_oenb[120] gnd 0.63fF -C1848 la_data_out[120] gnd 0.63fF -C1849 la_data_in[120] gnd 0.63fF -C1850 la_oenb[119] gnd 0.63fF -C1851 la_data_out[119] gnd 0.63fF -C1852 la_data_in[119] gnd 0.63fF -C1853 la_oenb[118] gnd 0.63fF -C1854 la_data_out[118] gnd 0.63fF -C1855 la_data_in[118] gnd 0.63fF -C1856 la_oenb[117] gnd 0.63fF -C1857 la_data_out[117] gnd 0.63fF -C1858 la_data_in[117] gnd 0.63fF -C1859 la_oenb[116] gnd 0.63fF -C1860 la_data_out[116] gnd 0.63fF -C1861 la_data_in[116] gnd 0.63fF -C1862 la_oenb[115] gnd 0.63fF -C1863 la_data_out[115] gnd 0.63fF -C1864 la_data_in[115] gnd 0.63fF -C1865 la_oenb[114] gnd 0.63fF -C1866 la_data_out[114] gnd 0.63fF -C1867 la_data_in[114] gnd 0.63fF -C1868 la_oenb[113] gnd 0.63fF -C1869 la_data_out[113] gnd 0.63fF -C1870 la_data_in[113] gnd 0.63fF -C1871 la_oenb[112] gnd 0.63fF -C1872 la_data_out[112] gnd 0.63fF -C1873 la_data_in[112] gnd 0.63fF -C1874 la_oenb[111] gnd 0.63fF -C1875 la_data_out[111] gnd 0.63fF -C1876 la_data_in[111] gnd 0.63fF -C1877 la_oenb[110] gnd 0.63fF -C1878 la_data_out[110] gnd 0.63fF -C1879 la_data_in[110] gnd 0.63fF -C1880 la_oenb[109] gnd 0.63fF -C1881 la_data_out[109] gnd 0.63fF -C1882 la_data_in[109] gnd 0.63fF -C1883 la_oenb[108] gnd 0.63fF -C1884 la_data_out[108] gnd 0.63fF -C1885 la_data_in[108] gnd 0.63fF -C1886 la_oenb[107] gnd 0.63fF -C1887 la_data_out[107] gnd 0.63fF -C1888 la_data_in[107] gnd 0.63fF -C1889 la_oenb[106] gnd 0.63fF -C1890 la_data_out[106] gnd 0.63fF -C1891 la_data_in[106] gnd 0.63fF -C1892 la_oenb[105] gnd 0.63fF -C1893 la_data_out[105] gnd 0.63fF -C1894 la_data_in[105] gnd 0.63fF -C1895 la_oenb[104] gnd 0.63fF -C1896 la_data_out[104] gnd 0.63fF -C1897 la_data_in[104] gnd 0.63fF -C1898 la_oenb[103] gnd 0.63fF -C1899 la_data_out[103] gnd 0.63fF -C1900 la_data_in[103] gnd 0.63fF -C1901 la_oenb[102] gnd 0.63fF -C1902 la_data_out[102] gnd 0.63fF -C1903 la_data_in[102] gnd 0.63fF -C1904 la_oenb[101] gnd 0.63fF -C1905 la_data_out[101] gnd 0.63fF -C1906 la_data_in[101] gnd 0.63fF -C1907 la_oenb[100] gnd 0.63fF -C1908 la_data_out[100] gnd 0.63fF -C1909 la_data_in[100] gnd 0.63fF -C1910 la_oenb[99] gnd 0.63fF -C1911 la_data_out[99] gnd 0.63fF -C1912 la_data_in[99] gnd 0.63fF -C1913 la_oenb[98] gnd 0.63fF -C1914 la_data_out[98] gnd 0.63fF -C1915 la_data_in[98] gnd 0.63fF -C1916 la_oenb[97] gnd 0.63fF -C1917 la_data_out[97] gnd 0.63fF -C1918 la_data_in[97] gnd 0.63fF -C1919 la_oenb[96] gnd 0.63fF -C1920 la_data_out[96] gnd 0.63fF -C1921 la_data_in[96] gnd 0.63fF -C1922 la_oenb[95] gnd 0.63fF -C1923 la_data_out[95] gnd 0.63fF -C1924 la_data_in[95] gnd 0.63fF -C1925 la_oenb[94] gnd 0.63fF -C1926 la_data_out[94] gnd 0.63fF -C1927 la_data_in[94] gnd 0.63fF -C1928 la_oenb[93] gnd 0.63fF -C1929 la_data_out[93] gnd 0.63fF -C1930 la_data_in[93] gnd 0.63fF -C1931 la_oenb[92] gnd 0.63fF -C1932 la_data_out[92] gnd 0.63fF -C1933 la_data_in[92] gnd 0.63fF -C1934 la_oenb[91] gnd 0.63fF -C1935 la_data_out[91] gnd 0.63fF -C1936 la_data_in[91] gnd 0.63fF -C1937 la_oenb[90] gnd 0.63fF -C1938 la_data_out[90] gnd 0.63fF -C1939 la_data_in[90] gnd 0.63fF -C1940 la_oenb[89] gnd 0.63fF -C1941 la_data_out[89] gnd 0.63fF -C1942 la_data_in[89] gnd 0.63fF -C1943 la_oenb[88] gnd 0.63fF -C1944 la_data_out[88] gnd 0.63fF -C1945 la_data_in[88] gnd 0.63fF -C1946 la_oenb[87] gnd 0.63fF -C1947 la_data_out[87] gnd 0.63fF -C1948 la_data_in[87] gnd 0.63fF -C1949 la_oenb[86] gnd 0.63fF -C1950 la_data_out[86] gnd 0.63fF -C1951 la_data_in[86] gnd 0.63fF -C1952 la_oenb[85] gnd 0.63fF -C1953 la_data_out[85] gnd 0.63fF -C1954 la_data_in[85] gnd 0.63fF -C1955 la_oenb[84] gnd 0.63fF -C1956 la_data_out[84] gnd 0.63fF -C1957 la_data_in[84] gnd 0.63fF -C1958 la_oenb[83] gnd 0.63fF -C1959 la_data_out[83] gnd 0.63fF -C1960 la_data_in[83] gnd 0.63fF -C1961 la_oenb[82] gnd 0.63fF -C1962 la_data_out[82] gnd 0.63fF -C1963 la_data_in[82] gnd 0.63fF -C1964 la_oenb[81] gnd 0.63fF -C1965 la_data_out[81] gnd 0.63fF -C1966 la_data_in[81] gnd 0.63fF -C1967 la_oenb[80] gnd 0.63fF -C1968 la_data_out[80] gnd 0.63fF -C1969 la_data_in[80] gnd 0.63fF -C1970 la_oenb[79] gnd 0.63fF -C1971 la_data_out[79] gnd 0.63fF -C1972 la_data_in[79] gnd 0.63fF -C1973 la_oenb[78] gnd 0.63fF -C1974 la_data_out[78] gnd 0.63fF -C1975 la_data_in[78] gnd 0.63fF -C1976 la_oenb[77] gnd 0.63fF -C1977 la_data_out[77] gnd 0.63fF -C1978 la_data_in[77] gnd 0.63fF -C1979 la_oenb[76] gnd 0.63fF -C1980 la_data_out[76] gnd 0.63fF -C1981 la_data_in[76] gnd 0.63fF -C1982 la_oenb[75] gnd 0.63fF -C1983 la_data_out[75] gnd 0.63fF -C1984 la_data_in[75] gnd 0.63fF -C1985 la_oenb[74] gnd 0.63fF -C1986 la_data_out[74] gnd 0.63fF -C1987 la_data_in[74] gnd 0.63fF -C1988 la_oenb[73] gnd 0.63fF -C1989 la_data_out[73] gnd 0.63fF -C1990 la_data_in[73] gnd 0.63fF -C1991 la_oenb[72] gnd 0.63fF -C1992 la_data_out[72] gnd 0.63fF -C1993 la_data_in[72] gnd 0.63fF -C1994 la_oenb[71] gnd 0.63fF -C1995 la_data_out[71] gnd 0.63fF -C1996 la_data_in[71] gnd 0.63fF -C1997 la_oenb[70] gnd 0.63fF -C1998 la_data_out[70] gnd 0.63fF -C1999 la_data_in[70] gnd 0.63fF -C2000 la_oenb[69] gnd 0.63fF -C2001 la_data_out[69] gnd 0.63fF -C2002 la_data_in[69] gnd 0.63fF -C2003 la_oenb[68] gnd 0.63fF -C2004 la_data_out[68] gnd 0.63fF -C2005 la_data_in[68] gnd 0.63fF -C2006 la_oenb[67] gnd 0.63fF -C2007 la_data_out[67] gnd 0.63fF -C2008 la_data_in[67] gnd 0.63fF -C2009 la_oenb[66] gnd 0.63fF -C2010 la_data_out[66] gnd 0.63fF -C2011 la_data_in[66] gnd 0.63fF -C2012 la_oenb[65] gnd 0.63fF -C2013 la_data_out[65] gnd 0.63fF -C2014 la_data_in[65] gnd 0.63fF -C2015 la_oenb[64] gnd 0.63fF -C2016 la_data_out[64] gnd 0.63fF -C2017 la_data_in[64] gnd 0.63fF -C2018 la_oenb[63] gnd 0.63fF -C2019 la_data_out[63] gnd 0.63fF -C2020 la_data_in[63] gnd 0.63fF -C2021 la_oenb[62] gnd 0.63fF -C2022 la_data_out[62] gnd 0.63fF -C2023 la_data_in[62] gnd 0.63fF -C2024 la_oenb[61] gnd 0.63fF -C2025 la_data_out[61] gnd 0.63fF -C2026 la_data_in[61] gnd 0.63fF -C2027 la_oenb[60] gnd 0.63fF -C2028 la_data_out[60] gnd 0.63fF -C2029 la_data_in[60] gnd 0.63fF -C2030 la_oenb[59] gnd 0.63fF -C2031 la_data_out[59] gnd 0.63fF -C2032 la_data_in[59] gnd 0.63fF -C2033 la_oenb[58] gnd 0.63fF -C2034 la_data_out[58] gnd 0.63fF -C2035 la_data_in[58] gnd 0.63fF -C2036 la_oenb[57] gnd 0.63fF -C2037 la_data_out[57] gnd 0.63fF -C2038 la_data_in[57] gnd 0.63fF -C2039 la_oenb[56] gnd 0.63fF -C2040 la_data_out[56] gnd 0.63fF -C2041 la_data_in[56] gnd 0.63fF -C2042 la_oenb[55] gnd 0.63fF -C2043 la_data_out[55] gnd 0.63fF -C2044 la_data_in[55] gnd 0.63fF -C2045 la_oenb[54] gnd 0.63fF -C2046 la_data_out[54] gnd 0.63fF -C2047 la_data_in[54] gnd 0.63fF -C2048 la_oenb[53] gnd 0.63fF -C2049 la_data_out[53] gnd 0.63fF -C2050 la_data_in[53] gnd 0.63fF -C2051 la_oenb[52] gnd 0.63fF -C2052 la_data_out[52] gnd 0.63fF -C2053 la_data_in[52] gnd 0.63fF -C2054 la_oenb[51] gnd 0.63fF -C2055 la_data_out[51] gnd 0.63fF -C2056 la_data_in[51] gnd 0.63fF -C2057 la_oenb[50] gnd 0.63fF -C2058 la_data_out[50] gnd 0.63fF -C2059 la_data_in[50] gnd 0.63fF -C2060 la_oenb[49] gnd 0.63fF -C2061 la_data_out[49] gnd 0.63fF -C2062 la_data_in[49] gnd 0.63fF -C2063 la_oenb[48] gnd 0.63fF -C2064 la_data_out[48] gnd 0.63fF -C2065 la_data_in[48] gnd 0.63fF -C2066 la_oenb[47] gnd 0.63fF -C2067 la_data_out[47] gnd 0.63fF -C2068 la_data_in[47] gnd 0.63fF -C2069 la_oenb[46] gnd 0.63fF -C2070 la_data_out[46] gnd 0.63fF -C2071 la_data_in[46] gnd 0.63fF -C2072 la_oenb[45] gnd 0.63fF -C2073 la_data_out[45] gnd 0.63fF -C2074 la_data_in[45] gnd 0.63fF -C2075 la_oenb[44] gnd 0.63fF -C2076 la_data_out[44] gnd 0.63fF -C2077 la_data_in[44] gnd 0.63fF -C2078 la_oenb[43] gnd 0.63fF -C2079 la_data_out[43] gnd 0.63fF -C2080 la_data_in[43] gnd 0.63fF -C2081 la_oenb[42] gnd 0.63fF -C2082 la_data_out[42] gnd 0.63fF -C2083 la_data_in[42] gnd 0.63fF -C2084 la_oenb[41] gnd 0.63fF -C2085 la_data_out[41] gnd 0.63fF -C2086 la_data_in[41] gnd 0.63fF -C2087 la_oenb[40] gnd 0.63fF -C2088 la_data_out[40] gnd 0.63fF -C2089 la_data_in[40] gnd 0.63fF -C2090 la_oenb[39] gnd 0.63fF -C2091 la_data_out[39] gnd 0.63fF -C2092 la_data_in[39] gnd 0.63fF -C2093 la_oenb[38] gnd 0.63fF -C2094 la_data_out[38] gnd 0.63fF -C2095 la_data_in[38] gnd 0.63fF -C2096 la_oenb[37] gnd 0.63fF -C2097 la_data_out[37] gnd 0.63fF -C2098 la_data_in[37] gnd 0.63fF -C2099 la_oenb[36] gnd 0.63fF -C2100 la_data_out[36] gnd 0.63fF -C2101 la_data_in[36] gnd 0.63fF -C2102 la_oenb[35] gnd 0.63fF -C2103 la_data_out[35] gnd 0.63fF -C2104 la_data_in[35] gnd 0.63fF -C2105 la_oenb[34] gnd 0.63fF -C2106 la_data_out[34] gnd 0.63fF -C2107 la_data_in[34] gnd 0.63fF -C2108 la_oenb[33] gnd 0.63fF -C2109 la_data_out[33] gnd 0.63fF -C2110 la_data_in[33] gnd 0.63fF -C2111 la_oenb[32] gnd 0.63fF -C2112 la_data_out[32] gnd 0.63fF -C2113 la_data_in[32] gnd 0.63fF -C2114 la_oenb[31] gnd 0.63fF -C2115 la_data_out[31] gnd 0.63fF -C2116 la_data_in[31] gnd 0.63fF -C2117 la_oenb[30] gnd 0.63fF -C2118 la_data_out[30] gnd 0.63fF -C2119 la_data_in[30] gnd 0.63fF -C2120 la_oenb[29] gnd 0.63fF -C2121 la_data_out[29] gnd 0.63fF -C2122 la_data_in[29] gnd 0.63fF -C2123 la_oenb[28] gnd 0.63fF -C2124 la_data_out[28] gnd 0.63fF -C2125 la_data_in[28] gnd 0.63fF -C2126 la_oenb[27] gnd 0.63fF -C2127 la_data_out[27] gnd 0.63fF -C2128 la_data_in[27] gnd 0.63fF -C2129 la_oenb[26] gnd 0.63fF -C2130 la_data_out[26] gnd 0.63fF -C2131 la_data_in[26] gnd 0.63fF -C2132 la_oenb[25] gnd 0.63fF -C2133 la_data_out[25] gnd 0.63fF -C2134 la_data_in[25] gnd 0.63fF -C2135 la_oenb[24] gnd 0.63fF -C2136 la_data_out[24] gnd 0.63fF -C2137 la_data_in[24] gnd 0.63fF -C2138 la_oenb[23] gnd 0.63fF -C2139 la_data_out[23] gnd 0.63fF -C2140 la_data_in[23] gnd 0.63fF -C2141 la_oenb[22] gnd 0.63fF -C2142 la_data_out[22] gnd 0.63fF -C2143 la_data_in[22] gnd 0.63fF -C2144 la_oenb[21] gnd 0.63fF -C2145 la_data_out[21] gnd 0.63fF -C2146 la_data_in[21] gnd 0.63fF -C2147 la_oenb[20] gnd 0.63fF -C2148 la_data_out[20] gnd 0.63fF -C2149 la_data_in[20] gnd 0.63fF -C2150 la_oenb[19] gnd 0.63fF -C2151 la_data_out[19] gnd 0.63fF -C2152 la_data_in[19] gnd 0.63fF -C2153 la_oenb[18] gnd 0.63fF -C2154 la_data_out[18] gnd 0.63fF -C2155 la_data_in[18] gnd 0.63fF -C2156 la_oenb[17] gnd 0.63fF -C2157 la_data_out[17] gnd 0.63fF -C2158 la_data_in[17] gnd 0.63fF -C2159 la_oenb[16] gnd 0.63fF -C2160 la_data_out[16] gnd 0.63fF -C2161 la_data_in[16] gnd 0.63fF -C2162 la_oenb[15] gnd 0.63fF -C2163 la_data_out[15] gnd 0.63fF -C2164 la_data_in[15] gnd 0.63fF -C2165 la_oenb[14] gnd 0.63fF -C2166 la_data_out[14] gnd 0.63fF -C2167 la_data_in[14] gnd 0.63fF -C2168 la_oenb[13] gnd 0.63fF -C2169 la_data_out[13] gnd 0.63fF -C2170 la_data_in[13] gnd 0.63fF -C2171 la_oenb[12] gnd 0.63fF -C2172 la_data_out[12] gnd 0.63fF -C2173 la_data_in[12] gnd 0.63fF -C2174 la_oenb[11] gnd 0.63fF -C2175 la_data_out[11] gnd 0.63fF -C2176 la_data_in[11] gnd 0.63fF -C2177 la_oenb[10] gnd 0.63fF -C2178 la_data_out[10] gnd 0.63fF -C2179 la_data_in[10] gnd 0.63fF -C2180 la_oenb[9] gnd 0.63fF -C2181 la_data_out[9] gnd 0.63fF -C2182 la_data_in[9] gnd 0.63fF -C2183 la_oenb[8] gnd 0.63fF -C2184 la_data_out[8] gnd 0.63fF -C2185 la_data_in[8] gnd 0.63fF -C2186 la_oenb[7] gnd 0.63fF -C2187 la_data_out[7] gnd 0.63fF -C2188 la_data_in[7] gnd 0.63fF -C2189 la_oenb[6] gnd 0.63fF -C2190 la_data_out[6] gnd 0.63fF -C2191 la_data_in[6] gnd 0.63fF -C2192 la_oenb[5] gnd 0.63fF -C2193 la_data_out[5] gnd 0.63fF -C2194 la_data_in[5] gnd 0.63fF -C2195 la_oenb[4] gnd 0.63fF -C2196 la_data_out[4] gnd 0.63fF -C2197 la_data_in[4] gnd 0.63fF -C2198 la_oenb[3] gnd 0.63fF -C2199 la_data_out[3] gnd 0.63fF -C2200 la_data_in[3] gnd 0.63fF -C2201 la_oenb[2] gnd 0.63fF -C2202 la_data_out[2] gnd 0.63fF -C2203 la_data_in[2] gnd 0.63fF -C2204 la_oenb[1] gnd 0.63fF -C2205 la_data_out[1] gnd 0.63fF -C2206 la_data_in[1] gnd 0.63fF -C2207 la_oenb[0] gnd 0.63fF -C2208 la_data_out[0] gnd 0.63fF -C2209 la_data_in[0] gnd 0.63fF -C2210 wbs_dat_o[31] gnd 0.63fF -C2211 wbs_dat_i[31] gnd 0.63fF -C2212 wbs_adr_i[31] gnd 0.63fF -C2213 wbs_dat_o[30] gnd 0.63fF -C2214 wbs_dat_i[30] gnd 0.63fF -C2215 wbs_adr_i[30] gnd 0.63fF -C2216 wbs_dat_o[29] gnd 0.63fF -C2217 wbs_dat_i[29] gnd 0.63fF -C2218 wbs_adr_i[29] gnd 0.63fF -C2219 wbs_dat_o[28] gnd 0.63fF -C2220 wbs_dat_i[28] gnd 0.63fF -C2221 wbs_adr_i[28] gnd 0.63fF -C2222 wbs_dat_o[27] gnd 0.63fF -C2223 wbs_dat_i[27] gnd 0.63fF -C2224 wbs_adr_i[27] gnd 0.63fF -C2225 wbs_dat_o[26] gnd 0.63fF -C2226 wbs_dat_i[26] gnd 0.63fF -C2227 wbs_adr_i[26] gnd 0.63fF -C2228 wbs_dat_o[25] gnd 0.63fF -C2229 wbs_dat_i[25] gnd 0.63fF -C2230 wbs_adr_i[25] gnd 0.63fF -C2231 wbs_dat_o[24] gnd 0.63fF -C2232 wbs_dat_i[24] gnd 0.63fF -C2233 wbs_adr_i[24] gnd 0.63fF -C2234 wbs_dat_o[23] gnd 0.63fF -C2235 wbs_dat_i[23] gnd 0.63fF -C2236 wbs_adr_i[23] gnd 0.63fF -C2237 wbs_dat_o[22] gnd 0.63fF -C2238 wbs_dat_i[22] gnd 0.63fF -C2239 wbs_adr_i[22] gnd 0.63fF -C2240 wbs_dat_o[21] gnd 0.63fF -C2241 wbs_dat_i[21] gnd 0.63fF -C2242 wbs_adr_i[21] gnd 0.63fF -C2243 wbs_dat_o[20] gnd 0.63fF -C2244 wbs_dat_i[20] gnd 0.63fF -C2245 wbs_adr_i[20] gnd 0.63fF -C2246 wbs_dat_o[19] gnd 0.63fF -C2247 wbs_dat_i[19] gnd 0.63fF -C2248 wbs_adr_i[19] gnd 0.63fF -C2249 wbs_dat_o[18] gnd 0.63fF -C2250 wbs_dat_i[18] gnd 0.63fF -C2251 wbs_adr_i[18] gnd 0.63fF -C2252 wbs_dat_o[17] gnd 0.63fF -C2253 wbs_dat_i[17] gnd 0.63fF -C2254 wbs_adr_i[17] gnd 0.63fF -C2255 wbs_dat_o[16] gnd 0.63fF -C2256 wbs_dat_i[16] gnd 0.63fF -C2257 wbs_adr_i[16] gnd 0.63fF -C2258 wbs_dat_o[15] gnd 0.63fF -C2259 wbs_dat_i[15] gnd 0.63fF -C2260 wbs_adr_i[15] gnd 0.63fF -C2261 wbs_dat_o[14] gnd 0.63fF -C2262 wbs_dat_i[14] gnd 0.63fF -C2263 wbs_adr_i[14] gnd 0.63fF -C2264 wbs_dat_o[13] gnd 0.63fF -C2265 wbs_dat_i[13] gnd 0.63fF -C2266 wbs_adr_i[13] gnd 0.63fF -C2267 wbs_dat_o[12] gnd 0.63fF -C2268 wbs_dat_i[12] gnd 0.63fF -C2269 wbs_adr_i[12] gnd 0.63fF -C2270 wbs_dat_o[11] gnd 0.63fF -C2271 wbs_dat_i[11] gnd 0.63fF -C2272 wbs_adr_i[11] gnd 0.63fF -C2273 wbs_dat_o[10] gnd 0.63fF -C2274 wbs_dat_i[10] gnd 0.63fF -C2275 wbs_adr_i[10] gnd 0.63fF -C2276 wbs_dat_o[9] gnd 0.63fF -C2277 wbs_dat_i[9] gnd 0.63fF -C2278 wbs_adr_i[9] gnd 0.63fF -C2279 wbs_dat_o[8] gnd 0.63fF -C2280 wbs_dat_i[8] gnd 0.63fF -C2281 wbs_adr_i[8] gnd 0.63fF -C2282 wbs_dat_o[7] gnd 0.63fF -C2283 wbs_dat_i[7] gnd 0.63fF -C2284 wbs_adr_i[7] gnd 0.63fF -C2285 wbs_dat_o[6] gnd 0.63fF -C2286 wbs_dat_i[6] gnd 0.63fF -C2287 wbs_adr_i[6] gnd 0.63fF -C2288 wbs_dat_o[5] gnd 0.63fF -C2289 wbs_dat_i[5] gnd 0.63fF -C2290 wbs_adr_i[5] gnd 0.63fF -C2291 wbs_dat_o[4] gnd 0.63fF -C2292 wbs_dat_i[4] gnd 0.63fF -C2293 wbs_adr_i[4] gnd 0.63fF -C2294 wbs_sel_i[3] gnd 0.63fF -C2295 wbs_dat_o[3] gnd 0.63fF -C2296 wbs_dat_i[3] gnd 0.63fF -C2297 wbs_adr_i[3] gnd 0.63fF -C2298 wbs_sel_i[2] gnd 0.63fF -C2299 wbs_dat_o[2] gnd 0.63fF -C2300 wbs_dat_i[2] gnd 0.63fF -C2301 wbs_adr_i[2] gnd 0.63fF -C2302 wbs_sel_i[1] gnd 0.63fF -C2303 wbs_dat_o[1] gnd 0.63fF -C2304 wbs_dat_i[1] gnd 0.63fF -C2305 wbs_adr_i[1] gnd 0.63fF -C2306 wbs_sel_i[0] gnd 0.63fF -C2307 wbs_dat_o[0] gnd 0.63fF -C2308 wbs_dat_i[0] gnd 0.63fF -C2309 wbs_adr_i[0] gnd 0.63fF -C2310 wbs_we_i gnd 0.63fF -C2311 wbs_stb_i gnd 0.63fF -C2312 wbs_cyc_i gnd 0.63fF -C2313 wbs_ack_o gnd 0.63fF -C2314 wb_rst_i gnd 0.63fF -C2315 wb_clk_i gnd 0.63fF -C2316 m2_494098_659718# gnd 0.80fF **FLOATING -C2317 pll_full_0/divider_0/and_0/Z1 gnd 0.65fF -C2318 pll_full_0/divider_0/and_0/B gnd 2.45fF -C2319 pll_full_0/divider_0/and_0/A gnd 2.35fF -C2320 pll_full_0/divider_0/and_0/out1 gnd 2.99fF -C2321 pll_full_0/divider_0/tspc_2/Z4 gnd 0.86fF -C2322 pll_full_0/divider_0/tspc_2/Z3 gnd 2.26fF -C2323 pll_full_0/divider_0/tspc_2/Z2 gnd 1.46fF -C2324 pll_full_0/divider_0/tspc_2/Z1 gnd 0.99fF -C2325 pll_full_0/divider_0/nor_0/A gnd 7.08fF -C2326 pll_full_0/divider_0/tspc_2/a_630_n680# gnd 1.15fF **FLOATING -C2327 pll_full_0/divider_0/tspc_1/Z4 gnd 0.86fF -C2328 pll_full_0/divider_0/tspc_1/Z3 gnd 2.26fF -C2329 pll_full_0/divider_0/tspc_1/Z2 gnd 1.46fF -C2330 pll_full_0/divider_0/tspc_1/Z1 gnd 0.99fF -C2331 pll_full_0/divider_0/nor_0/B gnd 7.12fF -C2332 pll_full_0/divider_0/tspc_1/a_630_n680# gnd 1.15fF **FLOATING -C2333 pll_full_0/divider_0/tspc_2/Q gnd 3.14fF -C2334 pll_full_0/divider_0/tspc_0/Z4 gnd 0.86fF -C2335 pll_full_0/divbuf_0/IN gnd 9.89fF -C2336 pll_full_0/divider_0/tspc_0/Z3 gnd 2.26fF -C2337 pll_full_0/divider_0/tspc_0/Z2 gnd 1.46fF -C2338 pll_full_0/divider_0/tspc_0/Z1 gnd 0.99fF -C2339 pll_full_0/divider_0/nor_1/B gnd 6.48fF -C2340 pll_full_0/divider_0/tspc_0/a_630_n680# gnd 1.14fF **FLOATING -C2341 pll_full_0/divider_0/tspc_1/Q gnd 3.12fF -C2342 pll_full_0/divider_0/clk gnd 33.42fF -C2343 pll_full_0/divider_0/prescaler_0/nand_1/z1 gnd 0.36fF -C2344 pll_full_0/divider_0/prescaler_0/tspc_0/D gnd 2.64fF -C2345 pll_full_0/divider_0/prescaler_0/tspc_2/Q gnd 3.72fF -C2346 pll_full_0/divider_0/prescaler_0/tspc_1/Q gnd 3.61fF -C2347 pll_full_0/divider_0/prescaler_0/nand_0/z1 gnd 0.36fF -C2348 pll_full_0/divider_0/prescaler_0/tspc_2/D gnd 3.12fF -C2349 pll_full_0/divider_0/and_0/OUT gnd 5.67fF -C2350 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 gnd 0.86fF -C2351 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 gnd 2.26fF -C2352 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 gnd 1.19fF -C2353 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 gnd 0.99fF -C2354 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# gnd 1.47fF **FLOATING -C2355 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# gnd 2.11fF **FLOATING -C2356 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 gnd 0.86fF -C2357 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 gnd 2.26fF -C2358 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 gnd 1.48fF -C2359 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 gnd 0.99fF -C2360 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# gnd 1.14fF **FLOATING -C2361 pll_full_0/divider_0/prescaler_0/m1_2700_2190# gnd 4.22fF **FLOATING -C2362 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 gnd 0.86fF -C2363 pll_full_0/divider_0/prescaler_0/Out gnd 4.59fF -C2364 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 gnd 2.26fF -C2365 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 gnd 1.46fF -C2366 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 gnd 0.99fF -C2367 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# gnd 1.16fF **FLOATING -C2368 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# gnd 2.11fF **FLOATING -C2369 pll_full_0/divider_0/nor_1/Z1 gnd 1.34fF -C2370 pll_full_0/divider_0/nor_0/Z1 gnd 1.34fF -C2371 pll_full_0/divbuf_1/OUT gnd 363.82fF +C1721 vdda1 gnd 134.24fF +C1722 io_oeb[20] gnd 0.61fF +C1723 io_out[20] gnd 0.61fF +C1724 io_in[20] gnd 0.61fF +C1725 io_in_3v3[20] gnd 0.61fF +C1726 gpio_noesd[13] gnd 2.31fF +C1727 gpio_analog[13] gnd 2.30fF +C1728 gpio_analog[0] gnd 0.61fF +C1729 gpio_noesd[0] gnd 0.61fF +C1730 io_in_3v3[7] gnd 0.61fF +C1731 io_in[7] gnd 0.61fF +C1732 io_out[7] gnd 0.61fF +C1733 io_oeb[7] gnd 0.61fF +C1734 io_oeb[19] gnd 0.61fF +C1735 io_out[19] gnd 0.61fF +C1736 io_in[19] gnd 0.61fF +C1737 io_in_3v3[19] gnd 0.61fF +C1738 gpio_noesd[12] gnd 2.32fF +C1739 gpio_analog[12] gnd 2.30fF +C1740 gpio_analog[1] gnd 0.61fF +C1741 gpio_noesd[1] gnd 0.61fF +C1742 io_in_3v3[8] gnd 0.61fF +C1743 io_in[8] gnd 0.61fF +C1744 io_out[8] gnd 0.61fF +C1745 io_oeb[8] gnd 0.61fF +C1746 io_oeb[18] gnd 0.61fF +C1747 io_out[18] gnd 0.61fF +C1748 io_in[18] gnd 0.61fF +C1749 io_in_3v3[18] gnd 0.61fF +C1750 gpio_noesd[11] gnd 2.30fF +C1751 gpio_analog[11] gnd 2.29fF +C1752 gpio_analog[2] gnd 0.61fF +C1753 gpio_noesd[2] gnd 0.61fF +C1754 io_in_3v3[9] gnd 0.61fF +C1755 io_in[9] gnd 0.61fF +C1756 io_out[9] gnd 0.61fF +C1757 io_oeb[9] gnd 0.61fF +C1758 io_oeb[17] gnd 0.61fF +C1759 io_out[17] gnd 0.61fF +C1760 io_in[17] gnd 0.61fF +C1761 io_in_3v3[17] gnd 0.61fF +C1762 gpio_noesd[10] gnd 2.31fF +C1763 gpio_analog[10] gnd 2.29fF +C1764 gpio_analog[3] gnd 0.61fF +C1765 gpio_noesd[3] gnd 0.61fF +C1766 io_in_3v3[10] gnd 0.61fF +C1767 io_in[10] gnd 0.61fF +C1768 io_out[10] gnd 0.61fF +C1769 io_oeb[10] gnd 0.61fF +C1770 io_oeb[16] gnd 0.61fF +C1771 io_out[16] gnd 0.61fF +C1772 io_in[16] gnd 0.61fF +C1773 io_in_3v3[16] gnd 0.61fF +C1774 gpio_noesd[9] gnd 2.28fF +C1775 gpio_analog[9] gnd 2.28fF +C1776 gpio_analog[4] gnd 0.61fF +C1777 gpio_noesd[4] gnd 0.61fF +C1778 io_in_3v3[11] gnd 0.61fF +C1779 io_in[11] gnd 0.61fF +C1780 io_out[11] gnd 0.61fF +C1781 io_oeb[11] gnd 0.61fF +C1782 io_oeb[15] gnd 0.61fF +C1783 io_out[15] gnd 0.61fF +C1784 io_in[15] gnd 0.61fF +C1785 io_in_3v3[15] gnd 0.61fF +C1786 gpio_noesd[8] gnd 2.28fF +C1787 gpio_analog[8] gnd 2.26fF +C1788 gpio_analog[5] gnd 0.61fF +C1789 gpio_noesd[5] gnd 0.61fF +C1790 io_in_3v3[12] gnd 0.61fF +C1791 io_in[12] gnd 0.61fF +C1792 io_out[12] gnd 0.61fF +C1793 io_oeb[12] gnd 0.61fF +C1794 io_oeb[14] gnd 0.61fF +C1795 io_out[14] gnd 0.61fF +C1796 io_in[14] gnd 0.61fF +C1797 io_in_3v3[14] gnd 0.61fF +C1798 gpio_noesd[7] gnd 2.30fF +C1799 gpio_analog[7] gnd 2.28fF +C1800 vssa2 gnd 38.35fF +C1801 gpio_analog[6] gnd 5.71fF +C1802 gpio_noesd[6] gnd 5.70fF +C1803 io_in_3v3[13] gnd 0.61fF +C1804 io_in[13] gnd 0.61fF +C1805 io_out[13] gnd 0.61fF +C1806 io_oeb[13] gnd 0.61fF +C1807 vccd1 gnd 39.84fF +C1808 vccd2 gnd 38.46fF +C1809 io_analog[0] gnd 19.99fF +C1810 io_analog[10] gnd 19.36fF +C1811 io_analog[1] gnd 13.17fF +C1812 io_analog[2] gnd 12.57fF +C1813 io_analog[3] gnd 12.83fF +C1814 io_clamp_high[0] gnd 3.58fF +C1815 io_clamp_low[0] gnd 3.58fF +C1816 io_clamp_high[1] gnd 3.58fF +C1817 io_clamp_low[1] gnd 3.58fF +C1818 io_clamp_high[2] gnd 3.58fF +C1819 io_clamp_low[2] gnd 3.58fF +C1820 io_analog[7] gnd 12.74fF +C1821 io_analog[8] gnd 13.08fF +C1822 io_analog[9] gnd 13.08fF +C1823 user_irq[2] gnd 0.63fF +C1824 user_irq[1] gnd 0.63fF +C1825 user_irq[0] gnd 0.63fF +C1826 user_clock2 gnd 0.63fF +C1827 la_oenb[127] gnd 0.63fF +C1828 la_data_out[127] gnd 0.63fF +C1829 la_data_in[127] gnd 0.63fF +C1830 la_oenb[126] gnd 0.63fF +C1831 la_data_out[126] gnd 0.63fF +C1832 la_data_in[126] gnd 0.63fF +C1833 la_oenb[125] gnd 0.63fF +C1834 la_data_out[125] gnd 0.63fF +C1835 la_data_in[125] gnd 0.63fF +C1836 la_oenb[124] gnd 0.63fF +C1837 la_data_out[124] gnd 0.63fF +C1838 la_data_in[124] gnd 0.63fF +C1839 la_oenb[123] gnd 0.63fF +C1840 la_data_out[123] gnd 0.63fF +C1841 la_data_in[123] gnd 0.63fF +C1842 la_oenb[122] gnd 0.63fF +C1843 la_data_out[122] gnd 0.63fF +C1844 la_data_in[122] gnd 0.63fF +C1845 la_oenb[121] gnd 0.63fF +C1846 la_data_out[121] gnd 0.63fF +C1847 la_data_in[121] gnd 0.63fF +C1848 la_oenb[120] gnd 0.63fF +C1849 la_data_out[120] gnd 0.63fF +C1850 la_data_in[120] gnd 0.63fF +C1851 la_oenb[119] gnd 0.63fF +C1852 la_data_out[119] gnd 0.63fF +C1853 la_data_in[119] gnd 0.63fF +C1854 la_oenb[118] gnd 0.63fF +C1855 la_data_out[118] gnd 0.63fF +C1856 la_data_in[118] gnd 0.63fF +C1857 la_oenb[117] gnd 0.63fF +C1858 la_data_out[117] gnd 0.63fF +C1859 la_data_in[117] gnd 0.63fF +C1860 la_oenb[116] gnd 0.63fF +C1861 la_data_out[116] gnd 0.63fF +C1862 la_data_in[116] gnd 0.63fF +C1863 la_oenb[115] gnd 0.63fF +C1864 la_data_out[115] gnd 0.63fF +C1865 la_data_in[115] gnd 0.63fF +C1866 la_oenb[114] gnd 0.63fF +C1867 la_data_out[114] gnd 0.63fF +C1868 la_data_in[114] gnd 0.63fF +C1869 la_oenb[113] gnd 0.63fF +C1870 la_data_out[113] gnd 0.63fF +C1871 la_data_in[113] gnd 0.63fF +C1872 la_oenb[112] gnd 0.63fF +C1873 la_data_out[112] gnd 0.63fF +C1874 la_data_in[112] gnd 0.63fF +C1875 la_oenb[111] gnd 0.63fF +C1876 la_data_out[111] gnd 0.63fF +C1877 la_data_in[111] gnd 0.63fF +C1878 la_oenb[110] gnd 0.63fF +C1879 la_data_out[110] gnd 0.63fF +C1880 la_data_in[110] gnd 0.63fF +C1881 la_oenb[109] gnd 0.63fF +C1882 la_data_out[109] gnd 0.63fF +C1883 la_data_in[109] gnd 0.63fF +C1884 la_oenb[108] gnd 0.63fF +C1885 la_data_out[108] gnd 0.63fF +C1886 la_data_in[108] gnd 0.63fF +C1887 la_oenb[107] gnd 0.63fF +C1888 la_data_out[107] gnd 0.63fF +C1889 la_data_in[107] gnd 0.63fF +C1890 la_oenb[106] gnd 0.63fF +C1891 la_data_out[106] gnd 0.63fF +C1892 la_data_in[106] gnd 0.63fF +C1893 la_oenb[105] gnd 0.63fF +C1894 la_data_out[105] gnd 0.63fF +C1895 la_data_in[105] gnd 0.63fF +C1896 la_oenb[104] gnd 0.63fF +C1897 la_data_out[104] gnd 0.63fF +C1898 la_data_in[104] gnd 0.63fF +C1899 la_oenb[103] gnd 0.63fF +C1900 la_data_out[103] gnd 0.63fF +C1901 la_data_in[103] gnd 0.63fF +C1902 la_oenb[102] gnd 0.63fF +C1903 la_data_out[102] gnd 0.63fF +C1904 la_data_in[102] gnd 0.63fF +C1905 la_oenb[101] gnd 0.63fF +C1906 la_data_out[101] gnd 0.63fF +C1907 la_data_in[101] gnd 0.63fF +C1908 la_oenb[100] gnd 0.63fF +C1909 la_data_out[100] gnd 0.63fF +C1910 la_data_in[100] gnd 0.63fF +C1911 la_oenb[99] gnd 0.63fF +C1912 la_data_out[99] gnd 0.63fF +C1913 la_data_in[99] gnd 0.63fF +C1914 la_oenb[98] gnd 0.63fF +C1915 la_data_out[98] gnd 0.63fF +C1916 la_data_in[98] gnd 0.63fF +C1917 la_oenb[97] gnd 0.63fF +C1918 la_data_out[97] gnd 0.63fF +C1919 la_data_in[97] gnd 0.63fF +C1920 la_oenb[96] gnd 0.63fF +C1921 la_data_out[96] gnd 0.63fF +C1922 la_data_in[96] gnd 0.63fF +C1923 la_oenb[95] gnd 0.63fF +C1924 la_data_out[95] gnd 0.63fF +C1925 la_data_in[95] gnd 0.63fF +C1926 la_oenb[94] gnd 0.63fF +C1927 la_data_out[94] gnd 0.63fF +C1928 la_data_in[94] gnd 0.63fF +C1929 la_oenb[93] gnd 0.63fF +C1930 la_data_out[93] gnd 0.63fF +C1931 la_data_in[93] gnd 0.63fF +C1932 la_oenb[92] gnd 0.63fF +C1933 la_data_out[92] gnd 0.63fF +C1934 la_data_in[92] gnd 0.63fF +C1935 la_oenb[91] gnd 0.63fF +C1936 la_data_out[91] gnd 0.63fF +C1937 la_data_in[91] gnd 0.63fF +C1938 la_oenb[90] gnd 0.63fF +C1939 la_data_out[90] gnd 0.63fF +C1940 la_data_in[90] gnd 0.63fF +C1941 la_oenb[89] gnd 0.63fF +C1942 la_data_out[89] gnd 0.63fF +C1943 la_data_in[89] gnd 0.63fF +C1944 la_oenb[88] gnd 0.63fF +C1945 la_data_out[88] gnd 0.63fF +C1946 la_data_in[88] gnd 0.63fF +C1947 la_oenb[87] gnd 0.63fF +C1948 la_data_out[87] gnd 0.63fF +C1949 la_data_in[87] gnd 0.63fF +C1950 la_oenb[86] gnd 0.63fF +C1951 la_data_out[86] gnd 0.63fF +C1952 la_data_in[86] gnd 0.63fF +C1953 la_oenb[85] gnd 0.63fF +C1954 la_data_out[85] gnd 0.63fF +C1955 la_data_in[85] gnd 0.63fF +C1956 la_oenb[84] gnd 0.63fF +C1957 la_data_out[84] gnd 0.63fF +C1958 la_data_in[84] gnd 0.63fF +C1959 la_oenb[83] gnd 0.63fF +C1960 la_data_out[83] gnd 0.63fF +C1961 la_data_in[83] gnd 0.63fF +C1962 la_oenb[82] gnd 0.63fF +C1963 la_data_out[82] gnd 0.63fF +C1964 la_data_in[82] gnd 0.63fF +C1965 la_oenb[81] gnd 0.63fF +C1966 la_data_out[81] gnd 0.63fF +C1967 la_data_in[81] gnd 0.63fF +C1968 la_oenb[80] gnd 0.63fF +C1969 la_data_out[80] gnd 0.63fF +C1970 la_data_in[80] gnd 0.63fF +C1971 la_oenb[79] gnd 0.63fF +C1972 la_data_out[79] gnd 0.63fF +C1973 la_data_in[79] gnd 0.63fF +C1974 la_oenb[78] gnd 0.63fF +C1975 la_data_out[78] gnd 0.63fF +C1976 la_data_in[78] gnd 0.63fF +C1977 la_oenb[77] gnd 0.63fF +C1978 la_data_out[77] gnd 0.63fF +C1979 la_data_in[77] gnd 0.63fF +C1980 la_oenb[76] gnd 0.63fF +C1981 la_data_out[76] gnd 0.63fF +C1982 la_data_in[76] gnd 0.63fF +C1983 la_oenb[75] gnd 0.63fF +C1984 la_data_out[75] gnd 0.63fF +C1985 la_data_in[75] gnd 0.63fF +C1986 la_oenb[74] gnd 0.63fF +C1987 la_data_out[74] gnd 0.63fF +C1988 la_data_in[74] gnd 0.63fF +C1989 la_oenb[73] gnd 0.63fF +C1990 la_data_out[73] gnd 0.63fF +C1991 la_data_in[73] gnd 0.63fF +C1992 la_oenb[72] gnd 0.63fF +C1993 la_data_out[72] gnd 0.63fF +C1994 la_data_in[72] gnd 0.63fF +C1995 la_oenb[71] gnd 0.63fF +C1996 la_data_out[71] gnd 0.63fF +C1997 la_data_in[71] gnd 0.63fF +C1998 la_oenb[70] gnd 0.63fF +C1999 la_data_out[70] gnd 0.63fF +C2000 la_data_in[70] gnd 0.63fF +C2001 la_oenb[69] gnd 0.63fF +C2002 la_data_out[69] gnd 0.63fF +C2003 la_data_in[69] gnd 0.63fF +C2004 la_oenb[68] gnd 0.63fF +C2005 la_data_out[68] gnd 0.63fF +C2006 la_data_in[68] gnd 0.63fF +C2007 la_oenb[67] gnd 0.63fF +C2008 la_data_out[67] gnd 0.63fF +C2009 la_data_in[67] gnd 0.63fF +C2010 la_oenb[66] gnd 0.63fF +C2011 la_data_out[66] gnd 0.63fF +C2012 la_data_in[66] gnd 0.63fF +C2013 la_oenb[65] gnd 0.63fF +C2014 la_data_out[65] gnd 0.63fF +C2015 la_data_in[65] gnd 0.63fF +C2016 la_oenb[64] gnd 0.63fF +C2017 la_data_out[64] gnd 0.63fF +C2018 la_data_in[64] gnd 0.63fF +C2019 la_oenb[63] gnd 0.63fF +C2020 la_data_out[63] gnd 0.63fF +C2021 la_data_in[63] gnd 0.63fF +C2022 la_oenb[62] gnd 0.63fF +C2023 la_data_out[62] gnd 0.63fF +C2024 la_data_in[62] gnd 0.63fF +C2025 la_oenb[61] gnd 0.63fF +C2026 la_data_out[61] gnd 0.63fF +C2027 la_data_in[61] gnd 0.63fF +C2028 la_oenb[60] gnd 0.63fF +C2029 la_data_out[60] gnd 0.63fF +C2030 la_data_in[60] gnd 0.63fF +C2031 la_oenb[59] gnd 0.63fF +C2032 la_data_out[59] gnd 0.63fF +C2033 la_data_in[59] gnd 0.63fF +C2034 la_oenb[58] gnd 0.63fF +C2035 la_data_out[58] gnd 0.63fF +C2036 la_data_in[58] gnd 0.63fF +C2037 la_oenb[57] gnd 0.63fF +C2038 la_data_out[57] gnd 0.63fF +C2039 la_data_in[57] gnd 0.63fF +C2040 la_oenb[56] gnd 0.63fF +C2041 la_data_out[56] gnd 0.63fF +C2042 la_data_in[56] gnd 0.63fF +C2043 la_oenb[55] gnd 0.63fF +C2044 la_data_out[55] gnd 0.63fF +C2045 la_data_in[55] gnd 0.63fF +C2046 la_oenb[54] gnd 0.63fF +C2047 la_data_out[54] gnd 0.63fF +C2048 la_data_in[54] gnd 0.63fF +C2049 la_oenb[53] gnd 0.63fF +C2050 la_data_out[53] gnd 0.63fF +C2051 la_data_in[53] gnd 0.63fF +C2052 la_oenb[52] gnd 0.63fF +C2053 la_data_out[52] gnd 0.63fF +C2054 la_data_in[52] gnd 0.63fF +C2055 la_oenb[51] gnd 0.63fF +C2056 la_data_out[51] gnd 0.63fF +C2057 la_data_in[51] gnd 0.63fF +C2058 la_oenb[50] gnd 0.63fF +C2059 la_data_out[50] gnd 0.63fF +C2060 la_data_in[50] gnd 0.63fF +C2061 la_oenb[49] gnd 0.63fF +C2062 la_data_out[49] gnd 0.63fF +C2063 la_data_in[49] gnd 0.63fF +C2064 la_oenb[48] gnd 0.63fF +C2065 la_data_out[48] gnd 0.63fF +C2066 la_data_in[48] gnd 0.63fF +C2067 la_oenb[47] gnd 0.63fF +C2068 la_data_out[47] gnd 0.63fF +C2069 la_data_in[47] gnd 0.63fF +C2070 la_oenb[46] gnd 0.63fF +C2071 la_data_out[46] gnd 0.63fF +C2072 la_data_in[46] gnd 0.63fF +C2073 la_oenb[45] gnd 0.63fF +C2074 la_data_out[45] gnd 0.63fF +C2075 la_data_in[45] gnd 0.63fF +C2076 la_oenb[44] gnd 0.63fF +C2077 la_data_out[44] gnd 0.63fF +C2078 la_data_in[44] gnd 0.63fF +C2079 la_oenb[43] gnd 0.63fF +C2080 la_data_out[43] gnd 0.63fF +C2081 la_data_in[43] gnd 0.63fF +C2082 la_oenb[42] gnd 0.63fF +C2083 la_data_out[42] gnd 0.63fF +C2084 la_data_in[42] gnd 0.63fF +C2085 la_oenb[41] gnd 0.63fF +C2086 la_data_out[41] gnd 0.63fF +C2087 la_data_in[41] gnd 0.63fF +C2088 la_oenb[40] gnd 0.63fF +C2089 la_data_out[40] gnd 0.63fF +C2090 la_data_in[40] gnd 0.63fF +C2091 la_oenb[39] gnd 0.63fF +C2092 la_data_out[39] gnd 0.63fF +C2093 la_data_in[39] gnd 0.63fF +C2094 la_oenb[38] gnd 0.63fF +C2095 la_data_out[38] gnd 0.63fF +C2096 la_data_in[38] gnd 0.63fF +C2097 la_oenb[37] gnd 0.63fF +C2098 la_data_out[37] gnd 0.63fF +C2099 la_data_in[37] gnd 0.63fF +C2100 la_oenb[36] gnd 0.63fF +C2101 la_data_out[36] gnd 0.63fF +C2102 la_data_in[36] gnd 0.63fF +C2103 la_oenb[35] gnd 0.63fF +C2104 la_data_out[35] gnd 0.63fF +C2105 la_data_in[35] gnd 0.63fF +C2106 la_oenb[34] gnd 0.63fF +C2107 la_data_out[34] gnd 0.63fF +C2108 la_data_in[34] gnd 0.63fF +C2109 la_oenb[33] gnd 0.63fF +C2110 la_data_out[33] gnd 0.63fF +C2111 la_data_in[33] gnd 0.63fF +C2112 la_oenb[32] gnd 0.63fF +C2113 la_data_out[32] gnd 0.63fF +C2114 la_data_in[32] gnd 0.63fF +C2115 la_oenb[31] gnd 0.63fF +C2116 la_data_out[31] gnd 0.63fF +C2117 la_data_in[31] gnd 0.63fF +C2118 la_oenb[30] gnd 0.63fF +C2119 la_data_out[30] gnd 0.63fF +C2120 la_data_in[30] gnd 0.63fF +C2121 la_oenb[29] gnd 0.63fF +C2122 la_data_out[29] gnd 0.63fF +C2123 la_data_in[29] gnd 0.63fF +C2124 la_oenb[28] gnd 0.63fF +C2125 la_data_out[28] gnd 0.63fF +C2126 la_data_in[28] gnd 0.63fF +C2127 la_oenb[27] gnd 0.63fF +C2128 la_data_out[27] gnd 0.63fF +C2129 la_data_in[27] gnd 0.63fF +C2130 la_oenb[26] gnd 0.63fF +C2131 la_data_out[26] gnd 0.63fF +C2132 la_data_in[26] gnd 0.63fF +C2133 la_oenb[25] gnd 0.63fF +C2134 la_data_out[25] gnd 0.63fF +C2135 la_data_in[25] gnd 0.63fF +C2136 la_oenb[24] gnd 0.63fF +C2137 la_data_out[24] gnd 0.63fF +C2138 la_data_in[24] gnd 0.63fF +C2139 la_oenb[23] gnd 0.63fF +C2140 la_data_out[23] gnd 0.63fF +C2141 la_data_in[23] gnd 0.63fF +C2142 la_oenb[22] gnd 0.63fF +C2143 la_data_out[22] gnd 0.63fF +C2144 la_data_in[22] gnd 0.63fF +C2145 la_oenb[21] gnd 0.63fF +C2146 la_data_out[21] gnd 0.63fF +C2147 la_data_in[21] gnd 0.63fF +C2148 la_oenb[20] gnd 0.63fF +C2149 la_data_out[20] gnd 0.63fF +C2150 la_data_in[20] gnd 0.63fF +C2151 la_oenb[19] gnd 0.63fF +C2152 la_data_out[19] gnd 0.63fF +C2153 la_data_in[19] gnd 0.63fF +C2154 la_oenb[18] gnd 0.63fF +C2155 la_data_out[18] gnd 0.63fF +C2156 la_data_in[18] gnd 0.63fF +C2157 la_oenb[17] gnd 0.63fF +C2158 la_data_out[17] gnd 0.63fF +C2159 la_data_in[17] gnd 0.63fF +C2160 la_oenb[16] gnd 0.63fF +C2161 la_data_out[16] gnd 0.63fF +C2162 la_data_in[16] gnd 0.63fF +C2163 la_oenb[15] gnd 0.63fF +C2164 la_data_out[15] gnd 0.63fF +C2165 la_data_in[15] gnd 0.63fF +C2166 la_oenb[14] gnd 0.63fF +C2167 la_data_out[14] gnd 0.63fF +C2168 la_data_in[14] gnd 0.63fF +C2169 la_oenb[13] gnd 0.63fF +C2170 la_data_out[13] gnd 0.63fF +C2171 la_data_in[13] gnd 0.63fF +C2172 la_oenb[12] gnd 0.63fF +C2173 la_data_out[12] gnd 0.63fF +C2174 la_data_in[12] gnd 0.63fF +C2175 la_oenb[11] gnd 0.63fF +C2176 la_data_out[11] gnd 0.63fF +C2177 la_data_in[11] gnd 0.63fF +C2178 la_oenb[10] gnd 0.63fF +C2179 la_data_out[10] gnd 0.63fF +C2180 la_data_in[10] gnd 0.63fF +C2181 la_oenb[9] gnd 0.63fF +C2182 la_data_out[9] gnd 0.63fF +C2183 la_data_in[9] gnd 0.63fF +C2184 la_oenb[8] gnd 0.63fF +C2185 la_data_out[8] gnd 0.63fF +C2186 la_data_in[8] gnd 0.63fF +C2187 la_oenb[7] gnd 0.63fF +C2188 la_data_out[7] gnd 0.63fF +C2189 la_data_in[7] gnd 0.63fF +C2190 la_oenb[6] gnd 0.63fF +C2191 la_data_out[6] gnd 0.63fF +C2192 la_data_in[6] gnd 0.63fF +C2193 la_oenb[5] gnd 0.63fF +C2194 la_data_out[5] gnd 0.63fF +C2195 la_data_in[5] gnd 0.63fF +C2196 la_oenb[4] gnd 0.63fF +C2197 la_data_out[4] gnd 0.63fF +C2198 la_data_in[4] gnd 0.63fF +C2199 la_oenb[3] gnd 0.63fF +C2200 la_data_out[3] gnd 0.63fF +C2201 la_data_in[3] gnd 0.63fF +C2202 la_oenb[2] gnd 0.63fF +C2203 la_data_out[2] gnd 0.63fF +C2204 la_data_in[2] gnd 0.63fF +C2205 la_oenb[1] gnd 0.63fF +C2206 la_data_out[1] gnd 0.63fF +C2207 la_data_in[1] gnd 0.63fF +C2208 la_oenb[0] gnd 0.63fF +C2209 la_data_out[0] gnd 0.63fF +C2210 la_data_in[0] gnd 0.63fF +C2211 wbs_dat_o[31] gnd 0.63fF +C2212 wbs_dat_i[31] gnd 0.63fF +C2213 wbs_adr_i[31] gnd 0.63fF +C2214 wbs_dat_o[30] gnd 0.63fF +C2215 wbs_dat_i[30] gnd 0.63fF +C2216 wbs_adr_i[30] gnd 0.63fF +C2217 wbs_dat_o[29] gnd 0.63fF +C2218 wbs_dat_i[29] gnd 0.63fF +C2219 wbs_adr_i[29] gnd 0.63fF +C2220 wbs_dat_o[28] gnd 0.63fF +C2221 wbs_dat_i[28] gnd 0.63fF +C2222 wbs_adr_i[28] gnd 0.63fF +C2223 wbs_dat_o[27] gnd 0.63fF +C2224 wbs_dat_i[27] gnd 0.63fF +C2225 wbs_adr_i[27] gnd 0.63fF +C2226 wbs_dat_o[26] gnd 0.63fF +C2227 wbs_dat_i[26] gnd 0.63fF +C2228 wbs_adr_i[26] gnd 0.63fF +C2229 wbs_dat_o[25] gnd 0.63fF +C2230 wbs_dat_i[25] gnd 0.63fF +C2231 wbs_adr_i[25] gnd 0.63fF +C2232 wbs_dat_o[24] gnd 0.63fF +C2233 wbs_dat_i[24] gnd 0.63fF +C2234 wbs_adr_i[24] gnd 0.63fF +C2235 wbs_dat_o[23] gnd 0.63fF +C2236 wbs_dat_i[23] gnd 0.63fF +C2237 wbs_adr_i[23] gnd 0.63fF +C2238 wbs_dat_o[22] gnd 0.63fF +C2239 wbs_dat_i[22] gnd 0.63fF +C2240 wbs_adr_i[22] gnd 0.63fF +C2241 wbs_dat_o[21] gnd 0.63fF +C2242 wbs_dat_i[21] gnd 0.63fF +C2243 wbs_adr_i[21] gnd 0.63fF +C2244 wbs_dat_o[20] gnd 0.63fF +C2245 wbs_dat_i[20] gnd 0.63fF +C2246 wbs_adr_i[20] gnd 0.63fF +C2247 wbs_dat_o[19] gnd 0.63fF +C2248 wbs_dat_i[19] gnd 0.63fF +C2249 wbs_adr_i[19] gnd 0.63fF +C2250 wbs_dat_o[18] gnd 0.63fF +C2251 wbs_dat_i[18] gnd 0.63fF +C2252 wbs_adr_i[18] gnd 0.63fF +C2253 wbs_dat_o[17] gnd 0.63fF +C2254 wbs_dat_i[17] gnd 0.63fF +C2255 wbs_adr_i[17] gnd 0.63fF +C2256 wbs_dat_o[16] gnd 0.63fF +C2257 wbs_dat_i[16] gnd 0.63fF +C2258 wbs_adr_i[16] gnd 0.63fF +C2259 wbs_dat_o[15] gnd 0.63fF +C2260 wbs_dat_i[15] gnd 0.63fF +C2261 wbs_adr_i[15] gnd 0.63fF +C2262 wbs_dat_o[14] gnd 0.63fF +C2263 wbs_dat_i[14] gnd 0.63fF +C2264 wbs_adr_i[14] gnd 0.63fF +C2265 wbs_dat_o[13] gnd 0.63fF +C2266 wbs_dat_i[13] gnd 0.63fF +C2267 wbs_adr_i[13] gnd 0.63fF +C2268 wbs_dat_o[12] gnd 0.63fF +C2269 wbs_dat_i[12] gnd 0.63fF +C2270 wbs_adr_i[12] gnd 0.63fF +C2271 wbs_dat_o[11] gnd 0.63fF +C2272 wbs_dat_i[11] gnd 0.63fF +C2273 wbs_adr_i[11] gnd 0.63fF +C2274 wbs_dat_o[10] gnd 0.63fF +C2275 wbs_dat_i[10] gnd 0.63fF +C2276 wbs_adr_i[10] gnd 0.63fF +C2277 wbs_dat_o[9] gnd 0.63fF +C2278 wbs_dat_i[9] gnd 0.63fF +C2279 wbs_adr_i[9] gnd 0.63fF +C2280 wbs_dat_o[8] gnd 0.63fF +C2281 wbs_dat_i[8] gnd 0.63fF +C2282 wbs_adr_i[8] gnd 0.63fF +C2283 wbs_dat_o[7] gnd 0.63fF +C2284 wbs_dat_i[7] gnd 0.63fF +C2285 wbs_adr_i[7] gnd 0.63fF +C2286 wbs_dat_o[6] gnd 0.63fF +C2287 wbs_dat_i[6] gnd 0.63fF +C2288 wbs_adr_i[6] gnd 0.63fF +C2289 wbs_dat_o[5] gnd 0.63fF +C2290 wbs_dat_i[5] gnd 0.63fF +C2291 wbs_adr_i[5] gnd 0.63fF +C2292 wbs_dat_o[4] gnd 0.63fF +C2293 wbs_dat_i[4] gnd 0.63fF +C2294 wbs_adr_i[4] gnd 0.63fF +C2295 wbs_sel_i[3] gnd 0.63fF +C2296 wbs_dat_o[3] gnd 0.63fF +C2297 wbs_dat_i[3] gnd 0.63fF +C2298 wbs_adr_i[3] gnd 0.63fF +C2299 wbs_sel_i[2] gnd 0.63fF +C2300 wbs_dat_o[2] gnd 0.63fF +C2301 wbs_dat_i[2] gnd 0.63fF +C2302 wbs_adr_i[2] gnd 0.63fF +C2303 wbs_sel_i[1] gnd 0.63fF +C2304 wbs_dat_o[1] gnd 0.63fF +C2305 wbs_dat_i[1] gnd 0.63fF +C2306 wbs_adr_i[1] gnd 0.63fF +C2307 wbs_sel_i[0] gnd 0.63fF +C2308 wbs_dat_o[0] gnd 0.63fF +C2309 wbs_dat_i[0] gnd 0.63fF +C2310 wbs_adr_i[0] gnd 0.63fF +C2311 wbs_we_i gnd 0.63fF +C2312 wbs_stb_i gnd 0.63fF +C2313 wbs_cyc_i gnd 0.63fF +C2314 wbs_ack_o gnd 0.63fF +C2315 wb_rst_i gnd 0.63fF +C2316 wb_clk_i gnd 0.63fF +C2317 m2_494098_659718# gnd 0.80fF **FLOATING +C2318 pll_full_0/divider_0/and_0/Z1 gnd 0.65fF +C2319 pll_full_0/divider_0/and_0/B gnd 2.45fF +C2320 pll_full_0/divider_0/and_0/A gnd 2.35fF +C2321 pll_full_0/divider_0/and_0/out1 gnd 2.99fF +C2322 pll_full_0/divider_0/tspc_2/Z4 gnd 0.86fF +C2323 pll_full_0/divider_0/tspc_2/Z3 gnd 2.26fF +C2324 pll_full_0/divider_0/tspc_2/Z2 gnd 1.46fF +C2325 pll_full_0/divider_0/tspc_2/Z1 gnd 0.99fF +C2326 pll_full_0/divider_0/nor_0/A gnd 7.08fF +C2327 pll_full_0/divider_0/tspc_2/a_630_n680# gnd 1.15fF **FLOATING +C2328 pll_full_0/divider_0/tspc_1/Z4 gnd 0.86fF +C2329 pll_full_0/divider_0/tspc_1/Z3 gnd 2.26fF +C2330 pll_full_0/divider_0/tspc_1/Z2 gnd 1.46fF +C2331 pll_full_0/divider_0/tspc_1/Z1 gnd 0.99fF +C2332 pll_full_0/divider_0/nor_0/B gnd 7.12fF +C2333 pll_full_0/divider_0/tspc_1/a_630_n680# gnd 1.15fF **FLOATING +C2334 pll_full_0/divider_0/tspc_2/Q gnd 3.14fF +C2335 pll_full_0/divider_0/tspc_0/Z4 gnd 0.86fF +C2336 pll_full_0/divbuf_1/IN gnd 9.89fF +C2337 pll_full_0/divider_0/tspc_0/Z3 gnd 2.26fF +C2338 pll_full_0/divider_0/tspc_0/Z2 gnd 1.46fF +C2339 pll_full_0/divider_0/tspc_0/Z1 gnd 0.99fF +C2340 pll_full_0/divider_0/nor_1/B gnd 6.48fF +C2341 pll_full_0/divider_0/tspc_0/a_630_n680# gnd 1.14fF **FLOATING +C2342 pll_full_0/divider_0/tspc_1/Q gnd 3.12fF +C2343 pll_full_0/divider_0/clk gnd 33.42fF +C2344 pll_full_0/divider_0/prescaler_0/nand_1/z1 gnd 0.36fF +C2345 pll_full_0/divider_0/prescaler_0/tspc_0/D gnd 2.64fF +C2346 pll_full_0/divider_0/prescaler_0/tspc_2/Q gnd 3.72fF +C2347 pll_full_0/divider_0/prescaler_0/tspc_1/Q gnd 3.61fF +C2348 pll_full_0/divider_0/prescaler_0/nand_0/z1 gnd 0.36fF +C2349 pll_full_0/divider_0/prescaler_0/tspc_2/D gnd 3.12fF +C2350 pll_full_0/divider_0/and_0/OUT gnd 5.67fF +C2351 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 gnd 0.86fF +C2352 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 gnd 2.26fF +C2353 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 gnd 1.19fF +C2354 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 gnd 0.99fF +C2355 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# gnd 1.47fF **FLOATING +C2356 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# gnd 2.11fF **FLOATING +C2357 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 gnd 0.86fF +C2358 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 gnd 2.26fF +C2359 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 gnd 1.48fF +C2360 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 gnd 0.99fF +C2361 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# gnd 1.14fF **FLOATING +C2362 pll_full_0/divider_0/prescaler_0/m1_2700_2190# gnd 4.22fF **FLOATING +C2363 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 gnd 0.86fF +C2364 pll_full_0/divider_0/prescaler_0/Out gnd 4.59fF +C2365 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 gnd 2.26fF +C2366 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 gnd 1.46fF +C2367 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 gnd 0.99fF +C2368 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# gnd 1.16fF **FLOATING +C2369 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# gnd 2.11fF **FLOATING +C2370 pll_full_0/divider_0/nor_1/Z1 gnd 1.34fF +C2371 pll_full_0/divider_0/nor_0/Z1 gnd 1.34fF C2372 pll_full_0/divbuf_1/OUT5 gnd 350.37fF C2373 pll_full_0/divbuf_1/OUT4 gnd 133.72fF C2374 pll_full_0/divbuf_1/OUT3 gnd 34.03fF C2375 pll_full_0/divbuf_1/OUT2 gnd 8.71fF C2376 pll_full_0/divbuf_1/a_492_n240# gnd 2.46fF **FLOATING -C2377 pll_full_0/divbuf_0/OUT5 gnd 350.37fF -C2378 pll_full_0/divbuf_0/OUT4 gnd 133.72fF -C2379 pll_full_0/divbuf_0/OUT3 gnd 34.03fF -C2380 pll_full_0/divbuf_0/OUT2 gnd 8.71fF -C2381 pll_full_0/divbuf_0/a_492_n240# gnd 2.46fF **FLOATING -C2382 pll_full_0/ro_complete_0/cbank_2/v gnd 16.43fF -C2383 pll_full_0/ro_complete_0/cbank_2/switch_5/vin gnd 0.78fF -C2384 pll_full_0/ro_complete_0/cbank_2/switch_4/vin gnd 1.50fF -C2385 pll_full_0/ro_complete_0/cbank_2/switch_2/vin gnd 1.30fF -C2386 pll_full_0/ro_complete_0/cbank_2/switch_3/vin gnd 0.56fF -C2387 pll_full_0/ro_complete_0/cbank_2/switch_1/vin gnd 1.14fF -C2388 pll_full_0/ro_complete_0/cbank_2/switch_0/vin gnd 1.02fF -C2389 pll_full_0/ro_complete_0/cbank_1/switch_5/vin gnd 0.78fF -C2390 pll_full_0/ro_complete_0/a0 gnd 5.35fF -C2391 pll_full_0/ro_complete_0/cbank_1/switch_4/vin gnd 1.50fF -C2392 pll_full_0/ro_complete_0/a1 gnd 6.54fF -C2393 pll_full_0/ro_complete_0/cbank_1/switch_2/vin gnd 1.30fF -C2394 pll_full_0/ro_complete_0/a3 gnd 5.96fF -C2395 pll_full_0/ro_complete_0/cbank_1/switch_3/vin gnd 0.56fF -C2396 pll_full_0/ro_complete_0/a2 gnd 5.21fF -C2397 pll_full_0/ro_complete_0/cbank_1/switch_1/vin gnd 1.14fF -C2398 pll_full_0/ro_complete_0/a4 gnd 5.81fF -C2399 pll_full_0/ro_complete_0/cbank_1/switch_0/vin gnd 1.02fF -C2400 pll_full_0/ro_complete_0/a5 gnd 6.74fF -C2401 pll_full_0/ro_complete_0/cbank_0/v gnd 15.12fF -C2402 pll_full_0/ro_complete_0/cbank_0/switch_5/vin gnd 0.78fF -C2403 pll_full_0/ro_complete_0/cbank_0/switch_4/vin gnd 1.50fF -C2404 pll_full_0/ro_complete_0/cbank_0/switch_2/vin gnd 1.30fF -C2405 pll_full_0/ro_complete_0/cbank_0/switch_3/vin gnd 0.56fF -C2406 pll_full_0/ro_complete_0/cbank_0/switch_1/vin gnd 1.14fF -C2407 pll_full_0/ro_complete_0/cbank_0/switch_0/vin gnd 1.02fF -C2408 pll_full_0/ro_complete_0/ro_var_extend_0/vcont gnd 0.27fF -C2409 pll_full_0/filter_0/a_4216_n5230# gnd 418.90fF **FLOATING -C2410 pll_full_0/filter_0/a_4216_n2998# gnd 1.39fF **FLOATING -C2411 pll_full_0/cp_0/down gnd 1.54fF -C2412 pll_full_0/cp_0/upbar gnd 1.79fF -C2413 pll_full_0/cp_0/a_7110_n2840# gnd 0.17fF **FLOATING -C2414 pll_full_0/cp_0/a_3060_n2840# gnd 1.71fF **FLOATING -C2415 pll_full_0/cp_0/a_7110_0# gnd 0.17fF **FLOATING -C2416 pll_full_0/cp_0/a_6370_0# gnd 0.40fF **FLOATING -C2417 pll_full_0/cp_0/a_3060_0# gnd 2.49fF **FLOATING -C2418 pll_full_0/cp_0/a_1710_0# gnd 7.47fF **FLOATING -C2419 pll_full_0/pd_0/and_pd_0/Z1 gnd 0.39fF -C2420 pll_full_0/pd_0/and_pd_0/Out1 gnd 2.22fF -C2421 pll_full_0/pd_0/tspc_r_1/z5 gnd 1.10fF -C2422 pll_full_0/pd_0/tspc_r_1/Z4 gnd 1.07fF -C2423 pll_full_0/pd_0/tspc_r_1/Qbar gnd 0.88fF -C2424 pll_full_0/pd_0/tspc_r_1/Z2 gnd 1.22fF -C2425 pll_full_0/pd_0/tspc_r_1/Z1 gnd 0.67fF -C2426 pll_full_0/pd_0/UP gnd 6.41fF -C2427 pll_full_0/pd_0/tspc_r_1/Qbar1 gnd 1.34fF -C2428 pll_full_0/pd_0/tspc_r_1/Z3 gnd 2.12fF -C2429 pll_full_0/pd_0/REF gnd 6.48fF -C2430 pll_full_0/pd_0/tspc_r_0/z5 gnd 1.10fF -C2431 pll_full_0/pd_0/tspc_r_0/Z4 gnd 1.07fF -C2432 pll_full_0/pd_0/R gnd 3.05fF -C2433 pll_full_0/pd_0/tspc_r_0/Qbar gnd 0.79fF -C2434 pll_full_0/pd_0/tspc_r_0/Z2 gnd 1.22fF -C2435 pll_full_0/pd_0/tspc_r_0/Z1 gnd 0.67fF -C2436 pll_full_0/pd_0/DOWN gnd 7.34fF -C2437 pll_full_0/pd_0/tspc_r_0/Qbar1 gnd 1.34fF -C2438 pll_full_0/pd_0/tspc_r_0/Z3 gnd 2.12fF -C2439 pll_full_0/pd_0/DIV gnd 372.69fF -C2440 divbuf_19/OUT gnd 363.82fF -C2441 divbuf_19/OUT5 gnd 350.37fF -C2442 divbuf_19/OUT4 gnd 133.72fF -C2443 divbuf_19/OUT3 gnd 34.03fF -C2444 divbuf_19/OUT2 gnd 8.71fF -C2445 divbuf_19/IN gnd 0.89fF -C2446 divbuf_19/a_492_n240# gnd 2.46fF **FLOATING -C2447 divbuf_18/OUT gnd 363.82fF -C2448 divbuf_18/OUT5 gnd 350.37fF -C2449 divbuf_18/OUT4 gnd 133.72fF -C2450 divbuf_18/OUT3 gnd 34.03fF -C2451 divbuf_18/OUT2 gnd 8.71fF -C2452 divbuf_18/IN gnd 0.89fF -C2453 divbuf_18/a_492_n240# gnd 2.46fF **FLOATING -C2454 divbuf_17/OUT gnd 363.82fF -C2455 divbuf_17/OUT5 gnd 350.37fF -C2456 divbuf_17/OUT4 gnd 133.72fF -C2457 divbuf_17/OUT3 gnd 34.03fF -C2458 divbuf_17/OUT2 gnd 8.71fF -C2459 divbuf_17/IN gnd 0.89fF -C2460 divbuf_17/a_492_n240# gnd 2.46fF **FLOATING -C2461 divider_2/and_0/Z1 gnd 0.74fF -C2462 divider_2/and_0/B gnd 2.25fF -C2463 divider_2/and_0/A gnd 2.19fF -C2464 divider_2/and_0/out1 gnd 2.93fF -C2465 divider_2/tspc_2/Z4 gnd 0.86fF -C2466 divider_2/tspc_2/Z3 gnd 2.26fF -C2467 divider_2/tspc_2/Z2 gnd 1.46fF -C2468 divider_2/tspc_2/Z1 gnd 0.99fF -C2469 divider_2/nor_0/A gnd 7.04fF -C2470 divider_2/tspc_2/a_630_n680# gnd 1.15fF **FLOATING -C2471 divider_2/tspc_1/Z4 gnd 0.86fF -C2472 divider_2/tspc_1/Z3 gnd 2.26fF -C2473 divider_2/tspc_1/Z2 gnd 1.46fF -C2474 divider_2/tspc_1/Z1 gnd 0.99fF -C2475 divider_2/nor_0/B gnd 7.05fF -C2476 divider_2/tspc_1/a_630_n680# gnd 1.15fF **FLOATING -C2477 divider_2/tspc_2/Q gnd 3.14fF -C2478 divider_2/tspc_0/Z4 gnd 0.86fF -C2479 divider_2/Out gnd 1.60fF -C2480 divider_2/tspc_0/Z3 gnd 2.26fF -C2481 divider_2/tspc_0/Z2 gnd 1.46fF -C2482 divider_2/tspc_0/Z1 gnd 0.99fF -C2483 divider_2/nor_1/B gnd 6.33fF -C2484 divider_2/tspc_0/a_630_n680# gnd 1.14fF **FLOATING -C2485 divider_2/tspc_1/Q gnd 3.12fF -C2486 divider_2/clk gnd 5.63fF -C2487 divider_2/prescaler_0/nand_1/z1 gnd 0.36fF -C2488 divider_2/prescaler_0/tspc_0/D gnd 2.64fF -C2489 divider_2/prescaler_0/tspc_2/Q gnd 3.74fF -C2490 divider_2/prescaler_0/tspc_1/Q gnd 3.61fF -C2491 divider_2/prescaler_0/nand_0/z1 gnd 0.36fF -C2492 divider_2/prescaler_0/tspc_2/D gnd 3.12fF -C2493 divider_2/and_0/OUT gnd 5.62fF -C2494 divider_2/prescaler_0/tspc_2/Z4 gnd 0.86fF -C2495 divider_2/prescaler_0/tspc_2/Z3 gnd 2.26fF -C2496 divider_2/prescaler_0/tspc_2/Z2 gnd 1.46fF -C2497 divider_2/prescaler_0/tspc_2/Z1 gnd 0.99fF -C2498 divider_2/prescaler_0/tspc_2/a_630_n680# gnd 1.14fF **FLOATING -C2499 divider_2/prescaler_0/tspc_2/a_740_n680# gnd 2.11fF **FLOATING -C2500 divider_2/prescaler_0/tspc_1/Z4 gnd 0.86fF -C2501 divider_2/prescaler_0/tspc_1/Z3 gnd 2.26fF -C2502 divider_2/prescaler_0/tspc_1/Z2 gnd 1.48fF -C2503 divider_2/prescaler_0/tspc_1/Z1 gnd 0.99fF -C2504 divider_2/prescaler_0/tspc_1/a_630_n680# gnd 1.14fF **FLOATING -C2505 divider_2/prescaler_0/m1_2700_2190# gnd 4.22fF **FLOATING -C2506 divider_2/prescaler_0/tspc_0/Z4 gnd 0.86fF -C2507 divider_2/prescaler_0/Out gnd 4.59fF -C2508 divider_2/prescaler_0/tspc_0/Z3 gnd 2.26fF -C2509 divider_2/prescaler_0/tspc_0/Z2 gnd 1.46fF -C2510 divider_2/prescaler_0/tspc_0/Z1 gnd 0.99fF -C2511 divider_2/prescaler_0/tspc_0/a_630_n680# gnd 1.16fF **FLOATING -C2512 divider_2/prescaler_0/tspc_0/a_740_n680# gnd 2.11fF **FLOATING -C2513 divider_2/nor_1/Z1 gnd 1.34fF -C2514 divider_2/mc2 gnd 5.29fF -C2515 divider_2/nor_0/Z1 gnd 1.34fF -C2516 divbuf_16/OUT gnd 363.82fF -C2517 divbuf_16/OUT5 gnd 350.37fF -C2518 divbuf_16/OUT4 gnd 133.72fF -C2519 divbuf_16/OUT3 gnd 34.03fF -C2520 divbuf_16/OUT2 gnd 8.71fF -C2521 divbuf_16/IN gnd 0.89fF -C2522 divbuf_16/a_492_n240# gnd 2.46fF **FLOATING -C2523 divider_1/and_0/Z1 gnd 0.74fF -C2524 divider_1/and_0/B gnd 2.25fF -C2525 divider_1/and_0/A gnd 2.19fF -C2526 divider_1/and_0/out1 gnd 2.93fF -C2527 divider_1/tspc_2/Z4 gnd 0.86fF -C2528 divider_1/tspc_2/Z3 gnd 2.26fF -C2529 divider_1/tspc_2/Z2 gnd 1.46fF -C2530 divider_1/tspc_2/Z1 gnd 0.99fF -C2531 divider_1/nor_0/A gnd 7.04fF -C2532 divider_1/tspc_2/a_630_n680# gnd 1.15fF **FLOATING -C2533 divider_1/tspc_1/Z4 gnd 0.86fF -C2534 divider_1/tspc_1/Z3 gnd 2.26fF -C2535 divider_1/tspc_1/Z2 gnd 1.46fF -C2536 divider_1/tspc_1/Z1 gnd 0.99fF -C2537 divider_1/nor_0/B gnd 7.05fF -C2538 divider_1/tspc_1/a_630_n680# gnd 1.15fF **FLOATING -C2539 divider_1/tspc_2/Q gnd 3.14fF -C2540 divider_1/tspc_0/Z4 gnd 0.86fF -C2541 divider_1/Out gnd 1.60fF -C2542 divider_1/tspc_0/Z3 gnd 2.26fF -C2543 divider_1/tspc_0/Z2 gnd 1.46fF -C2544 divider_1/tspc_0/Z1 gnd 0.99fF -C2545 divider_1/nor_1/B gnd 6.33fF -C2546 divider_1/tspc_0/a_630_n680# gnd 1.14fF **FLOATING -C2547 divider_1/tspc_1/Q gnd 3.12fF -C2548 divider_1/clk gnd 5.63fF -C2549 divider_1/prescaler_0/nand_1/z1 gnd 0.36fF -C2550 divider_1/prescaler_0/tspc_0/D gnd 2.64fF -C2551 divider_1/prescaler_0/tspc_2/Q gnd 3.74fF -C2552 divider_1/prescaler_0/tspc_1/Q gnd 3.61fF -C2553 divider_1/prescaler_0/nand_0/z1 gnd 0.36fF -C2554 divider_1/prescaler_0/tspc_2/D gnd 3.12fF -C2555 divider_1/and_0/OUT gnd 5.62fF -C2556 divider_1/prescaler_0/tspc_2/Z4 gnd 0.86fF -C2557 divider_1/prescaler_0/tspc_2/Z3 gnd 2.26fF -C2558 divider_1/prescaler_0/tspc_2/Z2 gnd 1.46fF -C2559 divider_1/prescaler_0/tspc_2/Z1 gnd 0.99fF -C2560 divider_1/prescaler_0/tspc_2/a_630_n680# gnd 1.14fF **FLOATING -C2561 divider_1/prescaler_0/tspc_2/a_740_n680# gnd 2.11fF **FLOATING -C2562 divider_1/prescaler_0/tspc_1/Z4 gnd 0.86fF -C2563 divider_1/prescaler_0/tspc_1/Z3 gnd 2.26fF -C2564 divider_1/prescaler_0/tspc_1/Z2 gnd 1.48fF -C2565 divider_1/prescaler_0/tspc_1/Z1 gnd 0.99fF -C2566 divider_1/prescaler_0/tspc_1/a_630_n680# gnd 1.14fF **FLOATING -C2567 divider_1/prescaler_0/m1_2700_2190# gnd 4.22fF **FLOATING -C2568 divider_1/prescaler_0/tspc_0/Z4 gnd 0.86fF -C2569 divider_1/prescaler_0/Out gnd 4.59fF -C2570 divider_1/prescaler_0/tspc_0/Z3 gnd 2.26fF -C2571 divider_1/prescaler_0/tspc_0/Z2 gnd 1.46fF -C2572 divider_1/prescaler_0/tspc_0/Z1 gnd 0.99fF -C2573 divider_1/prescaler_0/tspc_0/a_630_n680# gnd 1.16fF **FLOATING -C2574 divider_1/prescaler_0/tspc_0/a_740_n680# gnd 2.11fF **FLOATING -C2575 divider_1/nor_1/Z1 gnd 1.34fF -C2576 divider_1/mc2 gnd 5.29fF -C2577 divider_1/nor_0/Z1 gnd 1.34fF -C2578 divbuf_15/OUT gnd 363.82fF -C2579 divbuf_15/OUT5 gnd 350.37fF -C2580 divbuf_15/OUT4 gnd 133.72fF -C2581 divbuf_15/OUT3 gnd 34.03fF -C2582 divbuf_15/OUT2 gnd 8.71fF -C2583 divbuf_15/IN gnd 0.89fF -C2584 divbuf_15/a_492_n240# gnd 2.46fF **FLOATING -C2585 divbuf_25/OUT gnd 363.82fF -C2586 divbuf_25/OUT5 gnd 350.37fF -C2587 divbuf_25/OUT4 gnd 133.72fF -C2588 divbuf_25/OUT3 gnd 34.03fF -C2589 divbuf_25/OUT2 gnd 8.71fF -C2590 divbuf_25/IN gnd 0.89fF -C2591 divbuf_25/a_492_n240# gnd 2.46fF **FLOATING -C2592 divbuf_14/OUT gnd 363.82fF -C2593 divbuf_14/OUT5 gnd 350.37fF -C2594 divbuf_14/OUT4 gnd 133.72fF -C2595 divbuf_14/OUT3 gnd 34.03fF -C2596 divbuf_14/OUT2 gnd 8.71fF -C2597 divbuf_14/IN gnd 0.89fF -C2598 divbuf_14/a_492_n240# gnd 2.46fF **FLOATING -C2599 divider_0/and_0/Z1 gnd 0.74fF -C2600 divider_0/and_0/B gnd 2.25fF -C2601 divider_0/and_0/A gnd 2.19fF -C2602 divider_0/and_0/out1 gnd 2.93fF -C2603 divider_0/tspc_2/Z4 gnd 0.86fF -C2604 divider_0/tspc_2/Z3 gnd 2.26fF -C2605 divider_0/tspc_2/Z2 gnd 1.46fF -C2606 divider_0/tspc_2/Z1 gnd 0.99fF -C2607 divider_0/nor_0/A gnd 7.04fF -C2608 divider_0/tspc_2/a_630_n680# gnd 1.15fF **FLOATING -C2609 divider_0/tspc_1/Z4 gnd 0.86fF -C2610 divider_0/tspc_1/Z3 gnd 2.26fF -C2611 divider_0/tspc_1/Z2 gnd 1.46fF -C2612 divider_0/tspc_1/Z1 gnd 0.99fF -C2613 divider_0/nor_0/B gnd 7.05fF -C2614 divider_0/tspc_1/a_630_n680# gnd 1.15fF **FLOATING -C2615 divider_0/tspc_2/Q gnd 3.14fF -C2616 divider_0/tspc_0/Z4 gnd 0.86fF -C2617 divider_0/Out gnd 1.60fF -C2618 divider_0/tspc_0/Z3 gnd 2.26fF -C2619 divider_0/tspc_0/Z2 gnd 1.46fF -C2620 divider_0/tspc_0/Z1 gnd 0.99fF -C2621 divider_0/nor_1/B gnd 6.33fF -C2622 divider_0/tspc_0/a_630_n680# gnd 1.14fF **FLOATING -C2623 divider_0/tspc_1/Q gnd 3.12fF -C2624 divider_0/clk gnd 5.63fF -C2625 divider_0/prescaler_0/nand_1/z1 gnd 0.36fF -C2626 divider_0/prescaler_0/tspc_0/D gnd 2.64fF -C2627 divider_0/prescaler_0/tspc_2/Q gnd 3.64fF -C2628 divider_0/prescaler_0/tspc_1/Q gnd 3.61fF -C2629 divider_0/prescaler_0/nand_0/z1 gnd 0.36fF -C2630 divider_0/prescaler_0/tspc_2/D gnd 3.12fF -C2631 divider_0/and_0/OUT gnd 5.62fF -C2632 divider_0/prescaler_0/tspc_2/Z4 gnd 0.86fF -C2633 divider_0/prescaler_0/tspc_2/Z3 gnd 2.26fF -C2634 divider_0/prescaler_0/tspc_2/Z2 gnd 1.46fF -C2635 divider_0/prescaler_0/tspc_2/Z1 gnd 0.99fF -C2636 divider_0/prescaler_0/tspc_2/a_630_n680# gnd 1.14fF **FLOATING -C2637 divider_0/prescaler_0/tspc_2/a_740_n680# gnd 2.11fF **FLOATING -C2638 divider_0/prescaler_0/tspc_1/Z4 gnd 0.86fF -C2639 divider_0/prescaler_0/tspc_1/Z3 gnd 2.26fF -C2640 divider_0/prescaler_0/tspc_1/Z2 gnd 1.48fF -C2641 divider_0/prescaler_0/tspc_1/Z1 gnd 0.99fF -C2642 divider_0/prescaler_0/tspc_1/a_630_n680# gnd 1.14fF **FLOATING -C2643 divider_0/prescaler_0/m1_2700_2190# gnd 4.22fF **FLOATING -C2644 divider_0/prescaler_0/tspc_0/Z4 gnd 0.86fF -C2645 divider_0/prescaler_0/Out gnd 4.59fF -C2646 divider_0/prescaler_0/tspc_0/Z3 gnd 2.26fF -C2647 divider_0/prescaler_0/tspc_0/Z2 gnd 1.46fF -C2648 divider_0/prescaler_0/tspc_0/Z1 gnd 0.99fF -C2649 divider_0/prescaler_0/tspc_0/a_630_n680# gnd 1.16fF **FLOATING -C2650 divider_0/prescaler_0/tspc_0/a_740_n680# gnd 2.11fF **FLOATING -C2651 divider_0/nor_1/Z1 gnd 1.34fF -C2652 divider_0/mc2 gnd 5.29fF -C2653 divider_0/nor_0/Z1 gnd 1.34fF -C2654 divbuf_24/OUT gnd 363.82fF -C2655 divbuf_24/OUT5 gnd 350.37fF -C2656 divbuf_24/OUT4 gnd 133.72fF -C2657 divbuf_24/OUT3 gnd 34.03fF -C2658 divbuf_24/OUT2 gnd 8.71fF -C2659 divbuf_24/IN gnd 0.89fF -C2660 divbuf_24/a_492_n240# gnd 2.46fF **FLOATING -C2661 divbuf_13/OUT gnd 363.82fF -C2662 divbuf_13/OUT5 gnd 350.37fF -C2663 divbuf_13/OUT4 gnd 133.72fF -C2664 divbuf_13/OUT3 gnd 34.03fF -C2665 divbuf_13/OUT2 gnd 8.71fF -C2666 divbuf_13/IN gnd 0.89fF -C2667 divbuf_13/a_492_n240# gnd 2.46fF **FLOATING -C2668 divbuf_9/OUT gnd 363.82fF -C2669 divbuf_9/OUT5 gnd 350.37fF -C2670 divbuf_9/OUT4 gnd 133.72fF -C2671 divbuf_9/OUT3 gnd 34.03fF -C2672 divbuf_9/OUT2 gnd 8.71fF -C2673 divbuf_9/IN gnd 0.89fF -C2674 divbuf_9/a_492_n240# gnd 2.46fF **FLOATING -C2675 divbuf_23/OUT gnd 363.82fF -C2676 divbuf_23/OUT5 gnd 350.37fF -C2677 divbuf_23/OUT4 gnd 133.72fF -C2678 divbuf_23/OUT3 gnd 34.03fF -C2679 divbuf_23/OUT2 gnd 8.71fF -C2680 divbuf_23/IN gnd 0.89fF -C2681 divbuf_23/a_492_n240# gnd 2.46fF **FLOATING -C2682 divbuf_12/OUT gnd 363.82fF -C2683 divbuf_12/OUT5 gnd 350.37fF -C2684 divbuf_12/OUT4 gnd 133.72fF -C2685 divbuf_12/OUT3 gnd 34.03fF -C2686 divbuf_12/OUT2 gnd 8.71fF -C2687 divbuf_12/IN gnd 0.89fF -C2688 divbuf_12/a_492_n240# gnd 2.46fF **FLOATING -C2689 divbuf_8/OUT gnd 363.82fF -C2690 divbuf_8/OUT5 gnd 350.37fF -C2691 divbuf_8/OUT4 gnd 133.72fF -C2692 divbuf_8/OUT3 gnd 34.03fF -C2693 divbuf_8/OUT2 gnd 8.71fF -C2694 divbuf_8/IN gnd 0.89fF -C2695 divbuf_8/a_492_n240# gnd 2.46fF **FLOATING -C2696 divbuf_22/OUT gnd 363.82fF -C2697 divbuf_22/OUT5 gnd 350.37fF -C2698 divbuf_22/OUT4 gnd 133.72fF -C2699 divbuf_22/OUT3 gnd 34.03fF -C2700 divbuf_22/OUT2 gnd 8.71fF -C2701 divbuf_22/IN gnd 0.89fF -C2702 divbuf_22/a_492_n240# gnd 2.46fF **FLOATING -C2703 divbuf_11/OUT gnd 363.82fF -C2704 divbuf_11/OUT5 gnd 350.37fF -C2705 divbuf_11/OUT4 gnd 133.72fF -C2706 divbuf_11/OUT3 gnd 34.03fF -C2707 divbuf_11/OUT2 gnd 8.71fF -C2708 divbuf_11/IN gnd 0.89fF -C2709 divbuf_11/a_492_n240# gnd 2.46fF **FLOATING -C2710 divbuf_7/OUT gnd 363.82fF -C2711 divbuf_7/OUT5 gnd 350.37fF -C2712 divbuf_7/OUT4 gnd 133.72fF -C2713 divbuf_7/OUT3 gnd 34.03fF -C2714 divbuf_7/OUT2 gnd 8.71fF -C2715 divbuf_7/IN gnd 0.89fF -C2716 divbuf_7/a_492_n240# gnd 2.46fF **FLOATING -C2717 divbuf_21/OUT gnd 363.82fF -C2718 divbuf_21/OUT5 gnd 350.37fF -C2719 divbuf_21/OUT4 gnd 133.72fF -C2720 divbuf_21/OUT3 gnd 34.03fF -C2721 divbuf_21/OUT2 gnd 8.71fF -C2722 divbuf_21/IN gnd 0.89fF -C2723 divbuf_21/a_492_n240# gnd 2.46fF **FLOATING -C2724 divbuf_20/OUT gnd 363.82fF -C2725 divbuf_20/OUT5 gnd 350.37fF -C2726 divbuf_20/OUT4 gnd 133.72fF -C2727 divbuf_20/OUT3 gnd 34.03fF -C2728 divbuf_20/OUT2 gnd 8.71fF -C2729 divbuf_20/IN gnd 0.89fF -C2730 divbuf_20/a_492_n240# gnd 2.46fF **FLOATING -C2731 divbuf_10/OUT gnd 363.82fF -C2732 divbuf_10/OUT5 gnd 350.37fF -C2733 divbuf_10/OUT4 gnd 133.72fF -C2734 divbuf_10/OUT3 gnd 34.03fF -C2735 divbuf_10/OUT2 gnd 8.71fF -C2736 divbuf_10/IN gnd 0.89fF -C2737 divbuf_10/a_492_n240# gnd 2.46fF **FLOATING -C2738 divbuf_6/OUT gnd 363.82fF -C2739 divbuf_6/OUT5 gnd 350.37fF -C2740 divbuf_6/OUT4 gnd 133.72fF -C2741 divbuf_6/OUT3 gnd 34.03fF -C2742 divbuf_6/OUT2 gnd 8.71fF -C2743 divbuf_6/IN gnd 0.89fF -C2744 divbuf_6/a_492_n240# gnd 2.46fF **FLOATING -C2745 divbuf_5/OUT gnd 363.82fF -C2746 divbuf_5/OUT5 gnd 350.37fF -C2747 divbuf_5/OUT4 gnd 133.72fF -C2748 divbuf_5/OUT3 gnd 34.03fF -C2749 divbuf_5/OUT2 gnd 8.71fF -C2750 divbuf_5/IN gnd 0.89fF -C2751 divbuf_5/a_492_n240# gnd 2.46fF **FLOATING -C2752 divbuf_4/OUT gnd 363.82fF -C2753 divbuf_4/OUT5 gnd 350.37fF -C2754 divbuf_4/OUT4 gnd 133.72fF -C2755 divbuf_4/OUT3 gnd 34.03fF -C2756 divbuf_4/OUT2 gnd 8.71fF -C2757 divbuf_4/IN gnd 0.89fF -C2758 divbuf_4/a_492_n240# gnd 2.46fF **FLOATING -C2759 divbuf_3/OUT gnd 363.82fF -C2760 divbuf_3/OUT5 gnd 350.37fF -C2761 divbuf_3/OUT4 gnd 133.72fF -C2762 divbuf_3/OUT3 gnd 34.03fF -C2763 divbuf_3/OUT2 gnd 8.71fF -C2764 divbuf_3/IN gnd 0.89fF -C2765 divbuf_3/a_492_n240# gnd 2.46fF **FLOATING -C2766 divbuf_2/OUT gnd 363.82fF -C2767 divbuf_2/OUT5 gnd 350.37fF -C2768 divbuf_2/OUT4 gnd 133.72fF -C2769 divbuf_2/OUT3 gnd 34.03fF -C2770 divbuf_2/OUT2 gnd 8.71fF -C2771 divbuf_2/IN gnd 0.89fF -C2772 divbuf_2/a_492_n240# gnd 2.46fF **FLOATING -C2773 divbuf_1/OUT gnd 363.82fF -C2774 divbuf_1/OUT5 gnd 350.37fF -C2775 divbuf_1/OUT4 gnd 133.72fF -C2776 divbuf_1/OUT3 gnd 34.03fF -C2777 divbuf_1/OUT2 gnd 8.71fF -C2778 divbuf_1/IN gnd 0.89fF -C2779 divbuf_1/a_492_n240# gnd 2.46fF **FLOATING -C2780 ro_complete_1/cbank_2/v gnd 16.43fF -C2781 ro_complete_1/cbank_2/switch_5/vin gnd 0.78fF -C2782 ro_complete_1/cbank_2/switch_4/vin gnd 1.50fF -C2783 ro_complete_1/cbank_2/switch_2/vin gnd 1.30fF -C2784 ro_complete_1/cbank_2/switch_3/vin gnd 0.56fF -C2785 ro_complete_1/cbank_2/switch_1/vin gnd 1.14fF -C2786 ro_complete_1/cbank_2/switch_0/vin gnd 1.02fF -C2787 ro_complete_1/cbank_1/v gnd 16.43fF -C2788 ro_complete_1/cbank_1/switch_5/vin gnd 0.78fF -C2789 ro_complete_1/a0 gnd 5.35fF -C2790 ro_complete_1/cbank_1/switch_4/vin gnd 1.50fF -C2791 ro_complete_1/a1 gnd 6.54fF -C2792 ro_complete_1/cbank_1/switch_2/vin gnd 1.30fF -C2793 ro_complete_1/a3 gnd 5.96fF -C2794 ro_complete_1/cbank_1/switch_3/vin gnd 0.56fF -C2795 ro_complete_1/a2 gnd 5.21fF -C2796 ro_complete_1/cbank_1/switch_1/vin gnd 1.14fF -C2797 ro_complete_1/a4 gnd 5.81fF -C2798 ro_complete_1/cbank_1/switch_0/vin gnd 1.02fF -C2799 ro_complete_1/a5 gnd 6.74fF -C2800 ro_complete_1/cbank_0/v gnd 15.12fF -C2801 ro_complete_1/cbank_0/switch_5/vin gnd 0.78fF -C2802 ro_complete_1/cbank_0/switch_4/vin gnd 1.50fF -C2803 ro_complete_1/cbank_0/switch_2/vin gnd 1.30fF -C2804 ro_complete_1/cbank_0/switch_3/vin gnd 0.56fF -C2805 ro_complete_1/cbank_0/switch_1/vin gnd 1.14fF -C2806 ro_complete_1/cbank_0/switch_0/vin gnd 1.02fF -C2807 ro_complete_1/ro_var_extend_0/vcont gnd 0.27fF -C2808 divbuf_0/OUT gnd 363.82fF -C2809 divbuf_0/OUT5 gnd 350.37fF -C2810 divbuf_0/OUT4 gnd 133.72fF -C2811 divbuf_0/OUT3 gnd 34.03fF -C2812 divbuf_0/OUT2 gnd 8.71fF -C2813 divbuf_0/IN gnd 0.89fF -C2814 divbuf_0/a_492_n240# gnd 2.46fF **FLOATING -C2815 ro_complete_0/cbank_2/v gnd 16.43fF -C2816 ro_complete_0/cbank_2/switch_5/vin gnd 0.78fF -C2817 ro_complete_0/cbank_2/switch_4/vin gnd 1.50fF -C2818 ro_complete_0/cbank_2/switch_2/vin gnd 1.30fF -C2819 ro_complete_0/cbank_2/switch_3/vin gnd 0.56fF -C2820 ro_complete_0/cbank_2/switch_1/vin gnd 1.14fF -C2821 ro_complete_0/cbank_2/switch_0/vin gnd 1.02fF -C2822 ro_complete_0/cbank_1/v gnd 16.46fF -C2823 ro_complete_0/cbank_1/switch_5/vin gnd 0.78fF -C2824 ro_complete_0/a0 gnd 5.35fF -C2825 ro_complete_0/cbank_1/switch_4/vin gnd 1.50fF -C2826 ro_complete_0/a1 gnd 6.54fF -C2827 ro_complete_0/cbank_1/switch_2/vin gnd 1.30fF -C2828 ro_complete_0/a3 gnd 5.96fF -C2829 ro_complete_0/cbank_1/switch_3/vin gnd 0.56fF -C2830 ro_complete_0/a2 gnd 5.21fF -C2831 ro_complete_0/cbank_1/switch_1/vin gnd 1.14fF -C2832 ro_complete_0/a4 gnd 5.81fF -C2833 ro_complete_0/cbank_1/switch_0/vin gnd 1.02fF -C2834 ro_complete_0/a5 gnd 6.74fF -C2835 ro_complete_0/cbank_0/v gnd 15.12fF -C2836 ro_complete_0/cbank_0/switch_5/vin gnd 0.78fF -C2837 ro_complete_0/cbank_0/switch_4/vin gnd 1.50fF -C2838 ro_complete_0/cbank_0/switch_2/vin gnd 1.30fF -C2839 ro_complete_0/cbank_0/switch_3/vin gnd 0.56fF -C2840 ro_complete_0/cbank_0/switch_1/vin gnd 1.14fF -C2841 ro_complete_0/cbank_0/switch_0/vin gnd 1.02fF -C2842 ro_complete_0/ro_var_extend_0/vcont gnd 0.27fF -C2843 filter_0/v gnd 85.69fF -C2844 filter_0/a_4216_n5230# gnd 418.47fF **FLOATING -C2845 filter_0/a_4216_n2998# gnd 1.03fF **FLOATING -C2846 cp_0/down gnd 1.54fF -C2847 cp_0/vbias gnd 2.41fF -C2848 cp_0/out gnd 5.34fF -C2849 cp_0/upbar gnd 1.50fF -C2850 cp_0/a_7110_n2840# gnd 0.17fF **FLOATING -C2851 cp_0/a_3060_n2840# gnd 1.71fF **FLOATING -C2852 cp_0/a_7110_0# gnd 0.17fF **FLOATING -C2853 cp_0/a_6370_0# gnd 0.40fF **FLOATING -C2854 cp_0/a_3060_0# gnd 1.66fF **FLOATING -C2855 cp_0/a_1710_0# gnd 5.89fF **FLOATING -C2856 cp_0/a_1710_n2840# gnd 4.91fF **FLOATING -C2857 cp_0/a_10_n50# gnd 2.96fF **FLOATING -C2858 pd_1/and_pd_0/Z1 gnd 0.39fF -C2859 pd_1/and_pd_0/Out1 gnd 2.22fF -C2860 pd_1/tspc_r_1/z5 gnd 1.10fF -C2861 pd_1/tspc_r_1/Z4 gnd 1.07fF -C2862 pd_1/tspc_r_1/Qbar gnd 0.88fF -C2863 pd_1/tspc_r_1/Z2 gnd 1.22fF -C2864 pd_1/tspc_r_1/Z1 gnd 0.67fF -C2865 pd_1/UP gnd 2.21fF -C2866 pd_1/tspc_r_1/Qbar1 gnd 1.34fF -C2867 pd_1/tspc_r_1/Z3 gnd 2.12fF -C2868 pd_1/REF gnd 1.80fF -C2869 pd_1/tspc_r_0/z5 gnd 1.10fF -C2870 pd_1/tspc_r_0/Z4 gnd 1.07fF -C2871 pd_1/R gnd 3.05fF -C2872 pd_1/tspc_r_0/Qbar gnd 0.79fF -C2873 pd_1/tspc_r_0/Z2 gnd 1.22fF -C2874 pd_1/tspc_r_0/Z1 gnd 0.67fF -C2875 pd_1/DOWN gnd 3.08fF -C2876 pd_1/tspc_r_0/Qbar1 gnd 1.34fF -C2877 pd_1/tspc_r_0/Z3 gnd 2.12fF -C2878 pd_1/DIV gnd 1.82fF -C2879 pd_0/and_pd_0/Z1 gnd 0.39fF -C2880 pd_0/and_pd_0/Out1 gnd 2.22fF -C2881 pd_0/tspc_r_1/z5 gnd 1.10fF -C2882 pd_0/tspc_r_1/Z4 gnd 1.07fF -C2883 pd_0/tspc_r_1/Qbar gnd 0.88fF -C2884 pd_0/tspc_r_1/Z2 gnd 1.22fF -C2885 pd_0/tspc_r_1/Z1 gnd 0.67fF -C2886 pd_0/UP gnd 2.21fF -C2887 pd_0/tspc_r_1/Qbar1 gnd 1.34fF -C2888 pd_0/tspc_r_1/Z3 gnd 2.12fF -C2889 pd_0/REF gnd 1.80fF -C2890 pd_0/tspc_r_0/z5 gnd 1.10fF -C2891 pd_0/tspc_r_0/Z4 gnd 1.07fF -C2892 pd_0/R gnd 3.05fF -C2893 pd_0/tspc_r_0/Qbar gnd 0.79fF -C2894 pd_0/tspc_r_0/Z2 gnd 1.22fF -C2895 pd_0/tspc_r_0/Z1 gnd 0.67fF -C2896 pd_0/DOWN gnd 3.08fF -C2897 pd_0/tspc_r_0/Qbar1 gnd 1.34fF -C2898 pd_0/tspc_r_0/Z3 gnd 2.12fF -C2899 pd_0/DIV gnd 1.82fF +C2377 pll_full_0/divbuf_0/OUT gnd 363.82fF +C2378 pll_full_0/divbuf_0/OUT5 gnd 350.37fF +C2379 pll_full_0/divbuf_0/OUT4 gnd 133.72fF +C2380 pll_full_0/divbuf_0/OUT3 gnd 34.03fF +C2381 pll_full_0/divbuf_0/OUT2 gnd 8.71fF +C2382 pll_full_0/divbuf_0/a_492_n240# gnd 2.46fF **FLOATING +C2383 pll_full_0/ro_complete_0/cbank_2/v gnd 16.43fF +C2384 pll_full_0/ro_complete_0/cbank_2/switch_5/vin gnd 0.78fF +C2385 pll_full_0/ro_complete_0/cbank_2/switch_4/vin gnd 1.50fF +C2386 pll_full_0/ro_complete_0/cbank_2/switch_2/vin gnd 1.30fF +C2387 pll_full_0/ro_complete_0/cbank_2/switch_3/vin gnd 0.56fF +C2388 pll_full_0/ro_complete_0/cbank_2/switch_1/vin gnd 1.14fF +C2389 pll_full_0/ro_complete_0/cbank_2/switch_0/vin gnd 1.02fF +C2390 pll_full_0/ro_complete_0/cbank_1/switch_5/vin gnd 0.78fF +C2391 pll_full_0/ro_complete_0/a0 gnd 5.35fF +C2392 pll_full_0/ro_complete_0/cbank_1/switch_4/vin gnd 1.50fF +C2393 pll_full_0/ro_complete_0/a1 gnd 6.54fF +C2394 pll_full_0/ro_complete_0/cbank_1/switch_2/vin gnd 1.30fF +C2395 pll_full_0/ro_complete_0/a3 gnd 5.96fF +C2396 pll_full_0/ro_complete_0/cbank_1/switch_3/vin gnd 0.56fF +C2397 pll_full_0/ro_complete_0/a2 gnd 5.21fF +C2398 pll_full_0/ro_complete_0/cbank_1/switch_1/vin gnd 1.14fF +C2399 pll_full_0/ro_complete_0/a4 gnd 5.81fF +C2400 pll_full_0/ro_complete_0/cbank_1/switch_0/vin gnd 1.02fF +C2401 pll_full_0/ro_complete_0/a5 gnd 6.74fF +C2402 pll_full_0/ro_complete_0/cbank_0/v gnd 15.12fF +C2403 pll_full_0/ro_complete_0/cbank_0/switch_5/vin gnd 0.78fF +C2404 pll_full_0/ro_complete_0/cbank_0/switch_4/vin gnd 1.50fF +C2405 pll_full_0/ro_complete_0/cbank_0/switch_2/vin gnd 1.30fF +C2406 pll_full_0/ro_complete_0/cbank_0/switch_3/vin gnd 0.56fF +C2407 pll_full_0/ro_complete_0/cbank_0/switch_1/vin gnd 1.14fF +C2408 pll_full_0/ro_complete_0/cbank_0/switch_0/vin gnd 1.02fF +C2409 pll_full_0/ro_complete_0/ro_var_extend_0/vcont gnd 0.27fF +C2410 pll_full_0/filter_0/a_4216_n5230# gnd 418.90fF **FLOATING +C2411 pll_full_0/filter_0/a_4216_n2998# gnd 1.39fF **FLOATING +C2412 pll_full_0/cp_0/down gnd 1.54fF +C2413 pll_full_0/cp_0/upbar gnd 1.79fF +C2414 pll_full_0/cp_0/a_7110_n2840# gnd 0.17fF **FLOATING +C2415 pll_full_0/cp_0/a_3060_n2840# gnd 1.71fF **FLOATING +C2416 pll_full_0/cp_0/a_7110_0# gnd 0.17fF **FLOATING +C2417 pll_full_0/cp_0/a_6370_0# gnd 0.40fF **FLOATING +C2418 pll_full_0/cp_0/a_3060_0# gnd 2.49fF **FLOATING +C2419 pll_full_0/cp_0/a_1710_0# gnd 7.47fF **FLOATING +C2420 pll_full_0/pd_0/and_pd_0/Z1 gnd 0.39fF +C2421 pll_full_0/pd_0/and_pd_0/Out1 gnd 2.22fF +C2422 pll_full_0/pd_0/tspc_r_1/z5 gnd 1.10fF +C2423 pll_full_0/pd_0/tspc_r_1/Z4 gnd 1.07fF +C2424 pll_full_0/pd_0/tspc_r_1/Qbar gnd 0.88fF +C2425 pll_full_0/pd_0/tspc_r_1/Z2 gnd 1.22fF +C2426 pll_full_0/pd_0/tspc_r_1/Z1 gnd 0.67fF +C2427 pll_full_0/pd_0/UP gnd 6.41fF +C2428 pll_full_0/pd_0/tspc_r_1/Qbar1 gnd 1.34fF +C2429 pll_full_0/pd_0/tspc_r_1/Z3 gnd 2.12fF +C2430 pll_full_0/pd_0/REF gnd 6.48fF +C2431 pll_full_0/pd_0/tspc_r_0/z5 gnd 1.10fF +C2432 pll_full_0/pd_0/tspc_r_0/Z4 gnd 1.07fF +C2433 pll_full_0/pd_0/R gnd 3.05fF +C2434 pll_full_0/pd_0/tspc_r_0/Qbar gnd 0.79fF +C2435 pll_full_0/pd_0/tspc_r_0/Z2 gnd 1.22fF +C2436 pll_full_0/pd_0/tspc_r_0/Z1 gnd 0.67fF +C2437 pll_full_0/pd_0/DOWN gnd 7.34fF +C2438 pll_full_0/pd_0/tspc_r_0/Qbar1 gnd 1.34fF +C2439 pll_full_0/pd_0/tspc_r_0/Z3 gnd 2.12fF +C2440 pll_full_0/pd_0/DIV gnd 372.69fF +C2441 divbuf_19/OUT gnd 363.82fF +C2442 divbuf_19/OUT5 gnd 350.37fF +C2443 divbuf_19/OUT4 gnd 133.72fF +C2444 divbuf_19/OUT3 gnd 34.03fF +C2445 divbuf_19/OUT2 gnd 8.71fF +C2446 divbuf_19/IN gnd 0.89fF +C2447 divbuf_19/a_492_n240# gnd 2.46fF **FLOATING +C2448 divbuf_18/OUT gnd 363.82fF +C2449 divbuf_18/OUT5 gnd 350.37fF +C2450 divbuf_18/OUT4 gnd 133.72fF +C2451 divbuf_18/OUT3 gnd 34.03fF +C2452 divbuf_18/OUT2 gnd 8.71fF +C2453 divbuf_18/IN gnd 0.89fF +C2454 divbuf_18/a_492_n240# gnd 2.46fF **FLOATING +C2455 divbuf_17/OUT gnd 363.82fF +C2456 divbuf_17/OUT5 gnd 350.37fF +C2457 divbuf_17/OUT4 gnd 133.72fF +C2458 divbuf_17/OUT3 gnd 34.03fF +C2459 divbuf_17/OUT2 gnd 8.71fF +C2460 divbuf_17/IN gnd 0.89fF +C2461 divbuf_17/a_492_n240# gnd 2.46fF **FLOATING +C2462 divider_2/and_0/Z1 gnd 0.74fF +C2463 divider_2/and_0/B gnd 2.25fF +C2464 divider_2/and_0/A gnd 2.19fF +C2465 divider_2/and_0/out1 gnd 2.93fF +C2466 divider_2/tspc_2/Z4 gnd 0.86fF +C2467 divider_2/tspc_2/Z3 gnd 2.26fF +C2468 divider_2/tspc_2/Z2 gnd 1.46fF +C2469 divider_2/tspc_2/Z1 gnd 0.99fF +C2470 divider_2/nor_0/A gnd 7.04fF +C2471 divider_2/tspc_2/a_630_n680# gnd 1.15fF **FLOATING +C2472 divider_2/tspc_1/Z4 gnd 0.86fF +C2473 divider_2/tspc_1/Z3 gnd 2.26fF +C2474 divider_2/tspc_1/Z2 gnd 1.46fF +C2475 divider_2/tspc_1/Z1 gnd 0.99fF +C2476 divider_2/nor_0/B gnd 7.05fF +C2477 divider_2/tspc_1/a_630_n680# gnd 1.15fF **FLOATING +C2478 divider_2/tspc_2/Q gnd 3.14fF +C2479 divider_2/tspc_0/Z4 gnd 0.86fF +C2480 divider_2/Out gnd 1.60fF +C2481 divider_2/tspc_0/Z3 gnd 2.26fF +C2482 divider_2/tspc_0/Z2 gnd 1.46fF +C2483 divider_2/tspc_0/Z1 gnd 0.99fF +C2484 divider_2/nor_1/B gnd 6.33fF +C2485 divider_2/tspc_0/a_630_n680# gnd 1.14fF **FLOATING +C2486 divider_2/tspc_1/Q gnd 3.12fF +C2487 divider_2/clk gnd 5.63fF +C2488 divider_2/prescaler_0/nand_1/z1 gnd 0.36fF +C2489 divider_2/prescaler_0/tspc_0/D gnd 2.64fF +C2490 divider_2/prescaler_0/tspc_2/Q gnd 3.74fF +C2491 divider_2/prescaler_0/tspc_1/Q gnd 3.61fF +C2492 divider_2/prescaler_0/nand_0/z1 gnd 0.36fF +C2493 divider_2/prescaler_0/tspc_2/D gnd 3.12fF +C2494 divider_2/and_0/OUT gnd 5.62fF +C2495 divider_2/prescaler_0/tspc_2/Z4 gnd 0.86fF +C2496 divider_2/prescaler_0/tspc_2/Z3 gnd 2.26fF +C2497 divider_2/prescaler_0/tspc_2/Z2 gnd 1.46fF +C2498 divider_2/prescaler_0/tspc_2/Z1 gnd 0.99fF +C2499 divider_2/prescaler_0/tspc_2/a_630_n680# gnd 1.14fF **FLOATING +C2500 divider_2/prescaler_0/tspc_2/a_740_n680# gnd 2.11fF **FLOATING +C2501 divider_2/prescaler_0/tspc_1/Z4 gnd 0.86fF +C2502 divider_2/prescaler_0/tspc_1/Z3 gnd 2.26fF +C2503 divider_2/prescaler_0/tspc_1/Z2 gnd 1.48fF +C2504 divider_2/prescaler_0/tspc_1/Z1 gnd 0.99fF +C2505 divider_2/prescaler_0/tspc_1/a_630_n680# gnd 1.14fF **FLOATING +C2506 divider_2/prescaler_0/m1_2700_2190# gnd 4.22fF **FLOATING +C2507 divider_2/prescaler_0/tspc_0/Z4 gnd 0.86fF +C2508 divider_2/prescaler_0/Out gnd 4.59fF +C2509 divider_2/prescaler_0/tspc_0/Z3 gnd 2.26fF +C2510 divider_2/prescaler_0/tspc_0/Z2 gnd 1.46fF +C2511 divider_2/prescaler_0/tspc_0/Z1 gnd 0.99fF +C2512 divider_2/prescaler_0/tspc_0/a_630_n680# gnd 1.16fF **FLOATING +C2513 divider_2/prescaler_0/tspc_0/a_740_n680# gnd 2.11fF **FLOATING +C2514 divider_2/nor_1/Z1 gnd 1.34fF +C2515 divider_2/mc2 gnd 5.29fF +C2516 divider_2/nor_0/Z1 gnd 1.34fF +C2517 divbuf_16/OUT gnd 363.82fF +C2518 divbuf_16/OUT5 gnd 350.37fF +C2519 divbuf_16/OUT4 gnd 133.72fF +C2520 divbuf_16/OUT3 gnd 34.03fF +C2521 divbuf_16/OUT2 gnd 8.71fF +C2522 divbuf_16/IN gnd 0.89fF +C2523 divbuf_16/a_492_n240# gnd 2.46fF **FLOATING +C2524 divider_1/and_0/Z1 gnd 0.74fF +C2525 divider_1/and_0/B gnd 2.25fF +C2526 divider_1/and_0/A gnd 2.19fF +C2527 divider_1/and_0/out1 gnd 2.93fF +C2528 divider_1/tspc_2/Z4 gnd 0.86fF +C2529 divider_1/tspc_2/Z3 gnd 2.26fF +C2530 divider_1/tspc_2/Z2 gnd 1.46fF +C2531 divider_1/tspc_2/Z1 gnd 0.99fF +C2532 divider_1/nor_0/A gnd 7.04fF +C2533 divider_1/tspc_2/a_630_n680# gnd 1.15fF **FLOATING +C2534 divider_1/tspc_1/Z4 gnd 0.86fF +C2535 divider_1/tspc_1/Z3 gnd 2.26fF +C2536 divider_1/tspc_1/Z2 gnd 1.46fF +C2537 divider_1/tspc_1/Z1 gnd 0.99fF +C2538 divider_1/nor_0/B gnd 7.05fF +C2539 divider_1/tspc_1/a_630_n680# gnd 1.15fF **FLOATING +C2540 divider_1/tspc_2/Q gnd 3.14fF +C2541 divider_1/tspc_0/Z4 gnd 0.86fF +C2542 divider_1/Out gnd 1.60fF +C2543 divider_1/tspc_0/Z3 gnd 2.26fF +C2544 divider_1/tspc_0/Z2 gnd 1.46fF +C2545 divider_1/tspc_0/Z1 gnd 0.99fF +C2546 divider_1/nor_1/B gnd 6.33fF +C2547 divider_1/tspc_0/a_630_n680# gnd 1.14fF **FLOATING +C2548 divider_1/tspc_1/Q gnd 3.12fF +C2549 divider_1/clk gnd 5.63fF +C2550 divider_1/prescaler_0/nand_1/z1 gnd 0.36fF +C2551 divider_1/prescaler_0/tspc_0/D gnd 2.64fF +C2552 divider_1/prescaler_0/tspc_2/Q gnd 3.74fF +C2553 divider_1/prescaler_0/tspc_1/Q gnd 3.61fF +C2554 divider_1/prescaler_0/nand_0/z1 gnd 0.36fF +C2555 divider_1/prescaler_0/tspc_2/D gnd 3.12fF +C2556 divider_1/and_0/OUT gnd 5.62fF +C2557 divider_1/prescaler_0/tspc_2/Z4 gnd 0.86fF +C2558 divider_1/prescaler_0/tspc_2/Z3 gnd 2.26fF +C2559 divider_1/prescaler_0/tspc_2/Z2 gnd 1.46fF +C2560 divider_1/prescaler_0/tspc_2/Z1 gnd 0.99fF +C2561 divider_1/prescaler_0/tspc_2/a_630_n680# gnd 1.14fF **FLOATING +C2562 divider_1/prescaler_0/tspc_2/a_740_n680# gnd 2.11fF **FLOATING +C2563 divider_1/prescaler_0/tspc_1/Z4 gnd 0.86fF +C2564 divider_1/prescaler_0/tspc_1/Z3 gnd 2.26fF +C2565 divider_1/prescaler_0/tspc_1/Z2 gnd 1.48fF +C2566 divider_1/prescaler_0/tspc_1/Z1 gnd 0.99fF +C2567 divider_1/prescaler_0/tspc_1/a_630_n680# gnd 1.14fF **FLOATING +C2568 divider_1/prescaler_0/m1_2700_2190# gnd 4.22fF **FLOATING +C2569 divider_1/prescaler_0/tspc_0/Z4 gnd 0.86fF +C2570 divider_1/prescaler_0/Out gnd 4.59fF +C2571 divider_1/prescaler_0/tspc_0/Z3 gnd 2.26fF +C2572 divider_1/prescaler_0/tspc_0/Z2 gnd 1.46fF +C2573 divider_1/prescaler_0/tspc_0/Z1 gnd 0.99fF +C2574 divider_1/prescaler_0/tspc_0/a_630_n680# gnd 1.16fF **FLOATING +C2575 divider_1/prescaler_0/tspc_0/a_740_n680# gnd 2.11fF **FLOATING +C2576 divider_1/nor_1/Z1 gnd 1.34fF +C2577 divider_1/mc2 gnd 5.29fF +C2578 divider_1/nor_0/Z1 gnd 1.34fF +C2579 divbuf_15/OUT gnd 363.82fF +C2580 divbuf_15/OUT5 gnd 350.37fF +C2581 divbuf_15/OUT4 gnd 133.72fF +C2582 divbuf_15/OUT3 gnd 34.03fF +C2583 divbuf_15/OUT2 gnd 8.71fF +C2584 divbuf_15/IN gnd 0.89fF +C2585 divbuf_15/a_492_n240# gnd 2.46fF **FLOATING +C2586 divbuf_25/OUT gnd 363.82fF +C2587 divbuf_25/OUT5 gnd 350.37fF +C2588 divbuf_25/OUT4 gnd 133.72fF +C2589 divbuf_25/OUT3 gnd 34.03fF +C2590 divbuf_25/OUT2 gnd 8.71fF +C2591 divbuf_25/IN gnd 0.89fF +C2592 divbuf_25/a_492_n240# gnd 2.46fF **FLOATING +C2593 divbuf_14/OUT gnd 363.82fF +C2594 divbuf_14/OUT5 gnd 350.37fF +C2595 divbuf_14/OUT4 gnd 133.72fF +C2596 divbuf_14/OUT3 gnd 34.03fF +C2597 divbuf_14/OUT2 gnd 8.71fF +C2598 divbuf_14/IN gnd 0.89fF +C2599 divbuf_14/a_492_n240# gnd 2.46fF **FLOATING +C2600 divider_0/and_0/Z1 gnd 0.74fF +C2601 divider_0/and_0/B gnd 2.25fF +C2602 divider_0/and_0/A gnd 2.19fF +C2603 divider_0/and_0/out1 gnd 2.93fF +C2604 divider_0/tspc_2/Z4 gnd 0.86fF +C2605 divider_0/tspc_2/Z3 gnd 2.26fF +C2606 divider_0/tspc_2/Z2 gnd 1.46fF +C2607 divider_0/tspc_2/Z1 gnd 0.99fF +C2608 divider_0/nor_0/A gnd 7.04fF +C2609 divider_0/tspc_2/a_630_n680# gnd 1.15fF **FLOATING +C2610 divider_0/tspc_1/Z4 gnd 0.86fF +C2611 divider_0/tspc_1/Z3 gnd 2.26fF +C2612 divider_0/tspc_1/Z2 gnd 1.46fF +C2613 divider_0/tspc_1/Z1 gnd 0.99fF +C2614 divider_0/nor_0/B gnd 7.05fF +C2615 divider_0/tspc_1/a_630_n680# gnd 1.15fF **FLOATING +C2616 divider_0/tspc_2/Q gnd 3.14fF +C2617 divider_0/tspc_0/Z4 gnd 0.86fF +C2618 divider_0/Out gnd 1.60fF +C2619 divider_0/tspc_0/Z3 gnd 2.26fF +C2620 divider_0/tspc_0/Z2 gnd 1.46fF +C2621 divider_0/tspc_0/Z1 gnd 0.99fF +C2622 divider_0/nor_1/B gnd 6.33fF +C2623 divider_0/tspc_0/a_630_n680# gnd 1.14fF **FLOATING +C2624 divider_0/tspc_1/Q gnd 3.12fF +C2625 divider_0/clk gnd 5.63fF +C2626 divider_0/prescaler_0/nand_1/z1 gnd 0.36fF +C2627 divider_0/prescaler_0/tspc_0/D gnd 2.64fF +C2628 divider_0/prescaler_0/tspc_2/Q gnd 3.64fF +C2629 divider_0/prescaler_0/tspc_1/Q gnd 3.61fF +C2630 divider_0/prescaler_0/nand_0/z1 gnd 0.36fF +C2631 divider_0/prescaler_0/tspc_2/D gnd 3.12fF +C2632 divider_0/and_0/OUT gnd 5.62fF +C2633 divider_0/prescaler_0/tspc_2/Z4 gnd 0.86fF +C2634 divider_0/prescaler_0/tspc_2/Z3 gnd 2.26fF +C2635 divider_0/prescaler_0/tspc_2/Z2 gnd 1.46fF +C2636 divider_0/prescaler_0/tspc_2/Z1 gnd 0.99fF +C2637 divider_0/prescaler_0/tspc_2/a_630_n680# gnd 1.14fF **FLOATING +C2638 divider_0/prescaler_0/tspc_2/a_740_n680# gnd 2.11fF **FLOATING +C2639 divider_0/prescaler_0/tspc_1/Z4 gnd 0.86fF +C2640 divider_0/prescaler_0/tspc_1/Z3 gnd 2.26fF +C2641 divider_0/prescaler_0/tspc_1/Z2 gnd 1.48fF +C2642 divider_0/prescaler_0/tspc_1/Z1 gnd 0.99fF +C2643 divider_0/prescaler_0/tspc_1/a_630_n680# gnd 1.14fF **FLOATING +C2644 divider_0/prescaler_0/m1_2700_2190# gnd 4.22fF **FLOATING +C2645 divider_0/prescaler_0/tspc_0/Z4 gnd 0.86fF +C2646 divider_0/prescaler_0/Out gnd 4.59fF +C2647 divider_0/prescaler_0/tspc_0/Z3 gnd 2.26fF +C2648 divider_0/prescaler_0/tspc_0/Z2 gnd 1.46fF +C2649 divider_0/prescaler_0/tspc_0/Z1 gnd 0.99fF +C2650 divider_0/prescaler_0/tspc_0/a_630_n680# gnd 1.16fF **FLOATING +C2651 divider_0/prescaler_0/tspc_0/a_740_n680# gnd 2.11fF **FLOATING +C2652 divider_0/nor_1/Z1 gnd 1.34fF +C2653 divider_0/mc2 gnd 5.29fF +C2654 divider_0/nor_0/Z1 gnd 1.34fF +C2655 divbuf_24/OUT gnd 363.82fF +C2656 divbuf_24/OUT5 gnd 350.37fF +C2657 divbuf_24/OUT4 gnd 133.72fF +C2658 divbuf_24/OUT3 gnd 34.03fF +C2659 divbuf_24/OUT2 gnd 8.71fF +C2660 divbuf_24/IN gnd 0.89fF +C2661 divbuf_24/a_492_n240# gnd 2.46fF **FLOATING +C2662 divbuf_13/OUT gnd 363.82fF +C2663 divbuf_13/OUT5 gnd 350.37fF +C2664 divbuf_13/OUT4 gnd 133.72fF +C2665 divbuf_13/OUT3 gnd 34.03fF +C2666 divbuf_13/OUT2 gnd 8.71fF +C2667 divbuf_13/IN gnd 0.89fF +C2668 divbuf_13/a_492_n240# gnd 2.46fF **FLOATING +C2669 divbuf_9/OUT gnd 363.82fF +C2670 divbuf_9/OUT5 gnd 350.37fF +C2671 divbuf_9/OUT4 gnd 133.72fF +C2672 divbuf_9/OUT3 gnd 34.03fF +C2673 divbuf_9/OUT2 gnd 8.71fF +C2674 divbuf_9/IN gnd 0.89fF +C2675 divbuf_9/a_492_n240# gnd 2.46fF **FLOATING +C2676 divbuf_23/OUT gnd 363.82fF +C2677 divbuf_23/OUT5 gnd 350.37fF +C2678 divbuf_23/OUT4 gnd 133.72fF +C2679 divbuf_23/OUT3 gnd 34.03fF +C2680 divbuf_23/OUT2 gnd 8.71fF +C2681 divbuf_23/IN gnd 0.89fF +C2682 divbuf_23/a_492_n240# gnd 2.46fF **FLOATING +C2683 divbuf_12/OUT gnd 363.82fF +C2684 divbuf_12/OUT5 gnd 350.37fF +C2685 divbuf_12/OUT4 gnd 133.72fF +C2686 divbuf_12/OUT3 gnd 34.03fF +C2687 divbuf_12/OUT2 gnd 8.71fF +C2688 divbuf_12/IN gnd 0.89fF +C2689 divbuf_12/a_492_n240# gnd 2.46fF **FLOATING +C2690 divbuf_8/OUT gnd 363.82fF +C2691 divbuf_8/OUT5 gnd 350.37fF +C2692 divbuf_8/OUT4 gnd 133.72fF +C2693 divbuf_8/OUT3 gnd 34.03fF +C2694 divbuf_8/OUT2 gnd 8.71fF +C2695 divbuf_8/IN gnd 0.89fF +C2696 divbuf_8/a_492_n240# gnd 2.46fF **FLOATING +C2697 divbuf_22/OUT gnd 363.82fF +C2698 divbuf_22/OUT5 gnd 350.37fF +C2699 divbuf_22/OUT4 gnd 133.72fF +C2700 divbuf_22/OUT3 gnd 34.03fF +C2701 divbuf_22/OUT2 gnd 8.71fF +C2702 divbuf_22/IN gnd 0.89fF +C2703 divbuf_22/a_492_n240# gnd 2.46fF **FLOATING +C2704 divbuf_11/OUT gnd 363.82fF +C2705 divbuf_11/OUT5 gnd 350.37fF +C2706 divbuf_11/OUT4 gnd 133.72fF +C2707 divbuf_11/OUT3 gnd 34.03fF +C2708 divbuf_11/OUT2 gnd 8.71fF +C2709 divbuf_11/IN gnd 0.89fF +C2710 divbuf_11/a_492_n240# gnd 2.46fF **FLOATING +C2711 divbuf_7/OUT gnd 363.82fF +C2712 divbuf_7/OUT5 gnd 350.37fF +C2713 divbuf_7/OUT4 gnd 133.72fF +C2714 divbuf_7/OUT3 gnd 34.03fF +C2715 divbuf_7/OUT2 gnd 8.71fF +C2716 divbuf_7/IN gnd 0.89fF +C2717 divbuf_7/a_492_n240# gnd 2.46fF **FLOATING +C2718 divbuf_21/OUT gnd 363.82fF +C2719 divbuf_21/OUT5 gnd 350.37fF +C2720 divbuf_21/OUT4 gnd 133.72fF +C2721 divbuf_21/OUT3 gnd 34.03fF +C2722 divbuf_21/OUT2 gnd 8.71fF +C2723 divbuf_21/IN gnd 0.89fF +C2724 divbuf_21/a_492_n240# gnd 2.46fF **FLOATING +C2725 divbuf_20/OUT gnd 363.82fF +C2726 divbuf_20/OUT5 gnd 350.37fF +C2727 divbuf_20/OUT4 gnd 133.72fF +C2728 divbuf_20/OUT3 gnd 34.03fF +C2729 divbuf_20/OUT2 gnd 8.71fF +C2730 divbuf_20/IN gnd 0.89fF +C2731 divbuf_20/a_492_n240# gnd 2.46fF **FLOATING +C2732 divbuf_10/OUT gnd 363.82fF +C2733 divbuf_10/OUT5 gnd 350.37fF +C2734 divbuf_10/OUT4 gnd 133.72fF +C2735 divbuf_10/OUT3 gnd 34.03fF +C2736 divbuf_10/OUT2 gnd 8.71fF +C2737 divbuf_10/IN gnd 0.89fF +C2738 divbuf_10/a_492_n240# gnd 2.46fF **FLOATING +C2739 divbuf_6/OUT gnd 363.82fF +C2740 divbuf_6/OUT5 gnd 350.37fF +C2741 divbuf_6/OUT4 gnd 133.72fF +C2742 divbuf_6/OUT3 gnd 34.03fF +C2743 divbuf_6/OUT2 gnd 8.71fF +C2744 divbuf_6/IN gnd 0.89fF +C2745 divbuf_6/a_492_n240# gnd 2.46fF **FLOATING +C2746 divbuf_5/OUT gnd 363.82fF +C2747 divbuf_5/OUT5 gnd 350.37fF +C2748 divbuf_5/OUT4 gnd 133.72fF +C2749 divbuf_5/OUT3 gnd 34.03fF +C2750 divbuf_5/OUT2 gnd 8.71fF +C2751 divbuf_5/IN gnd 0.89fF +C2752 divbuf_5/a_492_n240# gnd 2.46fF **FLOATING +C2753 divbuf_4/OUT gnd 363.82fF +C2754 divbuf_4/OUT5 gnd 350.37fF +C2755 divbuf_4/OUT4 gnd 133.72fF +C2756 divbuf_4/OUT3 gnd 34.03fF +C2757 divbuf_4/OUT2 gnd 8.71fF +C2758 divbuf_4/IN gnd 0.89fF +C2759 divbuf_4/a_492_n240# gnd 2.46fF **FLOATING +C2760 divbuf_3/OUT gnd 363.82fF +C2761 divbuf_3/OUT5 gnd 350.37fF +C2762 divbuf_3/OUT4 gnd 133.72fF +C2763 divbuf_3/OUT3 gnd 34.03fF +C2764 divbuf_3/OUT2 gnd 8.71fF +C2765 divbuf_3/IN gnd 0.89fF +C2766 divbuf_3/a_492_n240# gnd 2.46fF **FLOATING +C2767 divbuf_2/OUT gnd 363.82fF +C2768 divbuf_2/OUT5 gnd 350.37fF +C2769 divbuf_2/OUT4 gnd 133.72fF +C2770 divbuf_2/OUT3 gnd 34.03fF +C2771 divbuf_2/OUT2 gnd 8.71fF +C2772 divbuf_2/IN gnd 0.89fF +C2773 divbuf_2/a_492_n240# gnd 2.46fF **FLOATING +C2774 divbuf_1/OUT gnd 363.82fF +C2775 divbuf_1/OUT5 gnd 350.37fF +C2776 divbuf_1/OUT4 gnd 133.72fF +C2777 divbuf_1/OUT3 gnd 34.03fF +C2778 divbuf_1/OUT2 gnd 8.71fF +C2779 divbuf_1/IN gnd 0.89fF +C2780 divbuf_1/a_492_n240# gnd 2.46fF **FLOATING +C2781 ro_complete_1/cbank_2/v gnd 16.43fF +C2782 ro_complete_1/cbank_2/switch_5/vin gnd 0.78fF +C2783 ro_complete_1/cbank_2/switch_4/vin gnd 1.50fF +C2784 ro_complete_1/cbank_2/switch_2/vin gnd 1.30fF +C2785 ro_complete_1/cbank_2/switch_3/vin gnd 0.56fF +C2786 ro_complete_1/cbank_2/switch_1/vin gnd 1.14fF +C2787 ro_complete_1/cbank_2/switch_0/vin gnd 1.02fF +C2788 ro_complete_1/cbank_1/v gnd 16.43fF +C2789 ro_complete_1/cbank_1/switch_5/vin gnd 0.78fF +C2790 ro_complete_1/a0 gnd 5.35fF +C2791 ro_complete_1/cbank_1/switch_4/vin gnd 1.50fF +C2792 ro_complete_1/a1 gnd 6.54fF +C2793 ro_complete_1/cbank_1/switch_2/vin gnd 1.30fF +C2794 ro_complete_1/a3 gnd 5.96fF +C2795 ro_complete_1/cbank_1/switch_3/vin gnd 0.56fF +C2796 ro_complete_1/a2 gnd 5.21fF +C2797 ro_complete_1/cbank_1/switch_1/vin gnd 1.14fF +C2798 ro_complete_1/a4 gnd 5.81fF +C2799 ro_complete_1/cbank_1/switch_0/vin gnd 1.02fF +C2800 ro_complete_1/a5 gnd 6.74fF +C2801 ro_complete_1/cbank_0/v gnd 15.12fF +C2802 ro_complete_1/cbank_0/switch_5/vin gnd 0.78fF +C2803 ro_complete_1/cbank_0/switch_4/vin gnd 1.50fF +C2804 ro_complete_1/cbank_0/switch_2/vin gnd 1.30fF +C2805 ro_complete_1/cbank_0/switch_3/vin gnd 0.56fF +C2806 ro_complete_1/cbank_0/switch_1/vin gnd 1.14fF +C2807 ro_complete_1/cbank_0/switch_0/vin gnd 1.02fF +C2808 ro_complete_1/ro_var_extend_0/vcont gnd 0.27fF +C2809 divbuf_0/OUT gnd 363.82fF +C2810 divbuf_0/OUT5 gnd 350.37fF +C2811 divbuf_0/OUT4 gnd 133.72fF +C2812 divbuf_0/OUT3 gnd 34.03fF +C2813 divbuf_0/OUT2 gnd 8.71fF +C2814 divbuf_0/IN gnd 0.89fF +C2815 divbuf_0/a_492_n240# gnd 2.46fF **FLOATING +C2816 ro_complete_0/cbank_2/v gnd 16.43fF +C2817 ro_complete_0/cbank_2/switch_5/vin gnd 0.78fF +C2818 ro_complete_0/cbank_2/switch_4/vin gnd 1.50fF +C2819 ro_complete_0/cbank_2/switch_2/vin gnd 1.30fF +C2820 ro_complete_0/cbank_2/switch_3/vin gnd 0.56fF +C2821 ro_complete_0/cbank_2/switch_1/vin gnd 1.14fF +C2822 ro_complete_0/cbank_2/switch_0/vin gnd 1.02fF +C2823 ro_complete_0/cbank_1/v gnd 16.46fF +C2824 ro_complete_0/cbank_1/switch_5/vin gnd 0.78fF +C2825 ro_complete_0/a0 gnd 5.35fF +C2826 ro_complete_0/cbank_1/switch_4/vin gnd 1.50fF +C2827 ro_complete_0/a1 gnd 6.54fF +C2828 ro_complete_0/cbank_1/switch_2/vin gnd 1.30fF +C2829 ro_complete_0/a3 gnd 5.96fF +C2830 ro_complete_0/cbank_1/switch_3/vin gnd 0.56fF +C2831 ro_complete_0/a2 gnd 5.21fF +C2832 ro_complete_0/cbank_1/switch_1/vin gnd 1.14fF +C2833 ro_complete_0/a4 gnd 5.81fF +C2834 ro_complete_0/cbank_1/switch_0/vin gnd 1.02fF +C2835 ro_complete_0/a5 gnd 6.74fF +C2836 ro_complete_0/cbank_0/v gnd 15.12fF +C2837 ro_complete_0/cbank_0/switch_5/vin gnd 0.78fF +C2838 ro_complete_0/cbank_0/switch_4/vin gnd 1.50fF +C2839 ro_complete_0/cbank_0/switch_2/vin gnd 1.30fF +C2840 ro_complete_0/cbank_0/switch_3/vin gnd 0.56fF +C2841 ro_complete_0/cbank_0/switch_1/vin gnd 1.14fF +C2842 ro_complete_0/cbank_0/switch_0/vin gnd 1.02fF +C2843 ro_complete_0/ro_var_extend_0/vcont gnd 0.27fF +C2844 filter_0/v gnd 85.69fF +C2845 filter_0/a_4216_n5230# gnd 418.47fF **FLOATING +C2846 filter_0/a_4216_n2998# gnd 1.03fF **FLOATING +C2847 cp_0/down gnd 1.54fF +C2848 cp_0/vbias gnd 2.41fF +C2849 cp_0/out gnd 5.34fF +C2850 cp_0/upbar gnd 1.50fF +C2851 cp_0/a_7110_n2840# gnd 0.17fF **FLOATING +C2852 cp_0/a_3060_n2840# gnd 1.71fF **FLOATING +C2853 cp_0/a_7110_0# gnd 0.17fF **FLOATING +C2854 cp_0/a_6370_0# gnd 0.40fF **FLOATING +C2855 cp_0/a_3060_0# gnd 1.66fF **FLOATING +C2856 cp_0/a_1710_0# gnd 5.89fF **FLOATING +C2857 cp_0/a_1710_n2840# gnd 4.91fF **FLOATING +C2858 cp_0/a_10_n50# gnd 2.96fF **FLOATING +C2859 pd_1/and_pd_0/Z1 gnd 0.39fF +C2860 pd_1/and_pd_0/Out1 gnd 2.22fF +C2861 pd_1/tspc_r_1/z5 gnd 1.10fF +C2862 pd_1/tspc_r_1/Z4 gnd 1.07fF +C2863 pd_1/tspc_r_1/Qbar gnd 0.88fF +C2864 pd_1/tspc_r_1/Z2 gnd 1.22fF +C2865 pd_1/tspc_r_1/Z1 gnd 0.67fF +C2866 pd_1/UP gnd 2.21fF +C2867 pd_1/tspc_r_1/Qbar1 gnd 1.34fF +C2868 pd_1/tspc_r_1/Z3 gnd 2.12fF +C2869 pd_1/REF gnd 1.80fF +C2870 pd_1/tspc_r_0/z5 gnd 1.10fF +C2871 pd_1/tspc_r_0/Z4 gnd 1.07fF +C2872 pd_1/R gnd 3.05fF +C2873 pd_1/tspc_r_0/Qbar gnd 0.79fF +C2874 pd_1/tspc_r_0/Z2 gnd 1.22fF +C2875 pd_1/tspc_r_0/Z1 gnd 0.67fF +C2876 pd_1/DOWN gnd 3.08fF +C2877 pd_1/tspc_r_0/Qbar1 gnd 1.34fF +C2878 pd_1/tspc_r_0/Z3 gnd 2.12fF +C2879 pd_1/DIV gnd 1.82fF +C2880 pd_0/and_pd_0/Z1 gnd 0.39fF +C2881 pd_0/and_pd_0/Out1 gnd 2.22fF +C2882 pd_0/tspc_r_1/z5 gnd 1.10fF +C2883 pd_0/tspc_r_1/Z4 gnd 1.07fF +C2884 pd_0/tspc_r_1/Qbar gnd 0.88fF +C2885 pd_0/tspc_r_1/Z2 gnd 1.22fF +C2886 pd_0/tspc_r_1/Z1 gnd 0.67fF +C2887 pd_0/UP gnd 2.21fF +C2888 pd_0/tspc_r_1/Qbar1 gnd 1.34fF +C2889 pd_0/tspc_r_1/Z3 gnd 2.12fF +C2890 pd_0/REF gnd 1.80fF +C2891 pd_0/tspc_r_0/z5 gnd 1.10fF +C2892 pd_0/tspc_r_0/Z4 gnd 1.07fF +C2893 pd_0/R gnd 3.05fF +C2894 pd_0/tspc_r_0/Qbar gnd 0.79fF +C2895 pd_0/tspc_r_0/Z2 gnd 1.22fF +C2896 pd_0/tspc_r_0/Z1 gnd 0.67fF +C2897 pd_0/DOWN gnd 3.08fF +C2898 pd_0/tspc_r_0/Qbar1 gnd 1.34fF +C2899 pd_0/tspc_r_0/Z3 gnd 2.12fF +C2900 pd_0/DIV gnd 1.82fF .ends