retry
diff --git a/gds/user_analog_project_wrapper.gds.gz b/gds/user_analog_project_wrapper.gds.gz index 20d1501..2f58514 100644 --- a/gds/user_analog_project_wrapper.gds.gz +++ b/gds/user_analog_project_wrapper.gds.gz Binary files differ
diff --git a/mag/user_analog_project_wrapper.mag b/mag/user_analog_project_wrapper.mag index cd7d023..708ee3d 100644 --- a/mag/user_analog_project_wrapper.mag +++ b/mag/user_analog_project_wrapper.mag
@@ -1,6 +1,6 @@ magic tech sky130A -timestamp 1647879069 +timestamp 1647880391 << psubdiff >> rect 83392 340047 84757 340157 rect 83392 338865 83511 340047 @@ -8387,38 +8387,42 @@ rect -50 0 0 352000 rect 292000 0 292050 352000 rect -50 -50 292050 0 -use pll_full_buffered1 pll_full_buffered1_1 -timestamp 1647879069 -transform 1 0 11977 0 1 315152 -box -1061 0 44159 15955 -use divider_buffered divider_buffered_0 -timestamp 1647866572 -transform 1 0 214902 0 1 126196 -box -746 -1568 44148 5163 -use div_pd_buffered div_pd_buffered_0 -timestamp 1647861335 -transform 1 0 11556 0 1 170913 -box -947 -3226 44148 7340 -use ro_complete_buffered ro_complete_buffered_0 -timestamp 1647861335 -transform 1 0 237047 0 1 315756 -box -2962 -10858 43775 10272 -use ro_divider_buffered ro_divider_buffered_0 -timestamp 1647865947 -transform 1 0 235839 0 1 234053 -box -2972 -10858 43775 12276 -use cp_buffered cp_buffered_0 -timestamp 1647878778 -transform 1 0 13561 0 1 262981 -box -1398 -3598 44144 5452 -use filter_buffered filter_buffered_0 -timestamp 1647861083 -transform 1 0 23052 0 1 29678 -box -1 0 44805 14450 +use pll_full pll_full_0 +timestamp 1647877853 +transform 1 0 205735 0 1 27951 +box -5794 -555 13278 10840 use pll_full_buffered2 pll_full_buffered2_0 timestamp 1647878913 transform 1 0 15639 0 1 87306 box -1629 0 44161 20437 +use filter_buffered filter_buffered_0 +timestamp 1647861083 +transform 1 0 23052 0 1 29678 +box -1 0 44805 14450 +use cp_buffered cp_buffered_0 +timestamp 1647878778 +transform 1 0 13561 0 1 262981 +box -1398 -3598 44144 5452 +use ro_divider_buffered ro_divider_buffered_0 +timestamp 1647865947 +transform 1 0 235839 0 1 234053 +box -2972 -10858 43775 12276 +use ro_complete_buffered ro_complete_buffered_0 +timestamp 1647861335 +transform 1 0 237047 0 1 315756 +box -2962 -10858 43775 10272 +use div_pd_buffered div_pd_buffered_0 +timestamp 1647861335 +transform 1 0 11556 0 1 170913 +box -947 -3226 44148 7340 +use divider_buffered divider_buffered_0 +timestamp 1647866572 +transform 1 0 214902 0 1 126196 +box -746 -1568 44148 5163 +use pll_full_buffered1 pll_full_buffered1_1 +timestamp 1647879069 +transform 1 0 11977 0 1 315152 +box -1061 0 44159 15955 << labels >> flabel metal3 s 291760 134615 292400 134671 0 FreeSans 560 0 0 0 gpio_analog[0] port 0 nsew signal bidirectional
diff --git a/netgen/user_analog_project_wrapper.spice b/netgen/user_analog_project_wrapper.spice index d6a85a5..b4f2649 100644 --- a/netgen/user_analog_project_wrapper.spice +++ b/netgen/user_analog_project_wrapper.spice
@@ -106,2204 +106,2550 @@ + wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6] + wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3] + wbs_stb_i wbs_we_i -C0 pll_full_buffered2_0/tapered_buf_5/a_n10_230# pll_full_buffered2_0/tapered_buf_5/in 0.02fF -C1 ro_divider_buffered_0/divider_0/nor_0/B ro_divider_buffered_0/divider_0/and_0/B 0.29fF -C2 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z2 0.11fF -C3 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/and_0/A 0.80fF -C4 ro_divider_buffered_0/tapered_buf_8/a_160_n140# ro_divider_buffered_0/tapered_buf_8/a_210_n610# 0.22fF -C5 ro_divider_buffered_0/tapered_buf_8/a_580_0# ro_divider_buffered_0/tapered_buf_8/a_160_230# 0.02fF -C6 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/in 0.19fF -C7 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D div_pd_buffered_0/divider_0/clk 0.26fF -C8 divider_buffered_0/divider_0/prescaler_0/tspc_0/D divider_buffered_0/divider_0/prescaler_0/nand_1/z1 0.21fF -C9 ro_divider_buffered_0/ro_complete_0/a3 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF -C10 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_divider_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C11 div_pd_buffered_0/tapered_buf_3/a_210_n610# div_pd_buffered_0/tapered_buf_3/a_4670_0# 29.21fF -C12 div_pd_buffered_0/tapered_buf_3/a_160_230# div_pd_buffered_0/tapered_buf_3/a_n10_230# 0.09fF -C13 ro_complete_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_5/a_4670_0# 4.78fF -C14 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.17fF -C15 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C16 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.16fF -C17 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/a_n10_230# 0.01fF -C18 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF -C19 ro_divider_buffered_0/divider_0/and_0/OUT ro_divider_buffered_0/divider_0/clk 0.04fF -C20 ro_divider_buffered_0/tapered_buf_2/a_160_n140# ro_divider_buffered_0/tapered_buf_2/a_n10_n140# 0.05fF -C21 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF -C22 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF -C23 pll_full_buffered2_0/tapered_buf_3/a_n10_n140# pll_full_buffered2_0/tapered_buf_3/a_160_n140# 0.05fF -C24 pll_full_buffered1_0/tapered_buf_1/a_580_0# pll_full_buffered1_0/tapered_buf_1/a_210_n610# 0.84fF -C25 pll_full_buffered1_0/tapered_buf_1/a_160_n140# pll_full_buffered1_0/tapered_buf_1/a_n10_n140# 0.05fF -C26 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/tspc_r_1/z5 0.03fF -C27 div_pd_buffered_0/pd_0/tspc_r_1/Z2 div_pd_buffered_0/pd_0/R 0.21fF -C28 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/tspc_1/Q 0.51fF -C29 divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# divider_buffered_0/divider_0/prescaler_0/Out 0.11fF -C30 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered2_0/pll_full_0/divider_0/and_0/B 0.01fF -C31 filter_buffered_0/tapered_buf_1/a_580_0# filter_buffered_0/tapered_buf_1/a_160_n140# 0.35fF -C32 divider_buffered_0/tapered_buf_0/a_210_n610# divider_buffered_0/tapered_buf_0/a_580_0# 0.84fF -C33 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.14fF -C34 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# divider_buffered_0/divider_0/clk 0.01fF -C35 pll_full_buffered2_0/pll_full_0/ref pll_full_buffered2_0/pll_full_0/pd_0/R 0.61fF -C36 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a4 0.12fF -C37 pll_full_buffered1_0/pll_full_0/ro_complete_0/a2 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF -C38 ro_complete_buffered_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_3/a_n10_n140# 0.04fF -C39 pll_full_buffered2_0/tapered_buf_3/a_580_0# pll_full_buffered2_0/tapered_buf_3/a_1650_0# 1.27fF -C40 ro_divider_buffered_0/ro_complete_0/a4 ro_divider_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C41 div_pd_buffered_0/tapered_buf_3/a_4670_0# div_pd_buffered_0/tapered_buf_3/a_1650_0# 4.78fF -C42 div_pd_buffered_0/tapered_buf_3/a_160_230# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.17fF -C43 ro_complete_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_6/a_4670_0# 4.78fF -C44 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.17fF -C45 ro_divider_buffered_0/divider_0/tspc_1/Z3 ro_divider_buffered_0/divider_0/tspc_1/Z4 0.65fF -C46 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C47 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/clk 0.64fF -C48 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z3 0.45fF -C49 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_buffered1_0/pll_full_0/vco 0.45fF -C50 io_clamp_high[2] io_analog[6] 0.53fF -C51 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a0 0.13fF -C52 ro_divider_buffered_0/tapered_buf_3/a_1650_0# ro_divider_buffered_0/tapered_buf_3/a_210_n610# 2.89fF -C53 div_pd_buffered_0/tapered_buf_4/a_160_230# div_pd_buffered_0/tapered_buf_4/a_160_n140# 0.17fF -C54 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF -C55 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C56 pll_full_buffered1_0/tapered_buf_0/a_580_0# pll_full_buffered1_0/tapered_buf_0/a_210_n610# 0.84fF -C57 pll_full_buffered1_0/tapered_buf_0/a_160_n140# pll_full_buffered1_0/tapered_buf_0/a_n10_n140# 0.05fF -C58 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z4 0.12fF -C59 divider_buffered_0/tapered_buf_1/a_160_n140# divider_buffered_0/tapered_buf_1/a_160_230# 0.17fF -C60 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.05fF -C61 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/tspc_1/Z4 0.21fF -C62 cp_buffered_0/tapered_buf_1/a_210_n610# cp_buffered_0/cp_0/out 26.29fF -C63 cp_buffered_0/tapered_buf_1/a_n10_n140# cp_buffered_0/tapered_buf_1/in 0.04fF -C64 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF -C65 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C66 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_1/Z1 0.03fF -C67 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_2/vin ro_divider_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C68 divider_buffered_0/divider_0/tspc_0/Z2 divider_buffered_0/divider_0/nor_1/A 0.23fF -C69 div_pd_buffered_0/tapered_buf_3/a_n10_230# div_pd_buffered_0/tapered_buf_3/in 0.02fF -C70 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.35fF -C71 ro_complete_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_7/a_4670_0# 4.78fF -C72 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.17fF -C73 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q ro_divider_buffered_0/divider_0/prescaler_0/nand_1/z1 0.01fF -C74 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z4 0.65fF -C75 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF -C76 pll_full_buffered1_0/pll_full_0/ro_complete_0/a4 pll_full_buffered1_0/pll_full_0/vco 0.01fF -C77 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF -C78 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C79 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.65fF -C80 ro_divider_buffered_0/tapered_buf_1/a_160_n140# ro_divider_buffered_0/tapered_buf_1/a_210_n610# 0.22fF -C81 ro_divider_buffered_0/tapered_buf_0/a_160_230# ro_divider_buffered_0/tapered_buf_0/a_n10_230# 0.09fF -C82 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/and_0/A 0.01fF -C83 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z2 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z3 0.16fF -C84 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z4 0.22fF -C85 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B 0.18fF -C86 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z4 0.12fF -C87 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF -C88 ro_divider_buffered_0/tapered_buf_4/a_1650_0# ro_divider_buffered_0/tapered_buf_4/a_210_n610# 2.89fF -C89 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q 0.14fF -C90 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered2_0/pll_full_0/vco 0.01fF -C91 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_1/A 0.04fF -C92 divider_buffered_0/tapered_buf_2/a_n10_n140# divider_buffered_0/tapered_buf_2/a_n10_230# 0.01fF -C93 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF -C94 filter_buffered_0/tapered_buf_1/a_n10_n140# filter_buffered_0/tapered_buf_1/a_160_n140# 0.05fF -C95 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z4 0.15fF -C96 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_divider_buffered_0/ro_complete_0/a3 0.13fF -C97 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_divider_buffered_0/ro_complete_0/a1 0.14fF -C98 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A 0.15fF -C99 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a0 0.09fF -C100 ro_divider_buffered_0/divider_0/tspc_0/Q ro_divider_buffered_0/divider_0/tspc_0/a_630_n680# 0.04fF -C101 div_pd_buffered_0/tapered_buf_3/a_160_n140# div_pd_buffered_0/tapered_buf_3/in 0.19fF -C102 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF -C103 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C104 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/tapered_buf_1/in 0.05fF -C105 filter_buffered_0/tapered_buf_1/a_1650_0# filter_buffered_0/tapered_buf_1/a_4670_0# 4.78fF -C106 pll_full_buffered1_0/pll_full_0/divider_0/and_0/B pll_full_buffered1_0/pll_full_0/divider_0/and_0/Z1 0.07fF -C107 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF -C108 ro_divider_buffered_0/tapered_buf_5/a_1650_0# ro_divider_buffered_0/tapered_buf_5/a_210_n610# 2.89fF -C109 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.38fF -C110 ro_complete_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_2/a_210_n610# 0.22fF -C111 divider_buffered_0/tapered_buf_2/a_210_n610# divider_buffered_0/divider_0/clk 26.29fF -C112 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered2_0/pll_full_0/div 0.01fF -C113 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF -C114 pll_full_buffered2_0/tapered_buf_3/a_4670_0# pll_full_buffered2_0/tapered_buf_3/a_210_n610# 29.21fF -C115 pll_full_buffered2_0/tapered_buf_3/a_n10_230# pll_full_buffered2_0/tapered_buf_3/a_160_230# 0.09fF -C116 ro_divider_buffered_0/tapered_buf_2/a_580_0# ro_divider_buffered_0/tapered_buf_2/a_160_230# 0.02fF -C117 filter_buffered_0/tapered_buf_1/a_n10_230# filter_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF -C118 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF -C119 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.03fF -C120 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/z5 0.11fF -C121 div_pd_buffered_0/divider_0/tspc_2/Z2 div_pd_buffered_0/divider_0/tspc_2/Z4 0.36fF -C122 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/and_0/Z1 0.04fF -C123 divider_buffered_0/tapered_buf_2/a_580_0# divider_buffered_0/tapered_buf_2/a_210_n610# 0.84fF -C124 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_divider_buffered_0/ro_complete_0/a0 0.13fF -C125 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF -C126 ro_divider_buffered_0/ro_complete_0/a5 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF -C127 filter_buffered_0/tapered_buf_0/a_580_0# filter_buffered_0/tapered_buf_0/a_1650_0# 1.27fF -C128 div_pd_buffered_0/tapered_buf_3/a_210_n610# div_pd_buffered_0/tapered_buf_3/a_1650_0# 2.89fF -C129 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_2/Z4 0.02fF -C130 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF -C131 divider_buffered_0/tapered_buf_2/a_1650_0# divider_buffered_0/tapered_buf_2/a_4670_0# 4.78fF -C132 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF -C133 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_buffered1_0/pll_full_0/vco 0.12fF -C134 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF -C135 pll_full_buffered2_0/pll_full_0/ro_complete_0/a4 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF -C136 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C137 ro_divider_buffered_0/tapered_buf_1/a_1650_0# ro_divider_buffered_0/tapered_buf_1/a_210_n610# 2.89fF -C138 ro_divider_buffered_0/divider_0/tspc_2/Z2 ro_divider_buffered_0/divider_0/nor_0/B 0.40fF -C139 ro_divider_buffered_0/divider_0/Out ro_divider_buffered_0/divider_0/tspc_2/a_630_n680# 0.04fF -C140 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.05fF -C141 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/and_0/B 0.78fF -C142 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_buffered2_0/pll_full_0/vco 1.46fF -C143 ro_divider_buffered_0/tapered_buf_6/a_1650_0# ro_divider_buffered_0/tapered_buf_6/a_210_n610# 2.89fF -C144 cp_buffered_0/tapered_buf_0/a_1650_0# cp_buffered_0/tapered_buf_0/a_210_n610# 2.89fF -C145 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/tapered_buf_1/a_210_n610# 26.29fF -C146 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF -C147 pll_full_buffered1_0/pll_full_0/pd_0/DOWN pll_full_buffered1_0/pll_full_0/pd_0/R 0.36fF -C148 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z4 0.20fF -C149 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z1 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z2 0.71fF -C150 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF -C151 divider_buffered_0/divider_0/and_0/out1 divider_buffered_0/divider_0/and_0/A 0.01fF -C152 pll_full_buffered2_0/pll_full_0/cp_0/a_1710_0# pll_full_buffered2_0/pll_full_0/cp_0/a_10_n50# 0.04fF -C153 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z1 0.09fF -C154 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a3 0.13fF -C155 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF -C156 ro_divider_buffered_0/ro_complete_0/a1 ro_divider_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C157 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF -C158 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF -C159 ro_divider_buffered_0/ro_complete_0/a0 ro_divider_buffered_0/divider_0/clk 0.05fF -C160 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a3 2.04fF -C161 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.22fF -C162 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/in 0.04fF -C163 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/vco 0.60fF -C164 div_pd_buffered_0/tapered_buf_3/a_210_n610# div_pd_buffered_0/divider_0/clk 26.29fF -C165 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C166 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF -C167 ro_divider_buffered_0/tapered_buf_7/a_1650_0# ro_divider_buffered_0/tapered_buf_7/a_210_n610# 2.89fF -C168 ro_divider_buffered_0/tapered_buf_3/a_210_n610# ro_divider_buffered_0/ro_complete_0/a5 26.29fF -C169 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF -C170 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_160_230# 0.17fF -C171 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_2/Z4 0.02fF -C172 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C173 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/clk 0.45fF -C174 divider_buffered_0/tapered_buf_1/a_n10_n140# divider_buffered_0/tapered_buf_1/a_n10_230# 0.01fF -C175 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_580_0# 0.35fF -C176 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 0.84fF -C177 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_n10_n140# 0.05fF -C178 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B 0.06fF -C179 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/tspc_0/Z4 0.21fF -C180 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF -C181 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.09fF -C182 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z2 1.07fF -C183 pll_full_buffered1_0/pll_full_0/ro_complete_0/a1 pll_full_buffered1_0/pll_full_0/vco 0.11fF -C184 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/a0 3.46fF -C185 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF -C186 filter_buffered_0/tapered_buf_0/a_210_n610# filter_buffered_0/v 26.29fF -C187 pll_full_buffered1_0/tapered_buf_2/a_4670_0# pll_full_buffered1_0/tapered_buf_2/a_210_n610# 29.21fF -C188 pll_full_buffered1_0/tapered_buf_2/a_n10_230# pll_full_buffered1_0/tapered_buf_2/a_160_230# 0.09fF -C189 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/pd_0/DOWN 0.02fF -C190 divider_buffered_0/divider_0/tspc_0/Z4 divider_buffered_0/divider_0/tspc_0/a_630_n680# 0.12fF -C191 ro_divider_buffered_0/divider_0/and_0/out1 ro_divider_buffered_0/divider_0/and_0/A 0.01fF -C192 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_1650_0# 1.27fF -C193 ro_divider_buffered_0/tapered_buf_8/a_1650_0# ro_divider_buffered_0/tapered_buf_8/a_210_n610# 2.89fF -C194 ro_divider_buffered_0/tapered_buf_6/a_210_n610# ro_divider_buffered_0/ro_complete_0/a2 26.29fF -C195 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z1 0.09fF -C196 pll_full_buffered1_0/pll_full_0/ref pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z2 0.19fF -C197 pll_full_buffered2_0/pll_full_0/ref pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 0.65fF -C198 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_divider_buffered_0/ro_complete_0/a0 0.13fF -C199 div_pd_buffered_0/tapered_buf_3/a_n10_n140# div_pd_buffered_0/tapered_buf_3/in 0.04fF -C200 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_210_n610# 0.22fF -C201 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 0.84fF -C202 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_n10_n140# 0.05fF -C203 pll_full_buffered1_0/pll_full_0/ro_complete_0/a0 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF -C204 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z1 pll_full_buffered1_0/pll_full_0/div 0.17fF -C205 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_divider_buffered_0/divider_0/prescaler_0/nand_0/z1 0.07fF -C206 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C207 ro_divider_buffered_0/tapered_buf_1/a_n10_230# ro_divider_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF -C208 divider_buffered_0/divider_0/tspc_0/Q divider_buffered_0/divider_0/tspc_1/Z1 0.01fF -C209 pll_full_buffered2_0/pll_full_0/ro_complete_0/a4 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF -C210 ro_divider_buffered_0/divider_0/and_0/OUT ro_divider_buffered_0/divider_0/and_0/out1 0.31fF -C211 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D ro_divider_buffered_0/divider_0/clk 0.26fF -C212 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z1 0.09fF -C213 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C214 pll_full_buffered1_0/tapered_buf_1/a_4670_0# pll_full_buffered1_0/tapered_buf_1/a_210_n610# 29.21fF -C215 pll_full_buffered1_0/tapered_buf_1/a_n10_230# pll_full_buffered1_0/tapered_buf_1/a_160_230# 0.09fF -C216 div_pd_buffered_0/pd_0/tspc_r_1/Z2 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.14fF -C217 divider_buffered_0/divider_0/tspc_1/a_630_n680# divider_buffered_0/divider_0/tspc_1/Z2 0.01fF -C218 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B 0.03fF -C219 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z3 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/a_630_n680# 0.05fF -C220 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF -C221 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF -C222 pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Out1 pll_full_buffered2_0/pll_full_0/pd_0/UP 0.33fF -C223 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF -C224 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar pll_full_buffered1_0/pll_full_0/pd_0/R 0.03fF -C225 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/and_0/OUT 0.14fF -C226 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_0/B 0.15fF -C227 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.05fF -C228 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar pll_full_buffered2_0/tapered_buf_2/in 0.02fF -C229 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_buffered2_0/pll_full_0/pd_0/R 0.30fF -C230 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/tspc_0/Z3 0.45fF -C231 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF -C232 pll_full_buffered1_0/pll_full_0/ro_complete_0/a2 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF -C233 pll_full_buffered1_0/tapered_buf_2/a_160_n140# pll_full_buffered1_0/pll_full_0/vco 0.19fF -C234 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 0.84fF -C235 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_n10_n140# 0.05fF -C236 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT 0.06fF -C237 ro_divider_buffered_0/ro_complete_0/a3 ro_divider_buffered_0/divider_0/clk 0.05fF -C238 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z4 0.15fF -C239 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_buffered1_0/pll_full_0/vco 0.12fF -C240 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF -C241 io_clamp_low[1] io_analog[5] 0.53fF -C242 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF -C243 div_pd_buffered_0/tapered_buf_4/a_210_n610# div_pd_buffered_0/tapered_buf_4/a_580_0# 0.84fF -C244 div_pd_buffered_0/tapered_buf_4/a_n10_n140# div_pd_buffered_0/tapered_buf_4/a_160_n140# 0.05fF -C245 divider_buffered_0/tapered_buf_0/a_n10_n140# divider_buffered_0/tapered_buf_0/a_160_n140# 0.05fF -C246 ro_divider_buffered_0/tapered_buf_3/a_160_n140# ro_divider_buffered_0/tapered_buf_3/in 0.19fF -C247 pll_full_buffered1_0/tapered_buf_0/a_4670_0# pll_full_buffered1_0/tapered_buf_0/a_210_n610# 29.21fF -C248 pll_full_buffered1_0/tapered_buf_0/a_n10_230# pll_full_buffered1_0/tapered_buf_0/a_160_230# 0.09fF -C249 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF -C250 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF -C251 divider_buffered_0/tapered_buf_1/a_4670_0# divider_buffered_0/tapered_buf_1/a_1650_0# 4.78fF -C252 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT 0.06fF -C253 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF -C254 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF -C255 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_buffered2_0/pll_full_0/vco 1.46fF -C256 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_210_n610# 0.84fF -C257 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_n10_n140# 0.05fF -C258 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/z5 pll_full_buffered1_0/pll_full_0/pd_0/UP 0.03fF -C259 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.11fF -C260 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/clk 0.12fF -C261 pll_full_buffered2_0/pll_full_0/divider_0/and_0/out1 pll_full_buffered2_0/pll_full_0/divider_0/and_0/A 0.01fF -C262 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q 0.05fF -C263 pll_full_buffered2_0/tapered_buf_3/out pll_full_buffered2_0/tapered_buf_3/a_210_n610# 26.29fF -C264 div_pd_buffered_0/tapered_buf_3/a_n10_n140# div_pd_buffered_0/tapered_buf_3/a_n10_230# 0.01fF -C265 pll_full_buffered2_0/tapered_buf_3/a_580_0# pll_full_buffered2_0/tapered_buf_3/a_160_230# 0.02fF -C266 ro_divider_buffered_0/tapered_buf_1/a_4670_0# ro_divider_buffered_0/tapered_buf_1/a_1650_0# 4.78fF -C267 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/mc2 0.04fF -C268 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_divider_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF -C269 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF -C270 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 0.84fF -C271 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_n10_n140# 0.05fF -C272 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z2 0.30fF -C273 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D ro_divider_buffered_0/divider_0/prescaler_0/nand_1/z1 0.21fF -C274 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/nor_0/B 0.47fF -C275 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z3 pll_full_buffered1_0/pll_full_0/div 0.05fF -C276 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z2 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z4 0.36fF -C277 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF -C278 pll_full_buffered2_0/pll_full_0/ro_complete_0/a5 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 0.08fF -C279 pll_full_buffered2_0/pll_full_0/ro_complete_0/a0 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF -C280 div_pd_buffered_0/pd_0/tspc_r_0/Z1 div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.71fF -C281 pll_full_buffered2_0/tapered_buf_2/a_n10_230# pll_full_buffered2_0/tapered_buf_2/a_n10_n140# 0.01fF -C282 ro_divider_buffered_0/tapered_buf_4/a_160_n140# ro_divider_buffered_0/tapered_buf_4/in 0.19fF -C283 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/vco 0.01fF -C284 pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Z1 pll_full_buffered1_0/pll_full_0/pd_0/UP 0.06fF -C285 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/clk 0.45fF -C286 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF -C287 ro_divider_buffered_0/ro_complete_0/a4 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF -C288 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_divider_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C289 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_160_230# 0.17fF -C290 div_pd_buffered_0/tapered_buf_3/a_n10_n140# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.05fF -C291 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF -C292 pll_full_buffered1_0/pll_full_0/ro_complete_0/a2 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C293 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_4670_0# 4.78fF -C294 cp_buffered_0/cp_0/out cp_buffered_0/cp_0/a_1710_0# 0.84fF -C295 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B 0.47fF -C296 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF -C297 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered1_0/pll_full_0/vco 0.14fF -C298 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C299 ro_complete_buffered_0/tapered_buf_1/a_4670_0# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 4.78fF -C300 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C301 div_pd_buffered_0/pd_0/tspc_r_0/Z4 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF -C302 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/DOWN 0.11fF -C303 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z1 0.17fF -C304 ro_divider_buffered_0/tapered_buf_5/a_160_n140# ro_divider_buffered_0/tapered_buf_5/in 0.19fF -C305 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_160_230# 0.02fF -C306 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF -C307 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.05fF -C308 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.03fF -C309 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 divider_buffered_0/divider_0/prescaler_0/Out 0.05fF -C310 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF -C311 pll_full_buffered2_0/pll_full_0/cp_0/upbar pll_full_buffered2_0/tapered_buf_2/in 5.05fF -C312 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF -C313 divider_buffered_0/divider_0/nor_0/B divider_buffered_0/divider_0/tspc_2/Z1 0.03fF -C314 divider_buffered_0/divider_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/tspc_2/Z3 0.05fF -C315 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_divider_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C316 divider_buffered_0/tapered_buf_2/a_160_n140# divider_buffered_0/tapered_buf_2/a_210_n610# 0.22fF -C317 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF -C318 filter_buffered_0/tapered_buf_0/a_160_n140# filter_buffered_0/tapered_buf_0/a_160_230# 0.17fF -C319 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF -C320 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B 1.21fF -C321 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a4 0.12fF -C322 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF -C323 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_4670_0# 29.21fF -C324 divider_buffered_0/divider_0/nor_0/Z1 divider_buffered_0/divider_0/nor_0/B 0.06fF -C325 ro_divider_buffered_0/divider_0/Out ro_divider_buffered_0/divider_0/nor_0/B 0.42fF -C326 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z3 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q 0.05fF -C327 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z4 0.36fF -C328 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF -C329 divider_buffered_0/tapered_buf_2/a_160_n140# divider_buffered_0/tapered_buf_2/in 0.19fF -C330 ro_divider_buffered_0/tapered_buf_6/a_160_n140# ro_divider_buffered_0/tapered_buf_6/in 0.19fF -C331 pll_full_buffered2_0/tapered_buf_1/a_210_n610# pll_full_buffered2_0/tapered_buf_1/out 26.29fF -C332 pll_full_buffered2_0/tapered_buf_1/a_n10_n140# pll_full_buffered2_0/tapered_buf_1/in 0.04fF -C333 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/z5 0.20fF -C334 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF -C335 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C336 divider_buffered_0/divider_0/tspc_1/a_630_n680# divider_buffered_0/divider_0/nor_0/B 0.00fF -C337 divider_buffered_0/divider_0/tspc_0/a_630_n680# divider_buffered_0/divider_0/prescaler_0/Out 0.01fF -C338 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z2 pll_full_buffered2_0/pll_full_0/div 0.19fF -C339 div_pd_buffered_0/divider_0/and_0/B div_pd_buffered_0/divider_0/and_0/Z1 0.07fF -C340 ro_complete_buffered_0/tapered_buf_4/a_210_n610# ro_complete_buffered_0/ro_complete_0/a2 26.29fF -C341 ro_divider_buffered_0/divider_0/tspc_1/Q ro_divider_buffered_0/divider_0/tspc_2/Z1 0.01fF -C342 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/a_630_n680# 0.35fF -C343 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.38fF -C344 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C345 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered1_0/pll_full_0/divider_0/and_0/Z1 0.04fF -C346 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_buffered1_0/pll_full_0/vco 0.05fF -C347 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF -C348 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z1 0.17fF -C349 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.01fF -C350 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/tspc_1/Z1 0.03fF -C351 ro_divider_buffered_0/tapered_buf_7/a_160_n140# ro_divider_buffered_0/tapered_buf_7/in 0.19fF -C352 pll_full_buffered2_0/tapered_buf_0/a_210_n610# pll_full_buffered2_0/tapered_buf_0/out 26.29fF -C353 pll_full_buffered2_0/tapered_buf_0/a_n10_n140# pll_full_buffered2_0/tapered_buf_0/in 0.04fF -C354 pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Out1 pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Z1 0.18fF -C355 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Z3 0.38fF -C356 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 div_pd_buffered_0/divider_0/clk 0.12fF -C357 divider_buffered_0/divider_0/mc2 divider_buffered_0/divider_0/and_0/A 0.16fF -C358 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 divider_buffered_0/divider_0/prescaler_0/Out 0.08fF -C359 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/a3 3.17fF -C360 ro_divider_buffered_0/ro_complete_0/a4 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF -C361 ro_complete_buffered_0/tapered_buf_4/a_4670_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 29.21fF -C362 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.09fF -C363 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF -C364 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF -C365 pll_full_buffered2_0/tapered_buf_3/a_n10_230# pll_full_buffered2_0/pll_full_0/div 0.02fF -C366 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_1/in 0.10fF -C367 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/a0 0.09fF -C368 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/divider_0/and_0/out1 0.06fF -C369 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 ro_divider_buffered_0/divider_0/clk 0.45fF -C370 divider_buffered_0/tapered_buf_2/a_210_n610# divider_buffered_0/tapered_buf_2/a_4670_0# 29.21fF -C371 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 0.04fF -C372 pll_full_buffered1_0/tapered_buf_2/a_n10_230# pll_full_buffered1_0/tapered_buf_2/a_n10_n140# 0.01fF -C373 pll_full_buffered2_0/tapered_buf_2/in pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Z1 0.07fF -C374 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q 0.01fF -C375 ro_divider_buffered_0/tapered_buf_8/a_160_n140# ro_divider_buffered_0/tapered_buf_8/in 0.19fF -C376 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.06fF -C377 divider_buffered_0/tapered_buf_1/a_580_0# divider_buffered_0/tapered_buf_1/a_160_230# 0.02fF -C378 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF -C379 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/nor_0/B 0.35fF -C380 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/clk 0.60fF -C381 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/and_0/out1 0.31fF -C382 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_divider_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF -C383 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF -C384 ro_complete_buffered_0/tapered_buf_5/a_4670_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 29.21fF -C385 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.09fF -C386 pll_full_buffered2_0/tapered_buf_2/a_160_230# pll_full_buffered2_0/tapered_buf_2/a_580_0# 0.02fF -C387 ro_divider_buffered_0/divider_0/tspc_0/a_630_n680# ro_divider_buffered_0/divider_0/tspc_0/Z4 0.12fF -C388 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 ro_divider_buffered_0/divider_0/and_0/OUT 0.06fF -C389 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.38fF -C390 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.11fF -C391 ro_complete_buffered_0/tapered_buf_7/a_210_n610# ro_complete_buffered_0/ro_complete_0/a5 26.29fF -C392 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/and_0/B 0.31fF -C393 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF -C394 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C395 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z3 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B 0.38fF -C396 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z4 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z1 0.00fF -C397 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF -C398 pll_full_buffered2_0/pll_full_0/ro_complete_0/a2 pll_full_buffered2_0/pll_full_0/vco 0.11fF -C399 pll_full_buffered1_0/tapered_buf_1/a_n10_230# pll_full_buffered1_0/tapered_buf_1/a_n10_n140# 0.01fF -C400 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z1 0.03fF -C401 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z3 0.05fF -C402 pll_full_buffered2_0/tapered_buf_1/a_160_n140# pll_full_buffered2_0/tapered_buf_1/a_210_n610# 0.22fF -C403 pll_full_buffered2_0/tapered_buf_1/a_580_0# pll_full_buffered2_0/tapered_buf_1/a_160_230# 0.02fF -C404 ro_divider_buffered_0/tapered_buf_1/a_n10_230# ro_divider_buffered_0/tapered_buf_1/in 0.02fF -C405 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/a_160_230# 0.17fF -C406 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Z2 0.23fF -C407 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C408 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.16fF -C409 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.16fF -C410 pll_full_buffered1_0/pll_full_0/ro_complete_0/a2 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF -C411 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a4 0.09fF -C412 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a5 0.09fF -C413 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF -C414 ro_divider_buffered_0/ro_complete_0/a5 ro_divider_buffered_0/ro_complete_0/cbank_2/v 0.08fF -C415 ro_divider_buffered_0/ro_complete_0/a0 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF -C416 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q 0.22fF -C417 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z1 0.03fF -C418 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF -C419 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C420 ro_complete_buffered_0/tapered_buf_6/a_4670_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 29.21fF -C421 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.09fF -C422 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.03fF -C423 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_4670_0# 29.21fF -C424 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF -C425 div_pd_buffered_0/tapered_buf_4/a_210_n610# div_pd_buffered_0/tapered_buf_4/a_4670_0# 29.21fF -C426 div_pd_buffered_0/tapered_buf_4/a_160_230# div_pd_buffered_0/tapered_buf_4/a_n10_230# 0.09fF -C427 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF -C428 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_580_0# 0.84fF -C429 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF -C430 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_buffered2_0/pll_full_0/vco 1.58fF -C431 pll_full_buffered1_0/tapered_buf_0/a_n10_230# pll_full_buffered1_0/tapered_buf_0/a_n10_n140# 0.01fF -C432 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF -C433 pll_full_buffered2_0/tapered_buf_0/a_160_n140# pll_full_buffered2_0/tapered_buf_0/a_210_n610# 0.22fF -C434 pll_full_buffered2_0/tapered_buf_0/a_580_0# pll_full_buffered2_0/tapered_buf_0/a_160_230# 0.02fF -C435 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_divider_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C436 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 divider_buffered_0/divider_0/clk 0.45fF -C437 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z4 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/z5 0.04fF -C438 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out 0.05fF -C439 pll_full_buffered2_0/tapered_buf_3/a_1650_0# pll_full_buffered2_0/tapered_buf_3/a_210_n610# 2.89fF -C440 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_divider_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C441 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_n10_230# 0.09fF -C442 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q 0.51fF -C443 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z3 0.06fF -C444 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF -C445 pll_full_buffered1_0/pll_full_0/ro_complete_0/a5 pll_full_buffered1_0/pll_full_0/vco 0.15fF -C446 ro_complete_buffered_0/tapered_buf_7/a_4670_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 29.21fF -C447 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.09fF -C448 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF -C449 divider_buffered_0/tapered_buf_2/a_160_230# divider_buffered_0/tapered_buf_2/a_n10_230# 0.09fF -C450 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Z1 0.02fF -C451 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z4 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z3 0.65fF -C452 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF -C453 pll_full_buffered2_0/tapered_buf_2/out pll_full_buffered2_0/tapered_buf_2/a_210_n610# 26.29fF -C454 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_1/B 0.06fF -C455 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/nor_1/A 0.21fF -C456 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C457 pll_full_buffered2_0/tapered_buf_3/a_160_n140# pll_full_buffered2_0/tapered_buf_3/a_160_230# 0.17fF -C458 div_pd_buffered_0/divider_0/tspc_0/Z2 div_pd_buffered_0/divider_0/tspc_0/Z3 0.16fF -C459 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 div_pd_buffered_0/divider_0/clk 0.12fF -C460 ro_complete_buffered_0/tapered_buf_3/a_580_0# ro_complete_buffered_0/tapered_buf_3/a_210_n610# 0.84fF -C461 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_n10_n140# 0.05fF -C462 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF -C463 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_1/Z3 0.38fF -C464 ro_divider_buffered_0/divider_0/tspc_1/Z1 ro_divider_buffered_0/divider_0/tspc_1/Z2 1.07fF -C465 pll_full_buffered2_0/tapered_buf_5/a_160_n140# pll_full_buffered2_0/tapered_buf_5/a_210_n610# 0.22fF -C466 pll_full_buffered2_0/tapered_buf_5/a_580_0# pll_full_buffered2_0/tapered_buf_5/a_160_230# 0.02fF -C467 cp_buffered_0/tapered_buf_2/in cp_buffered_0/tapered_buf_2/a_160_n140# 0.19fF -C468 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z2 0.20fF -C469 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 ro_divider_buffered_0/divider_0/clk 0.45fF -C470 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/REF 0.12fF -C471 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF -C472 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/tapered_buf_1/in 1.27fF -C473 divider_buffered_0/tapered_buf_0/a_n10_230# divider_buffered_0/tapered_buf_0/in 0.02fF -C474 div_pd_buffered_0/pd_0/tspc_r_0/z5 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.02fF -C475 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.25fF -C476 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 1.45fF -C477 pll_full_buffered2_0/pll_full_0/pd_0/R pll_full_buffered2_0/pll_full_0/pd_0/UP 0.45fF -C478 pll_full_buffered2_0/tapered_buf_2/a_4670_0# pll_full_buffered2_0/tapered_buf_2/a_210_n610# 29.21fF -C479 pll_full_buffered1_0/pll_full_0/cp_0/vbias pll_full_buffered1_0/pll_full_0/cp_0/a_10_n50# 0.19fF -C480 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z4 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/z5 0.04fF -C481 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z2 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z4 0.14fF -C482 divider_buffered_0/divider_0/nor_0/B divider_buffered_0/divider_0/tspc_2/Z3 0.38fF -C483 divider_buffered_0/divider_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/tspc_2/Z4 0.12fF -C484 divider_buffered_0/divider_0/tspc_2/Z1 divider_buffered_0/divider_0/tspc_2/Z2 1.07fF -C485 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF -C486 cp_buffered_0/tapered_buf_0/a_210_n610# cp_buffered_0/tapered_buf_0/a_160_n140# 0.22fF -C487 cp_buffered_0/tapered_buf_0/a_160_230# cp_buffered_0/tapered_buf_0/a_580_0# 0.02fF -C488 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/out 0.61fF -C489 filter_buffered_0/tapered_buf_0/a_580_0# filter_buffered_0/tapered_buf_0/a_210_n610# 0.84fF -C490 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.01fF -C491 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z4 0.12fF -C492 pll_full_buffered1_0/pll_full_0/ro_complete_0/a0 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF -C493 div_pd_buffered_0/tapered_buf_2/a_580_0# div_pd_buffered_0/tapered_buf_2/a_210_n610# 0.84fF -C494 div_pd_buffered_0/tapered_buf_2/a_160_230# div_pd_buffered_0/tapered_buf_2/a_n10_230# 0.09fF -C495 ro_divider_buffered_0/ro_complete_0/a4 ro_divider_buffered_0/divider_0/clk 0.05fF -C496 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF -C497 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered1_0/pll_full_0/vco 0.01fF -C498 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.05fF -C499 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF -C500 pll_full_buffered2_0/pll_full_0/ro_complete_0/a2 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF -C501 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C502 ro_divider_buffered_0/tapered_buf_3/a_160_n140# ro_divider_buffered_0/tapered_buf_3/a_580_0# 0.35fF -C503 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/Out 0.05fF -C504 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/UP 2.89fF -C505 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF -C506 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z4 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z2 0.36fF -C507 pll_full_buffered2_0/pll_full_0/div pll_full_buffered2_0/pll_full_0/vco 2.26fF -C508 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_buffered1_0/pll_full_0/pd_0/UP 0.11fF -C509 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/Z3 0.65fF -C510 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF -C511 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/B 0.20fF -C512 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/and_0/A 0.01fF -C513 pll_full_buffered2_0/tapered_buf_2/in pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF -C514 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered2_0/pll_full_0/pd_0/R 0.01fF -C515 pll_full_buffered2_0/pll_full_0/pd_0/R pll_full_buffered2_0/pll_full_0/div 0.51fF -C516 divider_buffered_0/divider_0/and_0/out1 divider_buffered_0/divider_0/and_0/Z1 0.36fF -C517 ro_divider_buffered_0/ro_complete_0/cbank_0/v ro_divider_buffered_0/ro_complete_0/cbank_2/v 0.04fF -C518 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C519 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF -C520 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z2 0.23fF -C521 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF -C522 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_buffered1_0/pll_full_0/vco 1.46fF -C523 ro_divider_buffered_0/divider_0/tspc_1/Q ro_divider_buffered_0/divider_0/tspc_2/Z3 0.45fF -C524 divider_buffered_0/divider_0/tspc_0/Z3 divider_buffered_0/divider_0/tspc_0/Z4 0.65fF -C525 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B 0.35fF -C526 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_buffered1_0/pll_full_0/vco 0.29fF -C527 div_pd_buffered_0/tapered_buf_0/a_1650_0# div_pd_buffered_0/tapered_buf_0/a_210_n610# 2.89fF -C528 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/UP 0.11fF -C529 divider_buffered_0/divider_0/tspc_1/a_630_n680# divider_buffered_0/divider_0/tspc_0/Q 0.01fF -C530 ro_divider_buffered_0/tapered_buf_4/a_160_n140# ro_divider_buffered_0/tapered_buf_4/a_580_0# 0.35fF -C531 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q 0.55fF -C532 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_buffered2_0/pll_full_0/vco 1.46fF -C533 divider_buffered_0/tapered_buf_1/a_160_n140# divider_buffered_0/divider_0/Out 0.20fF -C534 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_divider_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C535 ro_divider_buffered_0/tapered_buf_2/a_4670_0# ro_divider_buffered_0/tapered_buf_2/a_210_n610# 29.21fF -C536 ro_divider_buffered_0/tapered_buf_2/a_n10_230# ro_divider_buffered_0/tapered_buf_2/a_160_230# 0.09fF -C537 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/a_630_n680# 0.01fF -C538 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/a_n10_n140# 0.01fF -C539 ro_divider_buffered_0/divider_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/tspc_0/Z1 0.06fF -C540 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF -C541 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF -C542 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF -C543 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v pll_full_buffered1_0/pll_full_0/vco 1.27fF -C544 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/divider_0/and_0/A 0.16fF -C545 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 ro_divider_buffered_0/divider_0/clk 0.12fF -C546 pll_full_buffered1_0/pll_full_0/divider_0/and_0/out1 pll_full_buffered1_0/pll_full_0/divider_0/and_0/A 0.01fF -C547 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C548 ro_divider_buffered_0/tapered_buf_5/a_160_n140# ro_divider_buffered_0/tapered_buf_5/a_580_0# 0.35fF -C549 ro_divider_buffered_0/divider_0/and_0/out1 ro_divider_buffered_0/divider_0/and_0/Z1 0.36fF -C550 pll_full_buffered1_0/pll_full_0/ref pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z4 0.02fF -C551 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/tspc_2/a_630_n680# 0.04fF -C552 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/Z2 0.36fF -C553 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF -C554 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/nor_0/B 0.06fF -C555 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z1 0.01fF -C556 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q 0.22fF -C557 pll_full_buffered2_0/pll_full_0/ref pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z1 0.17fF -C558 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 divider_buffered_0/divider_0/clk 0.12fF -C559 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF -C560 ro_divider_buffered_0/ro_complete_0/a1 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.03fF -C561 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/Z1 0.04fF -C562 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z2 0.01fF -C563 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/clk 0.05fF -C564 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/a_n10_n140# 0.01fF -C565 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/divider_0/and_0/OUT 0.05fF -C566 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.04fF -C567 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF -C568 divider_buffered_0/divider_0/tspc_1/Z3 divider_buffered_0/divider_0/tspc_1/Z2 0.16fF -C569 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q ro_divider_buffered_0/divider_0/clk 0.60fF -C570 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.09fF -C571 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF -C572 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/and_0/A 0.80fF -C573 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C574 div_pd_buffered_0/tapered_buf_0/a_210_n610# div_pd_buffered_0/tapered_buf_0/a_4670_0# 29.21fF -C575 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/and_pd_0/Out1 0.12fF -C576 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/UP 0.21fF -C577 ro_divider_buffered_0/tapered_buf_6/a_160_n140# ro_divider_buffered_0/tapered_buf_6/a_580_0# 0.35fF -C578 pll_full_buffered2_0/tapered_buf_1/a_1650_0# pll_full_buffered2_0/tapered_buf_1/a_210_n610# 2.89fF -C579 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered1_0/pll_full_0/pd_0/DOWN 0.03fF -C580 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.07fF -C581 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/mc2 0.05fF -C582 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C583 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z3 0.38fF -C584 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z4 0.12fF -C585 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z2 1.07fF -C586 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.35fF -C587 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.36fF -C588 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z2 pll_full_buffered2_0/pll_full_0/pd_0/R 0.21fF -C589 div_pd_buffered_0/tapered_buf_2/a_1650_0# div_pd_buffered_0/tapered_buf_2/a_4670_0# 4.78fF -C590 pll_full_buffered1_0/tapered_buf_2/a_n10_230# pll_full_buffered1_0/pll_full_0/vco 0.02fF -C591 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/B 0.18fF -C592 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/a_n10_n140# 0.01fF -C593 ro_divider_buffered_0/divider_0/and_0/OUT ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.03fF -C594 ro_divider_buffered_0/tapered_buf_2/a_n10_230# ro_divider_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF -C595 ro_divider_buffered_0/ro_complete_0/a1 ro_divider_buffered_0/divider_0/clk 0.05fF -C596 filter_buffered_0/tapered_buf_0/a_1650_0# filter_buffered_0/tapered_buf_0/a_4670_0# 4.78fF -C597 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.22fF -C598 divider_buffered_0/divider_0/nor_0/Z1 divider_buffered_0/divider_0/and_0/B 0.78fF -C599 io_clamp_high[0] io_analog[4] 0.53fF -C600 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF -C601 ro_divider_buffered_0/tapered_buf_3/a_n10_230# ro_divider_buffered_0/tapered_buf_3/in 0.02fF -C602 div_pd_buffered_0/tapered_buf_4/a_n10_n140# div_pd_buffered_0/tapered_buf_4/a_n10_230# 0.01fF -C603 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/tspc_0/Z4 0.21fF -C604 divider_buffered_0/divider_0/tspc_1/Z1 divider_buffered_0/divider_0/tspc_1/Z4 0.00fF -C605 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z4 0.12fF -C606 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF -C607 div_pd_buffered_0/tapered_buf_0/a_n10_n140# div_pd_buffered_0/tapered_buf_0/a_n10_230# 0.01fF -C608 ro_divider_buffered_0/tapered_buf_7/a_160_n140# ro_divider_buffered_0/tapered_buf_7/a_580_0# 0.35fF -C609 pll_full_buffered2_0/tapered_buf_0/a_1650_0# pll_full_buffered2_0/tapered_buf_0/a_210_n610# 2.89fF -C610 pll_full_buffered1_0/pll_full_0/pd_0/R pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Z1 0.02fF -C611 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/nor_0/B 0.00fF -C612 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_0/Q 0.14fF -C613 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.05fF -C614 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/clk 0.01fF -C615 divider_buffered_0/tapered_buf_1/a_1650_0# divider_buffered_0/tapered_buf_1/a_210_n610# 2.89fF -C616 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 divider_buffered_0/divider_0/clk 0.12fF -C617 pll_full_buffered2_0/pll_full_0/divider_0/and_0/out1 pll_full_buffered2_0/pll_full_0/divider_0/and_0/Z1 0.36fF -C618 ro_divider_buffered_0/tapered_buf_8/a_210_n610# ro_divider_buffered_0/ro_complete_0/a0 26.29fF -C619 ro_divider_buffered_0/divider_0/tspc_1/Z1 ro_divider_buffered_0/divider_0/tspc_0/Q 0.01fF -C620 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_0/vin ro_divider_buffered_0/ro_complete_0/cbank_2/v 1.45fF -C621 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF -C622 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/a_n10_n140# 0.01fF -C623 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z4 0.00fF -C624 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered1_0/pll_full_0/vco 0.11fF -C625 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF -C626 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF -C627 ro_divider_buffered_0/tapered_buf_4/a_n10_230# ro_divider_buffered_0/tapered_buf_4/in 0.02fF -C628 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.05fF -C629 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered2_0/pll_full_0/pd_0/UP 0.03fF -C630 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF -C631 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/vco 0.11fF -C632 ro_divider_buffered_0/tapered_buf_0/a_n10_230# ro_divider_buffered_0/tapered_buf_0/in 0.02fF -C633 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/a_210_n610# 0.22fF -C634 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z3 0.06fF -C635 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# divider_buffered_0/divider_0/prescaler_0/Out 0.04fF -C636 ro_divider_buffered_0/tapered_buf_8/a_160_n140# ro_divider_buffered_0/tapered_buf_8/a_580_0# 0.35fF -C637 ro_divider_buffered_0/ro_complete_0/a4 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.12fF -C638 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF -C639 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_divider_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C640 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.03fF -C641 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_1/Z4 0.21fF -C642 ro_divider_buffered_0/divider_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/tspc_0/Z2 0.16fF -C643 pll_full_buffered2_0/tapered_buf_5/a_1650_0# pll_full_buffered2_0/tapered_buf_5/a_210_n610# 2.89fF -C644 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT 0.05fF -C645 divider_buffered_0/divider_0/nor_0/Z1 divider_buffered_0/divider_0/nor_1/B 0.18fF -C646 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C647 ro_divider_buffered_0/divider_0/tspc_1/Q ro_divider_buffered_0/divider_0/tspc_2/a_630_n680# 0.01fF -C648 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 ro_divider_buffered_0/divider_0/clk 0.12fF -C649 ro_complete_buffered_0/tapered_buf_0/in ro_complete_buffered_0/tapered_buf_0/a_n10_n140# 0.04fF -C650 divider_buffered_0/divider_0/tspc_0/Z3 divider_buffered_0/divider_0/prescaler_0/Out 0.45fF -C651 ro_divider_buffered_0/tapered_buf_5/a_n10_230# ro_divider_buffered_0/tapered_buf_5/in 0.02fF -C652 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/and_pd_0/Out1 0.05fF -C653 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/tspc_r_1/Qbar 0.01fF -C654 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/R 0.27fF -C655 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_2/in 0.04fF -C656 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C657 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/div 0.03fF -C658 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered2_0/pll_full_0/vco 0.06fF -C659 cp_buffered_0/cp_0/upbar cp_buffered_0/cp_0/down 0.02fF -C660 pll_full_buffered1_0/pll_full_0/ref pll_full_buffered1_0/pll_full_0/pd_0/R 0.61fF -C661 div_pd_buffered_0/pd_0/UP div_pd_buffered_0/tapered_buf_0/a_160_n140# 0.19fF -C662 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/nor_1/B 1.21fF -C663 ro_complete_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_2/in 0.19fF -C664 ro_divider_buffered_0/tapered_buf_1/a_n10_230# ro_divider_buffered_0/tapered_buf_1/a_160_230# 0.09fF -C665 divider_buffered_0/divider_0/tspc_1/a_630_n680# divider_buffered_0/divider_0/nor_1/B 0.35fF -C666 pll_full_buffered2_0/pll_full_0/ref pll_full_buffered2_0/tapered_buf_2/in 0.32fF -C667 cp_buffered_0/cp_0/upbar cp_buffered_0/tapered_buf_2/a_210_n610# 26.29fF -C668 ro_complete_buffered_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_3/a_n10_230# 0.02fF -C669 divider_buffered_0/divider_0/tspc_2/Z2 divider_buffered_0/divider_0/tspc_2/Z3 0.16fF -C670 divider_buffered_0/divider_0/nor_0/B divider_buffered_0/divider_0/tspc_2/Z4 0.22fF -C671 filter_buffered_0/tapered_buf_1/a_210_n610# filter_buffered_0/tapered_buf_1/a_1650_0# 2.89fF -C672 pll_full_buffered1_0/pll_full_0/ro_complete_0/a0 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C673 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF -C674 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a4 0.09fF -C675 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a5 0.09fF -C676 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF -C677 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF -C678 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/vco 0.01fF -C679 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF -C680 ro_divider_buffered_0/tapered_buf_3/a_580_0# ro_divider_buffered_0/tapered_buf_3/a_1650_0# 1.27fF -C681 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/vco 0.64fF -C682 ro_divider_buffered_0/tapered_buf_6/a_n10_230# ro_divider_buffered_0/tapered_buf_6/in 0.02fF -C683 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 divider_buffered_0/divider_0/clk 0.11fF -C684 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z4 pll_full_buffered2_0/pll_full_0/div 0.02fF -C685 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/z5 0.11fF -C686 divider_buffered_0/divider_0/and_0/A divider_buffered_0/divider_0/and_0/B 0.18fF -C687 ro_divider_buffered_0/divider_0/tspc_1/Q ro_divider_buffered_0/divider_0/tspc_2/Z4 0.15fF -C688 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z2 0.15fF -C689 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/and_0/B 0.18fF -C690 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF -C691 pll_full_buffered2_0/tapered_buf_3/a_160_n140# pll_full_buffered2_0/pll_full_0/div 0.19fF -C692 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 0.22fF -C693 ro_complete_buffered_0/tapered_buf_0/a_580_0# ro_complete_buffered_0/tapered_buf_0/a_160_230# 0.02fF -C694 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_divider_buffered_0/divider_0/clk 0.14fF -C695 cp_buffered_0/tapered_buf_2/a_4670_0# cp_buffered_0/tapered_buf_2/a_1650_0# 4.78fF -C696 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z2 0.01fF -C697 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF -C698 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C699 ro_divider_buffered_0/tapered_buf_4/a_580_0# ro_divider_buffered_0/tapered_buf_4/a_1650_0# 1.27fF -C700 divider_buffered_0/divider_0/tspc_0/Z1 divider_buffered_0/divider_0/tspc_0/Z3 0.06fF -C701 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF -C702 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/and_0/A 0.01fF -C703 ro_divider_buffered_0/tapered_buf_7/a_n10_230# ro_divider_buffered_0/tapered_buf_7/in 0.02fF -C704 div_pd_buffered_0/tapered_buf_0/a_210_n610# div_pd_buffered_0/tapered_buf_0/a_160_n140# 0.22fF -C705 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF -C706 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C707 divider_buffered_0/divider_0/prescaler_0/tspc_2/D divider_buffered_0/divider_0/prescaler_0/nand_0/z1 0.24fF -C708 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# divider_buffered_0/divider_0/clk 0.01fF -C709 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/and_0/B 0.08fF -C710 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/nor_0/B 0.22fF -C711 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.19fF -C712 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/clk 0.01fF -C713 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/a1 3.18fF -C714 ro_divider_buffered_0/tapered_buf_0/a_210_n610# ro_divider_buffered_0/tapered_buf_0/a_160_n140# 0.22fF -C715 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B 0.18fF -C716 pll_full_buffered1_0/pll_full_0/ro_complete_0/a4 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF -C717 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF -C718 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_5/vin ro_divider_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C719 pll_full_buffered2_0/tapered_buf_2/a_n10_230# pll_full_buffered2_0/tapered_buf_2/in 0.02fF -C720 div_pd_buffered_0/tapered_buf_2/a_n10_230# div_pd_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF -C721 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z2 0.01fF -C722 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z2 0.01fF -C723 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF -C724 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF -C725 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/tapered_buf_1/a_210_n610# 26.29fF -C726 ro_divider_buffered_0/divider_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/nor_0/B 0.00fF -C727 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/divider_0/mc2 0.34fF -C728 div_pd_buffered_0/tapered_buf_0/a_1650_0# div_pd_buffered_0/tapered_buf_0/a_580_0# 1.27fF -C729 div_pd_buffered_0/tapered_buf_1/a_n10_n140# div_pd_buffered_0/tapered_buf_1/a_160_n140# 0.05fF -C730 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.01fF -C731 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z4 0.21fF -C732 ro_divider_buffered_0/tapered_buf_5/a_580_0# ro_divider_buffered_0/tapered_buf_5/a_1650_0# 1.27fF -C733 divider_buffered_0/tapered_buf_1/a_4670_0# divider_buffered_0/tapered_buf_1/a_210_n610# 29.21fF -C734 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z3 0.45fF -C735 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q 0.04fF -C736 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/and_0/A 0.26fF -C737 ro_divider_buffered_0/tapered_buf_8/a_n10_230# ro_divider_buffered_0/tapered_buf_8/in 0.02fF -C738 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/in 0.02fF -C739 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/z5 0.11fF -C740 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/OUT 0.05fF -C741 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/nor_0/B 0.42fF -C742 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.03fF -C743 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# 0.05fF -C744 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/nor_1/A 0.35fF -C745 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF -C746 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF -C747 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/prescaler_0/Out 0.15fF -C748 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF -C749 divider_buffered_0/divider_0/prescaler_0/tspc_2/D divider_buffered_0/divider_0/clk 0.26fF -C750 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z2 0.25fF -C751 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z2 0.40fF -C752 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D div_pd_buffered_0/divider_0/clk 0.29fF -C753 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/and_0/A 0.26fF -C754 ro_divider_buffered_0/tapered_buf_0/a_160_n140# ro_divider_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF -C755 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF -C756 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/a_1710_0# 0.83fF -C757 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF -C758 pll_full_buffered1_0/pll_full_0/ro_complete_0/a3 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C759 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/z5 pll_full_buffered1_0/pll_full_0/div 0.04fF -C760 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF -C761 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B 0.00fF -C762 div_pd_buffered_0/tapered_buf_0/out div_pd_buffered_0/tapered_buf_0/a_210_n610# 26.29fF -C763 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.11fF -C764 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF -C765 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF -C766 ro_divider_buffered_0/divider_0/and_0/OUT ro_divider_buffered_0/divider_0/and_0/Z1 0.04fF -C767 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q ro_divider_buffered_0/divider_0/clk 0.05fF -C768 div_pd_buffered_0/tapered_buf_0/a_n10_n140# div_pd_buffered_0/pd_0/UP 0.04fF -C769 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z4 0.02fF -C770 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF -C771 ro_divider_buffered_0/tapered_buf_6/a_580_0# ro_divider_buffered_0/tapered_buf_6/a_1650_0# 1.27fF -C772 pll_full_buffered2_0/tapered_buf_1/a_160_n140# pll_full_buffered2_0/tapered_buf_1/in 0.19fF -C773 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z2 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z3 0.16fF -C774 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z4 0.22fF -C775 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z1 0.09fF -C776 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Q 0.04fF -C777 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.06fF -C778 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF -C779 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.38fF -C780 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.11fF -C781 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/clk 0.11fF -C782 ro_complete_buffered_0/tapered_buf_3/a_1650_0# ro_complete_buffered_0/tapered_buf_3/a_210_n610# 2.89fF -C783 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF -C784 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C785 ro_divider_buffered_0/divider_0/and_0/OUT ro_divider_buffered_0/divider_0/prescaler_0/nand_0/z1 0.01fF -C786 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a5 2.39fF -C787 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C788 divider_buffered_0/tapered_buf_0/a_n10_n140# divider_buffered_0/tapered_buf_0/a_n10_230# 0.01fF -C789 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/in 0.19fF -C790 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.18fF -C791 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF -C792 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 divider_buffered_0/divider_0/clk 0.11fF -C793 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z4 0.21fF -C794 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C795 pll_full_buffered2_0/pll_full_0/ro_complete_0/a0 pll_full_buffered2_0/pll_full_0/vco 0.11fF -C796 ro_divider_buffered_0/tapered_buf_7/a_580_0# ro_divider_buffered_0/tapered_buf_7/a_1650_0# 1.27fF -C797 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.01fF -C798 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/tspc_0/Z1 0.03fF -C799 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF -C800 pll_full_buffered2_0/tapered_buf_0/a_160_n140# pll_full_buffered2_0/tapered_buf_0/in 0.19fF -C801 pll_full_buffered2_0/pll_full_0/divider_0/and_0/A pll_full_buffered2_0/pll_full_0/divider_0/and_0/B 0.18fF -C802 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_divider_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C803 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/nor_0/B 0.47fF -C804 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Z3 0.05fF -C805 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF -C806 pll_full_buffered2_0/pll_full_0/pd_0/R pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Out1 0.33fF -C807 pll_full_buffered1_0/pll_full_0/ro_complete_0/a3 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF -C808 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF -C809 pll_full_buffered2_0/tapered_buf_2/a_4670_0# pll_full_buffered2_0/tapered_buf_2/a_1650_0# 4.78fF -C810 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z2 0.14fF -C811 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z4 0.00fF -C812 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT 0.14fF -C813 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/vco 0.51fF -C814 ro_divider_buffered_0/divider_0/tspc_2/Z1 ro_divider_buffered_0/divider_0/tspc_2/Z3 0.06fF -C815 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/and_0/B 0.31fF -C816 cp_buffered_0/tapered_buf_1/a_1650_0# cp_buffered_0/tapered_buf_1/a_4670_0# 4.78fF -C817 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B pll_full_buffered1_0/pll_full_0/divider_0/and_0/B 0.29fF -C818 divider_buffered_0/tapered_buf_0/a_160_n140# divider_buffered_0/tapered_buf_0/a_160_230# 0.17fF -C819 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.12fF -C820 pll_full_buffered1_0/pll_full_0/ref pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 0.65fF -C821 div_pd_buffered_0/tapered_buf_1/a_4670_0# div_pd_buffered_0/tapered_buf_1/a_210_n610# 29.21fF -C822 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF -C823 ro_divider_buffered_0/tapered_buf_8/a_580_0# ro_divider_buffered_0/tapered_buf_8/a_1650_0# 1.27fF -C824 ro_complete_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_2/a_n10_n140# 0.05fF -C825 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_divider_buffered_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF -C826 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/out1 0.31fF -C827 div_pd_buffered_0/divider_0/tspc_1/Z4 div_pd_buffered_0/divider_0/tspc_0/Q 0.15fF -C828 divider_buffered_0/tapered_buf_1/a_n10_n140# divider_buffered_0/divider_0/Out 0.04fF -C829 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF -C830 divider_buffered_0/tapered_buf_2/a_160_n140# divider_buffered_0/tapered_buf_2/a_n10_n140# 0.05fF -C831 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/and_0/B 0.08fF -C832 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF -C833 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF -C834 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_buffered1_0/pll_full_0/vco 0.12fF -C835 ro_divider_buffered_0/divider_0/tspc_1/Q ro_divider_buffered_0/divider_0/nor_0/B 0.22fF -C836 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/R 0.36fF -C837 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF -C838 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.20fF -C839 div_pd_buffered_0/pd_0/tspc_r_1/Z1 div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.71fF -C840 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF -C841 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar pll_full_buffered1_0/pll_full_0/pd_0/DOWN 0.02fF -C842 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_buffered1_0/pll_full_0/pd_0/R 0.30fF -C843 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/nor_1/B 0.35fF -C844 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/Q 0.05fF -C845 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/Z4 0.36fF -C846 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Z2 0.01fF -C847 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/and_0/B 0.78fF -C848 divider_buffered_0/tapered_buf_1/out divider_buffered_0/tapered_buf_1/a_210_n610# 26.29fF -C849 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C850 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_buffered2_0/pll_full_0/vco 0.26fF -C851 divider_buffered_0/divider_0/tspc_2/Z3 divider_buffered_0/divider_0/Out 0.05fF -C852 divider_buffered_0/divider_0/tspc_2/Z2 divider_buffered_0/divider_0/tspc_2/Z4 0.36fF -C853 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_divider_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF -C854 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_divider_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C855 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/and_0/B 0.29fF -C856 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/a_n10_230# 0.01fF -C857 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q 0.55fF -C858 ro_divider_buffered_0/tapered_buf_0/a_1650_0# ro_divider_buffered_0/tapered_buf_0/a_580_0# 1.27fF -C859 ro_divider_buffered_0/divider_0/tspc_1/Z2 ro_divider_buffered_0/divider_0/tspc_1/Z3 0.16fF -C860 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.15fF -C861 ro_divider_buffered_0/tapered_buf_1/a_4670_0# ro_divider_buffered_0/tapered_buf_1/a_210_n610# 29.21fF -C862 ro_divider_buffered_0/ro_complete_0/a5 ro_divider_buffered_0/divider_0/clk 0.10fF -C863 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B 0.22fF -C864 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF -C865 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF -C866 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_1650_0# 2.89fF -C867 divider_buffered_0/divider_0/nor_1/Z1 divider_buffered_0/divider_0/and_0/B 0.18fF -C868 pll_full_buffered2_0/pll_full_0/ro_complete_0/a5 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF -C869 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C870 ro_divider_buffered_0/tapered_buf_3/a_1650_0# ro_divider_buffered_0/tapered_buf_3/a_4670_0# 4.78fF -C871 ro_divider_buffered_0/tapered_buf_3/a_160_n140# ro_divider_buffered_0/tapered_buf_3/a_160_230# 0.17fF -C872 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/R 0.30fF -C873 ro_complete_buffered_0/tapered_buf_1/in ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.36fF -C874 divider_buffered_0/divider_0/tspc_1/Q divider_buffered_0/divider_0/tspc_2/Z1 0.01fF -C875 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z3 0.45fF -C876 pll_full_buffered2_0/pll_full_0/ro_complete_0/a3 pll_full_buffered2_0/pll_full_0/vco 0.11fF -C877 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.05fF -C878 pll_full_buffered2_0/tapered_buf_2/in pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/z5 0.03fF -C879 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z2 pll_full_buffered2_0/pll_full_0/pd_0/R 0.21fF -C880 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/tspc_0/Z3 0.38fF -C881 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a1 0.14fF -C882 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C883 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a3 0.09fF -C884 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF -C885 divider_buffered_0/divider_0/tspc_0/Q divider_buffered_0/divider_0/tspc_1/Z3 0.45fF -C886 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z2 0.40fF -C887 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/div 0.04fF -C888 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF -C889 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF -C890 ro_divider_buffered_0/tapered_buf_4/a_1650_0# ro_divider_buffered_0/tapered_buf_4/a_4670_0# 4.78fF -C891 ro_divider_buffered_0/tapered_buf_4/a_160_n140# ro_divider_buffered_0/tapered_buf_4/a_160_230# 0.17fF -C892 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF -C893 divider_buffered_0/divider_0/tspc_1/a_630_n680# divider_buffered_0/divider_0/tspc_1/Q 0.04fF -C894 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.12fF -C895 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF -C896 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF -C897 pll_full_buffered2_0/tapered_buf_4/a_160_n140# pll_full_buffered2_0/tapered_buf_4/a_n10_n140# 0.05fF -C898 pll_full_buffered2_0/tapered_buf_4/a_580_0# pll_full_buffered2_0/tapered_buf_4/a_160_230# 0.02fF -C899 pll_full_buffered2_0/tapered_buf_3/a_4670_0# pll_full_buffered2_0/tapered_buf_3/a_1650_0# 4.78fF -C900 ro_divider_buffered_0/tapered_buf_4/a_210_n610# ro_divider_buffered_0/ro_complete_0/a4 26.29fF -C901 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z2 0.14fF -C902 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.32fF -C903 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF -C904 divider_buffered_0/tapered_buf_1/a_n10_230# divider_buffered_0/tapered_buf_1/a_160_230# 0.09fF -C905 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/clk 0.01fF -C906 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_divider_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF -C907 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF -C908 cp_buffered_0/tapered_buf_0/in cp_buffered_0/tapered_buf_0/a_160_n140# 0.19fF -C909 pll_full_buffered1_0/pll_full_0/ref pll_full_buffered1_0/pll_full_0/vco 0.55fF -C910 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C911 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q 0.04fF -C912 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z4 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z2 0.36fF -C913 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF -C914 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF -C915 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_buffered1_0/pll_full_0/vco 0.01fF -C916 divider_buffered_0/divider_0/nor_1/Z1 divider_buffered_0/divider_0/nor_1/B 0.06fF -C917 pll_full_buffered2_0/pll_full_0/ro_complete_0/a2 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF -C918 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_divider_buffered_0/divider_0/clk 0.01fF -C919 pll_full_buffered1_0/pll_full_0/divider_0/and_0/out1 pll_full_buffered1_0/pll_full_0/divider_0/and_0/Z1 0.36fF -C920 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF -C921 ro_complete_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_2/a_4670_0# 4.78fF -C922 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z3 0.06fF -C923 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z2 0.11fF -C924 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C925 ro_divider_buffered_0/tapered_buf_5/a_1650_0# ro_divider_buffered_0/tapered_buf_5/a_4670_0# 4.78fF -C926 ro_divider_buffered_0/tapered_buf_5/a_160_n140# ro_divider_buffered_0/tapered_buf_5/a_160_230# 0.17fF -C927 cp_buffered_0/tapered_buf_0/a_1650_0# cp_buffered_0/tapered_buf_0/a_4670_0# 4.78fF -C928 pll_full_buffered1_0/tapered_buf_2/a_210_n610# pll_full_buffered1_0/tapered_buf_2/out 26.29fF -C929 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/R 0.03fF -C930 pll_full_buffered1_0/pll_full_0/cp_0/upbar pll_full_buffered1_0/pll_full_0/pd_0/DOWN 0.04fF -C931 div_pd_buffered_0/tapered_buf_0/a_580_0# div_pd_buffered_0/tapered_buf_0/a_160_n140# 0.35fF -C932 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/nor_1/B 0.38fF -C933 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C934 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF -C935 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF -C936 divider_buffered_0/divider_0/tspc_1/a_630_n680# divider_buffered_0/divider_0/tspc_1/Z4 0.12fF -C937 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z4 0.15fF -C938 pll_full_buffered2_0/tapered_buf_4/a_n10_230# pll_full_buffered2_0/tapered_buf_4/a_n10_n140# 0.01fF -C939 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar 0.01fF -C940 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z3 0.06fF -C941 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/and_0/B 0.01fF -C942 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 divider_buffered_0/divider_0/clk 0.11fF -C943 pll_full_buffered2_0/tapered_buf_2/a_160_n140# pll_full_buffered2_0/tapered_buf_2/a_580_0# 0.35fF -C944 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_2/Z2 0.20fF -C945 ro_divider_buffered_0/divider_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/tspc_1/Z3 0.05fF -C946 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C947 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF -C948 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_divider_buffered_0/divider_0/clk 1.30fF -C949 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v pll_full_buffered1_0/pll_full_0/vco 1.36fF -C950 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D ro_divider_buffered_0/divider_0/clk 0.29fF -C951 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C952 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z4 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.12fF -C953 pll_full_buffered2_0/tapered_buf_4/a_160_n140# pll_full_buffered2_0/tapered_buf_4/a_580_0# 0.35fF -C954 ro_divider_buffered_0/tapered_buf_6/a_1650_0# ro_divider_buffered_0/tapered_buf_6/a_4670_0# 4.78fF -C955 ro_divider_buffered_0/tapered_buf_6/a_160_n140# ro_divider_buffered_0/tapered_buf_6/a_160_230# 0.17fF -C956 pll_full_buffered1_0/tapered_buf_1/a_n10_n140# pll_full_buffered1_0/tapered_buf_1/in 0.04fF -C957 div_pd_buffered_0/pd_0/tspc_r_0/z5 div_pd_buffered_0/pd_0/UP 0.03fF -C958 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF -C959 filter_buffered_0/tapered_buf_1/a_160_230# filter_buffered_0/tapered_buf_1/a_160_n140# 0.17fF -C960 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Q 0.51fF -C961 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF -C962 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF -C963 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/clk 0.51fF -C964 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.04fF -C965 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z3 pll_full_buffered2_0/pll_full_0/div 0.05fF -C966 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z2 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z4 0.36fF -C967 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered2_0/pll_full_0/div 0.65fF -C968 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF -C969 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D ro_divider_buffered_0/divider_0/prescaler_0/nand_0/z1 0.24fF -C970 cp_buffered_0/tapered_buf_1/a_210_n610# cp_buffered_0/tapered_buf_1/a_1650_0# 2.89fF -C971 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.35fF -C972 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF -C973 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C974 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF -C975 ro_complete_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/in 0.02fF -C976 ro_divider_buffered_0/ro_complete_0/cbank_0/v ro_divider_buffered_0/divider_0/clk 1.27fF -C977 filter_buffered_0/tapered_buf_0/a_4670_0# filter_buffered_0/tapered_buf_0/a_210_n610# 29.21fF -C978 filter_buffered_0/tapered_buf_0/a_n10_230# filter_buffered_0/tapered_buf_0/a_160_230# 0.09fF -C979 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF -C980 pll_full_buffered2_0/pll_full_0/ro_complete_0/a3 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF -C981 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF -C982 pll_full_buffered2_0/tapered_buf_4/a_1650_0# pll_full_buffered2_0/tapered_buf_4/a_4670_0# 4.78fF -C983 pll_full_buffered2_0/tapered_buf_4/a_160_n140# pll_full_buffered2_0/tapered_buf_4/a_160_230# 0.17fF -C984 ro_divider_buffered_0/tapered_buf_7/a_1650_0# ro_divider_buffered_0/tapered_buf_7/a_4670_0# 4.78fF -C985 ro_divider_buffered_0/tapered_buf_7/a_160_n140# ro_divider_buffered_0/tapered_buf_7/a_160_230# 0.17fF -C986 filter_buffered_0/tapered_buf_1/a_n10_230# filter_buffered_0/tapered_buf_1/a_160_230# 0.09fF -C987 pll_full_buffered1_0/tapered_buf_0/a_n10_n140# pll_full_buffered1_0/tapered_buf_0/in 0.04fF -C988 div_pd_buffered_0/pd_0/and_pd_0/Z1 div_pd_buffered_0/pd_0/UP 0.06fF -C989 divider_buffered_0/tapered_buf_1/a_580_0# divider_buffered_0/tapered_buf_1/a_1650_0# 1.27fF -C990 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_2/Z2 0.20fF -C991 divider_buffered_0/divider_0/mc2 divider_buffered_0/divider_0/and_0/out1 0.06fF -C992 pll_full_buffered1_0/pll_full_0/ro_complete_0/a3 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF -C993 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C994 pll_full_buffered2_0/tapered_buf_2/a_210_n610# pll_full_buffered2_0/tapered_buf_2/a_580_0# 0.84fF -C995 ro_divider_buffered_0/divider_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/tspc_0/Q 0.05fF -C996 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.13fF -C997 ro_divider_buffered_0/divider_0/tspc_2/Z1 ro_divider_buffered_0/divider_0/tspc_2/Z4 0.00fF -C998 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C999 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF -C1000 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_buffered1_0/pll_full_0/vco 1.46fF -C1001 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF -C1002 divider_buffered_0/divider_0/tspc_0/Z3 divider_buffered_0/divider_0/tspc_0/a_630_n680# 0.05fF -C1003 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.08fF -C1004 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C1005 pll_full_buffered1_0/tapered_buf_2/a_160_n140# pll_full_buffered1_0/tapered_buf_2/a_210_n610# 0.22fF -C1006 pll_full_buffered1_0/tapered_buf_2/a_580_0# pll_full_buffered1_0/tapered_buf_2/a_160_230# 0.02fF -C1007 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z4 0.02fF -C1008 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C1009 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_buffered2_0/pll_full_0/vco 0.45fF -C1010 pll_full_buffered2_0/tapered_buf_4/a_4670_0# pll_full_buffered2_0/tapered_buf_4/a_210_n610# 29.21fF -C1011 pll_full_buffered2_0/tapered_buf_4/a_n10_230# pll_full_buffered2_0/tapered_buf_4/a_160_230# 0.09fF -C1012 ro_divider_buffered_0/tapered_buf_8/a_1650_0# ro_divider_buffered_0/tapered_buf_8/a_4670_0# 4.78fF -C1013 ro_divider_buffered_0/tapered_buf_8/a_160_n140# ro_divider_buffered_0/tapered_buf_8/a_160_230# 0.17fF -C1014 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF -C1015 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/tspc_2/Z4 0.02fF -C1016 divider_buffered_0/tapered_buf_2/a_580_0# divider_buffered_0/tapered_buf_2/a_160_230# 0.02fF -C1017 ro_divider_buffered_0/ro_complete_0/a5 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF -C1018 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_divider_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C1019 pll_full_buffered1_0/pll_full_0/ro_complete_0/a4 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C1020 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered1_0/pll_full_0/div 0.12fF -C1021 ro_divider_buffered_0/divider_0/tspc_0/Q ro_divider_buffered_0/divider_0/tspc_1/Z3 0.45fF -C1022 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_580_0# 1.27fF -C1023 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z3 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z4 0.65fF -C1024 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C1025 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C1026 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF -C1027 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.11fF -C1028 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF -C1029 pll_full_buffered1_0/tapered_buf_1/a_160_n140# pll_full_buffered1_0/tapered_buf_1/a_210_n610# 0.22fF -C1030 pll_full_buffered1_0/tapered_buf_1/a_580_0# pll_full_buffered1_0/tapered_buf_1/a_160_230# 0.02fF -C1031 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.20fF -C1032 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/tspc_1/Z3 0.38fF -C1033 pll_full_buffered2_0/tapered_buf_1/a_160_n140# pll_full_buffered2_0/tapered_buf_1/a_580_0# 0.35fF -C1034 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 divider_buffered_0/divider_0/prescaler_0/Out 0.11fF -C1035 ro_divider_buffered_0/tapered_buf_0/a_160_n140# ro_divider_buffered_0/tapered_buf_0/a_160_230# 0.17fF -C1036 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF -C1037 pll_full_buffered1_0/pll_full_0/filter_0/a_4216_n5230# pll_full_buffered1_0/pll_full_0/vco 1.58fF -C1038 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z1 0.03fF -C1039 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C1040 ro_divider_buffered_0/tapered_buf_0/a_1650_0# ro_divider_buffered_0/tapered_buf_0/a_4670_0# 4.78fF -C1041 ro_divider_buffered_0/divider_0/tspc_1/Z3 ro_divider_buffered_0/divider_0/tspc_1/Q 0.05fF -C1042 ro_divider_buffered_0/divider_0/tspc_1/Z2 ro_divider_buffered_0/divider_0/tspc_1/Z4 0.36fF -C1043 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.05fF -C1044 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_divider_buffered_0/divider_0/clk 0.11fF -C1045 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_160_n140# 0.22fF -C1046 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z2 0.14fF -C1047 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF -C1048 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered1_0/pll_full_0/vco 0.11fF -C1049 io_clamp_low[2] io_analog[6] 0.53fF -C1050 ro_divider_buffered_0/tapered_buf_3/a_580_0# ro_divider_buffered_0/tapered_buf_3/a_210_n610# 0.84fF -C1051 ro_divider_buffered_0/tapered_buf_3/a_160_n140# ro_divider_buffered_0/tapered_buf_3/a_n10_n140# 0.05fF -C1052 divider_buffered_0/divider_0/tspc_1/Q divider_buffered_0/divider_0/tspc_2/Z3 0.45fF -C1053 pll_full_buffered1_0/tapered_buf_0/a_160_n140# pll_full_buffered1_0/tapered_buf_0/a_210_n610# 0.22fF -C1054 pll_full_buffered1_0/tapered_buf_0/a_580_0# pll_full_buffered1_0/tapered_buf_0/a_160_230# 0.02fF -C1055 div_pd_buffered_0/pd_0/and_pd_0/Out1 div_pd_buffered_0/pd_0/and_pd_0/Z1 0.18fF -C1056 pll_full_buffered2_0/tapered_buf_0/a_160_n140# pll_full_buffered2_0/tapered_buf_0/a_580_0# 0.35fF -C1057 ro_complete_buffered_0/tapered_buf_2/in ro_complete_buffered_0/tapered_buf_2/a_n10_230# 0.02fF -C1058 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.20fF -C1059 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF -C1060 pll_full_buffered1_0/pll_full_0/pd_0/DOWN pll_full_buffered1_0/pll_full_0/cp_0/a_1710_0# 0.32fF -C1061 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z4 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/z5 0.04fF -C1062 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/tapered_buf_0/a_160_230# 0.09fF -C1063 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.20fF -C1064 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.09fF -C1065 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z2 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z4 0.14fF -C1066 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a1 0.14fF -C1067 divider_buffered_0/divider_0/and_0/B divider_buffered_0/divider_0/and_0/Z1 0.07fF -C1068 pll_full_buffered2_0/tapered_buf_2/a_160_230# pll_full_buffered2_0/tapered_buf_2/a_160_n140# 0.17fF -C1069 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/tspc_0/Z2 0.11fF -C1070 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C1071 filter_buffered_0/tapered_buf_1/a_160_n140# filter_buffered_0/v 0.19fF -C1072 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.04fF -C1073 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 0.36fF -C1074 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.21fF -C1075 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B pll_full_buffered1_0/pll_full_0/div 0.27fF -C1076 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z3 0.06fF -C1077 ro_divider_buffered_0/tapered_buf_4/a_580_0# ro_divider_buffered_0/tapered_buf_4/a_210_n610# 0.84fF -C1078 ro_divider_buffered_0/tapered_buf_4/a_160_n140# ro_divider_buffered_0/tapered_buf_4/a_n10_n140# 0.05fF -C1079 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q 0.01fF -C1080 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF -C1081 pll_full_buffered2_0/tapered_buf_4/a_1650_0# pll_full_buffered2_0/tapered_buf_4/a_210_n610# 2.89fF -C1082 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF -C1083 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.17fF -C1084 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/tspc_0/a_630_n680# 0.35fF -C1085 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.33fF -C1086 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.11fF -C1087 ro_divider_buffered_0/ro_complete_0/a4 ro_divider_buffered_0/ro_complete_0/a3 2.04fF -C1088 filter_buffered_0/tapered_buf_1/a_210_n610# filter_buffered_0/tapered_buf_1/a_160_n140# 0.22fF -C1089 pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Out1 pll_full_buffered1_0/pll_full_0/pd_0/UP 0.33fF -C1090 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/and_0/B 0.31fF -C1091 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.04fF -C1092 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.22fF -C1093 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C1094 filter_buffered_0/tapered_buf_1/a_n10_230# filter_buffered_0/v 0.02fF -C1095 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_1650_0# 1.27fF -C1096 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF -C1097 pll_full_buffered1_0/pll_full_0/ro_complete_0/a5 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF -C1098 ro_complete_buffered_0/tapered_buf_4/a_n10_n140# ro_complete_buffered_0/tapered_buf_4/in 0.04fF -C1099 ro_divider_buffered_0/tapered_buf_1/a_160_n140# ro_divider_buffered_0/tapered_buf_1/a_580_0# 0.35fF -C1100 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/tspc_1/Z4 0.02fF -C1101 ro_divider_buffered_0/divider_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/tspc_0/a_630_n680# 0.05fF -C1102 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF -C1103 ro_complete_buffered_0/tapered_buf_6/a_210_n610# ro_complete_buffered_0/ro_complete_0/a4 26.29fF -C1104 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a4 0.12fF -C1105 pll_full_buffered2_0/pll_full_0/ro_complete_0/a2 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF -C1106 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/clk 0.01fF -C1107 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF -C1108 div_pd_buffered_0/tapered_buf_1/a_n10_n140# div_pd_buffered_0/tapered_buf_1/in 0.04fF -C1109 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.12fF -C1110 pll_full_buffered2_0/tapered_buf_2/in pll_full_buffered2_0/pll_full_0/pd_0/UP 0.61fF -C1111 ro_divider_buffered_0/tapered_buf_5/a_580_0# ro_divider_buffered_0/tapered_buf_5/a_210_n610# 0.84fF -C1112 ro_divider_buffered_0/tapered_buf_5/a_160_n140# ro_divider_buffered_0/tapered_buf_5/a_n10_n140# 0.05fF -C1113 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_buffered2_0/pll_full_0/vco 0.45fF -C1114 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z2 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z4 0.14fF -C1115 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/nor_1/B 0.01fF -C1116 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.91fF -C1117 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF -C1118 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C1119 pll_full_buffered2_0/pll_full_0/ref pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/z5 0.04fF -C1120 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z4 0.20fF -C1121 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z1 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z2 0.71fF -C1122 divider_buffered_0/divider_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/nor_0/B 0.35fF -C1123 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q divider_buffered_0/divider_0/clk 0.60fF -C1124 ro_divider_buffered_0/ro_complete_0/a1 ro_divider_buffered_0/ro_complete_0/a0 3.46fF -C1125 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF -C1126 ro_divider_buffered_0/ro_complete_0/a3 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF -C1127 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z4 0.00fF -C1128 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF -C1129 pll_full_buffered1_0/pll_full_0/ro_complete_0/a1 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C1130 div_pd_buffered_0/tapered_buf_3/a_210_n610# div_pd_buffered_0/tapered_buf_3/a_580_0# 0.84fF -C1131 ro_complete_buffered_0/tapered_buf_5/a_n10_n140# ro_complete_buffered_0/tapered_buf_5/in 0.04fF -C1132 ro_divider_buffered_0/divider_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/tspc_1/Z4 0.12fF -C1133 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF -C1134 ro_divider_buffered_0/tapered_buf_1/in ro_divider_buffered_0/tapered_buf_1/a_n10_n140# 0.04fF -C1135 ro_divider_buffered_0/divider_0/nor_1/Z1 ro_divider_buffered_0/divider_0/and_0/B 0.18fF -C1136 ro_divider_buffered_0/divider_0/nor_0/Z1 ro_divider_buffered_0/divider_0/nor_0/B 0.06fF -C1137 cp_buffered_0/tapered_buf_2/a_580_0# cp_buffered_0/tapered_buf_2/a_160_n140# 0.35fF -C1138 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF -C1139 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C1140 ro_divider_buffered_0/divider_0/tspc_2/Z1 ro_divider_buffered_0/divider_0/nor_0/B 0.03fF -C1141 ro_divider_buffered_0/divider_0/tspc_2/Z3 ro_divider_buffered_0/divider_0/tspc_2/a_630_n680# 0.05fF -C1142 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.06fF -C1143 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.01fF -C1144 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF -C1145 pll_full_buffered2_0/pll_full_0/ro_complete_0/a4 pll_full_buffered2_0/pll_full_0/vco 0.01fF -C1146 ro_divider_buffered_0/tapered_buf_6/a_580_0# ro_divider_buffered_0/tapered_buf_6/a_210_n610# 0.84fF -C1147 ro_divider_buffered_0/tapered_buf_6/a_160_n140# ro_divider_buffered_0/tapered_buf_6/a_n10_n140# 0.05fF -C1148 pll_full_buffered2_0/tapered_buf_1/a_n10_230# pll_full_buffered2_0/tapered_buf_1/in 0.02fF -C1149 pll_full_buffered1_0/pll_full_0/pd_0/DOWN pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF -C1150 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered1_0/pll_full_0/pd_0/R 0.01fF -C1151 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/clk 0.04fF -C1152 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF -C1153 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF -C1154 ro_complete_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_2/a_580_0# 0.35fF -C1155 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# divider_buffered_0/divider_0/clk 0.14fF -C1156 pll_full_buffered2_0/tapered_buf_2/in pll_full_buffered2_0/pll_full_0/div 4.07fF -C1157 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z4 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z4 0.02fF -C1158 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered2_0/tapered_buf_2/in 0.11fF -C1159 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_divider_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C1160 ro_divider_buffered_0/tapered_buf_2/a_210_n610# ro_divider_buffered_0/tapered_buf_2/a_160_n140# 0.22fF -C1161 filter_buffered_0/tapered_buf_0/a_160_n140# filter_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF -C1162 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z4 0.21fF -C1163 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF -C1164 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF -C1165 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B 0.06fF -C1166 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_1650_0# 1.27fF -C1167 ro_complete_buffered_0/tapered_buf_6/a_n10_n140# ro_complete_buffered_0/tapered_buf_6/in 0.04fF -C1168 ro_divider_buffered_0/tapered_buf_1/a_580_0# ro_divider_buffered_0/tapered_buf_1/a_1650_0# 1.27fF -C1169 ro_divider_buffered_0/divider_0/and_0/OUT ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C1170 ro_divider_buffered_0/tapered_buf_0/a_n10_n140# ro_divider_buffered_0/tapered_buf_0/in 0.04fF -C1171 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered1_0/pll_full_0/divider_0/and_0/B 0.01fF -C1172 ro_complete_buffered_0/tapered_buf_0/a_4670_0# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 29.21fF -C1173 ro_complete_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/a_160_230# 0.09fF -C1174 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF -C1175 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C1176 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/a3 0.09fF -C1177 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A 0.15fF -C1178 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a0 0.09fF -C1179 divider_buffered_0/tapered_buf_0/a_n10_n140# divider_buffered_0/tapered_buf_0/in 0.04fF -C1180 divider_buffered_0/tapered_buf_2/a_580_0# divider_buffered_0/tapered_buf_2/a_160_n140# 0.35fF -C1181 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF -C1182 divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# divider_buffered_0/divider_0/clk 0.01fF -C1183 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF -C1184 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C1185 ro_divider_buffered_0/tapered_buf_7/a_580_0# ro_divider_buffered_0/tapered_buf_7/a_210_n610# 0.84fF -C1186 ro_divider_buffered_0/tapered_buf_7/a_160_n140# ro_divider_buffered_0/tapered_buf_7/a_n10_n140# 0.05fF -C1187 pll_full_buffered2_0/tapered_buf_0/a_n10_230# pll_full_buffered2_0/tapered_buf_0/in 0.02fF -C1188 divider_buffered_0/tapered_buf_1/a_160_n140# divider_buffered_0/tapered_buf_1/a_210_n610# 0.22fF -C1189 pll_full_buffered2_0/pll_full_0/divider_0/and_0/B pll_full_buffered2_0/pll_full_0/divider_0/and_0/Z1 0.07fF -C1190 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_divider_buffered_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF -C1191 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/clk 0.11fF -C1192 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/in 0.19fF -C1193 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 0.22fF -C1194 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.02fF -C1195 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.03fF -C1196 filter_buffered_0/tapered_buf_0/a_160_n140# filter_buffered_0/filter_0/v 0.19fF -C1197 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a0 0.13fF -C1198 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF -C1199 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C1200 ro_complete_buffered_0/tapered_buf_7/a_n10_n140# ro_complete_buffered_0/tapered_buf_7/in 0.04fF -C1201 ro_divider_buffered_0/divider_0/tspc_2/Z3 ro_divider_buffered_0/divider_0/tspc_2/Z4 0.65fF -C1202 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/divider_0/nor_0/B 0.15fF -C1203 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF -C1204 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C1205 divider_buffered_0/divider_0/tspc_0/Q divider_buffered_0/divider_0/tspc_0/a_630_n680# 0.04fF -C1206 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.12fF -C1207 pll_full_buffered1_0/tapered_buf_2/a_1650_0# pll_full_buffered1_0/tapered_buf_2/a_210_n610# 2.89fF -C1208 div_pd_buffered_0/pd_0/tspc_r_0/Z4 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF -C1209 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar pll_full_buffered2_0/pll_full_0/pd_0/UP 0.21fF -C1210 pll_full_buffered1_0/pll_full_0/ref pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z1 0.17fF -C1211 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/and_0/B 0.18fF -C1212 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C1213 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z3 0.06fF -C1214 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_buffered2_0/pll_full_0/vco 0.12fF -C1215 ro_divider_buffered_0/tapered_buf_8/a_580_0# ro_divider_buffered_0/tapered_buf_8/a_210_n610# 0.84fF -C1216 ro_divider_buffered_0/tapered_buf_8/a_160_n140# ro_divider_buffered_0/tapered_buf_8/a_n10_n140# 0.05fF -C1217 divider_buffered_0/tapered_buf_2/a_160_n140# divider_buffered_0/tapered_buf_2/a_160_230# 0.17fF -C1218 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 0.22fF -C1219 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.02fF -C1220 ro_divider_buffered_0/divider_0/tspc_0/Q ro_divider_buffered_0/divider_0/tspc_1/Z4 0.15fF -C1221 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z3 0.45fF -C1222 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF -C1223 divider_buffered_0/tapered_buf_2/a_1650_0# divider_buffered_0/tapered_buf_2/a_210_n610# 2.89fF -C1224 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered1_0/pll_full_0/vco 0.01fF -C1225 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a3 0.13fF -C1226 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF -C1227 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF -C1228 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF -C1229 pll_full_buffered1_0/tapered_buf_1/a_1650_0# pll_full_buffered1_0/tapered_buf_1/a_210_n610# 2.89fF -C1230 pll_full_buffered2_0/tapered_buf_1/a_580_0# pll_full_buffered2_0/tapered_buf_1/a_1650_0# 1.27fF -C1231 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/a_160_230# 0.09fF -C1232 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z2 pll_full_buffered1_0/pll_full_0/pd_0/R 0.21fF -C1233 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_2/a_n10_230# 0.01fF -C1234 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 divider_buffered_0/divider_0/prescaler_0/Out 0.28fF -C1235 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.09fF -C1236 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B 0.35fF -C1237 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/vco 0.60fF -C1238 pll_full_buffered2_0/tapered_buf_5/a_160_n140# pll_full_buffered2_0/tapered_buf_5/a_580_0# 0.35fF -C1239 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered2_0/pll_full_0/pd_0/R 0.29fF -C1240 ro_divider_buffered_0/tapered_buf_1/a_160_230# ro_divider_buffered_0/tapered_buf_1/a_580_0# 0.02fF -C1241 div_pd_buffered_0/tapered_buf_3/a_210_n610# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.22fF -C1242 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 0.22fF -C1243 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.02fF -C1244 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.11fF -C1245 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF -C1246 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/clk 0.51fF -C1247 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF -C1248 ro_divider_buffered_0/tapered_buf_3/a_4670_0# ro_divider_buffered_0/tapered_buf_3/a_210_n610# 29.21fF -C1249 ro_divider_buffered_0/tapered_buf_3/a_n10_230# ro_divider_buffered_0/tapered_buf_3/a_160_230# 0.09fF -C1250 div_pd_buffered_0/tapered_buf_4/a_210_n610# div_pd_buffered_0/tapered_buf_4/a_160_n140# 0.22fF -C1251 div_pd_buffered_0/tapered_buf_4/a_160_230# div_pd_buffered_0/tapered_buf_4/a_580_0# 0.02fF -C1252 divider_buffered_0/divider_0/tspc_1/Q divider_buffered_0/divider_0/tspc_2/Z4 0.15fF -C1253 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 divider_buffered_0/divider_0/clk 0.12fF -C1254 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z2 1.07fF -C1255 pll_full_buffered2_0/pll_full_0/ro_complete_0/a1 pll_full_buffered2_0/pll_full_0/vco 0.11fF -C1256 filter_buffered_0/tapered_buf_1/a_580_0# filter_buffered_0/tapered_buf_1/a_160_230# 0.02fF -C1257 pll_full_buffered1_0/tapered_buf_0/a_1650_0# pll_full_buffered1_0/tapered_buf_0/a_210_n610# 2.89fF -C1258 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF -C1259 pll_full_buffered2_0/tapered_buf_0/a_580_0# pll_full_buffered2_0/tapered_buf_0/a_1650_0# 1.27fF -C1260 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_210_n610# 0.22fF -C1261 pll_full_buffered1_0/pll_full_0/pd_0/DOWN pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Z1 0.07fF -C1262 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C1263 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C1264 divider_buffered_0/divider_0/mc2 divider_buffered_0/divider_0/nor_0/B 0.15fF -C1265 pll_full_buffered2_0/tapered_buf_3/a_160_n140# pll_full_buffered2_0/tapered_buf_3/a_580_0# 0.35fF -C1266 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_divider_buffered_0/ro_complete_0/a4 0.12fF -C1267 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF -C1268 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_160_230# 0.17fF -C1269 pll_full_buffered2_0/tapered_buf_4/a_n10_n140# pll_full_buffered2_0/tapered_buf_4/in 0.04fF -C1270 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF -C1271 pll_full_buffered1_0/pll_full_0/ro_complete_0/a4 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF -C1272 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C1273 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 0.22fF -C1274 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.02fF -C1275 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/and_0/B 0.78fF -C1276 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_buffered1_0/pll_full_0/vco 1.46fF -C1277 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF -C1278 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C1279 divider_buffered_0/divider_0/tspc_1/Z3 divider_buffered_0/divider_0/tspc_1/Q 0.05fF -C1280 ro_divider_buffered_0/tapered_buf_1/a_160_n140# ro_divider_buffered_0/tapered_buf_1/a_n10_n140# 0.05fF -C1281 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/and_0/B 0.08fF -C1282 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 ro_divider_buffered_0/divider_0/clk 0.12fF -C1283 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z4 0.00fF -C1284 pll_full_buffered2_0/pll_full_0/ro_complete_0/a0 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF -C1285 ro_divider_buffered_0/tapered_buf_4/a_4670_0# ro_divider_buffered_0/tapered_buf_4/a_210_n610# 29.21fF -C1286 ro_divider_buffered_0/tapered_buf_4/a_n10_230# ro_divider_buffered_0/tapered_buf_4/a_160_230# 0.09fF -C1287 pll_full_buffered2_0/pll_full_0/cp_0/upbar pll_full_buffered2_0/pll_full_0/pd_0/UP 0.05fF -C1288 divider_buffered_0/tapered_buf_0/a_580_0# divider_buffered_0/tapered_buf_0/a_160_230# 0.02fF -C1289 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z3 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q 0.45fF -C1290 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.08fF -C1291 cp_buffered_0/tapered_buf_0/a_1650_0# cp_buffered_0/tapered_buf_0/a_580_0# 1.27fF -C1292 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.01fF -C1293 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/clk 0.11fF -C1294 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF -C1295 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_divider_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C1296 ro_divider_buffered_0/divider_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/tspc_0/Z4 0.65fF -C1297 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF -C1298 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C1299 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF -C1300 div_pd_buffered_0/tapered_buf_2/a_210_n610# div_pd_buffered_0/divider_0/mc2 26.29fF -C1301 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C1302 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF -C1303 pll_full_buffered2_0/pll_full_0/ro_complete_0/a2 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF -C1304 divider_buffered_0/divider_0/tspc_1/Z3 divider_buffered_0/divider_0/tspc_1/Z4 0.65fF -C1305 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT 0.06fF -C1306 ro_divider_buffered_0/tapered_buf_5/a_4670_0# ro_divider_buffered_0/tapered_buf_5/a_210_n610# 29.21fF -C1307 ro_divider_buffered_0/tapered_buf_5/a_n10_230# ro_divider_buffered_0/tapered_buf_5/a_160_230# 0.09fF -C1308 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/DOWN 0.03fF -C1309 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/tspc_1/Z2 0.15fF -C1310 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z2 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z3 0.16fF -C1311 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_buffered2_0/pll_full_0/vco 0.12fF -C1312 ro_divider_buffered_0/tapered_buf_2/a_580_0# ro_divider_buffered_0/tapered_buf_2/a_210_n610# 0.84fF -C1313 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_160_230# 0.17fF -C1314 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF -C1315 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.09fF -C1316 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.15fF -C1317 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 0.06fF -C1318 pll_full_buffered2_0/pll_full_0/cp_0/upbar pll_full_buffered2_0/pll_full_0/div 0.45fF -C1319 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/z5 0.20fF -C1320 filter_buffered_0/filter_0/a_4216_n5230# filter_buffered_0/filter_0/v 0.19fF -C1321 div_pd_buffered_0/divider_0/tspc_2/Z3 div_pd_buffered_0/divider_0/tspc_2/Z4 0.65fF -C1322 divider_buffered_0/divider_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/tspc_2/Z2 0.01fF -C1323 divider_buffered_0/divider_0/prescaler_0/tspc_2/Q divider_buffered_0/divider_0/clk 0.05fF -C1324 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/nor_1/A 0.15fF -C1325 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_divider_buffered_0/ro_complete_0/a0 0.09fF -C1326 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF -C1327 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C1328 ro_complete_buffered_0/tapered_buf_1/out ro_complete_buffered_0/tapered_buf_1/a_210_n610# 26.29fF -C1329 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C1330 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF -C1331 pll_full_buffered2_0/tapered_buf_2/a_580_0# pll_full_buffered2_0/tapered_buf_2/a_1650_0# 1.27fF -C1332 ro_divider_buffered_0/divider_0/tspc_2/Z3 ro_divider_buffered_0/divider_0/nor_0/B 0.38fF -C1333 ro_divider_buffered_0/divider_0/tspc_2/Z4 ro_divider_buffered_0/divider_0/tspc_2/a_630_n680# 0.12fF -C1334 divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.04fF -C1335 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z4 0.00fF -C1336 ro_divider_buffered_0/tapered_buf_6/a_4670_0# ro_divider_buffered_0/tapered_buf_6/a_210_n610# 29.21fF -C1337 ro_divider_buffered_0/tapered_buf_6/a_n10_230# ro_divider_buffered_0/tapered_buf_6/a_160_230# 0.09fF -C1338 cp_buffered_0/tapered_buf_0/a_4670_0# cp_buffered_0/tapered_buf_0/a_210_n610# 29.21fF -C1339 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/a_160_230# 0.09fF -C1340 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF -C1341 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF -C1342 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Z1 0.02fF -C1343 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/z5 0.11fF -C1344 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C1345 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF -C1346 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/tspc_0/a_630_n680# 0.01fF -C1347 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z1 pll_full_buffered2_0/pll_full_0/div 0.17fF -C1348 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/z5 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/z5 0.02fF -C1349 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z2 0.25fF -C1350 pll_full_buffered1_0/pll_full_0/ro_complete_0/a4 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF -C1351 divider_buffered_0/divider_0/and_0/out1 divider_buffered_0/divider_0/and_0/B 0.18fF -C1352 ro_divider_buffered_0/tapered_buf_2/a_210_n610# ro_divider_buffered_0/tapered_buf_2/a_1650_0# 2.89fF -C1353 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF -C1354 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF -C1355 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF -C1356 ro_complete_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF -C1357 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF -C1358 pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Z1 pll_full_buffered2_0/pll_full_0/pd_0/UP 0.06fF -C1359 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_divider_buffered_0/divider_0/clk 0.01fF -C1360 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF -C1361 pll_full_buffered2_0/pll_full_0/ro_complete_0/a2 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C1362 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF -C1363 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered2_0/pll_full_0/vco 0.14fF -C1364 ro_divider_buffered_0/tapered_buf_7/a_4670_0# ro_divider_buffered_0/tapered_buf_7/a_210_n610# 29.21fF -C1365 ro_divider_buffered_0/tapered_buf_7/a_n10_230# ro_divider_buffered_0/tapered_buf_7/a_160_230# 0.09fF -C1366 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF -C1367 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/mc2 0.04fF -C1368 pll_full_buffered1_0/pll_full_0/pd_0/R pll_full_buffered1_0/pll_full_0/pd_0/UP 0.45fF -C1369 divider_buffered_0/divider_0/tspc_0/Z2 divider_buffered_0/divider_0/tspc_0/Z4 0.36fF -C1370 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.03fF -C1371 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_divider_buffered_0/ro_complete_0/a3 0.13fF -C1372 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF -C1373 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 2.89fF -C1374 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF -C1375 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.05fF -C1376 cp_buffered_0/cp_0/a_10_n50# cp_buffered_0/cp_0/a_1710_0# 0.04fF -C1377 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z4 0.12fF -C1378 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT 0.06fF -C1379 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF -C1380 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF -C1381 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_buffered1_0/pll_full_0/vco 1.46fF -C1382 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF -C1383 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF -C1384 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF -C1385 ro_divider_buffered_0/ro_complete_0/cbank_2/v ro_divider_buffered_0/divider_0/clk 1.36fF -C1386 divider_buffered_0/tapered_buf_0/a_n10_230# divider_buffered_0/tapered_buf_0/a_160_230# 0.09fF -C1387 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z2 0.15fF -C1388 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF -C1389 pll_full_buffered2_0/tapered_buf_5/a_n10_n140# pll_full_buffered2_0/tapered_buf_5/in 0.04fF -C1390 ro_divider_buffered_0/divider_0/and_0/out1 ro_divider_buffered_0/divider_0/and_0/B 0.18fF -C1391 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF -C1392 ro_divider_buffered_0/tapered_buf_8/a_4670_0# ro_divider_buffered_0/tapered_buf_8/a_210_n610# 29.21fF -C1393 ro_divider_buffered_0/tapered_buf_8/a_n10_230# ro_divider_buffered_0/tapered_buf_8/a_160_230# 0.09fF -C1394 filter_buffered_0/tapered_buf_1/a_580_0# filter_buffered_0/tapered_buf_1/a_210_n610# 0.84fF -C1395 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_580_0# 0.35fF -C1396 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z2 0.25fF -C1397 divider_buffered_0/tapered_buf_1/a_n10_230# divider_buffered_0/divider_0/Out 0.02fF -C1398 pll_full_buffered2_0/pll_full_0/ref pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF -C1399 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/B 0.01fF -C1400 pll_full_buffered2_0/tapered_buf_4/a_160_n140# pll_full_buffered2_0/tapered_buf_4/in 0.19fF -C1401 ro_divider_buffered_0/divider_0/nor_1/Z1 ro_divider_buffered_0/divider_0/nor_1/B 0.06fF -C1402 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF -C1403 pll_full_buffered1_0/pll_full_0/ro_complete_0/a5 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 0.08fF -C1404 pll_full_buffered1_0/pll_full_0/ro_complete_0/a0 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF -C1405 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z2 pll_full_buffered1_0/pll_full_0/div 0.19fF -C1406 ro_complete_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 2.89fF -C1407 ro_divider_buffered_0/divider_0/tspc_0/Z1 ro_divider_buffered_0/divider_0/tspc_0/Z2 1.07fF -C1408 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/vco 0.01fF -C1409 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/and_0/A 0.26fF -C1410 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.25fF -C1411 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C1412 divider_buffered_0/divider_0/tspc_0/Q divider_buffered_0/divider_0/tspc_1/Z2 0.14fF -C1413 ro_divider_buffered_0/tapered_buf_2/a_160_n140# ro_divider_buffered_0/tapered_buf_2/in 0.19fF -C1414 pll_full_buffered1_0/tapered_buf_1/a_160_n140# pll_full_buffered1_0/tapered_buf_1/in 0.19fF -C1415 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B 0.30fF -C1416 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 0.05fF -C1417 pll_full_buffered2_0/tapered_buf_1/a_1650_0# pll_full_buffered2_0/tapered_buf_1/a_4670_0# 4.78fF -C1418 pll_full_buffered2_0/tapered_buf_1/a_160_n140# pll_full_buffered2_0/tapered_buf_1/a_160_230# 0.17fF -C1419 divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.16fF -C1420 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered2_0/pll_full_0/divider_0/and_0/Z1 0.04fF -C1421 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z2 0.01fF -C1422 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_buffered2_0/pll_full_0/vco 0.05fF -C1423 pll_full_buffered2_0/tapered_buf_5/a_580_0# pll_full_buffered2_0/tapered_buf_5/a_1650_0# 1.27fF -C1424 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C1425 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_580_0# 0.02fF -C1426 ro_complete_buffered_0/tapered_buf_3/a_1650_0# ro_complete_buffered_0/tapered_buf_3/a_4670_0# 4.78fF -C1427 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 0.06fF -C1428 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C1429 pll_full_buffered2_0/tapered_buf_4/a_n10_230# pll_full_buffered2_0/tapered_buf_4/in 0.02fF -C1430 ro_divider_buffered_0/ro_complete_0/a0 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF -C1431 io_clamp_low[2] io_clamp_high[2] 0.53fF -C1432 ro_divider_buffered_0/tapered_buf_2/a_4670_0# ro_divider_buffered_0/tapered_buf_2/a_1650_0# 4.78fF -C1433 filter_buffered_0/tapered_buf_1/a_n10_n140# filter_buffered_0/v 0.04fF -C1434 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C1435 ro_complete_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 2.89fF -C1436 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_2/vin ro_divider_buffered_0/divider_0/clk 1.30fF -C1437 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered1_0/pll_full_0/div 0.01fF -C1438 div_pd_buffered_0/tapered_buf_2/a_n10_230# div_pd_buffered_0/tapered_buf_2/in 0.02fF -C1439 io_clamp_high[1] io_analog[5] 0.53fF -C1440 div_pd_buffered_0/tapered_buf_4/a_210_n610# div_pd_buffered_0/tapered_buf_4/a_1650_0# 2.89fF -C1441 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/tspc_0/Z3 0.38fF -C1442 ro_divider_buffered_0/tapered_buf_3/a_n10_230# ro_divider_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF -C1443 pll_full_buffered1_0/tapered_buf_0/a_160_n140# pll_full_buffered1_0/tapered_buf_0/in 0.19fF -C1444 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF -C1445 pll_full_buffered2_0/tapered_buf_0/a_1650_0# pll_full_buffered2_0/tapered_buf_0/a_4670_0# 4.78fF -C1446 pll_full_buffered2_0/tapered_buf_0/a_160_n140# pll_full_buffered2_0/tapered_buf_0/a_160_230# 0.17fF -C1447 pll_full_buffered2_0/pll_full_0/divider_0/and_0/out1 pll_full_buffered2_0/pll_full_0/divider_0/and_0/B 0.18fF -C1448 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF -C1449 pll_full_buffered1_0/pll_full_0/pd_0/R pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Out1 0.33fF -C1450 pll_full_buffered2_0/tapered_buf_2/in pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Out1 0.12fF -C1451 pll_full_buffered2_0/tapered_buf_3/a_580_0# pll_full_buffered2_0/tapered_buf_3/a_210_n610# 0.84fF -C1452 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_divider_buffered_0/divider_0/and_0/OUT 0.06fF -C1453 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z3 0.38fF -C1454 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z2 1.07fF -C1455 ro_complete_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 2.89fF -C1456 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z3 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z4 0.65fF -C1457 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/tapered_buf_1/in 0.05fF -C1458 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF -C1459 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF -C1460 ro_divider_buffered_0/tapered_buf_4/a_n10_230# ro_divider_buffered_0/tapered_buf_4/a_n10_n140# 0.01fF -C1461 ro_divider_buffered_0/divider_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/nor_0/B 0.35fF -C1462 cp_buffered_0/cp_0/upbar cp_buffered_0/cp_0/a_1710_n2840# 0.29fF -C1463 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B 0.00fF -C1464 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF -C1465 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.19fF -C1466 ro_divider_buffered_0/tapered_buf_1/in ro_divider_buffered_0/tapered_buf_1/a_160_n140# 0.19fF -C1467 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF -C1468 div_pd_buffered_0/tapered_buf_1/a_n10_230# div_pd_buffered_0/tapered_buf_1/a_160_230# 0.09fF -C1469 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.21fF -C1470 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_210_n610# 0.22fF -C1471 ro_complete_buffered_0/tapered_buf_3/a_580_0# ro_complete_buffered_0/tapered_buf_3/a_160_230# 0.02fF -C1472 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF -C1473 pll_full_buffered2_0/tapered_buf_3/a_n10_n140# pll_full_buffered2_0/pll_full_0/div 0.04fF -C1474 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_1/Z2 0.30fF -C1475 pll_full_buffered2_0/tapered_buf_5/a_1650_0# pll_full_buffered2_0/tapered_buf_5/a_4670_0# 4.78fF -C1476 pll_full_buffered2_0/tapered_buf_5/a_160_n140# pll_full_buffered2_0/tapered_buf_5/a_160_230# 0.17fF -C1477 pll_full_buffered2_0/pll_full_0/ro_complete_0/a2 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF -C1478 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a4 0.09fF -C1479 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a5 0.09fF -C1480 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 ro_divider_buffered_0/divider_0/clk 0.11fF -C1481 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/REF 0.65fF -C1482 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin ro_complete_buffered_0/tapered_buf_1/in 1.43fF -C1483 div_pd_buffered_0/tapered_buf_0/a_1650_0# div_pd_buffered_0/tapered_buf_0/a_4670_0# 4.78fF -C1484 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z1 0.09fF -C1485 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.19fF -C1486 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z1 0.03fF -C1487 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF -C1488 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C1489 ro_divider_buffered_0/tapered_buf_5/a_n10_230# ro_divider_buffered_0/tapered_buf_5/a_n10_n140# 0.01fF -C1490 div_pd_buffered_0/tapered_buf_0/a_580_0# div_pd_buffered_0/tapered_buf_0/a_160_230# 0.02fF -C1491 div_pd_buffered_0/tapered_buf_1/a_4670_0# div_pd_buffered_0/tapered_buf_1/a_1650_0# 4.78fF -C1492 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_160_230# 0.02fF -C1493 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF -C1494 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_n10_230# 0.09fF -C1495 divider_buffered_0/tapered_buf_1/a_580_0# divider_buffered_0/tapered_buf_1/a_210_n610# 0.84fF -C1496 divider_buffered_0/divider_0/nor_0/B divider_buffered_0/divider_0/tspc_2/Z2 0.40fF -C1497 divider_buffered_0/divider_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/Out 0.04fF -C1498 divider_buffered_0/divider_0/prescaler_0/tspc_0/D divider_buffered_0/divider_0/clk 0.29fF -C1499 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF -C1500 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C1501 cp_buffered_0/tapered_buf_0/a_160_230# cp_buffered_0/tapered_buf_0/a_160_n140# 0.17fF -C1502 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_n10_n140# 0.05fF -C1503 filter_buffered_0/tapered_buf_0/a_160_n140# filter_buffered_0/tapered_buf_0/a_210_n610# 0.22fF -C1504 filter_buffered_0/tapered_buf_0/a_580_0# filter_buffered_0/tapered_buf_0/a_160_230# 0.02fF -C1505 filter_buffered_0/filter_0/a_4216_n2998# filter_buffered_0/filter_0/v 0.31fF -C1506 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 0.04fF -C1507 divider_buffered_0/divider_0/tspc_0/Z2 divider_buffered_0/divider_0/prescaler_0/Out 0.11fF -C1508 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF -C1509 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out 0.05fF -C1510 ro_divider_buffered_0/divider_0/tspc_2/Z4 ro_divider_buffered_0/divider_0/nor_0/B 0.22fF -C1511 div_pd_buffered_0/tapered_buf_4/a_210_n610# div_pd_buffered_0/tapered_buf_4/out 26.29fF -C1512 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF -C1513 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF -C1514 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_160_n140# 0.35fF -C1515 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z3 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z4 0.65fF -C1516 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF -C1517 pll_full_buffered2_0/pll_full_0/ro_complete_0/a5 pll_full_buffered2_0/pll_full_0/vco 0.15fF -C1518 ro_divider_buffered_0/tapered_buf_6/a_n10_230# ro_divider_buffered_0/tapered_buf_6/a_n10_n140# 0.01fF -C1519 pll_full_buffered1_0/pll_full_0/pd_0/DOWN pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/z5 0.03fF -C1520 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z2 pll_full_buffered1_0/pll_full_0/pd_0/R 0.21fF -C1521 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered1_0/pll_full_0/pd_0/UP 0.03fF -C1522 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/tapered_buf_1/a_1650_0# 2.89fF -C1523 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.03fF -C1524 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/A 0.16fF -C1525 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF -C1526 pll_full_buffered2_0/tapered_buf_2/a_n10_n140# pll_full_buffered2_0/tapered_buf_2/a_160_n140# 0.05fF -C1527 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_divider_buffered_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF -C1528 divider_buffered_0/tapered_buf_1/a_n10_n140# divider_buffered_0/tapered_buf_1/a_160_n140# 0.05fF -C1529 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Out1 0.05fF -C1530 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF -C1531 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered2_0/pll_full_0/pd_0/R 0.27fF -C1532 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/tspc_0/a_630_n680# 0.01fF -C1533 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/nor_1/B 1.21fF -C1534 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C1535 ro_divider_buffered_0/divider_0/tspc_1/Q ro_divider_buffered_0/divider_0/tspc_2/Z2 0.14fF -C1536 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z1 0.06fF -C1537 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF -C1538 pll_full_buffered1_0/pll_full_0/ro_complete_0/a2 pll_full_buffered1_0/pll_full_0/vco 0.11fF -C1539 divider_buffered_0/divider_0/tspc_0/Z3 divider_buffered_0/divider_0/tspc_0/Q 0.05fF -C1540 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/in 0.19fF -C1541 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF -C1542 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C1543 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF -C1544 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/UP 0.03fF -C1545 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.19fF -C1546 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_580_0# 0.35fF -C1547 divider_buffered_0/tapered_buf_1/a_580_0# divider_buffered_0/tapered_buf_1/a_160_n140# 0.35fF -C1548 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/tspc_1/Z2 0.30fF -C1549 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z3 0.38fF -C1550 ro_divider_buffered_0/tapered_buf_7/a_n10_230# ro_divider_buffered_0/tapered_buf_7/a_n10_n140# 0.01fF -C1551 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Q 0.55fF -C1552 divider_buffered_0/divider_0/mc2 divider_buffered_0/divider_0/and_0/B 0.20fF -C1553 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.15fF -C1554 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.06fF -C1555 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/prescaler_0/nand_0/z1 0.01fF -C1556 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 divider_buffered_0/divider_0/prescaler_0/Out 0.19fF -C1557 div_pd_buffered_0/tapered_buf_2/a_160_230# div_pd_buffered_0/tapered_buf_2/a_580_0# 0.02fF -C1558 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/in 0.19fF -C1559 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_1/a_630_n680# 0.35fF -C1560 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF -C1561 divider_buffered_0/divider_0/tspc_0/Z2 divider_buffered_0/divider_0/tspc_0/Z1 1.07fF -C1562 cp_buffered_0/tapered_buf_2/in cp_buffered_0/tapered_buf_2/a_n10_230# 0.02fF -C1563 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_160_n140# 0.17fF -C1564 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF -C1565 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_buffered1_0/pll_full_0/vco 1.58fF -C1566 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C1567 divider_buffered_0/tapered_buf_0/a_1650_0# divider_buffered_0/tapered_buf_0/a_4670_0# 4.78fF -C1568 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.01fF -C1569 pll_full_buffered2_0/pll_full_0/ro_complete_0/a0 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF -C1570 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/DOWN 0.02fF -C1571 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/z5 pll_full_buffered2_0/pll_full_0/pd_0/UP 0.03fF -C1572 ro_divider_buffered_0/divider_0/and_0/A ro_divider_buffered_0/divider_0/and_0/B 0.18fF -C1573 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar 0.01fF -C1574 div_pd_buffered_0/pd_0/UP div_pd_buffered_0/tapered_buf_0/a_n10_230# 0.02fF -C1575 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/nor_1/A 0.15fF -C1576 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B 0.22fF -C1577 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF -C1578 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered2_0/pll_full_0/vco 0.01fF -C1579 ro_divider_buffered_0/tapered_buf_8/a_n10_230# ro_divider_buffered_0/tapered_buf_8/a_n10_n140# 0.01fF -C1580 divider_buffered_0/divider_0/prescaler_0/Out divider_buffered_0/divider_0/clk 0.51fF -C1581 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/clk 0.04fF -C1582 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/in 0.19fF -C1583 pll_full_buffered1_0/pll_full_0/pd_0/R pll_full_buffered1_0/pll_full_0/div 0.51fF -C1584 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF -C1585 divider_buffered_0/divider_0/tspc_1/Z3 divider_buffered_0/divider_0/tspc_1/Z1 0.06fF -C1586 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C1587 ro_divider_buffered_0/divider_0/and_0/OUT ro_divider_buffered_0/divider_0/and_0/B 0.01fF -C1588 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/tspc_r_0/Qbar 0.01fF -C1589 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF -C1590 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.15fF -C1591 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z2 0.23fF -C1592 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF -C1593 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_buffered2_0/pll_full_0/vco 1.46fF -C1594 pll_full_buffered2_0/tapered_buf_1/a_580_0# pll_full_buffered2_0/tapered_buf_1/a_210_n610# 0.84fF -C1595 pll_full_buffered2_0/tapered_buf_1/a_160_n140# pll_full_buffered2_0/tapered_buf_1/a_n10_n140# 0.05fF -C1596 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF -C1597 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/mc2 0.06fF -C1598 divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# divider_buffered_0/divider_0/prescaler_0/nand_0/z1 0.07fF -C1599 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z2 0.40fF -C1600 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/div 0.04fF -C1601 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_buffered2_0/pll_full_0/vco 0.29fF -C1602 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 0.00fF -C1603 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/A 0.01fF -C1604 div_pd_buffered_0/divider_0/tspc_0/Z3 div_pd_buffered_0/divider_0/tspc_0/Q 0.05fF -C1605 divider_buffered_0/divider_0/nor_0/B divider_buffered_0/divider_0/and_0/B 0.29fF -C1606 ro_divider_buffered_0/tapered_buf_0/a_210_n610# ro_divider_buffered_0/tapered_buf_0/a_1650_0# 2.89fF -C1607 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF -C1608 div_pd_buffered_0/tapered_buf_2/a_4670_0# div_pd_buffered_0/tapered_buf_2/a_210_n610# 29.21fF -C1609 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/in 0.19fF -C1610 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.05fF -C1611 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q 0.01fF -C1612 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 1.45fF -C1613 div_pd_buffered_0/tapered_buf_2/a_n10_n140# div_pd_buffered_0/tapered_buf_2/in 0.04fF -C1614 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a3 3.17fF -C1615 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF -C1616 ro_divider_buffered_0/tapered_buf_0/a_160_n140# ro_divider_buffered_0/tapered_buf_0/in 0.19fF -C1617 io_clamp_low[0] io_analog[4] 0.53fF -C1618 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF -C1619 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/tspc_0/Q 0.55fF -C1620 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF -C1621 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q 0.04fF -C1622 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF -C1623 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v pll_full_buffered2_0/pll_full_0/vco 1.27fF -C1624 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/tapered_buf_1/in 0.02fF -C1625 pll_full_buffered2_0/tapered_buf_0/a_580_0# pll_full_buffered2_0/tapered_buf_0/a_210_n610# 0.84fF -C1626 pll_full_buffered2_0/tapered_buf_0/a_160_n140# pll_full_buffered2_0/tapered_buf_0/a_n10_n140# 0.05fF -C1627 pll_full_buffered1_0/pll_full_0/cp_0/a_10_n50# pll_full_buffered1_0/pll_full_0/cp_0/a_1710_0# 0.04fF -C1628 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_0/Q 0.01fF -C1629 divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# divider_buffered_0/divider_0/clk 0.01fF -C1630 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF -C1631 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_divider_buffered_0/ro_complete_0/a4 0.09fF -C1632 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_divider_buffered_0/ro_complete_0/a5 0.09fF -C1633 pll_full_buffered1_0/pll_full_0/ro_complete_0/a2 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF -C1634 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C1635 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_0/Q 0.22fF -C1636 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/tspc_0/Z1 0.03fF -C1637 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF -C1638 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C1639 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/in 0.19fF -C1640 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_580_0# 0.35fF -C1641 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF -C1642 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z4 0.21fF -C1643 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z2 0.16fF -C1644 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/in 0.02fF -C1645 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF -C1646 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF -C1647 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_divider_buffered_0/divider_0/clk 0.01fF -C1648 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_4670_0# 29.21fF -C1649 divider_buffered_0/tapered_buf_0/a_160_n140# divider_buffered_0/tapered_buf_0/a_580_0# 0.35fF -C1650 pll_full_buffered1_0/tapered_buf_2/a_160_n140# pll_full_buffered1_0/tapered_buf_2/a_580_0# 0.35fF -C1651 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B 0.47fF -C1652 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z2 1.07fF -C1653 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/nor_0/B 0.47fF -C1654 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.32fF -C1655 pll_full_buffered2_0/tapered_buf_3/a_160_n140# pll_full_buffered2_0/tapered_buf_3/a_210_n610# 0.22fF -C1656 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/prescaler_0/Out 0.05fF -C1657 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF -C1658 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_1/Q 0.51fF -C1659 ro_divider_buffered_0/divider_0/tspc_1/Z1 ro_divider_buffered_0/divider_0/tspc_1/Z3 0.06fF -C1660 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.15fF -C1661 pll_full_buffered2_0/tapered_buf_5/a_580_0# pll_full_buffered2_0/tapered_buf_5/a_210_n610# 0.84fF -C1662 pll_full_buffered2_0/tapered_buf_5/a_160_n140# pll_full_buffered2_0/tapered_buf_5/a_n10_n140# 0.05fF -C1663 cp_buffered_0/tapered_buf_2/a_580_0# cp_buffered_0/tapered_buf_2/a_210_n610# 0.84fF -C1664 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_buffered1_0/pll_full_0/vco 1.46fF -C1665 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.08fF -C1666 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF -C1667 pll_full_buffered1_0/tapered_buf_1/a_160_n140# pll_full_buffered1_0/tapered_buf_1/a_580_0# 0.35fF -C1668 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/R 0.51fF -C1669 pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Out1 pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Z1 0.18fF -C1670 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered2_0/pll_full_0/divider_0/and_0/out1 0.31fF -C1671 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z4 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q 0.15fF -C1672 cp_buffered_0/tapered_buf_0/a_210_n610# cp_buffered_0/tapered_buf_0/a_580_0# 0.84fF -C1673 cp_buffered_0/tapered_buf_0/a_n10_n140# cp_buffered_0/tapered_buf_0/a_160_n140# 0.05fF -C1674 div_pd_buffered_0/tapered_buf_2/a_1650_0# div_pd_buffered_0/tapered_buf_2/a_580_0# 1.27fF -C1675 divider_buffered_0/divider_0/nor_0/B divider_buffered_0/divider_0/Out 0.44fF -C1676 divider_buffered_0/divider_0/tspc_2/Z1 divider_buffered_0/divider_0/tspc_2/Z3 0.06fF -C1677 pll_full_buffered2_0/tapered_buf_2/a_210_n610# pll_full_buffered2_0/tapered_buf_2/a_160_n140# 0.22fF -C1678 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF -C1679 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF -C1680 ro_divider_buffered_0/divider_0/nor_0/Z1 ro_divider_buffered_0/divider_0/and_0/B 0.78fF -C1681 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_divider_buffered_0/divider_0/clk 1.30fF -C1682 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/a_160_230# 0.09fF -C1683 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C1684 filter_buffered_0/filter_0/v filter_buffered_0/tapered_buf_0/a_n10_n140# 0.04fF -C1685 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C1686 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF -C1687 divider_buffered_0/divider_0/tspc_1/Q divider_buffered_0/divider_0/tspc_2/a_630_n680# 0.01fF -C1688 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B 0.35fF -C1689 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered2_0/pll_full_0/vco 0.11fF -C1690 pll_full_buffered1_0/tapered_buf_0/a_160_n140# pll_full_buffered1_0/tapered_buf_0/a_580_0# 0.35fF -C1691 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B pll_full_buffered2_0/pll_full_0/divider_0/and_0/B 0.29fF -C1692 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z2 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z4 0.14fF -C1693 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/clk 0.14fF -C1694 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/and_0/B 0.08fF -C1695 pll_full_buffered2_0/tapered_buf_2/in pll_full_buffered2_0/pll_full_0/pd_0/R 0.36fF -C1696 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z4 0.20fF -C1697 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z1 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z2 0.71fF -C1698 div_pd_buffered_0/tapered_buf_2/a_1650_0# div_pd_buffered_0/tapered_buf_2/a_210_n610# 2.89fF -C1699 ro_divider_buffered_0/tapered_buf_0/a_210_n610# ro_divider_buffered_0/tapered_buf_0/a_580_0# 0.84fF -C1700 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.01fF -C1701 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/tspc_0/Z4 0.12fF -C1702 ro_divider_buffered_0/ro_complete_0/a0 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF -C1703 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF -C1704 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/and_0/A 0.80fF -C1705 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C1706 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.19fF -C1707 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_160_230# 0.17fF -C1708 ro_complete_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.02fF -C1709 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_1650_0# 1.27fF -C1710 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B 0.06fF -C1711 pll_full_buffered2_0/tapered_buf_5/a_4670_0# pll_full_buffered2_0/tapered_buf_5/a_210_n610# 29.21fF -C1712 pll_full_buffered2_0/tapered_buf_5/a_n10_230# pll_full_buffered2_0/tapered_buf_5/a_160_230# 0.09fF -C1713 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT 0.05fF -C1714 pll_full_buffered1_0/tapered_buf_0/a_210_n610# pll_full_buffered1_0/pll_full_0/ref 26.29fF -C1715 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_210_n610# 0.84fF -C1716 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/nor_1/A 0.03fF -C1717 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF -C1718 divider_buffered_0/divider_0/prescaler_0/Out divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.91fF -C1719 ro_divider_buffered_0/ro_complete_0/a4 ro_divider_buffered_0/ro_complete_0/a5 2.39fF -C1720 ro_divider_buffered_0/tapered_buf_1/a_160_230# ro_divider_buffered_0/tapered_buf_1/a_160_n140# 0.17fF -C1721 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_divider_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C1722 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Q 0.01fF -C1723 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/and_0/A 0.01fF -C1724 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF -C1725 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_0/a_630_n680# 0.01fF -C1726 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/tspc_0/Z2 0.23fF -C1727 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF -C1728 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF -C1729 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/divider_0/and_0/B 0.20fF -C1730 pll_full_buffered1_0/pll_full_0/divider_0/and_0/out1 pll_full_buffered1_0/pll_full_0/divider_0/and_0/B 0.18fF -C1731 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.33fF -C1732 pll_full_buffered2_0/pll_full_0/ro_complete_0/a0 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C1733 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z2 0.14fF -C1734 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z3 0.05fF -C1735 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF -C1736 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/vco 0.01fF -C1737 ro_divider_buffered_0/tapered_buf_5/a_210_n610# ro_divider_buffered_0/ro_complete_0/a3 26.29fF -C1738 pll_full_buffered1_0/pll_full_0/ref pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/z5 0.04fF -C1739 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z4 0.20fF -C1740 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z1 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z2 0.71fF -C1741 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/nor_1/A 0.01fF -C1742 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# 0.01fF -C1743 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C1744 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# divider_buffered_0/divider_0/prescaler_0/Out 0.21fF -C1745 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/nor_1/B 1.21fF -C1746 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z1 0.09fF -C1747 pll_full_buffered2_0/pll_full_0/ref pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z2 0.19fF -C1748 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/ro_complete_0/a0 26.29fF -C1749 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF -C1750 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z1 0.03fF -C1751 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z3 0.05fF -C1752 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF -C1753 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z4 pll_full_buffered1_0/pll_full_0/div 0.02fF -C1754 divider_buffered_0/tapered_buf_2/in divider_buffered_0/tapered_buf_2/a_n10_230# 0.02fF -C1755 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF -C1756 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF -C1757 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered1_0/pll_full_0/vco 0.11fF -C1758 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_580_0# 0.35fF -C1759 ro_divider_buffered_0/tapered_buf_1/a_580_0# ro_divider_buffered_0/tapered_buf_1/a_210_n610# 0.84fF -C1760 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.20fF -C1761 ro_complete_buffered_0/tapered_buf_1/a_580_0# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 1.27fF -C1762 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.04fF -C1763 ro_divider_buffered_0/tapered_buf_2/a_n10_n140# ro_divider_buffered_0/tapered_buf_2/in 0.04fF -C1764 pll_full_buffered1_0/tapered_buf_1/a_n10_230# pll_full_buffered1_0/tapered_buf_1/in 0.02fF -C1765 div_pd_buffered_0/pd_0/tspc_r_1/Z4 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF -C1766 divider_buffered_0/tapered_buf_0/a_210_n610# divider_buffered_0/tapered_buf_0/a_160_n140# 0.22fF -C1767 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.05fF -C1768 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/and_0/B 0.18fF -C1769 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF -C1770 pll_full_buffered2_0/tapered_buf_1/a_4670_0# pll_full_buffered2_0/tapered_buf_1/a_210_n610# 29.21fF -C1771 pll_full_buffered2_0/tapered_buf_1/a_n10_230# pll_full_buffered2_0/tapered_buf_1/a_160_230# 0.09fF -C1772 divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.38fF -C1773 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B pll_full_buffered2_0/pll_full_0/div 0.27fF -C1774 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z3 0.06fF -C1775 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z4 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z4 0.02fF -C1776 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered1_0/pll_full_0/pd_0/DOWN 0.11fF -C1777 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_1/Z4 0.02fF -C1778 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z3 0.06fF -C1779 divider_buffered_0/tapered_buf_0/a_210_n610# divider_buffered_0/divider_0/mc2 26.29fF -C1780 pll_full_buffered2_0/pll_full_0/cp_0/a_1710_0# pll_full_buffered2_0/tapered_buf_2/in 0.32fF -C1781 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar pll_full_buffered2_0/pll_full_0/pd_0/R 0.03fF -C1782 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C1783 io_clamp_low[1] io_clamp_high[1] 0.53fF -C1784 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_divider_buffered_0/divider_0/clk 1.30fF -C1785 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered1_0/pll_full_0/vco 0.06fF -C1786 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C1787 pll_full_buffered2_0/pll_full_0/ro_complete_0/a4 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF -C1788 pll_full_buffered1_0/tapered_buf_0/a_n10_230# pll_full_buffered1_0/tapered_buf_0/in 0.02fF -C1789 div_pd_buffered_0/tapered_buf_1/a_n10_n140# div_pd_buffered_0/tapered_buf_1/a_n10_230# 0.01fF -C1790 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF -C1791 div_pd_buffered_0/pd_0/and_pd_0/Out1 div_pd_buffered_0/pd_0/UP 0.33fF -C1792 divider_buffered_0/divider_0/tspc_1/Z2 divider_buffered_0/divider_0/tspc_1/Z4 0.36fF -C1793 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q 0.51fF -C1794 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z2 0.01fF -C1795 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF -C1796 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF -C1797 pll_full_buffered2_0/tapered_buf_0/a_4670_0# pll_full_buffered2_0/tapered_buf_0/a_210_n610# 29.21fF -C1798 pll_full_buffered2_0/tapered_buf_0/a_n10_230# pll_full_buffered2_0/tapered_buf_0/a_160_230# 0.09fF -C1799 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_0/Q 0.45fF -C1800 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.03fF -C1801 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_580_0# 0.35fF -C1802 ro_divider_buffered_0/tapered_buf_0/a_210_n610# ro_divider_buffered_0/divider_0/Out 26.29fF -C1803 filter_buffered_0/tapered_buf_1/a_580_0# filter_buffered_0/tapered_buf_1/a_1650_0# 1.27fF -C1804 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF -C1805 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF -C1806 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/vco 0.64fF -C1807 ro_divider_buffered_0/divider_0/tspc_2/Z1 ro_divider_buffered_0/divider_0/tspc_2/Z2 1.07fF -C1808 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF -C1809 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/clk 0.01fF -C1810 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/and_0/A 0.26fF -C1811 filter_buffered_0/tapered_buf_0/a_n10_230# filter_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF -C1812 pll_full_buffered1_0/pll_full_0/div pll_full_buffered1_0/pll_full_0/vco 2.26fF -C1813 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.09fF -C1814 divider_buffered_0/tapered_buf_0/a_1650_0# divider_buffered_0/tapered_buf_0/a_580_0# 1.27fF -C1815 divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.19fF -C1816 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF -C1817 pll_full_buffered2_0/pll_full_0/ro_complete_0/a3 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C1818 pll_full_buffered1_0/tapered_buf_2/a_580_0# pll_full_buffered1_0/tapered_buf_2/a_1650_0# 1.27fF -C1819 div_pd_buffered_0/pd_0/tspc_r_0/Z2 div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.14fF -C1820 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_buffered2_0/pll_full_0/pd_0/UP 0.11fF -C1821 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF -C1822 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/Z3 0.16fF -C1823 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z2 1.07fF -C1824 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF -C1825 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF -C1826 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z2 0.20fF -C1827 divider_buffered_0/divider_0/prescaler_0/tspc_2/Q divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.04fF -C1828 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q divider_buffered_0/divider_0/prescaler_0/nand_1/z1 0.22fF -C1829 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_divider_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF -C1830 filter_buffered_0/tapered_buf_0/a_160_n140# filter_buffered_0/tapered_buf_0/a_580_0# 0.35fF -C1831 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/tspc_2/Z2 0.20fF -C1832 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_580_0# 0.35fF -C1833 ro_divider_buffered_0/divider_0/tspc_1/Z1 ro_divider_buffered_0/divider_0/tspc_1/Z4 0.00fF -C1834 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF -C1835 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C1836 divider_buffered_0/divider_0/tspc_0/Z2 divider_buffered_0/divider_0/tspc_0/a_630_n680# 0.01fF -C1837 filter_buffered_0/filter_0/v filter_buffered_0/tapered_buf_0/a_n10_230# 0.02fF -C1838 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z4 0.02fF -C1839 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z2 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z3 0.16fF -C1840 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF -C1841 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/and_0/A 0.01fF -C1842 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/tapered_buf_1/in 0.05fF -C1843 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C1844 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B 1.21fF -C1845 pll_full_buffered1_0/tapered_buf_1/a_580_0# pll_full_buffered1_0/tapered_buf_1/a_1650_0# 1.27fF -C1846 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/tspc_r_1/Qbar 0.21fF -C1847 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/R 0.01fF -C1848 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF -C1849 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/tspc_0/Q 0.22fF -C1850 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered1_0/pll_full_0/pd_0/R 0.29fF -C1851 div_pd_buffered_0/tapered_buf_1/in div_pd_buffered_0/tapered_buf_1/a_n10_230# 0.02fF -C1852 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z4 0.00fF -C1853 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.15fF -C1854 divider_buffered_0/divider_0/tspc_2/Z1 divider_buffered_0/divider_0/tspc_2/Z4 0.00fF -C1855 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_580_0# 0.35fF -C1856 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 ro_divider_buffered_0/divider_0/and_0/OUT 0.05fF -C1857 filter_buffered_0/tapered_buf_1/a_210_n610# filter_buffered_0/tapered_buf_1/a_4670_0# 29.21fF -C1858 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z3 0.38fF -C1859 pll_full_buffered2_0/tapered_buf_2/a_n10_n140# pll_full_buffered2_0/tapered_buf_2/in 0.04fF -C1860 divider_buffered_0/divider_0/nor_1/Z1 divider_buffered_0/divider_0/and_0/A 0.80fF -C1861 pll_full_buffered2_0/pll_full_0/ro_complete_0/a3 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF -C1862 pll_full_buffered2_0/tapered_buf_3/a_n10_230# pll_full_buffered2_0/tapered_buf_3/a_n10_n140# 0.01fF -C1863 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/R 0.29fF -C1864 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.45fF -C1865 divider_buffered_0/divider_0/tspc_1/Q divider_buffered_0/divider_0/nor_0/B 0.22fF -C1866 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT 0.14fF -C1867 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/vco 0.51fF -C1868 pll_full_buffered1_0/tapered_buf_0/a_580_0# pll_full_buffered1_0/tapered_buf_0/a_1650_0# 1.27fF -C1869 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z4 0.00fF -C1870 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF -C1871 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 divider_buffered_0/divider_0/clk 0.64fF -C1872 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/z5 pll_full_buffered2_0/pll_full_0/div 0.04fF -C1873 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/z5 0.20fF -C1874 cp_buffered_0/cp_0/down cp_buffered_0/cp_0/out 0.79fF -C1875 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF -C1876 ro_divider_buffered_0/tapered_buf_0/a_210_n610# ro_divider_buffered_0/tapered_buf_0/a_4670_0# 29.21fF -C1877 ro_divider_buffered_0/ro_complete_0/a0 ro_divider_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C1878 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_580_0# 0.35fF -C1879 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.32fF -C1880 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF -C1881 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.12fF -C1882 ro_complete_buffered_0/tapered_buf_0/a_580_0# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 0.84fF -C1883 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF -C1884 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.84fF -C1885 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF -C1886 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C1887 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z1 0.03fF -C1888 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z3 0.05fF -C1889 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF -C1890 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.02fF -C1891 div_pd_buffered_0/tapered_buf_4/a_1650_0# div_pd_buffered_0/tapered_buf_4/a_4670_0# 4.78fF -C1892 div_pd_buffered_0/tapered_buf_4/a_n10_n140# div_pd_buffered_0/pd_0/DOWN 0.04fF -C1893 divider_buffered_0/divider_0/tspc_1/a_630_n680# divider_buffered_0/divider_0/tspc_1/Z3 0.05fF -C1894 ro_complete_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_2/a_580_0# 1.27fF -C1895 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/and_0/B 0.08fF -C1896 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF -C1897 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF -C1898 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_buffered2_0/pll_full_0/vco 0.12fF -C1899 pll_full_buffered2_0/tapered_buf_5/a_n10_230# pll_full_buffered2_0/tapered_buf_5/a_n10_n140# 0.01fF -C1900 div_pd_buffered_0/tapered_buf_0/a_n10_n140# div_pd_buffered_0/tapered_buf_0/a_160_n140# 0.05fF -C1901 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF -C1902 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF -C1903 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z1 0.01fF -C1904 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_0/Q 0.22fF -C1905 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C1906 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_divider_buffered_0/ro_complete_0/a1 0.14fF -C1907 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF -C1908 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/in 0.04fF -C1909 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/in 0.02fF -C1910 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/tspc_1/Z2 0.15fF -C1911 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF -C1912 ro_complete_buffered_0/tapered_buf_5/a_210_n610# ro_complete_buffered_0/ro_complete_0/a3 26.29fF -C1913 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z3 0.05fF -C1914 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C1915 pll_full_buffered1_0/pll_full_0/ro_complete_0/a0 pll_full_buffered1_0/pll_full_0/vco 0.11fF -C1916 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/tapered_buf_1/in 0.05fF -C1917 pll_full_buffered1_0/pll_full_0/divider_0/and_0/A pll_full_buffered1_0/pll_full_0/divider_0/and_0/B 0.18fF -C1918 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.05fF -C1919 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z2 1.07fF -C1920 div_pd_buffered_0/pd_0/tspc_r_0/Z2 div_pd_buffered_0/pd_0/R 0.21fF -C1921 pll_full_buffered2_0/pll_full_0/pd_0/R pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Z1 0.02fF -C1922 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/and_0/B 0.31fF -C1923 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF -C1924 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF -C1925 ro_divider_buffered_0/divider_0/and_0/B ro_divider_buffered_0/divider_0/and_0/Z1 0.07fF -C1926 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/z5 0.20fF -C1927 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/nor_1/B 0.30fF -C1928 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z3 0.38fF -C1929 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z4 0.12fF -C1930 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z2 1.07fF -C1931 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/and_0/B 0.31fF -C1932 ro_divider_buffered_0/divider_0/nor_0/Z1 ro_divider_buffered_0/divider_0/nor_1/B 0.18fF -C1933 ro_divider_buffered_0/ro_complete_0/a4 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF -C1934 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/in 0.02fF -C1935 ro_divider_buffered_0/divider_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/tspc_1/Z2 0.01fF -C1936 ro_divider_buffered_0/divider_0/tspc_0/a_630_n680# ro_divider_buffered_0/divider_0/tspc_0/Z2 0.01fF -C1937 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF -C1938 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF -C1939 pll_full_buffered2_0/tapered_buf_5/a_160_n140# pll_full_buffered2_0/tapered_buf_5/in 0.19fF -C1940 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/divider_0/clk 0.05fF -C1941 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF -C1942 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.20fF -C1943 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a1 0.14fF -C1944 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C1945 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a3 0.09fF -C1946 divider_buffered_0/tapered_buf_0/a_1650_0# divider_buffered_0/tapered_buf_0/a_210_n610# 2.89fF -C1947 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/and_pd_0/Z1 0.07fF -C1948 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 0.01fF -C1949 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z4 0.00fF -C1950 pll_full_buffered2_0/tapered_buf_1/a_n10_230# pll_full_buffered2_0/tapered_buf_1/a_n10_n140# 0.01fF -C1951 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/z5 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/z5 0.02fF -C1952 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z2 0.25fF -C1953 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Z4 0.12fF -C1954 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF -C1955 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/clk 0.64fF -C1956 divider_buffered_0/tapered_buf_0/a_210_n610# divider_buffered_0/tapered_buf_0/a_4670_0# 29.21fF -C1957 pll_full_buffered1_0/tapered_buf_2/a_n10_n140# pll_full_buffered1_0/pll_full_0/vco 0.04fF -C1958 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/Z1 0.36fF -C1959 ro_complete_buffered_0/tapered_buf_3/a_4670_0# ro_complete_buffered_0/tapered_buf_3/a_210_n610# 29.21fF -C1960 ro_complete_buffered_0/tapered_buf_3/a_n10_230# ro_complete_buffered_0/tapered_buf_3/a_160_230# 0.09fF -C1961 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF -C1962 ro_divider_buffered_0/ro_complete_0/a3 ro_divider_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C1963 ro_divider_buffered_0/tapered_buf_2/a_n10_230# ro_divider_buffered_0/tapered_buf_2/in 0.02fF -C1964 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/a_160_n140# 0.05fF -C1965 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q 0.05fF -C1966 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF -C1967 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/in 0.02fF -C1968 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a1 3.18fF -C1969 ro_divider_buffered_0/tapered_buf_0/a_n10_n140# ro_divider_buffered_0/tapered_buf_0/a_n10_230# 0.01fF -C1970 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_0/vin ro_divider_buffered_0/divider_0/clk 1.43fF -C1971 filter_buffered_0/tapered_buf_0/a_1650_0# filter_buffered_0/tapered_buf_0/a_210_n610# 2.89fF -C1972 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_1650_0# 2.89fF -C1973 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/div 0.03fF -C1974 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered1_0/pll_full_0/divider_0/and_0/out1 0.31fF -C1975 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_buffered1_0/pll_full_0/vco 0.26fF -C1976 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C1977 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C1978 pll_full_buffered2_0/tapered_buf_2/a_160_n140# pll_full_buffered2_0/tapered_buf_2/in 0.19fF -C1979 ro_divider_buffered_0/tapered_buf_3/a_n10_n140# ro_divider_buffered_0/tapered_buf_3/in 0.04fF -C1980 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 divider_buffered_0/divider_0/clk 0.45fF -C1981 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF -C1982 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF -C1983 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_buffered2_0/pll_full_0/vco 0.01fF -C1984 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF -C1985 pll_full_buffered2_0/tapered_buf_0/a_n10_230# pll_full_buffered2_0/tapered_buf_0/a_n10_n140# 0.01fF -C1986 pll_full_buffered1_0/pll_full_0/pd_0/DOWN pll_full_buffered1_0/pll_full_0/pd_0/UP 0.61fF -C1987 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Q 0.04fF -C1988 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.01fF -C1989 ro_divider_buffered_0/tapered_buf_2/a_580_0# ro_divider_buffered_0/tapered_buf_2/a_160_n140# 0.35fF -C1990 pll_full_buffered1_0/pll_full_0/ro_complete_0/a5 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF -C1991 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C1992 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_1650_0# 1.27fF -C1993 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/mc2 0.06fF -C1994 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C1995 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z3 0.45fF -C1996 pll_full_buffered1_0/pll_full_0/ro_complete_0/a3 pll_full_buffered1_0/pll_full_0/vco 0.11fF -C1997 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/in 0.02fF -C1998 ro_divider_buffered_0/divider_0/tspc_2/Z2 ro_divider_buffered_0/divider_0/tspc_2/Z3 0.16fF -C1999 ro_complete_buffered_0/tapered_buf_1/a_160_n140# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.35fF -C2000 divider_buffered_0/tapered_buf_2/in divider_buffered_0/tapered_buf_2/a_n10_n140# 0.04fF -C2001 pll_full_buffered1_0/tapered_buf_2/a_1650_0# pll_full_buffered1_0/tapered_buf_2/a_4670_0# 4.78fF -C2002 pll_full_buffered1_0/tapered_buf_2/a_160_n140# pll_full_buffered1_0/tapered_buf_2/a_160_230# 0.17fF -C2003 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/R 0.61fF -C2004 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/pd_0/DOWN 0.19fF -C2005 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF -C2006 ro_divider_buffered_0/tapered_buf_4/a_n10_n140# ro_divider_buffered_0/tapered_buf_4/in 0.04fF -C2007 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v pll_full_buffered2_0/pll_full_0/vco 1.36fF -C2008 pll_full_buffered2_0/tapered_buf_2/a_n10_230# pll_full_buffered2_0/tapered_buf_2/a_160_230# 0.09fF -C2009 pll_full_buffered1_0/pll_full_0/ref pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF -C2010 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/tspc_1/Z4 0.02fF -C2011 divider_buffered_0/divider_0/prescaler_0/tspc_2/Q divider_buffered_0/divider_0/prescaler_0/nand_1/z1 0.01fF -C2012 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/clk 0.04fF -C2013 ro_divider_buffered_0/ro_complete_0/a3 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.21fF -C2014 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF -C2015 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered1_0/pll_full_0/div 0.65fF -C2016 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_1650_0# 1.27fF -C2017 ro_divider_buffered_0/tapered_buf_0/a_160_230# ro_divider_buffered_0/tapered_buf_0/a_580_0# 0.02fF -C2018 ro_divider_buffered_0/divider_0/tspc_0/Q ro_divider_buffered_0/divider_0/tspc_1/Z2 0.14fF -C2019 ro_divider_buffered_0/divider_0/tspc_0/Z1 ro_divider_buffered_0/divider_0/tspc_0/Z4 0.00fF -C2020 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_divider_buffered_0/divider_0/and_0/OUT 0.14fF -C2021 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z3 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q 0.05fF -C2022 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z2 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z4 0.36fF -C2023 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF -C2024 pll_full_buffered1_0/tapered_buf_1/a_1650_0# pll_full_buffered1_0/tapered_buf_1/a_4670_0# 4.78fF -C2025 pll_full_buffered1_0/tapered_buf_1/a_160_n140# pll_full_buffered1_0/tapered_buf_1/a_160_230# 0.17fF -C2026 div_pd_buffered_0/tapered_buf_0/a_210_n610# div_pd_buffered_0/tapered_buf_0/a_580_0# 0.84fF -C2027 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF -C2028 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.11fF -C2029 divider_buffered_0/divider_0/tspc_0/Z4 divider_buffered_0/divider_0/prescaler_0/Out 0.12fF -C2030 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.35fF -C2031 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF -C2032 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C2033 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B 0.06fF -C2034 ro_divider_buffered_0/tapered_buf_5/a_n10_n140# ro_divider_buffered_0/tapered_buf_5/in 0.04fF -C2035 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.13fF -C2036 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/Z4 0.65fF -C2037 divider_buffered_0/divider_0/tspc_2/Z3 divider_buffered_0/divider_0/tspc_2/Z4 0.65fF -C2038 pll_full_buffered2_0/pll_full_0/cp_0/vbias pll_full_buffered2_0/pll_full_0/cp_0/a_10_n50# 0.19fF -C2039 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z4 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/z5 0.04fF -C2040 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_divider_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF -C2041 pll_full_buffered1_0/pll_full_0/ro_complete_0/a2 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF -C2042 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z2 0.11fF -C2043 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C2044 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_1650_0# 1.27fF -C2045 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/divider_0/Out 1.14fF -C2046 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.20fF -C2047 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.09fF -C2048 pll_full_buffered2_0/tapered_buf_2/a_210_n610# pll_full_buffered2_0/tapered_buf_2/a_1650_0# 2.89fF -C2049 filter_buffered_0/filter_0/v filter_buffered_0/v 0.54fF -C2050 cp_buffered_0/tapered_buf_2/a_580_0# cp_buffered_0/tapered_buf_2/a_1650_0# 1.27fF -C2051 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z1 0.01fF -C2052 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C2053 pll_full_buffered2_0/pll_full_0/ro_complete_0/a3 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF -C2054 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C2055 ro_divider_buffered_0/tapered_buf_3/a_160_n140# ro_divider_buffered_0/tapered_buf_3/a_210_n610# 0.22fF -C2056 ro_divider_buffered_0/tapered_buf_3/a_580_0# ro_divider_buffered_0/tapered_buf_3/a_160_230# 0.02fF -C2057 pll_full_buffered1_0/tapered_buf_0/a_1650_0# pll_full_buffered1_0/tapered_buf_0/a_4670_0# 4.78fF -C2058 pll_full_buffered1_0/tapered_buf_0/a_160_n140# pll_full_buffered1_0/tapered_buf_0/a_160_230# 0.17fF -C2059 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/UP 0.45fF -C2060 divider_buffered_0/divider_0/tspc_1/Q divider_buffered_0/divider_0/tspc_2/Z2 0.14fF -C2061 divider_buffered_0/tapered_buf_2/a_580_0# divider_buffered_0/tapered_buf_2/a_1650_0# 1.27fF -C2062 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF -C2063 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C2064 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF -C2065 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_buffered2_0/pll_full_0/vco 1.46fF -C2066 pll_full_buffered2_0/tapered_buf_4/a_580_0# pll_full_buffered2_0/tapered_buf_4/a_1650_0# 1.27fF -C2067 ro_divider_buffered_0/tapered_buf_6/a_n10_n140# ro_divider_buffered_0/tapered_buf_6/in 0.04fF -C2068 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF -C2069 pll_full_buffered1_0/pll_full_0/pd_0/DOWN pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Out1 0.12fF -C2070 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar pll_full_buffered1_0/pll_full_0/pd_0/UP 0.21fF -C2071 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.15fF -C2072 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/tspc_0/Q 0.55fF -C2073 filter_buffered_0/tapered_buf_1/a_210_n610# filter_buffered_0/filter_0/v 26.29fF -C2074 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z4 0.02fF -C2075 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.05fF -C2076 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_1650_0# 1.27fF -C2077 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/ro_complete_0/a1 26.29fF -C2078 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.04fF -C2079 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q ro_divider_buffered_0/divider_0/prescaler_0/nand_1/z1 0.22fF -C2080 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 0.00fF -C2081 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_5/vin ro_divider_buffered_0/divider_0/clk 1.30fF -C2082 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z3 0.38fF -C2083 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z4 0.12fF -C2084 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z2 1.07fF -C2085 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF -C2086 divider_buffered_0/divider_0/tspc_1/Z1 divider_buffered_0/divider_0/tspc_1/Z2 1.07fF -C2087 divider_buffered_0/divider_0/tspc_0/Z1 divider_buffered_0/divider_0/tspc_0/Z4 0.00fF -C2088 pll_full_buffered2_0/pll_full_0/ro_complete_0/a4 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C2089 ro_divider_buffered_0/tapered_buf_4/a_160_n140# ro_divider_buffered_0/tapered_buf_4/a_210_n610# 0.22fF -C2090 ro_divider_buffered_0/tapered_buf_4/a_580_0# ro_divider_buffered_0/tapered_buf_4/a_160_230# 0.02fF -C2091 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/nor_1/A 0.15fF -C2092 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C2093 pll_full_buffered2_0/tapered_buf_4/a_580_0# pll_full_buffered2_0/tapered_buf_4/a_210_n610# 0.84fF -C2094 ro_divider_buffered_0/tapered_buf_7/a_n10_n140# ro_divider_buffered_0/tapered_buf_7/in 0.04fF -C2095 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_divider_buffered_0/ro_complete_0/a1 0.14fF -C2096 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_divider_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C2097 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_divider_buffered_0/ro_complete_0/a3 0.09fF -C2098 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z3 0.45fF -C2099 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/and_0/A 0.26fF -C2100 ro_complete_buffered_0/tapered_buf_3/a_580_0# ro_complete_buffered_0/tapered_buf_3/a_1650_0# 1.27fF -C2101 ro_divider_buffered_0/divider_0/tspc_0/Q ro_divider_buffered_0/divider_0/tspc_1/a_630_n680# 0.01fF -C2102 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF -C2103 pll_full_buffered1_0/pll_full_0/ro_complete_0/a3 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF -C2104 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z4 0.12fF -C2105 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF -C2106 divider_buffered_0/tapered_buf_0/a_160_n140# divider_buffered_0/tapered_buf_0/in 0.19fF -C2107 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 2.89fF -C2108 ro_complete_buffered_0/tapered_buf_1/a_160_n140# ro_complete_buffered_0/tapered_buf_1/in 0.19fF -C2109 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF -C2110 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C2111 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z3 0.65fF -C2112 divider_buffered_0/divider_0/tspc_0/Q divider_buffered_0/divider_0/tspc_1/Z4 0.15fF -C2113 pll_full_buffered2_0/pll_full_0/filter_0/a_4216_n5230# pll_full_buffered2_0/pll_full_0/vco 1.58fF -C2114 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z3 0.16fF -C2115 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C2116 ro_divider_buffered_0/tapered_buf_5/a_160_n140# ro_divider_buffered_0/tapered_buf_5/a_210_n610# 0.22fF -C2117 ro_divider_buffered_0/tapered_buf_5/a_580_0# ro_divider_buffered_0/tapered_buf_5/a_160_230# 0.02fF -C2118 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/tspc_2/Z3 0.05fF -C2119 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.13fF -C2120 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF -C2121 divider_buffered_0/divider_0/mc2 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF -C2122 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF -C2123 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered2_0/pll_full_0/vco 0.11fF -C2124 ro_divider_buffered_0/tapered_buf_8/a_n10_n140# ro_divider_buffered_0/tapered_buf_8/in 0.04fF -C2125 pll_full_buffered2_0/pll_full_0/ref pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z4 0.02fF -C2126 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_divider_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C2127 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/in 0.02fF -C2128 div_pd_buffered_0/divider_0/tspc_2/Z2 div_pd_buffered_0/divider_0/tspc_2/Z3 0.16fF -C2129 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z4 0.22fF -C2130 div_pd_buffered_0/tapered_buf_3/a_160_230# div_pd_buffered_0/tapered_buf_3/a_580_0# 0.02fF -C2131 ro_divider_buffered_0/divider_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/tspc_1/Q 0.04fF -C2132 ro_divider_buffered_0/divider_0/tspc_0/Z4 ro_divider_buffered_0/divider_0/tspc_0/Z2 0.36fF -C2133 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF -C2134 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF -C2135 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C2136 ro_divider_buffered_0/divider_0/nor_1/Z1 ro_divider_buffered_0/divider_0/and_0/A 0.80fF -C2137 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C2138 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_buffered1_0/pll_full_0/vco 0.45fF -C2139 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a1 0.14fF -C2140 ro_divider_buffered_0/divider_0/tspc_2/Z2 ro_divider_buffered_0/divider_0/tspc_2/a_630_n680# 0.01fF -C2141 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/and_pd_0/Out1 0.33fF -C2142 ro_divider_buffered_0/tapered_buf_6/a_160_n140# ro_divider_buffered_0/tapered_buf_6/a_210_n610# 0.22fF -C2143 ro_divider_buffered_0/tapered_buf_6/a_580_0# ro_divider_buffered_0/tapered_buf_6/a_160_230# 0.02fF -C2144 pll_full_buffered2_0/tapered_buf_5/a_210_n610# pll_full_buffered2_0/pll_full_0/ref 26.29fF -C2145 cp_buffered_0/tapered_buf_0/a_210_n610# cp_buffered_0/cp_0/down 26.29fF -C2146 cp_buffered_0/tapered_buf_0/a_n10_n140# cp_buffered_0/tapered_buf_0/in 0.04fF -C2147 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Out1 0.05fF -C2148 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF -C2149 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered1_0/pll_full_0/pd_0/R 0.27fF -C2150 pll_full_buffered1_0/pll_full_0/cp_0/upbar pll_full_buffered1_0/pll_full_0/pd_0/UP 0.05fF -C2151 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/out1 0.06fF -C2152 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Z4 0.21fF -C2153 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z3 0.45fF -C2154 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z3 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z4 0.65fF -C2155 ro_divider_buffered_0/tapered_buf_7/a_210_n610# ro_divider_buffered_0/ro_complete_0/a1 26.29fF -C2156 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered2_0/tapered_buf_2/in 0.03fF -C2157 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered2_0/pll_full_0/div 0.12fF -C2158 ro_complete_buffered_0/tapered_buf_3/a_n10_230# ro_complete_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF -C2159 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF -C2160 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF -C2161 div_pd_buffered_0/divider_0/and_0/A div_pd_buffered_0/divider_0/and_0/B 0.18fF -C2162 io_clamp_low[0] io_clamp_high[0] 0.53fF -C2163 ro_divider_buffered_0/tapered_buf_2/a_160_230# ro_divider_buffered_0/tapered_buf_2/a_160_n140# 0.17fF -C2164 cp_buffered_0/tapered_buf_1/a_210_n610# cp_buffered_0/tapered_buf_1/a_4670_0# 29.21fF -C2165 cp_buffered_0/cp_0/down cp_buffered_0/cp_0/a_1710_0# 0.32fF -C2166 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_580_0# 0.02fF -C2167 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF -C2168 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 2.89fF -C2169 ro_complete_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.17fF -C2170 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF -C2171 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF -C2172 pll_full_buffered2_0/pll_full_0/ro_complete_0/a5 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF -C2173 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF -C2174 pll_full_buffered2_0/tapered_buf_4/a_160_n140# pll_full_buffered2_0/tapered_buf_4/a_210_n610# 0.22fF -C2175 ro_divider_buffered_0/tapered_buf_7/a_160_n140# ro_divider_buffered_0/tapered_buf_7/a_210_n610# 0.22fF -C2176 ro_divider_buffered_0/tapered_buf_7/a_580_0# ro_divider_buffered_0/tapered_buf_7/a_160_230# 0.02fF -C2177 pll_full_buffered2_0/tapered_buf_1/in pll_full_buffered2_0/pll_full_0/cp_0/upbar 0.05fF -C2178 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.24fF -C2179 divider_buffered_0/divider_0/mc2 divider_buffered_0/divider_0/clk 0.26fF -C2180 divider_buffered_0/divider_0/tspc_0/Z2 divider_buffered_0/divider_0/tspc_0/Z3 0.16fF -C2181 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_4670_0# 4.78fF -C2182 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.17fF -C2183 ro_divider_buffered_0/tapered_buf_0/a_160_n140# ro_divider_buffered_0/tapered_buf_0/a_580_0# 0.35fF -C2184 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/tspc_0/a_630_n680# 0.35fF -C2185 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.91fF -C2186 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C2187 ro_divider_buffered_0/tapered_buf_2/a_580_0# ro_divider_buffered_0/tapered_buf_2/a_1650_0# 1.27fF -C2188 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/in 0.19fF -C2189 ro_divider_buffered_0/divider_0/tspc_2/Z3 ro_divider_buffered_0/divider_0/Out 0.05fF -C2190 ro_divider_buffered_0/divider_0/tspc_2/Z2 ro_divider_buffered_0/divider_0/tspc_2/Z4 0.36fF -C2191 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z4 0.15fF -C2192 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 ro_divider_buffered_0/divider_0/clk 0.11fF -C2193 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/tapered_buf_1/in 0.05fF -C2194 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF -C2195 pll_full_buffered2_0/pll_full_0/ro_complete_0/a1 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C2196 pll_full_buffered1_0/tapered_buf_2/a_580_0# pll_full_buffered1_0/tapered_buf_2/a_210_n610# 0.84fF -C2197 pll_full_buffered1_0/tapered_buf_2/a_160_n140# pll_full_buffered1_0/tapered_buf_2/a_n10_n140# 0.05fF +C0 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/pd_0/DOWN 0.02fF +C1 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF +C2 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C3 div_pd_buffered_0/divider_0/tspc_0/Z3 div_pd_buffered_0/divider_0/tspc_0/Z4 0.65fF +C4 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF +C5 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF +C6 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D ro_divider_buffered_0/divider_0/prescaler_0/nand_0/z1 0.24fF +C7 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.35fF +C8 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF +C9 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C10 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/a_10_n50# 0.04fF +C11 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/nor_0/B 0.22fF +C12 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.22fF +C13 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.04fF +C14 filter_buffered_0/tapered_buf_0/a_n10_230# filter_buffered_0/tapered_buf_0/a_160_230# 0.09fF +C15 filter_buffered_0/tapered_buf_0/a_4670_0# filter_buffered_0/tapered_buf_0/a_210_n610# 29.21fF +C16 ro_complete_buffered_0/tapered_buf_4/a_n10_n140# ro_complete_buffered_0/tapered_buf_4/in 0.04fF +C17 divider_buffered_0/tapered_buf_0/a_210_n610# divider_buffered_0/tapered_buf_0/a_580_0# 0.84fF +C18 pll_full_buffered2_0/tapered_buf_1/a_160_n140# pll_full_buffered2_0/tapered_buf_1/a_n10_n140# 0.05fF +C19 pll_full_buffered2_0/tapered_buf_1/a_580_0# pll_full_buffered2_0/tapered_buf_1/a_210_n610# 0.84fF +C20 filter_buffered_0/filter_0/v filter_buffered_0/filter_0/a_4216_n2998# 0.31fF +C21 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z4 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z2 0.14fF +C22 ro_complete_buffered_0/tapered_buf_6/a_210_n610# ro_complete_buffered_0/ro_complete_0/a4 26.29fF +C23 divider_buffered_0/divider_0/tspc_0/Q divider_buffered_0/divider_0/tspc_0/Z3 0.05fF +C24 pll_full_buffered1_0/pll_full_0/pd_0/DOWN pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/z5 0.03fF +C25 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z2 pll_full_buffered1_0/pll_full_0/pd_0/R 0.21fF +C26 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C27 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_580_0# 0.35fF +C28 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a4 0.12fF +C29 pll_full_buffered2_0/pll_full_0/ro_complete_0/a2 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF +C30 pll_full_buffered2_0/tapered_buf_4/a_n10_230# pll_full_buffered2_0/tapered_buf_4/a_160_230# 0.09fF +C31 pll_full_buffered2_0/tapered_buf_4/a_4670_0# pll_full_buffered2_0/tapered_buf_4/a_210_n610# 29.21fF +C32 ro_divider_buffered_0/tapered_buf_7/a_1650_0# ro_divider_buffered_0/tapered_buf_7/a_4670_0# 4.78fF +C33 ro_divider_buffered_0/tapered_buf_7/a_160_n140# ro_divider_buffered_0/tapered_buf_7/a_160_230# 0.17fF +C34 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF +C35 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF +C36 divider_buffered_0/divider_0/tspc_0/Z2 divider_buffered_0/divider_0/tspc_0/a_630_n680# 0.01fF +C37 divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# divider_buffered_0/divider_0/and_0/OUT 0.14fF +C38 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.11fF +C39 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 divider_buffered_0/divider_0/clk 0.64fF +C40 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.12fF +C41 pll_full_buffered2_0/tapered_buf_2/a_210_n610# pll_full_buffered2_0/tapered_buf_2/a_580_0# 0.84fF +C42 ro_divider_buffered_0/tapered_buf_1/a_n10_230# ro_divider_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF +C43 ro_divider_buffered_0/divider_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/tspc_0/Q 0.05fF +C44 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.13fF +C45 pll_full_buffered1_0/pll_full_0/ro_complete_0/a3 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF +C46 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C47 div_pd_buffered_0/divider_0/tspc_0/Q div_pd_buffered_0/divider_0/tspc_1/Z4 0.15fF +C48 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.91fF +C49 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C50 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z3 0.45fF +C51 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_buffered2_0/pll_full_0/vco 0.45fF +C52 ro_divider_buffered_0/divider_0/and_0/OUT ro_divider_buffered_0/divider_0/and_0/out1 0.31fF +C53 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D ro_divider_buffered_0/divider_0/clk 0.26fF +C54 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C55 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF +C56 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_buffered1_0/pll_full_0/vco 1.46fF +C57 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q divider_buffered_0/divider_0/clk 0.60fF +C58 filter_buffered_0/tapered_buf_0/a_580_0# filter_buffered_0/tapered_buf_0/a_160_230# 0.02fF +C59 filter_buffered_0/tapered_buf_0/a_160_n140# filter_buffered_0/tapered_buf_0/a_210_n610# 0.22fF +C60 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z2 0.40fF +C61 div_pd_buffered_0/tapered_buf_3/a_210_n610# div_pd_buffered_0/tapered_buf_3/a_580_0# 0.84fF +C62 ro_complete_buffered_0/tapered_buf_5/a_n10_n140# ro_complete_buffered_0/tapered_buf_5/in 0.04fF +C63 pll_full_buffered2_0/tapered_buf_0/a_160_n140# pll_full_buffered2_0/tapered_buf_0/a_n10_n140# 0.05fF +C64 pll_full_buffered2_0/tapered_buf_0/a_580_0# pll_full_buffered2_0/tapered_buf_0/a_210_n610# 0.84fF +C65 divider_buffered_0/tapered_buf_1/a_1650_0# divider_buffered_0/tapered_buf_1/a_210_n610# 2.89fF +C66 pll_full_buffered1_0/tapered_buf_2/a_n10_n140# pll_full_buffered1_0/pll_full_0/vco 0.04fF +C67 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C68 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C69 ro_divider_buffered_0/tapered_buf_8/a_1650_0# ro_divider_buffered_0/tapered_buf_8/a_4670_0# 4.78fF +C70 ro_divider_buffered_0/tapered_buf_8/a_160_n140# ro_divider_buffered_0/tapered_buf_8/a_160_230# 0.17fF +C71 div_pd_buffered_0/tapered_buf_0/a_160_230# div_pd_buffered_0/tapered_buf_0/a_n10_230# 0.09fF +C72 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_580_0# 0.35fF +C73 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 divider_buffered_0/divider_0/clk 0.45fF +C74 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z4 0.65fF +C75 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF +C76 pll_full_buffered2_0/pll_full_0/ro_complete_0/a4 pll_full_buffered2_0/pll_full_0/vco 0.01fF +C77 ro_divider_buffered_0/ro_complete_0/a5 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF +C78 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_divider_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C79 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/pd_0/UP 0.02fF +C80 ro_divider_buffered_0/tapered_buf_0/a_n10_n140# ro_divider_buffered_0/tapered_buf_0/a_n10_230# 0.01fF +C81 ro_divider_buffered_0/divider_0/tspc_0/Q ro_divider_buffered_0/divider_0/tspc_1/Z3 0.45fF +C82 ro_divider_buffered_0/ro_complete_0/a3 ro_divider_buffered_0/divider_0/clk 0.05fF +C83 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_1650_0# 1.27fF +C84 pll_full_buffered1_0/pll_full_0/ro_complete_0/a4 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C85 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Q 0.04fF +C86 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF +C87 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C88 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z2 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z3 0.16fF +C89 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z4 0.22fF +C90 divider_buffered_0/tapered_buf_2/a_160_n140# divider_buffered_0/tapered_buf_2/a_210_n610# 0.22fF +C91 cp_buffered_0/cp_0/a_1710_0# cp_buffered_0/cp_0/a_1710_n2840# 0.83fF +C92 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z3 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z4 0.65fF +C93 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C94 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/Z1 0.36fF +C95 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C96 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_1650_0# 1.27fF +C97 ro_complete_buffered_0/tapered_buf_6/a_n10_n140# ro_complete_buffered_0/tapered_buf_6/in 0.04fF +C98 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF +C99 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF +C100 pll_full_buffered1_0/pll_full_0/ro_complete_0/a2 pll_full_buffered1_0/pll_full_0/vco 0.11fF +C101 ro_complete_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/a_160_230# 0.09fF +C102 ro_complete_buffered_0/tapered_buf_0/a_4670_0# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 29.21fF +C103 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF +C104 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C105 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/a3 0.09fF +C106 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF +C107 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF +C108 io_clamp_low[1] io_clamp_high[1] 0.53fF +C109 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.15fF +C110 divider_buffered_0/tapered_buf_2/a_1650_0# divider_buffered_0/tapered_buf_2/a_580_0# 1.27fF +C111 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A 0.15fF +C112 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a0 0.09fF +C113 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF +C114 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C115 ro_divider_buffered_0/tapered_buf_0/a_160_n140# ro_divider_buffered_0/tapered_buf_0/a_160_230# 0.17fF +C116 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF +C117 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/z5 pll_full_buffered1_0/pll_full_0/ref 0.04fF +C118 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF +C119 ro_divider_buffered_0/tapered_buf_0/a_1650_0# ro_divider_buffered_0/tapered_buf_0/a_4670_0# 4.78fF +C120 ro_divider_buffered_0/divider_0/tspc_1/Z2 ro_divider_buffered_0/divider_0/tspc_1/Z4 0.36fF +C121 ro_divider_buffered_0/divider_0/tspc_1/Z3 ro_divider_buffered_0/divider_0/tspc_1/Q 0.05fF +C122 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.05fF +C123 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/a_n10_230# 0.01fF +C124 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z1 0.03fF +C125 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C126 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/clk 0.11fF +C127 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_4670_0# 29.21fF +C128 divider_buffered_0/divider_0/tspc_1/Q divider_buffered_0/divider_0/nor_0/B 0.22fF +C129 pll_full_buffered2_0/pll_full_0/divider_0/and_0/B pll_full_buffered2_0/pll_full_0/divider_0/and_0/Z1 0.07fF +C130 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_160_n140# 0.22fF +C131 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z2 0.14fF +C132 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF +C133 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered1_0/pll_full_0/vco 0.11fF +C134 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.02fF +C135 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 0.22fF +C136 pll_full_buffered1_0/tapered_buf_2/a_160_n140# pll_full_buffered1_0/pll_full_0/vco 0.19fF +C137 ro_divider_buffered_0/tapered_buf_3/a_160_n140# ro_divider_buffered_0/tapered_buf_3/a_n10_n140# 0.05fF +C138 ro_divider_buffered_0/tapered_buf_3/a_580_0# ro_divider_buffered_0/tapered_buf_3/a_210_n610# 0.84fF +C139 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF +C140 ro_complete_buffered_0/tapered_buf_7/a_n10_n140# ro_complete_buffered_0/tapered_buf_7/in 0.04fF +C141 ro_complete_buffered_0/tapered_buf_2/a_n10_230# ro_complete_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF +C142 divider_buffered_0/divider_0/tspc_0/Q divider_buffered_0/divider_0/nor_1/B 0.22fF +C143 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF +C144 pll_full_buffered2_0/tapered_buf_4/a_1650_0# pll_full_buffered2_0/tapered_buf_4/a_210_n610# 2.89fF +C145 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF +C146 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C147 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z4 0.12fF +C148 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF +C149 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF +C150 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF +C151 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/vco 1.46fF +C152 pll_full_buffered1_0/pll_full_0/ro_complete_0/a2 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF +C153 divider_buffered_0/tapered_buf_0/a_1650_0# divider_buffered_0/tapered_buf_0/a_4670_0# 4.78fF +C154 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/tspc_1/Z4 0.21fF +C155 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF +C156 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/R 0.30fF +C157 div_pd_buffered_0/pd_0/tspc_r_0/Z4 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF +C158 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a1 0.14fF +C159 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_buffered2_0/pll_full_0/vco 0.12fF +C160 pll_full_buffered2_0/tapered_buf_2/a_160_230# pll_full_buffered2_0/tapered_buf_2/a_160_n140# 0.17fF +C161 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/tspc_0/Z2 0.11fF +C162 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C163 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/in 0.02fF +C164 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C165 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.04fF +C166 ro_divider_buffered_0/divider_0/tspc_1/Q ro_divider_buffered_0/divider_0/tspc_2/Z1 0.01fF +C167 pll_full_buffered1_0/tapered_buf_1/a_580_0# pll_full_buffered1_0/tapered_buf_1/a_160_230# 0.02fF +C168 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z3 0.06fF +C169 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B pll_full_buffered1_0/pll_full_0/div 0.27fF +C170 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.02fF +C171 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 0.22fF +C172 pll_full_buffered1_0/pll_full_0/pd_0/R pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z2 0.21fF +C173 ro_divider_buffered_0/tapered_buf_4/a_160_n140# ro_divider_buffered_0/tapered_buf_4/a_n10_n140# 0.05fF +C174 ro_divider_buffered_0/tapered_buf_4/a_580_0# ro_divider_buffered_0/tapered_buf_4/a_210_n610# 0.84fF +C175 pll_full_buffered2_0/tapered_buf_2/in pll_full_buffered2_0/pll_full_0/pd_0/R 0.36fF +C176 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z1 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z2 0.71fF +C177 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z4 0.20fF +C178 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF +C179 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF +C180 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF +C181 divider_buffered_0/divider_0/tspc_0/Q divider_buffered_0/divider_0/tspc_0/a_630_n680# 0.04fF +C182 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a3 0.13fF +C183 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/vco 0.01fF +C184 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/A 0.26fF +C185 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.09fF +C186 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C187 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF +C188 ro_divider_buffered_0/ro_complete_0/a4 ro_divider_buffered_0/ro_complete_0/a3 2.04fF +C189 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/UP 0.11fF +C190 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF +C191 pll_full_buffered1_0/pll_full_0/ro_complete_0/a5 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF +C192 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/vco 0.60fF +C193 ro_divider_buffered_0/tapered_buf_1/a_160_n140# ro_divider_buffered_0/tapered_buf_1/a_580_0# 0.35fF +C194 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/tspc_1/Z4 0.02fF +C195 ro_divider_buffered_0/divider_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/tspc_0/a_630_n680# 0.05fF +C196 ro_divider_buffered_0/tapered_buf_2/a_580_0# ro_divider_buffered_0/tapered_buf_2/a_1650_0# 1.27fF +C197 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF +C198 ro_divider_buffered_0/divider_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/tspc_2/Z4 0.12fF +C199 ro_divider_buffered_0/divider_0/tspc_2/Z1 ro_divider_buffered_0/divider_0/tspc_2/Z2 1.07fF +C200 ro_divider_buffered_0/divider_0/nor_0/B ro_divider_buffered_0/divider_0/tspc_2/Z3 0.38fF +C201 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z3 0.09fF +C202 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_1650_0# 2.89fF +C203 divider_buffered_0/divider_0/tspc_2/Z2 divider_buffered_0/divider_0/tspc_2/Z4 0.36fF +C204 divider_buffered_0/divider_0/tspc_2/Z3 divider_buffered_0/divider_0/Out 0.05fF +C205 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# divider_buffered_0/divider_0/prescaler_0/Out 0.04fF +C206 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C207 div_pd_buffered_0/tapered_buf_3/a_210_n610# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.22fF +C208 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.02fF +C209 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 0.22fF +C210 ro_divider_buffered_0/tapered_buf_5/a_160_n140# ro_divider_buffered_0/tapered_buf_5/a_n10_n140# 0.05fF +C211 ro_divider_buffered_0/tapered_buf_5/a_580_0# ro_divider_buffered_0/tapered_buf_5/a_210_n610# 0.84fF +C212 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C213 pll_full_buffered2_0/tapered_buf_3/a_160_n140# pll_full_buffered2_0/tapered_buf_3/a_n10_n140# 0.05fF +C214 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_2/in 0.04fF +C215 pll_full_buffered2_0/pll_full_0/cp_0/upbar pll_full_buffered2_0/pll_full_0/div 0.45fF +C216 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B 0.06fF +C217 cp_buffered_0/cp_0/upbar cp_buffered_0/tapered_buf_2/a_210_n610# 26.29fF +C218 pll_full_0/divider_0/and_0/OUT pll_full_0/div 0.01fF +C219 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z2 pll_full_buffered1_0/pll_full_0/div 0.19fF +C220 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z2 1.07fF +C221 pll_full_buffered2_0/pll_full_0/ro_complete_0/a1 pll_full_buffered2_0/pll_full_0/vco 0.11fF +C222 ro_divider_buffered_0/ro_complete_0/a1 ro_divider_buffered_0/ro_complete_0/a0 3.46fF +C223 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF +C224 ro_divider_buffered_0/ro_complete_0/a3 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF +C225 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF +C226 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C227 pll_full_buffered1_0/pll_full_0/ro_complete_0/a1 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C228 ro_divider_buffered_0/divider_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/tspc_1/Z4 0.12fF +C229 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF +C230 pll_full_buffered1_0/tapered_buf_2/out pll_full_buffered1_0/tapered_buf_2/a_210_n610# 26.29fF +C231 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF +C232 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_2/Z4 0.02fF +C233 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/Z4 0.65fF +C234 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C235 cp_buffered_0/tapered_buf_2/a_580_0# cp_buffered_0/tapered_buf_2/a_160_n140# 0.35fF +C236 divider_buffered_0/divider_0/tspc_1/Z2 divider_buffered_0/divider_0/nor_1/B 0.30fF +C237 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z1 0.09fF +C238 pll_full_buffered2_0/pll_full_0/ref pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z2 0.19fF +C239 pll_full_buffered1_0/pll_full_0/ro_complete_0/a2 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF +C240 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.02fF +C241 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 0.22fF +C242 ro_divider_buffered_0/tapered_buf_6/a_160_n140# ro_divider_buffered_0/tapered_buf_6/a_n10_n140# 0.05fF +C243 ro_divider_buffered_0/tapered_buf_6/a_580_0# ro_divider_buffered_0/tapered_buf_6/a_210_n610# 0.84fF +C244 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF +C245 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C246 ro_complete_buffered_0/tapered_buf_3/a_n10_230# ro_complete_buffered_0/tapered_buf_3/a_160_230# 0.09fF +C247 divider_buffered_0/divider_0/prescaler_0/Out divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF +C248 pll_full_buffered1_0/pll_full_0/pd_0/UP pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 0.03fF +C249 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF +C250 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z3 0.38fF +C251 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.02fF +C252 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.13fF +C253 pll_full_buffered2_0/pll_full_0/ro_complete_0/a0 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF +C254 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z1 pll_full_buffered2_0/pll_full_0/div 0.17fF +C255 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF +C256 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 divider_buffered_0/divider_0/and_0/OUT 0.06fF +C257 pll_full_buffered2_0/tapered_buf_3/a_160_n140# pll_full_buffered2_0/tapered_buf_3/a_580_0# 0.35fF +C258 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_divider_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C259 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.06fF +C260 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z4 0.21fF +C261 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C262 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF +C263 ro_divider_buffered_0/tapered_buf_1/a_580_0# ro_divider_buffered_0/tapered_buf_1/a_1650_0# 1.27fF +C264 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/divider_0/and_0/out1 0.06fF +C265 ro_divider_buffered_0/divider_0/and_0/OUT ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C266 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 ro_divider_buffered_0/divider_0/clk 0.45fF +C267 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF +C268 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z2 0.14fF +C269 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.01fF +C270 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/clk 0.11fF +C271 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered1_0/pll_full_0/divider_0/and_0/B 0.01fF +C272 pll_full_buffered2_0/tapered_buf_1/a_n10_230# pll_full_buffered2_0/tapered_buf_1/a_160_230# 0.09fF +C273 pll_full_buffered2_0/tapered_buf_1/a_4670_0# pll_full_buffered2_0/tapered_buf_1/a_210_n610# 29.21fF +C274 cp_buffered_0/tapered_buf_1/a_n10_n140# cp_buffered_0/tapered_buf_1/a_n10_230# 0.01fF +C275 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar pll_full_buffered2_0/pll_full_0/pd_0/R 0.03fF +C276 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z2 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z4 0.14fF +C277 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C278 filter_buffered_0/filter_0/v filter_buffered_0/tapered_buf_0/a_n10_n140# 0.04fF +C279 ro_divider_buffered_0/tapered_buf_7/a_160_n140# ro_divider_buffered_0/tapered_buf_7/a_n10_n140# 0.05fF +C280 ro_divider_buffered_0/tapered_buf_7/a_580_0# ro_divider_buffered_0/tapered_buf_7/a_210_n610# 0.84fF +C281 ro_divider_buffered_0/tapered_buf_2/a_n10_230# ro_divider_buffered_0/tapered_buf_2/a_160_230# 0.09fF +C282 ro_divider_buffered_0/tapered_buf_2/a_4670_0# ro_divider_buffered_0/tapered_buf_2/a_210_n610# 29.21fF +C283 div_pd_buffered_0/tapered_buf_4/out div_pd_buffered_0/tapered_buf_4/a_210_n610# 26.29fF +C284 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C285 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF +C286 pll_full_buffered2_0/pll_full_0/ro_complete_0/a2 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF +C287 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_divider_buffered_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF +C288 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/DOWN 0.03fF +C289 divider_buffered_0/tapered_buf_1/a_n10_230# divider_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF +C290 divider_buffered_0/divider_0/tspc_0/Z3 divider_buffered_0/divider_0/tspc_0/Z1 0.06fF +C291 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C292 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT 0.06fF +C293 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a0 0.13fF +C294 divider_buffered_0/tapered_buf_0/a_n10_n140# divider_buffered_0/tapered_buf_0/a_n10_230# 0.01fF +C295 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z4 0.15fF +C296 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_buffered2_0/pll_full_0/vco 0.12fF +C297 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.03fF +C298 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/Z3 0.20fF +C299 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF +C300 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.09fF +C301 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_0/B 0.15fF +C302 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF +C303 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C304 divider_buffered_0/divider_0/prescaler_0/tspc_2/Q divider_buffered_0/divider_0/clk 0.05fF +C305 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z3 0.06fF +C306 pll_full_buffered2_0/tapered_buf_0/a_n10_230# pll_full_buffered2_0/tapered_buf_0/a_160_230# 0.09fF +C307 pll_full_buffered2_0/tapered_buf_0/a_4670_0# pll_full_buffered2_0/tapered_buf_0/a_210_n610# 29.21fF +C308 divider_buffered_0/divider_0/prescaler_0/Out divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF +C309 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/z5 pll_full_buffered2_0/pll_full_0/pd_0/UP 0.03fF +C310 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF +C311 ro_complete_buffered_0/tapered_buf_1/out ro_complete_buffered_0/tapered_buf_1/a_210_n610# 26.29fF +C312 ro_divider_buffered_0/tapered_buf_8/a_160_n140# ro_divider_buffered_0/tapered_buf_8/a_n10_n140# 0.05fF +C313 ro_divider_buffered_0/tapered_buf_8/a_580_0# ro_divider_buffered_0/tapered_buf_8/a_210_n610# 0.84fF +C314 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_1650_0# 1.27fF +C315 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C316 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C317 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C318 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF +C319 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 divider_buffered_0/divider_0/clk 0.12fF +C320 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z2 0.30fF +C321 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z3 0.45fF +C322 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF +C323 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 divider_buffered_0/divider_0/clk 0.45fF +C324 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z2 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z4 0.36fF +C325 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z3 pll_full_buffered2_0/pll_full_0/div 0.05fF +C326 ro_divider_buffered_0/divider_0/tspc_0/Q ro_divider_buffered_0/divider_0/tspc_1/Z4 0.15fF +C327 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C328 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF +C329 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered1_0/pll_full_0/vco 0.01fF +C330 pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Out1 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar 0.05fF +C331 divider_buffered_0/tapered_buf_2/in divider_buffered_0/tapered_buf_2/a_n10_n140# 0.04fF +C332 pll_full_buffered2_0/tapered_buf_5/a_n10_n140# pll_full_buffered2_0/tapered_buf_5/in 0.04fF +C333 pll_full_buffered1_0/pll_full_0/pd_0/UP pll_full_buffered1_0/pll_full_0/cp_0/upbar 0.05fF +C334 filter_buffered_0/tapered_buf_1/a_160_n140# filter_buffered_0/v 0.19fF +C335 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C336 pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Z1 pll_full_buffered2_0/pll_full_0/pd_0/UP 0.06fF +C337 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/and_0/A 0.80fF +C338 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z1 0.06fF +C339 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF +C340 pll_full_0/ro_complete_0/a2 pll_full_0/vco 0.11fF +C341 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF +C342 ro_complete_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF +C343 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF +C344 pll_full_buffered2_0/tapered_buf_5/a_160_n140# pll_full_buffered2_0/tapered_buf_5/a_580_0# 0.35fF +C345 pll_full_buffered2_0/tapered_buf_4/a_n10_n140# pll_full_buffered2_0/tapered_buf_4/in 0.04fF +C346 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C347 pll_full_buffered2_0/pll_full_0/ro_complete_0/a2 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C348 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/a_160_230# 0.09fF +C349 cp_buffered_0/tapered_buf_1/a_4670_0# cp_buffered_0/tapered_buf_1/a_210_n610# 29.21fF +C350 pll_full_buffered1_0/pll_full_0/pd_0/DOWN pll_full_buffered1_0/pll_full_0/pd_0/UP 0.61fF +C351 ro_divider_buffered_0/tapered_buf_1/a_160_230# ro_divider_buffered_0/tapered_buf_1/a_580_0# 0.02fF +C352 div_pd_buffered_0/tapered_buf_1/a_n10_n140# div_pd_buffered_0/tapered_buf_1/a_n10_230# 0.01fF +C353 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF +C354 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B 0.47fF +C355 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C356 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered2_0/pll_full_0/vco 0.14fF +C357 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.11fF +C358 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF +C359 pll_full_buffered1_0/tapered_buf_0/a_n10_230# pll_full_buffered1_0/tapered_buf_0/in 0.02fF +C360 divider_buffered_0/divider_0/tspc_1/Q divider_buffered_0/divider_0/tspc_2/Z2 0.14fF +C361 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.11fF +C362 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF +C363 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 2.89fF +C364 divider_buffered_0/tapered_buf_2/a_1650_0# divider_buffered_0/tapered_buf_2/a_4670_0# 4.78fF +C365 ro_divider_buffered_0/tapered_buf_3/a_n10_230# ro_divider_buffered_0/tapered_buf_3/a_160_230# 0.09fF +C366 ro_divider_buffered_0/tapered_buf_3/a_4670_0# ro_divider_buffered_0/tapered_buf_3/a_210_n610# 29.21fF +C367 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z4 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z4 0.02fF +C368 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered1_0/pll_full_0/pd_0/DOWN 0.11fF +C369 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF +C370 pll_full_buffered1_0/tapered_buf_1/a_n10_230# pll_full_buffered1_0/tapered_buf_1/in 0.02fF +C371 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF +C372 pll_full_buffered1_0/tapered_buf_1/a_160_n140# pll_full_buffered1_0/tapered_buf_1/in 0.19fF +C373 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF +C374 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/vco 1.58fF +C375 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF +C376 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF +C377 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_divider_buffered_0/ro_complete_0/a4 0.12fF +C378 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF +C379 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/R 0.61fF +C380 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 divider_buffered_0/divider_0/clk 0.12fF +C381 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF +C382 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B 1.21fF +C383 cp_buffered_0/cp_0/upbar cp_buffered_0/cp_0/down 0.02fF +C384 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C385 pll_full_buffered1_0/pll_full_0/ro_complete_0/a4 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF +C386 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C387 div_pd_buffered_0/tapered_buf_1/a_n10_n140# div_pd_buffered_0/tapered_buf_1/in 0.04fF +C388 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Z4 0.12fF +C389 ro_divider_buffered_0/divider_0/tspc_1/Q ro_divider_buffered_0/divider_0/tspc_2/Z3 0.45fF +C390 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 ro_divider_buffered_0/divider_0/clk 0.45fF +C391 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_buffered1_0/pll_full_0/vco 1.46fF +C392 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/B 0.01fF +C393 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z4 0.00fF +C394 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF +C395 ro_complete_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 2.89fF +C396 ro_divider_buffered_0/tapered_buf_4/a_n10_230# ro_divider_buffered_0/tapered_buf_4/a_160_230# 0.09fF +C397 ro_divider_buffered_0/tapered_buf_4/a_4670_0# ro_divider_buffered_0/tapered_buf_4/a_210_n610# 29.21fF +C398 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/z5 0.20fF +C399 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF +C400 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C401 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C402 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_divider_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C403 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/a_630_n680# 0.35fF +C404 ro_divider_buffered_0/divider_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/tspc_0/Z4 0.65fF +C405 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF +C406 ro_divider_buffered_0/ro_complete_0/a4 ro_divider_buffered_0/divider_0/clk 0.05fF +C407 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C408 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C409 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/B 0.20fF +C410 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered2_0/pll_full_0/divider_0/and_0/Z1 0.04fF +C411 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_buffered2_0/pll_full_0/vco 0.05fF +C412 ro_divider_buffered_0/divider_0/tspc_2/Z2 ro_divider_buffered_0/divider_0/tspc_2/Z3 0.16fF +C413 ro_divider_buffered_0/divider_0/nor_0/B ro_divider_buffered_0/divider_0/tspc_2/Z4 0.22fF +C414 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF +C415 ro_complete_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 2.89fF +C416 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF +C417 ro_divider_buffered_0/tapered_buf_5/a_n10_230# ro_divider_buffered_0/tapered_buf_5/a_160_230# 0.09fF +C418 ro_divider_buffered_0/tapered_buf_5/a_4670_0# ro_divider_buffered_0/tapered_buf_5/a_210_n610# 29.21fF +C419 pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Out1 pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Z1 0.18fF +C420 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_0/Q 0.01fF +C421 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.45fF +C422 div_pd_buffered_0/tapered_buf_2/a_n10_230# div_pd_buffered_0/tapered_buf_2/in 0.02fF +C423 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/nor_1/A 0.15fF +C424 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_divider_buffered_0/ro_complete_0/a0 0.09fF +C425 pll_full_buffered1_0/pll_full_0/pd_0/R pll_full_buffered1_0/pll_full_0/div 0.51fF +C426 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF +C427 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 divider_buffered_0/divider_0/clk 0.11fF +C428 ro_divider_buffered_0/tapered_buf_0/a_160_230# ro_divider_buffered_0/tapered_buf_0/a_n10_230# 0.09fF +C429 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF +C430 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C431 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/and_0/A 0.80fF +C432 divider_buffered_0/divider_0/nor_0/Z1 divider_buffered_0/divider_0/nor_0/B 0.06fF +C433 ro_divider_buffered_0/divider_0/and_0/B ro_divider_buffered_0/divider_0/and_0/Z1 0.07fF +C434 ro_complete_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 2.89fF +C435 filter_buffered_0/filter_0/v filter_buffered_0/tapered_buf_0/a_n10_230# 0.02fF +C436 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF +C437 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C438 ro_divider_buffered_0/tapered_buf_6/a_n10_230# ro_divider_buffered_0/tapered_buf_6/a_160_230# 0.09fF +C439 ro_divider_buffered_0/tapered_buf_6/a_4670_0# ro_divider_buffered_0/tapered_buf_6/a_210_n610# 29.21fF +C440 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF +C441 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z4 0.21fF +C442 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z2 0.16fF +C443 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/tapered_buf_1/in 0.05fF +C444 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF +C445 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF +C446 pll_full_buffered2_0/tapered_buf_3/out pll_full_buffered2_0/tapered_buf_3/a_210_n610# 26.29fF +C447 cp_buffered_0/tapered_buf_0/a_160_230# cp_buffered_0/tapered_buf_0/a_160_n140# 0.17fF +C448 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.11fF +C449 pll_full_buffered1_0/pll_full_0/ro_complete_0/a4 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF +C450 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar1 0.11fF +C451 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/and_0/B 0.31fF +C452 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF +C453 pll_full_buffered2_0/tapered_buf_3/a_210_n610# pll_full_buffered2_0/tapered_buf_3/a_580_0# 0.84fF +C454 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/divider_0/and_0/A 0.16fF +C455 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 ro_divider_buffered_0/divider_0/clk 0.12fF +C456 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF +C457 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF +C458 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B 0.06fF +C459 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF +C460 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.21fF +C461 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/and_0/B 0.01fF +C462 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.19fF +C463 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.17fF +C464 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.03fF +C465 pll_full_buffered2_0/tapered_buf_1/a_n10_230# pll_full_buffered2_0/tapered_buf_1/a_n10_n140# 0.01fF +C466 ro_divider_buffered_0/tapered_buf_7/a_n10_230# ro_divider_buffered_0/tapered_buf_7/a_160_230# 0.09fF +C467 ro_divider_buffered_0/tapered_buf_7/a_4670_0# ro_divider_buffered_0/tapered_buf_7/a_210_n610# 29.21fF +C468 divider_buffered_0/divider_0/prescaler_0/Out divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF +C469 pll_full_buffered2_0/pll_full_0/ro_complete_0/a2 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF +C470 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a4 0.09fF +C471 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a5 0.09fF +C472 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/vco 1.46fF +C473 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin ro_complete_buffered_0/tapered_buf_1/in 1.43fF +C474 filter_buffered_0/tapered_buf_1/a_n10_n140# filter_buffered_0/tapered_buf_1/a_160_n140# 0.05fF +C475 divider_buffered_0/divider_0/tspc_1/a_630_n680# divider_buffered_0/divider_0/nor_0/B 0.00fF +C476 divider_buffered_0/divider_0/tspc_0/Z3 divider_buffered_0/divider_0/tspc_0/a_630_n680# 0.05fF +C477 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.05fF +C478 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q 0.22fF +C479 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z1 0.03fF +C480 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF +C481 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C482 ro_divider_buffered_0/tapered_buf_1/a_n10_230# ro_divider_buffered_0/tapered_buf_1/in 0.02fF +C483 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_divider_buffered_0/ro_complete_0/a3 0.13fF +C484 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/Z3 0.38fF +C485 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z1 0.09fF +C486 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.19fF +C487 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF +C488 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C489 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.05fF +C490 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C491 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q ro_divider_buffered_0/divider_0/clk 0.60fF +C492 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z4 0.12fF +C493 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT 0.06fF +C494 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF +C495 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF +C496 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_buffered1_0/pll_full_0/vco 1.46fF +C497 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z4 0.00fF +C498 divider_buffered_0/divider_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/nor_0/B 0.35fF +C499 divider_buffered_0/divider_0/prescaler_0/tspc_0/D divider_buffered_0/divider_0/clk 0.29fF +C500 pll_full_buffered2_0/tapered_buf_0/a_n10_230# pll_full_buffered2_0/tapered_buf_0/a_n10_n140# 0.01fF +C501 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C502 ro_divider_buffered_0/tapered_buf_8/a_n10_230# ro_divider_buffered_0/tapered_buf_8/a_160_230# 0.09fF +C503 ro_divider_buffered_0/tapered_buf_8/a_4670_0# ro_divider_buffered_0/tapered_buf_8/a_210_n610# 29.21fF +C504 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out 0.05fF +C505 div_pd_buffered_0/tapered_buf_4/a_1650_0# div_pd_buffered_0/tapered_buf_4/a_4670_0# 4.78fF +C506 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.17fF +C507 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF +C508 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z3 0.06fF +C509 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q 0.51fF +C510 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF +C511 pll_full_buffered2_0/pll_full_0/ro_complete_0/a5 pll_full_buffered2_0/pll_full_0/vco 0.15fF +C512 ro_divider_buffered_0/divider_0/nor_1/Z1 ro_divider_buffered_0/divider_0/nor_1/B 0.06fF +C513 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z1 0.71fF +C514 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/UP 0.11fF +C515 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_160_n140# 0.35fF +C516 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF +C517 pll_full_buffered1_0/pll_full_0/ro_complete_0/a5 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 0.08fF +C518 pll_full_buffered1_0/pll_full_0/ro_complete_0/a0 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF +C519 ro_divider_buffered_0/divider_0/tspc_0/Z1 ro_divider_buffered_0/divider_0/tspc_0/Z2 1.07fF +C520 ro_divider_buffered_0/ro_complete_0/a1 ro_divider_buffered_0/divider_0/clk 0.05fF +C521 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/in 0.19fF +C522 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.03fF +C523 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF +C524 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/vco 0.01fF +C525 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/and_0/A 0.26fF +C526 divider_buffered_0/divider_0/and_0/out1 divider_buffered_0/divider_0/and_0/A 0.01fF +C527 ro_complete_buffered_0/tapered_buf_2/a_580_0# ro_complete_buffered_0/tapered_buf_2/a_210_n610# 0.84fF +C528 divider_buffered_0/divider_0/tspc_0/Z4 divider_buffered_0/divider_0/prescaler_0/Out 0.12fF +C529 ro_divider_buffered_0/tapered_buf_2/a_160_n140# ro_divider_buffered_0/tapered_buf_2/in 0.19fF +C530 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF +C531 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/in 0.19fF +C532 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF +C533 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C534 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C535 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/A 0.80fF +C536 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C537 pll_full_buffered2_0/tapered_buf_5/a_580_0# pll_full_buffered2_0/tapered_buf_5/a_1650_0# 1.27fF +C538 io_clamp_low[0] io_clamp_high[0] 0.53fF +C539 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C540 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z3 0.65fF +C541 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z2 0.20fF +C542 ro_divider_buffered_0/ro_complete_0/a0 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF +C543 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/a_210_n610# 0.22fF +C544 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C545 divider_buffered_0/divider_0/nor_0/Z1 divider_buffered_0/divider_0/and_0/B 0.78fF +C546 pll_full_buffered1_0/pll_full_0/pd_0/DOWN pll_full_buffered1_0/pll_full_0/cp_0/a_1710_0# 0.32fF +C547 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered1_0/pll_full_0/div 0.01fF +C548 div_pd_buffered_0/tapered_buf_2/a_160_230# div_pd_buffered_0/tapered_buf_2/a_580_0# 0.02fF +C549 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/in 0.19fF +C550 pll_full_buffered2_0/pll_full_0/cp_0/vbias pll_full_buffered2_0/pll_full_0/cp_0/a_10_n50# 0.19fF +C551 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z4 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/z5 0.04fF +C552 ro_divider_buffered_0/tapered_buf_3/a_n10_230# ro_divider_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF +C553 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/z5 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/z5 0.02fF +C554 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z2 0.25fF +C555 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_210_n610# 0.22fF +C556 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF +C557 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/div 0.17fF +C558 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C559 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF +C560 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF +C561 divider_buffered_0/tapered_buf_0/in divider_buffered_0/tapered_buf_0/a_n10_230# 0.02fF +C562 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/tspc_0/a_630_n680# 0.01fF +C563 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.01fF +C564 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z4 0.12fF +C565 pll_full_buffered2_0/pll_full_0/ro_complete_0/a0 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF +C566 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF +C567 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/DOWN 0.02fF +C568 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/R 0.30fF +C569 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF +C570 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered2_0/pll_full_0/vco 0.01fF +C571 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_divider_buffered_0/divider_0/and_0/OUT 0.06fF +C572 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/nor_1/A 1.21fF +C573 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z2 1.07fF +C574 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z3 0.38fF +C575 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/and_0/B 0.78fF +C576 divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# divider_buffered_0/divider_0/clk 0.01fF +C577 ro_divider_buffered_0/divider_0/tspc_1/Q ro_divider_buffered_0/divider_0/tspc_2/Z4 0.15fF +C578 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 ro_divider_buffered_0/divider_0/clk 0.12fF +C579 pll_full_buffered1_0/tapered_buf_2/a_160_n140# pll_full_buffered1_0/tapered_buf_2/a_160_230# 0.17fF +C580 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z3 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z4 0.65fF +C581 pll_full_buffered1_0/tapered_buf_0/a_160_n140# pll_full_buffered1_0/tapered_buf_0/in 0.19fF +C582 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/in 0.19fF +C583 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_buffered2_0/pll_full_0/pd_0/UP 0.11fF +C584 ro_divider_buffered_0/tapered_buf_4/a_n10_230# ro_divider_buffered_0/tapered_buf_4/a_n10_n140# 0.01fF +C585 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C586 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/div 0.02fF +C587 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z4 0.14fF +C588 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF +C589 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C590 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF +C591 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/vco 0.11fF +C592 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C593 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF +C594 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z2 0.23fF +C595 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C596 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_buffered2_0/pll_full_0/vco 1.46fF +C597 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C598 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B 0.35fF +C599 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_buffered2_0/pll_full_0/vco 0.29fF +C600 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_1/Z2 0.30fF +C601 ro_divider_buffered_0/divider_0/tspc_2/Z2 ro_divider_buffered_0/divider_0/tspc_2/Z4 0.36fF +C602 ro_divider_buffered_0/divider_0/tspc_2/Z3 ro_divider_buffered_0/divider_0/Out 0.05fF +C603 pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Z1 pll_full_buffered1_0/pll_full_0/pd_0/R 0.02fF +C604 cp_buffered_0/cp_0/down cp_buffered_0/cp_0/out 0.79fF +C605 cp_buffered_0/tapered_buf_0/in cp_buffered_0/tapered_buf_0/a_160_n140# 0.19fF +C606 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C607 div_pd_buffered_0/tapered_buf_2/a_4670_0# div_pd_buffered_0/tapered_buf_2/a_210_n610# 29.21fF +C608 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/in 0.19fF +C609 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/ro_complete_0/a1 26.29fF +C610 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 0.16fF +C611 ro_divider_buffered_0/tapered_buf_5/a_n10_230# ro_divider_buffered_0/tapered_buf_5/a_n10_n140# 0.01fF +C612 div_pd_buffered_0/tapered_buf_2/a_n10_n140# div_pd_buffered_0/tapered_buf_2/in 0.04fF +C613 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a3 3.17fF +C614 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF +C615 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF +C616 pll_full_0/divider_0/and_0/OUT pll_full_0/vco 0.06fF +C617 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C618 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C619 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z4 pll_full_buffered1_0/pll_full_0/div 0.02fF +C620 ro_complete_buffered_0/tapered_buf_3/a_160_230# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.02fF +C621 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/and_0/A 0.26fF +C622 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF +C623 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v pll_full_buffered2_0/pll_full_0/vco 1.27fF +C624 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 0.04fF +C625 io_clamp_high[2] io_analog[6] 0.53fF +C626 pll_full_buffered2_0/pll_full_0/divider_0/and_0/out1 pll_full_buffered2_0/pll_full_0/divider_0/and_0/A 0.01fF +C627 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/nor_0/B 0.47fF +C628 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C629 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_divider_buffered_0/divider_0/clk 0.14fF +C630 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/R 0.01fF +C631 pll_full_buffered2_0/pll_full_0/ref pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z4 0.02fF +C632 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF +C633 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/in 0.19fF +C634 ro_divider_buffered_0/tapered_buf_6/a_n10_230# ro_divider_buffered_0/tapered_buf_6/a_n10_n140# 0.01fF +C635 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/in 0.02fF +C636 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF +C637 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/vco 0.64fF +C638 pll_full_buffered2_0/tapered_buf_2/a_n10_n140# pll_full_buffered2_0/tapered_buf_2/a_160_n140# 0.05fF +C639 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_divider_buffered_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF +C640 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF +C641 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.05fF +C642 pll_full_0/div pll_full_0/vco 2.26fF +C643 pll_full_buffered2_0/tapered_buf_2/a_n10_230# pll_full_buffered2_0/tapered_buf_2/in 0.02fF +C644 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/tspc_0/a_630_n680# 0.01fF +C645 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/nor_1/B 1.21fF +C646 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/OUT 0.05fF +C647 div_pd_buffered_0/divider_0/tspc_0/Q div_pd_buffered_0/divider_0/nor_1/A 0.55fF +C648 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z1 0.06fF +C649 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF +C650 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.32fF +C651 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/tapered_buf_1/a_210_n610# 26.29fF +C652 div_pd_buffered_0/tapered_buf_1/a_n10_230# div_pd_buffered_0/tapered_buf_1/a_160_230# 0.09fF +C653 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered2_0/tapered_buf_2/in 0.03fF +C654 pll_full_buffered1_0/tapered_buf_2/a_160_n140# pll_full_buffered1_0/tapered_buf_2/a_580_0# 0.35fF +C655 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C656 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF +C657 filter_buffered_0/filter_0/v filter_buffered_0/v 0.54fF +C658 ro_divider_buffered_0/tapered_buf_7/a_n10_230# ro_divider_buffered_0/tapered_buf_7/a_n10_n140# 0.01fF +C659 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.08fF +C660 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF +C661 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z4 0.02fF +C662 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF +C663 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF +C664 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/A 0.01fF +C665 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.15fF +C666 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/R 0.51fF +C667 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_1/a_630_n680# 0.35fF +C668 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF +C669 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_160_230# 0.02fF +C670 divider_buffered_0/divider_0/tspc_1/Z3 divider_buffered_0/divider_0/tspc_1/Q 0.05fF +C671 cp_buffered_0/tapered_buf_2/in cp_buffered_0/tapered_buf_2/a_n10_230# 0.02fF +C672 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_160_n140# 0.17fF +C673 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF +C674 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_buffered1_0/pll_full_0/vco 1.58fF +C675 ro_complete_buffered_0/tapered_buf_3/a_n10_n140# ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.05fF +C676 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.84fF +C677 divider_buffered_0/divider_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/tspc_2/Z2 0.01fF +C678 ro_divider_buffered_0/divider_0/and_0/OUT ro_divider_buffered_0/divider_0/and_0/Z1 0.04fF +C679 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q ro_divider_buffered_0/divider_0/clk 0.05fF +C680 div_pd_buffered_0/divider_0/tspc_2/Z3 div_pd_buffered_0/divider_0/tspc_2/Z4 0.65fF +C681 cp_buffered_0/tapered_buf_1/a_210_n610# cp_buffered_0/cp_0/out 26.29fF +C682 pll_full_buffered2_0/tapered_buf_1/in pll_full_buffered2_0/pll_full_0/cp_0/upbar 0.05fF +C683 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_210_n610# 0.84fF +C684 divider_buffered_0/tapered_buf_1/a_n10_230# divider_buffered_0/tapered_buf_1/a_160_230# 0.09fF +C685 pll_full_buffered2_0/pll_full_0/pd_0/R pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Z1 0.02fF +C686 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z3 0.38fF +C687 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/a_160_230# 0.09fF +C688 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C689 pll_full_buffered1_0/tapered_buf_0/a_n10_230# pll_full_buffered1_0/tapered_buf_0/a_160_230# 0.09fF +C690 pll_full_buffered1_0/tapered_buf_0/a_4670_0# pll_full_buffered1_0/tapered_buf_0/a_210_n610# 29.21fF +C691 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/mc2 0.33fF +C692 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF +C693 ro_divider_buffered_0/tapered_buf_8/a_n10_230# ro_divider_buffered_0/tapered_buf_8/a_n10_n140# 0.01fF +C694 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_n10_n140# 0.05fF +C695 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 0.84fF +C696 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C697 ro_complete_buffered_0/tapered_buf_3/a_n10_230# ro_complete_buffered_0/tapered_buf_3/in 0.02fF +C698 divider_buffered_0/tapered_buf_1/a_160_n140# divider_buffered_0/tapered_buf_1/a_n10_n140# 0.05fF +C699 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z4 0.00fF +C700 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered2_0/pll_full_0/vco 0.11fF +C701 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/clk 0.14fF +C702 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF +C703 pll_full_buffered2_0/tapered_buf_3/a_n10_230# pll_full_buffered2_0/pll_full_0/div 0.02fF +C704 pll_full_buffered2_0/tapered_buf_3/a_n10_n140# pll_full_buffered2_0/pll_full_0/div 0.04fF +C705 filter_buffered_0/tapered_buf_1/a_n10_230# filter_buffered_0/tapered_buf_1/a_160_230# 0.09fF +C706 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF +C707 divider_buffered_0/tapered_buf_0/in divider_buffered_0/tapered_buf_0/a_n10_n140# 0.04fF +C708 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF +C709 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_160_230# 0.17fF +C710 ro_complete_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.02fF +C711 divider_buffered_0/tapered_buf_1/a_160_230# divider_buffered_0/tapered_buf_1/a_580_0# 0.02fF +C712 div_pd_buffered_0/tapered_buf_0/a_210_n610# div_pd_buffered_0/tapered_buf_0/a_580_0# 0.84fF +C713 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.38fF +C714 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF +C715 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z1 0.03fF +C716 pll_full_buffered2_0/tapered_buf_2/a_4670_0# pll_full_buffered2_0/tapered_buf_2/a_1650_0# 4.78fF +C717 ro_divider_buffered_0/tapered_buf_0/a_210_n610# ro_divider_buffered_0/tapered_buf_0/a_1650_0# 2.89fF +C718 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF +C719 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/nor_1/A 0.03fF +C720 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C721 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT 0.05fF +C722 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/and_0/B 0.31fF +C723 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.05fF +C724 cp_buffered_0/tapered_buf_1/a_n10_n140# cp_buffered_0/tapered_buf_1/in 0.04fF +C725 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q 0.01fF +C726 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 1.45fF +C727 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/and_0/A 0.01fF +C728 divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.04fF +C729 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z4 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 0.20fF +C730 pll_full_buffered2_0/pll_full_0/ref pll_full_buffered2_0/pll_full_0/pd_0/R 0.61fF +C731 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF +C732 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered1_0/pll_full_0/pd_0/R 0.27fF +C733 pll_full_buffered1_0/tapered_buf_2/a_580_0# pll_full_buffered1_0/tapered_buf_2/a_210_n610# 0.84fF +C734 divider_buffered_0/divider_0/tspc_1/Z1 divider_buffered_0/divider_0/tspc_1/Z3 0.06fF +C735 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.65fF +C736 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z3 0.05fF +C737 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C738 pll_full_0/ro_complete_0/a0 pll_full_0/vco 0.11fF +C739 pll_full_buffered2_0/pll_full_0/ro_complete_0/a0 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C740 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF +C741 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_divider_buffered_0/ro_complete_0/a4 0.09fF +C742 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_divider_buffered_0/ro_complete_0/a5 0.09fF +C743 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C744 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF +C745 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_0/Q 0.22fF +C746 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/tspc_0/Z1 0.03fF +C747 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF +C748 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C749 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF +C750 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/nor_1/A 0.01fF +C751 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C752 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/nor_0/B 0.06fF +C753 divider_buffered_0/tapered_buf_0/a_160_n140# divider_buffered_0/tapered_buf_0/a_160_230# 0.17fF +C754 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF +C755 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF +C756 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/vco 0.01fF +C757 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF +C758 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z4 0.21fF +C759 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z2 0.16fF +C760 divider_buffered_0/tapered_buf_1/a_n10_n140# divider_buffered_0/divider_0/Out 0.04fF +C761 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z2 0.25fF +C762 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_580_0# 0.35fF +C763 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF +C764 ro_complete_buffered_0/tapered_buf_1/a_580_0# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 1.27fF +C765 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.04fF +C766 divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# divider_buffered_0/divider_0/nor_1/A 0.01fF +C767 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z2 0.15fF +C768 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/and_0/B 0.18fF +C769 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF +C770 pll_full_buffered2_0/tapered_buf_3/a_160_n140# pll_full_buffered2_0/tapered_buf_3/a_210_n610# 0.22fF +C771 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/prescaler_0/Out 0.05fF +C772 div_pd_buffered_0/pd_0/tspc_r_1/Z4 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF +C773 ro_divider_buffered_0/tapered_buf_1/a_4670_0# ro_divider_buffered_0/tapered_buf_1/a_210_n610# 29.21fF +C774 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF +C775 ro_divider_buffered_0/divider_0/tspc_1/Z1 ro_divider_buffered_0/divider_0/tspc_1/Z3 0.06fF +C776 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_1/Q 0.51fF +C777 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.15fF +C778 ro_divider_buffered_0/ro_complete_0/a5 ro_divider_buffered_0/divider_0/clk 0.10fF +C779 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z2 0.01fF +C780 ro_divider_buffered_0/tapered_buf_2/a_160_230# ro_divider_buffered_0/tapered_buf_2/a_160_n140# 0.17fF +C781 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_160_n140# 0.35fF +C782 cp_buffered_0/tapered_buf_2/a_580_0# cp_buffered_0/tapered_buf_2/a_210_n610# 0.84fF +C783 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_buffered1_0/pll_full_0/vco 1.46fF +C784 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.35fF +C785 divider_buffered_0/divider_0/nor_0/B divider_buffered_0/divider_0/and_0/B 0.29fF +C786 pll_full_buffered1_0/tapered_buf_1/a_1650_0# pll_full_buffered1_0/tapered_buf_1/a_580_0# 1.27fF +C787 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C788 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 0.36fF +C789 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Q 0.05fF +C790 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF +C791 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B 0.18fF +C792 pll_full_buffered2_0/pll_full_0/ro_complete_0/a4 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF +C793 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/z5 pll_full_buffered1_0/pll_full_0/pd_0/UP 0.03fF +C794 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/div 0.03fF +C795 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF +C796 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/vco 0.26fF +C797 divider_buffered_0/divider_0/mc2 divider_buffered_0/divider_0/and_0/OUT 0.05fF +C798 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# divider_buffered_0/divider_0/clk 0.01fF +C799 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z2 0.01fF +C800 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z2 0.01fF +C801 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF +C802 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF +C803 pll_full_buffered2_0/tapered_buf_2/a_210_n610# pll_full_buffered2_0/tapered_buf_2/a_160_n140# 0.22fF +C804 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C805 div_pd_buffered_0/divider_0/tspc_0/Z3 div_pd_buffered_0/divider_0/tspc_0/Q 0.05fF +C806 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C807 div_pd_buffered_0/pd_0/and_pd_0/Out1 div_pd_buffered_0/pd_0/UP 0.33fF +C808 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_2/Z2 0.20fF +C809 io_clamp_low[1] io_analog[5] 0.53fF +C810 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF +C811 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.03fF +C812 pll_full_buffered1_0/tapered_buf_1/a_1650_0# pll_full_buffered1_0/tapered_buf_1/a_210_n610# 2.89fF +C813 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_580_0# 0.35fF +C814 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/z5 0.11fF +C815 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF +C816 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C817 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.09fF +C818 cp_buffered_0/tapered_buf_0/a_160_230# cp_buffered_0/tapered_buf_0/a_580_0# 0.02fF +C819 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z3 0.45fF +C820 pll_full_0/ro_complete_0/a3 pll_full_0/vco 0.11fF +C821 pll_full_buffered1_0/pll_full_0/pd_0/UP pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar 0.21fF +C822 divider_buffered_0/tapered_buf_2/a_160_230# divider_buffered_0/tapered_buf_2/a_n10_230# 0.09fF +C823 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF +C824 pll_full_buffered2_0/pll_full_0/ro_complete_0/a3 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C825 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/z5 pll_full_buffered2_0/pll_full_0/div 0.04fF +C826 cp_buffered_0/tapered_buf_0/a_210_n610# cp_buffered_0/cp_0/down 26.29fF +C827 cp_buffered_0/cp_0/upbar cp_buffered_0/cp_0/a_1710_n2840# 0.29fF +C828 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_buffered1_0/pll_full_0/ref 0.12fF +C829 div_pd_buffered_0/pd_0/tspc_r_0/Z2 div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.14fF +C830 divider_buffered_0/tapered_buf_0/a_580_0# divider_buffered_0/tapered_buf_0/a_160_230# 0.02fF +C831 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B 0.00fF +C832 pll_full_buffered2_0/tapered_buf_5/a_580_0# pll_full_buffered2_0/tapered_buf_5/a_160_230# 0.02fF +C833 pll_full_buffered2_0/tapered_buf_5/a_160_n140# pll_full_buffered2_0/tapered_buf_5/a_210_n610# 0.22fF +C834 ro_divider_buffered_0/tapered_buf_0/a_210_n610# ro_divider_buffered_0/tapered_buf_0/a_580_0# 0.84fF +C835 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.01fF +C836 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/tspc_0/Z4 0.12fF +C837 ro_divider_buffered_0/ro_complete_0/a0 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF +C838 pll_full_0/cp_0/vbias pll_full_0/cp_0/a_10_n50# 0.19fF +C839 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Z1 0.03fF +C840 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z2 1.07fF +C841 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF +C842 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C843 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C844 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.19fF +C845 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_divider_buffered_0/divider_0/clk 0.01fF +C846 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q divider_buffered_0/divider_0/prescaler_0/nand_1/z1 0.22fF +C847 divider_buffered_0/divider_0/prescaler_0/tspc_2/Q divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.04fF +C848 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_580_0# 0.35fF +C849 pll_full_buffered1_0/pll_full_0/pd_0/R pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 0.29fF +C850 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z1 0.09fF +C851 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF +C852 pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Out1 pll_full_buffered1_0/pll_full_0/pd_0/UP 0.33fF +C853 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/tapered_buf_1/in 0.05fF +C854 ro_divider_buffered_0/tapered_buf_2/a_n10_230# ro_divider_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF +C855 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF +C856 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Q 0.05fF +C857 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF +C858 ro_divider_buffered_0/ro_complete_0/a4 ro_divider_buffered_0/ro_complete_0/a5 2.39fF +C859 ro_divider_buffered_0/tapered_buf_1/a_160_230# ro_divider_buffered_0/tapered_buf_1/a_160_n140# 0.17fF +C860 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_divider_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C861 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C862 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/tspc_r_1/Qbar 0.21fF +C863 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/R 0.01fF +C864 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF +C865 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF +C866 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_0/a_630_n680# 0.01fF +C867 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/tspc_0/Z2 0.23fF +C868 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C869 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_divider_buffered_0/divider_0/clk 1.30fF +C870 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF +C871 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF +C872 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Z2 0.30fF +C873 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.15fF +C874 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/and_0/B 0.78fF +C875 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF +C876 ro_divider_buffered_0/divider_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/nor_0/B 0.35fF +C877 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D ro_divider_buffered_0/divider_0/clk 0.29fF +C878 divider_buffered_0/divider_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/Out 0.04fF +C879 divider_buffered_0/divider_0/nor_0/B divider_buffered_0/divider_0/tspc_2/Z2 0.40fF +C880 pll_full_buffered1_0/pll_full_0/divider_0/and_0/out1 pll_full_buffered1_0/pll_full_0/divider_0/and_0/B 0.18fF +C881 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a4 0.12fF +C882 pll_full_buffered1_0/pll_full_0/ro_complete_0/a2 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF +C883 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF +C884 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_580_0# 0.35fF +C885 pll_full_buffered1_0/tapered_buf_0/a_n10_230# pll_full_buffered1_0/tapered_buf_0/a_n10_n140# 0.01fF +C886 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z2 0.11fF +C887 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C888 ro_divider_buffered_0/tapered_buf_5/a_210_n610# ro_divider_buffered_0/ro_complete_0/a3 26.29fF +C889 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.09fF +C890 div_pd_buffered_0/tapered_buf_4/a_4670_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 29.21fF +C891 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.45fF +C892 pll_full_buffered2_0/pll_full_0/ro_complete_0/a3 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF +C893 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z1 0.01fF +C894 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF +C895 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered1_0/pll_full_0/div 0.65fF +C896 div_pd_buffered_0/tapered_buf_2/a_1650_0# div_pd_buffered_0/tapered_buf_2/a_580_0# 1.27fF +C897 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z2 0.14fF +C898 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z4 0.00fF +C899 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT 0.14fF +C900 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/vco 0.51fF +C901 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z3 0.06fF +C902 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C903 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.03fF +C904 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B pll_full_buffered2_0/pll_full_0/divider_0/and_0/B 0.29fF +C905 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF +C906 ro_divider_buffered_0/ro_complete_0/cbank_0/v ro_divider_buffered_0/divider_0/clk 1.27fF +C907 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/nor_0/B 0.47fF +C908 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF +C909 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF +C910 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered1_0/pll_full_0/vco 0.11fF +C911 ro_divider_buffered_0/divider_0/and_0/out1 ro_divider_buffered_0/divider_0/and_0/A 0.01fF +C912 divider_buffered_0/divider_0/and_0/out1 divider_buffered_0/divider_0/and_0/Z1 0.36fF +C913 pll_full_buffered2_0/pll_full_0/ref pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 0.65fF +C914 ro_divider_buffered_0/tapered_buf_2/a_n10_n140# ro_divider_buffered_0/tapered_buf_2/in 0.04fF +C915 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_580_0# 0.35fF +C916 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.12fF +C917 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF +C918 ro_complete_buffered_0/tapered_buf_0/a_580_0# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 0.84fF +C919 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.84fF +C920 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF +C921 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C922 divider_buffered_0/tapered_buf_0/a_1650_0# divider_buffered_0/tapered_buf_0/a_580_0# 1.27fF +C923 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z4 0.02fF +C924 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/a_630_n680# 0.05fF +C925 div_pd_buffered_0/tapered_buf_0/a_160_230# div_pd_buffered_0/tapered_buf_0/a_160_n140# 0.17fF +C926 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z1 0.17fF +C927 divider_buffered_0/divider_0/prescaler_0/Out divider_buffered_0/divider_0/nor_1/A 0.15fF +C928 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF +C929 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF +C930 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF +C931 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z3 0.38fF +C932 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C933 pll_full_buffered1_0/tapered_buf_0/a_160_n140# pll_full_buffered1_0/tapered_buf_0/a_160_230# 0.17fF +C934 div_pd_buffered_0/tapered_buf_2/a_1650_0# div_pd_buffered_0/tapered_buf_2/a_210_n610# 2.89fF +C935 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/and_0/B 0.08fF +C936 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF +C937 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF +C938 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_buffered2_0/pll_full_0/vco 0.12fF +C939 pll_full_buffered1_0/tapered_buf_2/a_n10_230# pll_full_buffered1_0/pll_full_0/vco 0.02fF +C940 div_pd_buffered_0/pd_0/UP div_pd_buffered_0/tapered_buf_0/a_160_n140# 0.19fF +C941 div_pd_buffered_0/divider_0/tspc_0/Q div_pd_buffered_0/divider_0/tspc_1/Z1 0.01fF +C942 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF +C943 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C944 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered1_0/pll_full_0/vco 0.06fF +C945 divider_buffered_0/divider_0/tspc_1/Z1 divider_buffered_0/divider_0/tspc_0/Q 0.01fF +C946 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/in 0.02fF +C947 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/z5 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar1 0.20fF +C948 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar pll_full_buffered2_0/tapered_buf_2/in 0.02fF +C949 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_buffered2_0/pll_full_0/pd_0/R 0.30fF +C950 pll_full_buffered1_0/pll_full_0/pd_0/DOWN pll_full_buffered1_0/pll_full_0/pd_0/R 0.36fF +C951 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z1 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z2 0.71fF +C952 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z4 0.20fF +C953 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF +C954 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF +C955 ro_complete_buffered_0/tapered_buf_5/a_210_n610# ro_complete_buffered_0/ro_complete_0/a3 26.29fF +C956 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/tapered_buf_1/in 0.05fF +C957 divider_buffered_0/divider_0/tspc_1/Z1 divider_buffered_0/divider_0/tspc_1/Z4 0.00fF +C958 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF +C959 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF +C960 pll_full_buffered1_0/tapered_buf_0/a_1650_0# pll_full_buffered1_0/tapered_buf_0/a_4670_0# 4.78fF +C961 div_pd_buffered_0/pd_0/tspc_r_0/Z2 div_pd_buffered_0/pd_0/R 0.21fF +C962 divider_buffered_0/tapered_buf_1/a_160_n140# divider_buffered_0/tapered_buf_1/a_580_0# 0.35fF +C963 divider_buffered_0/tapered_buf_2/a_n10_n140# divider_buffered_0/tapered_buf_2/a_n10_230# 0.01fF +C964 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q 0.55fF +C965 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF +C966 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.05fF +C967 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B 0.22fF +C968 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF +C969 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF +C970 pll_full_0/pd_0/DOWN pll_full_0/cp_0/a_1710_0# 0.32fF +C971 div_pd_buffered_0/divider_0/tspc_0/Q div_pd_buffered_0/divider_0/tspc_1/Z2 0.14fF +C972 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/a_630_n680# 0.35fF +C973 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/vco 0.64fF +C974 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_160_230# 0.17fF +C975 ro_complete_buffered_0/tapered_buf_3/a_n10_n140# ro_complete_buffered_0/tapered_buf_3/in 0.04fF +C976 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_n10_230# 0.09fF +C977 filter_buffered_0/tapered_buf_0/a_580_0# filter_buffered_0/tapered_buf_0/a_1650_0# 1.27fF +C978 filter_buffered_0/tapered_buf_0/a_n10_230# filter_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF +C979 pll_full_buffered1_0/pll_full_0/div pll_full_buffered1_0/pll_full_0/vco 2.26fF +C980 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar 0.01fF +C981 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/in 0.02fF +C982 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C983 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C984 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a1 0.14fF +C985 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C986 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a3 0.09fF +C987 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C988 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/vco 0.45fF +C989 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_divider_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF +C990 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/and_pd_0/Z1 0.07fF +C991 divider_buffered_0/tapered_buf_1/a_n10_230# divider_buffered_0/divider_0/Out 0.02fF +C992 divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.16fF +C993 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF +C994 ro_divider_buffered_0/divider_0/tspc_1/Z1 ro_divider_buffered_0/divider_0/tspc_1/Z4 0.00fF +C995 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_divider_buffered_0/divider_0/clk 0.11fF +C996 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C997 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF +C998 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/div 0.04fF +C999 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z2 0.40fF +C1000 div_pd_buffered_0/tapered_buf_1/a_4670_0# div_pd_buffered_0/tapered_buf_1/a_1650_0# 4.78fF +C1001 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_1/Z4 0.02fF +C1002 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF +C1003 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/clk 0.64fF +C1004 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z4 0.02fF +C1005 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z2 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z3 0.16fF +C1006 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF +C1007 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/and_0/A 0.01fF +C1008 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF +C1009 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/B 0.18fF +C1010 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a3 0.13fF +C1011 pll_full_buffered1_0/tapered_buf_1/a_160_n140# pll_full_buffered1_0/tapered_buf_1/a_580_0# 0.35fF +C1012 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF +C1013 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/in 0.02fF +C1014 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.33fF +C1015 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF +C1016 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a1 3.18fF +C1017 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C1018 divider_buffered_0/divider_0/tspc_1/a_630_n680# divider_buffered_0/divider_0/tspc_1/Z3 0.05fF +C1019 divider_buffered_0/divider_0/tspc_0/Z4 divider_buffered_0/divider_0/nor_1/A 0.21fF +C1020 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.12fF +C1021 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C1022 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C1023 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/clk 0.01fF +C1024 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q 0.04fF +C1025 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z4 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z2 0.36fF +C1026 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF +C1027 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C1028 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_buffered2_0/pll_full_0/vco 0.01fF +C1029 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 ro_divider_buffered_0/divider_0/and_0/OUT 0.05fF +C1030 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z3 0.38fF +C1031 divider_buffered_0/tapered_buf_2/a_210_n610# divider_buffered_0/divider_0/clk 26.29fF +C1032 pll_full_buffered2_0/pll_full_0/divider_0/and_0/out1 pll_full_buffered2_0/pll_full_0/divider_0/and_0/Z1 0.36fF +C1033 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/and_0/B 0.31fF +C1034 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.01fF +C1035 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_1650_0# 1.27fF +C1036 divider_buffered_0/divider_0/tspc_1/Z1 divider_buffered_0/divider_0/tspc_1/Z2 1.07fF +C1037 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C1038 pll_full_buffered1_0/tapered_buf_1/a_160_n140# pll_full_buffered1_0/tapered_buf_1/a_210_n610# 0.22fF +C1039 pll_full_buffered1_0/tapered_buf_2/a_1650_0# pll_full_buffered1_0/tapered_buf_2/a_580_0# 1.27fF +C1040 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B 0.06fF +C1041 pll_full_buffered2_0/pll_full_0/cp_0/upbar pll_full_buffered2_0/tapered_buf_2/in 5.05fF +C1042 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/in 0.02fF +C1043 cp_buffered_0/tapered_buf_0/a_210_n610# cp_buffered_0/tapered_buf_0/a_1650_0# 2.89fF +C1044 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z4 0.15fF +C1045 ro_complete_buffered_0/tapered_buf_1/a_160_n140# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.35fF +C1046 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF +C1047 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/DOWN 0.02fF +C1048 pll_full_buffered2_0/tapered_buf_5/a_1650_0# pll_full_buffered2_0/tapered_buf_5/a_210_n610# 2.89fF +C1049 ro_divider_buffered_0/tapered_buf_0/a_210_n610# ro_divider_buffered_0/tapered_buf_0/a_4670_0# 29.21fF +C1050 ro_divider_buffered_0/ro_complete_0/a0 ro_divider_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C1051 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.01fF +C1052 div_pd_buffered_0/divider_0/tspc_0/Q div_pd_buffered_0/divider_0/tspc_1/a_630_n680# 0.01fF +C1053 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v pll_full_buffered2_0/pll_full_0/vco 1.36fF +C1054 ro_divider_buffered_0/divider_0/tspc_1/Q ro_divider_buffered_0/divider_0/tspc_2/a_630_n680# 0.01fF +C1055 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.32fF +C1056 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/clk 0.01fF +C1057 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF +C1058 divider_buffered_0/divider_0/prescaler_0/tspc_2/Q divider_buffered_0/divider_0/prescaler_0/nand_1/z1 0.01fF +C1059 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/clk 0.04fF +C1060 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z3 0.05fF +C1061 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z1 0.03fF +C1062 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_1650_0# 1.27fF +C1063 pll_full_buffered2_0/tapered_buf_1/a_n10_n140# pll_full_buffered2_0/tapered_buf_1/in 0.04fF +C1064 pll_full_buffered2_0/tapered_buf_1/a_210_n610# pll_full_buffered2_0/tapered_buf_1/out 26.29fF +C1065 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF +C1066 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.35fF +C1067 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF +C1068 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1069 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_divider_buffered_0/ro_complete_0/a1 0.14fF +C1070 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF +C1071 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.11fF +C1072 filter_buffered_0/tapered_buf_1/a_210_n610# filter_buffered_0/tapered_buf_1/a_1650_0# 2.89fF +C1073 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/tspc_1/Z2 0.15fF +C1074 ro_divider_buffered_0/divider_0/nor_1/Z1 ro_divider_buffered_0/divider_0/and_0/B 0.18fF +C1075 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF +C1076 ro_divider_buffered_0/tapered_buf_2/a_210_n610# ro_divider_buffered_0/tapered_buf_2/a_580_0# 0.84fF +C1077 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF +C1078 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/clk 0.04fF +C1079 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF +C1080 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z3 0.06fF +C1081 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Q 0.51fF +C1082 ro_divider_buffered_0/divider_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/tspc_2/Z2 0.01fF +C1083 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z3 0.05fF +C1084 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C1085 pll_full_buffered1_0/pll_full_0/ro_complete_0/a0 pll_full_buffered1_0/pll_full_0/vco 0.11fF +C1086 divider_buffered_0/divider_0/tspc_2/Z1 divider_buffered_0/divider_0/tspc_2/Z3 0.06fF +C1087 divider_buffered_0/divider_0/nor_0/B divider_buffered_0/divider_0/Out 0.44fF +C1088 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/out 0.61fF +C1089 pll_full_buffered1_0/pll_full_0/divider_0/and_0/A pll_full_buffered1_0/pll_full_0/divider_0/and_0/B 0.18fF +C1090 pll_full_buffered1_0/pll_full_0/ro_complete_0/a2 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF +C1091 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_1650_0# 1.27fF +C1092 divider_buffered_0/tapered_buf_2/a_580_0# divider_buffered_0/tapered_buf_2/a_210_n610# 0.84fF +C1093 pll_full_buffered2_0/tapered_buf_0/a_n10_n140# pll_full_buffered2_0/tapered_buf_0/in 0.04fF +C1094 pll_full_buffered2_0/tapered_buf_0/a_210_n610# pll_full_buffered2_0/tapered_buf_0/out 26.29fF +C1095 pll_full_buffered2_0/tapered_buf_3/a_160_n140# pll_full_buffered2_0/pll_full_0/div 0.19fF +C1096 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF +C1097 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF +C1098 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C1099 pll_full_buffered2_0/pll_full_0/ro_complete_0/a3 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF +C1100 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1101 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z3 0.45fF +C1102 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/vco 0.45fF +C1103 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/z5 0.04fF +C1104 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/tapered_buf_4/a_n10_n140# 0.01fF +C1105 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/tspc_2/Z4 0.02fF +C1106 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C1107 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF +C1108 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_buffered2_0/pll_full_0/vco 1.46fF +C1109 ro_divider_buffered_0/divider_0/nor_0/Z1 ro_divider_buffered_0/divider_0/nor_1/B 0.18fF +C1110 ro_divider_buffered_0/ro_complete_0/a4 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF +C1111 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/UP 0.45fF +C1112 ro_divider_buffered_0/tapered_buf_0/a_n10_n140# ro_divider_buffered_0/tapered_buf_0/in 0.04fF +C1113 ro_divider_buffered_0/divider_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/tspc_1/Z2 0.01fF +C1114 ro_divider_buffered_0/divider_0/tspc_0/a_630_n680# ro_divider_buffered_0/divider_0/tspc_0/Z2 0.01fF +C1115 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF +C1116 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF +C1117 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/z5 0.03fF +C1118 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_2/Z2 0.20fF +C1119 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/Z3 0.16fF +C1120 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.15fF +C1121 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/prescaler_0/nand_0/z1 0.01fF +C1122 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF +C1123 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_1650_0# 1.27fF +C1124 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF +C1125 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C1126 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C1127 divider_buffered_0/tapered_buf_1/a_160_230# divider_buffered_0/tapered_buf_1/a_160_n140# 0.17fF +C1128 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z4 0.65fF +C1129 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF +C1130 pll_full_0/ro_complete_0/a4 pll_full_0/vco 0.01fF +C1131 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF +C1132 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# divider_buffered_0/divider_0/clk 0.01fF +C1133 pll_full_buffered2_0/pll_full_0/ro_complete_0/a4 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C1134 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered2_0/pll_full_0/div 0.12fF +C1135 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF +C1136 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z4 0.22fF +C1137 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.25fF +C1138 cp_buffered_0/tapered_buf_1/a_4670_0# cp_buffered_0/tapered_buf_1/a_1650_0# 4.78fF +C1139 pll_full_buffered1_0/tapered_buf_0/a_160_n140# pll_full_buffered1_0/tapered_buf_0/a_n10_n140# 0.05fF +C1140 pll_full_buffered1_0/tapered_buf_0/a_580_0# pll_full_buffered1_0/tapered_buf_0/a_210_n610# 0.84fF +C1141 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z3 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z4 0.65fF +C1142 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C1143 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF +C1144 ro_divider_buffered_0/ro_complete_0/a3 ro_divider_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C1145 pll_full_buffered1_0/pll_full_0/cp_0/a_10_n50# pll_full_buffered1_0/pll_full_0/cp_0/vbias 0.19fF +C1146 div_pd_buffered_0/divider_0/tspc_0/Q div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.04fF +C1147 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/nor_1/A 0.15fF +C1148 ro_divider_buffered_0/divider_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/nor_0/B 0.00fF +C1149 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q 0.05fF +C1150 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF +C1151 pll_full_buffered1_0/pll_full_0/cp_0/a_10_n50# pll_full_buffered1_0/pll_full_0/cp_0/a_1710_0# 0.04fF +C1152 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/clk 0.04fF +C1153 pll_full_buffered2_0/tapered_buf_1/a_580_0# pll_full_buffered2_0/tapered_buf_1/a_160_230# 0.02fF +C1154 pll_full_buffered2_0/tapered_buf_1/a_160_n140# pll_full_buffered2_0/tapered_buf_1/a_210_n610# 0.22fF +C1155 pll_full_buffered2_0/tapered_buf_5/a_210_n610# pll_full_buffered2_0/pll_full_0/ref 26.29fF +C1156 filter_buffered_0/tapered_buf_0/a_1650_0# filter_buffered_0/tapered_buf_0/a_210_n610# 2.89fF +C1157 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_1650_0# 2.89fF +C1158 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/div 0.03fF +C1159 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered1_0/pll_full_0/divider_0/and_0/out1 0.31fF +C1160 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_buffered1_0/pll_full_0/vco 0.26fF +C1161 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C1162 ro_divider_buffered_0/tapered_buf_3/a_n10_n140# ro_divider_buffered_0/tapered_buf_3/in 0.04fF +C1163 pll_full_buffered1_0/pll_full_0/ro_complete_0/a2 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C1164 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/z5 0.20fF +C1165 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/nor_1/A 0.15fF +C1166 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF +C1167 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF +C1168 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C1169 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 2.89fF +C1170 ro_complete_buffered_0/tapered_buf_1/a_160_n140# ro_complete_buffered_0/tapered_buf_1/in 0.19fF +C1171 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C1172 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF +C1173 ro_complete_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_2/in 0.19fF +C1174 divider_buffered_0/tapered_buf_0/a_n10_n140# divider_buffered_0/tapered_buf_0/a_160_n140# 0.05fF +C1175 pll_full_buffered2_0/pll_full_0/filter_0/a_4216_n5230# pll_full_buffered2_0/pll_full_0/vco 1.58fF +C1176 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z1 0.03fF +C1177 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C1178 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF +C1179 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z3 0.65fF +C1180 pll_full_buffered1_0/pll_full_0/ro_complete_0/a5 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF +C1181 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C1182 pll_full_buffered1_0/tapered_buf_0/in pll_full_buffered1_0/tapered_buf_0/a_n10_n140# 0.04fF +C1183 divider_buffered_0/divider_0/nor_1/Z1 divider_buffered_0/divider_0/and_0/B 0.18fF +C1184 divider_buffered_0/divider_0/mc2 divider_buffered_0/divider_0/nor_0/B 0.15fF +C1185 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z2 0.14fF +C1186 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF +C1187 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered2_0/pll_full_0/vco 0.11fF +C1188 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/mc2 0.06fF +C1189 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C1190 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.13fF +C1191 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C1192 pll_full_buffered2_0/tapered_buf_5/a_n10_230# pll_full_buffered2_0/tapered_buf_5/a_160_230# 0.09fF +C1193 pll_full_buffered2_0/tapered_buf_5/a_4670_0# pll_full_buffered2_0/tapered_buf_5/a_210_n610# 29.21fF +C1194 filter_buffered_0/tapered_buf_0/a_160_n140# filter_buffered_0/tapered_buf_0/a_160_230# 0.17fF +C1195 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z3 0.45fF +C1196 pll_full_buffered1_0/pll_full_0/ro_complete_0/a3 pll_full_buffered1_0/pll_full_0/vco 0.11fF +C1197 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z3 0.05fF +C1198 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z1 0.03fF +C1199 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/and_0/B 0.08fF +C1200 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 divider_buffered_0/divider_0/clk 0.11fF +C1201 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF +C1202 divider_buffered_0/tapered_buf_2/a_1650_0# divider_buffered_0/tapered_buf_2/a_210_n610# 2.89fF +C1203 pll_full_buffered2_0/tapered_buf_0/a_580_0# pll_full_buffered2_0/tapered_buf_0/a_160_230# 0.02fF +C1204 pll_full_buffered2_0/tapered_buf_0/a_160_n140# pll_full_buffered2_0/tapered_buf_0/a_210_n610# 0.22fF +C1205 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z1 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z2 0.71fF +C1206 div_pd_buffered_0/tapered_buf_3/a_160_230# div_pd_buffered_0/tapered_buf_3/a_580_0# 0.02fF +C1207 ro_divider_buffered_0/tapered_buf_4/a_n10_n140# ro_divider_buffered_0/tapered_buf_4/in 0.04fF +C1208 divider_buffered_0/divider_0/prescaler_0/Out divider_buffered_0/divider_0/tspc_0/Z2 0.11fF +C1209 pll_full_buffered2_0/tapered_buf_2/in pll_full_buffered2_0/pll_full_0/cp_0/a_1710_0# 0.32fF +C1210 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z4 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/z5 0.04fF +C1211 pll_full_buffered2_0/tapered_buf_2/a_n10_230# pll_full_buffered2_0/tapered_buf_2/a_160_230# 0.09fF +C1212 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a1 0.14fF +C1213 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/vco 0.12fF +C1214 divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# divider_buffered_0/divider_0/prescaler_0/nand_0/z1 0.07fF +C1215 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.20fF +C1216 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.04fF +C1217 ro_divider_buffered_0/ro_complete_0/a3 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.21fF +C1218 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/and_pd_0/Out1 0.33fF +C1219 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF +C1220 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z3 0.06fF +C1221 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B pll_full_buffered2_0/pll_full_0/div 0.27fF +C1222 ro_divider_buffered_0/tapered_buf_0/a_160_230# ro_divider_buffered_0/tapered_buf_0/a_580_0# 0.02fF +C1223 ro_divider_buffered_0/divider_0/tspc_0/Q ro_divider_buffered_0/divider_0/tspc_1/Z2 0.14fF +C1224 ro_divider_buffered_0/divider_0/tspc_0/Z1 ro_divider_buffered_0/divider_0/tspc_0/Z4 0.00fF +C1225 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_divider_buffered_0/divider_0/and_0/OUT 0.14fF +C1226 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/clk 0.51fF +C1227 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Z3 0.05fF +C1228 pll_full_buffered2_0/tapered_buf_5/a_n10_230# pll_full_buffered2_0/tapered_buf_5/in 0.02fF +C1229 pll_full_buffered2_0/tapered_buf_3/a_580_0# pll_full_buffered2_0/tapered_buf_3/a_1650_0# 1.27fF +C1230 ro_divider_buffered_0/divider_0/nor_0/B ro_divider_buffered_0/divider_0/and_0/B 0.29fF +C1231 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z2 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z4 0.36fF +C1232 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z3 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q 0.05fF +C1233 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF +C1234 div_pd_buffered_0/divider_0/and_0/A div_pd_buffered_0/divider_0/and_0/B 0.18fF +C1235 divider_buffered_0/divider_0/tspc_0/Q divider_buffered_0/divider_0/tspc_1/a_630_n680# 0.01fF +C1236 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF +C1237 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/div 0.12fF +C1238 pll_full_buffered2_0/tapered_buf_4/a_580_0# pll_full_buffered2_0/tapered_buf_4/a_1650_0# 1.27fF +C1239 ro_divider_buffered_0/tapered_buf_5/a_n10_n140# ro_divider_buffered_0/tapered_buf_5/in 0.04fF +C1240 cp_buffered_0/tapered_buf_0/a_n10_n140# cp_buffered_0/tapered_buf_0/a_160_n140# 0.05fF +C1241 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 2.89fF +C1242 ro_complete_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.17fF +C1243 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF +C1244 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.05fF +C1245 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.08fF +C1246 pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Out1 pll_full_buffered2_0/pll_full_0/pd_0/UP 0.33fF +C1247 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C1248 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF +C1249 divider_buffered_0/divider_0/tspc_1/a_630_n680# divider_buffered_0/divider_0/tspc_1/Z4 0.12fF +C1250 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF +C1251 pll_full_buffered2_0/pll_full_0/ro_complete_0/a5 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF +C1252 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/vco 0.60fF +C1253 divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# divider_buffered_0/divider_0/clk 0.01fF +C1254 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF +C1255 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_divider_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF +C1256 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z4 pll_full_buffered1_0/pll_full_0/ref 0.02fF +C1257 pll_full_0/pd_0/DOWN pll_full_0/cp_0/upbar 0.04fF +C1258 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/R 0.03fF +C1259 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z2 0.11fF +C1260 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1261 ro_divider_buffered_0/tapered_buf_1/a_160_n140# ro_divider_buffered_0/tapered_buf_1/a_n10_n140# 0.05fF +C1262 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/and_0/B 0.08fF +C1263 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.09fF +C1264 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.20fF +C1265 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 ro_divider_buffered_0/divider_0/clk 0.12fF +C1266 io_clamp_high[0] io_analog[4] 0.53fF +C1267 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.24fF +C1268 cp_buffered_0/tapered_buf_2/a_580_0# cp_buffered_0/tapered_buf_2/a_1650_0# 1.27fF +C1269 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z1 0.01fF +C1270 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_n10_n140# 0.05fF +C1271 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_4670_0# 4.78fF +C1272 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.17fF +C1273 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z2 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z4 0.14fF +C1274 ro_divider_buffered_0/tapered_buf_3/a_580_0# ro_divider_buffered_0/tapered_buf_3/a_160_230# 0.02fF +C1275 ro_divider_buffered_0/tapered_buf_3/a_160_n140# ro_divider_buffered_0/tapered_buf_3/a_210_n610# 0.22fF +C1276 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF +C1277 pll_full_buffered2_0/tapered_buf_4/a_160_n140# pll_full_buffered2_0/tapered_buf_4/a_n10_n140# 0.05fF +C1278 pll_full_buffered2_0/tapered_buf_4/a_580_0# pll_full_buffered2_0/tapered_buf_4/a_210_n610# 0.84fF +C1279 ro_divider_buffered_0/tapered_buf_6/a_n10_n140# ro_divider_buffered_0/tapered_buf_6/in 0.04fF +C1280 div_pd_buffered_0/tapered_buf_2/a_210_n610# div_pd_buffered_0/divider_0/mc2 26.29fF +C1281 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/tapered_buf_1/in 0.05fF +C1282 pll_full_buffered1_0/tapered_buf_2/a_160_n140# pll_full_buffered1_0/tapered_buf_2/a_n10_n140# 0.05fF +C1283 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF +C1284 pll_full_0/ro_complete_0/a1 pll_full_0/vco 0.11fF +C1285 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/tspc_1/Q 0.51fF +C1286 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C1287 pll_full_buffered2_0/pll_full_0/ro_complete_0/a1 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C1288 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z2 pll_full_buffered1_0/pll_full_0/ref 0.19fF +C1289 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/tspc_0/Q 0.55fF +C1290 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/tapered_buf_1/a_4670_0# 29.21fF +C1291 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z2 0.11fF +C1292 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z4 0.02fF +C1293 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.05fF +C1294 divider_buffered_0/divider_0/prescaler_0/tspc_0/D divider_buffered_0/divider_0/prescaler_0/nand_1/z1 0.21fF +C1295 ro_divider_buffered_0/divider_0/tspc_1/Q ro_divider_buffered_0/divider_0/nor_0/B 0.22fF +C1296 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q ro_divider_buffered_0/divider_0/prescaler_0/nand_1/z1 0.22fF +C1297 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.04fF +C1298 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/R 0.21fF +C1299 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/out1 0.31fF +C1300 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D div_pd_buffered_0/divider_0/clk 0.26fF +C1301 divider_buffered_0/tapered_buf_2/in divider_buffered_0/tapered_buf_2/a_n10_230# 0.02fF +C1302 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z4 0.12fF +C1303 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z2 1.07fF +C1304 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z3 0.38fF +C1305 div_pd_buffered_0/tapered_buf_3/a_160_230# div_pd_buffered_0/tapered_buf_3/a_n10_230# 0.09fF +C1306 div_pd_buffered_0/tapered_buf_3/a_210_n610# div_pd_buffered_0/tapered_buf_3/a_4670_0# 29.21fF +C1307 ro_complete_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_5/a_4670_0# 4.78fF +C1308 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.17fF +C1309 divider_buffered_0/divider_0/tspc_0/Z4 divider_buffered_0/divider_0/tspc_0/Z2 0.36fF +C1310 pll_full_buffered2_0/tapered_buf_2/in pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF +C1311 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered2_0/pll_full_0/pd_0/R 0.01fF +C1312 ro_divider_buffered_0/tapered_buf_4/a_580_0# ro_divider_buffered_0/tapered_buf_4/a_160_230# 0.02fF +C1313 ro_divider_buffered_0/tapered_buf_4/a_160_n140# ro_divider_buffered_0/tapered_buf_4/a_210_n610# 0.22fF +C1314 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/a_n10_230# 0.01fF +C1315 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF +C1316 pll_full_buffered2_0/tapered_buf_4/a_n10_230# pll_full_buffered2_0/tapered_buf_4/a_n10_n140# 0.01fF +C1317 ro_divider_buffered_0/tapered_buf_7/a_n10_n140# ro_divider_buffered_0/tapered_buf_7/in 0.04fF +C1318 cp_buffered_0/tapered_buf_0/a_160_230# cp_buffered_0/tapered_buf_0/a_n10_230# 0.09fF +C1319 cp_buffered_0/tapered_buf_0/a_210_n610# cp_buffered_0/tapered_buf_0/a_4670_0# 29.21fF +C1320 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_divider_buffered_0/ro_complete_0/a1 0.14fF +C1321 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_divider_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C1322 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_divider_buffered_0/ro_complete_0/a3 0.09fF +C1323 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/tspc_r_1/z5 0.03fF +C1324 div_pd_buffered_0/pd_0/tspc_r_1/Z2 div_pd_buffered_0/pd_0/R 0.21fF +C1325 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/UP 0.03fF +C1326 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.15fF +C1327 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z4 0.21fF +C1328 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C1329 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF +C1330 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B 0.06fF +C1331 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/in 0.04fF +C1332 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF +C1333 pll_full_buffered1_0/pll_full_0/ro_complete_0/a3 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF +C1334 divider_buffered_0/divider_0/mc2 divider_buffered_0/divider_0/and_0/B 0.20fF +C1335 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered2_0/pll_full_0/divider_0/and_0/B 0.01fF +C1336 ro_divider_buffered_0/divider_0/tspc_0/Q ro_divider_buffered_0/divider_0/tspc_1/a_630_n680# 0.01fF +C1337 pll_full_0/pd_0/DOWN pll_full_0/pd_0/R 0.36fF +C1338 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/out1 0.06fF +C1339 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z4 0.00fF +C1340 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z4 0.12fF +C1341 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF +C1342 divider_buffered_0/divider_0/tspc_2/Z1 divider_buffered_0/divider_0/tspc_2/Z4 0.00fF +C1343 pll_full_buffered2_0/tapered_buf_2/a_580_0# pll_full_buffered2_0/tapered_buf_2/a_1650_0# 1.27fF +C1344 ro_divider_buffered_0/divider_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/Out 0.04fF +C1345 ro_divider_buffered_0/divider_0/nor_0/B ro_divider_buffered_0/divider_0/tspc_2/Z2 0.40fF +C1346 pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Z1 pll_full_buffered1_0/pll_full_0/pd_0/DOWN 0.07fF +C1347 divider_buffered_0/divider_0/tspc_1/Z2 divider_buffered_0/divider_0/tspc_1/a_630_n680# 0.01fF +C1348 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF +C1349 pll_full_buffered1_0/pll_full_0/ro_complete_0/a2 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF +C1350 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a4 0.09fF +C1351 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a5 0.09fF +C1352 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF +C1353 div_pd_buffered_0/tapered_buf_3/a_4670_0# div_pd_buffered_0/tapered_buf_3/a_1650_0# 4.78fF +C1354 div_pd_buffered_0/tapered_buf_3/a_160_230# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.17fF +C1355 ro_complete_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_6/a_4670_0# 4.78fF +C1356 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.17fF +C1357 ro_divider_buffered_0/tapered_buf_5/a_580_0# ro_divider_buffered_0/tapered_buf_5/a_160_230# 0.02fF +C1358 ro_divider_buffered_0/tapered_buf_5/a_160_n140# ro_divider_buffered_0/tapered_buf_5/a_210_n610# 0.22fF +C1359 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF +C1360 ro_divider_buffered_0/tapered_buf_8/a_n10_n140# ro_divider_buffered_0/tapered_buf_8/in 0.04fF +C1361 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/a0 0.13fF +C1362 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z4 0.15fF +C1363 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/vco 0.12fF +C1364 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_divider_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C1365 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z1 pll_full_buffered1_0/pll_full_0/div 0.17fF +C1366 pll_full_0/ref pll_full_0/pd_0/R 0.61fF +C1367 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_1/B 0.06fF +C1368 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z3 0.45fF +C1369 divider_buffered_0/tapered_buf_2/a_4670_0# divider_buffered_0/tapered_buf_2/a_210_n610# 29.21fF +C1370 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF +C1371 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C1372 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C1373 divider_buffered_0/tapered_buf_0/a_210_n610# divider_buffered_0/tapered_buf_0/a_1650_0# 2.89fF +C1374 divider_buffered_0/tapered_buf_2/a_160_n140# divider_buffered_0/tapered_buf_2/a_160_230# 0.17fF +C1375 ro_divider_buffered_0/divider_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/tspc_1/Q 0.04fF +C1376 ro_divider_buffered_0/divider_0/tspc_0/Z4 ro_divider_buffered_0/divider_0/tspc_0/Z2 0.36fF +C1377 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF +C1378 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C1379 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_divider_buffered_0/divider_0/clk 0.01fF +C1380 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/Z4 0.36fF +C1381 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/Q 0.05fF +C1382 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.05fF +C1383 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C1384 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_buffered1_0/pll_full_0/vco 0.45fF +C1385 ro_divider_buffered_0/divider_0/and_0/out1 ro_divider_buffered_0/divider_0/and_0/Z1 0.36fF +C1386 divider_buffered_0/divider_0/tspc_1/Z1 divider_buffered_0/divider_0/nor_1/B 0.03fF +C1387 pll_full_buffered2_0/pll_full_0/ref pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z1 0.17fF +C1388 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z4 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/z5 0.04fF +C1389 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C1390 div_pd_buffered_0/tapered_buf_3/a_n10_230# div_pd_buffered_0/tapered_buf_3/in 0.02fF +C1391 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.35fF +C1392 ro_complete_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_7/a_4670_0# 4.78fF +C1393 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.17fF +C1394 pll_full_buffered2_0/tapered_buf_4/a_160_n140# pll_full_buffered2_0/tapered_buf_4/a_210_n610# 0.22fF +C1395 ro_divider_buffered_0/tapered_buf_6/a_580_0# ro_divider_buffered_0/tapered_buf_6/a_160_230# 0.02fF +C1396 ro_divider_buffered_0/tapered_buf_6/a_160_n140# ro_divider_buffered_0/tapered_buf_6/a_210_n610# 0.22fF +C1397 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF +C1398 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C1399 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z2 0.30fF +C1400 ro_divider_buffered_0/tapered_buf_7/a_210_n610# ro_divider_buffered_0/ro_complete_0/a1 26.29fF +C1401 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/tspc_r_0/Qbar 0.01fF +C1402 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z3 0.45fF +C1403 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF +C1404 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF +C1405 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/div 0.05fF +C1406 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C1407 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF +C1408 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF +C1409 pll_full_buffered1_0/pll_full_0/pd_0/R pll_full_buffered1_0/pll_full_0/ref 0.61fF +C1410 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered2_0/pll_full_0/vco 0.01fF +C1411 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_580_0# 0.02fF +C1412 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/a_160_n140# 0.05fF +C1413 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF +C1414 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_1650_0# 2.89fF +C1415 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/and_0/out1 0.31fF +C1416 ro_divider_buffered_0/ro_complete_0/cbank_2/v ro_divider_buffered_0/divider_0/clk 1.36fF +C1417 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z1 0.01fF +C1418 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C1419 pll_full_buffered2_0/tapered_buf_1/a_1650_0# pll_full_buffered2_0/tapered_buf_1/a_210_n610# 2.89fF +C1420 pll_full_0/pd_0/and_pd_0/Z1 pll_full_0/pd_0/UP 0.06fF +C1421 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z2 pll_full_buffered2_0/pll_full_0/pd_0/R 0.21fF +C1422 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C1423 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C1424 div_pd_buffered_0/tapered_buf_3/a_160_n140# div_pd_buffered_0/tapered_buf_3/in 0.19fF +C1425 ro_divider_buffered_0/tapered_buf_7/a_580_0# ro_divider_buffered_0/tapered_buf_7/a_160_230# 0.02fF +C1426 ro_divider_buffered_0/tapered_buf_7/a_160_n140# ro_divider_buffered_0/tapered_buf_7/a_210_n610# 0.22fF +C1427 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/tapered_buf_1/in 0.05fF +C1428 pll_full_buffered1_0/pll_full_0/filter_0/a_4216_n5230# pll_full_buffered1_0/pll_full_0/vco 1.58fF +C1429 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/nor_0/B 0.47fF +C1430 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C1431 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/vco 0.14fF +C1432 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.38fF +C1433 divider_buffered_0/divider_0/prescaler_0/Out divider_buffered_0/divider_0/clk 0.51fF +C1434 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF +C1435 pll_full_buffered1_0/tapered_buf_2/a_n10_230# pll_full_buffered1_0/tapered_buf_2/a_160_230# 0.09fF +C1436 ro_divider_buffered_0/tapered_buf_0/a_160_n140# ro_divider_buffered_0/tapered_buf_0/a_580_0# 0.35fF +C1437 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/tspc_0/a_630_n680# 0.35fF +C1438 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.91fF +C1439 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1440 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/tspc_2/Z3 0.05fF +C1441 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF +C1442 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.03fF +C1443 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF +C1444 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z4 0.15fF +C1445 pll_full_buffered2_0/tapered_buf_5/a_n10_230# pll_full_buffered2_0/tapered_buf_5/a_n10_n140# 0.01fF +C1446 filter_buffered_0/tapered_buf_0/a_580_0# filter_buffered_0/tapered_buf_0/a_210_n610# 0.84fF +C1447 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z4 0.12fF +C1448 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z2 1.07fF +C1449 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z3 0.38fF +C1450 div_pd_buffered_0/tapered_buf_3/a_210_n610# div_pd_buffered_0/tapered_buf_3/a_1650_0# 2.89fF +C1451 pll_full_buffered2_0/tapered_buf_0/a_1650_0# pll_full_buffered2_0/tapered_buf_0/a_210_n610# 2.89fF +C1452 pll_full_buffered1_0/tapered_buf_2/a_160_n140# pll_full_buffered1_0/tapered_buf_2/a_210_n610# 0.22fF +C1453 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF +C1454 pll_full_buffered2_0/tapered_buf_2/in pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Z1 0.07fF +C1455 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF +C1456 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/nor_1/B 1.21fF +C1457 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF +C1458 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C1459 pll_full_buffered2_0/pll_full_0/ro_complete_0/a4 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF +C1460 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C1461 ro_divider_buffered_0/tapered_buf_8/a_580_0# ro_divider_buffered_0/tapered_buf_8/a_160_230# 0.02fF +C1462 ro_divider_buffered_0/tapered_buf_8/a_160_n140# ro_divider_buffered_0/tapered_buf_8/a_210_n610# 0.22fF +C1463 ro_divider_buffered_0/ro_complete_0/a3 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF +C1464 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_divider_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1465 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C1466 ro_complete_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_2/a_210_n610# 0.22fF +C1467 divider_buffered_0/tapered_buf_1/a_210_n610# divider_buffered_0/tapered_buf_1/a_580_0# 0.84fF +C1468 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C1469 divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.38fF +C1470 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/and_0/B 0.78fF +C1471 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_buffered2_0/pll_full_0/vco 1.46fF +C1472 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C1473 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.16fF +C1474 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_2/vin ro_divider_buffered_0/divider_0/clk 1.30fF +C1475 pll_full_buffered1_0/tapered_buf_0/a_1650_0# pll_full_buffered1_0/tapered_buf_0/a_580_0# 1.27fF +C1476 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Z4 0.12fF +C1477 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF +C1478 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 divider_buffered_0/divider_0/clk 0.11fF +C1479 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z4 0.00fF +C1480 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF +C1481 ro_divider_buffered_0/tapered_buf_2/a_160_n140# ro_divider_buffered_0/tapered_buf_2/a_n10_n140# 0.05fF +C1482 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C1483 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# divider_buffered_0/divider_0/prescaler_0/Out 0.21fF +C1484 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_buffered1_0/pll_full_0/vco 1.46fF +C1485 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.12fF +C1486 cp_buffered_0/tapered_buf_0/a_n10_n140# cp_buffered_0/tapered_buf_0/in 0.04fF +C1487 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/a_630_n680# 0.35fF +C1488 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a3 2.04fF +C1489 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.22fF +C1490 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/in 0.04fF +C1491 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1492 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF +C1493 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/vco 0.05fF +C1494 div_pd_buffered_0/tapered_buf_3/a_210_n610# div_pd_buffered_0/divider_0/clk 26.29fF +C1495 ro_divider_buffered_0/ro_complete_0/a4 ro_divider_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C1496 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z4 0.00fF +C1497 divider_buffered_0/tapered_buf_1/a_160_n140# divider_buffered_0/divider_0/Out 0.20fF +C1498 divider_buffered_0/tapered_buf_1/a_210_n610# divider_buffered_0/tapered_buf_1/a_4670_0# 29.21fF +C1499 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF +C1500 divider_buffered_0/tapered_buf_2/a_160_n140# divider_buffered_0/tapered_buf_2/a_n10_n140# 0.05fF +C1501 ro_divider_buffered_0/divider_0/tspc_1/Z3 ro_divider_buffered_0/divider_0/tspc_1/Z4 0.65fF +C1502 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C1503 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C1504 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/clk 0.45fF +C1505 divider_buffered_0/divider_0/tspc_1/Q divider_buffered_0/divider_0/tspc_2/Z1 0.01fF +C1506 cp_buffered_0/tapered_buf_0/in cp_buffered_0/tapered_buf_0/a_n10_230# 0.02fF +C1507 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z3 0.45fF +C1508 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_buffered1_0/pll_full_0/vco 0.45fF +C1509 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_n10_n140# 0.05fF +C1510 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 0.84fF +C1511 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF +C1512 ro_divider_buffered_0/tapered_buf_3/a_1650_0# ro_divider_buffered_0/tapered_buf_3/a_210_n610# 2.89fF +C1513 pll_full_buffered2_0/pll_full_0/ref pll_full_buffered2_0/tapered_buf_2/in 0.32fF +C1514 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered1_0/pll_full_0/pd_0/DOWN 0.03fF +C1515 divider_buffered_0/tapered_buf_2/a_160_n140# divider_buffered_0/tapered_buf_2/a_580_0# 0.35fF +C1516 divider_buffered_0/tapered_buf_0/in divider_buffered_0/tapered_buf_0/a_160_n140# 0.19fF +C1517 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1518 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/a0 3.46fF +C1519 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF +C1520 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C1521 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C1522 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_1/Z1 0.03fF +C1523 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_2/vin ro_divider_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C1524 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_1650_0# 1.27fF +C1525 ro_divider_buffered_0/divider_0/tspc_1/Q ro_divider_buffered_0/divider_0/tspc_2/Z2 0.14fF +C1526 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q ro_divider_buffered_0/divider_0/prescaler_0/nand_1/z1 0.01fF +C1527 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 ro_divider_buffered_0/divider_0/clk 0.11fF +C1528 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z4 0.65fF +C1529 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF +C1530 pll_full_buffered1_0/pll_full_0/ro_complete_0/a4 pll_full_buffered1_0/pll_full_0/vco 0.01fF +C1531 pll_full_buffered1_0/tapered_buf_1/a_580_0# pll_full_buffered1_0/tapered_buf_1/a_210_n610# 0.84fF +C1532 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z2 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z3 0.16fF +C1533 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z4 0.22fF +C1534 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_n10_n140# 0.05fF +C1535 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 0.84fF +C1536 pll_full_buffered1_0/pll_full_0/pd_0/R pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar 0.03fF +C1537 pll_full_buffered1_0/tapered_buf_1/a_1650_0# pll_full_buffered1_0/tapered_buf_1/a_4670_0# 4.78fF +C1538 ro_divider_buffered_0/tapered_buf_4/a_1650_0# ro_divider_buffered_0/tapered_buf_4/a_210_n610# 2.89fF +C1539 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Z1 0.02fF +C1540 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/z5 0.11fF +C1541 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF +C1542 pll_full_buffered2_0/pll_full_0/ro_complete_0/a4 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF +C1543 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.31fF +C1544 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF +C1545 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C1546 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/in 0.19fF +C1547 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF +C1548 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF +C1549 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_divider_buffered_0/ro_complete_0/a3 0.13fF +C1550 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_divider_buffered_0/ro_complete_0/a1 0.14fF +C1551 div_pd_buffered_0/tapered_buf_0/a_210_n610# div_pd_buffered_0/tapered_buf_0/a_4670_0# 29.21fF +C1552 div_pd_buffered_0/pd_0/tspc_r_1/Z2 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.14fF +C1553 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A 0.15fF +C1554 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a0 0.09fF +C1555 ro_divider_buffered_0/divider_0/tspc_0/Q ro_divider_buffered_0/divider_0/tspc_0/a_630_n680# 0.04fF +C1556 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/tapered_buf_1/a_1650_0# 2.89fF +C1557 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/A 0.16fF +C1558 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/and_0/OUT 0.14fF +C1559 ro_divider_buffered_0/divider_0/tspc_2/Z1 ro_divider_buffered_0/divider_0/tspc_2/Z3 0.06fF +C1560 ro_divider_buffered_0/divider_0/nor_0/B ro_divider_buffered_0/divider_0/Out 0.42fF +C1561 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF +C1562 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C1563 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_4670_0# 29.21fF +C1564 divider_buffered_0/divider_0/tspc_2/Z3 divider_buffered_0/divider_0/tspc_2/Z4 0.65fF +C1565 pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Out1 pll_full_buffered1_0/pll_full_0/pd_0/R 0.33fF +C1566 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_1650_0# 1.27fF +C1567 pll_full_buffered1_0/pll_full_0/divider_0/and_0/B pll_full_buffered1_0/pll_full_0/divider_0/and_0/Z1 0.07fF +C1568 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_n10_n140# 0.05fF +C1569 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 0.84fF +C1570 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF +C1571 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF +C1572 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF +C1573 ro_divider_buffered_0/tapered_buf_5/a_1650_0# ro_divider_buffered_0/tapered_buf_5/a_210_n610# 2.89fF +C1574 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF +C1575 pll_full_buffered2_0/pll_full_0/pd_0/R pll_full_buffered2_0/pll_full_0/pd_0/UP 0.45fF +C1576 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/Q 0.22fF +C1577 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z1 0.03fF +C1578 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF +C1579 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C1580 pll_full_buffered2_0/tapered_buf_3/a_n10_230# pll_full_buffered2_0/tapered_buf_3/a_160_230# 0.09fF +C1581 pll_full_buffered2_0/tapered_buf_3/a_4670_0# pll_full_buffered2_0/tapered_buf_3/a_210_n610# 29.21fF +C1582 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF +C1583 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z4 0.12fF +C1584 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT 0.06fF +C1585 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF +C1586 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF +C1587 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_buffered2_0/pll_full_0/vco 1.46fF +C1588 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_divider_buffered_0/ro_complete_0/a0 0.13fF +C1589 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF +C1590 ro_divider_buffered_0/ro_complete_0/a5 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF +C1591 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF +C1592 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF +C1593 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF +C1594 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z2 0.25fF +C1595 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.11fF +C1596 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/clk 0.12fF +C1597 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C1598 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_buffered1_0/pll_full_0/vco 0.12fF +C1599 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_n10_n140# 0.05fF +C1600 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 0.84fF +C1601 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 divider_buffered_0/divider_0/prescaler_0/Out 0.05fF +C1602 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z2 0.25fF +C1603 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF +C1604 ro_divider_buffered_0/tapered_buf_6/a_1650_0# ro_divider_buffered_0/tapered_buf_6/a_210_n610# 2.89fF +C1605 filter_buffered_0/tapered_buf_1/a_160_230# filter_buffered_0/tapered_buf_1/a_160_n140# 0.17fF +C1606 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.01fF +C1607 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF +C1608 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Q 0.51fF +C1609 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF +C1610 pll_full_0/ro_complete_0/a5 pll_full_0/vco 0.15fF +C1611 pll_full_buffered1_0/pll_full_0/pd_0/UP pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar1 0.11fF +C1612 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/nor_0/Z1 0.18fF +C1613 divider_buffered_0/divider_0/prescaler_0/Out divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.91fF +C1614 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF +C1615 pll_full_buffered2_0/pll_full_0/ro_complete_0/a5 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 0.08fF +C1616 pll_full_buffered2_0/pll_full_0/ro_complete_0/a0 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF +C1617 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z2 pll_full_buffered2_0/pll_full_0/div 0.19fF +C1618 div_pd_buffered_0/pd_0/tspc_r_0/Z1 div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.71fF +C1619 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.20fF +C1620 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF +C1621 div_pd_buffered_0/tapered_buf_4/a_n10_n140# div_pd_buffered_0/pd_0/DOWN 0.04fF +C1622 divider_buffered_0/divider_0/mc2 divider_buffered_0/divider_0/nor_1/A 0.04fF +C1623 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/vco 0.01fF +C1624 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/and_0/A 0.26fF +C1625 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C1626 ro_divider_buffered_0/ro_complete_0/a1 ro_divider_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C1627 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Z3 0.03fF +C1628 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C1629 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF +C1630 pll_full_buffered2_0/tapered_buf_3/a_160_230# pll_full_buffered2_0/tapered_buf_3/a_580_0# 0.02fF +C1631 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF +C1632 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z3 0.45fF +C1633 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/clk 0.45fF +C1634 pll_full_buffered2_0/tapered_buf_1/a_160_n140# pll_full_buffered2_0/tapered_buf_1/in 0.19fF +C1635 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/vco 0.60fF +C1636 filter_buffered_0/filter_0/v filter_buffered_0/tapered_buf_0/a_160_n140# 0.19fF +C1637 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_4670_0# 4.78fF +C1638 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C1639 pll_full_buffered2_0/tapered_buf_4/a_160_n140# pll_full_buffered2_0/tapered_buf_4/in 0.19fF +C1640 ro_divider_buffered_0/tapered_buf_7/a_1650_0# ro_divider_buffered_0/tapered_buf_7/a_210_n610# 2.89fF +C1641 ro_divider_buffered_0/tapered_buf_3/a_210_n610# ro_divider_buffered_0/ro_complete_0/a5 26.29fF +C1642 ro_complete_buffered_0/tapered_buf_1/a_4670_0# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 4.78fF +C1643 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C1644 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z2 0.20fF +C1645 filter_buffered_0/tapered_buf_1/a_210_n610# filter_buffered_0/tapered_buf_1/a_160_n140# 0.22fF +C1646 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C1647 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C1648 div_pd_buffered_0/tapered_buf_1/a_n10_n140# div_pd_buffered_0/tapered_buf_1/a_160_n140# 0.05fF +C1649 div_pd_buffered_0/pd_0/tspc_r_0/Z4 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF +C1650 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/DOWN 0.11fF +C1651 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z1 0.17fF +C1652 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C1653 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered2_0/pll_full_0/div 0.01fF +C1654 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/tspc_0/Z4 0.21fF +C1655 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C1656 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.09fF +C1657 ro_divider_buffered_0/divider_0/nor_0/Z1 ro_divider_buffered_0/divider_0/nor_0/B 0.06fF +C1658 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/UP 0.21fF +C1659 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_0/Z3 0.11fF +C1660 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF +C1661 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.05fF +C1662 filter_buffered_0/filter_0/v filter_buffered_0/filter_0/a_4216_n5230# 0.19fF +C1663 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_n10_n140# 0.05fF +C1664 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z2 1.07fF +C1665 pll_full_buffered1_0/pll_full_0/ro_complete_0/a1 pll_full_buffered1_0/pll_full_0/vco 0.11fF +C1666 ro_divider_buffered_0/divider_0/and_0/OUT ro_divider_buffered_0/divider_0/and_0/B 0.01fF +C1667 div_pd_buffered_0/divider_0/tspc_2/Z2 div_pd_buffered_0/divider_0/tspc_2/Z3 0.16fF +C1668 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z4 0.22fF +C1669 pll_full_buffered2_0/tapered_buf_0/a_160_n140# pll_full_buffered2_0/tapered_buf_0/in 0.19fF +C1670 filter_buffered_0/tapered_buf_0/a_210_n610# filter_buffered_0/v 26.29fF +C1671 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/ro_complete_0/a0 26.29fF +C1672 filter_buffered_0/tapered_buf_1/a_580_0# filter_buffered_0/tapered_buf_1/a_1650_0# 1.27fF +C1673 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a4 0.12fF +C1674 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF +C1675 divider_buffered_0/divider_0/tspc_1/a_630_n680# divider_buffered_0/divider_0/nor_1/B 0.35fF +C1676 divider_buffered_0/divider_0/prescaler_0/Out divider_buffered_0/divider_0/tspc_0/Z3 0.45fF +C1677 pll_full_buffered2_0/pll_full_0/pd_0/R pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Out1 0.33fF +C1678 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.01fF +C1679 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z4 0.12fF +C1680 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF +C1681 pll_full_buffered2_0/tapered_buf_4/a_n10_230# pll_full_buffered2_0/tapered_buf_4/in 0.02fF +C1682 ro_divider_buffered_0/tapered_buf_8/a_1650_0# ro_divider_buffered_0/tapered_buf_8/a_210_n610# 2.89fF +C1683 ro_divider_buffered_0/tapered_buf_6/a_210_n610# ro_divider_buffered_0/ro_complete_0/a2 26.29fF +C1684 divider_buffered_0/divider_0/tspc_0/Z4 divider_buffered_0/divider_0/tspc_0/Z1 0.00fF +C1685 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF +C1686 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/vco 0.01fF +C1687 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_divider_buffered_0/ro_complete_0/a0 0.13fF +C1688 ro_complete_buffered_0/tapered_buf_3/a_n10_230# ro_complete_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF +C1689 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z2 1.07fF +C1690 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z3 0.38fF +C1691 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C1692 pll_full_buffered1_0/pll_full_0/ro_complete_0/a0 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF +C1693 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z3 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z4 0.65fF +C1694 ro_divider_buffered_0/tapered_buf_0/a_160_n140# ro_divider_buffered_0/tapered_buf_0/in 0.19fF +C1695 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_divider_buffered_0/divider_0/prescaler_0/nand_0/z1 0.07fF +C1696 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C1697 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/UP 0.03fF +C1698 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF +C1699 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C1700 cp_buffered_0/cp_0/a_1710_0# cp_buffered_0/cp_0/out 0.84fF +C1701 div_pd_buffered_0/divider_0/and_0/B div_pd_buffered_0/divider_0/and_0/Z1 0.07fF +C1702 ro_complete_buffered_0/tapered_buf_3/a_580_0# ro_complete_buffered_0/tapered_buf_3/a_1650_0# 1.27fF +C1703 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C1704 ro_complete_buffered_0/tapered_buf_4/a_210_n610# ro_complete_buffered_0/ro_complete_0/a2 26.29fF +C1705 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 0.00fF +C1706 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/and_0/B 0.18fF +C1707 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C1708 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF +C1709 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z2 0.23fF +C1710 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C1711 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/vco 1.46fF +C1712 divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C1713 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C1714 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/B 0.35fF +C1715 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/vco 0.29fF +C1716 ro_divider_buffered_0/tapered_buf_1/in ro_divider_buffered_0/tapered_buf_1/a_160_n140# 0.19fF +C1717 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/tspc_0/Z3 0.45fF +C1718 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF +C1719 pll_full_buffered1_0/pll_full_0/pd_0/DOWN pll_full_buffered1_0/pll_full_0/cp_0/upbar 0.04fF +C1720 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z3 0.65fF +C1721 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.01fF +C1722 cp_buffered_0/tapered_buf_0/a_1650_0# cp_buffered_0/tapered_buf_0/a_4670_0# 4.78fF +C1723 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT 0.06fF +C1724 divider_buffered_0/divider_0/tspc_1/Q divider_buffered_0/divider_0/tspc_2/Z3 0.45fF +C1725 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_divider_buffered_0/divider_0/clk 0.01fF +C1726 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/divider_0/nor_0/B 0.15fF +C1727 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 0.61fF +C1728 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 div_pd_buffered_0/divider_0/clk 0.12fF +C1729 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z4 0.15fF +C1730 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_buffered1_0/pll_full_0/vco 0.12fF +C1731 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.09fF +C1732 ro_complete_buffered_0/tapered_buf_4/a_4670_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 29.21fF +C1733 ro_divider_buffered_0/tapered_buf_3/a_160_n140# ro_divider_buffered_0/tapered_buf_3/in 0.19fF +C1734 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z1 0.09fF +C1735 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF +C1736 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_160_230# 0.17fF +C1737 divider_buffered_0/tapered_buf_1/a_1650_0# divider_buffered_0/tapered_buf_1/a_580_0# 1.27fF +C1738 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_1/in 0.10fF +C1739 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/a0 0.09fF +C1740 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF +C1741 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/vco 1.27fF +C1742 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/R 0.29fF +C1743 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 divider_buffered_0/divider_0/and_0/OUT 0.05fF +C1744 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 0.04fF +C1745 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF +C1746 ro_divider_buffered_0/tapered_buf_1/a_4670_0# ro_divider_buffered_0/tapered_buf_1/a_1650_0# 4.78fF +C1747 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/mc2 0.04fF +C1748 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_divider_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF +C1749 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C1750 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF +C1751 div_pd_buffered_0/tapered_buf_0/a_580_0# div_pd_buffered_0/tapered_buf_0/a_1650_0# 1.27fF +C1752 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.06fF +C1753 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z2 0.30fF +C1754 ro_complete_buffered_0/tapered_buf_2/a_4670_0# ro_complete_buffered_0/tapered_buf_2/a_1650_0# 4.78fF +C1755 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D ro_divider_buffered_0/divider_0/prescaler_0/nand_1/z1 0.21fF +C1756 div_pd_buffered_0/tapered_buf_1/a_n10_230# div_pd_buffered_0/tapered_buf_1/in 0.02fF +C1757 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/clk 0.60fF +C1758 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z2 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z4 0.36fF +C1759 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z3 pll_full_buffered1_0/pll_full_0/div 0.05fF +C1760 div_pd_buffered_0/tapered_buf_3/a_n10_n140# div_pd_buffered_0/tapered_buf_3/in 0.04fF +C1761 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.09fF +C1762 ro_complete_buffered_0/tapered_buf_5/a_4670_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 29.21fF +C1763 divider_buffered_0/tapered_buf_0/a_210_n610# divider_buffered_0/tapered_buf_0/a_4670_0# 29.21fF +C1764 divider_buffered_0/divider_0/tspc_0/Z4 divider_buffered_0/divider_0/tspc_0/Z3 0.65fF +C1765 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.08fF +C1766 pll_full_buffered2_0/tapered_buf_2/in pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/z5 0.03fF +C1767 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z2 pll_full_buffered2_0/pll_full_0/pd_0/R 0.21fF +C1768 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered2_0/pll_full_0/pd_0/UP 0.03fF +C1769 pll_full_buffered2_0/tapered_buf_2/a_n10_230# pll_full_buffered2_0/tapered_buf_2/a_n10_n140# 0.01fF +C1770 ro_divider_buffered_0/tapered_buf_4/a_160_n140# ro_divider_buffered_0/tapered_buf_4/in 0.19fF +C1771 ro_complete_buffered_0/tapered_buf_7/a_210_n610# ro_complete_buffered_0/ro_complete_0/a5 26.29fF +C1772 ro_complete_buffered_0/tapered_buf_2/a_n10_230# ro_complete_buffered_0/tapered_buf_2/in 0.02fF +C1773 divider_buffered_0/tapered_buf_1/a_1650_0# divider_buffered_0/tapered_buf_1/a_4670_0# 4.78fF +C1774 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C1775 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C1776 ro_divider_buffered_0/ro_complete_0/a4 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF +C1777 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_divider_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C1778 filter_buffered_0/tapered_buf_1/a_4670_0# filter_buffered_0/tapered_buf_1/a_1650_0# 4.78fF +C1779 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/tapered_buf_1/a_210_n610# 26.29fF +C1780 divider_buffered_0/divider_0/tspc_0/Z2 divider_buffered_0/divider_0/nor_1/A 0.23fF +C1781 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z1 0.06fF +C1782 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF +C1783 pll_full_buffered2_0/pll_full_0/ro_complete_0/a2 pll_full_buffered2_0/pll_full_0/vco 0.11fF +C1784 ro_divider_buffered_0/divider_0/nor_0/Z1 ro_divider_buffered_0/divider_0/and_0/B 0.78fF +C1785 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_divider_buffered_0/divider_0/clk 1.30fF +C1786 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C1787 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Z2 0.23fF +C1788 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C1789 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.16fF +C1790 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B 0.47fF +C1791 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C1792 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered1_0/pll_full_0/vco 0.14fF +C1793 ro_divider_buffered_0/divider_0/tspc_2/Z1 ro_divider_buffered_0/divider_0/tspc_2/Z4 0.00fF +C1794 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.09fF +C1795 ro_complete_buffered_0/tapered_buf_6/a_4670_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 29.21fF +C1796 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 0.06fF +C1797 ro_divider_buffered_0/tapered_buf_5/a_160_n140# ro_divider_buffered_0/tapered_buf_5/in 0.19fF +C1798 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_4670_0# 29.21fF +C1799 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF +C1800 divider_buffered_0/divider_0/prescaler_0/Out divider_buffered_0/divider_0/tspc_0/a_630_n680# 0.01fF +C1801 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF +C1802 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_divider_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1803 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_210_n610# 0.84fF +C1804 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF +C1805 ro_complete_buffered_0/tapered_buf_3/a_160_230# ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.17fF +C1806 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF +C1807 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_buffered2_0/pll_full_0/vco 1.58fF +C1808 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF +C1809 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF +C1810 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B 1.21fF +C1811 io_clamp_low[2] io_analog[6] 0.53fF +C1812 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF +C1813 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF +C1814 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/R 0.27fF +C1815 div_pd_buffered_0/pd_0/UP div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.04fF +C1816 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/and_0/B 0.18fF +C1817 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_4670_0# 29.21fF +C1818 div_pd_buffered_0/tapered_buf_3/a_n10_n140# div_pd_buffered_0/tapered_buf_3/a_n10_230# 0.01fF +C1819 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar 0.01fF +C1820 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF +C1821 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.09fF +C1822 ro_complete_buffered_0/tapered_buf_7/a_4670_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 29.21fF +C1823 divider_buffered_0/tapered_buf_2/a_160_n140# divider_buffered_0/tapered_buf_2/in 0.19fF +C1824 ro_divider_buffered_0/tapered_buf_6/a_160_n140# ro_divider_buffered_0/tapered_buf_6/in 0.19fF +C1825 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF +C1826 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/vco 0.11fF +C1827 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF +C1828 pll_full_buffered2_0/pll_full_0/pd_0/R pll_full_buffered2_0/pll_full_0/div 0.51fF +C1829 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.20fF +C1830 cp_buffered_0/tapered_buf_0/a_210_n610# cp_buffered_0/tapered_buf_0/a_160_n140# 0.22fF +C1831 div_pd_buffered_0/divider_0/tspc_0/Z3 div_pd_buffered_0/divider_0/nor_1/A 0.38fF +C1832 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1833 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF +C1834 pll_full_buffered2_0/tapered_buf_3/a_210_n610# pll_full_buffered2_0/tapered_buf_3/a_1650_0# 2.89fF +C1835 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/divider_0/and_0/B 0.20fF +C1836 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/a_630_n680# 0.35fF +C1837 pll_full_buffered1_0/tapered_buf_2/a_1650_0# pll_full_buffered1_0/tapered_buf_2/a_210_n610# 2.89fF +C1838 pll_full_0/cp_0/upbar pll_full_0/pd_0/UP 0.05fF +C1839 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z4 0.15fF +C1840 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 div_pd_buffered_0/divider_0/clk 0.12fF +C1841 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered1_0/pll_full_0/divider_0/and_0/Z1 0.04fF +C1842 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_buffered1_0/pll_full_0/vco 0.05fF +C1843 div_pd_buffered_0/tapered_buf_3/a_n10_n140# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.05fF +C1844 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.09fF +C1845 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF +C1846 divider_buffered_0/divider_0/prescaler_0/Out divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF +C1847 ro_divider_buffered_0/tapered_buf_7/a_160_n140# ro_divider_buffered_0/tapered_buf_7/in 0.19fF +C1848 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF +C1849 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF +C1850 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/tapered_buf_1/in 1.27fF +C1851 ro_divider_buffered_0/tapered_buf_2/a_4670_0# ro_divider_buffered_0/tapered_buf_2/a_1650_0# 4.78fF +C1852 filter_buffered_0/tapered_buf_1/a_n10_n140# filter_buffered_0/v 0.04fF +C1853 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q 0.01fF +C1854 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 1.45fF +C1855 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/a3 3.17fF +C1856 ro_divider_buffered_0/ro_complete_0/a4 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF +C1857 div_pd_buffered_0/pd_0/tspc_r_0/z5 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.02fF +C1858 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.25fF +C1859 ro_divider_buffered_0/tapered_buf_0/a_210_n610# ro_divider_buffered_0/divider_0/Out 26.29fF +C1860 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF +C1861 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF +C1862 ro_divider_buffered_0/tapered_buf_1/a_580_0# ro_divider_buffered_0/tapered_buf_1/a_210_n610# 0.84fF +C1863 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.22fF +C1864 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Z3 0.29fF +C1865 div_pd_buffered_0/divider_0/tspc_2/Z2 div_pd_buffered_0/divider_0/tspc_2/Z4 0.36fF +C1866 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_160_230# 0.02fF +C1867 div_pd_buffered_0/tapered_buf_2/a_160_230# div_pd_buffered_0/tapered_buf_2/a_n10_230# 0.09fF +C1868 div_pd_buffered_0/tapered_buf_2/a_580_0# div_pd_buffered_0/tapered_buf_2/a_210_n610# 0.84fF +C1869 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.05fF +C1870 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF +C1871 pll_full_buffered2_0/pll_full_0/cp_0/a_10_n50# pll_full_buffered2_0/pll_full_0/cp_0/a_1710_0# 0.04fF +C1872 pll_full_buffered1_0/tapered_buf_0/a_1650_0# pll_full_buffered1_0/tapered_buf_0/a_210_n610# 2.89fF +C1873 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C1874 divider_buffered_0/tapered_buf_1/a_160_n140# divider_buffered_0/tapered_buf_1/a_210_n610# 0.22fF +C1875 divider_buffered_0/divider_0/tspc_0/Z4 divider_buffered_0/divider_0/tspc_0/a_630_n680# 0.12fF +C1876 divider_buffered_0/divider_0/tspc_0/Q divider_buffered_0/divider_0/nor_1/A 0.55fF +C1877 pll_full_buffered2_0/pll_full_0/ro_complete_0/a2 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF +C1878 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C1879 ro_divider_buffered_0/tapered_buf_8/a_160_n140# ro_divider_buffered_0/tapered_buf_8/in 0.19fF +C1880 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF +C1881 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF +C1882 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/vco 0.01fF +C1883 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.02fF +C1884 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_210_n610# 0.22fF +C1885 divider_buffered_0/tapered_buf_1/a_210_n610# divider_buffered_0/tapered_buf_1/out 26.29fF +C1886 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/nor_0/B 0.47fF +C1887 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C1888 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF +C1889 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z4 0.21fF +C1890 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z2 0.16fF +C1891 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_divider_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF +C1892 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.18fF +C1893 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/Out 0.05fF +C1894 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/UP 2.89fF +C1895 pll_full_buffered2_0/tapered_buf_2/a_160_230# pll_full_buffered2_0/tapered_buf_2/a_580_0# 0.02fF +C1896 ro_divider_buffered_0/divider_0/tspc_0/a_630_n680# ro_divider_buffered_0/divider_0/tspc_0/Z4 0.12fF +C1897 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 ro_divider_buffered_0/divider_0/and_0/OUT 0.06fF +C1898 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.38fF +C1899 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D 0.11fF +C1900 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_divider_buffered_0/divider_0/clk 1.30fF +C1901 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF +C1902 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C1903 divider_buffered_0/divider_0/tspc_1/Z4 divider_buffered_0/divider_0/nor_1/A 0.02fF +C1904 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/and_0/B 0.31fF +C1905 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF +C1906 pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Z1 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar 0.02fF +C1907 divider_buffered_0/divider_0/and_0/out1 divider_buffered_0/divider_0/and_0/B 0.18fF +C1908 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.45fF +C1909 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C1910 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 divider_buffered_0/divider_0/prescaler_0/Out 0.28fF +C1911 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z2 0.15fF +C1912 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.18fF +C1913 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF +C1914 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF +C1915 div_pd_buffered_0/tapered_buf_0/a_160_230# div_pd_buffered_0/tapered_buf_0/a_580_0# 0.02fF +C1916 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.12fF +C1917 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_buffered2_0/pll_full_0/vco 1.46fF +C1918 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF +C1919 ro_divider_buffered_0/ro_complete_0/a5 ro_divider_buffered_0/ro_complete_0/cbank_2/v 0.08fF +C1920 ro_divider_buffered_0/ro_complete_0/a0 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF +C1921 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF +C1922 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z4 0.12fF +C1923 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/clk 0.01fF +C1924 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/and_0/A 0.26fF +C1925 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q 0.22fF +C1926 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z1 0.03fF +C1927 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF +C1928 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C1929 pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Out1 pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Z1 0.18fF +C1930 divider_buffered_0/divider_0/tspc_1/Q divider_buffered_0/divider_0/tspc_2/Z4 0.15fF +C1931 pll_full_buffered2_0/tapered_buf_1/a_160_n140# pll_full_buffered2_0/tapered_buf_1/a_580_0# 0.35fF +C1932 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/a_n10_n140# 0.01fF +C1933 pll_full_buffered1_0/tapered_buf_0/a_160_n140# pll_full_buffered1_0/tapered_buf_0/a_580_0# 0.35fF +C1934 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_1/B 0.18fF +C1935 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF +C1936 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/div 0.19fF +C1937 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C1938 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.36fF +C1939 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z2 0.01fF +C1940 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z2 0.01fF +C1941 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF +C1942 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF +C1943 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_divider_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C1944 div_pd_buffered_0/tapered_buf_0/a_210_n610# div_pd_buffered_0/tapered_buf_0/a_1650_0# 2.89fF +C1945 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out 0.05fF +C1946 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_divider_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C1947 div_pd_buffered_0/divider_0/tspc_0/Z3 div_pd_buffered_0/divider_0/tspc_0/Z2 0.16fF +C1948 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C1949 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_n10_230# 0.09fF +C1950 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z3 0.06fF +C1951 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q 0.51fF +C1952 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF +C1953 pll_full_buffered1_0/pll_full_0/ro_complete_0/a5 pll_full_buffered1_0/pll_full_0/vco 0.15fF +C1954 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/Z1 0.04fF +C1955 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/clk 0.05fF +C1956 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z1 0.09fF +C1957 pll_full_buffered2_0/tapered_buf_0/a_160_n140# pll_full_buffered2_0/tapered_buf_0/a_580_0# 0.35fF +C1958 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/a_n10_n140# 0.01fF +C1959 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF +C1960 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z2 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z4 0.14fF +C1961 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF +C1962 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C1963 pll_full_0/pd_0/tspc_r_1/z5 pll_full_0/div 0.04fF +C1964 pll_full_buffered2_0/tapered_buf_2/out pll_full_buffered2_0/tapered_buf_2/a_210_n610# 26.29fF +C1965 divider_buffered_0/divider_0/tspc_1/Z2 divider_buffered_0/divider_0/nor_1/A 0.15fF +C1966 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_0/B 0.00fF +C1967 divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C1968 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C1969 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/Z1 pll_full_buffered2_0/pll_full_0/divider_0/and_0/A 0.80fF +C1970 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C1971 pll_full_buffered2_0/tapered_buf_3/a_160_n140# pll_full_buffered2_0/tapered_buf_3/a_160_230# 0.17fF +C1972 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/and_pd_0/Out1 0.12fF +C1973 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/UP 0.21fF +C1974 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C1975 pll_full_buffered2_0/tapered_buf_2/a_n10_n140# pll_full_buffered2_0/tapered_buf_2/in 0.04fF +C1976 ro_divider_buffered_0/divider_0/tspc_1/Z1 ro_divider_buffered_0/divider_0/tspc_1/Z2 1.07fF +C1977 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_1/Z3 0.38fF +C1978 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/a_160_230# 0.17fF +C1979 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_1/Z2 0.15fF +C1980 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.07fF +C1981 ro_divider_buffered_0/tapered_buf_0/a_n10_230# ro_divider_buffered_0/tapered_buf_0/in 0.02fF +C1982 ro_divider_buffered_0/divider_0/tspc_2/Z3 ro_divider_buffered_0/divider_0/tspc_2/Z4 0.65fF +C1983 filter_buffered_0/tapered_buf_1/a_n10_230# filter_buffered_0/v 0.02fF +C1984 cp_buffered_0/tapered_buf_2/in cp_buffered_0/tapered_buf_2/a_160_n140# 0.19fF +C1985 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z2 0.20fF +C1986 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF +C1987 pll_full_buffered1_0/pll_full_0/ref pll_full_buffered1_0/pll_full_0/vco 0.55fF +C1988 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/a_n10_n140# 0.01fF +C1989 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.22fF +C1990 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 0.00fF +C1991 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C1992 pll_full_buffered2_0/tapered_buf_2/a_4670_0# pll_full_buffered2_0/tapered_buf_2/a_210_n610# 29.21fF +C1993 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF +C1994 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/z5 pll_full_buffered1_0/pll_full_0/div 0.04fF +C1995 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/and_0/B 0.31fF +C1996 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF +C1997 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C1998 filter_buffered_0/filter_0/v filter_buffered_0/tapered_buf_1/a_210_n610# 26.29fF +C1999 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.01fF +C2000 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z4 0.12fF +C2001 pll_full_buffered1_0/pll_full_0/ro_complete_0/a0 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF +C2002 pll_full_buffered2_0/pll_full_0/divider_0/and_0/out1 pll_full_buffered2_0/pll_full_0/divider_0/and_0/B 0.18fF +C2003 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF +C2004 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.05fF +C2005 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/clk 0.01fF +C2006 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF +C2007 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered1_0/pll_full_0/vco 0.01fF +C2008 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z1 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z2 0.71fF +C2009 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z4 0.20fF +C2010 pll_full_buffered2_0/pll_full_0/ref pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/z5 0.04fF +C2011 ro_divider_buffered_0/tapered_buf_3/a_160_n140# ro_divider_buffered_0/tapered_buf_3/a_580_0# 0.35fF +C2012 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF +C2013 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/a_n10_n140# 0.01fF +C2014 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/ref 0.19fF +C2015 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C2016 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z2 0.14fF +C2017 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z4 0.00fF +C2018 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF +C2019 pll_full_0/divider_0/prescaler_0/Out pll_full_0/vco 0.51fF +C2020 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C2021 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z4 pll_full_buffered2_0/pll_full_0/div 0.02fF +C2022 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered1_0/pll_full_0/ref 0.65fF +C2023 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.29fF +C2024 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF +C2025 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/vco 0.11fF +C2026 pll_full_buffered2_0/tapered_buf_5/a_1650_0# pll_full_buffered2_0/tapered_buf_5/a_4670_0# 4.78fF +C2027 pll_full_buffered2_0/tapered_buf_5/a_160_n140# pll_full_buffered2_0/tapered_buf_5/a_160_230# 0.17fF +C2028 ro_divider_buffered_0/ro_complete_0/cbank_0/v ro_divider_buffered_0/ro_complete_0/cbank_2/v 0.04fF +C2029 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF +C2030 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z2 0.23fF +C2031 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C2032 divider_buffered_0/divider_0/and_0/OUT divider_buffered_0/divider_0/and_0/Z1 0.04fF +C2033 pll_full_buffered2_0/tapered_buf_1/a_n10_230# pll_full_buffered2_0/tapered_buf_1/in 0.02fF +C2034 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B 0.35fF +C2035 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_buffered1_0/pll_full_0/vco 0.29fF +C2036 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z4 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z4 0.02fF +C2037 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered2_0/tapered_buf_2/in 0.11fF +C2038 ro_divider_buffered_0/tapered_buf_4/a_160_n140# ro_divider_buffered_0/tapered_buf_4/a_580_0# 0.35fF +C2039 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z4 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/z5 0.04fF +C2040 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF +C2041 ro_complete_buffered_0/tapered_buf_0/in ro_complete_buffered_0/tapered_buf_0/a_n10_n140# 0.04fF +C2042 divider_buffered_0/divider_0/tspc_0/Q divider_buffered_0/divider_0/tspc_1/Z3 0.45fF +C2043 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C2044 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/B 0.08fF +C2045 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF +C2046 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF +C2047 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/vco 0.12fF +C2048 ro_complete_buffered_0/tapered_buf_2/a_580_0# ro_complete_buffered_0/tapered_buf_2/a_160_230# 0.02fF +C2049 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_divider_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C2050 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/and_pd_0/Out1 0.05fF +C2051 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/tspc_r_1/Qbar 0.01fF +C2052 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/R 0.27fF +C2053 divider_buffered_0/tapered_buf_0/a_580_0# divider_buffered_0/tapered_buf_0/a_160_n140# 0.35fF +C2054 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF +C2055 pll_full_buffered1_0/pll_full_0/ref pll_full_buffered1_0/tapered_buf_0/a_210_n610# 26.29fF +C2056 divider_buffered_0/divider_0/mc2 divider_buffered_0/divider_0/clk 0.26fF +C2057 divider_buffered_0/divider_0/tspc_1/Z3 divider_buffered_0/divider_0/tspc_1/Z4 0.65fF +C2058 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered2_0/pll_full_0/vco 0.06fF +C2059 pll_full_buffered2_0/tapered_buf_5/a_160_n140# pll_full_buffered2_0/tapered_buf_5/in 0.19fF +C2060 ro_divider_buffered_0/divider_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/tspc_0/Z1 0.06fF +C2061 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF +C2062 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/divider_0/clk 0.05fF +C2063 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF +C2064 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v pll_full_buffered1_0/pll_full_0/vco 1.27fF +C2065 divider_buffered_0/divider_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/tspc_2/Z3 0.05fF +C2066 divider_buffered_0/divider_0/nor_0/B divider_buffered_0/divider_0/tspc_2/Z1 0.03fF +C2067 pll_full_buffered1_0/pll_full_0/divider_0/and_0/out1 pll_full_buffered1_0/pll_full_0/divider_0/and_0/A 0.01fF +C2068 pll_full_buffered2_0/tapered_buf_0/a_n10_230# pll_full_buffered2_0/tapered_buf_0/in 0.02fF +C2069 cp_buffered_0/tapered_buf_1/a_1650_0# cp_buffered_0/tapered_buf_1/a_210_n610# 2.89fF +C2070 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/in 0.19fF +C2071 ro_divider_buffered_0/tapered_buf_5/a_160_n140# ro_divider_buffered_0/tapered_buf_5/a_580_0# 0.35fF +C2072 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Q 0.55fF +C2073 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF +C2074 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a4 0.09fF +C2075 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a5 0.09fF +C2076 pll_full_buffered1_0/tapered_buf_2/a_4670_0# pll_full_buffered1_0/tapered_buf_2/a_210_n610# 29.21fF +C2077 div_pd_buffered_0/tapered_buf_4/a_1650_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 2.89fF +C2078 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF +C2079 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_0/B 0.22fF +C2080 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF +C2081 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF +C2082 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF +C2083 ro_divider_buffered_0/ro_complete_0/a1 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.03fF +C2084 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/tspc_2/Z2 0.20fF +C2085 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/vco 0.64fF +C2086 divider_buffered_0/divider_0/tspc_0/Z1 divider_buffered_0/divider_0/nor_1/A 0.03fF +C2087 pll_full_buffered2_0/pll_full_0/div pll_full_buffered2_0/pll_full_0/vco 2.26fF +C2088 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/divider_0/and_0/OUT 0.05fF +C2089 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.04fF +C2090 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_0/vin ro_divider_buffered_0/divider_0/clk 1.43fF +C2091 cp_buffered_0/cp_0/down cp_buffered_0/cp_0/a_1710_0# 0.32fF +C2092 divider_buffered_0/divider_0/and_0/A divider_buffered_0/divider_0/and_0/B 0.18fF +C2093 pll_full_buffered2_0/tapered_buf_2/a_160_n140# pll_full_buffered2_0/tapered_buf_2/in 0.19fF +C2094 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF +C2095 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C2096 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF +C2097 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.05fF +C2098 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C2099 ro_divider_buffered_0/tapered_buf_6/a_160_n140# ro_divider_buffered_0/tapered_buf_6/a_580_0# 0.35fF +C2100 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF +C2101 ro_complete_buffered_0/tapered_buf_0/a_580_0# ro_complete_buffered_0/tapered_buf_0/a_160_230# 0.02fF +C2102 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 0.22fF +C2103 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/pd_0/DOWN 0.19fF +C2104 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C2105 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF +C2106 pll_full_buffered1_0/pll_full_0/pd_0/R pll_full_buffered1_0/pll_full_0/pd_0/UP 0.45fF +C2107 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/div 0.04fF +C2108 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z2 0.40fF +C2109 div_pd_buffered_0/tapered_buf_0/a_580_0# div_pd_buffered_0/tapered_buf_0/a_160_n140# 0.35fF +C2110 div_pd_buffered_0/divider_0/tspc_0/Q div_pd_buffered_0/divider_0/nor_1/B 0.22fF +C2111 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF +C2112 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z4 0.02fF +C2113 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z3 0.16fF +C2114 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF +C2115 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/and_0/A 0.01fF +C2116 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.03fF +C2117 divider_buffered_0/divider_0/prescaler_0/tspc_2/D divider_buffered_0/divider_0/prescaler_0/nand_0/z1 0.24fF +C2118 ro_divider_buffered_0/divider_0/mc2 ro_divider_buffered_0/divider_0/Out 1.14fF +C2119 ro_divider_buffered_0/divider_0/and_0/OUT ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.03fF +C2120 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/and_0/B 0.08fF +C2121 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.19fF +C2122 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/clk 0.01fF +C2123 filter_buffered_0/tapered_buf_0/a_1650_0# filter_buffered_0/tapered_buf_0/a_4670_0# 4.78fF +C2124 pll_full_buffered2_0/tapered_buf_1/a_580_0# pll_full_buffered2_0/tapered_buf_1/a_1650_0# 1.27fF +C2125 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/z5 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 0.11fF +C2126 ro_divider_buffered_0/tapered_buf_3/a_n10_230# ro_divider_buffered_0/tapered_buf_3/in 0.02fF +C2127 cp_buffered_0/tapered_buf_0/a_n10_n140# cp_buffered_0/tapered_buf_0/a_n10_230# 0.01fF +C2128 pll_full_buffered1_0/tapered_buf_2/a_n10_230# pll_full_buffered1_0/tapered_buf_2/a_n10_n140# 0.01fF +C2129 ro_complete_buffered_0/tapered_buf_2/a_580_0# ro_complete_buffered_0/tapered_buf_2/a_1650_0# 1.27fF +C2130 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 pll_full_buffered2_0/pll_full_0/pd_0/R 0.29fF +C2131 pll_full_buffered1_0/pll_full_0/pd_0/DOWN pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF +C2132 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered1_0/pll_full_0/pd_0/R 0.01fF +C2133 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C2134 pll_full_0/pd_0/R pll_full_0/div 0.51fF +C2135 div_pd_buffered_0/tapered_buf_2/a_n10_230# div_pd_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF +C2136 filter_buffered_0/tapered_buf_1/a_n10_230# filter_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF +C2137 divider_buffered_0/divider_0/tspc_1/Z2 divider_buffered_0/divider_0/tspc_1/Z3 0.16fF +C2138 ro_divider_buffered_0/tapered_buf_7/a_160_n140# ro_divider_buffered_0/tapered_buf_7/a_580_0# 0.35fF +C2139 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.04fF +C2140 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z2 0.36fF +C2141 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF +C2142 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C2143 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/vco 0.01fF +C2144 ro_divider_buffered_0/tapered_buf_8/a_210_n610# ro_divider_buffered_0/ro_complete_0/a0 26.29fF +C2145 div_pd_buffered_0/tapered_buf_0/a_210_n610# div_pd_buffered_0/tapered_buf_0/out 26.29fF +C2146 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z3 0.38fF +C2147 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF +C2148 ro_divider_buffered_0/divider_0/tspc_1/Z1 ro_divider_buffered_0/divider_0/tspc_0/Q 0.01fF +C2149 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_0/vin ro_divider_buffered_0/ro_complete_0/cbank_2/v 1.45fF +C2150 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF +C2151 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/tspc_2/a_630_n680# 0.04fF +C2152 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/nor_1/A 0.35fF +C2153 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF +C2154 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF +C2155 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.01fF +C2156 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z4 0.00fF +C2157 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered1_0/pll_full_0/vco 0.11fF +C2158 divider_buffered_0/divider_0/prescaler_0/tspc_2/D divider_buffered_0/divider_0/clk 0.26fF +C2159 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/nor_0/B 0.35fF +C2160 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D div_pd_buffered_0/divider_0/clk 0.29fF +C2161 pll_full_buffered2_0/tapered_buf_0/a_580_0# pll_full_buffered2_0/tapered_buf_0/a_1650_0# 1.27fF +C2162 filter_buffered_0/tapered_buf_1/a_580_0# filter_buffered_0/tapered_buf_1/a_160_n140# 0.35fF +C2163 ro_divider_buffered_0/tapered_buf_4/a_n10_230# ro_divider_buffered_0/tapered_buf_4/in 0.02fF +C2164 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF +C2165 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF +C2166 ro_divider_buffered_0/tapered_buf_8/a_160_n140# ro_divider_buffered_0/tapered_buf_8/a_580_0# 0.35fF +C2167 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/vco 1.36fF +C2168 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF +C2169 ro_divider_buffered_0/ro_complete_0/a4 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.12fF +C2170 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF +C2171 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_divider_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C2172 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/R 0.21fF +C2173 divider_buffered_0/divider_0/tspc_0/Z3 divider_buffered_0/divider_0/nor_1/A 0.38fF +C2174 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF +C2175 pll_full_buffered2_0/tapered_buf_2/a_210_n610# pll_full_buffered2_0/tapered_buf_2/a_1650_0# 2.89fF +C2176 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.03fF +C2177 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_1/Z4 0.21fF +C2178 ro_divider_buffered_0/divider_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/tspc_0/Z2 0.16fF +C2179 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.06fF +C2180 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF +C2181 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.38fF +C2182 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.11fF +C2183 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/clk 0.11fF +C2184 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z3 0.05fF +C2185 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z1 0.03fF +C2186 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT 0.05fF +C2187 ro_complete_buffered_0/tapered_buf_2/a_580_0# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.35fF +C2188 ro_divider_buffered_0/tapered_buf_2/a_210_n610# ro_divider_buffered_0/tapered_buf_2/a_160_n140# 0.22fF +C2189 filter_buffered_0/tapered_buf_0/a_160_n140# filter_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF +C2190 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/A 0.01fF +C2191 pll_full_buffered1_0/tapered_buf_1/a_n10_n140# pll_full_buffered1_0/tapered_buf_1/in 0.04fF +C2192 ro_divider_buffered_0/tapered_buf_5/a_n10_230# ro_divider_buffered_0/tapered_buf_5/in 0.02fF +C2193 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/a_630_n680# 0.35fF +C2194 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF +C2195 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C2196 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a5 2.39fF +C2197 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C2198 ro_divider_buffered_0/tapered_buf_1/a_n10_230# ro_divider_buffered_0/tapered_buf_1/a_160_230# 0.09fF +C2199 io_clamp_low[2] io_clamp_high[2] 0.53fF +C2200 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z1 0.17fF +C2201 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C2202 div_pd_buffered_0/tapered_buf_2/a_1650_0# div_pd_buffered_0/tapered_buf_2/a_4670_0# 4.78fF +C2203 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z3 0.05fF +C2204 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C2205 pll_full_buffered2_0/pll_full_0/ro_complete_0/a0 pll_full_buffered2_0/pll_full_0/vco 0.11fF +C2206 ro_divider_buffered_0/tapered_buf_1/in ro_divider_buffered_0/tapered_buf_1/a_n10_n140# 0.04fF +C2207 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_5/vin ro_divider_buffered_0/divider_0/clk 1.30fF +C2208 pll_full_buffered1_0/pll_full_0/ro_complete_0/a0 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C2209 io_clamp_high[1] io_analog[5] 0.53fF +C2210 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF +C2211 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/and_0/A 0.26fF +C2212 pll_full_buffered2_0/pll_full_0/divider_0/and_0/A pll_full_buffered2_0/pll_full_0/divider_0/and_0/B 0.18fF +C2213 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF +C2214 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF +C2215 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/vco 0.01fF +C2216 pll_full_buffered1_0/tapered_buf_1/a_n10_230# pll_full_buffered1_0/tapered_buf_1/a_160_230# 0.09fF +C2217 pll_full_buffered1_0/tapered_buf_1/a_4670_0# pll_full_buffered1_0/tapered_buf_1/a_210_n610# 29.21fF +C2218 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C2219 pll_full_buffered1_0/tapered_buf_1/a_160_n140# pll_full_buffered1_0/tapered_buf_1/a_160_230# 0.17fF +C2220 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/UP 0.03fF +C2221 ro_divider_buffered_0/tapered_buf_3/a_580_0# ro_divider_buffered_0/tapered_buf_3/a_1650_0# 1.27fF +C2222 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/z5 0.20fF +C2223 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF +C2224 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C2225 ro_divider_buffered_0/tapered_buf_6/a_n10_230# ro_divider_buffered_0/tapered_buf_6/in 0.02fF +C2226 cp_buffered_0/tapered_buf_0/a_210_n610# cp_buffered_0/tapered_buf_0/a_580_0# 0.84fF +C2227 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C2228 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF +C2229 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/vco 1.46fF +C2230 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/z5 0.04fF +C2231 pll_full_buffered2_0/tapered_buf_5/a_160_n140# pll_full_buffered2_0/tapered_buf_5/a_n10_n140# 0.05fF +C2232 pll_full_buffered2_0/tapered_buf_5/a_580_0# pll_full_buffered2_0/tapered_buf_5/a_210_n610# 0.84fF +C2233 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF +C2234 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z2 0.15fF +C2235 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF +C2236 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z2 0.71fF +C2237 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 divider_buffered_0/divider_0/clk 0.12fF +C2238 cp_buffered_0/tapered_buf_2/a_4670_0# cp_buffered_0/tapered_buf_2/a_1650_0# 4.78fF +C2239 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z2 0.01fF +C2240 pll_full_buffered1_0/pll_full_0/pd_0/DOWN pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar 0.02fF +C2241 pll_full_buffered1_0/pll_full_0/pd_0/R pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar1 0.30fF +C2242 ro_divider_buffered_0/tapered_buf_4/a_580_0# ro_divider_buffered_0/tapered_buf_4/a_1650_0# 1.27fF +C2243 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/z5 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/z5 0.02fF +C2244 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z2 0.25fF +C2245 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C2246 ro_divider_buffered_0/tapered_buf_7/a_n10_230# ro_divider_buffered_0/tapered_buf_7/in 0.02fF +C2247 divider_buffered_0/divider_0/tspc_0/Q divider_buffered_0/divider_0/tspc_1/Z4 0.15fF +C2248 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/nor_1/Z1 0.06fF +C2249 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF +C2250 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C2251 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/nor_1/A 1.21fF +C2252 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q 0.05fF +C2253 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF +C2254 ro_divider_buffered_0/ro_complete_0/a2 ro_divider_buffered_0/ro_complete_0/a1 3.18fF +C2255 ro_divider_buffered_0/tapered_buf_0/a_210_n610# ro_divider_buffered_0/tapered_buf_0/a_160_n140# 0.22fF +C2256 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/R 0.36fF +C2257 div_pd_buffered_0/pd_0/tspc_r_1/Z1 div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.71fF +C2258 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.20fF +C2259 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF +C2260 pll_full_buffered1_0/pll_full_0/ro_complete_0/a4 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF +C2261 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C2262 ro_divider_buffered_0/divider_0/nor_1/Z1 ro_divider_buffered_0/divider_0/and_0/A 0.80fF +C2263 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_5/vin ro_divider_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C2264 ro_divider_buffered_0/tapered_buf_2/a_160_230# ro_divider_buffered_0/tapered_buf_2/a_580_0# 0.02fF +C2265 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z2 1.07fF +C2266 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Z3 0.38fF +C2267 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Z2 0.01fF +C2268 divider_buffered_0/divider_0/mc2 divider_buffered_0/divider_0/and_0/out1 0.06fF +C2269 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/div 0.03fF +C2270 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered2_0/pll_full_0/divider_0/and_0/out1 0.31fF +C2271 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_buffered2_0/pll_full_0/vco 0.26fF +C2272 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z2 0.01fF +C2273 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z2 0.01fF +C2274 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF +C2275 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF +C2276 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z4 0.14fF +C2277 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_580_0# 0.35fF +C2278 ro_complete_buffered_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.19fF +C2279 divider_buffered_0/divider_0/tspc_2/a_630_n680# divider_buffered_0/divider_0/tspc_2/Z4 0.12fF +C2280 divider_buffered_0/divider_0/tspc_2/Z1 divider_buffered_0/divider_0/tspc_2/Z2 1.07fF +C2281 divider_buffered_0/divider_0/nor_0/B divider_buffered_0/divider_0/tspc_2/Z3 0.38fF +C2282 pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Out1 pll_full_buffered1_0/pll_full_0/pd_0/DOWN 0.12fF +C2283 ro_divider_buffered_0/tapered_buf_5/a_580_0# ro_divider_buffered_0/tapered_buf_5/a_1650_0# 1.27fF +C2284 pll_full_buffered2_0/tapered_buf_2/in pll_full_buffered2_0/pll_full_0/pd_0/UP 0.61fF +C2285 filter_buffered_0/tapered_buf_1/a_580_0# filter_buffered_0/tapered_buf_1/a_160_230# 0.02fF +C2286 pll_full_0/filter_0/a_4216_n5230# pll_full_0/vco 1.58fF +C2287 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z1 0.03fF +C2288 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C2289 ro_divider_buffered_0/tapered_buf_8/a_n10_230# ro_divider_buffered_0/tapered_buf_8/in 0.02fF +C2290 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C2291 pll_full_buffered2_0/pll_full_0/ro_complete_0/a5 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF +C2292 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C2293 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z2 0.14fF +C2294 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF +C2295 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/vco 0.11fF +C2296 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z4 0.02fF +C2297 ro_complete_buffered_0/tapered_buf_1/in ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.36fF +C2298 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z3 0.45fF +C2299 pll_full_buffered2_0/pll_full_0/ro_complete_0/a3 pll_full_buffered2_0/pll_full_0/vco 0.11fF +C2300 ro_divider_buffered_0/tapered_buf_0/a_160_n140# ro_divider_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF +C2301 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF +C2302 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered1_0/pll_full_0/div 0.12fF +C2303 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF +C2304 pll_full_buffered1_0/pll_full_0/ro_complete_0/a3 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C2305 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF +C2306 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.05fF +C2307 divider_buffered_0/divider_0/tspc_0/a_630_n680# divider_buffered_0/divider_0/nor_1/A 0.35fF +C2308 ro_divider_buffered_0/divider_0/and_0/out1 ro_divider_buffered_0/divider_0/and_0/B 0.18fF +C2309 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B 0.00fF +C2310 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF +C2311 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_210_n610# 0.22fF +C2312 pll_full_buffered2_0/pll_full_0/ref pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF +C2313 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF +C2314 pll_full_buffered2_0/tapered_buf_3/a_n10_230# pll_full_buffered2_0/tapered_buf_3/a_n10_n140# 0.01fF +C2315 ro_divider_buffered_0/tapered_buf_6/a_580_0# ro_divider_buffered_0/tapered_buf_6/a_1650_0# 1.27fF +C2316 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF +C2317 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_0/a_630_n680# 0.04fF +C2318 filter_buffered_0/tapered_buf_1/a_580_0# filter_buffered_0/tapered_buf_1/a_210_n610# 0.84fF +C2319 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF +C2320 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered2_0/pll_full_0/div 0.65fF +C2321 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF +C2322 pll_full_0/divider_0/nor_0/B pll_full_0/div 0.27fF +C2323 div_pd_buffered_0/tapered_buf_0/a_210_n610# div_pd_buffered_0/tapered_buf_0/a_160_n140# 0.22fF +C2324 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z1 0.09fF +C2325 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.19fF +C2326 pll_full_buffered1_0/tapered_buf_0/a_580_0# pll_full_buffered1_0/tapered_buf_0/a_160_230# 0.02fF +C2327 pll_full_buffered1_0/tapered_buf_0/a_160_n140# pll_full_buffered1_0/tapered_buf_0/a_210_n610# 0.22fF +C2328 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z2 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z4 0.36fF +C2329 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z3 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q 0.05fF +C2330 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF +C2331 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C2332 div_pd_buffered_0/divider_0/tspc_0/Z3 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.05fF +C2333 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF +C2334 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C2335 ro_divider_buffered_0/divider_0/and_0/OUT ro_divider_buffered_0/divider_0/prescaler_0/nand_0/z1 0.01fF +C2336 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 ro_divider_buffered_0/divider_0/clk 0.11fF +C2337 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/a_630_n680# 0.01fF +C2338 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.32fF +C2339 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF +C2340 divider_buffered_0/tapered_buf_0/a_210_n610# divider_buffered_0/divider_0/mc2 26.29fF +C2341 divider_buffered_0/divider_0/tspc_1/Z2 divider_buffered_0/divider_0/tspc_0/Q 0.14fF +C2342 pll_full_buffered2_0/tapered_buf_1/a_1650_0# pll_full_buffered2_0/tapered_buf_1/a_4670_0# 4.78fF +C2343 pll_full_buffered2_0/tapered_buf_1/a_160_n140# pll_full_buffered2_0/tapered_buf_1/a_160_230# 0.17fF +C2344 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/UP 0.33fF +C2345 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/z5 0.11fF +C2346 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF +C2347 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF +C2348 ro_divider_buffered_0/tapered_buf_7/a_580_0# ro_divider_buffered_0/tapered_buf_7/a_1650_0# 1.27fF +C2349 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF +C2350 divider_buffered_0/divider_0/tspc_1/Z2 divider_buffered_0/divider_0/tspc_1/Z4 0.36fF +C2351 pll_full_buffered2_0/pll_full_0/ro_complete_0/a2 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF +C2352 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF +C2353 pll_full_buffered2_0/tapered_buf_3/a_4670_0# pll_full_buffered2_0/tapered_buf_3/a_1650_0# 4.78fF +C2354 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_divider_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C2355 divider_buffered_0/divider_0/tspc_0/Z2 divider_buffered_0/divider_0/tspc_0/Z1 1.07fF +C2356 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.05fF +C2357 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z2 0.11fF +C2358 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C2359 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/R 0.03fF +C2360 pll_full_buffered1_0/pll_full_0/ro_complete_0/a3 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF +C2361 divider_buffered_0/divider_0/nor_1/Z1 divider_buffered_0/divider_0/and_0/A 0.80fF +C2362 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z1 0.01fF +C2363 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/nor_0/B 0.42fF +C2364 div_pd_buffered_0/divider_0/tspc_0/Q div_pd_buffered_0/divider_0/tspc_1/Z3 0.45fF +C2365 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/nor_1/A 0.21fF +C2366 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C2367 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF +C2368 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C2369 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z2 0.14fF +C2370 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z4 0.00fF +C2371 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT 0.14fF +C2372 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/vco 0.51fF +C2373 ro_divider_buffered_0/divider_0/and_0/OUT ro_divider_buffered_0/divider_0/clk 0.04fF +C2374 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z2 0.01fF +C2375 divider_buffered_0/tapered_buf_0/a_160_230# divider_buffered_0/tapered_buf_0/a_n10_230# 0.09fF +C2376 divider_buffered_0/divider_0/nor_1/A divider_buffered_0/divider_0/and_0/A 0.01fF +C2377 pll_full_buffered2_0/tapered_buf_0/a_1650_0# pll_full_buffered2_0/tapered_buf_0/a_4670_0# 4.78fF +C2378 pll_full_buffered2_0/tapered_buf_0/a_160_n140# pll_full_buffered2_0/tapered_buf_0/a_160_230# 0.17fF +C2379 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B pll_full_buffered1_0/pll_full_0/divider_0/and_0/B 0.29fF +C2380 pll_full_buffered1_0/tapered_buf_2/a_4670_0# pll_full_buffered1_0/tapered_buf_2/a_1650_0# 4.78fF +C2381 pll_full_buffered2_0/tapered_buf_2/in pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Out1 0.12fF +C2382 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar pll_full_buffered2_0/pll_full_0/pd_0/UP 0.21fF +C2383 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C2384 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C2385 ro_divider_buffered_0/tapered_buf_8/a_580_0# ro_divider_buffered_0/tapered_buf_8/a_1650_0# 1.27fF +C2386 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C2387 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/mc2 0.06fF +C2388 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_divider_buffered_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF +C2389 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z4 0.02fF +C2390 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/a_630_n680# 0.05fF +C2391 div_pd_buffered_0/pd_0/tspc_r_0/z5 div_pd_buffered_0/pd_0/UP 0.03fF +C2392 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF +C2393 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z4 0.12fF +C2394 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z1 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z2 1.07fF +C2395 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z3 0.38fF +C2396 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_divider_buffered_0/divider_0/clk 0.64fF +C2397 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Z2 0.01fF +C2398 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF +C2399 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF +C2400 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.04fF +C2401 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/clk 0.51fF +C2402 filter_buffered_0/tapered_buf_0/a_160_n140# filter_buffered_0/tapered_buf_0/a_580_0# 0.35fF +C2403 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/and_0/B 0.08fF +C2404 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF +C2405 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF +C2406 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_buffered1_0/pll_full_0/vco 0.12fF +C2407 divider_buffered_0/tapered_buf_2/a_580_0# divider_buffered_0/tapered_buf_2/a_160_230# 0.02fF +C2408 ro_divider_buffered_0/tapered_buf_2/a_210_n610# ro_divider_buffered_0/tapered_buf_2/a_1650_0# 2.89fF +C2409 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/div 0.65fF +C2410 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/Qbar 0.01fF +C2411 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF +C2412 ro_complete_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/in 0.02fF +C2413 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z4 0.21fF +C2414 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C2415 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF +C2416 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF +C2417 divider_buffered_0/divider_0/tspc_1/a_630_n680# divider_buffered_0/divider_0/tspc_1/Q 0.04fF +C2418 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C2419 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF +C2420 pll_full_buffered2_0/pll_full_0/ro_complete_0/a3 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF +C2421 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF +C2422 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_divider_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C2423 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_divider_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF +C2424 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z4 0.12fF +C2425 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF +C2426 filter_buffered_0/tapered_buf_1/a_4670_0# filter_buffered_0/tapered_buf_1/a_210_n610# 29.21fF +C2427 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_1/A 0.04fF +C2428 div_pd_buffered_0/pd_0/and_pd_0/Z1 div_pd_buffered_0/pd_0/UP 0.06fF +C2429 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q 0.55fF +C2430 divider_buffered_0/divider_0/tspc_1/Q divider_buffered_0/divider_0/tspc_2/a_630_n680# 0.01fF +C2431 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C2432 ro_divider_buffered_0/tapered_buf_1/a_160_n140# ro_divider_buffered_0/tapered_buf_1/a_210_n610# 0.22fF +C2433 ro_divider_buffered_0/tapered_buf_0/a_1650_0# ro_divider_buffered_0/tapered_buf_0/a_580_0# 1.27fF +C2434 ro_divider_buffered_0/divider_0/nor_1/B ro_divider_buffered_0/divider_0/tspc_2/Z4 0.02fF +C2435 ro_divider_buffered_0/divider_0/tspc_1/Z2 ro_divider_buffered_0/divider_0/tspc_1/Z3 0.16fF +C2436 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D 0.15fF +C2437 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/and_0/A 0.01fF +C2438 io_clamp_low[0] io_analog[4] 0.53fF +C2439 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/nor_0/B 0.00fF +C2440 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B 0.22fF +C2441 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF +C2442 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF +C2443 pll_full_buffered1_0/tapered_buf_1/a_n10_230# pll_full_buffered1_0/tapered_buf_1/a_n10_n140# 0.01fF +C2444 pll_full_buffered1_0/tapered_buf_1/a_160_n140# pll_full_buffered1_0/tapered_buf_1/a_n10_n140# 0.05fF +C2445 pll_full_buffered1_0/tapered_buf_2/a_580_0# pll_full_buffered1_0/tapered_buf_2/a_160_230# 0.02fF +C2446 ro_divider_buffered_0/tapered_buf_3/a_1650_0# ro_divider_buffered_0/tapered_buf_3/a_4670_0# 4.78fF +C2447 ro_divider_buffered_0/tapered_buf_3/a_160_n140# ro_divider_buffered_0/tapered_buf_3/a_160_230# 0.17fF +C2448 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF +C2449 divider_buffered_0/divider_0/tspc_0/Z2 divider_buffered_0/divider_0/tspc_0/Z3 0.16fF +C2450 pll_full_buffered2_0/tapered_buf_4/a_580_0# pll_full_buffered2_0/tapered_buf_4/a_160_230# 0.02fF +C2451 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/z5 0.20fF +C2452 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF +C2453 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF +C2454 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C2455 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/divider_0/mc2 0.34fF +C2456 divider_buffered_0/divider_0/nor_1/B divider_buffered_0/divider_0/tspc_1/Z3 0.38fF +C2457 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# divider_buffered_0/divider_0/clk 0.14fF +C2458 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C2459 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z1 pll_full_buffered1_0/pll_full_0/ref 0.17fF +C2460 ro_divider_buffered_0/divider_0/nor_1/A ro_divider_buffered_0/divider_0/tspc_0/Z3 0.38fF +C2461 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a1 0.14fF +C2462 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/a3 0.09fF +C2463 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C2464 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_buffered2_0/pll_full_0/vco 0.45fF +C2465 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF +C2466 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/div 0.04fF +C2467 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z2 0.40fF +C2468 divider_buffered_0/tapered_buf_0/a_210_n610# divider_buffered_0/tapered_buf_0/a_160_n140# 0.22fF +C2469 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Out1 0.05fF +C2470 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF +C2471 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 pll_full_buffered2_0/pll_full_0/pd_0/R 0.27fF +C2472 pll_full_buffered2_0/pll_full_0/cp_0/upbar pll_full_buffered2_0/pll_full_0/pd_0/UP 0.05fF +C2473 ro_divider_buffered_0/tapered_buf_4/a_1650_0# ro_divider_buffered_0/tapered_buf_4/a_4670_0# 4.78fF +C2474 ro_divider_buffered_0/tapered_buf_4/a_160_n140# ro_divider_buffered_0/tapered_buf_4/a_160_230# 0.17fF +C2475 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z3 0.45fF +C2476 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF +C2477 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_580_0# 1.27fF +C2478 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF +C2479 ro_divider_buffered_0/tapered_buf_4/a_210_n610# ro_divider_buffered_0/ro_complete_0/a4 26.29fF +C2480 pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Z1 pll_full_buffered1_0/pll_full_0/pd_0/UP 0.06fF +C2481 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C2482 ro_divider_buffered_0/tapered_buf_2/a_n10_230# ro_divider_buffered_0/tapered_buf_2/in 0.02fF +C2483 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/vco 0.01fF +C2484 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_divider_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF +C2485 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.20fF +C2486 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF +C2487 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF +C2488 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/Z1 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B 0.18fF +C2489 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C2490 divider_buffered_0/divider_0/mc2 divider_buffered_0/divider_0/and_0/A 0.16fF +C2491 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF +C2492 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/tapered_buf_1/in 0.02fF +C2493 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Z4 0.21fF +C2494 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/Z2 0.36fF +C2495 ro_divider_buffered_0/tapered_buf_2/a_580_0# ro_divider_buffered_0/tapered_buf_2/a_160_n140# 0.35fF +C2496 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q 0.04fF +C2497 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z4 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z2 0.36fF +C2498 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF +C2499 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C2500 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_buffered1_0/pll_full_0/vco 0.01fF +C2501 divider_buffered_0/divider_0/tspc_2/Z2 divider_buffered_0/divider_0/tspc_2/Z3 0.16fF +C2502 divider_buffered_0/divider_0/nor_0/B divider_buffered_0/divider_0/tspc_2/Z4 0.22fF +C2503 ro_divider_buffered_0/tapered_buf_1/a_1650_0# ro_divider_buffered_0/tapered_buf_1/a_210_n610# 2.89fF +C2504 ro_divider_buffered_0/divider_0/tspc_2/a_630_n680# ro_divider_buffered_0/divider_0/tspc_2/Z3 0.05fF +C2505 ro_divider_buffered_0/divider_0/nor_0/B ro_divider_buffered_0/divider_0/tspc_2/Z1 0.03fF +C2506 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/and_0/B 0.29fF +C2507 pll_full_buffered1_0/pll_full_0/divider_0/and_0/out1 pll_full_buffered1_0/pll_full_0/divider_0/and_0/Z1 0.36fF +C2508 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C2509 pll_full_buffered2_0/tapered_buf_4/a_160_n140# pll_full_buffered2_0/tapered_buf_4/a_580_0# 0.35fF +C2510 ro_divider_buffered_0/tapered_buf_5/a_1650_0# ro_divider_buffered_0/tapered_buf_5/a_4670_0# 4.78fF +C2511 ro_divider_buffered_0/tapered_buf_5/a_160_n140# ro_divider_buffered_0/tapered_buf_5/a_160_230# 0.17fF +C2512 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF +C2513 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/ref 0.12fF +C2514 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF +C2515 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF +C2516 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z3 0.25fF +C2517 div_pd_buffered_0/pd_0/and_pd_0/Out1 div_pd_buffered_0/pd_0/and_pd_0/Z1 0.18fF +C2518 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z4 0.15fF +C2519 pll_full_buffered2_0/tapered_buf_2/a_160_n140# pll_full_buffered2_0/tapered_buf_2/a_580_0# 0.35fF +C2520 ro_divider_buffered_0/divider_0/tspc_1/a_630_n680# ro_divider_buffered_0/divider_0/tspc_1/Z3 0.05fF +C2521 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C2522 ro_divider_buffered_0/ro_complete_0/a0 ro_divider_buffered_0/divider_0/clk 0.05fF +C2523 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF +C2524 div_pd_buffered_0/tapered_buf_0/a_1650_0# div_pd_buffered_0/tapered_buf_0/a_4670_0# 4.78fF +C2525 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.09fF +C2526 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.20fF +C2527 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v pll_full_buffered1_0/pll_full_0/vco 1.36fF +C2528 ro_complete_buffered_0/tapered_buf_3/a_1650_0# ro_complete_buffered_0/tapered_buf_3/a_4670_0# 4.78fF +C2529 divider_buffered_0/divider_0/and_0/B divider_buffered_0/divider_0/and_0/Z1 0.07fF +C2530 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 divider_buffered_0/divider_0/and_0/OUT 0.06fF +C2531 ro_divider_buffered_0/divider_0/and_0/A ro_divider_buffered_0/divider_0/and_0/B 0.18fF +C2532 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C2533 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF +C2534 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C2535 pll_full_buffered2_0/tapered_buf_4/a_1650_0# pll_full_buffered2_0/tapered_buf_4/a_4670_0# 4.78fF +C2536 pll_full_buffered2_0/tapered_buf_4/a_160_n140# pll_full_buffered2_0/tapered_buf_4/a_160_230# 0.17fF +C2537 ro_divider_buffered_0/tapered_buf_6/a_1650_0# ro_divider_buffered_0/tapered_buf_6/a_4670_0# 4.78fF +C2538 ro_divider_buffered_0/tapered_buf_6/a_160_n140# ro_divider_buffered_0/tapered_buf_6/a_160_230# 0.17fF +C2539 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.78fF +C2540 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/vco 1.46fF +C2541 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.21fF +C2542 pll_full_buffered2_0/tapered_buf_2/in pll_full_buffered2_0/pll_full_0/div 4.07fF +C2543 cp_buffered_0/cp_0/a_10_n50# cp_buffered_0/cp_0/a_1710_0# 0.04fF Xpll_full_buffered1_0/tapered_buf_2 vdda1 vssa1 pll_full_buffered1_0/pll_full_0/vco + pll_full_buffered1_0/tapered_buf_2/out tapered_buf Xpll_full_buffered1_0/tapered_buf_1 vdda1 vssa1 pll_full_buffered1_0/tapered_buf_1/in @@ -2332,1491 +2678,1603 @@ Xdivider_buffered_0 vssa1 vdda1 divider_buffered Xro_complete_buffered_0 vssa1 ro_complete_buffered Xdiv_pd_buffered_0 vdda1 vssa1 div_pd_buffered -C2198 io_analog[4] ro_complete_buffered_0/tapered_buf_0/out 43.96fF -C2199 io_analog[5] ro_complete_buffered_0/tapered_buf_0/out 44.13fF -C2200 io_analog[6] ro_complete_buffered_0/tapered_buf_0/out 43.46fF -C2201 io_in_3v3[0] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2202 io_oeb[26] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2203 io_in[0] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2204 io_out[26] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2205 io_out[0] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2206 io_in[26] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2207 io_oeb[0] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2208 io_in_3v3[26] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2209 io_in_3v3[1] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2210 io_oeb[25] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2211 io_in[1] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2212 io_out[25] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2213 io_out[1] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2214 io_in[25] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2215 io_oeb[1] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2216 io_in_3v3[25] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2217 io_in_3v3[2] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2218 io_oeb[24] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2219 io_in[2] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2220 io_out[24] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2221 io_out[2] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2222 io_in[24] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2223 io_oeb[2] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2224 io_in_3v3[24] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2225 io_in_3v3[3] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2226 gpio_noesd[17] ro_complete_buffered_0/tapered_buf_0/out 2.32fF -C2227 io_in[3] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2228 gpio_analog[17] ro_complete_buffered_0/tapered_buf_0/out 2.30fF -C2229 io_out[3] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2230 io_oeb[3] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2231 io_in_3v3[4] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2232 io_in[4] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2233 io_out[4] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2234 io_oeb[4] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2235 io_oeb[23] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2236 io_out[23] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2237 io_in[23] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2238 io_in_3v3[23] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2239 gpio_noesd[16] ro_complete_buffered_0/tapered_buf_0/out 2.30fF -C2240 gpio_analog[16] ro_complete_buffered_0/tapered_buf_0/out 2.30fF -C2241 io_in_3v3[5] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2242 io_in[5] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2243 io_out[5] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2244 io_oeb[5] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2245 io_oeb[22] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2246 io_out[22] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2247 io_in[22] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2248 io_in_3v3[22] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2249 gpio_noesd[15] ro_complete_buffered_0/tapered_buf_0/out 2.31fF -C2250 gpio_analog[15] ro_complete_buffered_0/tapered_buf_0/out 2.30fF -C2251 io_in_3v3[6] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2252 io_in[6] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2253 io_out[6] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2254 io_oeb[6] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2255 io_oeb[21] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2256 io_out[21] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2257 io_in[21] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2258 io_in_3v3[21] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2259 gpio_noesd[14] ro_complete_buffered_0/tapered_buf_0/out 2.30fF -C2260 gpio_analog[14] ro_complete_buffered_0/tapered_buf_0/out 2.29fF -C2261 vssd2 ro_complete_buffered_0/tapered_buf_0/out 38.54fF -C2262 vssd1 ro_complete_buffered_0/tapered_buf_0/out 13.04fF -C2263 vdda2 ro_complete_buffered_0/tapered_buf_0/out 38.30fF -C2264 io_oeb[20] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2265 io_out[20] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2266 io_in[20] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2267 io_in_3v3[20] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2268 gpio_noesd[13] ro_complete_buffered_0/tapered_buf_0/out 2.31fF -C2269 gpio_analog[13] ro_complete_buffered_0/tapered_buf_0/out 2.30fF -C2270 gpio_analog[0] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2271 gpio_noesd[0] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2272 io_in_3v3[7] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2273 io_in[7] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2274 io_out[7] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2275 io_oeb[7] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2276 io_oeb[19] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2277 io_out[19] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2278 io_in[19] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2279 io_in_3v3[19] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2280 gpio_noesd[12] ro_complete_buffered_0/tapered_buf_0/out 2.32fF -C2281 gpio_analog[12] ro_complete_buffered_0/tapered_buf_0/out 2.30fF -C2282 gpio_analog[1] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2283 gpio_noesd[1] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2284 io_in_3v3[8] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2285 io_in[8] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2286 io_out[8] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2287 io_oeb[8] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2288 io_oeb[18] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2289 io_out[18] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2290 io_in[18] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2291 io_in_3v3[18] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2292 gpio_noesd[11] ro_complete_buffered_0/tapered_buf_0/out 2.30fF -C2293 gpio_analog[11] ro_complete_buffered_0/tapered_buf_0/out 2.29fF -C2294 gpio_analog[2] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2295 gpio_noesd[2] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2296 io_in_3v3[9] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2297 io_in[9] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2298 io_out[9] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2299 io_oeb[9] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2300 io_oeb[17] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2301 io_out[17] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2302 io_in[17] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2303 io_in_3v3[17] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2304 gpio_noesd[10] ro_complete_buffered_0/tapered_buf_0/out 2.31fF -C2305 gpio_analog[10] ro_complete_buffered_0/tapered_buf_0/out 2.29fF -C2306 gpio_analog[3] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2307 gpio_noesd[3] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2308 io_in_3v3[10] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2309 io_in[10] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2310 io_out[10] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2311 io_oeb[10] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2312 io_oeb[16] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2313 io_out[16] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2314 io_in[16] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2315 io_in_3v3[16] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2316 gpio_noesd[9] ro_complete_buffered_0/tapered_buf_0/out 2.28fF -C2317 gpio_analog[9] ro_complete_buffered_0/tapered_buf_0/out 2.28fF -C2318 gpio_analog[4] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2319 gpio_noesd[4] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2320 io_in_3v3[11] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2321 io_in[11] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2322 io_out[11] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2323 io_oeb[11] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2324 io_oeb[15] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2325 io_out[15] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2326 io_in[15] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2327 io_in_3v3[15] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2328 gpio_noesd[8] ro_complete_buffered_0/tapered_buf_0/out 2.28fF -C2329 gpio_analog[8] ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C2330 gpio_analog[5] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2331 gpio_noesd[5] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2332 io_in_3v3[12] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2333 io_in[12] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2334 io_out[12] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2335 io_oeb[12] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2336 io_oeb[14] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2337 io_out[14] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2338 io_in[14] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2339 io_in_3v3[14] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2340 gpio_noesd[7] ro_complete_buffered_0/tapered_buf_0/out 2.30fF -C2341 gpio_analog[7] ro_complete_buffered_0/tapered_buf_0/out 2.28fF -C2342 vssa2 ro_complete_buffered_0/tapered_buf_0/out 38.35fF -C2343 gpio_analog[6] ro_complete_buffered_0/tapered_buf_0/out 5.71fF -C2344 gpio_noesd[6] ro_complete_buffered_0/tapered_buf_0/out 5.70fF -C2345 io_in_3v3[13] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2346 io_in[13] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2347 io_out[13] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2348 io_oeb[13] ro_complete_buffered_0/tapered_buf_0/out 0.61fF -C2349 vccd1 ro_complete_buffered_0/tapered_buf_0/out 39.84fF -C2350 vccd2 ro_complete_buffered_0/tapered_buf_0/out 38.46fF -C2351 io_analog[0] ro_complete_buffered_0/tapered_buf_0/out 19.99fF -C2352 io_analog[10] ro_complete_buffered_0/tapered_buf_0/out 19.36fF -C2353 io_analog[1] ro_complete_buffered_0/tapered_buf_0/out 13.17fF -C2354 io_analog[2] ro_complete_buffered_0/tapered_buf_0/out 12.57fF -C2355 io_analog[3] ro_complete_buffered_0/tapered_buf_0/out 12.83fF -C2356 io_clamp_high[0] ro_complete_buffered_0/tapered_buf_0/out 3.58fF -C2357 io_clamp_low[0] ro_complete_buffered_0/tapered_buf_0/out 3.58fF -C2358 io_clamp_high[1] ro_complete_buffered_0/tapered_buf_0/out 3.58fF -C2359 io_clamp_low[1] ro_complete_buffered_0/tapered_buf_0/out 3.58fF -C2360 io_clamp_high[2] ro_complete_buffered_0/tapered_buf_0/out 3.58fF -C2361 io_clamp_low[2] ro_complete_buffered_0/tapered_buf_0/out 3.58fF -C2362 io_analog[7] ro_complete_buffered_0/tapered_buf_0/out 12.74fF -C2363 io_analog[8] ro_complete_buffered_0/tapered_buf_0/out 13.08fF -C2364 io_analog[9] ro_complete_buffered_0/tapered_buf_0/out 13.08fF -C2365 user_irq[2] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2366 user_irq[1] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2367 user_irq[0] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2368 user_clock2 ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2369 la_oenb[127] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2370 la_data_out[127] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2371 la_data_in[127] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2372 la_oenb[126] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2373 la_data_out[126] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2374 la_data_in[126] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2375 la_oenb[125] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2376 la_data_out[125] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2377 la_data_in[125] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2378 la_oenb[124] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2379 la_data_out[124] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2380 la_data_in[124] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2381 la_oenb[123] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2382 la_data_out[123] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2383 la_data_in[123] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2384 la_oenb[122] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2385 la_data_out[122] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2386 la_data_in[122] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2387 la_oenb[121] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2388 la_data_out[121] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2389 la_data_in[121] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2390 la_oenb[120] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2391 la_data_out[120] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2392 la_data_in[120] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2393 la_oenb[119] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2394 la_data_out[119] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2395 la_data_in[119] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2396 la_oenb[118] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2397 la_data_out[118] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2398 la_data_in[118] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2399 la_oenb[117] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2400 la_data_out[117] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2401 la_data_in[117] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2402 la_oenb[116] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2403 la_data_out[116] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2404 la_data_in[116] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2405 la_oenb[115] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2406 la_data_out[115] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2407 la_data_in[115] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2408 la_oenb[114] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2409 la_data_out[114] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2410 la_data_in[114] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2411 la_oenb[113] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2412 la_data_out[113] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2413 la_data_in[113] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2414 la_oenb[112] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2415 la_data_out[112] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2416 la_data_in[112] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2417 la_oenb[111] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2418 la_data_out[111] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2419 la_data_in[111] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2420 la_oenb[110] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2421 la_data_out[110] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2422 la_data_in[110] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2423 la_oenb[109] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2424 la_data_out[109] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2425 la_data_in[109] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2426 la_oenb[108] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2427 la_data_out[108] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2428 la_data_in[108] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2429 la_oenb[107] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2430 la_data_out[107] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2431 la_data_in[107] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2432 la_oenb[106] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2433 la_data_out[106] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2434 la_data_in[106] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2435 la_oenb[105] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2436 la_data_out[105] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2437 la_data_in[105] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2438 la_oenb[104] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2439 la_data_out[104] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2440 la_data_in[104] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2441 la_oenb[103] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2442 la_data_out[103] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2443 la_data_in[103] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2444 la_oenb[102] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2445 la_data_out[102] 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ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2840 wbs_adr_i[3] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2841 wbs_sel_i[2] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2842 wbs_dat_o[2] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2843 wbs_dat_i[2] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2844 wbs_adr_i[2] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2845 wbs_sel_i[1] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2846 wbs_dat_o[1] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2847 wbs_dat_i[1] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2848 wbs_adr_i[1] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2849 wbs_sel_i[0] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2850 wbs_dat_o[0] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2851 wbs_dat_i[0] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2852 wbs_adr_i[0] ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2853 wbs_we_i ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2854 wbs_stb_i ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2855 wbs_cyc_i ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2856 wbs_ack_o ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2857 wb_rst_i ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2858 wb_clk_i ro_complete_buffered_0/tapered_buf_0/out 0.63fF -C2859 div_pd_buffered_0/tapered_buf_0/out ro_complete_buffered_0/tapered_buf_0/out 385.99fF -C2860 div_pd_buffered_0/tapered_buf_0/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C2861 div_pd_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C2862 div_pd_buffered_0/tapered_buf_0/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C2863 div_pd_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C2864 div_pd_buffered_0/tapered_buf_0/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C2865 div_pd_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C2866 div_pd_buffered_0/tapered_buf_0/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C2867 div_pd_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C2868 div_pd_buffered_0/tapered_buf_1/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C2869 div_pd_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C2870 div_pd_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C2871 div_pd_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C2872 div_pd_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C2873 div_pd_buffered_0/tapered_buf_1/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C2874 div_pd_buffered_0/tapered_buf_1/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C2875 div_pd_buffered_0/tapered_buf_1/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C2876 div_pd_buffered_0/tapered_buf_1/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C2877 div_pd_buffered_0/divider_0/and_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.74fF -C2878 div_pd_buffered_0/divider_0/and_0/B ro_complete_buffered_0/tapered_buf_0/out 2.25fF -C2879 div_pd_buffered_0/divider_0/and_0/A ro_complete_buffered_0/tapered_buf_0/out 2.19fF -C2880 div_pd_buffered_0/divider_0/and_0/out1 ro_complete_buffered_0/tapered_buf_0/out 2.93fF -C2881 div_pd_buffered_0/divider_0/tspc_2/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C2882 div_pd_buffered_0/divider_0/tspc_2/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C2883 div_pd_buffered_0/divider_0/tspc_2/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF -C2884 div_pd_buffered_0/divider_0/tspc_2/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C2885 div_pd_buffered_0/divider_0/nor_0/B ro_complete_buffered_0/tapered_buf_0/out 6.37fF -C2886 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING -C2887 div_pd_buffered_0/divider_0/tspc_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C2888 div_pd_buffered_0/divider_0/tspc_1/Q ro_complete_buffered_0/tapered_buf_0/out 3.12fF -C2889 div_pd_buffered_0/divider_0/tspc_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C2890 div_pd_buffered_0/divider_0/tspc_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF -C2891 div_pd_buffered_0/divider_0/tspc_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C2892 div_pd_buffered_0/divider_0/nor_1/B ro_complete_buffered_0/tapered_buf_0/out 7.05fF -C2893 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.15fF **FLOATING -C2894 div_pd_buffered_0/divider_0/tspc_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C2895 div_pd_buffered_0/divider_0/tspc_0/Q ro_complete_buffered_0/tapered_buf_0/out 3.14fF -C2896 div_pd_buffered_0/divider_0/tspc_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C2897 div_pd_buffered_0/divider_0/tspc_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF -C2898 div_pd_buffered_0/divider_0/tspc_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C2899 div_pd_buffered_0/divider_0/nor_1/A ro_complete_buffered_0/tapered_buf_0/out 7.04fF -C2900 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.15fF **FLOATING -C2901 div_pd_buffered_0/divider_0/clk ro_complete_buffered_0/tapered_buf_0/out 399.62fF -C2902 div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 ro_complete_buffered_0/tapered_buf_0/out 0.36fF -C2903 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D ro_complete_buffered_0/tapered_buf_0/out 2.64fF -C2904 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q ro_complete_buffered_0/tapered_buf_0/out 3.64fF -C2905 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q ro_complete_buffered_0/tapered_buf_0/out 3.61fF -C2906 div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 ro_complete_buffered_0/tapered_buf_0/out 0.36fF -C2907 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D ro_complete_buffered_0/tapered_buf_0/out 3.12fF -C2908 div_pd_buffered_0/divider_0/and_0/OUT ro_complete_buffered_0/tapered_buf_0/out 5.62fF -C2909 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C2910 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C2911 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF -C2912 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C2913 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING -C2914 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_complete_buffered_0/tapered_buf_0/out 2.11fF **FLOATING -C2915 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C2916 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C2917 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.48fF -C2918 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C2919 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING -C2920 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_complete_buffered_0/tapered_buf_0/out 4.22fF **FLOATING -C2921 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C2922 div_pd_buffered_0/divider_0/prescaler_0/Out ro_complete_buffered_0/tapered_buf_0/out 4.59fF -C2923 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C2924 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF -C2925 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C2926 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.16fF **FLOATING -C2927 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_complete_buffered_0/tapered_buf_0/out 2.11fF **FLOATING -C2928 div_pd_buffered_0/divider_0/nor_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF -C2929 div_pd_buffered_0/divider_0/nor_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF -C2930 div_pd_buffered_0/divider_0/mc2 ro_complete_buffered_0/tapered_buf_0/out 393.39fF -C2931 div_pd_buffered_0/pd_0/UP ro_complete_buffered_0/tapered_buf_0/out 6.08fF -C2932 div_pd_buffered_0/pd_0/and_pd_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.39fF -C2933 div_pd_buffered_0/pd_0/and_pd_0/Out1 ro_complete_buffered_0/tapered_buf_0/out 2.22fF -C2934 div_pd_buffered_0/pd_0/tspc_r_1/z5 ro_complete_buffered_0/tapered_buf_0/out 1.10fF -C2935 div_pd_buffered_0/pd_0/tspc_r_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 1.07fF -C2936 div_pd_buffered_0/pd_0/R ro_complete_buffered_0/tapered_buf_0/out 3.05fF -C2937 div_pd_buffered_0/pd_0/tspc_r_1/Qbar ro_complete_buffered_0/tapered_buf_0/out 0.79fF -C2938 div_pd_buffered_0/pd_0/tspc_r_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.22fF -C2939 div_pd_buffered_0/pd_0/tspc_r_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.67fF -C2940 div_pd_buffered_0/pd_0/DOWN ro_complete_buffered_0/tapered_buf_0/out 8.79fF -C2941 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF -C2942 div_pd_buffered_0/pd_0/tspc_r_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.12fF -C2943 div_pd_buffered_0/pd_0/DIV ro_complete_buffered_0/tapered_buf_0/out 6.57fF -C2944 div_pd_buffered_0/pd_0/tspc_r_0/z5 ro_complete_buffered_0/tapered_buf_0/out 1.10fF -C2945 div_pd_buffered_0/pd_0/tspc_r_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 1.07fF -C2946 div_pd_buffered_0/pd_0/tspc_r_0/Qbar ro_complete_buffered_0/tapered_buf_0/out 0.88fF -C2947 div_pd_buffered_0/pd_0/tspc_r_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.22fF -C2948 div_pd_buffered_0/pd_0/tspc_r_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.67fF -C2949 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF -C2950 div_pd_buffered_0/pd_0/tspc_r_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.12fF -C2951 div_pd_buffered_0/pd_0/REF ro_complete_buffered_0/tapered_buf_0/out 392.16fF -C2952 div_pd_buffered_0/tapered_buf_4/out ro_complete_buffered_0/tapered_buf_0/out 385.93fF -C2953 div_pd_buffered_0/tapered_buf_4/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C2954 div_pd_buffered_0/tapered_buf_4/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C2955 div_pd_buffered_0/tapered_buf_4/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C2956 div_pd_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C2957 div_pd_buffered_0/tapered_buf_4/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C2958 div_pd_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C2959 div_pd_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C2960 div_pd_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C2961 div_pd_buffered_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C2962 div_pd_buffered_0/tapered_buf_3/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C2963 div_pd_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C2964 div_pd_buffered_0/tapered_buf_3/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C2965 div_pd_buffered_0/tapered_buf_3/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C2966 div_pd_buffered_0/tapered_buf_3/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C2967 div_pd_buffered_0/tapered_buf_3/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C2968 div_pd_buffered_0/tapered_buf_3/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C2969 div_pd_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C2970 div_pd_buffered_0/tapered_buf_2/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C2971 div_pd_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C2972 div_pd_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C2973 div_pd_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C2974 div_pd_buffered_0/tapered_buf_2/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C2975 div_pd_buffered_0/tapered_buf_2/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C2976 div_pd_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C2977 div_pd_buffered_0/tapered_buf_2/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C2978 div_pd_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C2979 ro_complete_buffered_0/tapered_buf_0/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C2980 ro_complete_buffered_0/tapered_buf_0/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C2981 ro_complete_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 619.27fF **FLOATING -C2982 ro_complete_buffered_0/tapered_buf_0/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C2983 ro_complete_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C2984 ro_complete_buffered_0/tapered_buf_0/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C2985 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C2986 ro_complete_buffered_0/tapered_buf_0/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C2987 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C2988 ro_complete_buffered_0/tapered_buf_1/out ro_complete_buffered_0/tapered_buf_0/out 385.87fF -C2989 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C2990 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C2991 ro_complete_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C2992 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C2993 ro_complete_buffered_0/tapered_buf_1/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C2994 ro_complete_buffered_0/tapered_buf_1/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C2995 ro_complete_buffered_0/tapered_buf_1/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C2996 ro_complete_buffered_0/tapered_buf_1/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C2997 ro_complete_buffered_0/ro_complete_0/cbank_2/v ro_complete_buffered_0/tapered_buf_0/out 16.53fF -C2998 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin ro_complete_buffered_0/tapered_buf_0/out 0.78fF -C2999 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/tapered_buf_0/out 1.50fF -C3000 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin ro_complete_buffered_0/tapered_buf_0/out 1.30fF -C3001 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/tapered_buf_0/out 0.56fF -C3002 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/tapered_buf_0/out 1.14fF -C3003 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin ro_complete_buffered_0/tapered_buf_0/out 1.02fF -C3004 ro_complete_buffered_0/tapered_buf_1/in ro_complete_buffered_0/tapered_buf_0/out 26.54fF -C3005 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin ro_complete_buffered_0/tapered_buf_0/out 0.78fF -C3006 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/tapered_buf_0/out 416.45fF -C3007 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/tapered_buf_0/out 1.50fF -C3008 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/tapered_buf_0/out 412.13fF -C3009 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin ro_complete_buffered_0/tapered_buf_0/out 1.30fF -C3010 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/tapered_buf_0/out 402.70fF -C3011 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/tapered_buf_0/out 0.56fF -C3012 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/tapered_buf_0/out 407.26fF -C3013 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/tapered_buf_0/out 1.14fF -C3014 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/tapered_buf_0/out 398.93fF -C3015 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin ro_complete_buffered_0/tapered_buf_0/out 1.02fF -C3016 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_0/out 395.79fF -C3017 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/tapered_buf_0/out 15.13fF -C3018 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/tapered_buf_0/out 0.78fF -C3019 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/tapered_buf_0/out 1.50fF -C3020 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/tapered_buf_0/out 1.30fF -C3021 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/tapered_buf_0/out 0.56fF -C3022 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/tapered_buf_0/out 1.14fF -C3023 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/tapered_buf_0/out 1.02fF -C3024 ro_complete_buffered_0/tapered_buf_7/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C3025 ro_complete_buffered_0/tapered_buf_7/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3026 ro_complete_buffered_0/tapered_buf_7/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3027 ro_complete_buffered_0/tapered_buf_7/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3028 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3029 ro_complete_buffered_0/tapered_buf_7/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3030 ro_complete_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3031 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3032 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3033 ro_complete_buffered_0/tapered_buf_6/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C3034 ro_complete_buffered_0/tapered_buf_6/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3035 ro_complete_buffered_0/tapered_buf_6/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3036 ro_complete_buffered_0/tapered_buf_6/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3037 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3038 ro_complete_buffered_0/tapered_buf_6/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3039 ro_complete_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3040 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3041 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3042 ro_complete_buffered_0/tapered_buf_5/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C3043 ro_complete_buffered_0/tapered_buf_5/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3044 ro_complete_buffered_0/tapered_buf_5/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3045 ro_complete_buffered_0/tapered_buf_5/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3046 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3047 ro_complete_buffered_0/tapered_buf_5/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3048 ro_complete_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3049 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3050 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3051 ro_complete_buffered_0/tapered_buf_4/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C3052 ro_complete_buffered_0/tapered_buf_4/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3053 ro_complete_buffered_0/tapered_buf_4/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3054 ro_complete_buffered_0/tapered_buf_4/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3055 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3056 ro_complete_buffered_0/tapered_buf_4/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3057 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3058 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3059 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3060 ro_complete_buffered_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C3061 ro_complete_buffered_0/tapered_buf_3/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3062 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3063 ro_complete_buffered_0/tapered_buf_3/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3064 ro_complete_buffered_0/tapered_buf_3/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3065 ro_complete_buffered_0/tapered_buf_3/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3066 ro_complete_buffered_0/tapered_buf_3/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3067 ro_complete_buffered_0/tapered_buf_3/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3068 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3069 ro_complete_buffered_0/tapered_buf_2/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C3070 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3071 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3072 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3073 ro_complete_buffered_0/tapered_buf_2/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3074 ro_complete_buffered_0/tapered_buf_2/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3075 ro_complete_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3076 ro_complete_buffered_0/tapered_buf_2/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3077 ro_complete_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3078 divider_buffered_0/tapered_buf_0/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C3079 divider_buffered_0/tapered_buf_0/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3080 divider_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3081 divider_buffered_0/tapered_buf_0/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3082 divider_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3083 divider_buffered_0/tapered_buf_0/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3084 divider_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3085 divider_buffered_0/tapered_buf_0/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3086 divider_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3087 divider_buffered_0/tapered_buf_1/out ro_complete_buffered_0/tapered_buf_0/out 385.89fF -C3088 divider_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3089 divider_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3090 divider_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3091 divider_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3092 divider_buffered_0/tapered_buf_1/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3093 divider_buffered_0/tapered_buf_1/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3094 divider_buffered_0/tapered_buf_1/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3095 divider_buffered_0/tapered_buf_1/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3096 divider_buffered_0/divider_0/and_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.74fF -C3097 divider_buffered_0/divider_0/and_0/B ro_complete_buffered_0/tapered_buf_0/out 2.25fF -C3098 divider_buffered_0/divider_0/and_0/A ro_complete_buffered_0/tapered_buf_0/out 2.19fF -C3099 divider_buffered_0/divider_0/and_0/out1 ro_complete_buffered_0/tapered_buf_0/out 2.93fF -C3100 divider_buffered_0/divider_0/tspc_2/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C3101 divider_buffered_0/divider_0/Out ro_complete_buffered_0/tapered_buf_0/out 7.35fF -C3102 divider_buffered_0/divider_0/tspc_2/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C3103 divider_buffered_0/divider_0/tspc_2/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF -C3104 divider_buffered_0/divider_0/tspc_2/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C3105 divider_buffered_0/divider_0/nor_0/B ro_complete_buffered_0/tapered_buf_0/out 6.33fF -C3106 divider_buffered_0/divider_0/tspc_2/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING -C3107 divider_buffered_0/divider_0/tspc_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C3108 divider_buffered_0/divider_0/tspc_1/Q ro_complete_buffered_0/tapered_buf_0/out 3.12fF -C3109 divider_buffered_0/divider_0/tspc_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C3110 divider_buffered_0/divider_0/tspc_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF -C3111 divider_buffered_0/divider_0/tspc_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C3112 divider_buffered_0/divider_0/nor_1/B ro_complete_buffered_0/tapered_buf_0/out 7.05fF -C3113 divider_buffered_0/divider_0/tspc_1/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.15fF **FLOATING -C3114 divider_buffered_0/divider_0/tspc_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C3115 divider_buffered_0/divider_0/tspc_0/Q ro_complete_buffered_0/tapered_buf_0/out 3.14fF -C3116 divider_buffered_0/divider_0/tspc_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C3117 divider_buffered_0/divider_0/tspc_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF -C3118 divider_buffered_0/divider_0/tspc_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C3119 divider_buffered_0/divider_0/nor_1/A ro_complete_buffered_0/tapered_buf_0/out 7.04fF -C3120 divider_buffered_0/divider_0/tspc_0/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.15fF **FLOATING -C3121 divider_buffered_0/divider_0/clk ro_complete_buffered_0/tapered_buf_0/out 396.07fF -C3122 divider_buffered_0/divider_0/prescaler_0/nand_1/z1 ro_complete_buffered_0/tapered_buf_0/out 0.36fF -C3123 divider_buffered_0/divider_0/prescaler_0/tspc_0/D ro_complete_buffered_0/tapered_buf_0/out 2.64fF -C3124 divider_buffered_0/divider_0/prescaler_0/tspc_2/Q ro_complete_buffered_0/tapered_buf_0/out 3.70fF -C3125 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q ro_complete_buffered_0/tapered_buf_0/out 3.61fF -C3126 divider_buffered_0/divider_0/prescaler_0/nand_0/z1 ro_complete_buffered_0/tapered_buf_0/out 0.36fF -C3127 divider_buffered_0/divider_0/prescaler_0/tspc_2/D ro_complete_buffered_0/tapered_buf_0/out 3.12fF -C3128 divider_buffered_0/divider_0/and_0/OUT ro_complete_buffered_0/tapered_buf_0/out 5.62fF -C3129 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C3130 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C3131 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF -C3132 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C3133 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING -C3134 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_complete_buffered_0/tapered_buf_0/out 2.11fF **FLOATING -C3135 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C3136 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C3137 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.48fF -C3138 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C3139 divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING -C3140 divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_complete_buffered_0/tapered_buf_0/out 4.22fF **FLOATING -C3141 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C3142 divider_buffered_0/divider_0/prescaler_0/Out ro_complete_buffered_0/tapered_buf_0/out 4.59fF -C3143 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C3144 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF -C3145 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C3146 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.16fF **FLOATING -C3147 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_complete_buffered_0/tapered_buf_0/out 2.11fF **FLOATING -C3148 divider_buffered_0/divider_0/nor_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF -C3149 divider_buffered_0/divider_0/nor_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF -C3150 divider_buffered_0/divider_0/mc2 ro_complete_buffered_0/tapered_buf_0/out 393.27fF -C3151 divider_buffered_0/tapered_buf_2/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C3152 divider_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3153 divider_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3154 divider_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3155 divider_buffered_0/tapered_buf_2/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3156 divider_buffered_0/tapered_buf_2/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3157 divider_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3158 divider_buffered_0/tapered_buf_2/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3159 divider_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3160 pll_full_buffered2_0/pll_full_0/divider_0/and_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.65fF -C3161 pll_full_buffered2_0/pll_full_0/divider_0/and_0/B ro_complete_buffered_0/tapered_buf_0/out 2.45fF -C3162 pll_full_buffered2_0/pll_full_0/divider_0/and_0/A ro_complete_buffered_0/tapered_buf_0/out 2.35fF -C3163 pll_full_buffered2_0/pll_full_0/divider_0/and_0/out1 ro_complete_buffered_0/tapered_buf_0/out 2.99fF -C3164 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C3165 pll_full_buffered2_0/pll_full_0/div ro_complete_buffered_0/tapered_buf_0/out 32.99fF -C3166 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C3167 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF -C3168 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C3169 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B ro_complete_buffered_0/tapered_buf_0/out 6.48fF -C3170 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING -C3171 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C3172 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q ro_complete_buffered_0/tapered_buf_0/out 3.12fF -C3173 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C3174 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF -C3175 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C3176 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B ro_complete_buffered_0/tapered_buf_0/out 7.12fF -C3177 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.15fF **FLOATING -C3178 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C3179 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q ro_complete_buffered_0/tapered_buf_0/out 3.14fF -C3180 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C3181 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF -C3182 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C3183 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A ro_complete_buffered_0/tapered_buf_0/out 7.08fF -C3184 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.15fF **FLOATING -C3185 pll_full_buffered2_0/pll_full_0/vco ro_complete_buffered_0/tapered_buf_0/out 35.58fF -C3186 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/nand_1/z1 ro_complete_buffered_0/tapered_buf_0/out 0.36fF -C3187 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D ro_complete_buffered_0/tapered_buf_0/out 2.64fF -C3188 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q ro_complete_buffered_0/tapered_buf_0/out 3.72fF -C3189 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q ro_complete_buffered_0/tapered_buf_0/out 3.61fF -C3190 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/nand_0/z1 ro_complete_buffered_0/tapered_buf_0/out 0.36fF -C3191 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D ro_complete_buffered_0/tapered_buf_0/out 3.12fF -C3192 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT ro_complete_buffered_0/tapered_buf_0/out 5.67fF -C3193 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C3194 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C3195 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.19fF -C3196 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C3197 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.47fF **FLOATING -C3198 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_complete_buffered_0/tapered_buf_0/out 2.11fF **FLOATING -C3199 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C3200 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C3201 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.48fF -C3202 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C3203 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING -C3204 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# ro_complete_buffered_0/tapered_buf_0/out 4.22fF **FLOATING -C3205 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C3206 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out ro_complete_buffered_0/tapered_buf_0/out 4.59fF -C3207 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C3208 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF -C3209 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C3210 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.16fF **FLOATING -C3211 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_complete_buffered_0/tapered_buf_0/out 2.11fF **FLOATING -C3212 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF -C3213 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF -C3214 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v ro_complete_buffered_0/tapered_buf_0/out 16.43fF -C3215 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_5/vin ro_complete_buffered_0/tapered_buf_0/out 0.78fF -C3216 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/tapered_buf_0/out 1.50fF -C3217 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin ro_complete_buffered_0/tapered_buf_0/out 1.30fF -C3218 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/tapered_buf_0/out 0.56fF -C3219 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/tapered_buf_0/out 1.14fF -C3220 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin ro_complete_buffered_0/tapered_buf_0/out 1.02fF -C3221 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_5/vin ro_complete_buffered_0/tapered_buf_0/out 0.78fF -C3222 pll_full_buffered2_0/pll_full_0/ro_complete_0/a0 ro_complete_buffered_0/tapered_buf_0/out 5.35fF -C3223 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/tapered_buf_0/out 1.50fF -C3224 pll_full_buffered2_0/pll_full_0/ro_complete_0/a1 ro_complete_buffered_0/tapered_buf_0/out 6.54fF -C3225 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin ro_complete_buffered_0/tapered_buf_0/out 1.30fF -C3226 pll_full_buffered2_0/pll_full_0/ro_complete_0/a3 ro_complete_buffered_0/tapered_buf_0/out 5.96fF -C3227 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/tapered_buf_0/out 0.56fF -C3228 pll_full_buffered2_0/pll_full_0/ro_complete_0/a2 ro_complete_buffered_0/tapered_buf_0/out 5.21fF -C3229 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/tapered_buf_0/out 1.14fF -C3230 pll_full_buffered2_0/pll_full_0/ro_complete_0/a4 ro_complete_buffered_0/tapered_buf_0/out 5.81fF -C3231 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_0/vin ro_complete_buffered_0/tapered_buf_0/out 1.02fF -C3232 pll_full_buffered2_0/pll_full_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_0/out 6.74fF -C3233 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/tapered_buf_0/out 15.12fF -C3234 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/tapered_buf_0/out 0.78fF -C3235 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/tapered_buf_0/out 1.50fF -C3236 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/tapered_buf_0/out 1.30fF -C3237 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/tapered_buf_0/out 0.56fF -C3238 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/tapered_buf_0/out 1.14fF -C3239 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/tapered_buf_0/out 1.02fF -C3240 pll_full_buffered2_0/pll_full_0/filter_0/a_4216_n5230# ro_complete_buffered_0/tapered_buf_0/out 418.90fF **FLOATING -C3241 pll_full_buffered2_0/pll_full_0/filter_0/a_4216_n2998# ro_complete_buffered_0/tapered_buf_0/out 1.39fF **FLOATING -C3242 pll_full_buffered2_0/pll_full_0/cp_0/vbias ro_complete_buffered_0/tapered_buf_0/out 2.41fF -C3243 pll_full_buffered2_0/pll_full_0/cp_0/a_7110_n2840# ro_complete_buffered_0/tapered_buf_0/out 0.17fF **FLOATING -C3244 pll_full_buffered2_0/pll_full_0/cp_0/a_3060_n2840# ro_complete_buffered_0/tapered_buf_0/out 1.71fF **FLOATING -C3245 pll_full_buffered2_0/pll_full_0/cp_0/a_7110_0# ro_complete_buffered_0/tapered_buf_0/out 0.17fF **FLOATING -C3246 pll_full_buffered2_0/pll_full_0/cp_0/a_6370_0# ro_complete_buffered_0/tapered_buf_0/out 0.40fF **FLOATING -C3247 pll_full_buffered2_0/pll_full_0/cp_0/a_3060_0# ro_complete_buffered_0/tapered_buf_0/out 2.50fF **FLOATING -C3248 pll_full_buffered2_0/pll_full_0/cp_0/a_1710_0# ro_complete_buffered_0/tapered_buf_0/out 7.47fF **FLOATING -C3249 pll_full_buffered2_0/pll_full_0/cp_0/a_10_n50# ro_complete_buffered_0/tapered_buf_0/out 2.96fF **FLOATING -C3250 pll_full_buffered2_0/pll_full_0/pd_0/UP ro_complete_buffered_0/tapered_buf_0/out 4.55fF -C3251 pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.39fF -C3252 pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Out1 ro_complete_buffered_0/tapered_buf_0/out 2.22fF -C3253 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/z5 ro_complete_buffered_0/tapered_buf_0/out 1.10fF -C3254 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 1.07fF -C3255 pll_full_buffered2_0/pll_full_0/pd_0/R ro_complete_buffered_0/tapered_buf_0/out 3.05fF -C3256 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar ro_complete_buffered_0/tapered_buf_0/out 0.79fF -C3257 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.22fF -C3258 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.67fF -C3259 pll_full_buffered2_0/tapered_buf_2/in ro_complete_buffered_0/tapered_buf_0/out 24.92fF -C3260 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF -C3261 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.12fF -C3262 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/z5 ro_complete_buffered_0/tapered_buf_0/out 1.10fF -C3263 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 1.07fF -C3264 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar ro_complete_buffered_0/tapered_buf_0/out 0.88fF -C3265 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.22fF -C3266 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.67fF -C3267 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF -C3268 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.12fF -C3269 pll_full_buffered2_0/pll_full_0/ref ro_complete_buffered_0/tapered_buf_0/out 390.59fF -C3270 pll_full_buffered2_0/pll_full_0/cp_0/upbar ro_complete_buffered_0/tapered_buf_0/out 35.52fF -C3271 pll_full_buffered2_0/tapered_buf_0/out ro_complete_buffered_0/tapered_buf_0/out 385.87fF -C3272 pll_full_buffered2_0/tapered_buf_0/in ro_complete_buffered_0/tapered_buf_0/out 4.51fF -C3273 pll_full_buffered2_0/tapered_buf_0/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3274 pll_full_buffered2_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3275 pll_full_buffered2_0/tapered_buf_0/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3276 pll_full_buffered2_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3277 pll_full_buffered2_0/tapered_buf_0/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3278 pll_full_buffered2_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3279 pll_full_buffered2_0/tapered_buf_0/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3280 pll_full_buffered2_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3281 pll_full_buffered2_0/tapered_buf_1/out ro_complete_buffered_0/tapered_buf_0/out 385.89fF -C3282 pll_full_buffered2_0/tapered_buf_1/in ro_complete_buffered_0/tapered_buf_0/out 2.65fF -C3283 pll_full_buffered2_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3284 pll_full_buffered2_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3285 pll_full_buffered2_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3286 pll_full_buffered2_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3287 pll_full_buffered2_0/tapered_buf_1/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3288 pll_full_buffered2_0/tapered_buf_1/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3289 pll_full_buffered2_0/tapered_buf_1/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3290 pll_full_buffered2_0/tapered_buf_1/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3291 pll_full_buffered2_0/tapered_buf_5/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C3292 pll_full_buffered2_0/tapered_buf_5/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3293 pll_full_buffered2_0/tapered_buf_5/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3294 pll_full_buffered2_0/tapered_buf_5/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3295 pll_full_buffered2_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3296 pll_full_buffered2_0/tapered_buf_5/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3297 pll_full_buffered2_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3298 pll_full_buffered2_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3299 pll_full_buffered2_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3300 pll_full_buffered2_0/tapered_buf_4/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C3301 pll_full_buffered2_0/tapered_buf_4/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3302 pll_full_buffered2_0/tapered_buf_4/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 619.27fF **FLOATING -C3303 pll_full_buffered2_0/tapered_buf_4/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3304 pll_full_buffered2_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3305 pll_full_buffered2_0/tapered_buf_4/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3306 pll_full_buffered2_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3307 pll_full_buffered2_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3308 pll_full_buffered2_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3309 pll_full_buffered2_0/tapered_buf_3/out ro_complete_buffered_0/tapered_buf_0/out 385.90fF -C3310 pll_full_buffered2_0/tapered_buf_3/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3311 pll_full_buffered2_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3312 pll_full_buffered2_0/tapered_buf_3/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3313 pll_full_buffered2_0/tapered_buf_3/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3314 pll_full_buffered2_0/tapered_buf_3/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3315 pll_full_buffered2_0/tapered_buf_3/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3316 pll_full_buffered2_0/tapered_buf_3/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3317 pll_full_buffered2_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3318 pll_full_buffered2_0/tapered_buf_2/out ro_complete_buffered_0/tapered_buf_0/out 385.95fF -C3319 pll_full_buffered2_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3320 pll_full_buffered2_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3321 pll_full_buffered2_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3322 pll_full_buffered2_0/tapered_buf_2/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3323 pll_full_buffered2_0/tapered_buf_2/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3324 pll_full_buffered2_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3325 pll_full_buffered2_0/tapered_buf_2/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3326 pll_full_buffered2_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3327 ro_divider_buffered_0/tapered_buf_1/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C3328 ro_divider_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3329 ro_divider_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3330 ro_divider_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3331 ro_divider_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3332 ro_divider_buffered_0/tapered_buf_1/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3333 ro_divider_buffered_0/tapered_buf_1/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3334 ro_divider_buffered_0/tapered_buf_1/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3335 ro_divider_buffered_0/tapered_buf_1/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3336 ro_divider_buffered_0/tapered_buf_0/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C3337 ro_divider_buffered_0/tapered_buf_0/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3338 ro_divider_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3339 ro_divider_buffered_0/tapered_buf_0/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3340 ro_divider_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3341 ro_divider_buffered_0/tapered_buf_0/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3342 ro_divider_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3343 ro_divider_buffered_0/tapered_buf_0/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3344 ro_divider_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3345 ro_divider_buffered_0/divider_0/and_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.74fF -C3346 ro_divider_buffered_0/divider_0/and_0/B ro_complete_buffered_0/tapered_buf_0/out 2.25fF -C3347 ro_divider_buffered_0/divider_0/and_0/A ro_complete_buffered_0/tapered_buf_0/out 2.19fF -C3348 ro_divider_buffered_0/divider_0/and_0/out1 ro_complete_buffered_0/tapered_buf_0/out 2.93fF -C3349 ro_divider_buffered_0/divider_0/tspc_2/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C3350 ro_divider_buffered_0/divider_0/Out ro_complete_buffered_0/tapered_buf_0/out 399.57fF -C3351 ro_divider_buffered_0/divider_0/tspc_2/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C3352 ro_divider_buffered_0/divider_0/tspc_2/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF -C3353 ro_divider_buffered_0/divider_0/tspc_2/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C3354 ro_divider_buffered_0/divider_0/nor_0/B ro_complete_buffered_0/tapered_buf_0/out 6.33fF -C3355 ro_divider_buffered_0/divider_0/tspc_2/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING -C3356 ro_divider_buffered_0/divider_0/tspc_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C3357 ro_divider_buffered_0/divider_0/tspc_1/Q ro_complete_buffered_0/tapered_buf_0/out 3.12fF -C3358 ro_divider_buffered_0/divider_0/tspc_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C3359 ro_divider_buffered_0/divider_0/tspc_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF -C3360 ro_divider_buffered_0/divider_0/tspc_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C3361 ro_divider_buffered_0/divider_0/nor_1/B ro_complete_buffered_0/tapered_buf_0/out 7.05fF -C3362 ro_divider_buffered_0/divider_0/tspc_1/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.15fF **FLOATING -C3363 ro_divider_buffered_0/divider_0/tspc_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C3364 ro_divider_buffered_0/divider_0/tspc_0/Q ro_complete_buffered_0/tapered_buf_0/out 3.14fF -C3365 ro_divider_buffered_0/divider_0/tspc_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C3366 ro_divider_buffered_0/divider_0/tspc_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF -C3367 ro_divider_buffered_0/divider_0/tspc_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C3368 ro_divider_buffered_0/divider_0/nor_1/A ro_complete_buffered_0/tapered_buf_0/out 7.04fF -C3369 ro_divider_buffered_0/divider_0/tspc_0/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.15fF **FLOATING -C3370 ro_divider_buffered_0/divider_0/clk ro_complete_buffered_0/tapered_buf_0/out 23.46fF -C3371 ro_divider_buffered_0/divider_0/prescaler_0/nand_1/z1 ro_complete_buffered_0/tapered_buf_0/out 0.36fF -C3372 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D ro_complete_buffered_0/tapered_buf_0/out 2.64fF -C3373 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q ro_complete_buffered_0/tapered_buf_0/out 3.69fF -C3374 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q ro_complete_buffered_0/tapered_buf_0/out 3.61fF -C3375 ro_divider_buffered_0/divider_0/prescaler_0/nand_0/z1 ro_complete_buffered_0/tapered_buf_0/out 0.36fF -C3376 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D ro_complete_buffered_0/tapered_buf_0/out 3.12fF -C3377 ro_divider_buffered_0/divider_0/and_0/OUT ro_complete_buffered_0/tapered_buf_0/out 5.62fF -C3378 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C3379 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C3380 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF -C3381 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C3382 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING -C3383 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_complete_buffered_0/tapered_buf_0/out 2.11fF **FLOATING -C3384 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C3385 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C3386 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.48fF -C3387 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C3388 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING -C3389 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# ro_complete_buffered_0/tapered_buf_0/out 4.22fF **FLOATING -C3390 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C3391 ro_divider_buffered_0/divider_0/prescaler_0/Out ro_complete_buffered_0/tapered_buf_0/out 4.59fF -C3392 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C3393 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF -C3394 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C3395 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.16fF **FLOATING -C3396 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_complete_buffered_0/tapered_buf_0/out 2.11fF **FLOATING -C3397 ro_divider_buffered_0/divider_0/nor_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF -C3398 ro_divider_buffered_0/divider_0/nor_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF -C3399 ro_divider_buffered_0/divider_0/mc2 ro_complete_buffered_0/tapered_buf_0/out 397.55fF -C3400 ro_divider_buffered_0/ro_complete_0/cbank_2/v ro_complete_buffered_0/tapered_buf_0/out 16.53fF -C3401 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_5/vin ro_complete_buffered_0/tapered_buf_0/out 0.78fF -C3402 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/tapered_buf_0/out 1.50fF -C3403 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_2/vin ro_complete_buffered_0/tapered_buf_0/out 1.30fF -C3404 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/tapered_buf_0/out 0.56fF -C3405 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/tapered_buf_0/out 1.14fF -C3406 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_0/vin ro_complete_buffered_0/tapered_buf_0/out 1.02fF -C3407 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_5/vin ro_complete_buffered_0/tapered_buf_0/out 0.78fF -C3408 ro_divider_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/tapered_buf_0/out 416.44fF -C3409 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/tapered_buf_0/out 1.50fF -C3410 ro_divider_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/tapered_buf_0/out 412.08fF -C3411 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_2/vin ro_complete_buffered_0/tapered_buf_0/out 1.30fF -C3412 ro_divider_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/tapered_buf_0/out 402.75fF -C3413 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/tapered_buf_0/out 0.56fF -C3414 ro_divider_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/tapered_buf_0/out 407.13fF -C3415 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/tapered_buf_0/out 1.14fF -C3416 ro_divider_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/tapered_buf_0/out 398.91fF -C3417 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_0/vin ro_complete_buffered_0/tapered_buf_0/out 1.02fF -C3418 ro_divider_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_0/out 395.69fF -C3419 ro_divider_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/tapered_buf_0/out 15.13fF -C3420 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/tapered_buf_0/out 0.78fF -C3421 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/tapered_buf_0/out 1.50fF -C3422 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/tapered_buf_0/out 1.30fF -C3423 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/tapered_buf_0/out 0.56fF -C3424 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/tapered_buf_0/out 1.14fF -C3425 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/tapered_buf_0/out 1.02fF -C3426 ro_divider_buffered_0/tapered_buf_8/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C3427 ro_divider_buffered_0/tapered_buf_8/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3428 ro_divider_buffered_0/tapered_buf_8/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3429 ro_divider_buffered_0/tapered_buf_8/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3430 ro_divider_buffered_0/tapered_buf_8/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3431 ro_divider_buffered_0/tapered_buf_8/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3432 ro_divider_buffered_0/tapered_buf_8/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3433 ro_divider_buffered_0/tapered_buf_8/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3434 ro_divider_buffered_0/tapered_buf_8/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3435 ro_divider_buffered_0/tapered_buf_7/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C3436 ro_divider_buffered_0/tapered_buf_7/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3437 ro_divider_buffered_0/tapered_buf_7/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3438 ro_divider_buffered_0/tapered_buf_7/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3439 ro_divider_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3440 ro_divider_buffered_0/tapered_buf_7/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3441 ro_divider_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3442 ro_divider_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3443 ro_divider_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3444 ro_divider_buffered_0/tapered_buf_6/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C3445 ro_divider_buffered_0/tapered_buf_6/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3446 ro_divider_buffered_0/tapered_buf_6/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3447 ro_divider_buffered_0/tapered_buf_6/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3448 ro_divider_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3449 ro_divider_buffered_0/tapered_buf_6/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3450 ro_divider_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3451 ro_divider_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3452 ro_divider_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3453 ro_divider_buffered_0/tapered_buf_5/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C3454 ro_divider_buffered_0/tapered_buf_5/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3455 ro_divider_buffered_0/tapered_buf_5/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3456 ro_divider_buffered_0/tapered_buf_5/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3457 ro_divider_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3458 ro_divider_buffered_0/tapered_buf_5/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3459 ro_divider_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3460 ro_divider_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3461 ro_divider_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3462 ro_divider_buffered_0/tapered_buf_4/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C3463 ro_divider_buffered_0/tapered_buf_4/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3464 ro_divider_buffered_0/tapered_buf_4/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3465 ro_divider_buffered_0/tapered_buf_4/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3466 ro_divider_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3467 ro_divider_buffered_0/tapered_buf_4/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3468 ro_divider_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3469 ro_divider_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3470 ro_divider_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3471 ro_divider_buffered_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C3472 ro_divider_buffered_0/tapered_buf_3/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3473 ro_divider_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3474 ro_divider_buffered_0/tapered_buf_3/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3475 ro_divider_buffered_0/tapered_buf_3/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3476 ro_divider_buffered_0/tapered_buf_3/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3477 ro_divider_buffered_0/tapered_buf_3/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3478 ro_divider_buffered_0/tapered_buf_3/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3479 ro_divider_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3480 ro_divider_buffered_0/tapered_buf_2/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C3481 ro_divider_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3482 ro_divider_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 619.27fF **FLOATING -C3483 ro_divider_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3484 ro_divider_buffered_0/tapered_buf_2/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3485 ro_divider_buffered_0/tapered_buf_2/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3486 ro_divider_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3487 ro_divider_buffered_0/tapered_buf_2/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3488 ro_divider_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3489 filter_buffered_0/v ro_complete_buffered_0/tapered_buf_0/out 391.91fF -C3490 filter_buffered_0/tapered_buf_0/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3491 filter_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3492 filter_buffered_0/tapered_buf_0/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3493 filter_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3494 filter_buffered_0/tapered_buf_0/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3495 filter_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3496 filter_buffered_0/tapered_buf_0/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3497 filter_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3498 filter_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3499 filter_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3500 filter_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3501 filter_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3502 filter_buffered_0/tapered_buf_1/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3503 filter_buffered_0/tapered_buf_1/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3504 filter_buffered_0/tapered_buf_1/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3505 filter_buffered_0/tapered_buf_1/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3506 filter_buffered_0/filter_0/v ro_complete_buffered_0/tapered_buf_0/out 476.54fF -C3507 filter_buffered_0/filter_0/a_4216_n5230# ro_complete_buffered_0/tapered_buf_0/out 418.47fF **FLOATING -C3508 filter_buffered_0/filter_0/a_4216_n2998# ro_complete_buffered_0/tapered_buf_0/out 1.03fF **FLOATING -C3509 cp_buffered_0/cp_0/down ro_complete_buffered_0/tapered_buf_0/out 397.14fF -C3510 cp_buffered_0/tapered_buf_0/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C3511 cp_buffered_0/tapered_buf_0/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3512 cp_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3513 cp_buffered_0/tapered_buf_0/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3514 cp_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3515 cp_buffered_0/tapered_buf_0/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3516 cp_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3517 cp_buffered_0/tapered_buf_0/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3518 cp_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3519 cp_buffered_0/cp_0/out ro_complete_buffered_0/tapered_buf_0/out 397.36fF -C3520 cp_buffered_0/tapered_buf_1/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C3521 cp_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3522 cp_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3523 cp_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3524 cp_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3525 cp_buffered_0/tapered_buf_1/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3526 cp_buffered_0/tapered_buf_1/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3527 cp_buffered_0/tapered_buf_1/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3528 cp_buffered_0/tapered_buf_1/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3529 cp_buffered_0/cp_0/upbar ro_complete_buffered_0/tapered_buf_0/out 393.41fF -C3530 cp_buffered_0/cp_0/a_7110_n2840# ro_complete_buffered_0/tapered_buf_0/out 0.17fF **FLOATING -C3531 cp_buffered_0/cp_0/a_3060_n2840# ro_complete_buffered_0/tapered_buf_0/out 1.71fF **FLOATING -C3532 cp_buffered_0/cp_0/a_7110_0# ro_complete_buffered_0/tapered_buf_0/out 0.17fF **FLOATING -C3533 cp_buffered_0/cp_0/a_6370_0# ro_complete_buffered_0/tapered_buf_0/out 0.40fF **FLOATING -C3534 cp_buffered_0/cp_0/a_3060_0# ro_complete_buffered_0/tapered_buf_0/out 1.65fF **FLOATING -C3535 cp_buffered_0/cp_0/a_1710_0# ro_complete_buffered_0/tapered_buf_0/out 5.76fF **FLOATING -C3536 cp_buffered_0/cp_0/a_1710_n2840# ro_complete_buffered_0/tapered_buf_0/out 5.24fF **FLOATING -C3537 cp_buffered_0/cp_0/a_10_n50# ro_complete_buffered_0/tapered_buf_0/out 3.19fF **FLOATING -C3538 cp_buffered_0/tapered_buf_2/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C3539 cp_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3540 cp_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3541 cp_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3542 cp_buffered_0/tapered_buf_2/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3543 cp_buffered_0/tapered_buf_2/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3544 cp_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3545 cp_buffered_0/tapered_buf_2/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3546 cp_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3547 pll_full_buffered1_0/pll_full_0/divider_0/and_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.65fF -C3548 pll_full_buffered1_0/pll_full_0/divider_0/and_0/B ro_complete_buffered_0/tapered_buf_0/out 2.45fF -C3549 pll_full_buffered1_0/pll_full_0/divider_0/and_0/A ro_complete_buffered_0/tapered_buf_0/out 2.35fF -C3550 pll_full_buffered1_0/pll_full_0/divider_0/and_0/out1 ro_complete_buffered_0/tapered_buf_0/out 2.99fF -C3551 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C3552 pll_full_buffered1_0/pll_full_0/div ro_complete_buffered_0/tapered_buf_0/out 15.26fF -C3553 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C3554 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF -C3555 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C3556 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B ro_complete_buffered_0/tapered_buf_0/out 6.48fF -C3557 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING -C3558 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C3559 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q ro_complete_buffered_0/tapered_buf_0/out 3.12fF -C3560 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C3561 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF -C3562 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C3563 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B ro_complete_buffered_0/tapered_buf_0/out 7.12fF -C3564 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.15fF **FLOATING -C3565 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C3566 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q ro_complete_buffered_0/tapered_buf_0/out 3.14fF -C3567 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C3568 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF -C3569 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C3570 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A ro_complete_buffered_0/tapered_buf_0/out 7.08fF -C3571 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.15fF **FLOATING -C3572 pll_full_buffered1_0/pll_full_0/vco ro_complete_buffered_0/tapered_buf_0/out 45.48fF -C3573 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/nand_1/z1 ro_complete_buffered_0/tapered_buf_0/out 0.36fF -C3574 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D ro_complete_buffered_0/tapered_buf_0/out 2.64fF -C3575 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q ro_complete_buffered_0/tapered_buf_0/out 3.72fF -C3576 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q ro_complete_buffered_0/tapered_buf_0/out 3.61fF -C3577 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/nand_0/z1 ro_complete_buffered_0/tapered_buf_0/out 0.36fF -C3578 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D ro_complete_buffered_0/tapered_buf_0/out 3.12fF -C3579 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT ro_complete_buffered_0/tapered_buf_0/out 5.67fF -C3580 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C3581 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C3582 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.19fF -C3583 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C3584 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.47fF **FLOATING -C3585 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_complete_buffered_0/tapered_buf_0/out 2.11fF **FLOATING -C3586 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C3587 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C3588 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.48fF -C3589 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C3590 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.14fF **FLOATING -C3591 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# ro_complete_buffered_0/tapered_buf_0/out 4.22fF **FLOATING -C3592 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 0.86fF -C3593 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out ro_complete_buffered_0/tapered_buf_0/out 4.59fF -C3594 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.26fF -C3595 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.46fF -C3596 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.99fF -C3597 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_complete_buffered_0/tapered_buf_0/out 1.16fF **FLOATING -C3598 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_complete_buffered_0/tapered_buf_0/out 2.11fF **FLOATING -C3599 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF -C3600 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF -C3601 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v ro_complete_buffered_0/tapered_buf_0/out 16.43fF -C3602 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_5/vin ro_complete_buffered_0/tapered_buf_0/out 0.78fF -C3603 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/tapered_buf_0/out 1.50fF -C3604 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin ro_complete_buffered_0/tapered_buf_0/out 1.30fF -C3605 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/tapered_buf_0/out 0.56fF -C3606 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/tapered_buf_0/out 1.14fF -C3607 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin ro_complete_buffered_0/tapered_buf_0/out 1.02fF -C3608 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_5/vin ro_complete_buffered_0/tapered_buf_0/out 0.78fF -C3609 pll_full_buffered1_0/pll_full_0/ro_complete_0/a0 ro_complete_buffered_0/tapered_buf_0/out 5.35fF -C3610 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/tapered_buf_0/out 1.50fF -C3611 pll_full_buffered1_0/pll_full_0/ro_complete_0/a1 ro_complete_buffered_0/tapered_buf_0/out 6.54fF -C3612 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin ro_complete_buffered_0/tapered_buf_0/out 1.30fF -C3613 pll_full_buffered1_0/pll_full_0/ro_complete_0/a3 ro_complete_buffered_0/tapered_buf_0/out 5.96fF -C3614 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/tapered_buf_0/out 0.56fF -C3615 pll_full_buffered1_0/pll_full_0/ro_complete_0/a2 ro_complete_buffered_0/tapered_buf_0/out 5.21fF -C3616 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/tapered_buf_0/out 1.14fF -C3617 pll_full_buffered1_0/pll_full_0/ro_complete_0/a4 ro_complete_buffered_0/tapered_buf_0/out 5.81fF -C3618 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_0/vin ro_complete_buffered_0/tapered_buf_0/out 1.02fF -C3619 pll_full_buffered1_0/pll_full_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_0/out 6.74fF -C3620 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/tapered_buf_0/out 15.12fF -C3621 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/tapered_buf_0/out 0.78fF -C3622 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/tapered_buf_0/out 1.50fF -C3623 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/tapered_buf_0/out 1.30fF -C3624 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/tapered_buf_0/out 0.56fF -C3625 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/tapered_buf_0/out 1.14fF -C3626 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/tapered_buf_0/out 1.02fF -C3627 pll_full_buffered1_0/pll_full_0/filter_0/a_4216_n5230# ro_complete_buffered_0/tapered_buf_0/out 418.90fF **FLOATING -C3628 pll_full_buffered1_0/pll_full_0/filter_0/a_4216_n2998# ro_complete_buffered_0/tapered_buf_0/out 1.39fF **FLOATING -C3629 pll_full_buffered1_0/pll_full_0/cp_0/vbias ro_complete_buffered_0/tapered_buf_0/out 2.41fF -C3630 pll_full_buffered1_0/pll_full_0/cp_0/a_7110_n2840# ro_complete_buffered_0/tapered_buf_0/out 0.17fF **FLOATING -C3631 pll_full_buffered1_0/pll_full_0/cp_0/a_3060_n2840# ro_complete_buffered_0/tapered_buf_0/out 1.71fF **FLOATING -C3632 pll_full_buffered1_0/pll_full_0/cp_0/a_7110_0# ro_complete_buffered_0/tapered_buf_0/out 0.17fF **FLOATING -C3633 pll_full_buffered1_0/pll_full_0/cp_0/a_6370_0# ro_complete_buffered_0/tapered_buf_0/out 0.40fF **FLOATING -C3634 pll_full_buffered1_0/pll_full_0/cp_0/a_3060_0# ro_complete_buffered_0/tapered_buf_0/out 2.50fF **FLOATING -C3635 pll_full_buffered1_0/pll_full_0/cp_0/a_1710_0# ro_complete_buffered_0/tapered_buf_0/out 7.47fF **FLOATING -C3636 pll_full_buffered1_0/pll_full_0/cp_0/a_10_n50# ro_complete_buffered_0/tapered_buf_0/out 2.96fF **FLOATING -C3637 pll_full_buffered1_0/pll_full_0/pd_0/UP ro_complete_buffered_0/tapered_buf_0/out 4.55fF -C3638 pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.39fF -C3639 pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Out1 ro_complete_buffered_0/tapered_buf_0/out 2.22fF -C3640 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/z5 ro_complete_buffered_0/tapered_buf_0/out 1.10fF -C3641 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z4 ro_complete_buffered_0/tapered_buf_0/out 1.07fF -C3642 pll_full_buffered1_0/pll_full_0/pd_0/R ro_complete_buffered_0/tapered_buf_0/out 3.05fF -C3643 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar ro_complete_buffered_0/tapered_buf_0/out 0.79fF -C3644 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.22fF -C3645 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.67fF -C3646 pll_full_buffered1_0/pll_full_0/pd_0/DOWN ro_complete_buffered_0/tapered_buf_0/out 7.30fF -C3647 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF -C3648 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.12fF -C3649 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/z5 ro_complete_buffered_0/tapered_buf_0/out 1.10fF -C3650 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z4 ro_complete_buffered_0/tapered_buf_0/out 1.07fF -C3651 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar ro_complete_buffered_0/tapered_buf_0/out 0.88fF -C3652 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z2 ro_complete_buffered_0/tapered_buf_0/out 1.22fF -C3653 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z1 ro_complete_buffered_0/tapered_buf_0/out 0.67fF -C3654 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar1 ro_complete_buffered_0/tapered_buf_0/out 1.34fF -C3655 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 ro_complete_buffered_0/tapered_buf_0/out 2.12fF -C3656 pll_full_buffered1_0/pll_full_0/ref ro_complete_buffered_0/tapered_buf_0/out 391.18fF -C3657 pll_full_buffered1_0/pll_full_0/cp_0/upbar ro_complete_buffered_0/tapered_buf_0/out 15.33fF -C3658 pll_full_buffered1_0/tapered_buf_0/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C3659 pll_full_buffered1_0/tapered_buf_0/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3660 pll_full_buffered1_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3661 pll_full_buffered1_0/tapered_buf_0/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3662 pll_full_buffered1_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3663 pll_full_buffered1_0/tapered_buf_0/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3664 pll_full_buffered1_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3665 pll_full_buffered1_0/tapered_buf_0/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3666 pll_full_buffered1_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3667 pll_full_buffered1_0/tapered_buf_1/in ro_complete_buffered_0/tapered_buf_0/out 1.13fF -C3668 pll_full_buffered1_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3669 pll_full_buffered1_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 619.27fF **FLOATING -C3670 pll_full_buffered1_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3671 pll_full_buffered1_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3672 pll_full_buffered1_0/tapered_buf_1/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3673 pll_full_buffered1_0/tapered_buf_1/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3674 pll_full_buffered1_0/tapered_buf_1/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3675 pll_full_buffered1_0/tapered_buf_1/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING -C3676 pll_full_buffered1_0/tapered_buf_2/out ro_complete_buffered_0/tapered_buf_0/out 385.90fF -C3677 pll_full_buffered1_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/out 0.06fF **FLOATING -C3678 pll_full_buffered1_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_0/out 592.97fF **FLOATING -C3679 pll_full_buffered1_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_0/out 0.15fF **FLOATING -C3680 pll_full_buffered1_0/tapered_buf_2/a_n10_230# ro_complete_buffered_0/tapered_buf_0/out 0.13fF **FLOATING -C3681 pll_full_buffered1_0/tapered_buf_2/a_4670_0# ro_complete_buffered_0/tapered_buf_0/out 252.41fF **FLOATING -C3682 pll_full_buffered1_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_0/out 63.61fF **FLOATING -C3683 pll_full_buffered1_0/tapered_buf_2/a_580_0# ro_complete_buffered_0/tapered_buf_0/out 16.76fF **FLOATING -C3684 pll_full_buffered1_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_0/out 4.09fF **FLOATING +Xpll_full_0 vdd pll_full_0/div pll_full_0/vco pll_full_0/ref vssa1 vssa1 pll_full +C2544 io_analog[4] vdd 43.96fF +C2545 io_analog[5] vdd 44.13fF +C2546 io_analog[6] vdd 43.46fF +C2547 io_in_3v3[0] vdd 0.61fF +C2548 io_oeb[26] vdd 0.61fF +C2549 io_in[0] vdd 0.61fF +C2550 io_out[26] vdd 0.61fF +C2551 io_out[0] vdd 0.61fF +C2552 io_in[26] vdd 0.61fF +C2553 io_oeb[0] vdd 0.61fF +C2554 io_in_3v3[26] vdd 0.61fF +C2555 io_in_3v3[1] vdd 0.61fF +C2556 io_oeb[25] vdd 0.61fF +C2557 io_in[1] vdd 0.61fF +C2558 io_out[25] vdd 0.61fF +C2559 io_out[1] vdd 0.61fF +C2560 io_in[25] vdd 0.61fF +C2561 io_oeb[1] vdd 0.61fF +C2562 io_in_3v3[25] vdd 0.61fF +C2563 io_in_3v3[2] vdd 0.61fF +C2564 io_oeb[24] vdd 0.61fF +C2565 io_in[2] vdd 0.61fF +C2566 io_out[24] vdd 0.61fF +C2567 io_out[2] vdd 0.61fF +C2568 io_in[24] vdd 0.61fF +C2569 io_oeb[2] vdd 0.61fF +C2570 io_in_3v3[24] vdd 0.61fF +C2571 io_in_3v3[3] vdd 0.61fF +C2572 gpio_noesd[17] vdd 2.32fF +C2573 io_in[3] vdd 0.61fF +C2574 gpio_analog[17] vdd 2.30fF +C2575 io_out[3] vdd 0.61fF +C2576 io_oeb[3] vdd 0.61fF +C2577 io_in_3v3[4] vdd 0.61fF +C2578 io_in[4] vdd 0.61fF +C2579 io_out[4] vdd 0.61fF +C2580 io_oeb[4] vdd 0.61fF +C2581 io_oeb[23] vdd 0.61fF +C2582 io_out[23] vdd 0.61fF +C2583 io_in[23] vdd 0.61fF +C2584 io_in_3v3[23] vdd 0.61fF +C2585 gpio_noesd[16] vdd 2.30fF +C2586 gpio_analog[16] vdd 2.30fF +C2587 io_in_3v3[5] vdd 0.61fF +C2588 io_in[5] vdd 0.61fF +C2589 io_out[5] vdd 0.61fF +C2590 io_oeb[5] vdd 0.61fF +C2591 io_oeb[22] vdd 0.61fF +C2592 io_out[22] vdd 0.61fF +C2593 io_in[22] vdd 0.61fF +C2594 io_in_3v3[22] vdd 0.61fF +C2595 gpio_noesd[15] vdd 2.31fF +C2596 gpio_analog[15] vdd 2.30fF +C2597 io_in_3v3[6] vdd 0.61fF +C2598 io_in[6] vdd 0.61fF +C2599 io_out[6] vdd 0.61fF +C2600 io_oeb[6] vdd 0.61fF +C2601 io_oeb[21] vdd 0.61fF +C2602 io_out[21] vdd 0.61fF +C2603 io_in[21] vdd 0.61fF +C2604 io_in_3v3[21] vdd 0.61fF +C2605 gpio_noesd[14] vdd 2.30fF +C2606 gpio_analog[14] vdd 2.29fF +C2607 vssd2 vdd 38.54fF +C2608 vssd1 vdd 13.04fF +C2609 vdda2 vdd 38.30fF +C2610 io_oeb[20] vdd 0.61fF +C2611 io_out[20] vdd 0.61fF +C2612 io_in[20] vdd 0.61fF +C2613 io_in_3v3[20] vdd 0.61fF +C2614 gpio_noesd[13] vdd 2.31fF +C2615 gpio_analog[13] vdd 2.30fF +C2616 gpio_analog[0] vdd 0.61fF +C2617 gpio_noesd[0] vdd 0.61fF +C2618 io_in_3v3[7] vdd 0.61fF +C2619 io_in[7] vdd 0.61fF +C2620 io_out[7] vdd 0.61fF +C2621 io_oeb[7] vdd 0.61fF +C2622 io_oeb[19] vdd 0.61fF +C2623 io_out[19] vdd 0.61fF +C2624 io_in[19] vdd 0.61fF +C2625 io_in_3v3[19] vdd 0.61fF +C2626 gpio_noesd[12] vdd 2.32fF +C2627 gpio_analog[12] vdd 2.30fF +C2628 gpio_analog[1] vdd 0.61fF +C2629 gpio_noesd[1] vdd 0.61fF +C2630 io_in_3v3[8] vdd 0.61fF +C2631 io_in[8] vdd 0.61fF +C2632 io_out[8] vdd 0.61fF +C2633 io_oeb[8] vdd 0.61fF +C2634 io_oeb[18] vdd 0.61fF +C2635 io_out[18] vdd 0.61fF +C2636 io_in[18] vdd 0.61fF +C2637 io_in_3v3[18] vdd 0.61fF +C2638 gpio_noesd[11] vdd 2.30fF +C2639 gpio_analog[11] vdd 2.29fF +C2640 gpio_analog[2] vdd 0.61fF +C2641 gpio_noesd[2] vdd 0.61fF +C2642 io_in_3v3[9] vdd 0.61fF +C2643 io_in[9] vdd 0.61fF +C2644 io_out[9] vdd 0.61fF +C2645 io_oeb[9] vdd 0.61fF +C2646 io_oeb[17] vdd 0.61fF +C2647 io_out[17] vdd 0.61fF +C2648 io_in[17] vdd 0.61fF +C2649 io_in_3v3[17] vdd 0.61fF +C2650 gpio_noesd[10] vdd 2.31fF +C2651 gpio_analog[10] vdd 2.29fF +C2652 gpio_analog[3] vdd 0.61fF +C2653 gpio_noesd[3] vdd 0.61fF +C2654 io_in_3v3[10] vdd 0.61fF +C2655 io_in[10] vdd 0.61fF +C2656 io_out[10] vdd 0.61fF +C2657 io_oeb[10] vdd 0.61fF +C2658 io_oeb[16] vdd 0.61fF +C2659 io_out[16] vdd 0.61fF +C2660 io_in[16] vdd 0.61fF +C2661 io_in_3v3[16] vdd 0.61fF +C2662 gpio_noesd[9] vdd 2.28fF +C2663 gpio_analog[9] vdd 2.28fF +C2664 gpio_analog[4] vdd 0.61fF +C2665 gpio_noesd[4] vdd 0.61fF +C2666 io_in_3v3[11] vdd 0.61fF +C2667 io_in[11] vdd 0.61fF +C2668 io_out[11] vdd 0.61fF +C2669 io_oeb[11] vdd 0.61fF +C2670 io_oeb[15] vdd 0.61fF +C2671 io_out[15] vdd 0.61fF +C2672 io_in[15] vdd 0.61fF +C2673 io_in_3v3[15] vdd 0.61fF +C2674 gpio_noesd[8] vdd 2.28fF +C2675 gpio_analog[8] vdd 2.26fF +C2676 gpio_analog[5] vdd 0.61fF +C2677 gpio_noesd[5] vdd 0.61fF +C2678 io_in_3v3[12] vdd 0.61fF +C2679 io_in[12] vdd 0.61fF +C2680 io_out[12] vdd 0.61fF +C2681 io_oeb[12] vdd 0.61fF +C2682 io_oeb[14] vdd 0.61fF +C2683 io_out[14] vdd 0.61fF +C2684 io_in[14] vdd 0.61fF +C2685 io_in_3v3[14] vdd 0.61fF +C2686 gpio_noesd[7] vdd 2.30fF +C2687 gpio_analog[7] vdd 2.28fF +C2688 vssa2 vdd 38.35fF +C2689 gpio_analog[6] vdd 5.71fF +C2690 gpio_noesd[6] vdd 5.70fF +C2691 io_in_3v3[13] vdd 0.61fF +C2692 io_in[13] vdd 0.61fF +C2693 io_out[13] vdd 0.61fF +C2694 io_oeb[13] vdd 0.61fF +C2695 vccd1 vdd 39.84fF +C2696 vccd2 vdd 38.46fF +C2697 io_analog[0] vdd 19.99fF +C2698 io_analog[10] vdd 19.36fF +C2699 io_analog[1] vdd 13.17fF +C2700 io_analog[2] vdd 12.57fF +C2701 io_analog[3] vdd 12.83fF +C2702 io_clamp_high[0] vdd 3.58fF +C2703 io_clamp_low[0] vdd 3.58fF +C2704 io_clamp_high[1] vdd 3.58fF +C2705 io_clamp_low[1] vdd 3.58fF +C2706 io_clamp_high[2] vdd 3.58fF +C2707 io_clamp_low[2] vdd 3.58fF +C2708 io_analog[7] vdd 12.74fF +C2709 io_analog[8] vdd 13.08fF +C2710 io_analog[9] vdd 13.08fF +C2711 user_irq[2] vdd 0.63fF +C2712 user_irq[1] vdd 0.63fF +C2713 user_irq[0] vdd 0.63fF +C2714 user_clock2 vdd 0.63fF +C2715 la_oenb[127] vdd 0.63fF +C2716 la_data_out[127] vdd 0.63fF +C2717 la_data_in[127] vdd 0.63fF +C2718 la_oenb[126] vdd 0.63fF +C2719 la_data_out[126] vdd 0.63fF +C2720 la_data_in[126] vdd 0.63fF +C2721 la_oenb[125] vdd 0.63fF +C2722 la_data_out[125] vdd 0.63fF +C2723 la_data_in[125] vdd 0.63fF +C2724 la_oenb[124] vdd 0.63fF +C2725 la_data_out[124] vdd 0.63fF +C2726 la_data_in[124] vdd 0.63fF +C2727 la_oenb[123] vdd 0.63fF +C2728 la_data_out[123] vdd 0.63fF +C2729 la_data_in[123] vdd 0.63fF +C2730 la_oenb[122] vdd 0.63fF +C2731 la_data_out[122] vdd 0.63fF +C2732 la_data_in[122] vdd 0.63fF +C2733 la_oenb[121] vdd 0.63fF +C2734 la_data_out[121] vdd 0.63fF +C2735 la_data_in[121] vdd 0.63fF +C2736 la_oenb[120] vdd 0.63fF +C2737 la_data_out[120] vdd 0.63fF +C2738 la_data_in[120] vdd 0.63fF +C2739 la_oenb[119] vdd 0.63fF +C2740 la_data_out[119] vdd 0.63fF +C2741 la_data_in[119] vdd 0.63fF +C2742 la_oenb[118] vdd 0.63fF +C2743 la_data_out[118] vdd 0.63fF +C2744 la_data_in[118] vdd 0.63fF +C2745 la_oenb[117] vdd 0.63fF +C2746 la_data_out[117] vdd 0.63fF +C2747 la_data_in[117] vdd 0.63fF +C2748 la_oenb[116] vdd 0.63fF +C2749 la_data_out[116] vdd 0.63fF +C2750 la_data_in[116] vdd 0.63fF +C2751 la_oenb[115] vdd 0.63fF +C2752 la_data_out[115] vdd 0.63fF +C2753 la_data_in[115] vdd 0.63fF +C2754 la_oenb[114] vdd 0.63fF +C2755 la_data_out[114] vdd 0.63fF +C2756 la_data_in[114] vdd 0.63fF +C2757 la_oenb[113] vdd 0.63fF +C2758 la_data_out[113] vdd 0.63fF +C2759 la_data_in[113] vdd 0.63fF +C2760 la_oenb[112] vdd 0.63fF +C2761 la_data_out[112] vdd 0.63fF +C2762 la_data_in[112] vdd 0.63fF +C2763 la_oenb[111] vdd 0.63fF +C2764 la_data_out[111] vdd 0.63fF +C2765 la_data_in[111] vdd 0.63fF +C2766 la_oenb[110] vdd 0.63fF +C2767 la_data_out[110] vdd 0.63fF +C2768 la_data_in[110] vdd 0.63fF +C2769 la_oenb[109] vdd 0.63fF +C2770 la_data_out[109] vdd 0.63fF +C2771 la_data_in[109] vdd 0.63fF +C2772 la_oenb[108] vdd 0.63fF +C2773 la_data_out[108] vdd 0.63fF +C2774 la_data_in[108] vdd 0.63fF +C2775 la_oenb[107] vdd 0.63fF +C2776 la_data_out[107] vdd 0.63fF +C2777 la_data_in[107] vdd 0.63fF +C2778 la_oenb[106] vdd 0.63fF +C2779 la_data_out[106] vdd 0.63fF +C2780 la_data_in[106] vdd 0.63fF +C2781 la_oenb[105] vdd 0.63fF +C2782 la_data_out[105] vdd 0.63fF +C2783 la_data_in[105] vdd 0.63fF +C2784 la_oenb[104] vdd 0.63fF +C2785 la_data_out[104] vdd 0.63fF +C2786 la_data_in[104] vdd 0.63fF +C2787 la_oenb[103] vdd 0.63fF +C2788 la_data_out[103] vdd 0.63fF +C2789 la_data_in[103] vdd 0.63fF +C2790 la_oenb[102] vdd 0.63fF +C2791 la_data_out[102] vdd 0.63fF +C2792 la_data_in[102] vdd 0.63fF +C2793 la_oenb[101] vdd 0.63fF +C2794 la_data_out[101] vdd 0.63fF +C2795 la_data_in[101] vdd 0.63fF +C2796 la_oenb[100] vdd 0.63fF +C2797 la_data_out[100] vdd 0.63fF +C2798 la_data_in[100] vdd 0.63fF +C2799 la_oenb[99] vdd 0.63fF +C2800 la_data_out[99] vdd 0.63fF +C2801 la_data_in[99] vdd 0.63fF +C2802 la_oenb[98] vdd 0.63fF +C2803 la_data_out[98] vdd 0.63fF +C2804 la_data_in[98] vdd 0.63fF +C2805 la_oenb[97] vdd 0.63fF +C2806 la_data_out[97] vdd 0.63fF +C2807 la_data_in[97] vdd 0.63fF +C2808 la_oenb[96] vdd 0.63fF +C2809 la_data_out[96] vdd 0.63fF +C2810 la_data_in[96] vdd 0.63fF +C2811 la_oenb[95] vdd 0.63fF +C2812 la_data_out[95] vdd 0.63fF +C2813 la_data_in[95] vdd 0.63fF +C2814 la_oenb[94] vdd 0.63fF +C2815 la_data_out[94] vdd 0.63fF +C2816 la_data_in[94] vdd 0.63fF +C2817 la_oenb[93] vdd 0.63fF +C2818 la_data_out[93] vdd 0.63fF +C2819 la_data_in[93] vdd 0.63fF +C2820 la_oenb[92] vdd 0.63fF +C2821 la_data_out[92] vdd 0.63fF +C2822 la_data_in[92] vdd 0.63fF +C2823 la_oenb[91] vdd 0.63fF +C2824 la_data_out[91] vdd 0.63fF +C2825 la_data_in[91] vdd 0.63fF +C2826 la_oenb[90] vdd 0.63fF +C2827 la_data_out[90] vdd 0.63fF +C2828 la_data_in[90] vdd 0.63fF +C2829 la_oenb[89] vdd 0.63fF +C2830 la_data_out[89] vdd 0.63fF +C2831 la_data_in[89] vdd 0.63fF +C2832 la_oenb[88] vdd 0.63fF +C2833 la_data_out[88] vdd 0.63fF +C2834 la_data_in[88] vdd 0.63fF +C2835 la_oenb[87] vdd 0.63fF +C2836 la_data_out[87] vdd 0.63fF +C2837 la_data_in[87] vdd 0.63fF +C2838 la_oenb[86] vdd 0.63fF +C2839 la_data_out[86] vdd 0.63fF +C2840 la_data_in[86] vdd 0.63fF +C2841 la_oenb[85] vdd 0.63fF +C2842 la_data_out[85] vdd 0.63fF +C2843 la_data_in[85] vdd 0.63fF +C2844 la_oenb[84] vdd 0.63fF +C2845 la_data_out[84] vdd 0.63fF +C2846 la_data_in[84] vdd 0.63fF +C2847 la_oenb[83] vdd 0.63fF +C2848 la_data_out[83] vdd 0.63fF +C2849 la_data_in[83] vdd 0.63fF +C2850 la_oenb[82] vdd 0.63fF +C2851 la_data_out[82] vdd 0.63fF +C2852 la_data_in[82] vdd 0.63fF +C2853 la_oenb[81] vdd 0.63fF +C2854 la_data_out[81] vdd 0.63fF +C2855 la_data_in[81] vdd 0.63fF +C2856 la_oenb[80] vdd 0.63fF +C2857 la_data_out[80] vdd 0.63fF +C2858 la_data_in[80] vdd 0.63fF +C2859 la_oenb[79] vdd 0.63fF +C2860 la_data_out[79] vdd 0.63fF +C2861 la_data_in[79] vdd 0.63fF +C2862 la_oenb[78] vdd 0.63fF +C2863 la_data_out[78] vdd 0.63fF +C2864 la_data_in[78] vdd 0.63fF +C2865 la_oenb[77] vdd 0.63fF +C2866 la_data_out[77] vdd 0.63fF +C2867 la_data_in[77] vdd 0.63fF +C2868 la_oenb[76] vdd 0.63fF +C2869 la_data_out[76] vdd 0.63fF +C2870 la_data_in[76] vdd 0.63fF +C2871 la_oenb[75] vdd 0.63fF +C2872 la_data_out[75] vdd 0.63fF +C2873 la_data_in[75] vdd 0.63fF +C2874 la_oenb[74] vdd 0.63fF +C2875 la_data_out[74] vdd 0.63fF +C2876 la_data_in[74] vdd 0.63fF +C2877 la_oenb[73] vdd 0.63fF +C2878 la_data_out[73] vdd 0.63fF +C2879 la_data_in[73] vdd 0.63fF +C2880 la_oenb[72] vdd 0.63fF +C2881 la_data_out[72] vdd 0.63fF +C2882 la_data_in[72] vdd 0.63fF +C2883 la_oenb[71] vdd 0.63fF +C2884 la_data_out[71] vdd 0.63fF +C2885 la_data_in[71] vdd 0.63fF +C2886 la_oenb[70] vdd 0.63fF +C2887 la_data_out[70] vdd 0.63fF +C2888 la_data_in[70] vdd 0.63fF +C2889 la_oenb[69] vdd 0.63fF +C2890 la_data_out[69] vdd 0.63fF +C2891 la_data_in[69] vdd 0.63fF +C2892 la_oenb[68] vdd 0.63fF +C2893 la_data_out[68] vdd 0.63fF +C2894 la_data_in[68] vdd 0.63fF +C2895 la_oenb[67] vdd 0.63fF +C2896 la_data_out[67] vdd 0.63fF +C2897 la_data_in[67] vdd 0.63fF +C2898 la_oenb[66] vdd 0.63fF +C2899 la_data_out[66] vdd 0.63fF +C2900 la_data_in[66] vdd 0.63fF +C2901 la_oenb[65] vdd 0.63fF +C2902 la_data_out[65] vdd 0.63fF +C2903 la_data_in[65] vdd 0.63fF +C2904 la_oenb[64] vdd 0.63fF +C2905 la_data_out[64] vdd 0.63fF +C2906 la_data_in[64] vdd 0.63fF +C2907 la_oenb[63] vdd 0.63fF +C2908 la_data_out[63] vdd 0.63fF +C2909 la_data_in[63] vdd 0.63fF +C2910 la_oenb[62] vdd 0.63fF +C2911 la_data_out[62] vdd 0.63fF +C2912 la_data_in[62] vdd 0.63fF +C2913 la_oenb[61] vdd 0.63fF +C2914 la_data_out[61] vdd 0.63fF +C2915 la_data_in[61] vdd 0.63fF +C2916 la_oenb[60] vdd 0.63fF +C2917 la_data_out[60] vdd 0.63fF +C2918 la_data_in[60] vdd 0.63fF +C2919 la_oenb[59] vdd 0.63fF +C2920 la_data_out[59] vdd 0.63fF +C2921 la_data_in[59] vdd 0.63fF +C2922 la_oenb[58] vdd 0.63fF +C2923 la_data_out[58] vdd 0.63fF +C2924 la_data_in[58] vdd 0.63fF +C2925 la_oenb[57] vdd 0.63fF +C2926 la_data_out[57] vdd 0.63fF +C2927 la_data_in[57] vdd 0.63fF +C2928 la_oenb[56] vdd 0.63fF +C2929 la_data_out[56] vdd 0.63fF +C2930 la_data_in[56] vdd 0.63fF +C2931 la_oenb[55] vdd 0.63fF +C2932 la_data_out[55] vdd 0.63fF +C2933 la_data_in[55] vdd 0.63fF +C2934 la_oenb[54] vdd 0.63fF +C2935 la_data_out[54] vdd 0.63fF +C2936 la_data_in[54] vdd 0.63fF +C2937 la_oenb[53] vdd 0.63fF +C2938 la_data_out[53] vdd 0.63fF +C2939 la_data_in[53] vdd 0.63fF +C2940 la_oenb[52] vdd 0.63fF +C2941 la_data_out[52] vdd 0.63fF +C2942 la_data_in[52] vdd 0.63fF +C2943 la_oenb[51] vdd 0.63fF +C2944 la_data_out[51] vdd 0.63fF +C2945 la_data_in[51] vdd 0.63fF +C2946 la_oenb[50] vdd 0.63fF +C2947 la_data_out[50] vdd 0.63fF +C2948 la_data_in[50] vdd 0.63fF +C2949 la_oenb[49] vdd 0.63fF +C2950 la_data_out[49] vdd 0.63fF +C2951 la_data_in[49] vdd 0.63fF +C2952 la_oenb[48] vdd 0.63fF +C2953 la_data_out[48] vdd 0.63fF +C2954 la_data_in[48] vdd 0.63fF +C2955 la_oenb[47] vdd 0.63fF +C2956 la_data_out[47] vdd 0.63fF +C2957 la_data_in[47] vdd 0.63fF +C2958 la_oenb[46] vdd 0.63fF +C2959 la_data_out[46] vdd 0.63fF +C2960 la_data_in[46] vdd 0.63fF +C2961 la_oenb[45] vdd 0.63fF +C2962 la_data_out[45] vdd 0.63fF +C2963 la_data_in[45] vdd 0.63fF +C2964 la_oenb[44] vdd 0.63fF +C2965 la_data_out[44] vdd 0.63fF +C2966 la_data_in[44] vdd 0.63fF +C2967 la_oenb[43] vdd 0.63fF +C2968 la_data_out[43] vdd 0.63fF +C2969 la_data_in[43] vdd 0.63fF +C2970 la_oenb[42] vdd 0.63fF +C2971 la_data_out[42] vdd 0.63fF +C2972 la_data_in[42] vdd 0.63fF +C2973 la_oenb[41] vdd 0.63fF +C2974 la_data_out[41] vdd 0.63fF +C2975 la_data_in[41] vdd 0.63fF +C2976 la_oenb[40] vdd 0.63fF +C2977 la_data_out[40] vdd 0.63fF +C2978 la_data_in[40] vdd 0.63fF +C2979 la_oenb[39] vdd 0.63fF +C2980 la_data_out[39] vdd 0.63fF +C2981 la_data_in[39] vdd 0.63fF +C2982 la_oenb[38] vdd 0.63fF +C2983 la_data_out[38] vdd 0.63fF +C2984 la_data_in[38] vdd 0.63fF +C2985 la_oenb[37] vdd 0.63fF +C2986 la_data_out[37] vdd 0.63fF +C2987 la_data_in[37] vdd 0.63fF +C2988 la_oenb[36] vdd 0.63fF +C2989 la_data_out[36] vdd 0.63fF +C2990 la_data_in[36] vdd 0.63fF +C2991 la_oenb[35] vdd 0.63fF +C2992 la_data_out[35] vdd 0.63fF +C2993 la_data_in[35] vdd 0.63fF +C2994 la_oenb[34] vdd 0.63fF +C2995 la_data_out[34] vdd 0.63fF +C2996 la_data_in[34] vdd 0.63fF +C2997 la_oenb[33] vdd 0.63fF +C2998 la_data_out[33] vdd 0.63fF +C2999 la_data_in[33] vdd 0.63fF +C3000 la_oenb[32] vdd 0.63fF +C3001 la_data_out[32] vdd 0.63fF +C3002 la_data_in[32] vdd 0.63fF +C3003 la_oenb[31] vdd 0.63fF +C3004 la_data_out[31] vdd 0.63fF +C3005 la_data_in[31] vdd 0.63fF +C3006 la_oenb[30] vdd 0.63fF +C3007 la_data_out[30] vdd 0.63fF +C3008 la_data_in[30] vdd 0.63fF +C3009 la_oenb[29] vdd 0.63fF +C3010 la_data_out[29] vdd 0.63fF +C3011 la_data_in[29] vdd 0.63fF +C3012 la_oenb[28] vdd 0.63fF +C3013 la_data_out[28] vdd 0.63fF +C3014 la_data_in[28] vdd 0.63fF +C3015 la_oenb[27] vdd 0.63fF +C3016 la_data_out[27] vdd 0.63fF +C3017 la_data_in[27] vdd 0.63fF +C3018 la_oenb[26] vdd 0.63fF +C3019 la_data_out[26] vdd 0.63fF +C3020 la_data_in[26] vdd 0.63fF +C3021 la_oenb[25] vdd 0.63fF +C3022 la_data_out[25] vdd 0.63fF +C3023 la_data_in[25] vdd 0.63fF +C3024 la_oenb[24] vdd 0.63fF +C3025 la_data_out[24] vdd 0.63fF +C3026 la_data_in[24] vdd 0.63fF +C3027 la_oenb[23] vdd 0.63fF +C3028 la_data_out[23] vdd 0.63fF +C3029 la_data_in[23] vdd 0.63fF +C3030 la_oenb[22] vdd 0.63fF +C3031 la_data_out[22] vdd 0.63fF +C3032 la_data_in[22] vdd 0.63fF +C3033 la_oenb[21] vdd 0.63fF +C3034 la_data_out[21] vdd 0.63fF +C3035 la_data_in[21] vdd 0.63fF +C3036 la_oenb[20] vdd 0.63fF +C3037 la_data_out[20] vdd 0.63fF +C3038 la_data_in[20] vdd 0.63fF +C3039 la_oenb[19] vdd 0.63fF +C3040 la_data_out[19] vdd 0.63fF +C3041 la_data_in[19] vdd 0.63fF +C3042 la_oenb[18] vdd 0.63fF +C3043 la_data_out[18] vdd 0.63fF +C3044 la_data_in[18] vdd 0.63fF +C3045 la_oenb[17] vdd 0.63fF +C3046 la_data_out[17] vdd 0.63fF +C3047 la_data_in[17] vdd 0.63fF +C3048 la_oenb[16] vdd 0.63fF +C3049 la_data_out[16] vdd 0.63fF +C3050 la_data_in[16] vdd 0.63fF +C3051 la_oenb[15] vdd 0.63fF +C3052 la_data_out[15] vdd 0.63fF +C3053 la_data_in[15] vdd 0.63fF +C3054 la_oenb[14] vdd 0.63fF +C3055 la_data_out[14] vdd 0.63fF +C3056 la_data_in[14] vdd 0.63fF +C3057 la_oenb[13] vdd 0.63fF +C3058 la_data_out[13] vdd 0.63fF +C3059 la_data_in[13] vdd 0.63fF +C3060 la_oenb[12] vdd 0.63fF +C3061 la_data_out[12] vdd 0.63fF +C3062 la_data_in[12] vdd 0.63fF +C3063 la_oenb[11] vdd 0.63fF +C3064 la_data_out[11] vdd 0.63fF +C3065 la_data_in[11] vdd 0.63fF +C3066 la_oenb[10] vdd 0.63fF +C3067 la_data_out[10] vdd 0.63fF +C3068 la_data_in[10] vdd 0.63fF +C3069 la_oenb[9] vdd 0.63fF +C3070 la_data_out[9] vdd 0.63fF +C3071 la_data_in[9] vdd 0.63fF +C3072 la_oenb[8] vdd 0.63fF +C3073 la_data_out[8] vdd 0.63fF +C3074 la_data_in[8] vdd 0.63fF +C3075 la_oenb[7] vdd 0.63fF +C3076 la_data_out[7] vdd 0.63fF +C3077 la_data_in[7] vdd 0.63fF +C3078 la_oenb[6] vdd 0.63fF +C3079 la_data_out[6] vdd 0.63fF +C3080 la_data_in[6] vdd 0.63fF +C3081 la_oenb[5] vdd 0.63fF +C3082 la_data_out[5] vdd 0.63fF +C3083 la_data_in[5] vdd 0.63fF +C3084 la_oenb[4] vdd 0.63fF +C3085 la_data_out[4] vdd 0.63fF +C3086 la_data_in[4] vdd 0.63fF +C3087 la_oenb[3] vdd 0.63fF +C3088 la_data_out[3] vdd 0.63fF +C3089 la_data_in[3] vdd 0.63fF +C3090 la_oenb[2] vdd 0.63fF +C3091 la_data_out[2] vdd 0.63fF +C3092 la_data_in[2] vdd 0.63fF +C3093 la_oenb[1] vdd 0.63fF +C3094 la_data_out[1] vdd 0.63fF +C3095 la_data_in[1] vdd 0.63fF +C3096 la_oenb[0] vdd 0.63fF +C3097 la_data_out[0] vdd 0.63fF +C3098 la_data_in[0] vdd 0.63fF +C3099 wbs_dat_o[31] vdd 0.63fF +C3100 wbs_dat_i[31] vdd 0.63fF +C3101 wbs_adr_i[31] vdd 0.63fF +C3102 wbs_dat_o[30] vdd 0.63fF +C3103 wbs_dat_i[30] vdd 0.63fF +C3104 wbs_adr_i[30] vdd 0.63fF +C3105 wbs_dat_o[29] vdd 0.63fF +C3106 wbs_dat_i[29] vdd 0.63fF +C3107 wbs_adr_i[29] vdd 0.63fF +C3108 wbs_dat_o[28] vdd 0.63fF +C3109 wbs_dat_i[28] vdd 0.63fF +C3110 wbs_adr_i[28] vdd 0.63fF +C3111 wbs_dat_o[27] vdd 0.63fF +C3112 wbs_dat_i[27] vdd 0.63fF +C3113 wbs_adr_i[27] vdd 0.63fF +C3114 wbs_dat_o[26] vdd 0.63fF +C3115 wbs_dat_i[26] vdd 0.63fF +C3116 wbs_adr_i[26] vdd 0.63fF +C3117 wbs_dat_o[25] vdd 0.63fF +C3118 wbs_dat_i[25] vdd 0.63fF +C3119 wbs_adr_i[25] vdd 0.63fF +C3120 wbs_dat_o[24] vdd 0.63fF +C3121 wbs_dat_i[24] vdd 0.63fF +C3122 wbs_adr_i[24] vdd 0.63fF +C3123 wbs_dat_o[23] vdd 0.63fF +C3124 wbs_dat_i[23] vdd 0.63fF +C3125 wbs_adr_i[23] vdd 0.63fF +C3126 wbs_dat_o[22] vdd 0.63fF +C3127 wbs_dat_i[22] vdd 0.63fF +C3128 wbs_adr_i[22] vdd 0.63fF +C3129 wbs_dat_o[21] vdd 0.63fF +C3130 wbs_dat_i[21] vdd 0.63fF +C3131 wbs_adr_i[21] vdd 0.63fF +C3132 wbs_dat_o[20] vdd 0.63fF +C3133 wbs_dat_i[20] vdd 0.63fF +C3134 wbs_adr_i[20] vdd 0.63fF +C3135 wbs_dat_o[19] vdd 0.63fF +C3136 wbs_dat_i[19] vdd 0.63fF +C3137 wbs_adr_i[19] vdd 0.63fF +C3138 wbs_dat_o[18] vdd 0.63fF +C3139 wbs_dat_i[18] vdd 0.63fF +C3140 wbs_adr_i[18] vdd 0.63fF +C3141 wbs_dat_o[17] vdd 0.63fF +C3142 wbs_dat_i[17] vdd 0.63fF +C3143 wbs_adr_i[17] vdd 0.63fF +C3144 wbs_dat_o[16] vdd 0.63fF +C3145 wbs_dat_i[16] vdd 0.63fF +C3146 wbs_adr_i[16] vdd 0.63fF +C3147 wbs_dat_o[15] vdd 0.63fF +C3148 wbs_dat_i[15] vdd 0.63fF +C3149 wbs_adr_i[15] vdd 0.63fF +C3150 wbs_dat_o[14] vdd 0.63fF +C3151 wbs_dat_i[14] vdd 0.63fF +C3152 wbs_adr_i[14] vdd 0.63fF +C3153 wbs_dat_o[13] vdd 0.63fF +C3154 wbs_dat_i[13] vdd 0.63fF +C3155 wbs_adr_i[13] vdd 0.63fF +C3156 wbs_dat_o[12] vdd 0.63fF +C3157 wbs_dat_i[12] vdd 0.63fF +C3158 wbs_adr_i[12] vdd 0.63fF +C3159 wbs_dat_o[11] vdd 0.63fF +C3160 wbs_dat_i[11] vdd 0.63fF +C3161 wbs_adr_i[11] vdd 0.63fF +C3162 wbs_dat_o[10] vdd 0.63fF +C3163 wbs_dat_i[10] vdd 0.63fF +C3164 wbs_adr_i[10] vdd 0.63fF +C3165 wbs_dat_o[9] vdd 0.63fF +C3166 wbs_dat_i[9] vdd 0.63fF +C3167 wbs_adr_i[9] vdd 0.63fF +C3168 wbs_dat_o[8] vdd 0.63fF +C3169 wbs_dat_i[8] vdd 0.63fF +C3170 wbs_adr_i[8] vdd 0.63fF +C3171 wbs_dat_o[7] vdd 0.63fF +C3172 wbs_dat_i[7] vdd 0.63fF +C3173 wbs_adr_i[7] vdd 0.63fF +C3174 wbs_dat_o[6] vdd 0.63fF +C3175 wbs_dat_i[6] vdd 0.63fF +C3176 wbs_adr_i[6] vdd 0.63fF +C3177 wbs_dat_o[5] vdd 0.63fF +C3178 wbs_dat_i[5] vdd 0.63fF +C3179 wbs_adr_i[5] vdd 0.63fF +C3180 wbs_dat_o[4] vdd 0.63fF +C3181 wbs_dat_i[4] vdd 0.63fF +C3182 wbs_adr_i[4] vdd 0.63fF +C3183 wbs_sel_i[3] vdd 0.63fF +C3184 wbs_dat_o[3] vdd 0.63fF +C3185 wbs_dat_i[3] vdd 0.63fF +C3186 wbs_adr_i[3] vdd 0.63fF +C3187 wbs_sel_i[2] vdd 0.63fF +C3188 wbs_dat_o[2] vdd 0.63fF +C3189 wbs_dat_i[2] vdd 0.63fF +C3190 wbs_adr_i[2] vdd 0.63fF +C3191 wbs_sel_i[1] vdd 0.63fF +C3192 wbs_dat_o[1] vdd 0.63fF +C3193 wbs_dat_i[1] vdd 0.63fF +C3194 wbs_adr_i[1] vdd 0.63fF +C3195 wbs_sel_i[0] vdd 0.63fF +C3196 wbs_dat_o[0] vdd 0.63fF +C3197 wbs_dat_i[0] vdd 0.63fF +C3198 wbs_adr_i[0] vdd 0.63fF +C3199 wbs_we_i vdd 0.63fF +C3200 wbs_stb_i vdd 0.63fF +C3201 wbs_cyc_i vdd 0.63fF +C3202 wbs_ack_o vdd 0.63fF +C3203 wb_rst_i vdd 0.63fF +C3204 wb_clk_i vdd 0.63fF +C3205 pll_full_0/divider_0/and_0/Z1 vdd 0.65fF +C3206 pll_full_0/divider_0/and_0/B vdd 2.45fF +C3207 pll_full_0/divider_0/and_0/A vdd 2.35fF +C3208 pll_full_0/divider_0/and_0/out1 vdd 2.99fF +C3209 pll_full_0/divider_0/tspc_2/Z4 vdd 0.86fF +C3210 pll_full_0/div vdd 14.91fF +C3211 pll_full_0/divider_0/tspc_2/Z3 vdd 2.26fF +C3212 pll_full_0/divider_0/tspc_2/Z2 vdd 1.46fF +C3213 pll_full_0/divider_0/tspc_2/Z1 vdd 0.99fF +C3214 pll_full_0/divider_0/nor_0/B vdd 6.48fF +C3215 pll_full_0/divider_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING +C3216 pll_full_0/divider_0/tspc_1/Z4 vdd 0.86fF +C3217 pll_full_0/divider_0/tspc_1/Q vdd 3.12fF +C3218 pll_full_0/divider_0/tspc_1/Z3 vdd 2.26fF +C3219 pll_full_0/divider_0/tspc_1/Z2 vdd 1.46fF +C3220 pll_full_0/divider_0/tspc_1/Z1 vdd 0.99fF +C3221 pll_full_0/divider_0/nor_1/B vdd 7.12fF +C3222 pll_full_0/divider_0/tspc_1/a_630_n680# vdd 1.15fF **FLOATING +C3223 pll_full_0/divider_0/tspc_0/Z4 vdd 0.86fF +C3224 pll_full_0/divider_0/tspc_0/Q vdd 3.14fF +C3225 pll_full_0/divider_0/tspc_0/Z3 vdd 2.26fF +C3226 pll_full_0/divider_0/tspc_0/Z2 vdd 1.46fF +C3227 pll_full_0/divider_0/tspc_0/Z1 vdd 0.99fF +C3228 pll_full_0/divider_0/nor_1/A vdd 7.08fF +C3229 pll_full_0/divider_0/tspc_0/a_630_n680# vdd 1.15fF **FLOATING +C3230 pll_full_0/vco vdd 35.24fF +C3231 pll_full_0/divider_0/prescaler_0/nand_1/z1 vdd 0.36fF +C3232 pll_full_0/divider_0/prescaler_0/tspc_0/D vdd 2.64fF +C3233 pll_full_0/divider_0/prescaler_0/tspc_2/Q vdd 3.72fF +C3234 pll_full_0/divider_0/prescaler_0/tspc_1/Q vdd 3.61fF +C3235 pll_full_0/divider_0/prescaler_0/nand_0/z1 vdd 0.36fF +C3236 pll_full_0/divider_0/prescaler_0/tspc_2/D vdd 3.12fF +C3237 pll_full_0/divider_0/and_0/OUT vdd 5.67fF +C3238 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 vdd 0.86fF +C3239 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 vdd 2.26fF +C3240 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 vdd 1.19fF +C3241 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 vdd 0.99fF +C3242 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# vdd 1.47fF **FLOATING +C3243 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# vdd 2.11fF **FLOATING +C3244 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 vdd 0.86fF +C3245 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 vdd 2.26fF +C3246 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 vdd 1.48fF +C3247 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 vdd 0.99fF +C3248 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# vdd 1.14fF **FLOATING +C3249 pll_full_0/divider_0/prescaler_0/m1_2700_2190# vdd 4.22fF **FLOATING +C3250 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 vdd 0.86fF +C3251 pll_full_0/divider_0/prescaler_0/Out vdd 4.59fF +C3252 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 vdd 2.26fF +C3253 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 vdd 1.46fF +C3254 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 vdd 0.99fF +C3255 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# vdd 1.16fF **FLOATING +C3256 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# vdd 2.11fF **FLOATING +C3257 pll_full_0/divider_0/nor_1/Z1 vdd 1.34fF +C3258 pll_full_0/divider_0/nor_0/Z1 vdd 1.34fF +C3259 pll_full_0/ro_complete_0/cbank_2/v vdd 16.43fF +C3260 pll_full_0/ro_complete_0/cbank_2/switch_5/vin vdd 0.78fF +C3261 pll_full_0/ro_complete_0/cbank_2/switch_4/vin vdd 1.50fF +C3262 pll_full_0/ro_complete_0/cbank_2/switch_2/vin vdd 1.30fF +C3263 pll_full_0/ro_complete_0/cbank_2/switch_3/vin vdd 0.56fF +C3264 pll_full_0/ro_complete_0/cbank_2/switch_1/vin vdd 1.14fF +C3265 pll_full_0/ro_complete_0/cbank_2/switch_0/vin vdd 1.02fF +C3266 pll_full_0/ro_complete_0/cbank_1/switch_5/vin vdd 0.78fF +C3267 pll_full_0/ro_complete_0/a0 vdd 5.35fF +C3268 pll_full_0/ro_complete_0/cbank_1/switch_4/vin vdd 1.50fF +C3269 pll_full_0/ro_complete_0/a1 vdd 6.54fF +C3270 pll_full_0/ro_complete_0/cbank_1/switch_2/vin vdd 1.30fF +C3271 pll_full_0/ro_complete_0/a3 vdd 5.96fF +C3272 pll_full_0/ro_complete_0/cbank_1/switch_3/vin vdd 0.56fF +C3273 pll_full_0/ro_complete_0/a2 vdd 5.21fF +C3274 pll_full_0/ro_complete_0/cbank_1/switch_1/vin vdd 1.14fF +C3275 pll_full_0/ro_complete_0/a4 vdd 5.81fF +C3276 pll_full_0/ro_complete_0/cbank_1/switch_0/vin vdd 1.02fF +C3277 pll_full_0/ro_complete_0/a5 vdd 6.74fF +C3278 pll_full_0/ro_complete_0/cbank_0/v vdd 15.12fF +C3279 pll_full_0/ro_complete_0/cbank_0/switch_5/vin vdd 0.78fF +C3280 pll_full_0/ro_complete_0/cbank_0/switch_4/vin vdd 1.50fF +C3281 pll_full_0/ro_complete_0/cbank_0/switch_2/vin vdd 1.30fF +C3282 pll_full_0/ro_complete_0/cbank_0/switch_3/vin vdd 0.56fF +C3283 pll_full_0/ro_complete_0/cbank_0/switch_1/vin vdd 1.14fF +C3284 pll_full_0/ro_complete_0/cbank_0/switch_0/vin vdd 1.02fF +C3285 pll_full_0/filter_0/a_4216_n5230# vdd 418.90fF **FLOATING +C3286 pll_full_0/filter_0/a_4216_n2998# vdd 1.39fF **FLOATING +C3287 pll_full_0/cp_0/vbias vdd 2.41fF +C3288 pll_full_0/cp_0/a_7110_n2840# vdd 0.17fF **FLOATING +C3289 pll_full_0/cp_0/a_3060_n2840# vdd 1.71fF **FLOATING +C3290 pll_full_0/cp_0/a_7110_0# vdd 0.17fF **FLOATING +C3291 pll_full_0/cp_0/a_6370_0# vdd 0.40fF **FLOATING +C3292 pll_full_0/cp_0/a_3060_0# vdd 2.50fF **FLOATING +C3293 pll_full_0/cp_0/a_1710_0# vdd 7.47fF **FLOATING +C3294 pll_full_0/cp_0/a_10_n50# vdd 2.96fF **FLOATING +C3295 pll_full_0/pd_0/UP vdd 4.55fF +C3296 pll_full_0/pd_0/and_pd_0/Z1 vdd 0.39fF +C3297 pll_full_0/pd_0/and_pd_0/Out1 vdd 2.22fF +C3298 pll_full_0/pd_0/tspc_r_1/z5 vdd 1.10fF +C3299 pll_full_0/pd_0/tspc_r_1/Z4 vdd 1.07fF +C3300 pll_full_0/pd_0/R vdd 3.05fF +C3301 pll_full_0/pd_0/tspc_r_1/Qbar vdd 0.79fF +C3302 pll_full_0/pd_0/tspc_r_1/Z2 vdd 1.22fF +C3303 pll_full_0/pd_0/tspc_r_1/Z1 vdd 0.67fF +C3304 pll_full_0/pd_0/DOWN vdd 7.30fF +C3305 pll_full_0/pd_0/tspc_r_1/Qbar1 vdd 1.34fF +C3306 pll_full_0/pd_0/tspc_r_1/Z3 vdd 2.12fF +C3307 pll_full_0/pd_0/tspc_r_0/z5 vdd 1.10fF +C3308 pll_full_0/pd_0/tspc_r_0/Z4 vdd 1.07fF +C3309 pll_full_0/pd_0/tspc_r_0/Qbar vdd 0.88fF +C3310 pll_full_0/pd_0/tspc_r_0/Z2 vdd 1.22fF +C3311 pll_full_0/pd_0/tspc_r_0/Z1 vdd 0.67fF +C3312 pll_full_0/pd_0/tspc_r_0/Qbar1 vdd 1.34fF +C3313 pll_full_0/pd_0/tspc_r_0/Z3 vdd 2.12fF +C3314 pll_full_0/ref vdd 1.91fF +C3315 pll_full_0/cp_0/upbar vdd 15.33fF +C3316 div_pd_buffered_0/tapered_buf_0/out vdd 385.99fF +C3317 div_pd_buffered_0/tapered_buf_0/a_n10_n140# vdd 0.06fF **FLOATING +C3318 div_pd_buffered_0/tapered_buf_0/a_210_n610# vdd 592.97fF **FLOATING +C3319 div_pd_buffered_0/tapered_buf_0/a_160_230# vdd 0.15fF **FLOATING +C3320 div_pd_buffered_0/tapered_buf_0/a_n10_230# vdd 0.13fF **FLOATING +C3321 div_pd_buffered_0/tapered_buf_0/a_4670_0# vdd 252.41fF **FLOATING +C3322 div_pd_buffered_0/tapered_buf_0/a_1650_0# vdd 63.61fF **FLOATING +C3323 div_pd_buffered_0/tapered_buf_0/a_580_0# vdd 16.76fF **FLOATING +C3324 div_pd_buffered_0/tapered_buf_0/a_160_n140# vdd 4.09fF **FLOATING +C3325 div_pd_buffered_0/tapered_buf_1/in vdd 1.13fF +C3326 div_pd_buffered_0/tapered_buf_1/a_n10_n140# vdd 0.06fF **FLOATING +C3327 div_pd_buffered_0/tapered_buf_1/a_210_n610# vdd 592.97fF **FLOATING +C3328 div_pd_buffered_0/tapered_buf_1/a_160_230# vdd 0.15fF **FLOATING +C3329 div_pd_buffered_0/tapered_buf_1/a_n10_230# vdd 0.13fF **FLOATING +C3330 div_pd_buffered_0/tapered_buf_1/a_4670_0# vdd 252.41fF **FLOATING +C3331 div_pd_buffered_0/tapered_buf_1/a_1650_0# vdd 63.61fF **FLOATING +C3332 div_pd_buffered_0/tapered_buf_1/a_580_0# vdd 16.76fF **FLOATING +C3333 div_pd_buffered_0/tapered_buf_1/a_160_n140# vdd 4.09fF **FLOATING +C3334 div_pd_buffered_0/divider_0/and_0/Z1 vdd 0.74fF +C3335 div_pd_buffered_0/divider_0/and_0/B vdd 2.25fF +C3336 div_pd_buffered_0/divider_0/and_0/A vdd 2.19fF +C3337 div_pd_buffered_0/divider_0/and_0/out1 vdd 2.93fF +C3338 div_pd_buffered_0/divider_0/tspc_2/Z4 vdd 0.86fF +C3339 div_pd_buffered_0/divider_0/tspc_2/Z3 vdd 2.26fF +C3340 div_pd_buffered_0/divider_0/tspc_2/Z2 vdd 1.46fF +C3341 div_pd_buffered_0/divider_0/tspc_2/Z1 vdd 0.99fF +C3342 div_pd_buffered_0/divider_0/nor_0/B vdd 6.37fF +C3343 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING +C3344 div_pd_buffered_0/divider_0/tspc_1/Z4 vdd 0.86fF +C3345 div_pd_buffered_0/divider_0/tspc_1/Q vdd 3.12fF +C3346 div_pd_buffered_0/divider_0/tspc_1/Z3 vdd 2.26fF +C3347 div_pd_buffered_0/divider_0/tspc_1/Z2 vdd 1.46fF +C3348 div_pd_buffered_0/divider_0/tspc_1/Z1 vdd 0.99fF +C3349 div_pd_buffered_0/divider_0/nor_1/B vdd 7.05fF +C3350 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# vdd 1.15fF **FLOATING +C3351 div_pd_buffered_0/divider_0/tspc_0/Z4 vdd 0.86fF +C3352 div_pd_buffered_0/divider_0/tspc_0/Q vdd 3.14fF +C3353 div_pd_buffered_0/divider_0/tspc_0/Z3 vdd 2.26fF +C3354 div_pd_buffered_0/divider_0/tspc_0/Z2 vdd 1.46fF +C3355 div_pd_buffered_0/divider_0/tspc_0/Z1 vdd 0.99fF +C3356 div_pd_buffered_0/divider_0/nor_1/A vdd 7.04fF +C3357 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# vdd 1.15fF **FLOATING +C3358 div_pd_buffered_0/divider_0/clk vdd 399.62fF +C3359 div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 vdd 0.36fF +C3360 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D vdd 2.64fF +C3361 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q vdd 3.64fF +C3362 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q vdd 3.61fF +C3363 div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 vdd 0.36fF +C3364 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D vdd 3.12fF +C3365 div_pd_buffered_0/divider_0/and_0/OUT vdd 5.62fF +C3366 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 vdd 0.86fF +C3367 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 vdd 2.26fF +C3368 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 vdd 1.46fF +C3369 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 vdd 0.99fF +C3370 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING +C3371 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# vdd 2.11fF **FLOATING +C3372 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 vdd 0.86fF +C3373 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 vdd 2.26fF +C3374 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 vdd 1.48fF +C3375 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 vdd 0.99fF +C3376 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# vdd 1.14fF **FLOATING +C3377 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# vdd 4.22fF **FLOATING +C3378 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 vdd 0.86fF +C3379 div_pd_buffered_0/divider_0/prescaler_0/Out vdd 4.59fF +C3380 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 vdd 2.26fF +C3381 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 vdd 1.46fF +C3382 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 vdd 0.99fF +C3383 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# vdd 1.16fF **FLOATING +C3384 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# vdd 2.11fF **FLOATING +C3385 div_pd_buffered_0/divider_0/nor_1/Z1 vdd 1.34fF +C3386 div_pd_buffered_0/divider_0/nor_0/Z1 vdd 1.34fF +C3387 div_pd_buffered_0/divider_0/mc2 vdd 393.39fF +C3388 div_pd_buffered_0/pd_0/UP vdd 6.08fF +C3389 div_pd_buffered_0/pd_0/and_pd_0/Z1 vdd 0.39fF +C3390 div_pd_buffered_0/pd_0/and_pd_0/Out1 vdd 2.22fF +C3391 div_pd_buffered_0/pd_0/tspc_r_1/z5 vdd 1.10fF +C3392 div_pd_buffered_0/pd_0/tspc_r_1/Z4 vdd 1.07fF +C3393 div_pd_buffered_0/pd_0/R vdd 3.05fF +C3394 div_pd_buffered_0/pd_0/tspc_r_1/Qbar vdd 0.79fF +C3395 div_pd_buffered_0/pd_0/tspc_r_1/Z2 vdd 1.22fF +C3396 div_pd_buffered_0/pd_0/tspc_r_1/Z1 vdd 0.67fF +C3397 div_pd_buffered_0/pd_0/DOWN vdd 8.79fF +C3398 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 vdd 1.34fF +C3399 div_pd_buffered_0/pd_0/tspc_r_1/Z3 vdd 2.12fF +C3400 div_pd_buffered_0/pd_0/DIV vdd 6.57fF +C3401 div_pd_buffered_0/pd_0/tspc_r_0/z5 vdd 1.10fF +C3402 div_pd_buffered_0/pd_0/tspc_r_0/Z4 vdd 1.07fF +C3403 div_pd_buffered_0/pd_0/tspc_r_0/Qbar vdd 0.88fF +C3404 div_pd_buffered_0/pd_0/tspc_r_0/Z2 vdd 1.22fF +C3405 div_pd_buffered_0/pd_0/tspc_r_0/Z1 vdd 0.67fF +C3406 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 vdd 1.34fF +C3407 div_pd_buffered_0/pd_0/tspc_r_0/Z3 vdd 2.12fF +C3408 div_pd_buffered_0/pd_0/REF vdd 392.16fF +C3409 div_pd_buffered_0/tapered_buf_4/out vdd 385.93fF +C3410 div_pd_buffered_0/tapered_buf_4/a_n10_n140# vdd 0.06fF **FLOATING +C3411 div_pd_buffered_0/tapered_buf_4/a_210_n610# vdd 592.97fF **FLOATING +C3412 div_pd_buffered_0/tapered_buf_4/a_160_230# vdd 0.15fF **FLOATING +C3413 div_pd_buffered_0/tapered_buf_4/a_n10_230# vdd 0.13fF **FLOATING +C3414 div_pd_buffered_0/tapered_buf_4/a_4670_0# vdd 252.41fF **FLOATING +C3415 div_pd_buffered_0/tapered_buf_4/a_1650_0# vdd 63.61fF **FLOATING +C3416 div_pd_buffered_0/tapered_buf_4/a_580_0# vdd 16.76fF **FLOATING +C3417 div_pd_buffered_0/tapered_buf_4/a_160_n140# vdd 4.09fF **FLOATING +C3418 div_pd_buffered_0/tapered_buf_3/in vdd 1.13fF +C3419 div_pd_buffered_0/tapered_buf_3/a_n10_n140# vdd 0.06fF **FLOATING +C3420 div_pd_buffered_0/tapered_buf_3/a_210_n610# vdd 592.97fF **FLOATING +C3421 div_pd_buffered_0/tapered_buf_3/a_160_230# vdd 0.15fF **FLOATING +C3422 div_pd_buffered_0/tapered_buf_3/a_n10_230# vdd 0.13fF **FLOATING +C3423 div_pd_buffered_0/tapered_buf_3/a_4670_0# vdd 252.41fF **FLOATING +C3424 div_pd_buffered_0/tapered_buf_3/a_1650_0# vdd 63.61fF **FLOATING +C3425 div_pd_buffered_0/tapered_buf_3/a_580_0# vdd 16.76fF **FLOATING +C3426 div_pd_buffered_0/tapered_buf_3/a_160_n140# vdd 4.09fF **FLOATING +C3427 div_pd_buffered_0/tapered_buf_2/in vdd 1.13fF +C3428 div_pd_buffered_0/tapered_buf_2/a_n10_n140# vdd 0.06fF **FLOATING +C3429 div_pd_buffered_0/tapered_buf_2/a_210_n610# vdd 592.97fF **FLOATING +C3430 div_pd_buffered_0/tapered_buf_2/a_160_230# vdd 0.15fF **FLOATING +C3431 div_pd_buffered_0/tapered_buf_2/a_n10_230# vdd 0.13fF **FLOATING +C3432 div_pd_buffered_0/tapered_buf_2/a_4670_0# vdd 252.41fF **FLOATING +C3433 div_pd_buffered_0/tapered_buf_2/a_1650_0# vdd 63.61fF **FLOATING +C3434 div_pd_buffered_0/tapered_buf_2/a_580_0# vdd 16.76fF **FLOATING +C3435 div_pd_buffered_0/tapered_buf_2/a_160_n140# vdd 4.09fF **FLOATING +C3436 ro_complete_buffered_0/tapered_buf_0/in vdd 1.13fF +C3437 ro_complete_buffered_0/tapered_buf_0/a_n10_n140# vdd 0.06fF **FLOATING +C3438 ro_complete_buffered_0/tapered_buf_0/a_210_n610# vdd 619.27fF **FLOATING +C3439 ro_complete_buffered_0/tapered_buf_0/a_160_230# vdd 0.15fF **FLOATING +C3440 ro_complete_buffered_0/tapered_buf_0/a_n10_230# vdd 0.13fF **FLOATING +C3441 ro_complete_buffered_0/tapered_buf_0/a_4670_0# vdd 252.41fF **FLOATING +C3442 ro_complete_buffered_0/tapered_buf_0/a_1650_0# vdd 63.61fF **FLOATING +C3443 ro_complete_buffered_0/tapered_buf_0/a_580_0# vdd 16.76fF **FLOATING +C3444 ro_complete_buffered_0/tapered_buf_0/a_160_n140# vdd 4.09fF **FLOATING +C3445 ro_complete_buffered_0/tapered_buf_1/out vdd 385.87fF +C3446 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# vdd 0.06fF **FLOATING +C3447 ro_complete_buffered_0/tapered_buf_1/a_210_n610# vdd 592.97fF **FLOATING +C3448 ro_complete_buffered_0/tapered_buf_1/a_160_230# vdd 0.15fF **FLOATING +C3449 ro_complete_buffered_0/tapered_buf_1/a_n10_230# vdd 0.13fF **FLOATING +C3450 ro_complete_buffered_0/tapered_buf_1/a_4670_0# vdd 252.41fF **FLOATING +C3451 ro_complete_buffered_0/tapered_buf_1/a_1650_0# vdd 63.61fF **FLOATING +C3452 ro_complete_buffered_0/tapered_buf_1/a_580_0# vdd 16.76fF **FLOATING +C3453 ro_complete_buffered_0/tapered_buf_1/a_160_n140# vdd 4.09fF **FLOATING +C3454 ro_complete_buffered_0/ro_complete_0/cbank_2/v vdd 16.53fF +C3455 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin vdd 0.78fF +C3456 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin vdd 1.50fF +C3457 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin vdd 1.30fF +C3458 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin vdd 0.56fF +C3459 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin vdd 1.14fF +C3460 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin vdd 1.02fF +C3461 ro_complete_buffered_0/tapered_buf_1/in vdd 26.54fF +C3462 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin vdd 0.78fF +C3463 ro_complete_buffered_0/ro_complete_0/a0 vdd 416.45fF +C3464 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin vdd 1.50fF +C3465 ro_complete_buffered_0/ro_complete_0/a1 vdd 412.13fF +C3466 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin vdd 1.30fF +C3467 ro_complete_buffered_0/ro_complete_0/a3 vdd 402.70fF +C3468 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin vdd 0.56fF +C3469 ro_complete_buffered_0/ro_complete_0/a2 vdd 407.26fF +C3470 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin vdd 1.14fF +C3471 ro_complete_buffered_0/ro_complete_0/a4 vdd 398.93fF +C3472 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin vdd 1.02fF +C3473 ro_complete_buffered_0/ro_complete_0/a5 vdd 395.79fF +C3474 ro_complete_buffered_0/ro_complete_0/cbank_0/v vdd 15.13fF +C3475 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin vdd 0.78fF +C3476 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin vdd 1.50fF +C3477 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin vdd 1.30fF +C3478 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin vdd 0.56fF +C3479 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin vdd 1.14fF +C3480 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin vdd 1.02fF +C3481 ro_complete_buffered_0/tapered_buf_7/in vdd 1.13fF +C3482 ro_complete_buffered_0/tapered_buf_7/a_n10_n140# vdd 0.06fF **FLOATING +C3483 ro_complete_buffered_0/tapered_buf_7/a_210_n610# vdd 592.97fF **FLOATING +C3484 ro_complete_buffered_0/tapered_buf_7/a_160_230# vdd 0.15fF **FLOATING +C3485 ro_complete_buffered_0/tapered_buf_7/a_n10_230# vdd 0.13fF **FLOATING +C3486 ro_complete_buffered_0/tapered_buf_7/a_4670_0# vdd 252.41fF **FLOATING +C3487 ro_complete_buffered_0/tapered_buf_7/a_1650_0# vdd 63.61fF **FLOATING +C3488 ro_complete_buffered_0/tapered_buf_7/a_580_0# vdd 16.76fF **FLOATING +C3489 ro_complete_buffered_0/tapered_buf_7/a_160_n140# vdd 4.09fF **FLOATING +C3490 ro_complete_buffered_0/tapered_buf_6/in vdd 1.13fF +C3491 ro_complete_buffered_0/tapered_buf_6/a_n10_n140# vdd 0.06fF **FLOATING +C3492 ro_complete_buffered_0/tapered_buf_6/a_210_n610# vdd 592.97fF **FLOATING +C3493 ro_complete_buffered_0/tapered_buf_6/a_160_230# vdd 0.15fF **FLOATING +C3494 ro_complete_buffered_0/tapered_buf_6/a_n10_230# vdd 0.13fF **FLOATING +C3495 ro_complete_buffered_0/tapered_buf_6/a_4670_0# vdd 252.41fF **FLOATING +C3496 ro_complete_buffered_0/tapered_buf_6/a_1650_0# vdd 63.61fF **FLOATING +C3497 ro_complete_buffered_0/tapered_buf_6/a_580_0# vdd 16.76fF **FLOATING +C3498 ro_complete_buffered_0/tapered_buf_6/a_160_n140# vdd 4.09fF **FLOATING +C3499 ro_complete_buffered_0/tapered_buf_5/in vdd 1.13fF +C3500 ro_complete_buffered_0/tapered_buf_5/a_n10_n140# vdd 0.06fF **FLOATING +C3501 ro_complete_buffered_0/tapered_buf_5/a_210_n610# vdd 592.97fF **FLOATING +C3502 ro_complete_buffered_0/tapered_buf_5/a_160_230# vdd 0.15fF **FLOATING +C3503 ro_complete_buffered_0/tapered_buf_5/a_n10_230# vdd 0.13fF **FLOATING +C3504 ro_complete_buffered_0/tapered_buf_5/a_4670_0# vdd 252.41fF **FLOATING +C3505 ro_complete_buffered_0/tapered_buf_5/a_1650_0# vdd 63.61fF **FLOATING +C3506 ro_complete_buffered_0/tapered_buf_5/a_580_0# vdd 16.76fF **FLOATING +C3507 ro_complete_buffered_0/tapered_buf_5/a_160_n140# vdd 4.09fF **FLOATING +C3508 ro_complete_buffered_0/tapered_buf_4/in vdd 1.13fF +C3509 ro_complete_buffered_0/tapered_buf_4/a_n10_n140# vdd 0.06fF **FLOATING +C3510 ro_complete_buffered_0/tapered_buf_4/a_210_n610# vdd 592.97fF **FLOATING +C3511 ro_complete_buffered_0/tapered_buf_4/a_160_230# vdd 0.15fF **FLOATING +C3512 ro_complete_buffered_0/tapered_buf_4/a_n10_230# vdd 0.13fF **FLOATING +C3513 ro_complete_buffered_0/tapered_buf_4/a_4670_0# vdd 252.41fF **FLOATING +C3514 ro_complete_buffered_0/tapered_buf_4/a_1650_0# vdd 63.61fF **FLOATING +C3515 ro_complete_buffered_0/tapered_buf_4/a_580_0# vdd 16.76fF **FLOATING +C3516 ro_complete_buffered_0/tapered_buf_4/a_160_n140# vdd 4.09fF **FLOATING +C3517 ro_complete_buffered_0/tapered_buf_3/in vdd 1.13fF +C3518 ro_complete_buffered_0/tapered_buf_3/a_n10_n140# vdd 0.06fF **FLOATING +C3519 ro_complete_buffered_0/tapered_buf_3/a_210_n610# vdd 592.97fF **FLOATING +C3520 ro_complete_buffered_0/tapered_buf_3/a_160_230# vdd 0.15fF **FLOATING +C3521 ro_complete_buffered_0/tapered_buf_3/a_n10_230# vdd 0.13fF **FLOATING +C3522 ro_complete_buffered_0/tapered_buf_3/a_4670_0# vdd 252.41fF **FLOATING +C3523 ro_complete_buffered_0/tapered_buf_3/a_1650_0# vdd 63.61fF **FLOATING +C3524 ro_complete_buffered_0/tapered_buf_3/a_580_0# vdd 16.76fF **FLOATING +C3525 ro_complete_buffered_0/tapered_buf_3/a_160_n140# vdd 4.09fF **FLOATING +C3526 ro_complete_buffered_0/tapered_buf_2/in vdd 1.13fF +C3527 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# vdd 0.06fF **FLOATING +C3528 ro_complete_buffered_0/tapered_buf_2/a_210_n610# vdd 592.97fF **FLOATING +C3529 ro_complete_buffered_0/tapered_buf_2/a_160_230# vdd 0.15fF **FLOATING +C3530 ro_complete_buffered_0/tapered_buf_2/a_n10_230# vdd 0.13fF **FLOATING +C3531 ro_complete_buffered_0/tapered_buf_2/a_4670_0# vdd 252.41fF **FLOATING +C3532 ro_complete_buffered_0/tapered_buf_2/a_1650_0# vdd 63.61fF **FLOATING +C3533 ro_complete_buffered_0/tapered_buf_2/a_580_0# vdd 16.76fF **FLOATING +C3534 ro_complete_buffered_0/tapered_buf_2/a_160_n140# vdd 4.09fF **FLOATING +C3535 divider_buffered_0/tapered_buf_0/in vdd 1.13fF +C3536 divider_buffered_0/tapered_buf_0/a_n10_n140# vdd 0.06fF **FLOATING +C3537 divider_buffered_0/tapered_buf_0/a_210_n610# vdd 592.97fF **FLOATING +C3538 divider_buffered_0/tapered_buf_0/a_160_230# vdd 0.15fF **FLOATING +C3539 divider_buffered_0/tapered_buf_0/a_n10_230# vdd 0.13fF **FLOATING +C3540 divider_buffered_0/tapered_buf_0/a_4670_0# vdd 252.41fF **FLOATING +C3541 divider_buffered_0/tapered_buf_0/a_1650_0# vdd 63.61fF **FLOATING +C3542 divider_buffered_0/tapered_buf_0/a_580_0# vdd 16.76fF **FLOATING +C3543 divider_buffered_0/tapered_buf_0/a_160_n140# vdd 4.09fF **FLOATING +C3544 divider_buffered_0/tapered_buf_1/out vdd 385.89fF +C3545 divider_buffered_0/tapered_buf_1/a_n10_n140# vdd 0.06fF **FLOATING +C3546 divider_buffered_0/tapered_buf_1/a_210_n610# vdd 592.97fF **FLOATING +C3547 divider_buffered_0/tapered_buf_1/a_160_230# vdd 0.15fF **FLOATING +C3548 divider_buffered_0/tapered_buf_1/a_n10_230# vdd 0.13fF **FLOATING +C3549 divider_buffered_0/tapered_buf_1/a_4670_0# vdd 252.41fF **FLOATING +C3550 divider_buffered_0/tapered_buf_1/a_1650_0# vdd 63.61fF **FLOATING +C3551 divider_buffered_0/tapered_buf_1/a_580_0# vdd 16.76fF **FLOATING +C3552 divider_buffered_0/tapered_buf_1/a_160_n140# vdd 4.09fF **FLOATING +C3553 divider_buffered_0/divider_0/and_0/Z1 vdd 0.74fF +C3554 divider_buffered_0/divider_0/and_0/B vdd 2.25fF +C3555 divider_buffered_0/divider_0/and_0/A vdd 2.19fF +C3556 divider_buffered_0/divider_0/and_0/out1 vdd 2.93fF +C3557 divider_buffered_0/divider_0/tspc_2/Z4 vdd 0.86fF +C3558 divider_buffered_0/divider_0/Out vdd 7.35fF +C3559 divider_buffered_0/divider_0/tspc_2/Z3 vdd 2.26fF +C3560 divider_buffered_0/divider_0/tspc_2/Z2 vdd 1.46fF +C3561 divider_buffered_0/divider_0/tspc_2/Z1 vdd 0.99fF +C3562 divider_buffered_0/divider_0/nor_0/B vdd 6.33fF +C3563 divider_buffered_0/divider_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING +C3564 divider_buffered_0/divider_0/tspc_1/Z4 vdd 0.86fF +C3565 divider_buffered_0/divider_0/tspc_1/Q vdd 3.12fF +C3566 divider_buffered_0/divider_0/tspc_1/Z3 vdd 2.26fF +C3567 divider_buffered_0/divider_0/tspc_1/Z2 vdd 1.46fF +C3568 divider_buffered_0/divider_0/tspc_1/Z1 vdd 0.99fF +C3569 divider_buffered_0/divider_0/nor_1/B vdd 7.05fF +C3570 divider_buffered_0/divider_0/tspc_1/a_630_n680# vdd 1.15fF **FLOATING +C3571 divider_buffered_0/divider_0/tspc_0/Z4 vdd 0.86fF +C3572 divider_buffered_0/divider_0/tspc_0/Q vdd 3.14fF +C3573 divider_buffered_0/divider_0/tspc_0/Z3 vdd 2.26fF +C3574 divider_buffered_0/divider_0/tspc_0/Z2 vdd 1.46fF +C3575 divider_buffered_0/divider_0/tspc_0/Z1 vdd 0.99fF +C3576 divider_buffered_0/divider_0/nor_1/A vdd 7.04fF +C3577 divider_buffered_0/divider_0/tspc_0/a_630_n680# vdd 1.15fF **FLOATING +C3578 divider_buffered_0/divider_0/clk vdd 396.07fF +C3579 divider_buffered_0/divider_0/prescaler_0/nand_1/z1 vdd 0.36fF +C3580 divider_buffered_0/divider_0/prescaler_0/tspc_0/D vdd 2.64fF +C3581 divider_buffered_0/divider_0/prescaler_0/tspc_2/Q vdd 3.70fF +C3582 divider_buffered_0/divider_0/prescaler_0/tspc_1/Q vdd 3.61fF +C3583 divider_buffered_0/divider_0/prescaler_0/nand_0/z1 vdd 0.36fF +C3584 divider_buffered_0/divider_0/prescaler_0/tspc_2/D vdd 3.12fF +C3585 divider_buffered_0/divider_0/and_0/OUT vdd 5.62fF +C3586 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 vdd 0.86fF +C3587 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 vdd 2.26fF +C3588 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 vdd 1.46fF +C3589 divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 vdd 0.99fF +C3590 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING +C3591 divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# vdd 2.11fF **FLOATING +C3592 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 vdd 0.86fF +C3593 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 vdd 2.26fF +C3594 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 vdd 1.48fF +C3595 divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 vdd 0.99fF +C3596 divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# vdd 1.14fF **FLOATING +C3597 divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# vdd 4.22fF **FLOATING +C3598 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 vdd 0.86fF +C3599 divider_buffered_0/divider_0/prescaler_0/Out vdd 4.59fF +C3600 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 vdd 2.26fF +C3601 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 vdd 1.46fF +C3602 divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 vdd 0.99fF +C3603 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# vdd 1.16fF **FLOATING +C3604 divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# vdd 2.11fF **FLOATING +C3605 divider_buffered_0/divider_0/nor_1/Z1 vdd 1.34fF +C3606 divider_buffered_0/divider_0/nor_0/Z1 vdd 1.34fF +C3607 divider_buffered_0/divider_0/mc2 vdd 393.27fF +C3608 divider_buffered_0/tapered_buf_2/in vdd 1.13fF +C3609 divider_buffered_0/tapered_buf_2/a_n10_n140# vdd 0.06fF **FLOATING +C3610 divider_buffered_0/tapered_buf_2/a_210_n610# vdd 592.97fF **FLOATING +C3611 divider_buffered_0/tapered_buf_2/a_160_230# vdd 0.15fF **FLOATING +C3612 divider_buffered_0/tapered_buf_2/a_n10_230# vdd 0.13fF **FLOATING +C3613 divider_buffered_0/tapered_buf_2/a_4670_0# vdd 252.41fF **FLOATING +C3614 divider_buffered_0/tapered_buf_2/a_1650_0# vdd 63.61fF **FLOATING +C3615 divider_buffered_0/tapered_buf_2/a_580_0# vdd 16.76fF **FLOATING +C3616 divider_buffered_0/tapered_buf_2/a_160_n140# vdd 4.09fF **FLOATING +C3617 pll_full_buffered2_0/pll_full_0/divider_0/and_0/Z1 vdd 0.65fF +C3618 pll_full_buffered2_0/pll_full_0/divider_0/and_0/B vdd 2.45fF +C3619 pll_full_buffered2_0/pll_full_0/divider_0/and_0/A vdd 2.35fF +C3620 pll_full_buffered2_0/pll_full_0/divider_0/and_0/out1 vdd 2.99fF +C3621 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z4 vdd 0.86fF +C3622 pll_full_buffered2_0/pll_full_0/div vdd 32.99fF +C3623 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z3 vdd 2.26fF +C3624 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z2 vdd 1.46fF +C3625 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/Z1 vdd 0.99fF +C3626 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/B vdd 6.48fF +C3627 pll_full_buffered2_0/pll_full_0/divider_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING +C3628 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z4 vdd 0.86fF +C3629 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Q vdd 3.12fF +C3630 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z3 vdd 2.26fF +C3631 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z2 vdd 1.46fF +C3632 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/Z1 vdd 0.99fF +C3633 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/B vdd 7.12fF +C3634 pll_full_buffered2_0/pll_full_0/divider_0/tspc_1/a_630_n680# vdd 1.15fF **FLOATING +C3635 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z4 vdd 0.86fF +C3636 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Q vdd 3.14fF +C3637 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z3 vdd 2.26fF +C3638 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z2 vdd 1.46fF +C3639 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/Z1 vdd 0.99fF +C3640 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/A vdd 7.08fF +C3641 pll_full_buffered2_0/pll_full_0/divider_0/tspc_0/a_630_n680# vdd 1.15fF **FLOATING +C3642 pll_full_buffered2_0/pll_full_0/vco vdd 35.58fF +C3643 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/nand_1/z1 vdd 0.36fF +C3644 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/D vdd 2.64fF +C3645 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q vdd 3.72fF +C3646 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q vdd 3.61fF +C3647 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/nand_0/z1 vdd 0.36fF +C3648 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/D vdd 3.12fF +C3649 pll_full_buffered2_0/pll_full_0/divider_0/and_0/OUT vdd 5.67fF +C3650 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 vdd 0.86fF +C3651 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 vdd 2.26fF +C3652 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 vdd 1.19fF +C3653 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 vdd 0.99fF +C3654 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# vdd 1.47fF **FLOATING +C3655 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# vdd 2.11fF **FLOATING +C3656 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 vdd 0.86fF +C3657 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 vdd 2.26fF +C3658 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 vdd 1.48fF +C3659 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 vdd 0.99fF +C3660 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# vdd 1.14fF **FLOATING +C3661 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# vdd 4.22fF **FLOATING +C3662 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 vdd 0.86fF +C3663 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/Out vdd 4.59fF +C3664 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 vdd 2.26fF +C3665 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 vdd 1.46fF +C3666 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 vdd 0.99fF +C3667 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# vdd 1.16fF **FLOATING +C3668 pll_full_buffered2_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# vdd 2.11fF **FLOATING +C3669 pll_full_buffered2_0/pll_full_0/divider_0/nor_1/Z1 vdd 1.34fF +C3670 pll_full_buffered2_0/pll_full_0/divider_0/nor_0/Z1 vdd 1.34fF +C3671 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/v vdd 16.43fF +C3672 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_5/vin vdd 0.78fF +C3673 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin vdd 1.50fF +C3674 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin vdd 1.30fF +C3675 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin vdd 0.56fF +C3676 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin vdd 1.14fF +C3677 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin vdd 1.02fF +C3678 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_5/vin vdd 0.78fF +C3679 pll_full_buffered2_0/pll_full_0/ro_complete_0/a0 vdd 5.35fF +C3680 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_4/vin vdd 1.50fF +C3681 pll_full_buffered2_0/pll_full_0/ro_complete_0/a1 vdd 6.54fF +C3682 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin vdd 1.30fF +C3683 pll_full_buffered2_0/pll_full_0/ro_complete_0/a3 vdd 5.96fF +C3684 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin vdd 0.56fF +C3685 pll_full_buffered2_0/pll_full_0/ro_complete_0/a2 vdd 5.21fF +C3686 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin vdd 1.14fF +C3687 pll_full_buffered2_0/pll_full_0/ro_complete_0/a4 vdd 5.81fF +C3688 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_1/switch_0/vin vdd 1.02fF +C3689 pll_full_buffered2_0/pll_full_0/ro_complete_0/a5 vdd 6.74fF +C3690 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/v vdd 15.12fF +C3691 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_5/vin vdd 0.78fF +C3692 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin vdd 1.50fF +C3693 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin vdd 1.30fF +C3694 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin vdd 0.56fF +C3695 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin vdd 1.14fF +C3696 pll_full_buffered2_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin vdd 1.02fF +C3697 pll_full_buffered2_0/pll_full_0/filter_0/a_4216_n5230# vdd 418.90fF **FLOATING +C3698 pll_full_buffered2_0/pll_full_0/filter_0/a_4216_n2998# vdd 1.39fF **FLOATING +C3699 pll_full_buffered2_0/pll_full_0/cp_0/vbias vdd 2.41fF +C3700 pll_full_buffered2_0/pll_full_0/cp_0/a_7110_n2840# vdd 0.17fF **FLOATING +C3701 pll_full_buffered2_0/pll_full_0/cp_0/a_3060_n2840# vdd 1.71fF **FLOATING +C3702 pll_full_buffered2_0/pll_full_0/cp_0/a_7110_0# vdd 0.17fF **FLOATING +C3703 pll_full_buffered2_0/pll_full_0/cp_0/a_6370_0# vdd 0.40fF **FLOATING +C3704 pll_full_buffered2_0/pll_full_0/cp_0/a_3060_0# vdd 2.50fF **FLOATING +C3705 pll_full_buffered2_0/pll_full_0/cp_0/a_1710_0# vdd 7.47fF **FLOATING +C3706 pll_full_buffered2_0/pll_full_0/cp_0/a_10_n50# vdd 2.96fF **FLOATING +C3707 pll_full_buffered2_0/pll_full_0/pd_0/UP vdd 4.55fF +C3708 pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Z1 vdd 0.39fF +C3709 pll_full_buffered2_0/pll_full_0/pd_0/and_pd_0/Out1 vdd 2.22fF +C3710 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/z5 vdd 1.10fF +C3711 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z4 vdd 1.07fF +C3712 pll_full_buffered2_0/pll_full_0/pd_0/R vdd 3.05fF +C3713 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar vdd 0.79fF +C3714 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z2 vdd 1.22fF +C3715 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z1 vdd 0.67fF +C3716 pll_full_buffered2_0/tapered_buf_2/in vdd 24.92fF +C3717 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Qbar1 vdd 1.34fF +C3718 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_1/Z3 vdd 2.12fF +C3719 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/z5 vdd 1.10fF +C3720 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z4 vdd 1.07fF +C3721 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar vdd 0.88fF +C3722 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z2 vdd 1.22fF +C3723 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z1 vdd 0.67fF +C3724 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Qbar1 vdd 1.34fF +C3725 pll_full_buffered2_0/pll_full_0/pd_0/tspc_r_0/Z3 vdd 2.12fF +C3726 pll_full_buffered2_0/pll_full_0/ref vdd 390.59fF +C3727 pll_full_buffered2_0/pll_full_0/cp_0/upbar vdd 35.52fF +C3728 pll_full_buffered2_0/tapered_buf_0/out vdd 385.87fF +C3729 pll_full_buffered2_0/tapered_buf_0/in vdd 4.51fF +C3730 pll_full_buffered2_0/tapered_buf_0/a_n10_n140# vdd 0.06fF **FLOATING +C3731 pll_full_buffered2_0/tapered_buf_0/a_210_n610# vdd 592.97fF **FLOATING +C3732 pll_full_buffered2_0/tapered_buf_0/a_160_230# vdd 0.15fF **FLOATING +C3733 pll_full_buffered2_0/tapered_buf_0/a_n10_230# vdd 0.13fF **FLOATING +C3734 pll_full_buffered2_0/tapered_buf_0/a_4670_0# vdd 252.41fF **FLOATING +C3735 pll_full_buffered2_0/tapered_buf_0/a_1650_0# vdd 63.61fF **FLOATING +C3736 pll_full_buffered2_0/tapered_buf_0/a_580_0# vdd 16.76fF **FLOATING +C3737 pll_full_buffered2_0/tapered_buf_0/a_160_n140# vdd 4.09fF **FLOATING +C3738 pll_full_buffered2_0/tapered_buf_1/out vdd 385.89fF +C3739 pll_full_buffered2_0/tapered_buf_1/in vdd 2.65fF +C3740 pll_full_buffered2_0/tapered_buf_1/a_n10_n140# vdd 0.06fF **FLOATING +C3741 pll_full_buffered2_0/tapered_buf_1/a_210_n610# vdd 592.97fF **FLOATING +C3742 pll_full_buffered2_0/tapered_buf_1/a_160_230# vdd 0.15fF **FLOATING +C3743 pll_full_buffered2_0/tapered_buf_1/a_n10_230# vdd 0.13fF **FLOATING +C3744 pll_full_buffered2_0/tapered_buf_1/a_4670_0# vdd 252.41fF **FLOATING +C3745 pll_full_buffered2_0/tapered_buf_1/a_1650_0# vdd 63.61fF **FLOATING +C3746 pll_full_buffered2_0/tapered_buf_1/a_580_0# vdd 16.76fF **FLOATING +C3747 pll_full_buffered2_0/tapered_buf_1/a_160_n140# vdd 4.09fF **FLOATING +C3748 pll_full_buffered2_0/tapered_buf_5/in vdd 1.13fF +C3749 pll_full_buffered2_0/tapered_buf_5/a_n10_n140# vdd 0.06fF **FLOATING +C3750 pll_full_buffered2_0/tapered_buf_5/a_210_n610# vdd 592.97fF **FLOATING +C3751 pll_full_buffered2_0/tapered_buf_5/a_160_230# vdd 0.15fF **FLOATING +C3752 pll_full_buffered2_0/tapered_buf_5/a_n10_230# vdd 0.13fF **FLOATING +C3753 pll_full_buffered2_0/tapered_buf_5/a_4670_0# vdd 252.41fF **FLOATING +C3754 pll_full_buffered2_0/tapered_buf_5/a_1650_0# vdd 63.61fF **FLOATING +C3755 pll_full_buffered2_0/tapered_buf_5/a_580_0# vdd 16.76fF **FLOATING +C3756 pll_full_buffered2_0/tapered_buf_5/a_160_n140# vdd 4.09fF **FLOATING +C3757 pll_full_buffered2_0/tapered_buf_4/in vdd 1.13fF +C3758 pll_full_buffered2_0/tapered_buf_4/a_n10_n140# vdd 0.06fF **FLOATING +C3759 pll_full_buffered2_0/tapered_buf_4/a_210_n610# vdd 619.27fF **FLOATING +C3760 pll_full_buffered2_0/tapered_buf_4/a_160_230# vdd 0.15fF **FLOATING +C3761 pll_full_buffered2_0/tapered_buf_4/a_n10_230# vdd 0.13fF **FLOATING +C3762 pll_full_buffered2_0/tapered_buf_4/a_4670_0# vdd 252.41fF **FLOATING +C3763 pll_full_buffered2_0/tapered_buf_4/a_1650_0# vdd 63.61fF **FLOATING +C3764 pll_full_buffered2_0/tapered_buf_4/a_580_0# vdd 16.76fF **FLOATING +C3765 pll_full_buffered2_0/tapered_buf_4/a_160_n140# vdd 4.09fF **FLOATING +C3766 pll_full_buffered2_0/tapered_buf_3/out vdd 385.90fF +C3767 pll_full_buffered2_0/tapered_buf_3/a_n10_n140# vdd 0.06fF **FLOATING +C3768 pll_full_buffered2_0/tapered_buf_3/a_210_n610# vdd 592.97fF **FLOATING +C3769 pll_full_buffered2_0/tapered_buf_3/a_160_230# vdd 0.15fF **FLOATING +C3770 pll_full_buffered2_0/tapered_buf_3/a_n10_230# vdd 0.13fF **FLOATING +C3771 pll_full_buffered2_0/tapered_buf_3/a_4670_0# vdd 252.41fF **FLOATING +C3772 pll_full_buffered2_0/tapered_buf_3/a_1650_0# vdd 63.61fF **FLOATING +C3773 pll_full_buffered2_0/tapered_buf_3/a_580_0# vdd 16.76fF **FLOATING +C3774 pll_full_buffered2_0/tapered_buf_3/a_160_n140# vdd 4.09fF **FLOATING +C3775 pll_full_buffered2_0/tapered_buf_2/out vdd 385.95fF +C3776 pll_full_buffered2_0/tapered_buf_2/a_n10_n140# vdd 0.06fF **FLOATING +C3777 pll_full_buffered2_0/tapered_buf_2/a_210_n610# vdd 592.97fF **FLOATING +C3778 pll_full_buffered2_0/tapered_buf_2/a_160_230# vdd 0.15fF **FLOATING +C3779 pll_full_buffered2_0/tapered_buf_2/a_n10_230# vdd 0.13fF **FLOATING +C3780 pll_full_buffered2_0/tapered_buf_2/a_4670_0# vdd 252.41fF **FLOATING +C3781 pll_full_buffered2_0/tapered_buf_2/a_1650_0# vdd 63.61fF **FLOATING +C3782 pll_full_buffered2_0/tapered_buf_2/a_580_0# vdd 16.76fF **FLOATING +C3783 pll_full_buffered2_0/tapered_buf_2/a_160_n140# vdd 4.09fF **FLOATING +C3784 ro_divider_buffered_0/tapered_buf_1/in vdd 1.13fF +C3785 ro_divider_buffered_0/tapered_buf_1/a_n10_n140# vdd 0.06fF **FLOATING +C3786 ro_divider_buffered_0/tapered_buf_1/a_210_n610# vdd 592.97fF **FLOATING +C3787 ro_divider_buffered_0/tapered_buf_1/a_160_230# vdd 0.15fF **FLOATING +C3788 ro_divider_buffered_0/tapered_buf_1/a_n10_230# vdd 0.13fF **FLOATING +C3789 ro_divider_buffered_0/tapered_buf_1/a_4670_0# vdd 252.41fF **FLOATING +C3790 ro_divider_buffered_0/tapered_buf_1/a_1650_0# vdd 63.61fF **FLOATING +C3791 ro_divider_buffered_0/tapered_buf_1/a_580_0# vdd 16.76fF **FLOATING +C3792 ro_divider_buffered_0/tapered_buf_1/a_160_n140# vdd 4.09fF **FLOATING +C3793 ro_divider_buffered_0/tapered_buf_0/in vdd 1.13fF +C3794 ro_divider_buffered_0/tapered_buf_0/a_n10_n140# vdd 0.06fF **FLOATING +C3795 ro_divider_buffered_0/tapered_buf_0/a_210_n610# vdd 592.97fF **FLOATING +C3796 ro_divider_buffered_0/tapered_buf_0/a_160_230# vdd 0.15fF **FLOATING +C3797 ro_divider_buffered_0/tapered_buf_0/a_n10_230# vdd 0.13fF **FLOATING +C3798 ro_divider_buffered_0/tapered_buf_0/a_4670_0# vdd 252.41fF **FLOATING +C3799 ro_divider_buffered_0/tapered_buf_0/a_1650_0# vdd 63.61fF **FLOATING +C3800 ro_divider_buffered_0/tapered_buf_0/a_580_0# vdd 16.76fF **FLOATING +C3801 ro_divider_buffered_0/tapered_buf_0/a_160_n140# vdd 4.09fF **FLOATING +C3802 ro_divider_buffered_0/divider_0/and_0/Z1 vdd 0.74fF +C3803 ro_divider_buffered_0/divider_0/and_0/B vdd 2.25fF +C3804 ro_divider_buffered_0/divider_0/and_0/A vdd 2.19fF +C3805 ro_divider_buffered_0/divider_0/and_0/out1 vdd 2.93fF +C3806 ro_divider_buffered_0/divider_0/tspc_2/Z4 vdd 0.86fF +C3807 ro_divider_buffered_0/divider_0/Out vdd 399.57fF +C3808 ro_divider_buffered_0/divider_0/tspc_2/Z3 vdd 2.26fF +C3809 ro_divider_buffered_0/divider_0/tspc_2/Z2 vdd 1.46fF +C3810 ro_divider_buffered_0/divider_0/tspc_2/Z1 vdd 0.99fF +C3811 ro_divider_buffered_0/divider_0/nor_0/B vdd 6.33fF +C3812 ro_divider_buffered_0/divider_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING +C3813 ro_divider_buffered_0/divider_0/tspc_1/Z4 vdd 0.86fF +C3814 ro_divider_buffered_0/divider_0/tspc_1/Q vdd 3.12fF +C3815 ro_divider_buffered_0/divider_0/tspc_1/Z3 vdd 2.26fF +C3816 ro_divider_buffered_0/divider_0/tspc_1/Z2 vdd 1.46fF +C3817 ro_divider_buffered_0/divider_0/tspc_1/Z1 vdd 0.99fF +C3818 ro_divider_buffered_0/divider_0/nor_1/B vdd 7.05fF +C3819 ro_divider_buffered_0/divider_0/tspc_1/a_630_n680# vdd 1.15fF **FLOATING +C3820 ro_divider_buffered_0/divider_0/tspc_0/Z4 vdd 0.86fF +C3821 ro_divider_buffered_0/divider_0/tspc_0/Q vdd 3.14fF +C3822 ro_divider_buffered_0/divider_0/tspc_0/Z3 vdd 2.26fF +C3823 ro_divider_buffered_0/divider_0/tspc_0/Z2 vdd 1.46fF +C3824 ro_divider_buffered_0/divider_0/tspc_0/Z1 vdd 0.99fF +C3825 ro_divider_buffered_0/divider_0/nor_1/A vdd 7.04fF +C3826 ro_divider_buffered_0/divider_0/tspc_0/a_630_n680# vdd 1.15fF **FLOATING +C3827 ro_divider_buffered_0/divider_0/clk vdd 23.46fF +C3828 ro_divider_buffered_0/divider_0/prescaler_0/nand_1/z1 vdd 0.36fF +C3829 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/D vdd 2.64fF +C3830 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Q vdd 3.69fF +C3831 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Q vdd 3.61fF +C3832 ro_divider_buffered_0/divider_0/prescaler_0/nand_0/z1 vdd 0.36fF +C3833 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/D vdd 3.12fF +C3834 ro_divider_buffered_0/divider_0/and_0/OUT vdd 5.62fF +C3835 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z4 vdd 0.86fF +C3836 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z3 vdd 2.26fF +C3837 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z2 vdd 1.46fF +C3838 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/Z1 vdd 0.99fF +C3839 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING +C3840 ro_divider_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# vdd 2.11fF **FLOATING +C3841 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z4 vdd 0.86fF +C3842 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z3 vdd 2.26fF +C3843 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z2 vdd 1.48fF +C3844 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/Z1 vdd 0.99fF +C3845 ro_divider_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# vdd 1.14fF **FLOATING +C3846 ro_divider_buffered_0/divider_0/prescaler_0/m1_2700_2190# vdd 4.22fF **FLOATING +C3847 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z4 vdd 0.86fF +C3848 ro_divider_buffered_0/divider_0/prescaler_0/Out vdd 4.59fF +C3849 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z3 vdd 2.26fF +C3850 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z2 vdd 1.46fF +C3851 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/Z1 vdd 0.99fF +C3852 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# vdd 1.16fF **FLOATING +C3853 ro_divider_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# vdd 2.11fF **FLOATING +C3854 ro_divider_buffered_0/divider_0/nor_1/Z1 vdd 1.34fF +C3855 ro_divider_buffered_0/divider_0/nor_0/Z1 vdd 1.34fF +C3856 ro_divider_buffered_0/divider_0/mc2 vdd 397.55fF +C3857 ro_divider_buffered_0/ro_complete_0/cbank_2/v vdd 16.53fF +C3858 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_5/vin vdd 0.78fF +C3859 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_4/vin vdd 1.50fF +C3860 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_2/vin vdd 1.30fF +C3861 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_3/vin vdd 0.56fF +C3862 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_1/vin vdd 1.14fF +C3863 ro_divider_buffered_0/ro_complete_0/cbank_2/switch_0/vin vdd 1.02fF +C3864 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_5/vin vdd 0.78fF +C3865 ro_divider_buffered_0/ro_complete_0/a0 vdd 416.44fF +C3866 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_4/vin vdd 1.50fF +C3867 ro_divider_buffered_0/ro_complete_0/a1 vdd 412.08fF +C3868 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_2/vin vdd 1.30fF +C3869 ro_divider_buffered_0/ro_complete_0/a3 vdd 402.75fF +C3870 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_3/vin vdd 0.56fF +C3871 ro_divider_buffered_0/ro_complete_0/a2 vdd 407.13fF +C3872 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_1/vin vdd 1.14fF +C3873 ro_divider_buffered_0/ro_complete_0/a4 vdd 398.91fF +C3874 ro_divider_buffered_0/ro_complete_0/cbank_1/switch_0/vin vdd 1.02fF +C3875 ro_divider_buffered_0/ro_complete_0/a5 vdd 395.69fF +C3876 ro_divider_buffered_0/ro_complete_0/cbank_0/v vdd 15.13fF +C3877 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_5/vin vdd 0.78fF +C3878 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_4/vin vdd 1.50fF +C3879 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_2/vin vdd 1.30fF +C3880 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_3/vin vdd 0.56fF +C3881 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_1/vin vdd 1.14fF +C3882 ro_divider_buffered_0/ro_complete_0/cbank_0/switch_0/vin vdd 1.02fF +C3883 ro_divider_buffered_0/tapered_buf_8/in vdd 1.13fF +C3884 ro_divider_buffered_0/tapered_buf_8/a_n10_n140# vdd 0.06fF **FLOATING +C3885 ro_divider_buffered_0/tapered_buf_8/a_210_n610# vdd 592.97fF **FLOATING +C3886 ro_divider_buffered_0/tapered_buf_8/a_160_230# vdd 0.15fF **FLOATING +C3887 ro_divider_buffered_0/tapered_buf_8/a_n10_230# vdd 0.13fF **FLOATING +C3888 ro_divider_buffered_0/tapered_buf_8/a_4670_0# vdd 252.41fF **FLOATING +C3889 ro_divider_buffered_0/tapered_buf_8/a_1650_0# vdd 63.61fF **FLOATING +C3890 ro_divider_buffered_0/tapered_buf_8/a_580_0# vdd 16.76fF **FLOATING +C3891 ro_divider_buffered_0/tapered_buf_8/a_160_n140# vdd 4.09fF **FLOATING +C3892 ro_divider_buffered_0/tapered_buf_7/in vdd 1.13fF +C3893 ro_divider_buffered_0/tapered_buf_7/a_n10_n140# vdd 0.06fF **FLOATING +C3894 ro_divider_buffered_0/tapered_buf_7/a_210_n610# vdd 592.97fF **FLOATING +C3895 ro_divider_buffered_0/tapered_buf_7/a_160_230# vdd 0.15fF **FLOATING +C3896 ro_divider_buffered_0/tapered_buf_7/a_n10_230# vdd 0.13fF **FLOATING +C3897 ro_divider_buffered_0/tapered_buf_7/a_4670_0# vdd 252.41fF **FLOATING +C3898 ro_divider_buffered_0/tapered_buf_7/a_1650_0# vdd 63.61fF **FLOATING +C3899 ro_divider_buffered_0/tapered_buf_7/a_580_0# vdd 16.76fF **FLOATING +C3900 ro_divider_buffered_0/tapered_buf_7/a_160_n140# vdd 4.09fF **FLOATING +C3901 ro_divider_buffered_0/tapered_buf_6/in vdd 1.13fF +C3902 ro_divider_buffered_0/tapered_buf_6/a_n10_n140# vdd 0.06fF **FLOATING +C3903 ro_divider_buffered_0/tapered_buf_6/a_210_n610# vdd 592.97fF **FLOATING +C3904 ro_divider_buffered_0/tapered_buf_6/a_160_230# vdd 0.15fF **FLOATING +C3905 ro_divider_buffered_0/tapered_buf_6/a_n10_230# vdd 0.13fF **FLOATING +C3906 ro_divider_buffered_0/tapered_buf_6/a_4670_0# vdd 252.41fF **FLOATING +C3907 ro_divider_buffered_0/tapered_buf_6/a_1650_0# vdd 63.61fF **FLOATING +C3908 ro_divider_buffered_0/tapered_buf_6/a_580_0# vdd 16.76fF **FLOATING +C3909 ro_divider_buffered_0/tapered_buf_6/a_160_n140# vdd 4.09fF **FLOATING +C3910 ro_divider_buffered_0/tapered_buf_5/in vdd 1.13fF +C3911 ro_divider_buffered_0/tapered_buf_5/a_n10_n140# vdd 0.06fF **FLOATING +C3912 ro_divider_buffered_0/tapered_buf_5/a_210_n610# vdd 592.97fF **FLOATING +C3913 ro_divider_buffered_0/tapered_buf_5/a_160_230# vdd 0.15fF **FLOATING +C3914 ro_divider_buffered_0/tapered_buf_5/a_n10_230# vdd 0.13fF **FLOATING +C3915 ro_divider_buffered_0/tapered_buf_5/a_4670_0# vdd 252.41fF **FLOATING +C3916 ro_divider_buffered_0/tapered_buf_5/a_1650_0# vdd 63.61fF **FLOATING +C3917 ro_divider_buffered_0/tapered_buf_5/a_580_0# vdd 16.76fF **FLOATING +C3918 ro_divider_buffered_0/tapered_buf_5/a_160_n140# vdd 4.09fF **FLOATING +C3919 ro_divider_buffered_0/tapered_buf_4/in vdd 1.13fF +C3920 ro_divider_buffered_0/tapered_buf_4/a_n10_n140# vdd 0.06fF **FLOATING +C3921 ro_divider_buffered_0/tapered_buf_4/a_210_n610# vdd 592.97fF **FLOATING +C3922 ro_divider_buffered_0/tapered_buf_4/a_160_230# vdd 0.15fF **FLOATING +C3923 ro_divider_buffered_0/tapered_buf_4/a_n10_230# vdd 0.13fF **FLOATING +C3924 ro_divider_buffered_0/tapered_buf_4/a_4670_0# vdd 252.41fF **FLOATING +C3925 ro_divider_buffered_0/tapered_buf_4/a_1650_0# vdd 63.61fF **FLOATING +C3926 ro_divider_buffered_0/tapered_buf_4/a_580_0# vdd 16.76fF **FLOATING +C3927 ro_divider_buffered_0/tapered_buf_4/a_160_n140# vdd 4.09fF **FLOATING +C3928 ro_divider_buffered_0/tapered_buf_3/in vdd 1.13fF +C3929 ro_divider_buffered_0/tapered_buf_3/a_n10_n140# vdd 0.06fF **FLOATING +C3930 ro_divider_buffered_0/tapered_buf_3/a_210_n610# vdd 592.97fF **FLOATING +C3931 ro_divider_buffered_0/tapered_buf_3/a_160_230# vdd 0.15fF **FLOATING +C3932 ro_divider_buffered_0/tapered_buf_3/a_n10_230# vdd 0.13fF **FLOATING +C3933 ro_divider_buffered_0/tapered_buf_3/a_4670_0# vdd 252.41fF **FLOATING +C3934 ro_divider_buffered_0/tapered_buf_3/a_1650_0# vdd 63.61fF **FLOATING +C3935 ro_divider_buffered_0/tapered_buf_3/a_580_0# vdd 16.76fF **FLOATING +C3936 ro_divider_buffered_0/tapered_buf_3/a_160_n140# vdd 4.09fF **FLOATING +C3937 ro_divider_buffered_0/tapered_buf_2/in vdd 1.13fF +C3938 ro_divider_buffered_0/tapered_buf_2/a_n10_n140# vdd 0.06fF **FLOATING +C3939 ro_divider_buffered_0/tapered_buf_2/a_210_n610# vdd 619.27fF **FLOATING +C3940 ro_divider_buffered_0/tapered_buf_2/a_160_230# vdd 0.15fF **FLOATING +C3941 ro_divider_buffered_0/tapered_buf_2/a_n10_230# vdd 0.13fF **FLOATING +C3942 ro_divider_buffered_0/tapered_buf_2/a_4670_0# vdd 252.41fF **FLOATING +C3943 ro_divider_buffered_0/tapered_buf_2/a_1650_0# vdd 63.61fF **FLOATING +C3944 ro_divider_buffered_0/tapered_buf_2/a_580_0# vdd 16.76fF **FLOATING +C3945 ro_divider_buffered_0/tapered_buf_2/a_160_n140# vdd 4.09fF **FLOATING +C3946 filter_buffered_0/v vdd 391.91fF +C3947 filter_buffered_0/tapered_buf_0/a_n10_n140# vdd 0.06fF **FLOATING +C3948 filter_buffered_0/tapered_buf_0/a_210_n610# vdd 592.97fF **FLOATING +C3949 filter_buffered_0/tapered_buf_0/a_160_230# vdd 0.15fF **FLOATING +C3950 filter_buffered_0/tapered_buf_0/a_n10_230# vdd 0.13fF **FLOATING +C3951 filter_buffered_0/tapered_buf_0/a_4670_0# vdd 252.41fF **FLOATING +C3952 filter_buffered_0/tapered_buf_0/a_1650_0# vdd 63.61fF **FLOATING +C3953 filter_buffered_0/tapered_buf_0/a_580_0# vdd 16.76fF **FLOATING +C3954 filter_buffered_0/tapered_buf_0/a_160_n140# vdd 4.09fF **FLOATING +C3955 filter_buffered_0/tapered_buf_1/a_n10_n140# vdd 0.06fF **FLOATING +C3956 filter_buffered_0/tapered_buf_1/a_210_n610# vdd 592.97fF **FLOATING +C3957 filter_buffered_0/tapered_buf_1/a_160_230# vdd 0.15fF **FLOATING +C3958 filter_buffered_0/tapered_buf_1/a_n10_230# vdd 0.13fF **FLOATING +C3959 filter_buffered_0/tapered_buf_1/a_4670_0# vdd 252.41fF **FLOATING +C3960 filter_buffered_0/tapered_buf_1/a_1650_0# vdd 63.61fF **FLOATING +C3961 filter_buffered_0/tapered_buf_1/a_580_0# vdd 16.76fF **FLOATING +C3962 filter_buffered_0/tapered_buf_1/a_160_n140# vdd 4.09fF **FLOATING +C3963 filter_buffered_0/filter_0/v vdd 476.54fF +C3964 filter_buffered_0/filter_0/a_4216_n5230# vdd 418.47fF **FLOATING +C3965 filter_buffered_0/filter_0/a_4216_n2998# vdd 1.03fF **FLOATING +C3966 cp_buffered_0/cp_0/down vdd 397.14fF +C3967 cp_buffered_0/tapered_buf_0/in vdd 1.13fF +C3968 cp_buffered_0/tapered_buf_0/a_n10_n140# vdd 0.06fF **FLOATING +C3969 cp_buffered_0/tapered_buf_0/a_210_n610# vdd 592.97fF **FLOATING +C3970 cp_buffered_0/tapered_buf_0/a_160_230# vdd 0.15fF **FLOATING +C3971 cp_buffered_0/tapered_buf_0/a_n10_230# vdd 0.13fF **FLOATING +C3972 cp_buffered_0/tapered_buf_0/a_4670_0# vdd 252.41fF **FLOATING +C3973 cp_buffered_0/tapered_buf_0/a_1650_0# vdd 63.61fF **FLOATING +C3974 cp_buffered_0/tapered_buf_0/a_580_0# vdd 16.76fF **FLOATING +C3975 cp_buffered_0/tapered_buf_0/a_160_n140# vdd 4.09fF **FLOATING +C3976 cp_buffered_0/cp_0/out vdd 397.36fF +C3977 cp_buffered_0/tapered_buf_1/in vdd 1.13fF +C3978 cp_buffered_0/tapered_buf_1/a_n10_n140# vdd 0.06fF **FLOATING +C3979 cp_buffered_0/tapered_buf_1/a_210_n610# vdd 592.97fF **FLOATING +C3980 cp_buffered_0/tapered_buf_1/a_160_230# vdd 0.15fF **FLOATING +C3981 cp_buffered_0/tapered_buf_1/a_n10_230# vdd 0.13fF **FLOATING +C3982 cp_buffered_0/tapered_buf_1/a_4670_0# vdd 252.41fF **FLOATING +C3983 cp_buffered_0/tapered_buf_1/a_1650_0# vdd 63.61fF **FLOATING +C3984 cp_buffered_0/tapered_buf_1/a_580_0# vdd 16.76fF **FLOATING +C3985 cp_buffered_0/tapered_buf_1/a_160_n140# vdd 4.09fF **FLOATING +C3986 cp_buffered_0/cp_0/upbar vdd 393.41fF +C3987 cp_buffered_0/cp_0/a_7110_n2840# vdd 0.17fF **FLOATING +C3988 cp_buffered_0/cp_0/a_3060_n2840# vdd 1.71fF **FLOATING +C3989 cp_buffered_0/cp_0/a_7110_0# vdd 0.17fF **FLOATING +C3990 cp_buffered_0/cp_0/a_6370_0# vdd 0.40fF **FLOATING +C3991 cp_buffered_0/cp_0/a_3060_0# vdd 1.65fF **FLOATING +C3992 cp_buffered_0/cp_0/a_1710_0# vdd 5.76fF **FLOATING +C3993 cp_buffered_0/cp_0/a_1710_n2840# vdd 5.24fF **FLOATING +C3994 cp_buffered_0/cp_0/a_10_n50# vdd 3.19fF **FLOATING +C3995 cp_buffered_0/tapered_buf_2/in vdd 1.13fF +C3996 cp_buffered_0/tapered_buf_2/a_n10_n140# vdd 0.06fF **FLOATING +C3997 cp_buffered_0/tapered_buf_2/a_210_n610# vdd 592.97fF **FLOATING +C3998 cp_buffered_0/tapered_buf_2/a_160_230# vdd 0.15fF **FLOATING +C3999 cp_buffered_0/tapered_buf_2/a_n10_230# vdd 0.13fF **FLOATING +C4000 cp_buffered_0/tapered_buf_2/a_4670_0# vdd 252.41fF **FLOATING +C4001 cp_buffered_0/tapered_buf_2/a_1650_0# vdd 63.61fF **FLOATING +C4002 cp_buffered_0/tapered_buf_2/a_580_0# vdd 16.76fF **FLOATING +C4003 cp_buffered_0/tapered_buf_2/a_160_n140# vdd 4.09fF **FLOATING +C4004 pll_full_buffered1_0/pll_full_0/divider_0/and_0/Z1 vdd 0.65fF +C4005 pll_full_buffered1_0/pll_full_0/divider_0/and_0/B vdd 2.45fF +C4006 pll_full_buffered1_0/pll_full_0/divider_0/and_0/A vdd 2.35fF +C4007 pll_full_buffered1_0/pll_full_0/divider_0/and_0/out1 vdd 2.99fF +C4008 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z4 vdd 0.86fF +C4009 pll_full_buffered1_0/pll_full_0/div vdd 15.26fF +C4010 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z3 vdd 2.26fF +C4011 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z2 vdd 1.46fF +C4012 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/Z1 vdd 0.99fF +C4013 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/B vdd 6.48fF +C4014 pll_full_buffered1_0/pll_full_0/divider_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING +C4015 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z4 vdd 0.86fF +C4016 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Q vdd 3.12fF +C4017 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z3 vdd 2.26fF +C4018 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z2 vdd 1.46fF +C4019 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/Z1 vdd 0.99fF +C4020 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/B vdd 7.12fF +C4021 pll_full_buffered1_0/pll_full_0/divider_0/tspc_1/a_630_n680# vdd 1.15fF **FLOATING +C4022 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z4 vdd 0.86fF +C4023 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Q vdd 3.14fF +C4024 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z3 vdd 2.26fF +C4025 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z2 vdd 1.46fF +C4026 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/Z1 vdd 0.99fF +C4027 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/A vdd 7.08fF +C4028 pll_full_buffered1_0/pll_full_0/divider_0/tspc_0/a_630_n680# vdd 1.15fF **FLOATING +C4029 pll_full_buffered1_0/pll_full_0/vco vdd 45.48fF +C4030 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/nand_1/z1 vdd 0.36fF +C4031 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/D vdd 2.64fF +C4032 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Q vdd 3.72fF +C4033 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Q vdd 3.61fF +C4034 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/nand_0/z1 vdd 0.36fF +C4035 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/D vdd 3.12fF +C4036 pll_full_buffered1_0/pll_full_0/divider_0/and_0/OUT vdd 5.67fF +C4037 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z4 vdd 0.86fF +C4038 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z3 vdd 2.26fF +C4039 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z2 vdd 1.19fF +C4040 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/Z1 vdd 0.99fF +C4041 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# vdd 1.47fF **FLOATING +C4042 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# vdd 2.11fF **FLOATING +C4043 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z4 vdd 0.86fF +C4044 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z3 vdd 2.26fF +C4045 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z2 vdd 1.48fF +C4046 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/Z1 vdd 0.99fF +C4047 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# vdd 1.14fF **FLOATING +C4048 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/m1_2700_2190# vdd 4.22fF **FLOATING +C4049 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z4 vdd 0.86fF +C4050 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/Out vdd 4.59fF +C4051 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z3 vdd 2.26fF +C4052 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z2 vdd 1.46fF +C4053 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/Z1 vdd 0.99fF +C4054 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# vdd 1.16fF **FLOATING +C4055 pll_full_buffered1_0/pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# vdd 2.11fF **FLOATING +C4056 pll_full_buffered1_0/pll_full_0/divider_0/nor_1/Z1 vdd 1.34fF +C4057 pll_full_buffered1_0/pll_full_0/divider_0/nor_0/Z1 vdd 1.34fF +C4058 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/v vdd 16.43fF +C4059 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_5/vin vdd 0.78fF +C4060 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_4/vin vdd 1.50fF +C4061 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_2/vin vdd 1.30fF +C4062 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_3/vin vdd 0.56fF +C4063 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_1/vin vdd 1.14fF +C4064 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_2/switch_0/vin vdd 1.02fF +C4065 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_5/vin vdd 0.78fF +C4066 pll_full_buffered1_0/pll_full_0/ro_complete_0/a0 vdd 5.35fF +C4067 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_4/vin vdd 1.50fF +C4068 pll_full_buffered1_0/pll_full_0/ro_complete_0/a1 vdd 6.54fF +C4069 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_2/vin vdd 1.30fF +C4070 pll_full_buffered1_0/pll_full_0/ro_complete_0/a3 vdd 5.96fF +C4071 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_3/vin vdd 0.56fF +C4072 pll_full_buffered1_0/pll_full_0/ro_complete_0/a2 vdd 5.21fF +C4073 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_1/vin vdd 1.14fF +C4074 pll_full_buffered1_0/pll_full_0/ro_complete_0/a4 vdd 5.81fF +C4075 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_1/switch_0/vin vdd 1.02fF +C4076 pll_full_buffered1_0/pll_full_0/ro_complete_0/a5 vdd 6.74fF +C4077 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/v vdd 15.12fF +C4078 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_5/vin vdd 0.78fF +C4079 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_4/vin vdd 1.50fF +C4080 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_2/vin vdd 1.30fF +C4081 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_3/vin vdd 0.56fF +C4082 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_1/vin vdd 1.14fF +C4083 pll_full_buffered1_0/pll_full_0/ro_complete_0/cbank_0/switch_0/vin vdd 1.02fF +C4084 pll_full_buffered1_0/pll_full_0/filter_0/a_4216_n5230# vdd 418.90fF **FLOATING +C4085 pll_full_buffered1_0/pll_full_0/filter_0/a_4216_n2998# vdd 1.39fF **FLOATING +C4086 pll_full_buffered1_0/pll_full_0/cp_0/vbias vdd 2.41fF +C4087 pll_full_buffered1_0/pll_full_0/cp_0/a_7110_n2840# vdd 0.17fF **FLOATING +C4088 pll_full_buffered1_0/pll_full_0/cp_0/a_3060_n2840# vdd 1.71fF **FLOATING +C4089 pll_full_buffered1_0/pll_full_0/cp_0/a_7110_0# vdd 0.17fF **FLOATING +C4090 pll_full_buffered1_0/pll_full_0/cp_0/a_6370_0# vdd 0.40fF **FLOATING +C4091 pll_full_buffered1_0/pll_full_0/cp_0/a_3060_0# vdd 2.50fF **FLOATING +C4092 pll_full_buffered1_0/pll_full_0/cp_0/a_1710_0# vdd 7.47fF **FLOATING +C4093 pll_full_buffered1_0/pll_full_0/cp_0/a_10_n50# vdd 2.96fF **FLOATING +C4094 pll_full_buffered1_0/pll_full_0/pd_0/UP vdd 4.55fF +C4095 pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Z1 vdd 0.39fF +C4096 pll_full_buffered1_0/pll_full_0/pd_0/and_pd_0/Out1 vdd 2.22fF +C4097 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/z5 vdd 1.10fF +C4098 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z4 vdd 1.07fF +C4099 pll_full_buffered1_0/pll_full_0/pd_0/R vdd 3.05fF +C4100 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar vdd 0.79fF +C4101 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z2 vdd 1.22fF +C4102 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z1 vdd 0.67fF +C4103 pll_full_buffered1_0/pll_full_0/pd_0/DOWN vdd 7.30fF +C4104 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Qbar1 vdd 1.34fF +C4105 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_1/Z3 vdd 2.12fF +C4106 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/z5 vdd 1.10fF +C4107 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z4 vdd 1.07fF +C4108 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar vdd 0.88fF +C4109 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z2 vdd 1.22fF +C4110 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z1 vdd 0.67fF +C4111 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Qbar1 vdd 1.34fF +C4112 pll_full_buffered1_0/pll_full_0/pd_0/tspc_r_0/Z3 vdd 2.12fF +C4113 pll_full_buffered1_0/pll_full_0/ref vdd 391.18fF +C4114 pll_full_buffered1_0/pll_full_0/cp_0/upbar vdd 15.33fF +C4115 pll_full_buffered1_0/tapered_buf_0/in vdd 1.13fF +C4116 pll_full_buffered1_0/tapered_buf_0/a_n10_n140# vdd 0.06fF **FLOATING +C4117 pll_full_buffered1_0/tapered_buf_0/a_210_n610# vdd 592.97fF **FLOATING +C4118 pll_full_buffered1_0/tapered_buf_0/a_160_230# vdd 0.15fF **FLOATING +C4119 pll_full_buffered1_0/tapered_buf_0/a_n10_230# vdd 0.13fF **FLOATING +C4120 pll_full_buffered1_0/tapered_buf_0/a_4670_0# vdd 252.41fF **FLOATING +C4121 pll_full_buffered1_0/tapered_buf_0/a_1650_0# vdd 63.61fF **FLOATING +C4122 pll_full_buffered1_0/tapered_buf_0/a_580_0# vdd 16.76fF **FLOATING +C4123 pll_full_buffered1_0/tapered_buf_0/a_160_n140# vdd 4.09fF **FLOATING +C4124 pll_full_buffered1_0/tapered_buf_1/in vdd 1.13fF +C4125 pll_full_buffered1_0/tapered_buf_1/a_n10_n140# vdd 0.06fF **FLOATING +C4126 pll_full_buffered1_0/tapered_buf_1/a_210_n610# vdd 619.27fF **FLOATING +C4127 pll_full_buffered1_0/tapered_buf_1/a_160_230# vdd 0.15fF **FLOATING +C4128 pll_full_buffered1_0/tapered_buf_1/a_n10_230# vdd 0.13fF **FLOATING +C4129 pll_full_buffered1_0/tapered_buf_1/a_4670_0# vdd 252.41fF **FLOATING +C4130 pll_full_buffered1_0/tapered_buf_1/a_1650_0# vdd 63.61fF **FLOATING +C4131 pll_full_buffered1_0/tapered_buf_1/a_580_0# vdd 16.76fF **FLOATING +C4132 pll_full_buffered1_0/tapered_buf_1/a_160_n140# vdd 4.09fF **FLOATING +C4133 pll_full_buffered1_0/tapered_buf_2/out vdd 385.90fF +C4134 pll_full_buffered1_0/tapered_buf_2/a_n10_n140# vdd 0.06fF **FLOATING +C4135 pll_full_buffered1_0/tapered_buf_2/a_210_n610# vdd 592.97fF **FLOATING +C4136 pll_full_buffered1_0/tapered_buf_2/a_160_230# vdd 0.15fF **FLOATING +C4137 pll_full_buffered1_0/tapered_buf_2/a_n10_230# vdd 0.13fF **FLOATING +C4138 pll_full_buffered1_0/tapered_buf_2/a_4670_0# vdd 252.41fF **FLOATING +C4139 pll_full_buffered1_0/tapered_buf_2/a_1650_0# vdd 63.61fF **FLOATING +C4140 pll_full_buffered1_0/tapered_buf_2/a_580_0# vdd 16.76fF **FLOATING +C4141 pll_full_buffered1_0/tapered_buf_2/a_160_n140# vdd 4.09fF **FLOATING .ends