cp buffered
diff --git a/gds/user_analog_project_wrapper.gds.gz b/gds/user_analog_project_wrapper.gds.gz index 813ee3d..390d6d0 100644 --- a/gds/user_analog_project_wrapper.gds.gz +++ b/gds/user_analog_project_wrapper.gds.gz Binary files differ
diff --git a/netgen/user_analog_project_wrapper.spice b/netgen/user_analog_project_wrapper.spice index f8116a2..2e457dd 100644 --- a/netgen/user_analog_project_wrapper.spice +++ b/netgen/user_analog_project_wrapper.spice
@@ -106,1955 +106,1955 @@ + wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6] + wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3] + wbs_stb_i wbs_we_i -C0 divider_1/and_0/OUT divider_1/and_0/Z1 0.04fF -C1 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z2 0.01fF -C2 divider_1/prescaler_0/tspc_2/Q divider_1/clk 0.05fF -C3 ro_complete_buffered_0/tapered_buf_2/a_580_0# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.35fF -C4 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF -C5 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/DOWN 0.02fF -C6 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/R 0.30fF -C7 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.19fF -C8 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/nor_1/A 0.15fF -C9 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/and_0/A 0.80fF -C10 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/R 0.36fF -C11 pd_buffered_0/pd_0/tspc_r_1/Z1 pd_buffered_0/pd_0/tspc_r_1/Z2 0.71fF -C12 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z4 0.20fF -C13 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF -C14 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_0/B 0.00fF -C15 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.05fF -C16 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/Q 0.04fF -C17 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a4 0.12fF -C18 ro_complete_0/a2 ro_complete_0/cbank_0/switch_3/vin 0.09fF -C19 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C20 div_pd_buffered_0/tapered_buf_2/a_160_230# div_pd_buffered_0/tapered_buf_2/a_160_n140# 0.17fF -C21 div_pd_buffered_0/tapered_buf_2/a_210_n610# div_pd_buffered_0/tapered_buf_2/a_1650_0# 2.89fF -C22 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/z5 0.04fF -C23 divider_1/nor_1/B divider_1/tspc_0/a_630_n680# 0.01fF -C24 divider_1/and_0/out1 divider_1/and_0/B 0.18fF -C25 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z4 0.02fF -C26 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C27 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/vco 0.45fF -C28 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/a_n10_n140# 0.01fF -C29 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.14fF -C30 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a4 0.09fF -C31 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a5 0.09fF -C32 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/tapered_buf_3/in 0.02fF -C33 ro_complete_buffered_0/tapered_buf_1/a_580_0# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.35fF -C34 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z1 0.03fF -C35 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.01fF -C36 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C37 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/A 0.01fF -C38 div_pd_buffered_0/divider_0/tspc_0/Z3 div_pd_buffered_0/divider_0/tspc_0/Q 0.05fF -C39 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/in 0.02fF -C40 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/UP 0.33fF -C41 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF -C42 divider_1/mc2 divider_1/nor_1/A 0.04fF -C43 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF -C44 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Qbar1 0.20fF -C45 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF -C46 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Q 0.05fF -C47 io_clamp_low[0] io_analog[4] 0.53fF -C48 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.17fF -C49 ro_complete_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_7/a_4670_0# 4.78fF -C50 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/Out 0.05fF -C51 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z1 0.09fF -C52 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z2 0.19fF -C53 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF -C54 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C55 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Z4 0.65fF -C56 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.15fF -C57 pll_full_1/ro_complete_0/a5 pll_full_1/vco 0.15fF -C58 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_0/Q 0.01fF -C59 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z1 0.06fF -C60 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_160_230# 0.02fF -C61 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_210_n610# 0.22fF -C62 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/ref 0.65fF -C63 divider_1/prescaler_0/tspc_0/Z2 divider_1/and_0/OUT 0.06fF -C64 ro_complete_0/a5 ro_complete_0/cbank_1/v 0.10fF -C65 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/a0 0.09fF -C66 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF -C67 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.02fF -C68 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 0.22fF -C69 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/ro_complete_0/a2 26.29fF -C70 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_n10_n140# 0.05fF -C71 pd_buffered_0/tapered_buf_2/a_580_0# pd_buffered_0/tapered_buf_2/a_210_n610# 0.84fF -C72 pll_full_0/pd_0/R pll_full_0/pd_0/DOWN 0.36fF -C73 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z1 0.71fF -C74 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z2 1.07fF -C75 divider_0/nor_0/Z1 divider_0/and_0/B 0.78fF -C76 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.65fF -C77 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_160_n140# 0.22fF -C78 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/R 0.03fF -C79 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/tapered_buf_6/in 0.05fF -C80 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z3 0.38fF -C81 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z2 1.07fF -C82 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF -C83 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF -C84 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/upbar 0.29fF -C85 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_0/Q 0.01fF -C86 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF -C87 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z3 0.25fF -C88 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/R 0.51fF -C89 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_580_0# 0.35fF -C90 div_pd_buffered_0/tapered_buf_0/a_580_0# div_pd_buffered_0/tapered_buf_0/a_1650_0# 1.27fF -C91 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/a_580_0# 0.35fF -C92 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/ro_complete_0/a4 26.29fF -C93 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF -C94 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.01fF -C95 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.09fF -C96 pd_buffered_0/pd_0/tspc_r_0/z5 pd_buffered_0/pd_0/UP 0.03fF -C97 divider_1/tspc_0/Z1 divider_1/nor_1/A 0.03fF -C98 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/nor_0/B 0.22fF -C99 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.19fF -C100 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/vco 0.01fF -C101 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/and_pd_0/Z1 0.18fF -C102 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.45fF -C103 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_580_0# 0.35fF -C104 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF -C105 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF -C106 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a3 0.13fF -C107 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF -C108 pll_full_1/pd_0/tspc_r_0/Qbar pll_full_1/pd_0/UP 0.21fF -C109 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/vco 0.45fF -C110 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/in 0.19fF -C111 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C112 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/UP 0.03fF -C113 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/clk 0.14fF -C114 divider_1/nor_1/B divider_1/nor_0/B 0.47fF -C115 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a3 2.04fF -C116 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z2 0.23fF -C117 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.06fF -C118 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/vco 1.46fF -C119 pd_buffered_0/tapered_buf_0/a_210_n610# pd_buffered_0/tapered_buf_0/out 26.29fF -C120 pd_buffered_0/tapered_buf_1/a_160_n140# pd_buffered_0/tapered_buf_1/a_n10_n140# 0.05fF -C121 pd_buffered_0/pd_0/and_pd_0/Z1 pd_buffered_0/pd_0/UP 0.06fF -C122 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/div 0.04fF -C123 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z2 0.40fF -C124 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/vco 0.29fF -C125 pll_full_0/ref pll_full_0/pd_0/R 0.61fF -C126 divider_1/mc2 divider_1/and_0/OUT 0.05fF -C127 divider_1/nor_0/Z1 divider_1/nor_0/B 0.06fF -C128 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF -C129 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C130 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF -C131 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/ref 0.19fF -C132 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF -C133 pll_full_0/ro_complete_0/a4 pll_full_0/vco 0.01fF -C134 divider_1/tspc_1/Q divider_1/nor_0/B 0.22fF -C135 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_2/Q 0.19fF -C136 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/clk 0.01fF -C137 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.38fF -C138 div_pd_buffered_0/tapered_buf_2/a_4670_0# div_pd_buffered_0/tapered_buf_2/a_210_n610# 29.21fF -C139 divider_0/mc2 divider_0/nor_1/A 0.04fF -C140 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/nor_1/A 0.03fF -C141 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF -C142 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF -C143 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Q 0.01fF -C144 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/and_0/A 0.01fF -C145 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/a0 3.46fF -C146 ro_complete_buffered_0/tapered_buf_0/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/a_160_n140# 0.05fF -C147 ro_complete_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/a_580_0# 0.84fF -C148 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF -C149 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Q 0.04fF -C150 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.33fF -C151 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/vco 1.27fF -C152 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_2/D 0.16fF -C153 divider_0/and_0/B divider_0/and_0/Z1 0.07fF -C154 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/nor_1/A 0.15fF -C155 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF -C156 ro_complete_buffered_0/tapered_buf_3/a_1650_0# ro_complete_buffered_0/tapered_buf_3/a_580_0# 1.27fF -C157 ro_complete_0/a0 ro_complete_0/cbank_2/switch_4/vin 0.13fF -C158 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF -C159 pll_full_0/ref pll_full_0/pd_0/DOWN 1.48fF -C160 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF -C161 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C162 divider_1/tspc_2/a_630_n680# divider_1/Out 0.04fF -C163 divider_1/nor_0/B divider_1/tspc_2/Z2 0.40fF -C164 divider_1/prescaler_0/tspc_0/D divider_1/clk 0.29fF -C165 divider_0/tspc_0/Z3 divider_0/tspc_0/Q 0.05fF -C166 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF -C167 divider_1/nor_1/B divider_1/tspc_1/Z1 0.03fF -C168 divider_0/mc2 divider_0/nor_0/B 0.15fF -C169 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/in 0.04fF -C170 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/nor_1/A 0.01fF -C171 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# 0.01fF -C172 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C173 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/tspc_r_1/z5 0.20fF -C174 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z1 0.03fF -C175 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z3 0.05fF -C176 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C177 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/nor_0/B 0.47fF -C178 divider_1/prescaler_0/Out divider_1/tspc_0/Z2 0.11fF -C179 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/a_630_n680# 0.05fF -C180 div_pd_buffered_0/tapered_buf_2/a_160_230# div_pd_buffered_0/tapered_buf_2/a_580_0# 0.02fF -C181 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z3 0.33fF -C182 ro_complete_0/a2 ro_complete_0/cbank_2/switch_3/vin 0.09fF -C183 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/tspc_r_0/Qbar 0.02fF -C184 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z3 0.06fF -C185 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/vco 0.12fF -C186 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/UP 0.21fF -C187 div_pd_buffered_0/pd_0/tspc_r_1/Z4 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF -C188 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF -C189 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z2 0.71fF -C190 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_1/Z4 0.02fF -C191 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z3 0.06fF -C192 pd_buffered_0/tapered_buf_0/a_160_230# pd_buffered_0/tapered_buf_0/a_160_n140# 0.17fF -C193 pd_buffered_0/pd_0/and_pd_0/Out1 pd_buffered_0/pd_0/and_pd_0/Z1 0.18fF -C194 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/Out 0.05fF -C195 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z2 0.01fF -C196 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/out1 0.31fF -C197 pll_full_1/divider_0/tspc_1/Z4 pll_full_1/divider_0/tspc_0/Q 0.15fF -C198 cp_buffered_0/cp_0/upbar cp_buffered_0/tapered_buf_0/a_210_n610# 26.29fF -C199 io_clamp_low[1] io_clamp_high[1] 0.53fF -C200 div_pd_buffered_0/tapered_buf_3/a_n10_230# div_pd_buffered_0/pd_0/DOWN 0.02fF -C201 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/a_630_n680# 0.01fF -C202 divider_0/tspc_2/a_630_n680# divider_0/nor_0/B 0.35fF -C203 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF -C204 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF -C205 pll_full_1/pd_0/DOWN pll_full_1/pd_0/R 0.36fF -C206 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF -C207 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF -C208 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF -C209 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/z5 0.20fF -C210 pll_full_1/ref pll_full_1/pd_0/tspc_r_0/Z1 0.17fF -C211 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/B 0.35fF -C212 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/vco 0.60fF -C213 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_n10_n140# 0.05fF -C214 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 0.84fF -C215 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.19fF -C216 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF -C217 div_pd_buffered_0/pd_0/and_pd_0/Out1 div_pd_buffered_0/pd_0/UP 0.33fF -C218 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z3 0.33fF -C219 pd_buffered_0/tapered_buf_3/in pd_buffered_0/pd_0/DIV 0.02fF -C220 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_0/Q 0.45fF -C221 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.03fF -C222 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_1/B 0.35fF -C223 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/vco 0.11fF -C224 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF -C225 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/and_0/B 0.29fF -C226 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_580_0# 0.02fF -C227 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/in 0.19fF -C228 cp_buffered_0/tapered_buf_0/a_1650_0# cp_buffered_0/tapered_buf_0/a_210_n610# 2.89fF -C229 div_pd_buffered_0/tapered_buf_4/a_1650_0# div_pd_buffered_0/tapered_buf_4/a_4670_0# 4.78fF -C230 divider_1/and_0/OUT divider_1/and_0/out1 0.31fF -C231 ro_complete_0/a2 ro_complete_0/cbank_2/v 0.05fF -C232 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF -C233 pll_full_0/ro_complete_0/a1 pll_full_0/vco 0.11fF -C234 div_pd_buffered_0/pd_0/tspc_r_0/Z2 div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.14fF -C235 divider_0/prescaler_0/Out divider_0/tspc_0/a_630_n680# 0.01fF -C236 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/a_740_n680# 0.08fF -C237 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/in 0.19fF -C238 ro_complete_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 2.89fF -C239 pd_buffered_0/tapered_buf_2/a_n10_230# pd_buffered_0/tapered_buf_2/a_160_230# 0.09fF -C240 pd_buffered_0/tapered_buf_2/a_4670_0# pd_buffered_0/tapered_buf_2/a_210_n610# 29.21fF -C241 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/nor_1/B 0.06fF -C242 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF -C243 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/Z3 0.16fF -C244 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z2 1.07fF -C245 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF -C246 cp_buffered_0/tapered_buf_2/in cp_buffered_0/tapered_buf_2/a_160_n140# 0.19fF -C247 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.12fF -C248 div_pd_buffered_0/tapered_buf_0/a_210_n610# div_pd_buffered_0/divider_0/clk 26.29fF -C249 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/and_0/OUT 0.05fF -C250 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF -C251 divider_1/tspc_1/Z1 divider_1/tspc_1/Z3 0.06fF -C252 divider_1/tspc_0/Z3 divider_1/nor_1/A 0.38fF -C253 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF -C254 div_pd_buffered_0/tapered_buf_4/a_1650_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 2.89fF -C255 divider_1/nor_0/B divider_1/and_0/B 0.29fF -C256 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_0/Q 0.45fF -C257 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF -C258 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/tspc_r_1/Qbar1 0.01fF -C259 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z3 0.27fF -C260 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/R 0.01fF -C261 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF -C262 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/tspc_r_1/Qbar 0.21fF -C263 divider_1/nor_1/B divider_1/nor_0/Z1 0.18fF -C264 divider_1/nor_1/B divider_1/tspc_1/Q 0.51fF -C265 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z2 0.19fF -C266 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.22fF -C267 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a4 0.12fF -C268 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF -C269 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_1650_0# 1.27fF -C270 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/v 0.05fF -C271 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z4 0.00fF -C272 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.15fF -C273 divider_1/tspc_0/a_630_n680# divider_1/nor_1/A 0.35fF -C274 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.35fF -C275 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z2 0.14fF -C276 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z3 0.05fF -C277 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.32fF -C278 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/vco 0.01fF -C279 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_1650_0# 1.27fF -C280 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF -C281 divider_0/nor_1/A divider_0/tspc_0/Z1 0.03fF -C282 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF -C283 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/tspc_r_0/Qbar1 0.01fF -C284 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/R 0.29fF -C285 divider_1/prescaler_0/tspc_2/Z2 divider_1/and_0/OUT 0.05fF -C286 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF -C287 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF -C288 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF -C289 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.02fF -C290 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 0.22fF -C291 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z3 0.16fF -C292 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/vco 0.12fF -C293 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z4 0.00fF -C294 divider_1/nor_1/B divider_1/tspc_2/Z2 0.20fF -C295 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF -C296 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C297 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/and_0/B 0.18fF -C298 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.00fF -C299 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/DOWN 0.03fF -C300 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/in 0.19fF -C301 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF -C302 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF -C303 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z3 0.06fF -C304 pll_full_1/divider_0/nor_0/B pll_full_1/div 0.27fF -C305 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/DOWN 0.03fF -C306 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF -C307 divider_1/tspc_1/Q divider_1/tspc_2/Z2 0.14fF -C308 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_0/D 0.32fF -C309 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/clk 0.01fF -C310 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF -C311 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z1 0.17fF -C312 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF -C313 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF -C314 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.12fF -C315 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_6/in 0.10fF -C316 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/a0 0.09fF -C317 pd_buffered_0/tapered_buf_1/a_4670_0# pd_buffered_0/tapered_buf_1/a_1650_0# 4.78fF -C318 pd_buffered_0/pd_0/tspc_r_0/Z4 pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF -C319 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_1/Q 0.51fF -C320 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z2 0.01fF -C321 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.08fF -C322 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.05fF -C323 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z1 0.01fF -C324 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_0/Q 0.22fF -C325 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF -C326 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF -C327 cp_buffered_0/cp_0/a_10_n50# cp_buffered_0/cp_0/a_1710_0# 0.04fF -C328 pll_full_0/pd_0/and_pd_0/Z1 pll_full_0/pd_0/UP 0.06fF -C329 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/DOWN 0.11fF -C330 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF -C331 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C332 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF -C333 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/vco 0.14fF -C334 divider_1/tspc_2/Z1 divider_1/tspc_2/Z3 0.06fF -C335 divider_1/nor_0/B divider_1/Out 0.22fF -C336 div_pd_buffered_0/pd_0/tspc_r_0/Z2 div_pd_buffered_0/pd_0/R 0.21fF -C337 divider_0/tspc_0/Z3 divider_0/tspc_0/a_630_n680# 0.05fF -C338 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/nor_1/B 0.30fF -C339 divider_1/nor_1/B divider_1/tspc_1/Z3 0.38fF -C340 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z1 0.00fF -C341 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.11fF -C342 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/v 0.05fF -C343 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/UP 0.11fF -C344 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_2/Z2 0.20fF -C345 pll_full_0/pd_0/tspc_r_1/z5 pll_full_0/pd_0/DOWN 0.03fF -C346 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z3 0.38fF -C347 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z4 0.12fF -C348 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z2 1.07fF -C349 divider_0/tspc_1/Q divider_0/tspc_2/a_630_n680# 0.01fF -C350 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF -C351 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z2 0.25fF -C352 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF -C353 ro_complete_0/a2 ro_complete_0/cbank_0/switch_2/vin 0.14fF -C354 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a4 0.09fF -C355 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a5 0.09fF -C356 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z2 0.15fF -C357 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF -C358 divider_1/tspc_1/Z2 divider_1/tspc_1/Z4 0.36fF -C359 divider_1/tspc_1/Z3 divider_1/tspc_1/Q 0.05fF -C360 divider_1/nor_1/A divider_1/tspc_0/Z4 0.21fF -C361 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z4 0.08fF -C362 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z3 0.05fF -C363 pll_full_1/pd_0/R pll_full_1/pd_0/UP 0.46fF -C364 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF -C365 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/and_pd_0/Z1 0.07fF -C366 pll_full_1/pd_0/tspc_r_1/z5 pll_full_1/div 0.04fF -C367 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Z4 0.12fF -C368 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF -C369 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/clk 0.64fF -C370 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z4 0.12fF -C371 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF -C372 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF -C373 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/nor_1/B 1.21fF -C374 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/nor_0/B 0.06fF -C375 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z3 0.65fF -C376 divider_0/nor_1/B divider_0/tspc_1/Z2 0.30fF -C377 pd_buffered_0/tapered_buf_0/a_n10_n140# pd_buffered_0/tapered_buf_0/a_160_n140# 0.05fF -C378 pd_buffered_0/tapered_buf_0/a_210_n610# pd_buffered_0/tapered_buf_0/a_580_0# 0.84fF -C379 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/Z1 0.36fF -C380 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF -C381 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF -C382 divider_0/prescaler_0/tspc_2/Q divider_0/clk 0.05fF -C383 ro_complete_buffered_0/tapered_buf_3/a_n10_n140# ro_complete_buffered_0/tapered_buf_3/in 0.04fF -C384 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_1/B 0.30fF -C385 div_pd_buffered_0/tapered_buf_3/a_n10_n140# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.05fF -C386 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF -C387 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF -C388 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/vco 0.05fF -C389 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF -C390 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.09fF -C391 ro_complete_buffered_0/tapered_buf_7/a_4670_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 29.21fF -C392 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.09fF -C393 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z4 0.02fF -C394 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Q 0.04fF -C395 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.01fF -C396 divider_1/nor_1/B divider_1/and_0/B 0.31fF -C397 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.64fF -C398 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/tapered_buf_6/in 1.30fF -C399 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/and_0/OUT 0.14fF -C400 pll_full_1/divider_0/prescaler_0/Out pll_full_1/vco 0.51fF -C401 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF -C402 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF -C403 divider_1/tspc_0/Q divider_1/tspc_1/a_630_n680# 0.01fF -C404 divider_1/prescaler_0/tspc_0/Z3 divider_1/clk 0.64fF -C405 divider_1/nor_0/Z1 divider_1/and_0/B 0.78fF -C406 divider_0/and_0/out1 divider_0/and_0/B 0.18fF -C407 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF -C408 pd_buffered_0/tapered_buf_2/a_n10_230# pd_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF -C409 pll_full_0/cp_0/a_1710_0# pll_full_0/pd_0/DOWN 0.04fF -C410 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z4 0.28fF -C411 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.20fF -C412 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/DOWN 0.03fF -C413 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/clk 0.04fF -C414 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_580_0# 1.27fF -C415 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF -C416 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/tapered_buf_6/in 1.27fF -C417 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/and_0/B 0.08fF -C418 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.20fF -C419 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.09fF -C420 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/vco 0.12fF -C421 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Q 0.05fF -C422 divider_1/prescaler_0/tspc_0/Z2 divider_1/clk 0.11fF -C423 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/R 0.02fF -C424 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z1 0.09fF -C425 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF -C426 ro_complete_0/a0 ro_complete_0/cbank_2/switch_5/vin 0.09fF -C427 pll_full_1/pd_0/R pll_full_1/ref 0.61fF -C428 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_0/B 0.00fF -C429 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF -C430 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF -C431 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.11fF -C432 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_160_230# 0.17fF -C433 pd_buffered_0/tapered_buf_3/a_1650_0# pd_buffered_0/tapered_buf_3/a_4670_0# 4.78fF -C434 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/Z4 0.65fF -C435 divider_0/mc2 divider_0/and_0/B 0.20fF -C436 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF -C437 ro_complete_buffered_0/tapered_buf_6/a_n10_n140# ro_complete_buffered_0/tapered_buf_6/in 0.04fF -C438 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z2 1.07fF -C439 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF -C440 divider_0/nor_1/Z1 divider_0/and_0/A 0.80fF -C441 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/B 0.31fF -C442 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.22fF -C443 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.04fF -C444 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_160_230# 0.17fF -C445 cp_buffered_0/tapered_buf_1/a_1650_0# cp_buffered_0/tapered_buf_1/a_4670_0# 4.78fF -C446 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/tspc_r_0/Qbar 0.05fF -C447 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF -C448 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF -C449 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF -C450 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Q 0.20fF -C451 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/D 0.09fF -C452 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF -C453 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/Qbar 0.01fF -C454 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z1 0.03fF -C455 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF -C456 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C457 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/in 0.19fF -C458 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 2.89fF -C459 divider_0/mc2 divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF -C460 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF -C461 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C462 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/a3 0.09fF -C463 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/UP 0.45fF -C464 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF -C465 div_pd_buffered_0/tapered_buf_1/a_n10_n140# div_pd_buffered_0/tapered_buf_1/in 0.04fF -C466 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.15fF -C467 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/a_630_n680# 0.12fF -C468 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/pd_0/UP 0.19fF -C469 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF -C470 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF -C471 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z4 0.00fF -C472 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF -C473 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/nand_1/z1 0.22fF -C474 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/tspc_0/D 0.04fF -C475 ro_complete_buffered_0/tapered_buf_3/a_160_230# ro_complete_buffered_0/tapered_buf_3/a_n10_230# 0.09fF -C476 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_4670_0# 29.21fF -C477 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF -C478 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF -C479 pll_full_0/ro_complete_0/a5 pll_full_0/vco 0.15fF -C480 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/tapered_buf_0/a_160_230# 0.09fF -C481 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.25fF -C482 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C483 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/nor_1/A 0.15fF -C484 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/R 0.61fF -C485 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z3 0.45fF -C486 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/and_0/A 0.26fF -C487 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C488 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.12fF -C489 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 1.07fF -C490 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/vco 0.01fF -C491 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z1 0.08fF -C492 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF -C493 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF -C494 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF -C495 div_pd_buffered_0/tapered_buf_3/a_160_n140# div_pd_buffered_0/tapered_buf_3/a_210_n610# 0.22fF -C496 divider_1/tspc_2/Z1 divider_1/tspc_2/Z4 0.00fF -C497 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/tspc_r_0/Z1 0.71fF -C498 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z3 0.38fF -C499 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/a_740_n680# 0.08fF -C500 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/Z2 0.14fF -C501 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z3 0.65fF -C502 divider_1/nor_1/B divider_1/nor_1/A 1.21fF -C503 ro_complete_buffered_0/tapered_buf_1/in gnd 0.04fF -C504 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF -C505 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.28fF -C506 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/tapered_buf_1/a_1650_0# 2.89fF -C507 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/tspc_2/Z3 0.05fF -C508 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.13fF -C509 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF -C510 div_pd_buffered_0/divider_0/tspc_2/Z2 div_pd_buffered_0/divider_0/tspc_2/Z3 0.16fF -C511 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z4 0.22fF -C512 pll_full_1/ro_complete_0/cbank_2/v pll_full_1/vco 1.36fF -C513 divider_1/prescaler_0/Out divider_1/tspc_0/Z3 0.45fF -C514 divider_0/tspc_1/Q divider_0/nor_0/B 0.22fF -C515 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/Q 0.19fF -C516 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF -C517 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z4 0.12fF -C518 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z2 1.07fF -C519 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.01fF -C520 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF -C521 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF -C522 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_0/B 0.22fF -C523 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF -C524 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/vco 0.01fF -C525 divider_1/nor_1/B divider_1/nor_1/Z1 0.06fF -C526 ro_complete_buffered_0/tapered_buf_6/a_210_n610# ro_complete_buffered_0/tapered_buf_6/out 26.29fF -C527 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/and_pd_0/Out1 0.33fF -C528 divider_1/tspc_0/a_630_n680# divider_1/prescaler_0/Out 0.01fF -C529 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF -C530 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF -C531 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.22fF -C532 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/a_630_n680# 0.35fF -C533 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.91fF -C534 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C535 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF -C536 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/out1 0.06fF -C537 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Z4 0.21fF -C538 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z3 0.45fF -C539 pd_buffered_0/tapered_buf_0/a_210_n610# pd_buffered_0/tapered_buf_0/a_4670_0# 29.21fF -C540 div_pd_buffered_0/divider_0/and_0/A div_pd_buffered_0/divider_0/and_0/B 0.18fF -C541 io_clamp_low[0] io_clamp_high[0] 0.53fF -C542 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C543 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_1/Q 0.13fF -C544 divider_0/tspc_2/a_630_n680# divider_0/Out 0.04fF -C545 divider_0/nor_0/B divider_0/tspc_2/Z2 0.40fF -C546 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.29fF -C547 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_0/vin 0.19fF -C548 div_pd_buffered_0/tapered_buf_2/a_210_n610# div_pd_buffered_0/pd_0/REF 26.29fF -C549 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z2 0.23fF -C550 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF -C551 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/vco 1.46fF -C552 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/div 0.04fF -C553 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z2 0.40fF -C554 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/vco 0.29fF -C555 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/a_n10_n140# 0.01fF -C556 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.13fF -C557 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C558 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF -C559 pd_buffered_0/tapered_buf_1/a_160_230# pd_buffered_0/tapered_buf_1/a_n10_230# 0.09fF -C560 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_4670_0# 29.21fF -C561 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/z5 0.11fF -C562 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/a_630_n680# 0.01fF -C563 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF -C564 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_2/D 0.16fF -C565 pll_full_1/ro_complete_0/cbank_1/switch_2/vin pll_full_1/vco 1.46fF -C566 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.24fF -C567 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF -C568 divider_0/tspc_1/Z3 divider_0/tspc_1/Q 0.05fF -C569 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.15fF -C570 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF -C571 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/in 0.02fF -C572 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF -C573 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF -C574 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF -C575 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/UP 0.03fF -C576 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.04fF -C577 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF -C578 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/vco 1.27fF -C579 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/in 0.02fF -C580 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/nor_1/B 0.18fF -C581 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/v 0.05fF -C582 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z2 0.11fF -C583 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z1 0.09fF -C584 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z2 0.19fF -C585 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF -C586 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D div_pd_buffered_0/divider_0/clk 0.26fF -C587 div_pd_buffered_0/tapered_buf_3/a_n10_230# div_pd_buffered_0/tapered_buf_3/a_160_230# 0.09fF -C588 div_pd_buffered_0/tapered_buf_3/a_4670_0# div_pd_buffered_0/tapered_buf_3/a_210_n610# 29.21fF -C589 divider_0/nor_1/B divider_0/and_0/A 0.26fF -C590 ro_complete_0/a0 ro_complete_0/cbank_2/v 0.05fF -C591 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/nor_0/B 0.47fF -C592 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF -C593 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/tspc_r_1/z5 0.03fF -C594 div_pd_buffered_0/pd_0/tspc_r_1/Z2 div_pd_buffered_0/pd_0/R 0.21fF -C595 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/UP 0.03fF -C596 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.02fF -C597 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 0.22fF -C598 cp_buffered_0/tapered_buf_2/a_n10_230# cp_buffered_0/tapered_buf_2/in 0.02fF -C599 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_n10_n140# 0.05fF -C600 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_210_n610# 0.84fF -C601 divider_0/prescaler_0/Out divider_0/nor_1/A 0.15fF -C602 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF -C603 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a4 0.09fF -C604 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a5 0.09fF -C605 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z3 0.16fF -C606 pll_full_1/ro_complete_0/cbank_2/switch_2/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF -C607 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.01fF -C608 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/vco 0.11fF -C609 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_n10_n140# 0.05fF -C610 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_210_n610# 0.84fF -C611 divider_1/prescaler_0/Out divider_1/tspc_0/Z4 0.12fF -C612 divider_0/nor_1/A divider_0/and_0/B 0.08fF -C613 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF -C614 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.35fF -C615 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Q 0.04fF -C616 io_clamp_high[2] io_analog[6] 0.53fF -C617 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF -C618 pll_full_0/divider_0/tspc_1/Z4 pll_full_0/divider_0/tspc_0/Q 0.15fF -C619 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z4 0.12fF -C620 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF -C621 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z3 0.65fF -C622 ro_complete_buffered_0/tapered_buf_0/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/in 0.04fF -C623 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/and_0/B 0.78fF -C624 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.05fF -C625 divider_0/nor_1/B divider_0/tspc_1/Z4 0.21fF -C626 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/divider_0/tspc_2/Z4 0.65fF -C627 divider_1/tspc_0/Q divider_1/tspc_0/Z3 0.05fF -C628 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z3 0.06fF -C629 divider_0/nor_0/B divider_0/and_0/B 0.29fF -C630 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_1650_0# 2.89fF -C631 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_580_0# 0.35fF -C632 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/z5 0.11fF -C633 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/R 0.29fF -C634 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF -C635 ro_complete_buffered_0/tapered_buf_3/a_n10_n140# ro_complete_buffered_0/tapered_buf_3/a_n10_230# 0.01fF -C636 ro_complete_buffered_0/tapered_buf_2/in ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.19fF -C637 ro_complete_0/a4 ro_complete_0/cbank_2/switch_0/vin 0.12fF -C638 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/ref 0.04fF -C639 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF -C640 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/vco 0.11fF -C641 divider_1/nor_1/A divider_1/and_0/B 0.08fF -C642 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/nand_1/z1 0.01fF -C643 divider_1/prescaler_0/tspc_2/Z2 divider_1/clk 0.11fF -C644 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_580_0# 0.35fF -C645 div_pd_buffered_0/tapered_buf_1/a_n10_230# div_pd_buffered_0/tapered_buf_1/a_160_230# 0.09fF -C646 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/tspc_r_0/Qbar 0.01fF -C647 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.29fF -C648 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_1/A 0.04fF -C649 divider_0/mc2 divider_0/and_0/OUT 0.05fF -C650 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF -C651 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.09fF -C652 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_1650_0# 2.89fF -C653 pd_buffered_0/tapered_buf_1/a_580_0# pd_buffered_0/tapered_buf_1/a_1650_0# 1.27fF -C654 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/DOWN 0.02fF -C655 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/R 0.30fF -C656 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Q 0.04fF -C657 divider_0/tspc_0/Z3 divider_0/tspc_0/Z1 0.06fF -C658 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.16fF -C659 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z4 0.15fF -C660 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.05fF -C661 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF -C662 divider_1/nor_1/Z1 divider_1/and_0/B 0.18fF -C663 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_2/in 0.04fF -C664 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/z5 0.20fF -C665 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF -C666 ro_complete_0/a3 ro_complete_0/cbank_2/v 0.05fF -C667 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF -C668 div_pd_buffered_0/tapered_buf_4/a_1650_0# div_pd_buffered_0/tapered_buf_4/a_580_0# 1.27fF -C669 divider_1/tspc_2/Z3 divider_1/tspc_2/Z4 0.65fF -C670 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/divider_0/mc2 0.34fF -C671 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.38fF -C672 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF -C673 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.03fF -C674 divider_0/tspc_0/Q divider_0/tspc_1/a_630_n680# 0.01fF -C675 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z4 0.01fF -C676 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.08fF -C677 pll_full_1/ro_complete_0/a1 pll_full_1/ro_complete_0/cbank_2/v 0.05fF -C678 divider_1/prescaler_0/tspc_0/Z4 divider_1/clk 0.12fF -C679 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF -C680 div_pd_buffered_0/divider_0/tspc_2/Z2 div_pd_buffered_0/divider_0/tspc_2/Z4 0.36fF -C681 divider_0/tspc_1/Q divider_0/tspc_2/Z2 0.14fF -C682 divider_0/tspc_0/Z4 divider_0/tspc_0/Z1 0.00fF -C683 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/D 0.32fF -C684 cp_buffered_0/cp_0/a_1710_0# cp_buffered_0/cp_0/out 0.84fF -C685 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/R 0.33fF -C686 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z3 0.16fF -C687 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C688 div_pd_buffered_0/tapered_buf_3/a_1650_0# div_pd_buffered_0/tapered_buf_3/a_4670_0# 4.78fF -C689 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z2 0.14fF -C690 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z3 0.05fF -C691 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF -C692 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/vco 0.01fF -C693 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.02fF -C694 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_210_n610# 0.22fF -C695 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/tapered_buf_0/in 0.02fF -C696 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/tapered_buf_1/a_160_n140# 0.22fF -C697 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF -C698 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF -C699 divider_0/tspc_0/Z3 divider_0/nor_1/A 0.38fF -C700 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF -C701 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a5 2.39fF -C702 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C703 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.33fF -C704 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.09fF -C705 pd_buffered_0/tapered_buf_0/a_n10_n140# pd_buffered_0/pd_0/UP 0.04fF -C706 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z1 0.00fF -C707 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/B 0.01fF -C708 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF -C709 divider_0/nor_0/B divider_0/Out 0.22fF -C710 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/R 0.03fF -C711 ro_complete_0/a3 ro_complete_0/cbank_1/switch_2/vin 0.09fF -C712 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/R 0.21fF -C713 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.18fF -C714 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF -C715 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF -C716 pll_full_0/divider_0/nor_0/B pll_full_0/div 0.27fF -C717 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/tapered_buf_1/a_4670_0# 29.21fF -C718 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/a0 0.13fF -C719 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_2/Z4 0.02fF -C720 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C721 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/clk 0.45fF -C722 ro_complete_buffered_0/tapered_buf_0/a_160_230# ro_complete_buffered_0/tapered_buf_0/a_n10_230# 0.09fF -C723 ro_complete_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/a_4670_0# 29.21fF -C724 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/nand_0/z1 0.07fF -C725 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C726 divider_0/tspc_0/Z4 divider_0/nor_1/A 0.21fF -C727 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF -C728 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/z5 0.04fF -C729 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF -C730 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/div 0.02fF -C731 divider_1/and_0/OUT divider_1/and_0/B 0.01fF -C732 ro_complete_buffered_0/tapered_buf_3/a_1650_0# ro_complete_buffered_0/tapered_buf_3/a_4670_0# 4.78fF -C733 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF -C734 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Q 0.51fF -C735 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z2 0.01fF -C736 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF -C737 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF -C738 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/DOWN 0.02fF -C739 pd_buffered_0/tapered_buf_2/a_n10_n140# pd_buffered_0/tapered_buf_2/in 0.04fF -C740 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z4 0.12fF -C741 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF -C742 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_160_n140# 0.22fF -C743 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/R 0.51fF -C744 div_pd_buffered_0/tapered_buf_0/a_210_n610# div_pd_buffered_0/tapered_buf_0/a_1650_0# 2.89fF -C745 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_0/Q 0.14fF -C746 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/vco 0.01fF -C747 divider_1/tspc_1/Z2 divider_1/tspc_1/a_630_n680# 0.01fF -C748 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/a_630_n680# 0.19fF -C749 ro_complete_buffered_0/tapered_buf_2/in ro_complete_buffered_0/tapered_buf_2/a_n10_230# 0.02fF -C750 pll_full_1/pd_0/tspc_r_1/z5 pll_full_1/pd_0/tspc_r_0/z5 0.02fF -C751 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF -C752 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C753 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_0/Qbar 0.03fF -C754 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z2 0.20fF -C755 ro_complete_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 2.89fF -C756 div_pd_buffered_0/pd_0/tspc_r_1/Z2 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.14fF -C757 divider_0/tspc_0/Q divider_0/tspc_1/Z2 0.14fF -C758 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/tapered_buf_3/a_160_230# 0.09fF -C759 pd_buffered_0/tapered_buf_3/a_4670_0# pd_buffered_0/tapered_buf_3/a_210_n610# 29.21fF -C760 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/and_0/OUT 0.14fF -C761 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_0/B 0.15fF -C762 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.20fF -C763 pd_buffered_0/pd_0/DOWN pd_buffered_0/tapered_buf_1/a_n10_n140# 0.04fF -C764 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C765 ro_complete_buffered_0/tapered_buf_6/in ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.36fF -C766 pll_full_1/divider_0/and_0/OUT pll_full_1/div 0.01fF -C767 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/divider_0/prescaler_0/nand_1/z1 0.21fF -C768 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/a_160_230# 0.09fF -C769 cp_buffered_0/tapered_buf_1/a_4670_0# cp_buffered_0/tapered_buf_1/a_210_n610# 29.21fF -C770 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z2 1.07fF -C771 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a1 0.14fF -C772 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF -C773 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a3 0.09fF -C774 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C775 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/nor_1/B 1.21fF -C776 io_clamp_low[1] io_analog[5] 0.53fF -C777 div_pd_buffered_0/tapered_buf_2/in div_pd_buffered_0/divider_0/mc2 0.02fF -C778 div_pd_buffered_0/tapered_buf_4/a_210_n610# div_pd_buffered_0/tapered_buf_4/out 26.29fF -C779 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/in 0.02fF -C780 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.06fF -C781 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.09fF -C782 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C783 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF -C784 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF -C785 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF -C786 pd_buffered_0/tapered_buf_1/out pd_buffered_0/tapered_buf_1/a_210_n610# 26.29fF -C787 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.38fF -C788 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.11fF -C789 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/clk 0.12fF -C790 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/vco 1.46fF -C791 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF -C792 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C793 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_4670_0# 29.21fF -C794 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_1650_0# 1.27fF -C795 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF -C796 divider_1/tspc_0/Q divider_1/tspc_1/Z1 0.01fF -C797 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z4 0.00fF -C798 div_pd_buffered_0/tapered_buf_2/a_580_0# div_pd_buffered_0/tapered_buf_2/a_1650_0# 1.27fF -C799 divider_1/prescaler_0/tspc_0/D divider_1/prescaler_0/nand_1/z1 0.21fF -C800 ro_complete_buffered_0/tapered_buf_3/a_160_230# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.02fF -C801 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.22fF -C802 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF -C803 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF -C804 pll_full_1/pd_0/DOWN pll_full_1/cp_0/a_1710_0# 0.04fF -C805 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF -C806 pll_full_0/divider_0/prescaler_0/Out pll_full_0/vco 0.51fF -C807 div_pd_buffered_0/pd_0/tspc_r_0/Z1 div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.71fF -C808 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.20fF -C809 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF -C810 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/pd_0/UP 0.02fF -C811 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_1650_0# 1.27fF -C812 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C813 pll_full_1/pd_0/R pll_full_1/div 0.51fF -C814 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_1/Q 0.21fF -C815 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin ro_complete_buffered_0/tapered_buf_6/in 1.30fF -C816 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_580_0# 0.02fF -C817 pd_buffered_0/tapered_buf_1/a_n10_230# pd_buffered_0/pd_0/DOWN 0.02fF -C818 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/clk 0.45fF -C819 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.36fF -C820 divider_0/nor_1/B divider_0/tspc_2/Z4 0.02fF -C821 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF -C822 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF -C823 div_pd_buffered_0/tapered_buf_2/a_210_n610# div_pd_buffered_0/tapered_buf_2/a_160_n140# 0.22fF -C824 divider_1/mc2 divider_1/and_0/A 0.16fF -C825 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/B 0.08fF -C826 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF -C827 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF -C828 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/vco 0.12fF -C829 div_pd_buffered_0/pd_0/tspc_r_0/Z4 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF -C830 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/DOWN 0.11fF -C831 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z1 0.17fF -C832 div_pd_buffered_0/tapered_buf_4/a_n10_n140# div_pd_buffered_0/pd_0/UP 0.04fF -C833 divider_0/nor_0/Z1 divider_0/nor_1/B 0.18fF -C834 divider_0/tspc_0/Q divider_0/nor_1/B 0.22fF -C835 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/in 0.19fF -C836 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF -C837 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF -C838 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.05fF -C839 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C840 pd_buffered_0/pd_0/tspc_r_1/Z4 pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF -C841 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/z5 0.11fF -C842 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/div 0.12fF -C843 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF -C844 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/tspc_0/D 0.04fF -C845 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF -C846 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.22fF -C847 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF -C848 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z4 0.12fF -C849 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z4 0.36fF -C850 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.31fF -C851 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF -C852 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF -C853 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF -C854 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_1/switch_1/vin 0.09fF -C855 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF -C856 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF -C857 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/nor_1/B 0.03fF -C858 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/a_630_n680# 0.05fF -C859 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.08fF -C860 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.05fF -C861 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF -C862 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C863 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z3 0.65fF -C864 pd_buffered_0/pd_0/and_pd_0/Out1 pd_buffered_0/pd_0/UP 0.33fF -C865 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF -C866 div_pd_buffered_0/tapered_buf_0/a_1650_0# div_pd_buffered_0/tapered_buf_0/a_4670_0# 4.78fF -C867 div_pd_buffered_0/divider_0/and_0/B div_pd_buffered_0/divider_0/and_0/Z1 0.07fF -C868 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF -C869 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C870 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF -C871 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/D 0.05fF -C872 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF -C873 ro_complete_0/a3 ro_complete_0/cbank_2/switch_1/vin 0.13fF -C874 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF -C875 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/z5 0.11fF -C876 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF -C877 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF -C878 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.01fF -C879 divider_1/nor_1/B divider_1/tspc_0/Q 0.22fF -C880 ro_complete_buffered_0/tapered_buf_7/a_n10_n140# ro_complete_buffered_0/tapered_buf_7/in 0.04fF -C881 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.20fF -C882 ro_complete_buffered_0/tapered_buf_0/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/a_n10_230# 0.01fF -C883 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF -C884 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_580_0# 0.84fF -C885 pd_buffered_0/pd_0/tspc_r_0/Z2 pd_buffered_0/pd_0/tspc_r_0/Z4 0.14fF -C886 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF -C887 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.38fF -C888 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.11fF -C889 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/vco 1.46fF -C890 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF -C891 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Z3 0.38fF -C892 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 div_pd_buffered_0/divider_0/clk 0.12fF -C893 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/A 0.01fF -C894 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/tspc_0/Q 0.05fF -C895 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C896 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/D 0.09fF -C897 ro_complete_0/a4 ro_complete_0/cbank_2/v 0.05fF -C898 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF -C899 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF -C900 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF -C901 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/vco 0.01fF -C902 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/R 0.29fF -C903 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/div 0.65fF -C904 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF -C905 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.06fF -C906 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z1 0.08fF -C907 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/v 0.08fF -C908 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.09fF -C909 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C910 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/R 0.01fF -C911 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF -C912 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/tspc_r_1/Qbar 0.21fF -C913 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/vco 0.01fF -C914 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/nor_0/B 0.35fF -C915 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/clk 0.60fF -C916 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF -C917 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF -C918 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/vco 1.36fF -C919 div_pd_buffered_0/tapered_buf_3/out div_pd_buffered_0/tapered_buf_3/a_210_n610# 26.29fF -C920 divider_1/and_0/out1 divider_1/and_0/A 0.01fF -C921 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C922 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/div 0.12fF -C923 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF -C924 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF -C925 div_pd_buffered_0/tapered_buf_0/in div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.04fF -C926 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Z2 0.23fF -C927 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C928 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.16fF -C929 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.06fF -C930 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF -C931 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/div 0.17fF -C932 div_pd_buffered_0/tapered_buf_2/a_n10_230# div_pd_buffered_0/tapered_buf_2/in 0.02fF -C933 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF -C934 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a1 0.14fF -C935 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/ref 0.02fF -C936 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/a_630_n680# 0.35fF -C937 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF -C938 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C939 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF -C940 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF -C941 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z1 0.17fF -C942 div_pd_buffered_0/tapered_buf_3/a_1650_0# div_pd_buffered_0/tapered_buf_3/a_210_n610# 2.89fF -C943 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.21fF -C944 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z4 0.36fF -C945 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Q 0.05fF -C946 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF -C947 divider_1/tspc_0/Q divider_1/tspc_1/Z3 0.45fF -C948 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_160_230# 0.17fF -C949 cp_buffered_0/tapered_buf_0/a_1650_0# cp_buffered_0/tapered_buf_0/a_4670_0# 4.78fF -C950 pll_full_1/cp_0/down pll_full_1/cp_0/upbar 0.02fF -C951 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF -C952 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C953 ro_complete_buffered_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.19fF -C954 ro_complete_0/a5 ro_complete_0/cbank_2/switch_0/vin 0.09fF -C955 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF -C956 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C957 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF -C958 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/vco 1.46fF -C959 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_210_n610# 0.84fF -C960 divider_0/prescaler_0/Out divider_0/tspc_0/Z3 0.45fF -C961 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.17fF -C962 ro_complete_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_5/a_4670_0# 4.78fF -C963 div_pd_buffered_0/tapered_buf_0/a_160_230# div_pd_buffered_0/tapered_buf_0/a_580_0# 0.02fF -C964 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.20fF -C965 pd_buffered_0/tapered_buf_2/a_580_0# pd_buffered_0/tapered_buf_2/a_160_230# 0.02fF -C966 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_210_n610# 0.22fF -C967 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/DOWN 0.21fF -C968 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_1/B 0.06fF -C969 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/nor_1/A 0.21fF -C970 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C971 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.36fF -C972 pd_buffered_0/pd_0/tspc_r_0/Z2 pd_buffered_0/pd_0/R 0.21fF -C973 div_pd_buffered_0/divider_0/tspc_0/Z2 div_pd_buffered_0/divider_0/tspc_0/Z3 0.16fF -C974 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 div_pd_buffered_0/divider_0/clk 0.12fF -C975 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z2 0.01fF -C976 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_4670_0# 4.78fF -C977 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF -C978 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF -C979 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF -C980 div_pd_buffered_0/tapered_buf_2/a_210_n610# div_pd_buffered_0/tapered_buf_2/a_580_0# 0.84fF -C981 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/z5 0.04fF -C982 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C983 ro_complete_0/a1 ro_complete_0/cbank_2/v 0.05fF -C984 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C985 div_pd_buffered_0/tapered_buf_1/a_n10_230# div_pd_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF -C986 div_pd_buffered_0/pd_0/tspc_r_0/z5 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.02fF -C987 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.25fF -C988 divider_0/tspc_0/a_630_n680# divider_0/nor_1/B 0.01fF -C989 divider_0/prescaler_0/Out divider_0/tspc_0/Z4 0.12fF -C990 gnd ro_complete_buffered_0/tapered_buf_1/a_580_0# 5.71fF -C991 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/ro_complete_0/cbank_2/v 0.04fF -C992 pd_buffered_0/tapered_buf_1/a_n10_230# pd_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF -C993 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/and_pd_0/Z1 0.07fF -C994 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_0/Q 0.01fF -C995 divider_1/prescaler_0/Out divider_1/nor_1/A 0.15fF -C996 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/nand_1/z1 0.01fF -C997 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF -C998 pll_full_0/filter_0/a_4216_n5230# pll_full_0/vco 1.58fF -C999 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF -C1000 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C1001 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF -C1002 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/ro_complete_0/a3 26.29fF -C1003 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF -C1004 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/vco 0.11fF -C1005 div_pd_buffered_0/tapered_buf_3/a_160_n140# div_pd_buffered_0/pd_0/DOWN 0.19fF -C1006 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C1007 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/Out 0.05fF -C1008 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.06fF -C1009 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/UP 2.89fF -C1010 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/Z3 0.65fF -C1011 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF -C1012 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/B 0.20fF -C1013 divider_0/tspc_0/Q divider_0/tspc_1/Z4 0.15fF -C1014 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF -C1015 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF -C1016 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C1017 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/a3 0.09fF -C1018 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/nor_1/B 0.38fF -C1019 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z1 0.00fF -C1020 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.12fF -C1021 pll_full_1/ro_complete_0/a2 pll_full_1/vco 0.11fF -C1022 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z1 0.03fF -C1023 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z3 0.05fF -C1024 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF -C1025 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF -C1026 ro_complete_0/a2 ro_complete_0/cbank_1/v 0.05fF -C1027 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/a0 0.13fF -C1028 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF -C1029 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.12fF -C1030 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF -C1031 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/div 0.19fF -C1032 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z4 0.14fF -C1033 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF -C1034 div_pd_buffered_0/tapered_buf_0/a_580_0# div_pd_buffered_0/tapered_buf_0/a_210_n610# 0.84fF -C1035 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_160_n140# 0.17fF -C1036 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/a_630_n680# 0.01fF -C1037 ro_complete_buffered_0/tapered_buf_0/a_160_230# ro_complete_buffered_0/tapered_buf_0/a_580_0# 0.02fF -C1038 ro_complete_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/a_160_n140# 0.22fF -C1039 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/tapered_buf_6/in 1.30fF -C1040 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C1041 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.04fF -C1042 pll_full_1/ro_complete_0/cbank_1/switch_0/vin pll_full_1/vco 1.58fF -C1043 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/UP 0.33fF -C1044 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF -C1045 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF -C1046 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF -C1047 divider_1/nor_0/B divider_1/tspc_2/Z1 0.03fF -C1048 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z3 0.05fF -C1049 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.43fF -C1050 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF -C1051 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/pd_0/UP 0.19fF -C1052 div_pd_buffered_0/tapered_buf_3/a_1650_0# div_pd_buffered_0/tapered_buf_3/a_580_0# 1.27fF -C1053 ro_complete_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.02fF -C1054 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/UP 0.11fF -C1055 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/and_0/B 0.18fF -C1056 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/tspc_2/a_630_n680# 0.04fF -C1057 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/Z2 0.36fF -C1058 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF -C1059 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/nor_0/B 0.06fF -C1060 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF -C1061 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/z5 0.11fF -C1062 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/Z1 0.04fF -C1063 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z2 0.01fF -C1064 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/clk 0.05fF -C1065 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z3 0.65fF -C1066 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/D 0.03fF -C1067 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/R 0.27fF -C1068 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF -C1069 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C1070 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_580_0# 0.35fF -C1071 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF -C1072 div_pd_buffered_0/tapered_buf_1/a_160_230# div_pd_buffered_0/tapered_buf_1/a_160_n140# 0.17fF -C1073 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/and_pd_0/Out1 0.12fF -C1074 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/UP 0.21fF -C1075 divider_0/tspc_0/Z3 divider_0/tspc_0/Z4 0.65fF -C1076 pll_full_1/ro_complete_0/cbank_2/switch_0/vin pll_full_1/ro_complete_0/cbank_2/v 1.45fF -C1077 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.07fF -C1078 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/UP 0.45fF -C1079 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/B 0.18fF -C1080 divider_1/mc2 divider_1/prescaler_0/tspc_2/a_630_n680# 0.33fF -C1081 divider_0/and_0/OUT divider_0/and_0/B 0.01fF -C1082 ro_complete_0/a4 ro_complete_0/cbank_2/switch_1/vin 0.09fF -C1083 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF -C1084 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/D 0.03fF -C1085 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/R 0.01fF -C1086 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF -C1087 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF -C1088 io_clamp_high[0] io_analog[4] 0.53fF -C1089 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF -C1090 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.02fF -C1091 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 0.22fF -C1092 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.14fF -C1093 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C1094 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Z2 0.21fF -C1095 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF -C1096 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C1097 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z2 0.25fF -C1098 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.03fF -C1099 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z2 0.36fF -C1100 div_pd_buffered_0/tapered_buf_1/a_4670_0# div_pd_buffered_0/tapered_buf_1/a_1650_0# 4.78fF -C1101 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/nor_0/B 0.00fF -C1102 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_0/Q 0.14fF -C1103 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.05fF -C1104 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/clk 0.01fF -C1105 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z2 0.16fF -C1106 pll_full_1/div pll_full_1/vco 2.26fF -C1107 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF -C1108 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_210_n610# 0.84fF -C1109 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF -C1110 divider_1/tspc_0/Q divider_1/nor_1/A 0.55fF -C1111 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF -C1112 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF -C1113 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C1114 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF -C1115 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_n10_n140# 0.05fF -C1116 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 0.84fF -C1117 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/in 0.19fF -C1118 pd_buffered_0/tapered_buf_2/a_1650_0# pd_buffered_0/tapered_buf_2/a_210_n610# 2.89fF -C1119 ro_complete_buffered_0/tapered_buf_5/a_210_n610# ro_complete_buffered_0/ro_complete_0/a0 26.29fF -C1120 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z3 0.06fF -C1121 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/D 0.11fF -C1122 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C1123 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/tapered_buf_6/in 1.30fF -C1124 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/a_160_n140# 0.05fF -C1125 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z3 0.65fF -C1126 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Q 0.55fF -C1127 pll_full_1/ro_complete_0/cbank_1/switch_5/vin pll_full_1/vco 1.46fF -C1128 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z4 0.20fF -C1129 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_1/B 0.18fF -C1130 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z4 0.12fF -C1131 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF -C1132 divider_1/tspc_1/Z1 divider_1/tspc_1/Z2 1.07fF -C1133 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF -C1134 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/UP 0.11fF -C1135 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_0/Q 0.14fF -C1136 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/vco 0.01fF -C1137 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/and_pd_0/Out1 0.05fF -C1138 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/tspc_r_1/Qbar 0.01fF -C1139 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/R 0.27fF -C1140 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_580_0# 0.35fF -C1141 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z1 0.08fF -C1142 gnd ro_complete_buffered_0/tapered_buf_1/a_1650_0# 20.70fF -C1143 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/in 0.02fF -C1144 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/nor_1/B 1.21fF -C1145 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C1146 pd_buffered_0/tapered_buf_0/a_n10_230# pd_buffered_0/tapered_buf_0/a_160_230# 0.09fF -C1147 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/and_pd_0/Out1 0.33fF -C1148 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z1 0.01fF -C1149 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/Q 0.22fF -C1150 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_1/z1 0.21fF -C1151 filter_0/v filter_0/a_4216_n5230# 0.91fF -C1152 ro_complete_0/a4 ro_complete_0/cbank_1/switch_1/vin 0.09fF -C1153 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF -C1154 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z1 0.17fF -C1155 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.04fF -C1156 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.17fF -C1157 pll_full_0/divider_0/and_0/OUT pll_full_0/div 0.01fF -C1158 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF -C1159 divider_0/mc2 divider_0/nor_1/B 0.06fF -C1160 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF -C1161 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_0/a_210_n610# 26.29fF -C1162 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF -C1163 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.16fF -C1164 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/and_0/A 0.80fF -C1165 pll_full_1/ro_complete_0/cbank_2/switch_5/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF -C1166 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF -C1167 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/tapered_buf_0/a_580_0# 0.35fF -C1168 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z3 0.38fF -C1169 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z4 0.12fF -C1170 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z2 1.07fF -C1171 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Qbar1 0.38fF -C1172 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF -C1173 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF -C1174 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C1175 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF -C1176 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z1 0.09fF -C1177 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.78fF -C1178 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/vco 1.46fF -C1179 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z2 0.19fF -C1180 divider_1/tspc_1/Q divider_1/tspc_2/Z1 0.01fF -C1181 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF -C1182 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF -C1183 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF -C1184 ro_complete_buffered_0/tapered_buf_0/in ro_complete_buffered_0/tapered_buf_0/a_160_n140# 0.19fF -C1185 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF -C1186 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Z4 0.12fF -C1187 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z2 0.01fF -C1188 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/and_0/B 0.08fF -C1189 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/nor_0/B 0.22fF -C1190 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.19fF -C1191 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/clk 0.01fF -C1192 divider_0/tspc_1/a_630_n680# divider_0/nor_0/B 0.00fF -C1193 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF -C1194 cp_buffered_0/cp_0/down cp_buffered_0/cp_0/a_1710_0# 0.32fF -C1195 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/Z1 0.36fF -C1196 divider_1/prescaler_0/m1_2700_2190# divider_1/nor_1/A 0.01fF -C1197 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_0/Z2 0.14fF -C1198 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C1199 ro_complete_0/a5 ro_complete_0/cbank_2/v 0.08fF -C1200 ro_complete_0/a0 ro_complete_0/cbank_1/switch_5/vin 0.09fF -C1201 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/R 0.21fF -C1202 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/ref 0.12fF -C1203 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF -C1204 divider_1/nor_0/B divider_1/tspc_2/Z3 0.38fF -C1205 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z4 0.12fF -C1206 divider_1/tspc_2/Z1 divider_1/tspc_2/Z2 1.07fF -C1207 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/OUT 0.05fF -C1208 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/nor_0/B 0.42fF -C1209 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.03fF -C1210 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# 0.05fF -C1211 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/nor_1/A 0.35fF -C1212 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF -C1213 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF -C1214 divider_1/nor_1/B divider_1/tspc_1/Z2 0.30fF -C1215 ro_complete_buffered_0/tapered_buf_1/a_210_n610# gnd 212.43fF -C1216 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.12fF -C1217 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/cp_0/down 26.29fF -C1218 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/tspc_r_1/z5 0.03fF -C1219 pd_buffered_0/pd_0/tspc_r_1/Z2 pd_buffered_0/pd_0/R 0.21fF -C1220 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/UP 0.03fF -C1221 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z2 0.40fF -C1222 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D div_pd_buffered_0/divider_0/clk 0.29fF -C1223 divider_1/tspc_0/Z1 divider_1/tspc_0/Z2 1.07fF -C1224 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C1225 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/nand_0/z1 0.01fF -C1226 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/vco 0.11fF -C1227 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_0/a_630_n680# 0.04fF -C1228 divider_1/tspc_1/Z1 divider_1/tspc_1/Z4 0.00fF -C1229 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z2 0.01fF -C1230 ro_complete_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_2/a_4670_0# 4.78fF -C1231 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF -C1232 pll_full_1/cp_0/down pll_full_1/cp_0/a_1710_0# 0.32fF -C1233 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF -C1234 div_pd_buffered_0/tapered_buf_3/a_n10_n140# div_pd_buffered_0/pd_0/DOWN 0.04fF -C1235 divider_1/and_0/out1 divider_1/and_0/Z1 0.36fF -C1236 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/divider_0/mc2 26.29fF -C1237 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C1238 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/div 0.02fF -C1239 pd_buffered_0/tapered_buf_3/a_n10_n140# pd_buffered_0/tapered_buf_3/in 0.04fF -C1240 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Q 0.04fF -C1241 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.06fF -C1242 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF -C1243 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.38fF -C1244 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/clk 0.11fF -C1245 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.11fF -C1246 pd_buffered_0/tapered_buf_0/a_160_230# pd_buffered_0/tapered_buf_0/a_580_0# 0.02fF -C1247 pd_buffered_0/tapered_buf_0/a_210_n610# pd_buffered_0/tapered_buf_0/a_160_n140# 0.22fF -C1248 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/a_630_n680# 0.19fF -C1249 divider_0/nor_1/B divider_0/tspc_1/Z1 0.03fF -C1250 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z3 0.05fF -C1251 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/m1_2700_2190# 0.08fF -C1252 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/div 0.03fF -C1253 pll_full_1/divider_0/and_0/OUT pll_full_1/vco 0.06fF -C1254 cp_buffered_0/tapered_buf_1/a_n10_n140# cp_buffered_0/tapered_buf_1/in 0.04fF -C1255 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF -C1256 div_pd_buffered_0/tapered_buf_2/in div_pd_buffered_0/tapered_buf_2/a_160_n140# 0.19fF -C1257 divider_1/and_0/OUT divider_1/prescaler_0/nand_0/z1 0.01fF -C1258 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/nor_1/B 0.03fF -C1259 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/a_630_n680# 0.05fF -C1260 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF -C1261 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF -C1262 ro_complete_buffered_0/tapered_buf_4/a_n10_n140# ro_complete_buffered_0/tapered_buf_4/in 0.04fF -C1263 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/in 0.19fF -C1264 ro_complete_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 2.89fF -C1265 ro_complete_buffered_0/tapered_buf_4/a_210_n610# ro_complete_buffered_0/ro_complete_0/a1 26.29fF -C1266 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.18fF -C1267 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF -C1268 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/switch_5/vin 0.20fF -C1269 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/tspc_r_0/Qbar 0.01fF -C1270 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/nor_0/B 0.47fF -C1271 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Z3 0.05fF -C1272 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF -C1273 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/Out 0.21fF -C1274 divider_1/nor_1/B divider_1/and_0/A 0.26fF -C1275 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF -C1276 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/tapered_buf_6/in 0.05fF -C1277 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF -C1278 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/vco 0.64fF -C1279 div_pd_buffered_0/tapered_buf_2/a_n10_230# div_pd_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF -C1280 divider_0/tspc_1/Z2 divider_0/nor_1/A 0.15fF -C1281 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF -C1282 divider_0/and_0/out1 divider_0/and_0/A 0.01fF -C1283 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF -C1284 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_580_0# 0.84fF -C1285 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/a_160_230# 0.09fF -C1286 cp_buffered_0/tapered_buf_0/a_4670_0# cp_buffered_0/tapered_buf_0/a_210_n610# 29.21fF -C1287 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF -C1288 divider_1/and_0/OUT divider_1/clk 0.04fF -C1289 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF -C1290 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF -C1291 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF -C1292 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/vco 1.46fF -C1293 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.09fF -C1294 ro_complete_buffered_0/tapered_buf_5/a_4670_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 29.21fF -C1295 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF -C1296 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Q 0.05fF -C1297 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_580_0# 0.35fF -C1298 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF -C1299 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.19fF -C1300 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF -C1301 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.38fF -C1302 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/out1 0.31fF -C1303 div_pd_buffered_0/divider_0/tspc_1/Z4 div_pd_buffered_0/divider_0/tspc_0/Q 0.15fF -C1304 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin ro_complete_buffered_0/tapered_buf_6/in 1.43fF -C1305 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.15fF -C1306 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/and_0/A 0.01fF -C1307 divider_0/nor_1/A divider_0/prescaler_0/tspc_1/Q 0.03fF -C1308 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.01fF -C1309 divider_1/tspc_1/Z2 divider_1/tspc_1/Z3 0.16fF -C1310 divider_1/prescaler_0/m1_2700_2190# divider_1/and_0/OUT 0.14fF -C1311 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z2 0.25fF -C1312 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF -C1313 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF -C1314 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF -C1315 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z1 0.09fF -C1316 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.09fF -C1317 div_pd_buffered_0/tapered_buf_4/a_4670_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 29.21fF -C1318 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF -C1319 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/vco 0.01fF -C1320 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_1650_0# 1.27fF -C1321 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar1 0.01fF -C1322 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/R 0.36fF -C1323 div_pd_buffered_0/pd_0/tspc_r_1/Z1 div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.71fF -C1324 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.20fF -C1325 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF -C1326 divider_1/nor_1/B divider_1/tspc_1/Z4 0.21fF -C1327 divider_0/mc2 divider_0/and_0/A 0.16fF -C1328 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z3 0.11fF -C1329 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.05fF -C1330 gnd ro_complete_buffered_0/tapered_buf_1/a_4670_0# 82.48fF -C1331 cp_buffered_0/tapered_buf_2/a_4670_0# cp_buffered_0/tapered_buf_2/a_210_n610# 29.21fF -C1332 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/Z4 0.36fF -C1333 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/nor_1/B 0.35fF -C1334 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/Q 0.05fF -C1335 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Z2 0.01fF -C1336 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/and_0/B 0.78fF -C1337 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z4 0.21fF -C1338 pd_buffered_0/tapered_buf_0/a_n10_230# pd_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF -C1339 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/and_0/B 0.29fF -C1340 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF -C1341 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z3 0.45fF -C1342 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Q 0.04fF -C1343 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/A 0.26fF -C1344 filter_0/v filter_0/a_4216_n2998# 0.36fF -C1345 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C1346 divider_0/nor_1/A divider_0/tspc_0/Z2 0.23fF -C1347 divider_1/nor_1/A divider_1/prescaler_0/tspc_1/Q 0.03fF -C1348 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/D 0.15fF -C1349 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF -C1350 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C1351 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z2 0.25fF -C1352 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF -C1353 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_n10_n140# 0.05fF -C1354 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 0.84fF -C1355 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/tspc_r_1/Z1 0.71fF -C1356 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_4/vin 0.20fF -C1357 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF -C1358 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C1359 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_1/Z4 0.02fF -C1360 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.36fF -C1361 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/DOWN 0.11fF -C1362 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.05fF -C1363 cp_buffered_0/tapered_buf_2/a_160_n140# cp_buffered_0/tapered_buf_2/a_580_0# 0.35fF -C1364 pd_buffered_0/tapered_buf_0/a_580_0# pd_buffered_0/tapered_buf_0/a_1650_0# 1.27fF -C1365 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/div 0.19fF -C1366 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Q 0.04fF -C1367 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF -C1368 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF -C1369 divider_0/nor_1/B divider_0/nor_1/A 1.21fF -C1370 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z3 0.16fF -C1371 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z4 0.22fF -C1372 divider_1/tspc_1/Q divider_1/tspc_2/Z3 0.45fF -C1373 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_1650_0# 2.89fF -C1374 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF -C1375 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Q 0.05fF -C1376 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z1 0.09fF -C1377 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.19fF -C1378 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z3 0.65fF -C1379 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.12fF -C1380 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF -C1381 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C1382 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_1/Z4 0.21fF -C1383 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF -C1384 pll_full_1/ro_complete_0/a0 pll_full_1/vco 0.11fF -C1385 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z2 0.14fF -C1386 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.32fF -C1387 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF -C1388 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/a_1710_0# 0.83fF -C1389 divider_0/nor_1/B divider_0/nor_0/B 0.47fF -C1390 pll_full_1/divider_0/and_0/A pll_full_1/divider_0/and_0/B 0.18fF -C1391 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF -C1392 divider_1/mc2 divider_1/and_0/out1 0.06fF -C1393 divider_1/tspc_0/Z2 divider_1/tspc_0/Z3 0.16fF -C1394 divider_1/prescaler_0/tspc_1/Z2 divider_1/and_0/OUT 0.06fF -C1395 div_pd_buffered_0/tapered_buf_3/a_160_n140# div_pd_buffered_0/tapered_buf_3/a_160_230# 0.17fF -C1396 divider_1/tspc_2/Z2 divider_1/tspc_2/Z3 0.16fF -C1397 divider_1/nor_0/B divider_1/tspc_2/Z4 0.22fF -C1398 ro_complete_0/a0 ro_complete_0/cbank_1/v 0.05fF -C1399 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/R 0.03fF -C1400 divider_0/tspc_0/Q divider_0/tspc_0/a_630_n680# 0.04fF -C1401 cp_buffered_0/tapered_buf_2/a_n10_230# cp_buffered_0/tapered_buf_2/a_160_230# 0.09fF -C1402 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z2 0.36fF -C1403 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/nor_1/B 0.38fF -C1404 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C1405 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF -C1406 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF -C1407 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z2 0.01fF -C1408 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin ro_complete_buffered_0/tapered_buf_6/in 1.30fF -C1409 pd_buffered_0/tapered_buf_1/a_580_0# pd_buffered_0/tapered_buf_1/a_160_n140# 0.35fF -C1410 pd_buffered_0/pd_0/tspc_r_1/Z2 pd_buffered_0/pd_0/tspc_r_1/Z4 0.14fF -C1411 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/divider_0/prescaler_0/nand_0/z1 0.24fF -C1412 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z3 0.06fF -C1413 cp_buffered_0/cp_0/down cp_buffered_0/cp_0/out 0.79fF -C1414 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z3 0.11fF -C1415 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF -C1416 divider_1/tspc_1/Z3 divider_1/tspc_1/Z4 0.65fF -C1417 divider_1/and_0/A divider_1/and_0/B 0.18fF -C1418 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.45fF -C1419 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_0/Q 0.01fF -C1420 div_pd_buffered_0/pd_0/tspc_r_0/z5 div_pd_buffered_0/pd_0/UP 0.03fF -C1421 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF -C1422 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a3 3.17fF -C1423 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF -C1424 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.13fF -C1425 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF -C1426 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Q 0.51fF -C1427 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF -C1428 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF -C1429 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.04fF -C1430 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/clk 0.51fF -C1431 divider_0/nor_1/B divider_0/tspc_1/Z3 0.38fF -C1432 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/a_630_n680# 0.12fF -C1433 pd_buffered_0/tapered_buf_0/a_n10_230# pd_buffered_0/pd_0/UP 0.02fF -C1434 pd_buffered_0/tapered_buf_0/a_210_n610# pd_buffered_0/tapered_buf_0/a_1650_0# 2.89fF -C1435 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/vco 0.26fF -C1436 cp_buffered_0/tapered_buf_1/a_210_n610# cp_buffered_0/cp_0/out 26.29fF -C1437 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Qbar1 0.38fF -C1438 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C1439 divider_0/nor_0/B divider_0/tspc_2/Z1 0.03fF -C1440 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF -C1441 ro_complete_0/a2 ro_complete_0/cbank_2/switch_2/vin 0.14fF -C1442 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF -C1443 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/nor_1/B 0.38fF -C1444 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z1 0.00fF -C1445 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF -C1446 pll_full_0/ro_complete_0/a2 pll_full_0/vco 0.11fF -C1447 divider_1/prescaler_0/tspc_2/D divider_1/prescaler_0/nand_0/z1 0.24fF -C1448 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/clk 0.01fF -C1449 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF -C1450 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z1 0.03fF -C1451 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF -C1452 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/a_n10_n140# 0.05fF -C1453 div_pd_buffered_0/pd_0/and_pd_0/Z1 div_pd_buffered_0/pd_0/UP 0.06fF -C1454 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.09fF -C1455 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C1456 cp_buffered_0/tapered_buf_2/a_4670_0# cp_buffered_0/tapered_buf_2/a_1650_0# 4.78fF -C1457 pd_buffered_0/pd_0/tspc_r_0/Z1 pd_buffered_0/pd_0/tspc_r_0/Z2 0.71fF -C1458 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z4 0.20fF -C1459 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF -C1460 divider_0/prescaler_0/Out divider_0/clk 0.51fF -C1461 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF -C1462 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z3 0.45fF -C1463 pll_full_1/ro_complete_0/a3 pll_full_1/vco 0.11fF -C1464 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_2/Z2 0.20fF -C1465 divider_0/prescaler_0/m1_2700_2190# divider_0/nor_1/A 0.01fF -C1466 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF -C1467 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF -C1468 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF -C1469 div_pd_buffered_0/tapered_buf_2/a_n10_n140# div_pd_buffered_0/tapered_buf_2/in 0.04fF -C1470 divider_1/prescaler_0/Out divider_1/clk 0.51fF -C1471 ro_complete_0/a3 ro_complete_0/cbank_1/v 0.05fF -C1472 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF -C1473 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/vco 1.58fF -C1474 divider_1/prescaler_0/tspc_2/D divider_1/clk 0.26fF -C1475 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/a_n10_n140# 0.01fF -C1476 pd_buffered_0/tapered_buf_2/a_n10_230# pd_buffered_0/tapered_buf_2/in 0.02fF -C1477 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/tapered_buf_1/a_580_0# 0.84fF -C1478 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/in 0.02fF -C1479 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.11fF -C1480 pd_buffered_0/pd_0/tspc_r_0/Z4 pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF -C1481 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/DOWN 0.11fF -C1482 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z1 0.17fF -C1483 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.08fF -C1484 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF -C1485 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.05fF -C1486 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF -C1487 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z4 0.02fF -C1488 divider_1/prescaler_0/Out divider_1/prescaler_0/m1_2700_2190# 0.11fF -C1489 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/clk 0.14fF -C1490 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/D 0.03fF -C1491 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF -C1492 divider_1/tspc_1/Z2 divider_1/nor_1/A 0.15fF -C1493 divider_1/tspc_0/Z2 divider_1/tspc_0/Z4 0.36fF -C1494 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_2/D 0.16fF -C1495 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z3 0.65fF -C1496 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF -C1497 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/tapered_buf_4/a_n10_n140# 0.01fF -C1498 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF -C1499 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.20fF -C1500 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.17fF -C1501 ro_complete_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_6/a_4670_0# 4.78fF -C1502 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_1/switch_3/vin 0.09fF -C1503 cp_buffered_0/tapered_buf_2/a_n10_230# cp_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF -C1504 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_160_230# 0.02fF -C1505 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_210_n610# 0.22fF -C1506 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF -C1507 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.03fF -C1508 gnd ro_complete_buffered_0/ro_complete_0/a4 87.74fF -C1509 ro_complete_buffered_0/tapered_buf_1/a_580_0# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 1.27fF -C1510 ro_complete_buffered_0/tapered_buf_1/in ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.19fF -C1511 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C1512 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z3 0.06fF -C1513 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z2 0.11fF -C1514 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C1515 divider_0/nor_1/Z1 divider_0/and_0/B 0.18fF -C1516 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C1517 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z4 0.15fF -C1518 divider_0/nor_1/A divider_0/and_0/A 0.01fF -C1519 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_160_230# 0.02fF -C1520 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_210_n610# 0.22fF -C1521 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_1/Qbar 0.21fF -C1522 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.45fF -C1523 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/D 0.05fF -C1524 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF -C1525 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.09fF -C1526 ro_complete_buffered_0/tapered_buf_4/a_4670_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 29.21fF -C1527 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF -C1528 io_clamp_low[2] io_analog[6] 0.53fF -C1529 div_pd_buffered_0/pd_0/and_pd_0/Out1 div_pd_buffered_0/pd_0/and_pd_0/Z1 0.18fF -C1530 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.20fF -C1531 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.09fF -C1532 divider_1/nor_1/B divider_1/tspc_2/Z4 0.02fF -C1533 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/a_630_n680# 0.12fF -C1534 pd_buffered_0/tapered_buf_0/a_1650_0# pd_buffered_0/tapered_buf_0/a_4670_0# 4.78fF -C1535 div_pd_buffered_0/tapered_buf_3/a_n10_230# div_pd_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF -C1536 divider_0/nor_1/B divider_0/tspc_1/Q 0.51fF -C1537 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF -C1538 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF -C1539 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z4 0.36fF -C1540 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/div 0.05fF -C1541 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 4.58fF -C1542 pll_full_0/pd_0/R pll_full_0/div 0.51fF -C1543 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z4 0.20fF -C1544 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF -C1545 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C1546 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.05fF -C1547 pll_full_1/pd_0/DOWN pll_full_1/pd_0/UP 4.58fF -C1548 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF -C1549 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z2 0.36fF -C1550 divider_1/tspc_1/Q divider_1/tspc_2/Z4 0.15fF -C1551 divider_1/nor_1/A divider_1/and_0/A 0.01fF -C1552 pll_full_1/filter_0/a_4216_n5230# pll_full_1/vco 1.58fF -C1553 pll_full_0/div pll_full_0/vco 2.26fF -C1554 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_580_0# 0.35fF -C1555 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF -C1556 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF -C1557 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF -C1558 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.09fF -C1559 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/R 0.29fF -C1560 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/and_0/B 0.31fF -C1561 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.22fF -C1562 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.04fF -C1563 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.06fF -C1564 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z2 0.19fF -C1565 divider_0/nor_1/A divider_0/tspc_1/Z4 0.02fF -C1566 divider_0/nor_1/B divider_0/tspc_2/Z2 0.20fF -C1567 divider_1/nor_1/Z1 divider_1/and_0/A 0.80fF -C1568 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.35fF -C1569 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/tspc_r_0/Qbar 0.01fF -C1570 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Q 0.55fF -C1571 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/vco 1.46fF -C1572 divider_1/tspc_2/Z2 divider_1/tspc_2/Z4 0.36fF -C1573 divider_1/tspc_2/Z3 divider_1/Out 0.05fF -C1574 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.12fF -C1575 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.84fF -C1576 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF -C1577 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/nor_1/B 0.01fF -C1578 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.91fF -C1579 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF -C1580 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF -C1581 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z4 0.00fF -C1582 divider_1/tspc_0/Z1 divider_1/tspc_0/Z3 0.06fF -C1583 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF -C1584 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z3 0.05fF -C1585 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.04fF -C1586 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_2/Z4 0.02fF -C1587 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF -C1588 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/vco 0.45fF -C1589 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/out 0.61fF -C1590 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z4 0.28fF -C1591 divider_0/tspc_1/Q divider_0/tspc_2/Z1 0.01fF -C1592 divider_1/nor_1/A divider_1/tspc_1/Z4 0.02fF -C1593 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z3 0.06fF -C1594 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF -C1595 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_580_0# 0.35fF -C1596 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z1 0.01fF -C1597 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/Q 0.22fF -C1598 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/R 0.30fF -C1599 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.17fF -C1600 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_4/vin 0.20fF -C1601 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Q 0.91fF -C1602 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C1603 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF -C1604 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/clk 0.04fF -C1605 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF -C1606 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF -C1607 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.03fF -C1608 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF -C1609 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z4 0.01fF -C1610 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Q 0.91fF -C1611 divider_0/nor_0/B divider_0/tspc_2/Z3 0.38fF -C1612 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF -C1613 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF -C1614 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/DOWN 0.07fF -C1615 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_580_0# 0.35fF -C1616 divider_1/tspc_1/a_630_n680# divider_1/nor_0/B 0.00fF -C1617 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/Q 0.04fF -C1618 divider_1/prescaler_0/tspc_1/Z3 divider_1/clk 0.45fF -C1619 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF -C1620 pll_full_1/pd_0/DOWN pll_full_1/ref 1.48fF -C1621 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF -C1622 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/A 0.80fF -C1623 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C1624 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF -C1625 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z3 0.38fF -C1626 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF -C1627 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF -C1628 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/in 0.02fF -C1629 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF -C1630 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF -C1631 divider_0/prescaler_0/Out divider_0/tspc_0/Z2 0.11fF -C1632 ro_complete_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/a_1650_0# 2.89fF -C1633 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.09fF -C1634 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/tspc_r_0/z5 0.20fF -C1635 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/clk 0.11fF -C1636 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Q 0.15fF -C1637 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/clk 0.01fF -C1638 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF -C1639 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Q 0.20fF -C1640 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF -C1641 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF -C1642 div_pd_buffered_0/tapered_buf_2/a_n10_n140# div_pd_buffered_0/tapered_buf_2/a_160_n140# 0.05fF -C1643 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z3 0.33fF -C1644 divider_1/mc2 divider_1/nor_0/B 0.15fF -C1645 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF -C1646 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF -C1647 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF -C1648 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF -C1649 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF -C1650 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF -C1651 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF -C1652 div_pd_buffered_0/pd_0/tspc_r_0/Z4 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF -C1653 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C1654 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/m1_2700_2190# 0.19fF -C1655 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/tapered_buf_6/in 0.05fF -C1656 pd_buffered_0/tapered_buf_1/a_160_230# pd_buffered_0/tapered_buf_1/a_160_n140# 0.17fF -C1657 pd_buffered_0/pd_0/tspc_r_0/z5 pd_buffered_0/pd_0/tspc_r_1/z5 0.02fF -C1658 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z2 0.25fF -C1659 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_0/Q 0.01fF -C1660 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.11fF -C1661 div_pd_buffered_0/tapered_buf_2/a_n10_230# div_pd_buffered_0/tapered_buf_2/a_160_230# 0.09fF -C1662 divider_0/nor_1/B divider_0/and_0/B 0.31fF -C1663 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF -C1664 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_2/a_n10_230# 0.01fF -C1665 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/nand_0/z1 0.07fF -C1666 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF -C1667 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF -C1668 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/vco 0.11fF -C1669 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_n10_n140# 0.05fF -C1670 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 0.84fF -C1671 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a4 0.12fF -C1672 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_3/vin 0.09fF -C1673 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/UP 0.11fF -C1674 divider_0/tspc_0/Q divider_0/tspc_1/Z1 0.01fF -C1675 gnd ro_complete_buffered_0/tapered_buf_1/a_160_n140# 1.34fF -C1676 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/in 0.19fF -C1677 pd_buffered_0/tapered_buf_3/a_1650_0# pd_buffered_0/tapered_buf_3/a_210_n610# 2.89fF -C1678 divider_1/tspc_0/Z1 divider_1/tspc_0/Z4 0.00fF -C1679 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.45fF -C1680 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/UP 1.06fF -C1681 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/vco 0.45fF -C1682 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/in 0.19fF -C1683 cp_buffered_0/tapered_buf_1/a_1650_0# cp_buffered_0/tapered_buf_1/a_210_n610# 2.89fF -C1684 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C1685 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF -C1686 divider_0/and_0/OUT divider_0/clk 0.04fF -C1687 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF -C1688 divider_1/prescaler_0/tspc_2/Z4 divider_1/prescaler_0/tspc_2/D 0.11fF -C1689 divider_1/prescaler_0/m1_2700_2190# divider_1/clk 0.01fF -C1690 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/Z2 0.14fF -C1691 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/a_n10_n140# 0.01fF -C1692 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/div 0.03fF -C1693 pll_full_0/divider_0/and_0/OUT pll_full_0/vco 0.06fF -C1694 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF -C1695 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_580_0# 0.35fF -C1696 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 1.07fF -C1697 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C1698 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.12fF -C1699 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF -C1700 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C1701 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.12fF -C1702 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.65fF -C1703 pll_full_1/ro_complete_0/a4 pll_full_1/vco 0.01fF -C1704 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C1705 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF -C1706 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF -C1707 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF -C1708 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z3 0.16fF -C1709 ro_complete_buffered_0/tapered_buf_3/a_160_230# ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.17fF -C1710 ro_complete_buffered_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_3/a_n10_230# 0.02fF -C1711 ro_complete_0/a4 ro_complete_0/cbank_1/v 0.05fF -C1712 divider_1/prescaler_0/tspc_2/Z3 divider_1/clk 0.45fF -C1713 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/vco 0.64fF -C1714 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.02fF -C1715 pd_buffered_0/tapered_buf_2/a_580_0# pd_buffered_0/tapered_buf_2/a_1650_0# 1.27fF -C1716 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/a_160_230# 0.09fF -C1717 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/nor_1/A 0.15fF -C1718 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/a0 0.09fF -C1719 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF -C1720 divider_0/tspc_0/Z3 divider_0/tspc_0/Z2 0.16fF -C1721 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.14fF -C1722 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/tapered_buf_6/in 0.05fF -C1723 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.00fF -C1724 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF -C1725 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.01fF -C1726 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/clk 0.11fF -C1727 pll_full_1/divider_0/and_0/B pll_full_1/divider_0/and_0/Z1 0.07fF -C1728 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_1/z5 0.03fF -C1729 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_0/z5 0.04fF -C1730 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF -C1731 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C1732 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/div 0.17fF -C1733 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Z4 0.65fF -C1734 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF -C1735 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/A 0.01fF -C1736 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/UP 0.03fF -C1737 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/DOWN 0.03fF -C1738 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF -C1739 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.09fF -C1740 divider_1/nor_1/B divider_1/tspc_1/a_630_n680# 0.35fF -C1741 divider_0/prescaler_0/Out divider_0/prescaler_0/m1_2700_2190# 0.11fF -C1742 ro_complete_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.17fF -C1743 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 2.89fF -C1744 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z3 0.05fF -C1745 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z4 0.12fF -C1746 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/and_pd_0/Out1 0.12fF -C1747 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/UP 0.21fF -C1748 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z3 0.06fF -C1749 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 pll_full_1/vco 0.12fF -C1750 div_pd_buffered_0/divider_0/tspc_2/Z3 div_pd_buffered_0/divider_0/tspc_2/Z4 0.65fF -C1751 divider_0/tspc_1/Q divider_0/tspc_2/Z3 0.45fF -C1752 divider_0/tspc_0/Z4 divider_0/tspc_0/Z2 0.36fF -C1753 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/div 0.65fF -C1754 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.17fF -C1755 ro_complete_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_2/a_580_0# 1.27fF -C1756 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/UP 0.06fF -C1757 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z4 0.21fF -C1758 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Q 0.04fF -C1759 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z4 0.00fF -C1760 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Q 0.21fF -C1761 divider_1/prescaler_0/tspc_1/Z2 divider_1/clk 0.11fF -C1762 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_1650_0# 1.27fF -C1763 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_n10_n140# 0.05fF -C1764 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 0.84fF -C1765 divider_1/and_0/B divider_1/and_0/Z1 0.07fF -C1766 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z3 0.45fF -C1767 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Q 0.04fF -C1768 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/A 0.26fF -C1769 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF -C1770 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF -C1771 divider_1/nor_1/B divider_1/mc2 0.06fF -C1772 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a3 0.13fF -C1773 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/in 0.04fF -C1774 pd_buffered_0/tapered_buf_3/a_210_n610# pd_buffered_0/pd_0/REF 26.29fF -C1775 pd_buffered_0/tapered_buf_2/a_210_n610# pd_buffered_0/pd_0/DIV 26.29fF -C1776 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C1777 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF -C1778 divider_0/tspc_0/Q divider_0/nor_1/A 0.55fF -C1779 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF -C1780 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF -C1781 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a1 3.18fF -C1782 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/a_630_n680# 0.01fF -C1783 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 1.07fF -C1784 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.05fF -C1785 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Q 0.04fF -C1786 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z2 0.36fF -C1787 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C1788 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/nor_0/B 0.35fF -C1789 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/vco 0.60fF -C1790 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF -C1791 divider_0/nor_0/B divider_0/tspc_2/Z4 0.22fF -C1792 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF -C1793 ro_complete_0/a5 ro_complete_0/cbank_1/switch_0/vin 0.09fF -C1794 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF -C1795 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z4 0.02fF -C1796 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF -C1797 divider_1/prescaler_0/tspc_1/Z4 divider_1/clk 0.12fF -C1798 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF -C1799 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/Out 0.05fF -C1800 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF -C1801 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z4 0.22fF -C1802 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF -C1803 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF -C1804 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/DIV 0.51fF -C1805 pd_buffered_0/tapered_buf_1/a_160_230# pd_buffered_0/tapered_buf_1/a_580_0# 0.02fF -C1806 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z2 1.07fF -C1807 pll_full_1/ro_complete_0/a1 pll_full_1/vco 0.11fF -C1808 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Q 0.04fF -C1809 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z4 0.08fF -C1810 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/D 0.03fF -C1811 divider_0/and_0/A divider_0/and_0/B 0.18fF -C1812 cp_buffered_0/tapered_buf_0/a_n10_n140# cp_buffered_0/tapered_buf_0/in 0.04fF -C1813 pll_full_0/pd_0/tspc_r_1/z5 pll_full_0/div 0.04fF -C1814 ro_complete_0/a1 ro_complete_0/cbank_1/v 0.05fF -C1815 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/R 0.30fF -C1816 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z4 0.21fF -C1817 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C1818 pll_full_0/ro_complete_0/a0 pll_full_0/vco 0.11fF -C1819 divider_1/tspc_2/a_630_n680# divider_1/nor_0/B 0.35fF -C1820 divider_1/prescaler_0/tspc_1/Q divider_1/clk 0.60fF -C1821 ro_complete_buffered_0/tapered_buf_5/a_n10_n140# ro_complete_buffered_0/tapered_buf_5/in 0.04fF -C1822 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/R 0.61fF -C1823 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF -C1824 div_pd_buffered_0/tapered_buf_1/a_n10_230# div_pd_buffered_0/tapered_buf_1/in 0.02fF -C1825 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.13fF -C1826 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_580_0# 0.84fF -C1827 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/and_pd_0/Out1 0.05fF -C1828 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/tspc_r_1/Qbar 0.01fF -C1829 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/R 0.27fF -C1830 div_pd_buffered_0/tapered_buf_0/a_210_n610# div_pd_buffered_0/tapered_buf_0/a_4670_0# 29.21fF -C1831 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/B 0.01fF -C1832 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_580_0# 0.35fF -C1833 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_0/Q 0.45fF -C1834 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_0/z1 0.24fF -C1835 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF -C1836 divider_1/tspc_1/Z3 divider_1/tspc_1/a_630_n680# 0.05fF -C1837 divider_1/tspc_0/Z3 divider_1/tspc_0/Z4 0.65fF -C1838 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Q 0.38fF -C1839 ro_complete_0/a2 ro_complete_0/cbank_1/switch_3/vin 0.09fF -C1840 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF -C1841 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.09fF -C1842 ro_complete_buffered_0/tapered_buf_6/a_4670_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 29.21fF -C1843 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_3/vin 0.09fF -C1844 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C1845 divider_0/tspc_0/Q divider_0/tspc_1/Z3 0.45fF -C1846 ro_complete_buffered_0/tapered_buf_1/a_1650_0# ro_complete_buffered_0/tapered_buf_1/a_4670_0# 4.78fF -C1847 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C1848 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF -C1849 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z4 0.12fF -C1850 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/tspc_0/Z3 0.16fF -C1851 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/vco 0.12fF -C1852 io_clamp_low[2] io_clamp_high[2] 0.53fF -C1853 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.26fF -C1854 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF -C1855 io_clamp_high[1] io_analog[5] 0.53fF -C1856 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/vco 0.26fF -C1857 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/R 0.21fF -C1858 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_1650_0# 1.27fF -C1859 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.16fF -C1860 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF -C1861 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF -C1862 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF -C1863 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z4 0.00fF -C1864 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/DOWN 0.12fF -C1865 divider_1/tspc_0/Q divider_1/tspc_1/Z2 0.14fF -C1866 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z4 0.36fF -C1867 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_n10_230# 0.09fF -C1868 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF -C1869 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C1870 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_160_230# 0.02fF -C1871 divider_1/prescaler_0/tspc_2/Z4 divider_1/clk 0.12fF -C1872 ro_complete_buffered_0/tapered_buf_3/a_n10_n140# ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.05fF -C1873 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.84fF -C1874 ro_complete_0/a3 ro_complete_0/cbank_2/switch_2/vin 0.09fF -C1875 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z3 0.45fF -C1876 pll_full_0/ro_complete_0/a3 pll_full_0/vco 0.11fF -C1877 div_pd_buffered_0/tapered_buf_0/a_160_230# div_pd_buffered_0/tapered_buf_0/a_160_n140# 0.17fF -C1878 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.11fF -C1879 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_160_230# 0.17fF -C1880 pd_buffered_0/tapered_buf_2/a_1650_0# pd_buffered_0/tapered_buf_2/a_4670_0# 4.78fF -C1881 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.00fF -C1882 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/v 0.05fF -C1883 div_pd_buffered_0/tapered_buf_1/a_160_230# div_pd_buffered_0/tapered_buf_1/a_580_0# 0.02fF -C1884 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_1650_0# 1.27fF -C1885 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.21fF -C1886 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF -C1887 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C1888 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.65fF -C1889 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/vco 0.14fF -C1890 cp_buffered_0/cp_0/down cp_buffered_0/cp_0/upbar 0.02fF -C1891 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF -C1892 divider_1/tspc_0/Z2 divider_1/nor_1/A 0.23fF -C1893 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF -C1894 divider_1/mc2 divider_1/and_0/B 0.20fF -C1895 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF -C1896 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF -C1897 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF -C1898 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/switch_1/vin 0.19fF -C1899 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z1 0.09fF -C1900 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.19fF -C1901 divider_0/mc2 divider_0/and_0/out1 0.06fF -C1902 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_4670_0# 29.21fF -C1903 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_1/Z2 0.15fF -C1904 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/a_630_n680# 0.01fF -C1905 pd_buffered_0/pd_0/DOWN pd_buffered_0/tapered_buf_1/a_160_n140# 0.19fF -C1906 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/a_630_n680# 0.01fF -C1907 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF -C1908 divider_0/tspc_1/Q divider_0/tspc_2/Z4 0.15fF -C1909 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF -C1910 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Z4 0.65fF -C1911 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF -C1912 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF -C1913 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z2 0.11fF -C1914 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C1915 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_4670_0# 4.78fF -C1916 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z4 0.15fF -C1917 div_pd_buffered_0/tapered_buf_2/a_4670_0# div_pd_buffered_0/tapered_buf_2/a_1650_0# 4.78fF -C1918 divider_0/tspc_0/a_630_n680# divider_0/nor_1/A 0.35fF -C1919 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF -C1920 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/nor_1/B 0.30fF -C1921 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.03fF -C1922 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/A 0.16fF -C1923 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF -C1924 cp_buffered_0/tapered_buf_2/a_1650_0# cp_buffered_0/tapered_buf_2/a_580_0# 1.27fF -C1925 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/Z1 0.04fF -C1926 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z2 0.01fF -C1927 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/vco 0.05fF -C1928 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF -C1929 divider_0/tspc_2/Z3 divider_0/Out 0.05fF -C1930 divider_1/tspc_1/Q divider_1/tspc_2/a_630_n680# 0.01fF -C1931 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_0/Qbar 0.02fF -C1932 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/a_630_n680# 0.12fF -C1933 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z3 0.65fF -C1934 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF -C1935 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/div 0.05fF -C1936 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_210_n610# 0.22fF -C1937 ro_complete_buffered_0/tapered_buf_0/a_160_230# ro_complete_buffered_0/tapered_buf_0/a_160_n140# 0.17fF -C1938 ro_complete_buffered_0/tapered_buf_0/in ro_complete_buffered_0/tapered_buf_0/a_n10_230# 0.02fF -C1939 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/tapered_buf_6/in 0.05fF -C1940 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_1650_0# 2.89fF -C1941 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Q 0.55fF -C1942 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF -C1943 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/B 0.18fF -C1944 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_1/Z4 0.02fF -C1945 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/UP 0.03fF -C1946 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF -C1947 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF -C1948 divider_1/tspc_0/Q divider_1/tspc_1/Z4 0.15fF +C0 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/in 0.02fF +C1 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z2 0.11fF +C2 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/nor_1/B 0.18fF +C3 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/v 0.05fF +C4 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z1 0.09fF +C5 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z2 0.19fF +C6 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF +C7 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D div_pd_buffered_0/divider_0/clk 0.26fF +C8 div_pd_buffered_0/tapered_buf_3/a_n10_230# div_pd_buffered_0/tapered_buf_3/a_160_230# 0.09fF +C9 div_pd_buffered_0/tapered_buf_3/a_4670_0# div_pd_buffered_0/tapered_buf_3/a_210_n610# 29.21fF +C10 divider_0/nor_1/B divider_0/and_0/A 0.26fF +C11 ro_complete_0/a0 ro_complete_0/cbank_2/v 0.05fF +C12 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/nor_0/B 0.47fF +C13 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.02fF +C14 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 0.22fF +C15 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF +C16 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/tspc_r_1/z5 0.03fF +C17 div_pd_buffered_0/pd_0/tspc_r_1/Z2 div_pd_buffered_0/pd_0/R 0.21fF +C18 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/UP 0.03fF +C19 cp_buffered_0/tapered_buf_2/a_n10_230# cp_buffered_0/tapered_buf_2/in 0.02fF +C20 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_210_n610# 0.84fF +C21 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_n10_n140# 0.05fF +C22 divider_0/prescaler_0/Out divider_0/nor_1/A 0.15fF +C23 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF +C24 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a4 0.09fF +C25 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a5 0.09fF +C26 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z3 0.16fF +C27 pll_full_1/ro_complete_0/cbank_2/switch_2/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF +C28 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.01fF +C29 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/vco 0.11fF +C30 divider_1/prescaler_0/Out divider_1/tspc_0/Z4 0.12fF +C31 divider_0/nor_1/A divider_0/and_0/B 0.08fF +C32 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF +C33 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_210_n610# 0.84fF +C34 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_n10_n140# 0.05fF +C35 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.35fF +C36 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Q 0.04fF +C37 io_clamp_high[2] io_analog[6] 0.53fF +C38 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF +C39 pll_full_0/divider_0/tspc_1/Z4 pll_full_0/divider_0/tspc_0/Q 0.15fF +C40 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z4 0.12fF +C41 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF +C42 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z3 0.65fF +C43 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.05fF +C44 ro_complete_buffered_0/tapered_buf_0/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/in 0.04fF +C45 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/and_0/B 0.78fF +C46 divider_0/nor_1/B divider_0/tspc_1/Z4 0.21fF +C47 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/divider_0/tspc_2/Z4 0.65fF +C48 divider_1/tspc_0/Q divider_1/tspc_0/Z3 0.05fF +C49 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z3 0.06fF +C50 divider_0/nor_0/B divider_0/and_0/B 0.29fF +C51 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_1650_0# 2.89fF +C52 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_580_0# 0.35fF +C53 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/z5 0.11fF +C54 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/R 0.29fF +C55 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF +C56 divider_1/nor_1/A divider_1/and_0/B 0.08fF +C57 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/nand_1/z1 0.01fF +C58 divider_1/prescaler_0/tspc_2/Z2 divider_1/clk 0.11fF +C59 ro_complete_buffered_0/tapered_buf_3/a_n10_n140# ro_complete_buffered_0/tapered_buf_3/a_n10_230# 0.01fF +C60 ro_complete_buffered_0/tapered_buf_2/in ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.19fF +C61 ro_complete_0/a4 ro_complete_0/cbank_2/switch_0/vin 0.12fF +C62 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/ref 0.04fF +C63 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF +C64 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/vco 0.11fF +C65 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_580_0# 0.35fF +C66 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.29fF +C67 div_pd_buffered_0/tapered_buf_1/a_n10_230# div_pd_buffered_0/tapered_buf_1/a_160_230# 0.09fF +C68 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/tspc_r_0/Qbar 0.01fF +C69 divider_0/mc2 divider_0/and_0/OUT 0.05fF +C70 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_1/A 0.04fF +C71 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF +C72 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.09fF +C73 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_1650_0# 2.89fF +C74 pd_buffered_0/tapered_buf_1/a_580_0# pd_buffered_0/tapered_buf_1/a_1650_0# 1.27fF +C75 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/DOWN 0.02fF +C76 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/R 0.30fF +C77 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z4 0.15fF +C78 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Q 0.04fF +C79 divider_0/tspc_0/Z3 divider_0/tspc_0/Z1 0.06fF +C80 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.16fF +C81 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.05fF +C82 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF +C83 divider_1/nor_1/Z1 divider_1/and_0/B 0.18fF +C84 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_2/in 0.04fF +C85 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/z5 0.20fF +C86 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF +C87 div_pd_buffered_0/tapered_buf_4/a_1650_0# div_pd_buffered_0/tapered_buf_4/a_580_0# 1.27fF +C88 divider_1/tspc_2/Z3 divider_1/tspc_2/Z4 0.65fF +C89 ro_complete_0/a3 ro_complete_0/cbank_2/v 0.05fF +C90 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF +C91 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/divider_0/mc2 0.34fF +C92 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.38fF +C93 divider_0/tspc_0/Q divider_0/tspc_1/a_630_n680# 0.01fF +C94 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z4 0.01fF +C95 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF +C96 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.03fF +C97 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C98 pll_full_1/ro_complete_0/a1 pll_full_1/ro_complete_0/cbank_2/v 0.05fF +C99 div_pd_buffered_0/divider_0/tspc_2/Z2 div_pd_buffered_0/divider_0/tspc_2/Z4 0.36fF +C100 divider_1/prescaler_0/tspc_0/Z4 divider_1/clk 0.12fF +C101 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF +C102 cp_buffered_0/cp_0/a_1710_0# cp_buffered_0/cp_0/out 0.84fF +C103 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/R 0.33fF +C104 divider_0/tspc_1/Q divider_0/tspc_2/Z2 0.14fF +C105 divider_0/tspc_0/Z4 divider_0/tspc_0/Z1 0.00fF +C106 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/D 0.32fF +C107 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z3 0.16fF +C108 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C109 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.02fF +C110 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_210_n610# 0.22fF +C111 div_pd_buffered_0/tapered_buf_3/a_1650_0# div_pd_buffered_0/tapered_buf_3/a_4670_0# 4.78fF +C112 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z2 0.14fF +C113 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z3 0.05fF +C114 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF +C115 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/vco 0.01fF +C116 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/tapered_buf_0/in 0.02fF +C117 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/tapered_buf_1/a_160_n140# 0.22fF +C118 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C119 divider_0/tspc_0/Z3 divider_0/nor_1/A 0.38fF +C120 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF +C121 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a5 2.39fF +C122 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C123 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF +C124 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C125 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.09fF +C126 pd_buffered_0/tapered_buf_0/a_n10_n140# pd_buffered_0/pd_0/UP 0.04fF +C127 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z1 0.00fF +C128 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/B 0.01fF +C129 divider_0/nor_0/B divider_0/Out 0.22fF +C130 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF +C131 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/R 0.03fF +C132 ro_complete_0/a3 ro_complete_0/cbank_1/switch_2/vin 0.09fF +C133 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/R 0.21fF +C134 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.18fF +C135 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF +C136 pll_full_0/divider_0/nor_0/B pll_full_0/div 0.27fF +C137 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF +C138 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/a0 0.13fF +C139 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/tapered_buf_1/a_4670_0# 29.21fF +C140 ro_complete_buffered_0/tapered_buf_0/a_160_230# ro_complete_buffered_0/tapered_buf_0/a_n10_230# 0.09fF +C141 ro_complete_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/a_4670_0# 29.21fF +C142 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_2/Z4 0.02fF +C143 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C144 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/clk 0.45fF +C145 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/nand_0/z1 0.07fF +C146 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C147 divider_0/tspc_0/Z4 divider_0/nor_1/A 0.21fF +C148 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF +C149 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF +C150 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/div 0.02fF +C151 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/z5 0.04fF +C152 divider_1/and_0/OUT divider_1/and_0/B 0.01fF +C153 ro_complete_buffered_0/tapered_buf_3/a_1650_0# ro_complete_buffered_0/tapered_buf_3/a_4670_0# 4.78fF +C154 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF +C155 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Q 0.51fF +C156 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z2 0.01fF +C157 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF +C158 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF +C159 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/DOWN 0.02fF +C160 pd_buffered_0/tapered_buf_2/a_n10_n140# pd_buffered_0/tapered_buf_2/in 0.04fF +C161 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z4 0.12fF +C162 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF +C163 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_160_n140# 0.22fF +C164 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/R 0.51fF +C165 div_pd_buffered_0/tapered_buf_0/a_210_n610# div_pd_buffered_0/tapered_buf_0/a_1650_0# 2.89fF +C166 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_0/Q 0.14fF +C167 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/vco 0.01fF +C168 ro_complete_buffered_0/tapered_buf_2/in ro_complete_buffered_0/tapered_buf_2/a_n10_230# 0.02fF +C169 pll_full_1/pd_0/tspc_r_1/z5 pll_full_1/pd_0/tspc_r_0/z5 0.02fF +C170 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF +C171 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C172 divider_1/tspc_1/Z2 divider_1/tspc_1/a_630_n680# 0.01fF +C173 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/a_630_n680# 0.19fF +C174 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_0/Qbar 0.03fF +C175 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z2 0.20fF +C176 div_pd_buffered_0/pd_0/tspc_r_1/Z2 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.14fF +C177 ro_complete_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 2.89fF +C178 divider_0/tspc_0/Q divider_0/tspc_1/Z2 0.14fF +C179 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/tapered_buf_3/a_160_230# 0.09fF +C180 pd_buffered_0/tapered_buf_3/a_4670_0# pd_buffered_0/tapered_buf_3/a_210_n610# 29.21fF +C181 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.20fF +C182 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/and_0/OUT 0.14fF +C183 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_0/B 0.15fF +C184 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C185 ro_complete_buffered_0/tapered_buf_6/in ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.36fF +C186 pd_buffered_0/pd_0/DOWN pd_buffered_0/tapered_buf_1/a_n10_n140# 0.04fF +C187 pll_full_1/divider_0/and_0/OUT pll_full_1/div 0.01fF +C188 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/divider_0/prescaler_0/nand_1/z1 0.21fF +C189 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/a_160_230# 0.09fF +C190 cp_buffered_0/tapered_buf_1/a_4670_0# cp_buffered_0/tapered_buf_1/a_210_n610# 29.21fF +C191 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z2 1.07fF +C192 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a1 0.14fF +C193 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF +C194 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a3 0.09fF +C195 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C196 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/nor_1/B 1.21fF +C197 io_clamp_low[1] io_analog[5] 0.53fF +C198 div_pd_buffered_0/tapered_buf_2/in div_pd_buffered_0/divider_0/mc2 0.02fF +C199 div_pd_buffered_0/tapered_buf_4/a_210_n610# div_pd_buffered_0/tapered_buf_4/out 26.29fF +C200 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/in 0.02fF +C201 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF +C202 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF +C203 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C204 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.09fF +C205 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C206 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF +C207 pd_buffered_0/tapered_buf_1/out pd_buffered_0/tapered_buf_1/a_210_n610# 26.29fF +C208 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.38fF +C209 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/vco 1.46fF +C210 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.11fF +C211 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/clk 0.12fF +C212 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF +C213 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C214 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_4670_0# 29.21fF +C215 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_1650_0# 1.27fF +C216 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF +C217 divider_1/tspc_0/Q divider_1/tspc_1/Z1 0.01fF +C218 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z4 0.00fF +C219 ro_complete_buffered_0/tapered_buf_3/a_160_230# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.02fF +C220 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.22fF +C221 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF +C222 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF +C223 pll_full_1/pd_0/DOWN pll_full_1/cp_0/a_1710_0# 0.04fF +C224 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF +C225 pll_full_0/divider_0/prescaler_0/Out pll_full_0/vco 0.51fF +C226 div_pd_buffered_0/tapered_buf_2/a_580_0# div_pd_buffered_0/tapered_buf_2/a_1650_0# 1.27fF +C227 divider_1/prescaler_0/tspc_0/D divider_1/prescaler_0/nand_1/z1 0.21fF +C228 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.20fF +C229 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF +C230 div_pd_buffered_0/pd_0/tspc_r_0/Z1 div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.71fF +C231 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/pd_0/UP 0.02fF +C232 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_1650_0# 1.27fF +C233 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C234 pll_full_1/pd_0/R pll_full_1/div 0.51fF +C235 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_1/Q 0.21fF +C236 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin ro_complete_buffered_0/tapered_buf_6/in 1.30fF +C237 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_580_0# 0.02fF +C238 pd_buffered_0/tapered_buf_1/a_n10_230# pd_buffered_0/pd_0/DOWN 0.02fF +C239 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.36fF +C240 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/clk 0.45fF +C241 divider_0/nor_1/B divider_0/tspc_2/Z4 0.02fF +C242 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF +C243 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF +C244 div_pd_buffered_0/tapered_buf_2/a_210_n610# div_pd_buffered_0/tapered_buf_2/a_160_n140# 0.22fF +C245 divider_1/mc2 divider_1/and_0/A 0.16fF +C246 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/B 0.08fF +C247 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF +C248 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF +C249 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/vco 0.12fF +C250 div_pd_buffered_0/pd_0/tspc_r_0/Z4 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF +C251 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z1 0.17fF +C252 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/DOWN 0.11fF +C253 div_pd_buffered_0/tapered_buf_4/a_n10_n140# div_pd_buffered_0/pd_0/UP 0.04fF +C254 divider_0/nor_0/Z1 divider_0/nor_1/B 0.18fF +C255 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF +C256 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF +C257 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.05fF +C258 divider_0/tspc_0/Q divider_0/nor_1/B 0.22fF +C259 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/in 0.19fF +C260 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C261 pd_buffered_0/pd_0/tspc_r_1/Z4 pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF +C262 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF +C263 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/tspc_0/D 0.04fF +C264 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF +C265 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/z5 0.11fF +C266 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/div 0.12fF +C267 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.22fF +C268 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF +C269 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z4 0.12fF +C270 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z4 0.36fF +C271 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.31fF +C272 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF +C273 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF +C274 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C275 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_1/switch_1/vin 0.09fF +C276 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF +C277 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C278 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF +C279 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF +C280 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/a_630_n680# 0.05fF +C281 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/nor_1/B 0.03fF +C282 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.08fF +C283 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.05fF +C284 pd_buffered_0/pd_0/and_pd_0/Out1 pd_buffered_0/pd_0/UP 0.33fF +C285 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z3 0.65fF +C286 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF +C287 div_pd_buffered_0/tapered_buf_0/a_1650_0# div_pd_buffered_0/tapered_buf_0/a_4670_0# 4.78fF +C288 div_pd_buffered_0/divider_0/and_0/B div_pd_buffered_0/divider_0/and_0/Z1 0.07fF +C289 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/D 0.05fF +C290 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF +C291 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF +C292 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C293 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF +C294 ro_complete_0/a3 ro_complete_0/cbank_2/switch_1/vin 0.13fF +C295 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF +C296 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/z5 0.11fF +C297 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF +C298 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF +C299 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.01fF +C300 divider_1/nor_1/B divider_1/tspc_0/Q 0.22fF +C301 ro_complete_buffered_0/tapered_buf_7/a_n10_n140# ro_complete_buffered_0/tapered_buf_7/in 0.04fF +C302 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.20fF +C303 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_580_0# 0.84fF +C304 pd_buffered_0/pd_0/tspc_r_0/Z2 pd_buffered_0/pd_0/tspc_r_0/Z4 0.14fF +C305 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF +C306 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Z3 0.38fF +C307 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 div_pd_buffered_0/divider_0/clk 0.12fF +C308 ro_complete_buffered_0/tapered_buf_0/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/a_n10_230# 0.01fF +C309 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF +C310 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF +C311 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.38fF +C312 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.11fF +C313 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/vco 1.46fF +C314 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/A 0.01fF +C315 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/tspc_0/Q 0.05fF +C316 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/D 0.09fF +C317 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C318 ro_complete_0/a4 ro_complete_0/cbank_2/v 0.05fF +C319 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF +C320 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF +C321 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C322 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/vco 0.01fF +C323 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/div 0.65fF +C324 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/R 0.29fF +C325 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF +C326 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.06fF +C327 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z1 0.08fF +C328 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/v 0.08fF +C329 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.09fF +C330 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/R 0.01fF +C331 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF +C332 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/tspc_r_1/Qbar 0.21fF +C333 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/nor_0/B 0.35fF +C334 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/clk 0.60fF +C335 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C336 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/vco 0.01fF +C337 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF +C338 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF +C339 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/vco 1.36fF +C340 div_pd_buffered_0/tapered_buf_3/out div_pd_buffered_0/tapered_buf_3/a_210_n610# 26.29fF +C341 divider_1/and_0/out1 divider_1/and_0/A 0.01fF +C342 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C343 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/div 0.12fF +C344 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF +C345 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF +C346 div_pd_buffered_0/tapered_buf_0/in div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.04fF +C347 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Z2 0.23fF +C348 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C349 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.16fF +C350 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.06fF +C351 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF +C352 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/div 0.17fF +C353 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF +C354 div_pd_buffered_0/tapered_buf_2/a_n10_230# div_pd_buffered_0/tapered_buf_2/in 0.02fF +C355 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a1 0.14fF +C356 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/ref 0.02fF +C357 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/a_630_n680# 0.35fF +C358 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF +C359 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C360 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF +C361 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF +C362 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z1 0.17fF +C363 div_pd_buffered_0/tapered_buf_3/a_1650_0# div_pd_buffered_0/tapered_buf_3/a_210_n610# 2.89fF +C364 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.21fF +C365 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Q 0.05fF +C366 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z4 0.36fF +C367 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF +C368 cp_buffered_0/tapered_buf_0/a_1650_0# cp_buffered_0/tapered_buf_0/a_4670_0# 4.78fF +C369 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_160_230# 0.17fF +C370 divider_1/tspc_0/Q divider_1/tspc_1/Z3 0.45fF +C371 pll_full_1/cp_0/down pll_full_1/cp_0/upbar 0.02fF +C372 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF +C373 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C374 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_210_n610# 0.84fF +C375 ro_complete_buffered_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.19fF +C376 ro_complete_0/a5 ro_complete_0/cbank_2/switch_0/vin 0.09fF +C377 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF +C378 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C379 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF +C380 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/vco 1.46fF +C381 divider_0/prescaler_0/Out divider_0/tspc_0/Z3 0.45fF +C382 ro_complete_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_5/a_4670_0# 4.78fF +C383 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.17fF +C384 div_pd_buffered_0/tapered_buf_0/a_160_230# div_pd_buffered_0/tapered_buf_0/a_580_0# 0.02fF +C385 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.20fF +C386 pd_buffered_0/tapered_buf_2/a_580_0# pd_buffered_0/tapered_buf_2/a_160_230# 0.02fF +C387 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_210_n610# 0.22fF +C388 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C389 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/DOWN 0.21fF +C390 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_1/B 0.06fF +C391 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/nor_1/A 0.21fF +C392 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C393 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z2 0.01fF +C394 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_4670_0# 4.78fF +C395 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF +C396 pd_buffered_0/pd_0/tspc_r_0/Z2 pd_buffered_0/pd_0/R 0.21fF +C397 div_pd_buffered_0/divider_0/tspc_0/Z2 div_pd_buffered_0/divider_0/tspc_0/Z3 0.16fF +C398 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 div_pd_buffered_0/divider_0/clk 0.12fF +C399 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF +C400 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF +C401 div_pd_buffered_0/tapered_buf_2/a_210_n610# div_pd_buffered_0/tapered_buf_2/a_580_0# 0.84fF +C402 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/z5 0.04fF +C403 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C404 ro_complete_0/a1 ro_complete_0/cbank_2/v 0.05fF +C405 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C406 div_pd_buffered_0/tapered_buf_1/a_n10_230# div_pd_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF +C407 div_pd_buffered_0/pd_0/tspc_r_0/z5 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.02fF +C408 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.25fF +C409 divider_0/tspc_0/a_630_n680# divider_0/nor_1/B 0.01fF +C410 divider_0/prescaler_0/Out divider_0/tspc_0/Z4 0.12fF +C411 gnd ro_complete_buffered_0/tapered_buf_1/a_580_0# 5.71fF +C412 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/ro_complete_0/cbank_2/v 0.04fF +C413 pd_buffered_0/tapered_buf_1/a_n10_230# pd_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF +C414 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/and_pd_0/Z1 0.07fF +C415 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_0/Q 0.01fF +C416 divider_1/prescaler_0/Out divider_1/nor_1/A 0.15fF +C417 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/nand_1/z1 0.01fF +C418 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF +C419 pll_full_0/filter_0/a_4216_n5230# pll_full_0/vco 1.58fF +C420 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF +C421 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C422 div_pd_buffered_0/tapered_buf_3/a_160_n140# div_pd_buffered_0/pd_0/DOWN 0.19fF +C423 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF +C424 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/ro_complete_0/a3 26.29fF +C425 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF +C426 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/vco 0.11fF +C427 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C428 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/Out 0.05fF +C429 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.06fF +C430 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/UP 2.89fF +C431 divider_0/tspc_0/Q divider_0/tspc_1/Z4 0.15fF +C432 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF +C433 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF +C434 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C435 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/a3 0.09fF +C436 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/nor_1/B 0.38fF +C437 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z1 0.00fF +C438 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.12fF +C439 pll_full_1/ro_complete_0/a2 pll_full_1/vco 0.11fF +C440 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/Z3 0.65fF +C441 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C442 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/B 0.20fF +C443 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z3 0.05fF +C444 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z1 0.03fF +C445 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF +C446 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF +C447 ro_complete_0/a2 ro_complete_0/cbank_1/v 0.05fF +C448 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/a0 0.13fF +C449 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.12fF +C450 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF +C451 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF +C452 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/div 0.19fF +C453 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z4 0.14fF +C454 div_pd_buffered_0/tapered_buf_0/a_580_0# div_pd_buffered_0/tapered_buf_0/a_210_n610# 0.84fF +C455 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF +C456 ro_complete_buffered_0/tapered_buf_0/a_160_230# ro_complete_buffered_0/tapered_buf_0/a_580_0# 0.02fF +C457 ro_complete_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/a_160_n140# 0.22fF +C458 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/tapered_buf_6/in 1.30fF +C459 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C460 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_160_n140# 0.17fF +C461 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.04fF +C462 pll_full_1/ro_complete_0/cbank_1/switch_0/vin pll_full_1/vco 1.58fF +C463 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/a_630_n680# 0.01fF +C464 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF +C465 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/UP 0.33fF +C466 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF +C467 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF +C468 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.43fF +C469 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z3 0.05fF +C470 divider_1/nor_0/B divider_1/tspc_2/Z1 0.03fF +C471 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF +C472 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/pd_0/UP 0.19fF +C473 div_pd_buffered_0/tapered_buf_3/a_1650_0# div_pd_buffered_0/tapered_buf_3/a_580_0# 1.27fF +C474 ro_complete_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.02fF +C475 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/UP 0.11fF +C476 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/and_0/B 0.18fF +C477 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/tspc_2/a_630_n680# 0.04fF +C478 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/Z2 0.36fF +C479 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C480 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/nor_0/B 0.06fF +C481 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF +C482 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/z5 0.11fF +C483 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z3 0.65fF +C484 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/D 0.03fF +C485 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/Z1 0.04fF +C486 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z2 0.01fF +C487 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/clk 0.05fF +C488 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/R 0.27fF +C489 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C490 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C491 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF +C492 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_580_0# 0.35fF +C493 div_pd_buffered_0/tapered_buf_1/a_160_230# div_pd_buffered_0/tapered_buf_1/a_160_n140# 0.17fF +C494 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/and_pd_0/Out1 0.12fF +C495 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/UP 0.21fF +C496 divider_0/tspc_0/Z3 divider_0/tspc_0/Z4 0.65fF +C497 pll_full_1/ro_complete_0/cbank_2/switch_0/vin pll_full_1/ro_complete_0/cbank_2/v 1.45fF +C498 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.07fF +C499 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/UP 0.45fF +C500 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/B 0.18fF +C501 divider_1/mc2 divider_1/prescaler_0/tspc_2/a_630_n680# 0.33fF +C502 divider_0/and_0/OUT divider_0/and_0/B 0.01fF +C503 ro_complete_0/a4 ro_complete_0/cbank_2/switch_1/vin 0.09fF +C504 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF +C505 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/R 0.01fF +C506 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C507 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF +C508 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/D 0.03fF +C509 io_clamp_high[0] io_analog[4] 0.53fF +C510 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF +C511 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Z2 0.21fF +C512 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.02fF +C513 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 0.22fF +C514 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.14fF +C515 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C516 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z2 0.25fF +C517 div_pd_buffered_0/tapered_buf_1/a_4670_0# div_pd_buffered_0/tapered_buf_1/a_1650_0# 4.78fF +C518 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/nor_0/B 0.00fF +C519 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_0/Q 0.14fF +C520 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.05fF +C521 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/clk 0.01fF +C522 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF +C523 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C524 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.03fF +C525 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z2 0.36fF +C526 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z2 0.16fF +C527 pll_full_1/div pll_full_1/vco 2.26fF +C528 divider_1/tspc_0/Q divider_1/nor_1/A 0.55fF +C529 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_210_n610# 0.84fF +C530 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF +C531 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF +C532 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF +C533 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF +C534 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C535 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF +C536 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 0.84fF +C537 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_n10_n140# 0.05fF +C538 pd_buffered_0/tapered_buf_2/a_1650_0# pd_buffered_0/tapered_buf_2/a_210_n610# 2.89fF +C539 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/in 0.19fF +C540 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z3 0.06fF +C541 ro_complete_buffered_0/tapered_buf_5/a_210_n610# ro_complete_buffered_0/ro_complete_0/a0 26.29fF +C542 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/a_160_n140# 0.05fF +C543 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z3 0.65fF +C544 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/D 0.11fF +C545 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C546 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/tapered_buf_6/in 1.30fF +C547 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Q 0.55fF +C548 pll_full_1/ro_complete_0/cbank_1/switch_5/vin pll_full_1/vco 1.46fF +C549 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z4 0.20fF +C550 divider_1/tspc_1/Z1 divider_1/tspc_1/Z2 1.07fF +C551 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_1/B 0.18fF +C552 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z4 0.12fF +C553 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF +C554 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF +C555 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/UP 0.11fF +C556 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_0/Q 0.14fF +C557 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/vco 0.01fF +C558 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_580_0# 0.35fF +C559 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/and_pd_0/Out1 0.05fF +C560 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/R 0.27fF +C561 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/tspc_r_1/Qbar 0.01fF +C562 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/nor_1/B 1.21fF +C563 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z1 0.08fF +C564 gnd ro_complete_buffered_0/tapered_buf_1/a_1650_0# 20.70fF +C565 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/in 0.02fF +C566 pd_buffered_0/tapered_buf_0/a_n10_230# pd_buffered_0/tapered_buf_0/a_160_230# 0.09fF +C567 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/and_pd_0/Out1 0.33fF +C568 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C569 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z1 0.01fF +C570 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/Q 0.22fF +C571 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_1/z1 0.21fF +C572 filter_0/v filter_0/a_4216_n5230# 0.91fF +C573 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z1 0.17fF +C574 ro_complete_0/a4 ro_complete_0/cbank_1/switch_1/vin 0.09fF +C575 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF +C576 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.04fF +C577 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.17fF +C578 pll_full_0/divider_0/and_0/OUT pll_full_0/div 0.01fF +C579 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF +C580 divider_0/mc2 divider_0/nor_1/B 0.06fF +C581 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF +C582 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_0/a_210_n610# 26.29fF +C583 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF +C584 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C585 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/and_0/A 0.80fF +C586 pll_full_1/ro_complete_0/cbank_2/switch_5/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF +C587 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/tapered_buf_0/a_580_0# 0.35fF +C588 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF +C589 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z3 0.38fF +C590 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z4 0.12fF +C591 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z2 1.07fF +C592 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Qbar1 0.38fF +C593 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C594 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF +C595 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C596 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z2 0.19fF +C597 divider_1/tspc_1/Q divider_1/tspc_2/Z1 0.01fF +C598 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF +C599 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z1 0.09fF +C600 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.78fF +C601 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/vco 1.46fF +C602 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF +C603 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF +C604 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/and_0/B 0.08fF +C605 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/nor_0/B 0.22fF +C606 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.19fF +C607 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/clk 0.01fF +C608 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF +C609 ro_complete_buffered_0/tapered_buf_0/in ro_complete_buffered_0/tapered_buf_0/a_160_n140# 0.19fF +C610 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF +C611 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Z4 0.12fF +C612 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z2 0.01fF +C613 cp_buffered_0/cp_0/down cp_buffered_0/cp_0/a_1710_0# 0.32fF +C614 divider_0/tspc_1/a_630_n680# divider_0/nor_0/B 0.00fF +C615 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF +C616 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/Z1 0.36fF +C617 divider_1/prescaler_0/m1_2700_2190# divider_1/nor_1/A 0.01fF +C618 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_0/Z2 0.14fF +C619 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C620 divider_1/nor_0/B divider_1/tspc_2/Z3 0.38fF +C621 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z4 0.12fF +C622 divider_1/tspc_2/Z1 divider_1/tspc_2/Z2 1.07fF +C623 ro_complete_0/a5 ro_complete_0/cbank_2/v 0.08fF +C624 ro_complete_0/a0 ro_complete_0/cbank_1/switch_5/vin 0.09fF +C625 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/R 0.21fF +C626 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/ref 0.12fF +C627 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF +C628 divider_1/nor_1/B divider_1/tspc_1/Z2 0.30fF +C629 ro_complete_buffered_0/tapered_buf_1/a_210_n610# gnd 212.43fF +C630 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/OUT 0.05fF +C631 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/nor_0/B 0.42fF +C632 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# 0.05fF +C633 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.03fF +C634 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/nor_1/A 0.35fF +C635 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF +C636 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF +C637 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C638 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/cp_0/down 26.29fF +C639 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/tspc_r_1/z5 0.03fF +C640 pd_buffered_0/pd_0/tspc_r_1/Z2 pd_buffered_0/pd_0/R 0.21fF +C641 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/UP 0.03fF +C642 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z2 0.40fF +C643 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D div_pd_buffered_0/divider_0/clk 0.29fF +C644 divider_1/tspc_0/Z1 divider_1/tspc_0/Z2 1.07fF +C645 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C646 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/nand_0/z1 0.01fF +C647 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/vco 0.11fF +C648 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_0/a_630_n680# 0.04fF +C649 divider_1/tspc_1/Z1 divider_1/tspc_1/Z4 0.00fF +C650 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z2 0.01fF +C651 ro_complete_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_2/a_4670_0# 4.78fF +C652 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF +C653 pll_full_1/cp_0/down pll_full_1/cp_0/a_1710_0# 0.32fF +C654 div_pd_buffered_0/tapered_buf_3/a_n10_n140# div_pd_buffered_0/pd_0/DOWN 0.04fF +C655 divider_1/and_0/out1 divider_1/and_0/Z1 0.36fF +C656 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF +C657 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C658 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/div 0.02fF +C659 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/divider_0/mc2 26.29fF +C660 pd_buffered_0/tapered_buf_3/a_n10_n140# pd_buffered_0/tapered_buf_3/in 0.04fF +C661 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Q 0.04fF +C662 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.06fF +C663 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF +C664 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.38fF +C665 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/clk 0.11fF +C666 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.11fF +C667 pd_buffered_0/tapered_buf_0/a_160_230# pd_buffered_0/tapered_buf_0/a_580_0# 0.02fF +C668 pd_buffered_0/tapered_buf_0/a_210_n610# pd_buffered_0/tapered_buf_0/a_160_n140# 0.22fF +C669 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/a_630_n680# 0.19fF +C670 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z3 0.05fF +C671 divider_0/nor_1/B divider_0/tspc_1/Z1 0.03fF +C672 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/m1_2700_2190# 0.08fF +C673 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/div 0.03fF +C674 pll_full_1/divider_0/and_0/OUT pll_full_1/vco 0.06fF +C675 cp_buffered_0/tapered_buf_1/a_n10_n140# cp_buffered_0/tapered_buf_1/in 0.04fF +C676 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF +C677 div_pd_buffered_0/tapered_buf_2/in div_pd_buffered_0/tapered_buf_2/a_160_n140# 0.19fF +C678 divider_1/and_0/OUT divider_1/prescaler_0/nand_0/z1 0.01fF +C679 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/a_630_n680# 0.05fF +C680 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/nor_1/B 0.03fF +C681 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF +C682 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF +C683 ro_complete_buffered_0/tapered_buf_4/a_n10_n140# ro_complete_buffered_0/tapered_buf_4/in 0.04fF +C684 ro_complete_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 2.89fF +C685 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/in 0.19fF +C686 ro_complete_buffered_0/tapered_buf_4/a_210_n610# ro_complete_buffered_0/ro_complete_0/a1 26.29fF +C687 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/switch_5/vin 0.20fF +C688 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.18fF +C689 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C690 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/Out 0.21fF +C691 divider_1/nor_1/B divider_1/and_0/A 0.26fF +C692 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF +C693 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/tapered_buf_6/in 0.05fF +C694 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF +C695 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/tspc_r_0/Qbar 0.01fF +C696 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/vco 0.64fF +C697 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/nor_0/B 0.47fF +C698 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Z3 0.05fF +C699 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF +C700 div_pd_buffered_0/tapered_buf_2/a_n10_230# div_pd_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF +C701 divider_0/tspc_1/Z2 divider_0/nor_1/A 0.15fF +C702 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF +C703 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_580_0# 0.84fF +C704 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/a_160_230# 0.09fF +C705 cp_buffered_0/tapered_buf_0/a_4670_0# cp_buffered_0/tapered_buf_0/a_210_n610# 29.21fF +C706 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF +C707 divider_0/and_0/out1 divider_0/and_0/A 0.01fF +C708 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF +C709 divider_1/and_0/OUT divider_1/clk 0.04fF +C710 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF +C711 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF +C712 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF +C713 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/vco 1.46fF +C714 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_580_0# 0.35fF +C715 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.09fF +C716 ro_complete_buffered_0/tapered_buf_5/a_4670_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 29.21fF +C717 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF +C718 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Q 0.05fF +C719 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF +C720 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.19fF +C721 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF +C722 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin ro_complete_buffered_0/tapered_buf_6/in 1.43fF +C723 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.38fF +C724 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.15fF +C725 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/and_0/A 0.01fF +C726 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/out1 0.31fF +C727 div_pd_buffered_0/divider_0/tspc_1/Z4 div_pd_buffered_0/divider_0/tspc_0/Q 0.15fF +C728 divider_0/nor_1/A divider_0/prescaler_0/tspc_1/Q 0.03fF +C729 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.01fF +C730 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z2 0.25fF +C731 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF +C732 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF +C733 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF +C734 divider_1/tspc_1/Z2 divider_1/tspc_1/Z3 0.16fF +C735 divider_1/prescaler_0/m1_2700_2190# divider_1/and_0/OUT 0.14fF +C736 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z1 0.09fF +C737 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.09fF +C738 div_pd_buffered_0/tapered_buf_4/a_4670_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 29.21fF +C739 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF +C740 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/vco 0.01fF +C741 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar1 0.01fF +C742 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/R 0.36fF +C743 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.20fF +C744 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF +C745 div_pd_buffered_0/pd_0/tspc_r_1/Z1 div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.71fF +C746 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_1650_0# 1.27fF +C747 cp_buffered_0/tapered_buf_2/a_4670_0# cp_buffered_0/tapered_buf_2/a_210_n610# 29.21fF +C748 divider_1/nor_1/B divider_1/tspc_1/Z4 0.21fF +C749 divider_0/mc2 divider_0/and_0/A 0.16fF +C750 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z3 0.11fF +C751 gnd ro_complete_buffered_0/tapered_buf_1/a_4670_0# 82.48fF +C752 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.05fF +C753 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z4 0.21fF +C754 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/nor_1/B 0.35fF +C755 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/Q 0.05fF +C756 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/Z4 0.36fF +C757 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Z2 0.01fF +C758 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/and_0/B 0.78fF +C759 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF +C760 pd_buffered_0/tapered_buf_0/a_n10_230# pd_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF +C761 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z3 0.45fF +C762 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Q 0.04fF +C763 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/A 0.26fF +C764 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/and_0/B 0.29fF +C765 filter_0/v filter_0/a_4216_n2998# 0.36fF +C766 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C767 divider_0/nor_1/A divider_0/tspc_0/Z2 0.23fF +C768 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF +C769 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C770 divider_1/nor_1/A divider_1/prescaler_0/tspc_1/Q 0.03fF +C771 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/D 0.15fF +C772 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z2 0.25fF +C773 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF +C774 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 0.84fF +C775 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_n10_n140# 0.05fF +C776 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/tspc_r_1/Z1 0.71fF +C777 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_4/vin 0.20fF +C778 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF +C779 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C780 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_1/Z4 0.02fF +C781 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.36fF +C782 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/DOWN 0.11fF +C783 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.05fF +C784 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Q 0.04fF +C785 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF +C786 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF +C787 divider_0/nor_1/B divider_0/nor_1/A 1.21fF +C788 cp_buffered_0/tapered_buf_2/a_160_n140# cp_buffered_0/tapered_buf_2/a_580_0# 0.35fF +C789 pd_buffered_0/tapered_buf_0/a_580_0# pd_buffered_0/tapered_buf_0/a_1650_0# 1.27fF +C790 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z3 0.16fF +C791 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z4 0.22fF +C792 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/div 0.19fF +C793 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_1650_0# 2.89fF +C794 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Q 0.05fF +C795 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF +C796 divider_1/tspc_1/Q divider_1/tspc_2/Z3 0.45fF +C797 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z1 0.09fF +C798 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.19fF +C799 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.12fF +C800 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF +C801 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z3 0.65fF +C802 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C803 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_1/Z4 0.21fF +C804 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF +C805 pll_full_1/ro_complete_0/a0 pll_full_1/vco 0.11fF +C806 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z2 0.14fF +C807 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.32fF +C808 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF +C809 divider_0/nor_1/B divider_0/nor_0/B 0.47fF +C810 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/a_1710_0# 0.83fF +C811 pll_full_1/divider_0/and_0/A pll_full_1/divider_0/and_0/B 0.18fF +C812 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C813 divider_1/mc2 divider_1/and_0/out1 0.06fF +C814 divider_1/tspc_0/Z2 divider_1/tspc_0/Z3 0.16fF +C815 divider_1/prescaler_0/tspc_1/Z2 divider_1/and_0/OUT 0.06fF +C816 ro_complete_0/a0 ro_complete_0/cbank_1/v 0.05fF +C817 div_pd_buffered_0/tapered_buf_3/a_160_n140# div_pd_buffered_0/tapered_buf_3/a_160_230# 0.17fF +C818 divider_1/tspc_2/Z2 divider_1/tspc_2/Z3 0.16fF +C819 divider_1/nor_0/B divider_1/tspc_2/Z4 0.22fF +C820 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/R 0.03fF +C821 divider_0/tspc_0/Q divider_0/tspc_0/a_630_n680# 0.04fF +C822 cp_buffered_0/tapered_buf_2/a_n10_230# cp_buffered_0/tapered_buf_2/a_160_230# 0.09fF +C823 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/nor_1/B 0.38fF +C824 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C825 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF +C826 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C827 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z2 0.36fF +C828 pd_buffered_0/tapered_buf_1/a_580_0# pd_buffered_0/tapered_buf_1/a_160_n140# 0.35fF +C829 pd_buffered_0/pd_0/tspc_r_1/Z2 pd_buffered_0/pd_0/tspc_r_1/Z4 0.14fF +C830 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z2 0.01fF +C831 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin ro_complete_buffered_0/tapered_buf_6/in 1.30fF +C832 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/divider_0/prescaler_0/nand_0/z1 0.24fF +C833 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z3 0.06fF +C834 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z3 0.11fF +C835 cp_buffered_0/cp_0/down cp_buffered_0/cp_0/out 0.79fF +C836 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF +C837 divider_1/tspc_1/Z3 divider_1/tspc_1/Z4 0.65fF +C838 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.45fF +C839 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_0/Q 0.01fF +C840 divider_1/and_0/A divider_1/and_0/B 0.18fF +C841 div_pd_buffered_0/pd_0/tspc_r_0/z5 div_pd_buffered_0/pd_0/UP 0.03fF +C842 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF +C843 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Q 0.51fF +C844 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF +C845 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF +C846 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.04fF +C847 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/clk 0.51fF +C848 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF +C849 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a3 3.17fF +C850 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF +C851 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.13fF +C852 pd_buffered_0/tapered_buf_0/a_210_n610# pd_buffered_0/tapered_buf_0/a_1650_0# 2.89fF +C853 pd_buffered_0/tapered_buf_0/a_n10_230# pd_buffered_0/pd_0/UP 0.02fF +C854 divider_0/nor_1/B divider_0/tspc_1/Z3 0.38fF +C855 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/a_630_n680# 0.12fF +C856 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/vco 0.26fF +C857 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF +C858 divider_0/nor_0/B divider_0/tspc_2/Z1 0.03fF +C859 cp_buffered_0/tapered_buf_1/a_210_n610# cp_buffered_0/cp_0/out 26.29fF +C860 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Qbar1 0.38fF +C861 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C862 ro_complete_0/a2 ro_complete_0/cbank_2/switch_2/vin 0.14fF +C863 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF +C864 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/nor_1/B 0.38fF +C865 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z1 0.00fF +C866 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF +C867 pll_full_0/ro_complete_0/a2 pll_full_0/vco 0.11fF +C868 divider_1/prescaler_0/tspc_2/D divider_1/prescaler_0/nand_0/z1 0.24fF +C869 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/clk 0.01fF +C870 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF +C871 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF +C872 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z1 0.03fF +C873 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/a_n10_n140# 0.05fF +C874 div_pd_buffered_0/pd_0/and_pd_0/Z1 div_pd_buffered_0/pd_0/UP 0.06fF +C875 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.09fF +C876 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C877 cp_buffered_0/tapered_buf_2/a_4670_0# cp_buffered_0/tapered_buf_2/a_1650_0# 4.78fF +C878 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z4 0.20fF +C879 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF +C880 pd_buffered_0/pd_0/tspc_r_0/Z1 pd_buffered_0/pd_0/tspc_r_0/Z2 0.71fF +C881 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_2/Z2 0.20fF +C882 divider_0/prescaler_0/Out divider_0/clk 0.51fF +C883 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF +C884 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z3 0.45fF +C885 pll_full_1/ro_complete_0/a3 pll_full_1/vco 0.11fF +C886 divider_0/prescaler_0/m1_2700_2190# divider_0/nor_1/A 0.01fF +C887 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF +C888 div_pd_buffered_0/tapered_buf_2/a_n10_n140# div_pd_buffered_0/tapered_buf_2/in 0.04fF +C889 divider_1/prescaler_0/Out divider_1/clk 0.51fF +C890 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF +C891 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF +C892 ro_complete_0/a3 ro_complete_0/cbank_1/v 0.05fF +C893 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF +C894 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/vco 1.58fF +C895 divider_1/prescaler_0/tspc_2/D divider_1/clk 0.26fF +C896 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/a_n10_n140# 0.01fF +C897 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/in 0.02fF +C898 pd_buffered_0/tapered_buf_2/a_n10_230# pd_buffered_0/tapered_buf_2/in 0.02fF +C899 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/tapered_buf_1/a_580_0# 0.84fF +C900 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.11fF +C901 pd_buffered_0/pd_0/tspc_r_0/Z4 pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF +C902 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z1 0.17fF +C903 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/DOWN 0.11fF +C904 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF +C905 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.08fF +C906 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF +C907 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.05fF +C908 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z4 0.02fF +C909 divider_1/prescaler_0/Out divider_1/prescaler_0/m1_2700_2190# 0.11fF +C910 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/clk 0.14fF +C911 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/D 0.03fF +C912 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF +C913 divider_1/tspc_1/Z2 divider_1/nor_1/A 0.15fF +C914 divider_1/tspc_0/Z2 divider_1/tspc_0/Z4 0.36fF +C915 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_2/D 0.16fF +C916 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z3 0.65fF +C917 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF +C918 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/tapered_buf_4/a_n10_n140# 0.01fF +C919 ro_complete_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_6/a_4670_0# 4.78fF +C920 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.17fF +C921 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_1/switch_3/vin 0.09fF +C922 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF +C923 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.20fF +C924 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.03fF +C925 gnd ro_complete_buffered_0/ro_complete_0/a4 87.74fF +C926 ro_complete_buffered_0/tapered_buf_1/a_580_0# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 1.27fF +C927 ro_complete_buffered_0/tapered_buf_1/in ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.19fF +C928 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C929 cp_buffered_0/tapered_buf_2/a_n10_230# cp_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF +C930 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_160_230# 0.02fF +C931 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_210_n610# 0.22fF +C932 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF +C933 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z3 0.06fF +C934 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z2 0.11fF +C935 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C936 divider_0/nor_1/Z1 divider_0/and_0/B 0.18fF +C937 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C938 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z4 0.15fF +C939 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_160_230# 0.02fF +C940 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_210_n610# 0.22fF +C941 divider_0/nor_1/A divider_0/and_0/A 0.01fF +C942 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/D 0.05fF +C943 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_1/Qbar 0.21fF +C944 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.45fF +C945 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF +C946 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.09fF +C947 ro_complete_buffered_0/tapered_buf_4/a_4670_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 29.21fF +C948 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF +C949 io_clamp_low[2] io_analog[6] 0.53fF +C950 div_pd_buffered_0/pd_0/and_pd_0/Out1 div_pd_buffered_0/pd_0/and_pd_0/Z1 0.18fF +C951 divider_1/nor_1/B divider_1/tspc_2/Z4 0.02fF +C952 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.20fF +C953 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.09fF +C954 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/a_630_n680# 0.12fF +C955 pd_buffered_0/tapered_buf_0/a_1650_0# pd_buffered_0/tapered_buf_0/a_4670_0# 4.78fF +C956 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 4.58fF +C957 pll_full_0/pd_0/R pll_full_0/div 0.51fF +C958 div_pd_buffered_0/tapered_buf_3/a_n10_230# div_pd_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF +C959 divider_0/nor_1/B divider_0/tspc_1/Q 0.51fF +C960 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF +C961 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF +C962 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/div 0.05fF +C963 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z4 0.36fF +C964 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z4 0.20fF +C965 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF +C966 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C967 divider_1/tspc_1/Q divider_1/tspc_2/Z4 0.15fF +C968 divider_1/nor_1/A divider_1/and_0/A 0.01fF +C969 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.05fF +C970 pll_full_1/pd_0/DOWN pll_full_1/pd_0/UP 4.58fF +C971 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF +C972 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z2 0.36fF +C973 pll_full_1/filter_0/a_4216_n5230# pll_full_1/vco 1.58fF +C974 pll_full_0/div pll_full_0/vco 2.26fF +C975 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_580_0# 0.35fF +C976 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF +C977 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.09fF +C978 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF +C979 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF +C980 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/R 0.29fF +C981 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/and_0/B 0.31fF +C982 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.22fF +C983 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.04fF +C984 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.06fF +C985 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z2 0.19fF +C986 divider_0/nor_1/A divider_0/tspc_1/Z4 0.02fF +C987 divider_0/nor_1/B divider_0/tspc_2/Z2 0.20fF +C988 divider_1/nor_1/Z1 divider_1/and_0/A 0.80fF +C989 divider_1/tspc_2/Z3 divider_1/Out 0.05fF +C990 divider_1/tspc_2/Z2 divider_1/tspc_2/Z4 0.36fF +C991 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.35fF +C992 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/tspc_r_0/Qbar 0.01fF +C993 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Q 0.55fF +C994 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/vco 1.46fF +C995 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.12fF +C996 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.84fF +C997 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF +C998 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF +C999 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/nor_1/B 0.01fF +C1000 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.91fF +C1001 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C1002 divider_1/tspc_0/Z1 divider_1/tspc_0/Z3 0.06fF +C1003 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF +C1004 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z3 0.05fF +C1005 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.04fF +C1006 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z4 0.00fF +C1007 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_2/Z4 0.02fF +C1008 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF +C1009 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/vco 0.45fF +C1010 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/out 0.61fF +C1011 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z4 0.28fF +C1012 divider_0/tspc_1/Q divider_0/tspc_2/Z1 0.01fF +C1013 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF +C1014 divider_1/nor_1/A divider_1/tspc_1/Z4 0.02fF +C1015 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z3 0.06fF +C1016 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/R 0.30fF +C1017 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.17fF +C1018 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_580_0# 0.35fF +C1019 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z1 0.01fF +C1020 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/Q 0.22fF +C1021 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_4/vin 0.20fF +C1022 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Q 0.91fF +C1023 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C1024 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.03fF +C1025 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF +C1026 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/clk 0.04fF +C1027 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF +C1028 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C1029 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z4 0.01fF +C1030 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF +C1031 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/DOWN 0.07fF +C1032 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Q 0.91fF +C1033 divider_0/nor_0/B divider_0/tspc_2/Z3 0.38fF +C1034 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF +C1035 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF +C1036 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF +C1037 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_580_0# 0.35fF +C1038 divider_1/tspc_1/a_630_n680# divider_1/nor_0/B 0.00fF +C1039 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/Q 0.04fF +C1040 divider_1/prescaler_0/tspc_1/Z3 divider_1/clk 0.45fF +C1041 pll_full_1/pd_0/DOWN pll_full_1/ref 1.48fF +C1042 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C1043 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/A 0.80fF +C1044 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C1045 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF +C1046 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z3 0.38fF +C1047 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF +C1048 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF +C1049 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF +C1050 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF +C1051 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/in 0.02fF +C1052 divider_0/prescaler_0/Out divider_0/tspc_0/Z2 0.11fF +C1053 ro_complete_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/a_1650_0# 2.89fF +C1054 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.09fF +C1055 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/tspc_r_0/z5 0.20fF +C1056 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/clk 0.11fF +C1057 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Q 0.15fF +C1058 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/clk 0.01fF +C1059 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF +C1060 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Q 0.20fF +C1061 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF +C1062 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF +C1063 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF +C1064 div_pd_buffered_0/tapered_buf_2/a_n10_n140# div_pd_buffered_0/tapered_buf_2/a_160_n140# 0.05fF +C1065 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z3 0.33fF +C1066 divider_1/mc2 divider_1/nor_0/B 0.15fF +C1067 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF +C1068 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF +C1069 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF +C1070 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF +C1071 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF +C1072 div_pd_buffered_0/pd_0/tspc_r_0/Z4 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF +C1073 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF +C1074 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C1075 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/m1_2700_2190# 0.19fF +C1076 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/tapered_buf_6/in 0.05fF +C1077 pd_buffered_0/tapered_buf_1/a_160_230# pd_buffered_0/tapered_buf_1/a_160_n140# 0.17fF +C1078 pd_buffered_0/pd_0/tspc_r_0/z5 pd_buffered_0/pd_0/tspc_r_1/z5 0.02fF +C1079 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z2 0.25fF +C1080 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_0/Q 0.01fF +C1081 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.11fF +C1082 div_pd_buffered_0/tapered_buf_2/a_n10_230# div_pd_buffered_0/tapered_buf_2/a_160_230# 0.09fF +C1083 divider_0/nor_1/B divider_0/and_0/B 0.31fF +C1084 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF +C1085 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_2/a_n10_230# 0.01fF +C1086 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C1087 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/nand_0/z1 0.07fF +C1088 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF +C1089 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/vco 0.11fF +C1090 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/UP 0.11fF +C1091 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 0.84fF +C1092 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_n10_n140# 0.05fF +C1093 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a4 0.12fF +C1094 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_3/vin 0.09fF +C1095 pd_buffered_0/tapered_buf_3/a_1650_0# pd_buffered_0/tapered_buf_3/a_210_n610# 2.89fF +C1096 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/in 0.19fF +C1097 divider_0/tspc_0/Q divider_0/tspc_1/Z1 0.01fF +C1098 gnd ro_complete_buffered_0/tapered_buf_1/a_160_n140# 1.34fF +C1099 divider_1/tspc_0/Z1 divider_1/tspc_0/Z4 0.00fF +C1100 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.45fF +C1101 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/UP 1.06fF +C1102 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/vco 0.45fF +C1103 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF +C1104 divider_0/and_0/OUT divider_0/clk 0.04fF +C1105 cp_buffered_0/tapered_buf_1/a_1650_0# cp_buffered_0/tapered_buf_1/a_210_n610# 2.89fF +C1106 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/in 0.19fF +C1107 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C1108 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF +C1109 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/Z2 0.14fF +C1110 divider_1/prescaler_0/tspc_2/Z4 divider_1/prescaler_0/tspc_2/D 0.11fF +C1111 divider_1/prescaler_0/m1_2700_2190# divider_1/clk 0.01fF +C1112 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/a_n10_n140# 0.01fF +C1113 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/div 0.03fF +C1114 pll_full_0/divider_0/and_0/OUT pll_full_0/vco 0.06fF +C1115 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF +C1116 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_580_0# 0.35fF +C1117 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C1118 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C1119 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.12fF +C1120 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C1121 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.12fF +C1122 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF +C1123 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C1124 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.65fF +C1125 pll_full_1/ro_complete_0/a4 pll_full_1/vco 0.01fF +C1126 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF +C1127 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF +C1128 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z3 0.16fF +C1129 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF +C1130 ro_complete_buffered_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_3/a_n10_230# 0.02fF +C1131 ro_complete_buffered_0/tapered_buf_3/a_160_230# ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.17fF +C1132 ro_complete_0/a4 ro_complete_0/cbank_1/v 0.05fF +C1133 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/vco 0.64fF +C1134 divider_1/prescaler_0/tspc_2/Z3 divider_1/clk 0.45fF +C1135 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.02fF +C1136 pd_buffered_0/tapered_buf_2/a_580_0# pd_buffered_0/tapered_buf_2/a_1650_0# 1.27fF +C1137 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/a_160_230# 0.09fF +C1138 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/nor_1/A 0.15fF +C1139 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/a0 0.09fF +C1140 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.01fF +C1141 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/clk 0.11fF +C1142 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF +C1143 divider_0/tspc_0/Z3 divider_0/tspc_0/Z2 0.16fF +C1144 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.14fF +C1145 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/tapered_buf_6/in 0.05fF +C1146 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.00fF +C1147 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF +C1148 pll_full_1/divider_0/and_0/B pll_full_1/divider_0/and_0/Z1 0.07fF +C1149 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Z4 0.65fF +C1150 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_1/z5 0.03fF +C1151 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_0/z5 0.04fF +C1152 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF +C1153 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C1154 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/div 0.17fF +C1155 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF +C1156 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/A 0.01fF +C1157 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/UP 0.03fF +C1158 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/DOWN 0.03fF +C1159 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF +C1160 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.09fF +C1161 divider_1/nor_1/B divider_1/tspc_1/a_630_n680# 0.35fF +C1162 divider_0/prescaler_0/Out divider_0/prescaler_0/m1_2700_2190# 0.11fF +C1163 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 2.89fF +C1164 ro_complete_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.17fF +C1165 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/and_pd_0/Out1 0.12fF +C1166 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/UP 0.21fF +C1167 div_pd_buffered_0/divider_0/tspc_2/Z3 div_pd_buffered_0/divider_0/tspc_2/Z4 0.65fF +C1168 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z3 0.05fF +C1169 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z4 0.12fF +C1170 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z3 0.06fF +C1171 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 pll_full_1/vco 0.12fF +C1172 divider_0/tspc_1/Q divider_0/tspc_2/Z3 0.45fF +C1173 divider_0/tspc_0/Z4 divider_0/tspc_0/Z2 0.36fF +C1174 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/div 0.65fF +C1175 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Q 0.04fF +C1176 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z4 0.00fF +C1177 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Q 0.21fF +C1178 divider_1/prescaler_0/tspc_1/Z2 divider_1/clk 0.11fF +C1179 ro_complete_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_2/a_580_0# 1.27fF +C1180 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.17fF +C1181 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/UP 0.06fF +C1182 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z4 0.21fF +C1183 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_1650_0# 1.27fF +C1184 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z3 0.45fF +C1185 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Q 0.04fF +C1186 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/A 0.26fF +C1187 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 0.84fF +C1188 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_n10_n140# 0.05fF +C1189 divider_1/and_0/B divider_1/and_0/Z1 0.07fF +C1190 divider_1/nor_1/B divider_1/mc2 0.06fF +C1191 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a3 0.13fF +C1192 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C1193 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF +C1194 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/in 0.04fF +C1195 pd_buffered_0/tapered_buf_3/a_210_n610# pd_buffered_0/pd_0/REF 26.29fF +C1196 pd_buffered_0/tapered_buf_2/a_210_n610# pd_buffered_0/pd_0/DIV 26.29fF +C1197 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C1198 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF +C1199 divider_0/tspc_0/Q divider_0/nor_1/A 0.55fF +C1200 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF +C1201 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF +C1202 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a1 3.18fF +C1203 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/a_630_n680# 0.01fF +C1204 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C1205 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.05fF +C1206 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Q 0.04fF +C1207 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z2 0.36fF +C1208 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C1209 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/nor_0/B 0.35fF +C1210 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/vco 0.60fF +C1211 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF +C1212 divider_0/nor_0/B divider_0/tspc_2/Z4 0.22fF +C1213 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF +C1214 divider_1/prescaler_0/tspc_1/Z4 divider_1/clk 0.12fF +C1215 ro_complete_0/a5 ro_complete_0/cbank_1/switch_0/vin 0.09fF +C1216 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF +C1217 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z4 0.02fF +C1218 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF +C1219 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/Out 0.05fF +C1220 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF +C1221 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF +C1222 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z4 0.22fF +C1223 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF +C1224 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF +C1225 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/DIV 0.51fF +C1226 pd_buffered_0/tapered_buf_1/a_160_230# pd_buffered_0/tapered_buf_1/a_580_0# 0.02fF +C1227 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z2 1.07fF +C1228 pll_full_1/ro_complete_0/a1 pll_full_1/vco 0.11fF +C1229 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Q 0.04fF +C1230 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z4 0.08fF +C1231 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/D 0.03fF +C1232 divider_0/and_0/A divider_0/and_0/B 0.18fF +C1233 cp_buffered_0/tapered_buf_0/a_n10_n140# cp_buffered_0/tapered_buf_0/in 0.04fF +C1234 pll_full_0/pd_0/tspc_r_1/z5 pll_full_0/div 0.04fF +C1235 divider_1/tspc_2/a_630_n680# divider_1/nor_0/B 0.35fF +C1236 divider_1/prescaler_0/tspc_1/Q divider_1/clk 0.60fF +C1237 ro_complete_0/a1 ro_complete_0/cbank_1/v 0.05fF +C1238 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/R 0.30fF +C1239 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z4 0.21fF +C1240 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C1241 pll_full_0/ro_complete_0/a0 pll_full_0/vco 0.11fF +C1242 ro_complete_buffered_0/tapered_buf_5/a_n10_n140# ro_complete_buffered_0/tapered_buf_5/in 0.04fF +C1243 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF +C1244 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/R 0.61fF +C1245 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.13fF +C1246 div_pd_buffered_0/tapered_buf_1/a_n10_230# div_pd_buffered_0/tapered_buf_1/in 0.02fF +C1247 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_580_0# 0.84fF +C1248 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/and_pd_0/Out1 0.05fF +C1249 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/R 0.27fF +C1250 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/tspc_r_1/Qbar 0.01fF +C1251 div_pd_buffered_0/tapered_buf_0/a_210_n610# div_pd_buffered_0/tapered_buf_0/a_4670_0# 29.21fF +C1252 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/B 0.01fF +C1253 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_580_0# 0.35fF +C1254 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_0/Q 0.45fF +C1255 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_0/z1 0.24fF +C1256 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF +C1257 divider_1/tspc_1/Z3 divider_1/tspc_1/a_630_n680# 0.05fF +C1258 divider_1/tspc_0/Z3 divider_1/tspc_0/Z4 0.65fF +C1259 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Q 0.38fF +C1260 ro_complete_0/a2 ro_complete_0/cbank_1/switch_3/vin 0.09fF +C1261 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF +C1262 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.09fF +C1263 ro_complete_buffered_0/tapered_buf_6/a_4670_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 29.21fF +C1264 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_3/vin 0.09fF +C1265 divider_0/tspc_0/Q divider_0/tspc_1/Z3 0.45fF +C1266 ro_complete_buffered_0/tapered_buf_1/a_1650_0# ro_complete_buffered_0/tapered_buf_1/a_4670_0# 4.78fF +C1267 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C1268 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF +C1269 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C1270 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z4 0.12fF +C1271 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/tspc_0/Z3 0.16fF +C1272 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/vco 0.12fF +C1273 io_clamp_low[2] io_clamp_high[2] 0.53fF +C1274 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.26fF +C1275 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF +C1276 io_clamp_high[1] io_analog[5] 0.53fF +C1277 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/R 0.21fF +C1278 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/vco 0.26fF +C1279 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_1650_0# 1.27fF +C1280 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C1281 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF +C1282 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF +C1283 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF +C1284 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z4 0.00fF +C1285 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/DOWN 0.12fF +C1286 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_n10_230# 0.09fF +C1287 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF +C1288 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C1289 divider_1/tspc_0/Q divider_1/tspc_1/Z2 0.14fF +C1290 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z4 0.36fF +C1291 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_160_230# 0.02fF +C1292 divider_1/prescaler_0/tspc_2/Z4 divider_1/clk 0.12fF +C1293 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.84fF +C1294 ro_complete_buffered_0/tapered_buf_3/a_n10_n140# ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.05fF +C1295 ro_complete_0/a3 ro_complete_0/cbank_2/switch_2/vin 0.09fF +C1296 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z3 0.45fF +C1297 pll_full_0/ro_complete_0/a3 pll_full_0/vco 0.11fF +C1298 div_pd_buffered_0/tapered_buf_0/a_160_230# div_pd_buffered_0/tapered_buf_0/a_160_n140# 0.17fF +C1299 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.11fF +C1300 pd_buffered_0/tapered_buf_2/a_1650_0# pd_buffered_0/tapered_buf_2/a_4670_0# 4.78fF +C1301 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_160_230# 0.17fF +C1302 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C1303 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/v 0.05fF +C1304 div_pd_buffered_0/tapered_buf_1/a_160_230# div_pd_buffered_0/tapered_buf_1/a_580_0# 0.02fF +C1305 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF +C1306 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C1307 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C1308 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/vco 0.14fF +C1309 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_1650_0# 1.27fF +C1310 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.21fF +C1311 cp_buffered_0/cp_0/down cp_buffered_0/cp_0/upbar 0.02fF +C1312 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF +C1313 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF +C1314 divider_1/tspc_0/Z2 divider_1/nor_1/A 0.23fF +C1315 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF +C1316 divider_1/mc2 divider_1/and_0/B 0.20fF +C1317 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF +C1318 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF +C1319 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z1 0.09fF +C1320 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.19fF +C1321 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/switch_1/vin 0.19fF +C1322 divider_0/mc2 divider_0/and_0/out1 0.06fF +C1323 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_4670_0# 29.21fF +C1324 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_1/Z2 0.15fF +C1325 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/a_630_n680# 0.01fF +C1326 pd_buffered_0/pd_0/DOWN pd_buffered_0/tapered_buf_1/a_160_n140# 0.19fF +C1327 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/a_630_n680# 0.01fF +C1328 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF +C1329 divider_0/tspc_1/Q divider_0/tspc_2/Z4 0.15fF +C1330 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF +C1331 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF +C1332 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF +C1333 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z2 0.11fF +C1334 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1335 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Z4 0.65fF +C1336 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_4670_0# 4.78fF +C1337 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z4 0.15fF +C1338 div_pd_buffered_0/tapered_buf_2/a_4670_0# div_pd_buffered_0/tapered_buf_2/a_1650_0# 4.78fF +C1339 divider_0/tspc_0/a_630_n680# divider_0/nor_1/A 0.35fF +C1340 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF +C1341 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/nor_1/B 0.30fF +C1342 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.03fF +C1343 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/A 0.16fF +C1344 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF +C1345 cp_buffered_0/tapered_buf_2/a_1650_0# cp_buffered_0/tapered_buf_2/a_580_0# 1.27fF +C1346 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/Z1 0.04fF +C1347 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z2 0.01fF +C1348 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/vco 0.05fF +C1349 divider_0/tspc_2/Z3 divider_0/Out 0.05fF +C1350 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF +C1351 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_0/Qbar 0.02fF +C1352 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/a_630_n680# 0.12fF +C1353 divider_1/tspc_1/Q divider_1/tspc_2/a_630_n680# 0.01fF +C1354 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z3 0.65fF +C1355 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/div 0.05fF +C1356 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF +C1357 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_210_n610# 0.22fF +C1358 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_1650_0# 2.89fF +C1359 ro_complete_buffered_0/tapered_buf_0/in ro_complete_buffered_0/tapered_buf_0/a_n10_230# 0.02fF +C1360 ro_complete_buffered_0/tapered_buf_0/a_160_230# ro_complete_buffered_0/tapered_buf_0/a_160_n140# 0.17fF +C1361 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/tapered_buf_6/in 0.05fF +C1362 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Q 0.55fF +C1363 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF +C1364 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/B 0.18fF +C1365 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_1/Z4 0.02fF +C1366 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/UP 0.03fF +C1367 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF +C1368 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF +C1369 divider_1/tspc_0/Q divider_1/tspc_1/Z4 0.15fF +C1370 ro_complete_buffered_0/tapered_buf_2/a_580_0# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.35fF +C1371 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF +C1372 divider_1/and_0/OUT divider_1/and_0/Z1 0.04fF +C1373 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z2 0.01fF +C1374 divider_1/prescaler_0/tspc_2/Q divider_1/clk 0.05fF +C1375 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/DOWN 0.02fF +C1376 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/R 0.30fF +C1377 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/nor_1/A 0.15fF +C1378 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/and_0/A 0.80fF +C1379 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.19fF +C1380 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/R 0.36fF +C1381 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z4 0.20fF +C1382 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF +C1383 pd_buffered_0/pd_0/tspc_r_1/Z1 pd_buffered_0/pd_0/tspc_r_1/Z2 0.71fF +C1384 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_0/B 0.00fF +C1385 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.05fF +C1386 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/Q 0.04fF +C1387 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a4 0.12fF +C1388 ro_complete_0/a2 ro_complete_0/cbank_0/switch_3/vin 0.09fF +C1389 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C1390 div_pd_buffered_0/tapered_buf_2/a_210_n610# div_pd_buffered_0/tapered_buf_2/a_1650_0# 2.89fF +C1391 div_pd_buffered_0/tapered_buf_2/a_160_230# div_pd_buffered_0/tapered_buf_2/a_160_n140# 0.17fF +C1392 divider_1/nor_1/B divider_1/tspc_0/a_630_n680# 0.01fF +C1393 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z4 0.02fF +C1394 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C1395 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/vco 0.45fF +C1396 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/z5 0.04fF +C1397 divider_1/and_0/out1 divider_1/and_0/B 0.18fF +C1398 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/a_n10_n140# 0.01fF +C1399 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.14fF +C1400 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a4 0.09fF +C1401 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a5 0.09fF +C1402 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/tapered_buf_3/in 0.02fF +C1403 ro_complete_buffered_0/tapered_buf_1/a_580_0# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.35fF +C1404 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z1 0.03fF +C1405 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.01fF +C1406 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C1407 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/A 0.01fF +C1408 div_pd_buffered_0/divider_0/tspc_0/Z3 div_pd_buffered_0/divider_0/tspc_0/Q 0.05fF +C1409 divider_1/mc2 divider_1/nor_1/A 0.04fF +C1410 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/in 0.02fF +C1411 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/UP 0.33fF +C1412 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF +C1413 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF +C1414 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Qbar1 0.20fF +C1415 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF +C1416 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Q 0.05fF +C1417 io_clamp_low[0] io_analog[4] 0.53fF +C1418 ro_complete_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_7/a_4670_0# 4.78fF +C1419 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.17fF +C1420 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/Out 0.05fF +C1421 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z1 0.09fF +C1422 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z2 0.19fF +C1423 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_0/Q 0.01fF +C1424 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF +C1425 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C1426 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Z4 0.65fF +C1427 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.15fF +C1428 pll_full_1/ro_complete_0/a5 pll_full_1/vco 0.15fF +C1429 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z1 0.06fF +C1430 divider_1/prescaler_0/tspc_0/Z2 divider_1/and_0/OUT 0.06fF +C1431 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_160_230# 0.02fF +C1432 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_210_n610# 0.22fF +C1433 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/ref 0.65fF +C1434 ro_complete_0/a5 ro_complete_0/cbank_1/v 0.10fF +C1435 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/a0 0.09fF +C1436 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF +C1437 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.02fF +C1438 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 0.22fF +C1439 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/ro_complete_0/a2 26.29fF +C1440 divider_0/nor_0/Z1 divider_0/and_0/B 0.78fF +C1441 pd_buffered_0/tapered_buf_2/a_580_0# pd_buffered_0/tapered_buf_2/a_210_n610# 0.84fF +C1442 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_n10_n140# 0.05fF +C1443 pll_full_0/pd_0/R pll_full_0/pd_0/DOWN 0.36fF +C1444 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z1 0.71fF +C1445 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z2 1.07fF +C1446 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C1447 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_160_n140# 0.22fF +C1448 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/R 0.03fF +C1449 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/tapered_buf_6/in 0.05fF +C1450 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z3 0.38fF +C1451 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/upbar 0.29fF +C1452 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z2 1.07fF +C1453 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF +C1454 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF +C1455 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_0/Q 0.01fF +C1456 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF +C1457 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z3 0.25fF +C1458 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/R 0.51fF +C1459 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/ro_complete_0/a4 26.29fF +C1460 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF +C1461 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_580_0# 0.35fF +C1462 div_pd_buffered_0/tapered_buf_0/a_580_0# div_pd_buffered_0/tapered_buf_0/a_1650_0# 1.27fF +C1463 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/a_580_0# 0.35fF +C1464 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.01fF +C1465 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.09fF +C1466 pd_buffered_0/pd_0/tspc_r_0/z5 pd_buffered_0/pd_0/UP 0.03fF +C1467 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/and_pd_0/Z1 0.18fF +C1468 divider_1/tspc_0/Z1 divider_1/nor_1/A 0.03fF +C1469 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/nor_0/B 0.22fF +C1470 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.19fF +C1471 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/vco 0.01fF +C1472 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_580_0# 0.35fF +C1473 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.45fF +C1474 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF +C1475 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF +C1476 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a3 0.13fF +C1477 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF +C1478 pll_full_1/pd_0/tspc_r_0/Qbar pll_full_1/pd_0/UP 0.21fF +C1479 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/vco 0.45fF +C1480 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C1481 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/in 0.19fF +C1482 divider_1/nor_1/B divider_1/nor_0/B 0.47fF +C1483 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a3 2.04fF +C1484 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/UP 0.03fF +C1485 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/clk 0.14fF +C1486 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z2 0.23fF +C1487 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C1488 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/vco 1.46fF +C1489 pd_buffered_0/tapered_buf_0/a_210_n610# pd_buffered_0/tapered_buf_0/out 26.29fF +C1490 pd_buffered_0/tapered_buf_1/a_160_n140# pd_buffered_0/tapered_buf_1/a_n10_n140# 0.05fF +C1491 pd_buffered_0/pd_0/and_pd_0/Z1 pd_buffered_0/pd_0/UP 0.06fF +C1492 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/div 0.04fF +C1493 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z2 0.40fF +C1494 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/vco 0.29fF +C1495 pll_full_0/ref pll_full_0/pd_0/R 0.61fF +C1496 divider_1/mc2 divider_1/and_0/OUT 0.05fF +C1497 divider_1/nor_0/Z1 divider_1/nor_0/B 0.06fF +C1498 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C1499 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C1500 divider_1/tspc_1/Q divider_1/nor_0/B 0.22fF +C1501 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_2/Q 0.19fF +C1502 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/clk 0.01fF +C1503 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF +C1504 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/ref 0.19fF +C1505 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF +C1506 pll_full_0/ro_complete_0/a4 pll_full_0/vco 0.01fF +C1507 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.38fF +C1508 div_pd_buffered_0/tapered_buf_2/a_4670_0# div_pd_buffered_0/tapered_buf_2/a_210_n610# 29.21fF +C1509 divider_0/mc2 divider_0/nor_1/A 0.04fF +C1510 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF +C1511 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/nor_1/A 0.03fF +C1512 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C1513 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/a0 3.46fF +C1514 ro_complete_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/a_580_0# 0.84fF +C1515 ro_complete_buffered_0/tapered_buf_0/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/a_160_n140# 0.05fF +C1516 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF +C1517 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Q 0.01fF +C1518 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/and_0/A 0.01fF +C1519 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Q 0.04fF +C1520 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.33fF +C1521 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/vco 1.27fF +C1522 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_2/D 0.16fF +C1523 divider_0/and_0/B divider_0/and_0/Z1 0.07fF +C1524 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/nor_1/A 0.15fF +C1525 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF +C1526 pll_full_0/ref pll_full_0/pd_0/DOWN 1.48fF +C1527 divider_1/tspc_2/a_630_n680# divider_1/Out 0.04fF +C1528 divider_1/nor_0/B divider_1/tspc_2/Z2 0.40fF +C1529 divider_1/prescaler_0/tspc_0/D divider_1/clk 0.29fF +C1530 ro_complete_buffered_0/tapered_buf_3/a_1650_0# ro_complete_buffered_0/tapered_buf_3/a_580_0# 1.27fF +C1531 ro_complete_0/a0 ro_complete_0/cbank_2/switch_4/vin 0.13fF +C1532 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF +C1533 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF +C1534 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C1535 divider_0/tspc_0/Z3 divider_0/tspc_0/Q 0.05fF +C1536 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF +C1537 divider_1/nor_1/B divider_1/tspc_1/Z1 0.03fF +C1538 divider_0/mc2 divider_0/nor_0/B 0.15fF +C1539 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/in 0.04fF +C1540 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/nor_1/A 0.01fF +C1541 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# 0.01fF +C1542 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1543 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C1544 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/tspc_r_1/z5 0.20fF +C1545 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z3 0.05fF +C1546 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z1 0.03fF +C1547 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/nor_0/B 0.47fF +C1548 divider_1/prescaler_0/Out divider_1/tspc_0/Z2 0.11fF +C1549 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/a_630_n680# 0.05fF +C1550 ro_complete_0/a2 ro_complete_0/cbank_2/switch_3/vin 0.09fF +C1551 div_pd_buffered_0/tapered_buf_2/a_160_230# div_pd_buffered_0/tapered_buf_2/a_580_0# 0.02fF +C1552 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z3 0.33fF +C1553 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/tspc_r_0/Qbar 0.02fF +C1554 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z3 0.06fF +C1555 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/vco 0.12fF +C1556 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/UP 0.21fF +C1557 div_pd_buffered_0/pd_0/tspc_r_1/Z4 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF +C1558 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF +C1559 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z2 0.71fF +C1560 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_1/Z4 0.02fF +C1561 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z3 0.06fF +C1562 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/Out 0.05fF +C1563 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z2 0.01fF +C1564 pd_buffered_0/tapered_buf_0/a_160_230# pd_buffered_0/tapered_buf_0/a_160_n140# 0.17fF +C1565 pd_buffered_0/pd_0/and_pd_0/Out1 pd_buffered_0/pd_0/and_pd_0/Z1 0.18fF +C1566 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/out1 0.31fF +C1567 pll_full_1/divider_0/tspc_1/Z4 pll_full_1/divider_0/tspc_0/Q 0.15fF +C1568 cp_buffered_0/cp_0/upbar cp_buffered_0/tapered_buf_0/a_210_n610# 26.29fF +C1569 io_clamp_low[1] io_clamp_high[1] 0.53fF +C1570 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF +C1571 div_pd_buffered_0/tapered_buf_3/a_n10_230# div_pd_buffered_0/pd_0/DOWN 0.02fF +C1572 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/a_630_n680# 0.01fF +C1573 divider_0/tspc_2/a_630_n680# divider_0/nor_0/B 0.35fF +C1574 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF +C1575 pll_full_1/pd_0/DOWN pll_full_1/pd_0/R 0.36fF +C1576 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF +C1577 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C1578 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF +C1579 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/z5 0.20fF +C1580 pll_full_1/ref pll_full_1/pd_0/tspc_r_0/Z1 0.17fF +C1581 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/B 0.35fF +C1582 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/vco 0.60fF +C1583 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C1584 div_pd_buffered_0/pd_0/and_pd_0/Out1 div_pd_buffered_0/pd_0/UP 0.33fF +C1585 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 0.84fF +C1586 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_n10_n140# 0.05fF +C1587 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.19fF +C1588 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z3 0.33fF +C1589 pd_buffered_0/tapered_buf_3/in pd_buffered_0/pd_0/DIV 0.02fF +C1590 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_1/B 0.35fF +C1591 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/vco 0.11fF +C1592 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_0/Q 0.45fF +C1593 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.03fF +C1594 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF +C1595 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/and_0/B 0.29fF +C1596 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_580_0# 0.02fF +C1597 cp_buffered_0/tapered_buf_0/a_1650_0# cp_buffered_0/tapered_buf_0/a_210_n610# 2.89fF +C1598 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/in 0.19fF +C1599 ro_complete_0/a2 ro_complete_0/cbank_2/v 0.05fF +C1600 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF +C1601 pll_full_0/ro_complete_0/a1 pll_full_0/vco 0.11fF +C1602 div_pd_buffered_0/tapered_buf_4/a_1650_0# div_pd_buffered_0/tapered_buf_4/a_4670_0# 4.78fF +C1603 divider_1/and_0/OUT divider_1/and_0/out1 0.31fF +C1604 div_pd_buffered_0/pd_0/tspc_r_0/Z2 div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.14fF +C1605 divider_0/prescaler_0/Out divider_0/tspc_0/a_630_n680# 0.01fF +C1606 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/a_740_n680# 0.08fF +C1607 ro_complete_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 2.89fF +C1608 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/in 0.19fF +C1609 pd_buffered_0/tapered_buf_2/a_n10_230# pd_buffered_0/tapered_buf_2/a_160_230# 0.09fF +C1610 pd_buffered_0/tapered_buf_2/a_4670_0# pd_buffered_0/tapered_buf_2/a_210_n610# 29.21fF +C1611 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF +C1612 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/Z3 0.16fF +C1613 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z2 1.07fF +C1614 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF +C1615 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/nor_1/B 0.06fF +C1616 cp_buffered_0/tapered_buf_2/in cp_buffered_0/tapered_buf_2/a_160_n140# 0.19fF +C1617 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.12fF +C1618 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/and_0/OUT 0.05fF +C1619 div_pd_buffered_0/tapered_buf_0/a_210_n610# div_pd_buffered_0/divider_0/clk 26.29fF +C1620 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF +C1621 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF +C1622 divider_1/tspc_1/Z1 divider_1/tspc_1/Z3 0.06fF +C1623 divider_1/tspc_0/Z3 divider_1/nor_1/A 0.38fF +C1624 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_0/Q 0.45fF +C1625 div_pd_buffered_0/tapered_buf_4/a_1650_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 2.89fF +C1626 divider_1/nor_0/B divider_1/and_0/B 0.29fF +C1627 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF +C1628 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z3 0.27fF +C1629 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/tspc_r_1/Qbar1 0.01fF +C1630 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/R 0.01fF +C1631 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF +C1632 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/tspc_r_1/Qbar 0.21fF +C1633 divider_1/nor_1/B divider_1/nor_0/Z1 0.18fF +C1634 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_1650_0# 1.27fF +C1635 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z4 0.00fF +C1636 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.15fF +C1637 divider_1/nor_1/B divider_1/tspc_1/Q 0.51fF +C1638 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z2 0.19fF +C1639 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.22fF +C1640 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a4 0.12fF +C1641 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF +C1642 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/v 0.05fF +C1643 divider_1/tspc_0/a_630_n680# divider_1/nor_1/A 0.35fF +C1644 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.35fF +C1645 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z2 0.14fF +C1646 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z3 0.05fF +C1647 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.32fF +C1648 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/vco 0.01fF +C1649 divider_0/nor_1/A divider_0/tspc_0/Z1 0.03fF +C1650 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF +C1651 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_1650_0# 1.27fF +C1652 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF +C1653 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF +C1654 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/R 0.29fF +C1655 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/tspc_r_0/Qbar1 0.01fF +C1656 divider_1/prescaler_0/tspc_2/Z2 divider_1/and_0/OUT 0.05fF +C1657 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF +C1658 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF +C1659 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.02fF +C1660 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 0.22fF +C1661 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z3 0.16fF +C1662 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/vco 0.12fF +C1663 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z4 0.00fF +C1664 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/DOWN 0.03fF +C1665 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/in 0.19fF +C1666 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF +C1667 divider_1/nor_1/B divider_1/tspc_2/Z2 0.20fF +C1668 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF +C1669 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C1670 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/and_0/B 0.18fF +C1671 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.00fF +C1672 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF +C1673 pll_full_1/divider_0/nor_0/B pll_full_1/div 0.27fF +C1674 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z3 0.06fF +C1675 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/DOWN 0.03fF +C1676 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C1677 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF +C1678 divider_1/tspc_1/Q divider_1/tspc_2/Z2 0.14fF +C1679 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_0/D 0.32fF +C1680 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/clk 0.01fF +C1681 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z1 0.17fF +C1682 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF +C1683 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C1684 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.12fF +C1685 pd_buffered_0/tapered_buf_1/a_4670_0# pd_buffered_0/tapered_buf_1/a_1650_0# 4.78fF +C1686 pd_buffered_0/pd_0/tspc_r_0/Z4 pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF +C1687 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z1 0.01fF +C1688 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_0/Q 0.22fF +C1689 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_6/in 0.10fF +C1690 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/a0 0.09fF +C1691 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_1/Q 0.51fF +C1692 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z2 0.01fF +C1693 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.08fF +C1694 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.05fF +C1695 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF +C1696 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF +C1697 cp_buffered_0/cp_0/a_10_n50# cp_buffered_0/cp_0/a_1710_0# 0.04fF +C1698 pll_full_0/pd_0/and_pd_0/Z1 pll_full_0/pd_0/UP 0.06fF +C1699 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/DOWN 0.11fF +C1700 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C1701 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C1702 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C1703 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/vco 0.14fF +C1704 divider_1/nor_0/B divider_1/Out 0.22fF +C1705 divider_1/tspc_2/Z1 divider_1/tspc_2/Z3 0.06fF +C1706 divider_0/tspc_0/Z3 divider_0/tspc_0/a_630_n680# 0.05fF +C1707 div_pd_buffered_0/pd_0/tspc_r_0/Z2 div_pd_buffered_0/pd_0/R 0.21fF +C1708 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/nor_1/B 0.30fF +C1709 divider_1/nor_1/B divider_1/tspc_1/Z3 0.38fF +C1710 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z1 0.00fF +C1711 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.11fF +C1712 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/v 0.05fF +C1713 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/UP 0.11fF +C1714 pll_full_0/pd_0/tspc_r_1/z5 pll_full_0/pd_0/DOWN 0.03fF +C1715 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z3 0.38fF +C1716 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z4 0.12fF +C1717 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z2 1.07fF +C1718 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_2/Z2 0.20fF +C1719 divider_0/tspc_1/Q divider_0/tspc_2/a_630_n680# 0.01fF +C1720 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF +C1721 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z2 0.25fF +C1722 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF +C1723 divider_1/tspc_1/Z3 divider_1/tspc_1/Q 0.05fF +C1724 divider_1/tspc_1/Z2 divider_1/tspc_1/Z4 0.36fF +C1725 divider_1/nor_1/A divider_1/tspc_0/Z4 0.21fF +C1726 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z4 0.08fF +C1727 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z3 0.05fF +C1728 ro_complete_0/a2 ro_complete_0/cbank_0/switch_2/vin 0.14fF +C1729 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a4 0.09fF +C1730 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a5 0.09fF +C1731 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z2 0.15fF +C1732 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF +C1733 pll_full_1/pd_0/R pll_full_1/pd_0/UP 0.46fF +C1734 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF +C1735 pll_full_1/pd_0/tspc_r_1/z5 pll_full_1/div 0.04fF +C1736 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/and_pd_0/Z1 0.07fF +C1737 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Z4 0.12fF +C1738 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF +C1739 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/clk 0.64fF +C1740 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z4 0.12fF +C1741 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF +C1742 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF +C1743 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/nor_1/B 1.21fF +C1744 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/nor_0/B 0.06fF +C1745 pd_buffered_0/tapered_buf_0/a_210_n610# pd_buffered_0/tapered_buf_0/a_580_0# 0.84fF +C1746 pd_buffered_0/tapered_buf_0/a_n10_n140# pd_buffered_0/tapered_buf_0/a_160_n140# 0.05fF +C1747 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z3 0.65fF +C1748 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/Z1 0.36fF +C1749 divider_0/nor_1/B divider_0/tspc_1/Z2 0.30fF +C1750 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF +C1751 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF +C1752 divider_0/prescaler_0/tspc_2/Q divider_0/clk 0.05fF +C1753 div_pd_buffered_0/tapered_buf_3/a_n10_n140# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.05fF +C1754 ro_complete_buffered_0/tapered_buf_3/a_n10_n140# ro_complete_buffered_0/tapered_buf_3/in 0.04fF +C1755 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_1/B 0.30fF +C1756 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF +C1757 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF +C1758 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/vco 0.05fF +C1759 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.09fF +C1760 ro_complete_buffered_0/tapered_buf_7/a_4670_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 29.21fF +C1761 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.09fF +C1762 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C1763 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z4 0.02fF +C1764 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Q 0.04fF +C1765 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.01fF +C1766 divider_1/nor_1/B divider_1/and_0/B 0.31fF +C1767 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.64fF +C1768 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/tapered_buf_6/in 1.30fF +C1769 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/and_0/OUT 0.14fF +C1770 pll_full_1/divider_0/prescaler_0/Out pll_full_1/vco 0.51fF +C1771 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF +C1772 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF +C1773 divider_1/tspc_0/Q divider_1/tspc_1/a_630_n680# 0.01fF +C1774 divider_1/prescaler_0/tspc_0/Z3 divider_1/clk 0.64fF +C1775 divider_1/nor_0/Z1 divider_1/and_0/B 0.78fF +C1776 divider_0/and_0/out1 divider_0/and_0/B 0.18fF +C1777 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF +C1778 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z4 0.28fF +C1779 pd_buffered_0/tapered_buf_2/a_n10_230# pd_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF +C1780 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.20fF +C1781 pll_full_0/cp_0/a_1710_0# pll_full_0/pd_0/DOWN 0.04fF +C1782 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/DOWN 0.03fF +C1783 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/clk 0.04fF +C1784 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_580_0# 1.27fF +C1785 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF +C1786 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/tapered_buf_6/in 1.27fF +C1787 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/and_0/B 0.08fF +C1788 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.20fF +C1789 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.09fF +C1790 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/vco 0.12fF +C1791 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Q 0.05fF +C1792 divider_1/prescaler_0/tspc_0/Z2 divider_1/clk 0.11fF +C1793 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/R 0.02fF +C1794 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z1 0.09fF +C1795 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF +C1796 ro_complete_0/a0 ro_complete_0/cbank_2/switch_5/vin 0.09fF +C1797 pll_full_1/pd_0/R pll_full_1/ref 0.61fF +C1798 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_0/B 0.00fF +C1799 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF +C1800 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF +C1801 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.11fF +C1802 divider_0/mc2 divider_0/and_0/B 0.20fF +C1803 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF +C1804 ro_complete_buffered_0/tapered_buf_6/a_n10_n140# ro_complete_buffered_0/tapered_buf_6/in 0.04fF +C1805 pd_buffered_0/tapered_buf_3/a_1650_0# pd_buffered_0/tapered_buf_3/a_4670_0# 4.78fF +C1806 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_160_230# 0.17fF +C1807 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z2 1.07fF +C1808 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/Z4 0.65fF +C1809 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF +C1810 divider_0/nor_1/Z1 divider_0/and_0/A 0.80fF +C1811 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/B 0.31fF +C1812 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.22fF +C1813 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.04fF +C1814 cp_buffered_0/tapered_buf_1/a_1650_0# cp_buffered_0/tapered_buf_1/a_4670_0# 4.78fF +C1815 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_160_230# 0.17fF +C1816 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/tspc_r_0/Qbar 0.05fF +C1817 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF +C1818 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF +C1819 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF +C1820 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF +C1821 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Q 0.20fF +C1822 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/D 0.09fF +C1823 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/Qbar 0.01fF +C1824 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z1 0.03fF +C1825 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF +C1826 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C1827 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 2.89fF +C1828 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/in 0.19fF +C1829 divider_0/mc2 divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF +C1830 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF +C1831 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C1832 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/a3 0.09fF +C1833 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/UP 0.45fF +C1834 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/a_630_n680# 0.12fF +C1835 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF +C1836 div_pd_buffered_0/tapered_buf_1/a_n10_n140# div_pd_buffered_0/tapered_buf_1/in 0.04fF +C1837 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.15fF +C1838 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/pd_0/UP 0.19fF +C1839 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF +C1840 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF +C1841 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z4 0.00fF +C1842 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF +C1843 ro_complete_buffered_0/tapered_buf_3/a_160_230# ro_complete_buffered_0/tapered_buf_3/a_n10_230# 0.09fF +C1844 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_4670_0# 29.21fF +C1845 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/nand_1/z1 0.22fF +C1846 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/tspc_0/D 0.04fF +C1847 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF +C1848 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF +C1849 pll_full_0/ro_complete_0/a5 pll_full_0/vco 0.15fF +C1850 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/tapered_buf_0/a_160_230# 0.09fF +C1851 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.25fF +C1852 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C1853 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/nor_1/A 0.15fF +C1854 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C1855 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/R 0.61fF +C1856 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.12fF +C1857 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C1858 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/vco 0.01fF +C1859 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z3 0.45fF +C1860 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/and_0/A 0.26fF +C1861 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z1 0.08fF +C1862 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF +C1863 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF +C1864 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C1865 div_pd_buffered_0/tapered_buf_3/a_160_n140# div_pd_buffered_0/tapered_buf_3/a_210_n610# 0.22fF +C1866 divider_1/tspc_2/Z1 divider_1/tspc_2/Z4 0.00fF +C1867 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/tspc_r_0/Z1 0.71fF +C1868 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z3 0.38fF +C1869 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/Z2 0.14fF +C1870 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z3 0.65fF +C1871 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/a_740_n680# 0.08fF +C1872 divider_1/nor_1/B divider_1/nor_1/A 1.21fF +C1873 ro_complete_buffered_0/tapered_buf_1/in gnd 0.04fF +C1874 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF +C1875 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.28fF +C1876 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/tapered_buf_1/a_1650_0# 2.89fF +C1877 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/tspc_2/Z3 0.05fF +C1878 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.13fF +C1879 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C1880 pll_full_1/ro_complete_0/cbank_2/v pll_full_1/vco 1.36fF +C1881 div_pd_buffered_0/divider_0/tspc_2/Z2 div_pd_buffered_0/divider_0/tspc_2/Z3 0.16fF +C1882 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z4 0.22fF +C1883 divider_1/prescaler_0/Out divider_1/tspc_0/Z3 0.45fF +C1884 divider_0/tspc_1/Q divider_0/nor_0/B 0.22fF +C1885 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/Q 0.19fF +C1886 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF +C1887 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.01fF +C1888 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF +C1889 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z4 0.12fF +C1890 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z2 1.07fF +C1891 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF +C1892 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_0/B 0.22fF +C1893 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF +C1894 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/vco 0.01fF +C1895 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/and_pd_0/Out1 0.33fF +C1896 divider_1/nor_1/B divider_1/nor_1/Z1 0.06fF +C1897 ro_complete_buffered_0/tapered_buf_6/a_210_n610# ro_complete_buffered_0/tapered_buf_6/out 26.29fF +C1898 divider_1/tspc_0/a_630_n680# divider_1/prescaler_0/Out 0.01fF +C1899 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1900 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF +C1901 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.22fF +C1902 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/a_630_n680# 0.35fF +C1903 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.91fF +C1904 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1905 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF +C1906 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/out1 0.06fF +C1907 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Z4 0.21fF +C1908 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z3 0.45fF +C1909 pd_buffered_0/tapered_buf_0/a_210_n610# pd_buffered_0/tapered_buf_0/a_4670_0# 29.21fF +C1910 div_pd_buffered_0/divider_0/and_0/A div_pd_buffered_0/divider_0/and_0/B 0.18fF +C1911 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_1/Q 0.13fF +C1912 divider_0/tspc_2/a_630_n680# divider_0/Out 0.04fF +C1913 divider_0/nor_0/B divider_0/tspc_2/Z2 0.40fF +C1914 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.29fF +C1915 io_clamp_low[0] io_clamp_high[0] 0.53fF +C1916 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C1917 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_0/vin 0.19fF +C1918 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z2 0.23fF +C1919 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C1920 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/vco 1.46fF +C1921 div_pd_buffered_0/tapered_buf_2/a_210_n610# div_pd_buffered_0/pd_0/REF 26.29fF +C1922 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/div 0.04fF +C1923 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z2 0.40fF +C1924 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/vco 0.29fF +C1925 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/a_n10_n140# 0.01fF +C1926 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.13fF +C1927 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1928 pd_buffered_0/tapered_buf_1/a_160_230# pd_buffered_0/tapered_buf_1/a_n10_230# 0.09fF +C1929 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_4670_0# 29.21fF +C1930 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/z5 0.11fF +C1931 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF +C1932 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/a_630_n680# 0.01fF +C1933 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF +C1934 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_2/D 0.16fF +C1935 pll_full_1/ro_complete_0/cbank_1/switch_2/vin pll_full_1/vco 1.46fF +C1936 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.24fF +C1937 divider_0/tspc_1/Z3 divider_0/tspc_1/Q 0.05fF +C1938 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF +C1939 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.15fF +C1940 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF +C1941 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF +C1942 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/in 0.02fF +C1943 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF +C1944 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF +C1945 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/UP 0.03fF +C1946 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.04fF +C1947 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF +C1948 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/vco 1.27fF Xpd_buffered_0/tapered_buf_2 pd_buffered_0/pd_0/DIV pd_buffered_0/tapered_buf_2/in + vdda1 vssa1 tapered_buf Xpd_buffered_0/tapered_buf_3 pd_buffered_0/pd_0/REF pd_buffered_0/tapered_buf_3/in