netgen/user_analog_project_wrapper.spice

* SPICE3 file created from user_analog_project_wrapper.ext - technology: sky130A

.subckt user_analog_project_wrapper gpio_analog[0] gpio_analog[10] gpio_analog[11]
+ gpio_analog[12] gpio_analog[13] gpio_analog[14] gpio_analog[15] gpio_analog[16]
+ gpio_analog[17] gpio_analog[1] gpio_analog[2] gpio_analog[3] gpio_analog[4] gpio_analog[5]
+ gpio_analog[6] gpio_analog[7] gpio_analog[8] gpio_analog[9] gpio_noesd[0] gpio_noesd[10]
+ gpio_noesd[11] gpio_noesd[12] gpio_noesd[13] gpio_noesd[14] gpio_noesd[15] gpio_noesd[16]
+ gpio_noesd[17] gpio_noesd[1] gpio_noesd[2] gpio_noesd[3] gpio_noesd[4] gpio_noesd[5]
+ gpio_noesd[6] gpio_noesd[7] gpio_noesd[8] gpio_noesd[9] io_analog[0] io_analog[10]
+ io_analog[1] io_analog[2] io_analog[3] io_analog[4] io_analog[5] io_analog[6] io_analog[7]
+ io_analog[8] io_analog[9] io_clamp_high[0] io_clamp_high[1] io_clamp_high[2] io_clamp_low[0]
+ io_clamp_low[1] io_clamp_low[2] io_in[0] io_in[10] io_in[11] io_in[12] io_in[13]
+ io_in[14] io_in[15] io_in[16] io_in[17] io_in[18] io_in[19] io_in[1] io_in[20] io_in[21]
+ io_in[22] io_in[23] io_in[24] io_in[25] io_in[26] io_in[2] io_in[3] io_in[4] io_in[5]
+ io_in[6] io_in[7] io_in[8] io_in[9] io_in_3v3[0] io_in_3v3[10] io_in_3v3[11] io_in_3v3[12]
+ io_in_3v3[13] io_in_3v3[14] io_in_3v3[15] io_in_3v3[16] io_in_3v3[17] io_in_3v3[18]
+ io_in_3v3[19] io_in_3v3[1] io_in_3v3[20] io_in_3v3[21] io_in_3v3[22] io_in_3v3[23]
+ io_in_3v3[24] io_in_3v3[25] io_in_3v3[26] io_in_3v3[2] io_in_3v3[3] io_in_3v3[4]
+ io_in_3v3[5] io_in_3v3[6] io_in_3v3[7] io_in_3v3[8] io_in_3v3[9] io_oeb[0] io_oeb[10]
+ io_oeb[11] io_oeb[12] io_oeb[13] io_oeb[14] io_oeb[15] io_oeb[16] io_oeb[17] io_oeb[18]
+ io_oeb[19] io_oeb[1] io_oeb[20] io_oeb[21] io_oeb[22] io_oeb[23] io_oeb[24] io_oeb[25]
+ io_oeb[26] io_oeb[2] io_oeb[3] io_oeb[4] io_oeb[5] io_oeb[6] io_oeb[7] io_oeb[8]
+ io_oeb[9] io_out[0] io_out[10] io_out[11] io_out[12] io_out[13] io_out[14] io_out[15]
+ io_out[16] io_out[17] io_out[18] io_out[19] io_out[1] io_out[20] io_out[21] io_out[22]
+ io_out[23] io_out[24] io_out[25] io_out[26] io_out[2] io_out[3] io_out[4] io_out[5]
+ io_out[6] io_out[7] io_out[8] io_out[9] la_data_in[0] la_data_in[100] la_data_in[101]
+ la_data_in[102] la_data_in[103] la_data_in[104] la_data_in[105] la_data_in[106]
+ la_data_in[107] la_data_in[108] la_data_in[109] la_data_in[10] la_data_in[110] la_data_in[111]
+ la_data_in[112] la_data_in[113] la_data_in[114] la_data_in[115] la_data_in[116]
+ la_data_in[117] la_data_in[118] la_data_in[119] la_data_in[11] la_data_in[120] la_data_in[121]
+ la_data_in[122] la_data_in[123] la_data_in[124] la_data_in[125] la_data_in[126]
+ la_data_in[127] la_data_in[12] la_data_in[13] la_data_in[14] la_data_in[15] la_data_in[16]
+ la_data_in[17] la_data_in[18] la_data_in[19] la_data_in[1] la_data_in[20] la_data_in[21]
+ la_data_in[22] la_data_in[23] la_data_in[24] la_data_in[25] la_data_in[26] la_data_in[27]
+ la_data_in[28] la_data_in[29] la_data_in[2] la_data_in[30] la_data_in[31] la_data_in[32]
+ la_data_in[33] la_data_in[34] la_data_in[35] la_data_in[36] la_data_in[37] la_data_in[38]
+ la_data_in[39] la_data_in[3] la_data_in[40] la_data_in[41] la_data_in[42] la_data_in[43]
+ la_data_in[44] la_data_in[45] la_data_in[46] la_data_in[47] la_data_in[48] la_data_in[49]
+ la_data_in[4] la_data_in[50] la_data_in[51] la_data_in[52] la_data_in[53] la_data_in[54]
+ la_data_in[55] la_data_in[56] la_data_in[57] la_data_in[58] la_data_in[59] la_data_in[5]
+ la_data_in[60] la_data_in[61] la_data_in[62] la_data_in[63] la_data_in[64] la_data_in[65]
+ la_data_in[66] la_data_in[67] la_data_in[68] la_data_in[69] la_data_in[6] la_data_in[70]
+ la_data_in[71] la_data_in[72] la_data_in[73] la_data_in[74] la_data_in[75] la_data_in[76]
+ la_data_in[77] la_data_in[78] la_data_in[79] la_data_in[7] la_data_in[80] la_data_in[81]
+ la_data_in[82] la_data_in[83] la_data_in[84] la_data_in[85] la_data_in[86] la_data_in[87]
+ la_data_in[88] la_data_in[89] la_data_in[8] la_data_in[90] la_data_in[91] la_data_in[92]
+ la_data_in[93] la_data_in[94] la_data_in[95] la_data_in[96] la_data_in[97] la_data_in[98]
+ la_data_in[99] la_data_in[9] la_data_out[0] la_data_out[100] la_data_out[101] la_data_out[102]
+ la_data_out[103] la_data_out[104] la_data_out[105] la_data_out[106] la_data_out[107]
+ la_data_out[108] la_data_out[109] la_data_out[10] la_data_out[110] la_data_out[111]
+ la_data_out[112] la_data_out[113] la_data_out[114] la_data_out[115] la_data_out[116]
+ la_data_out[117] la_data_out[118] la_data_out[119] la_data_out[11] la_data_out[120]
+ la_data_out[121] la_data_out[122] la_data_out[123] la_data_out[124] la_data_out[125]
+ la_data_out[126] la_data_out[127] la_data_out[12] la_data_out[13] la_data_out[14]
+ la_data_out[15] la_data_out[16] la_data_out[17] la_data_out[18] la_data_out[19]
+ la_data_out[1] la_data_out[20] la_data_out[21] la_data_out[22] la_data_out[23] la_data_out[24]
+ la_data_out[25] la_data_out[26] la_data_out[27] la_data_out[28] la_data_out[29]
+ la_data_out[2] la_data_out[30] la_data_out[31] la_data_out[32] la_data_out[33] la_data_out[34]
+ la_data_out[35] la_data_out[36] la_data_out[37] la_data_out[38] la_data_out[39]
+ la_data_out[3] la_data_out[40] la_data_out[41] la_data_out[42] la_data_out[43] la_data_out[44]
+ la_data_out[45] la_data_out[46] la_data_out[47] la_data_out[48] la_data_out[49]
+ la_data_out[4] la_data_out[50] la_data_out[51] la_data_out[52] la_data_out[53] la_data_out[54]
+ la_data_out[55] la_data_out[56] la_data_out[57] la_data_out[58] la_data_out[59]
+ la_data_out[5] la_data_out[60] la_data_out[61] la_data_out[62] la_data_out[63] la_data_out[64]
+ la_data_out[65] la_data_out[66] la_data_out[67] la_data_out[68] la_data_out[69]
+ la_data_out[6] la_data_out[70] la_data_out[71] la_data_out[72] la_data_out[73] la_data_out[74]
+ la_data_out[75] la_data_out[76] la_data_out[77] la_data_out[78] la_data_out[79]
+ la_data_out[7] la_data_out[80] la_data_out[81] la_data_out[82] la_data_out[83] la_data_out[84]
+ la_data_out[85] la_data_out[86] la_data_out[87] la_data_out[88] la_data_out[89]
+ la_data_out[8] la_data_out[90] la_data_out[91] la_data_out[92] la_data_out[93] la_data_out[94]
+ la_data_out[95] la_data_out[96] la_data_out[97] la_data_out[98] la_data_out[99]
+ la_data_out[9] la_oenb[0] la_oenb[100] la_oenb[101] la_oenb[102] la_oenb[103] la_oenb[104]
+ la_oenb[105] la_oenb[106] la_oenb[107] la_oenb[108] la_oenb[109] la_oenb[10] la_oenb[110]
+ la_oenb[111] la_oenb[112] la_oenb[113] la_oenb[114] la_oenb[115] la_oenb[116] la_oenb[117]
+ la_oenb[118] la_oenb[119] la_oenb[11] la_oenb[120] la_oenb[121] la_oenb[122] la_oenb[123]
+ la_oenb[124] la_oenb[125] la_oenb[126] la_oenb[127] la_oenb[12] la_oenb[13] la_oenb[14]
+ la_oenb[15] la_oenb[16] la_oenb[17] la_oenb[18] la_oenb[19] la_oenb[1] la_oenb[20]
+ la_oenb[21] la_oenb[22] la_oenb[23] la_oenb[24] la_oenb[25] la_oenb[26] la_oenb[27]
+ la_oenb[28] la_oenb[29] la_oenb[2] la_oenb[30] la_oenb[31] la_oenb[32] la_oenb[33]
+ la_oenb[34] la_oenb[35] la_oenb[36] la_oenb[37] la_oenb[38] la_oenb[39] la_oenb[3]
+ la_oenb[40] la_oenb[41] la_oenb[42] la_oenb[43] la_oenb[44] la_oenb[45] la_oenb[46]
+ la_oenb[47] la_oenb[48] la_oenb[49] la_oenb[4] la_oenb[50] la_oenb[51] la_oenb[52]
+ la_oenb[53] la_oenb[54] la_oenb[55] la_oenb[56] la_oenb[57] la_oenb[58] la_oenb[59]
+ la_oenb[5] la_oenb[60] la_oenb[61] la_oenb[62] la_oenb[63] la_oenb[64] la_oenb[65]
+ la_oenb[66] la_oenb[67] la_oenb[68] la_oenb[69] la_oenb[6] la_oenb[70] la_oenb[71]
+ la_oenb[72] la_oenb[73] la_oenb[74] la_oenb[75] la_oenb[76] la_oenb[77] la_oenb[78]
+ la_oenb[79] la_oenb[7] la_oenb[80] la_oenb[81] la_oenb[82] la_oenb[83] la_oenb[84]
+ la_oenb[85] la_oenb[86] la_oenb[87] la_oenb[88] la_oenb[89] la_oenb[8] la_oenb[90]
+ la_oenb[91] la_oenb[92] la_oenb[93] la_oenb[94] la_oenb[95] la_oenb[96] la_oenb[97]
+ la_oenb[98] la_oenb[99] la_oenb[9] user_clock2 user_irq[0] user_irq[1] user_irq[2]
+ vccd1 vccd2 vdda1 vdda2 vssa1 vssa2 vssd1 vssd2 wb_clk_i wb_rst_i wbs_ack_o wbs_adr_i[0]
+ wbs_adr_i[10] wbs_adr_i[11] wbs_adr_i[12] wbs_adr_i[13] wbs_adr_i[14] wbs_adr_i[15]
+ wbs_adr_i[16] wbs_adr_i[17] wbs_adr_i[18] wbs_adr_i[19] wbs_adr_i[1] wbs_adr_i[20]
+ wbs_adr_i[21] wbs_adr_i[22] wbs_adr_i[23] wbs_adr_i[24] wbs_adr_i[25] wbs_adr_i[26]
+ wbs_adr_i[27] wbs_adr_i[28] wbs_adr_i[29] wbs_adr_i[2] wbs_adr_i[30] wbs_adr_i[31]
+ wbs_adr_i[3] wbs_adr_i[4] wbs_adr_i[5] wbs_adr_i[6] wbs_adr_i[7] wbs_adr_i[8] wbs_adr_i[9]
+ wbs_cyc_i wbs_dat_i[0] wbs_dat_i[10] wbs_dat_i[11] wbs_dat_i[12] wbs_dat_i[13] wbs_dat_i[14]
+ wbs_dat_i[15] wbs_dat_i[16] wbs_dat_i[17] wbs_dat_i[18] wbs_dat_i[19] wbs_dat_i[1]
+ wbs_dat_i[20] wbs_dat_i[21] wbs_dat_i[22] wbs_dat_i[23] wbs_dat_i[24] wbs_dat_i[25]
+ wbs_dat_i[26] wbs_dat_i[27] wbs_dat_i[28] wbs_dat_i[29] wbs_dat_i[2] wbs_dat_i[30]
+ wbs_dat_i[31] wbs_dat_i[3] wbs_dat_i[4] wbs_dat_i[5] wbs_dat_i[6] wbs_dat_i[7] wbs_dat_i[8]
+ wbs_dat_i[9] wbs_dat_o[0] wbs_dat_o[10] wbs_dat_o[11] wbs_dat_o[12] wbs_dat_o[13]
+ wbs_dat_o[14] wbs_dat_o[15] wbs_dat_o[16] wbs_dat_o[17] wbs_dat_o[18] wbs_dat_o[19]
+ wbs_dat_o[1] wbs_dat_o[20] wbs_dat_o[21] wbs_dat_o[22] wbs_dat_o[23] wbs_dat_o[24]
+ wbs_dat_o[25] wbs_dat_o[26] wbs_dat_o[27] wbs_dat_o[28] wbs_dat_o[29] wbs_dat_o[2]
+ wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6]
+ wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3]
+ wbs_stb_i wbs_we_i
C0 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
C1 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF
C2 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF
C3 divbuf_1/a_492_n240# divbuf_1/IN 0.13fF
C4 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
C5 divbuf_6/OUT2 divbuf_6/OUT5 0.02fF
C6 divbuf_6/OUT3 divbuf_6/OUT4 5.16fF
C7 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/tspc_0/Z1 0.06fF
C8 ro_div_new_0/divider_0/tspc_1/Z3 ro_div_new_0/divider_0/tspc_1/Z4 0.65fF
C9 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 ro_div_new_0/divider_0/clk 0.12fF
C10 divbuf_3/OUT divbuf_3/OUT3 0.26fF
C11 ro_complete_0/a4 ro_complete_0/cbank_2/v 0.05fF
C12 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF
C13 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.05fF
C14 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/Z2 0.14fF
C15 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.04fF
C16 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/prescaler_0/nand_1/z1 0.22fF
C17 divbuf_2/OUT4 divbuf_2/OUT5 20.26fF
C18 divbuf_4/OUT2 divbuf_4/OUT 0.06fF
C19 divbuf_4/OUT3 divbuf_4/OUT5 0.01fF
C20 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
C21 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF
C22 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF
C23 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/Out 0.22fF
C24 ro_div_new_0/divider_0/tspc_2/Z1 ro_div_new_0/divider_0/tspc_2/Z3 0.06fF
C25 ro_div_new_0/divider_0/tspc_1/Z2 ro_div_new_0/divider_0/tspc_1/Z4 0.36fF
C26 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF
C27 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF
C28 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a2 0.09fF
C29 ro_div_new_0/divider_0/and_0/out1 ro_div_new_0/divider_0/and_0/Z1 0.36fF
C30 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
C31 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/switch_1/vin 0.19fF
C32 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a2 0.14fF
C33 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_2/Z4 0.02fF
C34 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_new_0/divider_0/prescaler_0/Out 0.11fF
C35 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/clk 0.11fF
C36 divbuf_2/a_492_n240# divbuf_2/OUT 0.00fF
C37 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin ro_div_new_0/divider_0/clk 1.30fF
C38 divbuf_0/OUT divbuf_0/OUT4 1.11fF
C39 divbuf_5/a_492_n240# divbuf_5/OUT5 0.01fF
C40 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/tspc_0/Z4 0.65fF
C41 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF
C42 ro_complete_0/a2 ro_complete_0/cbank_2/v 0.05fF
C43 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.16fF
C44 ro_div_new_0/divider_0/prescaler_0/Out ro_div_new_0/divider_0/clk 0.51fF
C45 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF
C46 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/and_0/OUT 0.05fF
C47 divbuf_6/OUT3 divbuf_6/OUT 0.26fF
C48 divbuf_6/OUT4 divbuf_6/OUT5 20.26fF
C49 ro_div_new_0/divider_0/nor_0/Z1 ro_div_new_0/divider_0/and_0/B 0.78fF
C50 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q ro_div_new_0/divider_0/prescaler_0/nand_1/z1 0.01fF
C51 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/clk 0.11fF
C52 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/prescaler_0/Out 0.05fF
C53 divbuf_2/OUT2 divbuf_2/OUT 0.06fF
C54 divbuf_4/OUT4 divbuf_4/OUT 1.11fF
C55 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF
C56 divbuf_1/OUT4 divbuf_1/OUT3 5.16fF
C57 ro_complete_0/a1 ro_complete_0/cbank_1/v 0.05fF
C58 ro_div_new_0/divider_0/tspc_2/Z1 ro_div_new_0/divider_0/tspc_2/Z4 0.00fF
C59 io_clamp_low[2] io_clamp_high[2] 0.53fF
C60 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
C61 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF
C62 io_clamp_high[1] io_analog[5] 0.53fF
C63 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin ro_div_new_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF
C64 divbuf_7/a_492_n240# divbuf_7/OUT 0.00fF
C65 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/and_0/OUT 0.05fF
C66 divbuf_0/OUT divbuf_0/a_492_n240# 0.00fF
C67 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 ro_div_new_0/divider_0/prescaler_0/Out 0.28fF
C68 ro_complete_0/a3 ro_complete_0/cbank_1/v 0.05fF
C69 ro_div_new_0/ro_complete_0/cbank_0/v ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin 1.30fF
C70 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF
C71 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF
C72 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/and_0/B 0.01fF
C73 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/prescaler_0/Out 0.91fF
C74 divbuf_5/OUT2 divbuf_5/OUT3 1.37fF
C75 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF
C76 ro_complete_0/a4 ro_complete_0/cbank_2/switch_1/vin 0.09fF
C77 ro_complete_0/a0 ro_complete_0/cbank_2/switch_5/vin 0.09fF
C78 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/nand_0/z1 0.07fF
C79 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
C80 ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF
C81 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
C82 divbuf_6/OUT5 divbuf_6/OUT 43.38fF
C83 divbuf_1/OUT5 divbuf_1/OUT2 0.02fF
C84 divbuf_0/OUT2 divbuf_0/OUT3 1.37fF
C85 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a3 0.13fF
C86 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/prescaler_0/Out 0.15fF
C87 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
C88 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/clk 0.01fF
C89 divbuf_2/a_492_n240# divbuf_2/OUT2 0.42fF
C90 ro_complete_0/a5 ro_complete_0/cbank_0/switch_0/vin 0.09fF
C91 ro_div_new_0/ro_complete_0/cbank_1/switch_4/vin ro_div_new_0/divider_0/clk 1.30fF
C92 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/divider_0/clk 0.05fF
C93 ro_div_new_0/divider_0/prescaler_0/tspc_2/D ro_div_new_0/divider_0/prescaler_0/nand_1/z1 0.21fF
C94 divbuf_2/OUT3 divbuf_2/OUT 0.26fF
C95 ro_complete_0/a5 ro_complete_0/cbank_1/v 0.10fF
C96 ro_div_new_0/divider_0/tspc_2/Z3 ro_div_new_0/divider_0/tspc_2/Z4 0.65fF
C97 divbuf_6/a_492_n240# divbuf_6/OUT2 0.42fF
C98 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF
C99 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/nor_0/B 0.00fF
C100 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF
C101 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF
C102 io_clamp_low[0] io_analog[4] 0.53fF
C103 divbuf_7/IN divbuf_7/OUT5 0.00fF
C104 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.09fF
C105 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
C106 divbuf_1/OUT4 divbuf_1/OUT 1.11fF
C107 divbuf_4/a_492_n240# divbuf_4/OUT2 0.42fF
C108 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_0/Z2 0.23fF
C109 ro_div_new_0/divider_0/tspc_0/Z4 ro_div_new_0/divider_0/tspc_0/Z1 0.00fF
C110 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF
C111 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF
C112 divbuf_3/a_492_n240# divbuf_3/OUT2 0.42fF
C113 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/nor_1/A 0.35fF
C114 ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.44fF
C115 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF
C116 divbuf_5/OUT2 divbuf_5/OUT5 0.02fF
C117 divbuf_5/OUT3 divbuf_5/OUT4 5.16fF
C118 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF
C119 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.45fF
C120 ro_complete_0/a0 ro_complete_0/cbank_2/v 0.05fF
C121 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.38fF
C122 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.33fF
C123 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF
C124 ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin ro_div_new_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF
C125 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/clk 0.01fF
C126 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/a0 0.09fF
C127 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/nor_1/A 0.01fF
C128 divbuf_2/OUT5 divbuf_2/OUT 43.38fF
C129 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/tspc_1/Q 0.04fF
C130 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_0/Q 0.55fF
C131 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF
C132 ro_div_new_0/ro_complete_0/a5 ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF
C133 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin ro_div_new_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF
C134 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF
C135 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF
C136 io_clamp_low[1] io_clamp_high[1] 0.53fF
C137 divbuf_3/OUT divbuf_3/a_492_n240# 0.00fF
C138 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF
C139 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF
C140 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF
C141 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF
C142 divbuf_7/OUT2 divbuf_7/OUT 0.06fF
C143 divbuf_7/OUT3 divbuf_7/OUT5 0.01fF
C144 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/Out 0.21fF
C145 divbuf_2/OUT2 divbuf_2/OUT3 1.37fF
C146 ro_complete_0/a0 ro_complete_0/cbank_2/switch_4/vin 0.13fF
C147 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF
C148 ro_complete_0/a4 ro_complete_0/cbank_2/switch_0/vin 0.12fF
C149 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/clk 0.11fF
C150 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF
C151 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF
C152 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/nor_1/B 1.21fF
C153 ro_div_new_0/ro_complete_0/cbank_2/switch_5/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF
C154 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF
C155 divbuf_5/OUT3 divbuf_5/OUT 0.26fF
C156 divbuf_5/OUT4 divbuf_5/OUT5 20.26fF
C157 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/nor_1/A 0.38fF
C158 divbuf_0/a_492_n240# divbuf_0/IN 0.13fF
C159 ro_div_new_0/divider_0/tspc_1/Z1 ro_div_new_0/divider_0/tspc_0/Q 0.01fF
C160 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.04fF
C161 divbuf_0/OUT divbuf_0/OUT3 0.26fF
C162 ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF
C163 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF
C164 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF
C165 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/nor_0/B 0.47fF
C166 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.03fF
C167 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.09fF
C168 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_new_0/divider_0/prescaler_0/Out 0.08fF
C169 divbuf_2/a_492_n240# divbuf_2/OUT5 0.01fF
C170 ro_complete_0/a3 ro_complete_0/cbank_2/switch_2/vin 0.09fF
C171 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/and_0/out1 0.06fF
C172 ro_div_new_0/divider_0/nor_1/Z1 ro_div_new_0/divider_0/nor_1/B 0.06fF
C173 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/nor_1/A 0.04fF
C174 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Z1 0.03fF
C175 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF
C176 divbuf_6/a_492_n240# divbuf_6/OUT 0.00fF
C177 divbuf_3/OUT5 divbuf_3/IN 0.00fF
C178 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
C179 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
C180 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/nor_0/B 0.15fF
C181 divbuf_7/OUT4 divbuf_7/OUT 1.11fF
C182 ro_complete_0/a1 ro_complete_0/cbank_2/switch_3/vin 0.14fF
C183 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/prescaler_0/Out 0.04fF
C184 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/and_0/A 0.26fF
C185 divbuf_2/OUT2 divbuf_2/OUT5 0.02fF
C186 ro_div_new_0/ro_complete_0/cbank_1/switch_4/vin ro_div_new_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF
C187 divbuf_4/OUT2 divbuf_4/OUT3 1.37fF
C188 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF
C189 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/divider_0/clk 0.05fF
C190 divbuf_4/a_492_n240# divbuf_4/OUT 0.00fF
C191 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_1/Z2 0.15fF
C192 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/tspc_2/Z3 0.05fF
C193 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/tspc_2/Z1 0.03fF
C194 ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF
C195 divbuf_5/OUT5 divbuf_5/OUT 43.38fF
C196 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF
C197 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF
C198 divbuf_1/OUT5 divbuf_1/OUT3 0.01fF
C199 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Q 0.51fF
C200 ro_div_new_0/divider_0/tspc_1/Z1 ro_div_new_0/divider_0/tspc_1/Z3 0.06fF
C201 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF
C202 ro_div_new_0/divider_0/and_0/out1 ro_div_new_0/divider_0/and_0/B 0.18fF
C203 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_new_0/divider_0/clk 0.01fF
C204 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin ro_div_new_0/ro_complete_0/a3 0.13fF
C205 divbuf_7/a_492_n240# divbuf_7/IN 0.13fF
C206 ro_complete_0/a1 ro_complete_0/cbank_2/v 0.05fF
C207 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a3 0.09fF
C208 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_2/Z2 0.20fF
C209 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/and_0/B 0.08fF
C210 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/prescaler_0/nand_0/z1 0.01fF
C211 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF
C212 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/and_0/A 0.16fF
C213 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/divider_0/clk 0.05fF
C214 divbuf_3/OUT4 divbuf_3/OUT 1.11fF
C215 divbuf_0/OUT4 divbuf_0/OUT3 5.16fF
C216 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/clk 0.04fF
C217 divbuf_5/a_492_n240# divbuf_5/OUT2 0.42fF
C218 divbuf_1/a_492_n240# divbuf_1/OUT5 0.01fF
C219 divbuf_0/OUT5 divbuf_0/OUT2 0.02fF
C220 ro_div_new_0/ro_complete_0/a5 ro_div_new_0/ro_complete_0/cbank_2/v 0.08fF
C221 ro_complete_0/a3 ro_complete_0/cbank_2/v 0.05fF
C222 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_1/Z4 0.02fF
C223 ro_div_new_0/divider_0/tspc_1/Z1 ro_div_new_0/divider_0/tspc_1/Z2 1.07fF
C224 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/and_0/B 0.29fF
C225 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF
C226 divbuf_6/IN divbuf_6/OUT5 0.00fF
C227 io_clamp_low[0] io_clamp_high[0] 0.53fF
C228 ro_div_new_0/divider_0/nor_1/Z1 ro_div_new_0/divider_0/and_0/B 0.18fF
C229 ro_div_new_0/divider_0/tspc_1/Z3 ro_div_new_0/divider_0/tspc_1/Q 0.05fF
C230 divbuf_3/OUT divbuf_3/OUT2 0.06fF
C231 divbuf_3/OUT5 divbuf_3/OUT3 0.01fF
C232 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF
C233 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/Z1 0.01fF
C234 divbuf_2/OUT3 divbuf_2/OUT5 0.01fF
C235 divbuf_4/OUT2 divbuf_4/OUT5 0.02fF
C236 divbuf_4/OUT3 divbuf_4/OUT4 5.16fF
C237 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF
C238 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/tspc_0/Z1 0.03fF
C239 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
C240 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/tspc_2/Z3 0.38fF
C241 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/tspc_2/Z4 0.12fF
C242 ro_div_new_0/divider_0/tspc_2/Z1 ro_div_new_0/divider_0/tspc_2/Z2 1.07fF
C243 ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin ro_div_new_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF
C244 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF
C245 ro_div_new_0/divider_0/tspc_1/Z1 ro_div_new_0/divider_0/tspc_1/Z4 0.00fF
C246 ro_div_new_0/divider_0/nor_0/Z1 ro_div_new_0/divider_0/nor_0/B 0.06fF
C247 ro_div_new_0/divider_0/and_0/A ro_div_new_0/divider_0/and_0/B 0.18fF
C248 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF
C249 io_clamp_high[2] io_analog[6] 0.53fF
C250 ro_complete_0/a5 ro_complete_0/cbank_2/v 0.08fF
C251 ro_complete_0/a4 ro_complete_0/cbank_1/switch_1/vin 0.09fF
C252 ro_div_new_0/divider_0/prescaler_0/tspc_0/D ro_div_new_0/divider_0/prescaler_0/nand_0/z1 0.24fF
C253 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/prescaler_0/Out 0.19fF
C254 ro_div_new_0/ro_complete_0/cbank_2/v ro_div_new_0/divider_0/clk 1.36fF
C255 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/divider_0/clk 0.05fF
C256 divbuf_1/OUT5 divbuf_1/OUT 43.38fF
C257 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/and_0/out1 0.31fF
C258 ro_div_new_0/divider_0/prescaler_0/tspc_0/D ro_div_new_0/divider_0/clk 0.26fF
C259 ro_div_new_0/ro_complete_0/a1 ro_div_new_0/ro_complete_0/cbank_2/v 0.05fF
C260 divbuf_1/IN divbuf_1/OUT5 0.00fF
C261 ro_div_new_0/ro_complete_0/cbank_0/switch_5/vin ro_div_new_0/ro_complete_0/a0 0.09fF
C262 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/a5 0.09fF
C263 ro_div_new_0/ro_complete_0/a2 ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF
C264 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin ro_div_new_0/ro_complete_0/a4 0.09fF
C265 divbuf_6/OUT2 divbuf_6/OUT 0.06fF
C266 divbuf_6/OUT3 divbuf_6/OUT5 0.01fF
C267 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF
C268 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF
C269 ro_div_new_0/ro_complete_0/a5 ro_div_new_0/divider_0/clk 0.10fF
C270 ro_div_new_0/divider_0/tspc_0/Z4 ro_div_new_0/divider_0/nor_1/A 0.21fF
C271 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/Z3 0.45fF
C272 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/switch_1/vin 0.20fF
C273 divbuf_4/OUT3 divbuf_4/OUT 0.26fF
C274 divbuf_4/OUT4 divbuf_4/OUT5 20.26fF
C275 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF
C276 ro_div_new_0/divider_0/tspc_2/Z2 ro_div_new_0/divider_0/tspc_2/Z3 0.16fF
C277 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/tspc_2/Z4 0.22fF
C278 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.20fF
C279 ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF
C280 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF
C281 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF
C282 io_clamp_low[1] io_analog[5] 0.53fF
C283 divbuf_7/a_492_n240# divbuf_7/OUT5 0.01fF
C284 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF
C285 ro_div_new_0/divider_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/Out 0.11fF
C286 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.04fF
C287 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_new_0/divider_0/clk 0.45fF
C288 ro_complete_0/a3 ro_complete_0/cbank_2/switch_1/vin 0.13fF
C289 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/prescaler_0/Out 0.01fF
C290 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/clk 0.01fF
C291 divbuf_0/OUT5 divbuf_0/OUT 43.38fF
C292 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a2 0.09fF
C293 divbuf_1/OUT3 divbuf_1/OUT2 1.37fF
C294 divbuf_5/a_492_n240# divbuf_5/OUT 0.00fF
C295 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF
C296 ro_div_new_0/ro_complete_0/a5 ro_div_new_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF
C297 divbuf_6/OUT4 divbuf_6/OUT 1.11fF
C298 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/Out 0.11fF
C299 divbuf_2/a_492_n240# divbuf_2/IN 0.13fF
C300 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF
C301 ro_div_new_0/ro_complete_0/a1 ro_div_new_0/divider_0/clk 0.05fF
C302 divbuf_1/a_492_n240# divbuf_1/OUT2 0.42fF
C303 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/Z4 0.15fF
C304 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/clk 0.64fF
C305 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF
C306 divbuf_4/OUT5 divbuf_4/OUT 43.38fF
C307 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF
C308 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/tspc_0/Q 0.01fF
C309 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF
C310 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF
C311 ro_div_new_0/divider_0/tspc_2/Z2 ro_div_new_0/divider_0/tspc_2/Z4 0.36fF
C312 ro_div_new_0/divider_0/tspc_2/Z3 ro_div_new_0/divider_0/Out 0.05fF
C313 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/tspc_0/Z2 0.01fF
C314 divbuf_6/a_492_n240# divbuf_6/IN 0.13fF
C315 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF
C316 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF
C317 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
C318 ro_div_new_0/divider_0/and_0/B ro_div_new_0/divider_0/and_0/Z1 0.07fF
C319 divbuf_7/OUT2 divbuf_7/OUT3 1.37fF
C320 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.15fF
C321 divbuf_1/OUT4 divbuf_1/OUT5 20.26fF
C322 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 ro_div_new_0/divider_0/clk 0.12fF
C323 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF
C324 ro_complete_0/a4 ro_complete_0/cbank_0/switch_0/vin 0.12fF
C325 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/Out 0.45fF
C326 ro_div_new_0/ro_complete_0/cbank_1/switch_0/vin ro_div_new_0/divider_0/clk 1.45fF
C327 divbuf_4/a_492_n240# divbuf_4/IN 0.13fF
C328 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/nor_1/B 0.35fF
C329 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
C330 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/clk 0.60fF
C331 divbuf_3/a_492_n240# divbuf_3/IN 0.13fF
C332 ro_div_new_0/ro_complete_0/cbank_0/v ro_div_new_0/ro_complete_0/cbank_2/v 0.04fF
C333 divbuf_5/IN divbuf_5/OUT5 0.00fF
C334 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF
C335 ro_complete_0/a4 ro_complete_0/cbank_1/v 0.05fF
C336 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF
C337 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/tspc_0/Q 0.04fF
C338 divbuf_0/OUT5 divbuf_0/OUT4 20.26fF
C339 divbuf_1/OUT divbuf_1/OUT2 0.06fF
C340 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.13fF
C341 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF
C342 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF
C343 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin ro_div_new_0/divider_0/clk 1.30fF
C344 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 ro_div_new_0/divider_0/clk 0.12fF
C345 divbuf_2/OUT4 divbuf_2/OUT 1.11fF
C346 ro_complete_0/a4 ro_complete_0/cbank_0/switch_1/vin 0.09fF
C347 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/tspc_1/Z3 0.05fF
C348 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/nor_1/B 0.01fF
C349 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/tspc_0/Z2 0.16fF
C350 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF
C351 divbuf_3/OUT5 divbuf_3/a_492_n240# 0.01fF
C352 io_clamp_high[0] io_analog[4] 0.53fF
C353 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/tspc_0/a_630_n680# 0.05fF
C354 ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin ro_div_new_0/ro_complete_0/a3 0.09fF
C355 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.04fF
C356 divbuf_7/OUT2 divbuf_7/OUT5 0.02fF
C357 divbuf_7/OUT3 divbuf_7/OUT4 5.16fF
C358 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.05fF
C359 ro_complete_0/a2 ro_complete_0/cbank_1/v 0.05fF
C360 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/tspc_1/Z2 0.01fF
C361 ro_div_new_0/divider_0/and_0/OUT ro_div_new_0/divider_0/and_0/Z1 0.04fF
C362 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/nor_0/B 0.35fF
C363 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q ro_div_new_0/divider_0/clk 0.05fF
C364 divbuf_5/OUT2 divbuf_5/OUT 0.06fF
C365 divbuf_5/OUT3 divbuf_5/OUT5 0.01fF
C366 divbuf_0/OUT5 divbuf_0/a_492_n240# 0.01fF
C367 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF
C368 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF
C369 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.03fF
C370 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_0/Q 0.22fF
C371 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
C372 divbuf_0/OUT5 divbuf_0/IN 0.00fF
C373 ro_div_new_0/divider_0/tspc_0/Z3 ro_div_new_0/divider_0/tspc_0/Q 0.05fF
C374 divbuf_0/OUT divbuf_0/OUT2 0.06fF
C375 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
C376 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.03fF
C377 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF
C378 ro_complete_0/a5 ro_complete_0/cbank_2/switch_0/vin 0.09fF
C379 ro_div_new_0/ro_complete_0/cbank_0/v ro_div_new_0/divider_0/clk 1.27fF
C380 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
C381 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
C382 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF
C383 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.44fF
C384 ro_div_new_0/divider_0/tspc_1/a_630_n680# ro_div_new_0/divider_0/tspc_1/Z4 0.12fF
C385 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF
C386 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin ro_div_new_0/ro_complete_0/a1 0.14fF
C387 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF
C388 divbuf_6/a_492_n240# divbuf_6/OUT5 0.01fF
C389 ro_div_new_0/divider_0/tspc_0/Q ro_div_new_0/divider_0/tspc_1/Z3 0.45fF
C390 ro_div_new_0/ro_complete_0/cbank_1/switch_5/vin ro_div_new_0/divider_0/clk 1.30fF
C391 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF
C392 divbuf_7/OUT3 divbuf_7/OUT 0.26fF
C393 divbuf_7/OUT4 divbuf_7/OUT5 20.26fF
C394 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/tspc_2/a_630_n680# 0.01fF
C395 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/prescaler_0/tspc_0/Q 0.19fF
C396 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/clk 0.14fF
C397 divbuf_2/IN divbuf_2/OUT5 0.00fF
C398 ro_complete_0/a0 ro_complete_0/cbank_1/switch_5/vin 0.09fF
C399 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_new_0/divider_0/clk 0.45fF
C400 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin 0.12fF
C401 divbuf_4/a_492_n240# divbuf_4/OUT5 0.01fF
C402 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF
C403 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/tspc_2/Z2 0.01fF
C404 ro_div_new_0/divider_0/prescaler_0/tspc_2/D ro_div_new_0/divider_0/clk 0.29fF
C405 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/nor_1/B 0.06fF
C406 divbuf_5/OUT4 divbuf_5/OUT 1.11fF
C407 ro_div_new_0/divider_0/tspc_1/Z2 ro_div_new_0/divider_0/tspc_0/Q 0.14fF
C408 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Z3 0.38fF
C409 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_new_0/divider_0/and_0/OUT 0.06fF
C410 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF
C411 ro_div_new_0/divider_0/and_0/out1 ro_div_new_0/divider_0/and_0/A 0.01fF
C412 ro_div_new_0/ro_complete_0/a3 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF
C413 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.05fF
C414 ro_div_new_0/divider_0/nor_1/A ro_div_new_0/divider_0/and_0/A 0.01fF
C415 ro_div_new_0/ro_complete_0/a5 ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin 0.09fF
C416 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/a2 0.09fF
C417 divbuf_3/OUT4 divbuf_3/OUT5 20.26fF
C418 divbuf_5/a_492_n240# divbuf_5/IN 0.13fF
C419 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Z2 0.30fF
C420 ro_div_new_0/divider_0/tspc_0/Z2 ro_div_new_0/divider_0/tspc_0/Z1 1.07fF
C421 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF
C422 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 ro_div_new_0/divider_0/prescaler_0/tspc_0/D 0.11fF
C423 ro_div_new_0/ro_complete_0/cbank_0/switch_5/vin ro_div_new_0/ro_complete_0/cbank_0/v 1.30fF
C424 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin ro_div_new_0/ro_complete_0/a1 0.14fF
C425 divbuf_6/OUT2 divbuf_6/OUT3 1.37fF
C426 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_0/vin 0.19fF
C427 ro_div_new_0/divider_0/tspc_0/Q ro_div_new_0/divider_0/tspc_1/Z4 0.15fF
C428 ro_div_new_0/divider_0/tspc_0/Z4 ro_div_new_0/divider_0/prescaler_0/Out 0.12fF
C429 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_1/Q 0.15fF
C430 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_new_0/divider_0/and_0/OUT 0.06fF
C431 ro_div_new_0/divider_0/nor_1/Z1 ro_div_new_0/divider_0/and_0/A 0.80fF
C432 divbuf_3/OUT5 divbuf_3/OUT2 0.02fF
C433 divbuf_3/OUT4 divbuf_3/OUT3 5.16fF
C434 ro_complete_0/a3 ro_complete_0/cbank_1/switch_2/vin 0.09fF
C435 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/a0 0.13fF
C436 divbuf_7/OUT5 divbuf_7/OUT 43.38fF
C437 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/and_0/B 0.31fF
C438 ro_div_new_0/divider_0/tspc_1/Q ro_div_new_0/divider_0/nor_0/B 0.22fF
C439 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.32fF
C440 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/clk 0.01fF
C441 divbuf_2/OUT3 divbuf_2/OUT4 5.16fF
C442 ro_complete_0/a0 ro_complete_0/cbank_1/v 0.05fF
C443 divbuf_4/IN divbuf_4/OUT5 0.00fF
C444 ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin ro_div_new_0/divider_0/clk 1.30fF
C445 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF
C446 ro_div_new_0/divider_0/nor_0/B ro_div_new_0/divider_0/tspc_2/Z2 0.40fF
C447 ro_div_new_0/divider_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/Out 0.04fF
C448 divbuf_3/OUT2 divbuf_3/OUT3 1.37fF
C449 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a1 0.14fF
C450 divbuf_1/OUT divbuf_1/OUT3 0.26fF
C451 ro_div_new_0/divider_0/tspc_1/Z2 ro_div_new_0/divider_0/tspc_1/Z3 0.16fF
C452 ro_div_new_0/divider_0/nor_1/B ro_div_new_0/divider_0/tspc_1/Z4 0.21fF
C453 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF
C454 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF
C455 io_clamp_low[2] io_analog[6] 0.53fF
C456 ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin ro_div_new_0/ro_complete_0/a0 0.13fF
C457 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF
C458 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF
C459 divbuf_7/a_492_n240# divbuf_7/OUT2 0.42fF
C460 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 ro_div_new_0/divider_0/prescaler_0/tspc_2/D 0.11fF
C461 ro_complete_0/a2 ro_complete_0/cbank_2/switch_2/vin 0.14fF
C462 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/switch_1/vin 0.19fF
C463 ro_div_new_0/divider_0/mc2 ro_div_new_0/divider_0/and_0/B 0.20fF
C464 divbuf_0/OUT5 divbuf_0/OUT3 0.01fF
C465 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin 0.19fF
C466 divbuf_0/OUT2 divbuf_0/a_492_n240# 0.42fF
C467 ro_div_new_0/divider_0/nor_0/Z1 ro_div_new_0/divider_0/nor_1/B 0.18fF
C468 ro_div_new_0/divider_0/tspc_0/Z4 ro_div_new_0/divider_0/tspc_0/Z2 0.36fF
C469 divbuf_3/OUT5 divbuf_3/OUT 43.38fF
C470 ro_div_new_0/divider_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/tspc_0/Z4 0.12fF
C471 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF
C472 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin ro_div_new_0/ro_complete_0/cbank_2/v 1.30fF
C473 divbuf_1/a_492_n240# divbuf_1/OUT 0.00fF
C474 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# ro_div_new_0/divider_0/and_0/OUT 0.14fF
Xro_div_new_0/ro_complete_0 ro_div_new_0/ro_complete_0/a0 ro_div_new_0/ro_complete_0/a1
+ ro_div_new_0/ro_complete_0/a5 ro_div_new_0/ro_complete_0/a4 ro_div_new_0/ro_complete_0/a3
+ ro_div_new_0/ro_complete_0/a2 ro_complete
Xro_div_new_0/divider_0 gnd vdd ro_div_new_0/divider_0/Out ro_div_new_0/divider_0/clk
+ ro_div_new_0/divider_0/mc2 divider
Xro_complete_0 ro_complete_0/a0 ro_complete_0/a1 ro_complete_0/a5 ro_complete_0/a4
+ ro_complete_0/a3 ro_complete_0/a2 ro_complete
Xdivbuf_0 VDD divbuf_0/IN divbuf_0/OUT divbuf_0/OUT2 divbuf_0/OUT3 divbuf_0/OUT4 divbuf_0/OUT5
+ gnd divbuf
Xdivbuf_1 VDD divbuf_1/IN divbuf_1/OUT divbuf_1/OUT2 divbuf_1/OUT3 divbuf_1/OUT4 divbuf_1/OUT5
+ gnd divbuf
Xdivbuf_2 VDD divbuf_2/IN divbuf_2/OUT divbuf_2/OUT2 divbuf_2/OUT3 divbuf_2/OUT4 divbuf_2/OUT5
+ gnd divbuf
Xdivbuf_3 VDD divbuf_3/IN divbuf_3/OUT divbuf_3/OUT2 divbuf_3/OUT3 divbuf_3/OUT4 divbuf_3/OUT5
+ gnd divbuf
Xdivbuf_4 VDD divbuf_4/IN divbuf_4/OUT divbuf_4/OUT2 divbuf_4/OUT3 divbuf_4/OUT4 divbuf_4/OUT5
+ gnd divbuf
Xdivbuf_5 VDD divbuf_5/IN divbuf_5/OUT divbuf_5/OUT2 divbuf_5/OUT3 divbuf_5/OUT4 divbuf_5/OUT5
+ gnd divbuf
Xdivbuf_6 VDD divbuf_6/IN divbuf_6/OUT divbuf_6/OUT2 divbuf_6/OUT3 divbuf_6/OUT4 divbuf_6/OUT5
+ gnd divbuf
Xdivbuf_7 VDD divbuf_7/IN divbuf_7/OUT divbuf_7/OUT2 divbuf_7/OUT3 divbuf_7/OUT4 divbuf_7/OUT5
+ gnd divbuf
C475 io_analog[4] VDD 25.05fF
C476 io_analog[5] VDD 25.05fF
C477 io_analog[6] VDD 25.05fF
C478 io_in_3v3[0] VDD 0.61fF
C479 io_oeb[26] VDD 0.61fF
C480 io_in[0] VDD 0.61fF
C481 io_out[26] VDD 0.61fF
C482 io_out[0] VDD 0.61fF
C483 io_in[26] VDD 0.61fF
C484 io_oeb[0] VDD 0.61fF
C485 io_in_3v3[26] VDD 0.61fF
C486 io_in_3v3[1] VDD 0.61fF
C487 io_oeb[25] VDD 0.61fF
C488 io_in[1] VDD 0.61fF
C489 io_out[25] VDD 0.61fF
C490 io_out[1] VDD 0.61fF
C491 io_in[25] VDD 0.61fF
C492 io_oeb[1] VDD 0.61fF
C493 io_in_3v3[25] VDD 0.61fF
C494 io_in_3v3[2] VDD 0.61fF
C495 io_oeb[24] VDD 0.61fF
C496 io_in[2] VDD 0.61fF
C497 io_out[24] VDD 0.61fF
C498 io_out[2] VDD 0.61fF
C499 io_in[24] VDD 0.61fF
C500 io_oeb[2] VDD 0.61fF
C501 io_in_3v3[24] VDD 0.61fF
C502 io_in_3v3[3] VDD 0.61fF
C503 gpio_noesd[17] VDD 0.61fF
C504 io_in[3] VDD 0.61fF
C505 gpio_analog[17] VDD 0.61fF
C506 io_out[3] VDD 0.61fF
C507 io_oeb[3] VDD 0.61fF
C508 io_in_3v3[4] VDD 0.61fF
C509 io_in[4] VDD 0.61fF
C510 io_out[4] VDD 0.61fF
C511 io_oeb[4] VDD 0.61fF
C512 io_oeb[23] VDD 0.61fF
C513 io_out[23] VDD 0.61fF
C514 io_in[23] VDD 0.61fF
C515 io_in_3v3[23] VDD 0.61fF
C516 gpio_noesd[16] VDD 0.61fF
C517 gpio_analog[16] VDD 0.61fF
C518 io_in_3v3[5] VDD 0.61fF
C519 io_in[5] VDD 0.61fF
C520 io_out[5] VDD 0.61fF
C521 io_oeb[5] VDD 0.61fF
C522 io_oeb[22] VDD 0.61fF
C523 io_out[22] VDD 0.61fF
C524 io_in[22] VDD 0.61fF
C525 io_in_3v3[22] VDD 0.61fF
C526 gpio_noesd[15] VDD 0.61fF
C527 gpio_analog[15] VDD 0.61fF
C528 io_in_3v3[6] VDD 0.61fF
C529 io_in[6] VDD 0.61fF
C530 io_out[6] VDD 0.61fF
C531 io_oeb[6] VDD 0.61fF
C532 io_oeb[21] VDD 0.61fF
C533 io_out[21] VDD 0.61fF
C534 io_in[21] VDD 0.61fF
C535 io_in_3v3[21] VDD 0.61fF
C536 gpio_noesd[14] VDD 0.61fF
C537 gpio_analog[14] VDD 0.61fF
C538 vssa1 VDD 26.08fF
C539 vssd2 VDD 13.04fF
C540 vssd1 VDD 13.04fF
C541 vdda2 VDD 13.04fF
C542 vdda1 VDD 26.08fF
C543 io_oeb[20] VDD 0.61fF
C544 io_out[20] VDD 0.61fF
C545 io_in[20] VDD 0.61fF
C546 io_in_3v3[20] VDD 0.61fF
C547 gpio_noesd[13] VDD 0.61fF
C548 gpio_analog[13] VDD 0.61fF
C549 gpio_analog[0] VDD 0.61fF
C550 gpio_noesd[0] VDD 0.61fF
C551 io_in_3v3[7] VDD 0.61fF
C552 io_in[7] VDD 0.61fF
C553 io_out[7] VDD 0.61fF
C554 io_oeb[7] VDD 0.61fF
C555 io_oeb[19] VDD 0.61fF
C556 io_out[19] VDD 0.61fF
C557 io_in[19] VDD 0.61fF
C558 io_in_3v3[19] VDD 0.61fF
C559 gpio_noesd[12] VDD 0.61fF
C560 gpio_analog[12] VDD 0.61fF
C561 gpio_analog[1] VDD 0.61fF
C562 gpio_noesd[1] VDD 0.61fF
C563 io_in_3v3[8] VDD 0.61fF
C564 io_in[8] VDD 0.61fF
C565 io_out[8] VDD 0.61fF
C566 io_oeb[8] VDD 0.61fF
C567 io_oeb[18] VDD 0.61fF
C568 io_out[18] VDD 0.61fF
C569 io_in[18] VDD 0.61fF
C570 io_in_3v3[18] VDD 0.61fF
C571 gpio_noesd[11] VDD 0.61fF
C572 gpio_analog[11] VDD 0.61fF
C573 gpio_analog[2] VDD 0.61fF
C574 gpio_noesd[2] VDD 0.61fF
C575 io_in_3v3[9] VDD 0.61fF
C576 io_in[9] VDD 0.61fF
C577 io_out[9] VDD 0.61fF
C578 io_oeb[9] VDD 0.61fF
C579 io_oeb[17] VDD 0.61fF
C580 io_out[17] VDD 0.61fF
C581 io_in[17] VDD 0.61fF
C582 io_in_3v3[17] VDD 0.61fF
C583 gpio_noesd[10] VDD 0.61fF
C584 gpio_analog[10] VDD 0.61fF
C585 gpio_analog[3] VDD 0.61fF
C586 gpio_noesd[3] VDD 0.61fF
C587 io_in_3v3[10] VDD 0.61fF
C588 io_in[10] VDD 0.61fF
C589 io_out[10] VDD 0.61fF
C590 io_oeb[10] VDD 0.61fF
C591 io_oeb[16] VDD 0.61fF
C592 io_out[16] VDD 0.61fF
C593 io_in[16] VDD 0.61fF
C594 io_in_3v3[16] VDD 0.61fF
C595 gpio_noesd[9] VDD 0.61fF
C596 gpio_analog[9] VDD 0.61fF
C597 gpio_analog[4] VDD 0.61fF
C598 gpio_noesd[4] VDD 0.61fF
C599 io_in_3v3[11] VDD 0.61fF
C600 io_in[11] VDD 0.61fF
C601 io_out[11] VDD 0.61fF
C602 io_oeb[11] VDD 0.61fF
C603 io_oeb[15] VDD 0.61fF
C604 io_out[15] VDD 0.61fF
C605 io_in[15] VDD 0.61fF
C606 io_in_3v3[15] VDD 0.61fF
C607 gpio_noesd[8] VDD 0.61fF
C608 gpio_analog[8] VDD 0.61fF
C609 gpio_analog[5] VDD 0.61fF
C610 gpio_noesd[5] VDD 0.61fF
C611 io_in_3v3[12] VDD 0.61fF
C612 io_in[12] VDD 0.61fF
C613 io_out[12] VDD 0.61fF
C614 io_oeb[12] VDD 0.61fF
C615 io_oeb[14] VDD 0.61fF
C616 io_out[14] VDD 0.61fF
C617 io_in[14] VDD 0.61fF
C618 io_in_3v3[14] VDD 0.61fF
C619 gpio_noesd[7] VDD 0.61fF
C620 gpio_analog[7] VDD 0.61fF
C621 vssa2 VDD 13.04fF
C622 gpio_analog[6] VDD 0.61fF
C623 gpio_noesd[6] VDD 0.61fF
C624 io_in_3v3[13] VDD 0.61fF
C625 io_in[13] VDD 0.61fF
C626 io_out[13] VDD 0.61fF
C627 io_oeb[13] VDD 0.61fF
C628 vccd1 VDD 13.04fF
C629 vccd2 VDD 13.04fF
C630 io_analog[0] VDD 6.83fF
C631 io_analog[10] VDD 6.83fF
C632 io_analog[1] VDD 6.83fF
C633 io_analog[2] VDD 6.83fF
C634 io_analog[3] VDD 6.83fF
C635 io_clamp_high[0] VDD 3.58fF
C636 io_clamp_low[0] VDD 3.58fF
C637 io_clamp_high[1] VDD 3.58fF
C638 io_clamp_low[1] VDD 3.58fF
C639 io_clamp_high[2] VDD 3.58fF
C640 io_clamp_low[2] VDD 3.58fF
C641 io_analog[7] VDD 6.83fF
C642 io_analog[8] VDD 6.83fF
C643 io_analog[9] VDD 6.83fF
C644 user_irq[2] VDD 0.63fF
C645 user_irq[1] VDD 0.63fF
C646 user_irq[0] VDD 0.63fF
C647 user_clock2 VDD 0.63fF
C648 la_oenb[127] VDD 0.63fF
C649 la_data_out[127] VDD 0.63fF
C650 la_data_in[127] VDD 0.63fF
C651 la_oenb[126] VDD 0.63fF
C652 la_data_out[126] VDD 0.63fF
C653 la_data_in[126] VDD 0.63fF
C654 la_oenb[125] VDD 0.63fF
C655 la_data_out[125] VDD 0.63fF
C656 la_data_in[125] VDD 0.63fF
C657 la_oenb[124] VDD 0.63fF
C658 la_data_out[124] VDD 0.63fF
C659 la_data_in[124] VDD 0.63fF
C660 la_oenb[123] VDD 0.63fF
C661 la_data_out[123] VDD 0.63fF
C662 la_data_in[123] VDD 0.63fF
C663 la_oenb[122] VDD 0.63fF
C664 la_data_out[122] VDD 0.63fF
C665 la_data_in[122] VDD 0.63fF
C666 la_oenb[121] VDD 0.63fF
C667 la_data_out[121] VDD 0.63fF
C668 la_data_in[121] VDD 0.63fF
C669 la_oenb[120] VDD 0.63fF
C670 la_data_out[120] VDD 0.63fF
C671 la_data_in[120] VDD 0.63fF
C672 la_oenb[119] VDD 0.63fF
C673 la_data_out[119] VDD 0.63fF
C674 la_data_in[119] VDD 0.63fF
C675 la_oenb[118] VDD 0.63fF
C676 la_data_out[118] VDD 0.63fF
C677 la_data_in[118] VDD 0.63fF
C678 la_oenb[117] VDD 0.63fF
C679 la_data_out[117] VDD 0.63fF
C680 la_data_in[117] VDD 0.63fF
C681 la_oenb[116] VDD 0.63fF
C682 la_data_out[116] VDD 0.63fF
C683 la_data_in[116] VDD 0.63fF
C684 la_oenb[115] VDD 0.63fF
C685 la_data_out[115] VDD 0.63fF
C686 la_data_in[115] VDD 0.63fF
C687 la_oenb[114] VDD 0.63fF
C688 la_data_out[114] VDD 0.63fF
C689 la_data_in[114] VDD 0.63fF
C690 la_oenb[113] VDD 0.63fF
C691 la_data_out[113] VDD 0.63fF
C692 la_data_in[113] VDD 0.63fF
C693 la_oenb[112] VDD 0.63fF
C694 la_data_out[112] VDD 0.63fF
C695 la_data_in[112] VDD 0.63fF
C696 la_oenb[111] VDD 0.63fF
C697 la_data_out[111] VDD 0.63fF
C698 la_data_in[111] VDD 0.63fF
C699 la_oenb[110] VDD 0.63fF
C700 la_data_out[110] VDD 0.63fF
C701 la_data_in[110] VDD 0.63fF
C702 la_oenb[109] VDD 0.63fF
C703 la_data_out[109] VDD 0.63fF
C704 la_data_in[109] VDD 0.63fF
C705 la_oenb[108] VDD 0.63fF
C706 la_data_out[108] VDD 0.63fF
C707 la_data_in[108] VDD 0.63fF
C708 la_oenb[107] VDD 0.63fF
C709 la_data_out[107] VDD 0.63fF
C710 la_data_in[107] VDD 0.63fF
C711 la_oenb[106] VDD 0.63fF
C712 la_data_out[106] VDD 0.63fF
C713 la_data_in[106] VDD 0.63fF
C714 la_oenb[105] VDD 0.63fF
C715 la_data_out[105] VDD 0.63fF
C716 la_data_in[105] VDD 0.63fF
C717 la_oenb[104] VDD 0.63fF
C718 la_data_out[104] VDD 0.63fF
C719 la_data_in[104] VDD 0.63fF
C720 la_oenb[103] VDD 0.63fF
C721 la_data_out[103] VDD 0.63fF
C722 la_data_in[103] VDD 0.63fF
C723 la_oenb[102] VDD 0.63fF
C724 la_data_out[102] VDD 0.63fF
C725 la_data_in[102] VDD 0.63fF
C726 la_oenb[101] VDD 0.63fF
C727 la_data_out[101] VDD 0.63fF
C728 la_data_in[101] VDD 0.63fF
C729 la_oenb[100] VDD 0.63fF
C730 la_data_out[100] VDD 0.63fF
C731 la_data_in[100] VDD 0.63fF
C732 la_oenb[99] VDD 0.63fF
C733 la_data_out[99] VDD 0.63fF
C734 la_data_in[99] VDD 0.63fF
C735 la_oenb[98] VDD 0.63fF
C736 la_data_out[98] VDD 0.63fF
C737 la_data_in[98] VDD 0.63fF
C738 la_oenb[97] VDD 0.63fF
C739 la_data_out[97] VDD 0.63fF
C740 la_data_in[97] VDD 0.63fF
C741 la_oenb[96] VDD 0.63fF
C742 la_data_out[96] VDD 0.63fF
C743 la_data_in[96] VDD 0.63fF
C744 la_oenb[95] VDD 0.63fF
C745 la_data_out[95] VDD 0.63fF
C746 la_data_in[95] VDD 0.63fF
C747 la_oenb[94] VDD 0.63fF
C748 la_data_out[94] VDD 0.63fF
C749 la_data_in[94] VDD 0.63fF
C750 la_oenb[93] VDD 0.63fF
C751 la_data_out[93] VDD 0.63fF
C752 la_data_in[93] VDD 0.63fF
C753 la_oenb[92] VDD 0.63fF
C754 la_data_out[92] VDD 0.63fF
C755 la_data_in[92] VDD 0.63fF
C756 la_oenb[91] VDD 0.63fF
C757 la_data_out[91] VDD 0.63fF
C758 la_data_in[91] VDD 0.63fF
C759 la_oenb[90] VDD 0.63fF
C760 la_data_out[90] VDD 0.63fF
C761 la_data_in[90] VDD 0.63fF
C762 la_oenb[89] VDD 0.63fF
C763 la_data_out[89] VDD 0.63fF
C764 la_data_in[89] VDD 0.63fF
C765 la_oenb[88] VDD 0.63fF
C766 la_data_out[88] VDD 0.63fF
C767 la_data_in[88] VDD 0.63fF
C768 la_oenb[87] VDD 0.63fF
C769 la_data_out[87] VDD 0.63fF
C770 la_data_in[87] VDD 0.63fF
C771 la_oenb[86] VDD 0.63fF
C772 la_data_out[86] VDD 0.63fF
C773 la_data_in[86] VDD 0.63fF
C774 la_oenb[85] VDD 0.63fF
C775 la_data_out[85] VDD 0.63fF
C776 la_data_in[85] VDD 0.63fF
C777 la_oenb[84] VDD 0.63fF
C778 la_data_out[84] VDD 0.63fF
C779 la_data_in[84] VDD 0.63fF
C780 la_oenb[83] VDD 0.63fF
C781 la_data_out[83] VDD 0.63fF
C782 la_data_in[83] VDD 0.63fF
C783 la_oenb[82] VDD 0.63fF
C784 la_data_out[82] VDD 0.63fF
C785 la_data_in[82] VDD 0.63fF
C786 la_oenb[81] VDD 0.63fF
C787 la_data_out[81] VDD 0.63fF
C788 la_data_in[81] VDD 0.63fF
C789 la_oenb[80] VDD 0.63fF
C790 la_data_out[80] VDD 0.63fF
C791 la_data_in[80] VDD 0.63fF
C792 la_oenb[79] VDD 0.63fF
C793 la_data_out[79] VDD 0.63fF
C794 la_data_in[79] VDD 0.63fF
C795 la_oenb[78] VDD 0.63fF
C796 la_data_out[78] VDD 0.63fF
C797 la_data_in[78] VDD 0.63fF
C798 la_oenb[77] VDD 0.63fF
C799 la_data_out[77] VDD 0.63fF
C800 la_data_in[77] VDD 0.63fF
C801 la_oenb[76] VDD 0.63fF
C802 la_data_out[76] VDD 0.63fF
C803 la_data_in[76] VDD 0.63fF
C804 la_oenb[75] VDD 0.63fF
C805 la_data_out[75] VDD 0.63fF
C806 la_data_in[75] VDD 0.63fF
C807 la_oenb[74] VDD 0.63fF
C808 la_data_out[74] VDD 0.63fF
C809 la_data_in[74] VDD 0.63fF
C810 la_oenb[73] VDD 0.63fF
C811 la_data_out[73] VDD 0.63fF
C812 la_data_in[73] VDD 0.63fF
C813 la_oenb[72] VDD 0.63fF
C814 la_data_out[72] VDD 0.63fF
C815 la_data_in[72] VDD 0.63fF
C816 la_oenb[71] VDD 0.63fF
C817 la_data_out[71] VDD 0.63fF
C818 la_data_in[71] VDD 0.63fF
C819 la_oenb[70] VDD 0.63fF
C820 la_data_out[70] VDD 0.63fF
C821 la_data_in[70] VDD 0.63fF
C822 la_oenb[69] VDD 0.63fF
C823 la_data_out[69] VDD 0.63fF
C824 la_data_in[69] VDD 0.63fF
C825 la_oenb[68] VDD 0.63fF
C826 la_data_out[68] VDD 0.63fF
C827 la_data_in[68] VDD 0.63fF
C828 la_oenb[67] VDD 0.63fF
C829 la_data_out[67] VDD 0.63fF
C830 la_data_in[67] VDD 0.63fF
C831 la_oenb[66] VDD 0.63fF
C832 la_data_out[66] VDD 0.63fF
C833 la_data_in[66] VDD 0.63fF
C834 la_oenb[65] VDD 0.63fF
C835 la_data_out[65] VDD 0.63fF
C836 la_data_in[65] VDD 0.63fF
C837 la_oenb[64] VDD 0.63fF
C838 la_data_out[64] VDD 0.63fF
C839 la_data_in[64] VDD 0.63fF
C840 la_oenb[63] VDD 0.63fF
C841 la_data_out[63] VDD 0.63fF
C842 la_data_in[63] VDD 0.63fF
C843 la_oenb[62] VDD 0.63fF
C844 la_data_out[62] VDD 0.63fF
C845 la_data_in[62] VDD 0.63fF
C846 la_oenb[61] VDD 0.63fF
C847 la_data_out[61] VDD 0.63fF
C848 la_data_in[61] VDD 0.63fF
C849 la_oenb[60] VDD 0.63fF
C850 la_data_out[60] VDD 0.63fF
C851 la_data_in[60] VDD 0.63fF
C852 la_oenb[59] VDD 0.63fF
C853 la_data_out[59] VDD 0.63fF
C854 la_data_in[59] VDD 0.63fF
C855 la_oenb[58] VDD 0.63fF
C856 la_data_out[58] VDD 0.63fF
C857 la_data_in[58] VDD 0.63fF
C858 la_oenb[57] VDD 0.63fF
C859 la_data_out[57] VDD 0.63fF
C860 la_data_in[57] VDD 0.63fF
C861 la_oenb[56] VDD 0.63fF
C862 la_data_out[56] VDD 0.63fF
C863 la_data_in[56] VDD 0.63fF
C864 la_oenb[55] VDD 0.63fF
C865 la_data_out[55] VDD 0.63fF
C866 la_data_in[55] VDD 0.63fF
C867 la_oenb[54] VDD 0.63fF
C868 la_data_out[54] VDD 0.63fF
C869 la_data_in[54] VDD 0.63fF
C870 la_oenb[53] VDD 0.63fF
C871 la_data_out[53] VDD 0.63fF
C872 la_data_in[53] VDD 0.63fF
C873 la_oenb[52] VDD 0.63fF
C874 la_data_out[52] VDD 0.63fF
C875 la_data_in[52] VDD 0.63fF
C876 la_oenb[51] VDD 0.63fF
C877 la_data_out[51] VDD 0.63fF
C878 la_data_in[51] VDD 0.63fF
C879 la_oenb[50] VDD 0.63fF
C880 la_data_out[50] VDD 0.63fF
C881 la_data_in[50] VDD 0.63fF
C882 la_oenb[49] VDD 0.63fF
C883 la_data_out[49] VDD 0.63fF
C884 la_data_in[49] VDD 0.63fF
C885 la_oenb[48] VDD 0.63fF
C886 la_data_out[48] VDD 0.63fF
C887 la_data_in[48] VDD 0.63fF
C888 la_oenb[47] VDD 0.63fF
C889 la_data_out[47] VDD 0.63fF
C890 la_data_in[47] VDD 0.63fF
C891 la_oenb[46] VDD 0.63fF
C892 la_data_out[46] VDD 0.63fF
C893 la_data_in[46] VDD 0.63fF
C894 la_oenb[45] VDD 0.63fF
C895 la_data_out[45] VDD 0.63fF
C896 la_data_in[45] VDD 0.63fF
C897 la_oenb[44] VDD 0.63fF
C898 la_data_out[44] VDD 0.63fF
C899 la_data_in[44] VDD 0.63fF
C900 la_oenb[43] VDD 0.63fF
C901 la_data_out[43] VDD 0.63fF
C902 la_data_in[43] VDD 0.63fF
C903 la_oenb[42] VDD 0.63fF
C904 la_data_out[42] VDD 0.63fF
C905 la_data_in[42] VDD 0.63fF
C906 la_oenb[41] VDD 0.63fF
C907 la_data_out[41] VDD 0.63fF
C908 la_data_in[41] VDD 0.63fF
C909 la_oenb[40] VDD 0.63fF
C910 la_data_out[40] VDD 0.63fF
C911 la_data_in[40] VDD 0.63fF
C912 la_oenb[39] VDD 0.63fF
C913 la_data_out[39] VDD 0.63fF
C914 la_data_in[39] VDD 0.63fF
C915 la_oenb[38] VDD 0.63fF
C916 la_data_out[38] VDD 0.63fF
C917 la_data_in[38] VDD 0.63fF
C918 la_oenb[37] VDD 0.63fF
C919 la_data_out[37] VDD 0.63fF
C920 la_data_in[37] VDD 0.63fF
C921 la_oenb[36] VDD 0.63fF
C922 la_data_out[36] VDD 0.63fF
C923 la_data_in[36] VDD 0.63fF
C924 la_oenb[35] VDD 0.63fF
C925 la_data_out[35] VDD 0.63fF
C926 la_data_in[35] VDD 0.63fF
C927 la_oenb[34] VDD 0.63fF
C928 la_data_out[34] VDD 0.63fF
C929 la_data_in[34] VDD 0.63fF
C930 la_oenb[33] VDD 0.63fF
C931 la_data_out[33] VDD 0.63fF
C932 la_data_in[33] VDD 0.63fF
C933 la_oenb[32] VDD 0.63fF
C934 la_data_out[32] VDD 0.63fF
C935 la_data_in[32] VDD 0.63fF
C936 la_oenb[31] VDD 0.63fF
C937 la_data_out[31] VDD 0.63fF
C938 la_data_in[31] VDD 0.63fF
C939 la_oenb[30] VDD 0.63fF
C940 la_data_out[30] VDD 0.63fF
C941 la_data_in[30] VDD 0.63fF
C942 la_oenb[29] VDD 0.63fF
C943 la_data_out[29] VDD 0.63fF
C944 la_data_in[29] VDD 0.63fF
C945 la_oenb[28] VDD 0.63fF
C946 la_data_out[28] VDD 0.63fF
C947 la_data_in[28] VDD 0.63fF
C948 la_oenb[27] VDD 0.63fF
C949 la_data_out[27] VDD 0.63fF
C950 la_data_in[27] VDD 0.63fF
C951 la_oenb[26] VDD 0.63fF
C952 la_data_out[26] VDD 0.63fF
C953 la_data_in[26] VDD 0.63fF
C954 la_oenb[25] VDD 0.63fF
C955 la_data_out[25] VDD 0.63fF
C956 la_data_in[25] VDD 0.63fF
C957 la_oenb[24] VDD 0.63fF
C958 la_data_out[24] VDD 0.63fF
C959 la_data_in[24] VDD 0.63fF
C960 la_oenb[23] VDD 0.63fF
C961 la_data_out[23] VDD 0.63fF
C962 la_data_in[23] VDD 0.63fF
C963 la_oenb[22] VDD 0.63fF
C964 la_data_out[22] VDD 0.63fF
C965 la_data_in[22] VDD 0.63fF
C966 la_oenb[21] VDD 0.63fF
C967 la_data_out[21] VDD 0.63fF
C968 la_data_in[21] VDD 0.63fF
C969 la_oenb[20] VDD 0.63fF
C970 la_data_out[20] VDD 0.63fF
C971 la_data_in[20] VDD 0.63fF
C972 la_oenb[19] VDD 0.63fF
C973 la_data_out[19] VDD 0.63fF
C974 la_data_in[19] VDD 0.63fF
C975 la_oenb[18] VDD 0.63fF
C976 la_data_out[18] VDD 0.63fF
C977 la_data_in[18] VDD 0.63fF
C978 la_oenb[17] VDD 0.63fF
C979 la_data_out[17] VDD 0.63fF
C980 la_data_in[17] VDD 0.63fF
C981 la_oenb[16] VDD 0.63fF
C982 la_data_out[16] VDD 0.63fF
C983 la_data_in[16] VDD 0.63fF
C984 la_oenb[15] VDD 0.63fF
C985 la_data_out[15] VDD 0.63fF
C986 la_data_in[15] VDD 0.63fF
C987 la_oenb[14] VDD 0.63fF
C988 la_data_out[14] VDD 0.63fF
C989 la_data_in[14] VDD 0.63fF
C990 la_oenb[13] VDD 0.63fF
C991 la_data_out[13] VDD 0.63fF
C992 la_data_in[13] VDD 0.63fF
C993 la_oenb[12] VDD 0.63fF
C994 la_data_out[12] VDD 0.63fF
C995 la_data_in[12] VDD 0.63fF
C996 la_oenb[11] VDD 0.63fF
C997 la_data_out[11] VDD 0.63fF
C998 la_data_in[11] VDD 0.63fF
C999 la_oenb[10] VDD 0.63fF
C1000 la_data_out[10] VDD 0.63fF
C1001 la_data_in[10] VDD 0.63fF
C1002 la_oenb[9] VDD 0.63fF
C1003 la_data_out[9] VDD 0.63fF
C1004 la_data_in[9] VDD 0.63fF
C1005 la_oenb[8] VDD 0.63fF
C1006 la_data_out[8] VDD 0.63fF
C1007 la_data_in[8] VDD 0.63fF
C1008 la_oenb[7] VDD 0.63fF
C1009 la_data_out[7] VDD 0.63fF
C1010 la_data_in[7] VDD 0.63fF
C1011 la_oenb[6] VDD 0.63fF
C1012 la_data_out[6] VDD 0.63fF
C1013 la_data_in[6] VDD 0.63fF
C1014 la_oenb[5] VDD 0.63fF
C1015 la_data_out[5] VDD 0.63fF
C1016 la_data_in[5] VDD 0.63fF
C1017 la_oenb[4] VDD 0.63fF
C1018 la_data_out[4] VDD 0.63fF
C1019 la_data_in[4] VDD 0.63fF
C1020 la_oenb[3] VDD 0.63fF
C1021 la_data_out[3] VDD 0.63fF
C1022 la_data_in[3] VDD 0.63fF
C1023 la_oenb[2] VDD 0.63fF
C1024 la_data_out[2] VDD 0.63fF
C1025 la_data_in[2] VDD 0.63fF
C1026 la_oenb[1] VDD 0.63fF
C1027 la_data_out[1] VDD 0.63fF
C1028 la_data_in[1] VDD 0.63fF
C1029 la_oenb[0] VDD 0.63fF
C1030 la_data_out[0] VDD 0.63fF
C1031 la_data_in[0] VDD 0.63fF
C1032 wbs_dat_o[31] VDD 0.63fF
C1033 wbs_dat_i[31] VDD 0.63fF
C1034 wbs_adr_i[31] VDD 0.63fF
C1035 wbs_dat_o[30] VDD 0.63fF
C1036 wbs_dat_i[30] VDD 0.63fF
C1037 wbs_adr_i[30] VDD 0.63fF
C1038 wbs_dat_o[29] VDD 0.63fF
C1039 wbs_dat_i[29] VDD 0.63fF
C1040 wbs_adr_i[29] VDD 0.63fF
C1041 wbs_dat_o[28] VDD 0.63fF
C1042 wbs_dat_i[28] VDD 0.63fF
C1043 wbs_adr_i[28] VDD 0.63fF
C1044 wbs_dat_o[27] VDD 0.63fF
C1045 wbs_dat_i[27] VDD 0.63fF
C1046 wbs_adr_i[27] VDD 0.63fF
C1047 wbs_dat_o[26] VDD 0.63fF
C1048 wbs_dat_i[26] VDD 0.63fF
C1049 wbs_adr_i[26] VDD 0.63fF
C1050 wbs_dat_o[25] VDD 0.63fF
C1051 wbs_dat_i[25] VDD 0.63fF
C1052 wbs_adr_i[25] VDD 0.63fF
C1053 wbs_dat_o[24] VDD 0.63fF
C1054 wbs_dat_i[24] VDD 0.63fF
C1055 wbs_adr_i[24] VDD 0.63fF
C1056 wbs_dat_o[23] VDD 0.63fF
C1057 wbs_dat_i[23] VDD 0.63fF
C1058 wbs_adr_i[23] VDD 0.63fF
C1059 wbs_dat_o[22] VDD 0.63fF
C1060 wbs_dat_i[22] VDD 0.63fF
C1061 wbs_adr_i[22] VDD 0.63fF
C1062 wbs_dat_o[21] VDD 0.63fF
C1063 wbs_dat_i[21] VDD 0.63fF
C1064 wbs_adr_i[21] VDD 0.63fF
C1065 wbs_dat_o[20] VDD 0.63fF
C1066 wbs_dat_i[20] VDD 0.63fF
C1067 wbs_adr_i[20] VDD 0.63fF
C1068 wbs_dat_o[19] VDD 0.63fF
C1069 wbs_dat_i[19] VDD 0.63fF
C1070 wbs_adr_i[19] VDD 0.63fF
C1071 wbs_dat_o[18] VDD 0.63fF
C1072 wbs_dat_i[18] VDD 0.63fF
C1073 wbs_adr_i[18] VDD 0.63fF
C1074 wbs_dat_o[17] VDD 0.63fF
C1075 wbs_dat_i[17] VDD 0.63fF
C1076 wbs_adr_i[17] VDD 0.63fF
C1077 wbs_dat_o[16] VDD 0.63fF
C1078 wbs_dat_i[16] VDD 0.63fF
C1079 wbs_adr_i[16] VDD 0.63fF
C1080 wbs_dat_o[15] VDD 0.63fF
C1081 wbs_dat_i[15] VDD 0.63fF
C1082 wbs_adr_i[15] VDD 0.63fF
C1083 wbs_dat_o[14] VDD 0.63fF
C1084 wbs_dat_i[14] VDD 0.63fF
C1085 wbs_adr_i[14] VDD 0.63fF
C1086 wbs_dat_o[13] VDD 0.63fF
C1087 wbs_dat_i[13] VDD 0.63fF
C1088 wbs_adr_i[13] VDD 0.63fF
C1089 wbs_dat_o[12] VDD 0.63fF
C1090 wbs_dat_i[12] VDD 0.63fF
C1091 wbs_adr_i[12] VDD 0.63fF
C1092 wbs_dat_o[11] VDD 0.63fF
C1093 wbs_dat_i[11] VDD 0.63fF
C1094 wbs_adr_i[11] VDD 0.63fF
C1095 wbs_dat_o[10] VDD 0.63fF
C1096 wbs_dat_i[10] VDD 0.63fF
C1097 wbs_adr_i[10] VDD 0.63fF
C1098 wbs_dat_o[9] VDD 0.63fF
C1099 wbs_dat_i[9] VDD 0.63fF
C1100 wbs_adr_i[9] VDD 0.63fF
C1101 wbs_dat_o[8] VDD 0.63fF
C1102 wbs_dat_i[8] VDD 0.63fF
C1103 wbs_adr_i[8] VDD 0.63fF
C1104 wbs_dat_o[7] VDD 0.63fF
C1105 wbs_dat_i[7] VDD 0.63fF
C1106 wbs_adr_i[7] VDD 0.63fF
C1107 wbs_dat_o[6] VDD 0.63fF
C1108 wbs_dat_i[6] VDD 0.63fF
C1109 wbs_adr_i[6] VDD 0.63fF
C1110 wbs_dat_o[5] VDD 0.63fF
C1111 wbs_dat_i[5] VDD 0.63fF
C1112 wbs_adr_i[5] VDD 0.63fF
C1113 wbs_dat_o[4] VDD 0.63fF
C1114 wbs_dat_i[4] VDD 0.63fF
C1115 wbs_adr_i[4] VDD 0.63fF
C1116 wbs_sel_i[3] VDD 0.63fF
C1117 wbs_dat_o[3] VDD 0.63fF
C1118 wbs_dat_i[3] VDD 0.63fF
C1119 wbs_adr_i[3] VDD 0.63fF
C1120 wbs_sel_i[2] VDD 0.63fF
C1121 wbs_dat_o[2] VDD 0.63fF
C1122 wbs_dat_i[2] VDD 0.63fF
C1123 wbs_adr_i[2] VDD 0.63fF
C1124 wbs_sel_i[1] VDD 0.63fF
C1125 wbs_dat_o[1] VDD 0.63fF
C1126 wbs_dat_i[1] VDD 0.63fF
C1127 wbs_adr_i[1] VDD 0.63fF
C1128 wbs_sel_i[0] VDD 0.63fF
C1129 wbs_dat_o[0] VDD 0.63fF
C1130 wbs_dat_i[0] VDD 0.63fF
C1131 wbs_adr_i[0] VDD 0.63fF
C1132 wbs_we_i VDD 0.63fF
C1133 wbs_stb_i VDD 0.63fF
C1134 wbs_cyc_i VDD 0.63fF
C1135 wbs_ack_o VDD 0.63fF
C1136 wb_rst_i VDD 0.63fF
C1137 wb_clk_i VDD 0.63fF
C1138 divbuf_7/OUT VDD 363.82fF
C1139 divbuf_7/OUT5 VDD 350.37fF
C1140 divbuf_7/OUT4 VDD 133.72fF
C1141 divbuf_7/OUT3 VDD 34.03fF
C1142 divbuf_7/OUT2 VDD 8.71fF
C1143 divbuf_7/IN VDD 0.89fF
C1144 divbuf_7/a_492_n240# VDD 2.46fF **FLOATING
C1145 divbuf_6/OUT VDD 363.82fF
C1146 divbuf_6/OUT5 VDD 350.37fF
C1147 divbuf_6/OUT4 VDD 133.72fF
C1148 divbuf_6/OUT3 VDD 34.03fF
C1149 divbuf_6/OUT2 VDD 8.71fF
C1150 divbuf_6/IN VDD 0.89fF
C1151 divbuf_6/a_492_n240# VDD 2.46fF **FLOATING
C1152 divbuf_5/OUT VDD 363.82fF
C1153 divbuf_5/OUT5 VDD 350.37fF
C1154 divbuf_5/OUT4 VDD 133.72fF
C1155 divbuf_5/OUT3 VDD 34.03fF
C1156 divbuf_5/OUT2 VDD 8.71fF
C1157 divbuf_5/IN VDD 0.89fF
C1158 divbuf_5/a_492_n240# VDD 2.46fF **FLOATING
C1159 divbuf_4/OUT VDD 363.82fF
C1160 divbuf_4/OUT5 VDD 350.37fF
C1161 divbuf_4/OUT4 VDD 133.72fF
C1162 divbuf_4/OUT3 VDD 34.03fF
C1163 divbuf_4/OUT2 VDD 8.71fF
C1164 divbuf_4/IN VDD 0.89fF
C1165 divbuf_4/a_492_n240# VDD 2.46fF **FLOATING
C1166 divbuf_3/OUT VDD 363.82fF
C1167 divbuf_3/OUT5 VDD 350.37fF
C1168 divbuf_3/OUT4 VDD 133.72fF
C1169 divbuf_3/OUT3 VDD 34.03fF
C1170 divbuf_3/OUT2 VDD 8.71fF
C1171 divbuf_3/IN VDD 0.89fF
C1172 divbuf_3/a_492_n240# VDD 2.46fF **FLOATING
C1173 divbuf_2/OUT VDD 363.82fF
C1174 divbuf_2/OUT5 VDD 350.37fF
C1175 divbuf_2/OUT4 VDD 133.72fF
C1176 divbuf_2/OUT3 VDD 34.03fF
C1177 divbuf_2/OUT2 VDD 8.71fF
C1178 divbuf_2/IN VDD 0.89fF
C1179 divbuf_2/a_492_n240# VDD 2.46fF **FLOATING
C1180 divbuf_1/OUT VDD 363.82fF
C1181 divbuf_1/OUT5 VDD 350.37fF
C1182 divbuf_1/OUT4 VDD 133.72fF
C1183 divbuf_1/OUT3 VDD 34.03fF
C1184 divbuf_1/OUT2 VDD 8.71fF
C1185 divbuf_1/IN VDD 0.89fF
C1186 divbuf_1/a_492_n240# VDD 2.46fF **FLOATING
C1187 divbuf_0/OUT VDD 363.82fF
C1188 divbuf_0/OUT5 VDD 350.37fF
C1189 divbuf_0/OUT4 VDD 133.72fF
C1190 divbuf_0/OUT3 VDD 34.03fF
C1191 divbuf_0/OUT2 VDD 8.71fF
C1192 divbuf_0/IN VDD 0.89fF
C1193 divbuf_0/a_492_n240# VDD 2.46fF **FLOATING
C1194 ro_complete_0/cbank_2/v VDD 17.84fF
C1195 ro_complete_0/cbank_2/switch_5/vin VDD 0.78fF
C1196 ro_complete_0/cbank_2/switch_4/vin VDD 1.50fF
C1197 ro_complete_0/cbank_2/switch_2/vin VDD 1.30fF
C1198 ro_complete_0/cbank_2/switch_3/vin VDD 0.56fF
C1199 ro_complete_0/cbank_2/switch_1/vin VDD 1.14fF
C1200 ro_complete_0/cbank_2/switch_0/vin VDD 1.02fF
C1201 ro_complete_0/cbank_1/v VDD 16.34fF
C1202 ro_complete_0/cbank_1/switch_5/vin VDD 0.78fF
C1203 ro_complete_0/a0 VDD 7.88fF
C1204 ro_complete_0/cbank_1/switch_4/vin VDD 1.50fF
C1205 ro_complete_0/a1 VDD 5.39fF
C1206 ro_complete_0/cbank_1/switch_2/vin VDD 1.30fF
C1207 ro_complete_0/a3 VDD 6.85fF
C1208 ro_complete_0/cbank_1/switch_3/vin VDD 0.56fF
C1209 ro_complete_0/a2 VDD 5.48fF
C1210 ro_complete_0/cbank_1/switch_1/vin VDD 1.14fF
C1211 ro_complete_0/a4 VDD 5.36fF
C1212 ro_complete_0/cbank_1/switch_0/vin VDD 1.02fF
C1213 ro_complete_0/a5 VDD 5.19fF
C1214 ro_complete_0/cbank_0/v VDD 14.98fF
C1215 ro_complete_0/cbank_0/switch_5/vin VDD 0.78fF
C1216 ro_complete_0/cbank_0/switch_4/vin VDD 1.50fF
C1217 ro_complete_0/cbank_0/switch_2/vin VDD 1.30fF
C1218 ro_complete_0/cbank_0/switch_3/vin VDD 0.56fF
C1219 ro_complete_0/cbank_0/switch_1/vin VDD 1.14fF
C1220 ro_complete_0/cbank_0/switch_0/vin VDD 1.02fF
C1221 ro_complete_0/ro_var_extend_0/vcont VDD 0.27fF
C1222 ro_div_new_0/divider_0/and_0/Z1 VDD 0.74fF
C1223 ro_div_new_0/divider_0/and_0/B VDD 2.25fF
C1224 ro_div_new_0/divider_0/and_0/A VDD 2.19fF
C1225 ro_div_new_0/divider_0/and_0/out1 VDD 2.93fF
C1226 ro_div_new_0/divider_0/tspc_2/Z4 VDD 0.86fF
C1227 ro_div_new_0/divider_0/Out VDD 1.60fF
C1228 ro_div_new_0/divider_0/tspc_2/Z3 VDD 2.26fF
C1229 ro_div_new_0/divider_0/tspc_2/Z2 VDD 1.46fF
C1230 ro_div_new_0/divider_0/tspc_2/Z1 VDD 0.99fF
C1231 ro_div_new_0/divider_0/nor_0/B VDD 6.33fF
C1232 ro_div_new_0/divider_0/tspc_2/a_630_n680# VDD 1.14fF **FLOATING
C1233 ro_div_new_0/divider_0/tspc_1/Z4 VDD 0.86fF
C1234 ro_div_new_0/divider_0/tspc_1/Q VDD 3.12fF
C1235 ro_div_new_0/divider_0/tspc_1/Z3 VDD 2.26fF
C1236 ro_div_new_0/divider_0/tspc_1/Z2 VDD 1.46fF
C1237 ro_div_new_0/divider_0/tspc_1/Z1 VDD 0.99fF
C1238 ro_div_new_0/divider_0/nor_1/B VDD 7.05fF
C1239 ro_div_new_0/divider_0/tspc_1/a_630_n680# VDD 1.15fF **FLOATING
C1240 ro_div_new_0/divider_0/tspc_0/Z4 VDD 0.86fF
C1241 ro_div_new_0/divider_0/tspc_0/Q VDD 3.14fF
C1242 ro_div_new_0/divider_0/tspc_0/Z3 VDD 2.26fF
C1243 ro_div_new_0/divider_0/tspc_0/Z2 VDD 1.46fF
C1244 ro_div_new_0/divider_0/tspc_0/Z1 VDD 0.99fF
C1245 ro_div_new_0/divider_0/nor_1/A VDD 7.04fF
C1246 ro_div_new_0/divider_0/tspc_0/a_630_n680# VDD 1.15fF **FLOATING
C1247 ro_div_new_0/divider_0/clk VDD 23.58fF
C1248 ro_div_new_0/divider_0/prescaler_0/Out VDD 4.59fF
C1249 ro_div_new_0/divider_0/prescaler_0/nand_1/z1 VDD 0.36fF
C1250 ro_div_new_0/divider_0/prescaler_0/tspc_2/D VDD 2.64fF
C1251 ro_div_new_0/divider_0/prescaler_0/tspc_0/Q VDD 3.64fF
C1252 ro_div_new_0/divider_0/prescaler_0/tspc_1/Q VDD 3.61fF
C1253 ro_div_new_0/divider_0/prescaler_0/nand_0/z1 VDD 0.36fF
C1254 ro_div_new_0/divider_0/prescaler_0/tspc_0/D VDD 3.12fF
C1255 ro_div_new_0/divider_0/and_0/OUT VDD 5.62fF
C1256 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z4 VDD 0.86fF
C1257 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z3 VDD 2.26fF
C1258 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z2 VDD 1.46fF
C1259 ro_div_new_0/divider_0/prescaler_0/tspc_2/Z1 VDD 0.99fF
C1260 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_630_n680# VDD 1.16fF **FLOATING
C1261 ro_div_new_0/divider_0/prescaler_0/tspc_2/a_740_n680# VDD 2.11fF **FLOATING
C1262 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z4 VDD 0.86fF
C1263 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z3 VDD 2.26fF
C1264 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z2 VDD 1.48fF
C1265 ro_div_new_0/divider_0/prescaler_0/tspc_1/Z1 VDD 0.99fF
C1266 ro_div_new_0/divider_0/prescaler_0/tspc_1/a_630_n680# VDD 1.14fF **FLOATING
C1267 ro_div_new_0/divider_0/prescaler_0/m1_2700_2190# VDD 4.22fF **FLOATING
C1268 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z4 VDD 0.86fF
C1269 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z3 VDD 2.26fF
C1270 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z2 VDD 1.46fF
C1271 ro_div_new_0/divider_0/prescaler_0/tspc_0/Z1 VDD 0.99fF
C1272 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_630_n680# VDD 1.14fF **FLOATING
C1273 ro_div_new_0/divider_0/prescaler_0/tspc_0/a_740_n680# VDD 2.11fF **FLOATING
C1274 ro_div_new_0/divider_0/nor_1/Z1 VDD 1.34fF
C1275 ro_div_new_0/divider_0/nor_0/Z1 VDD 1.34fF
C1276 ro_div_new_0/divider_0/mc2 VDD 5.29fF
C1277 ro_div_new_0/ro_complete_0/cbank_2/v VDD 17.84fF
C1278 ro_div_new_0/ro_complete_0/cbank_2/switch_5/vin VDD 0.78fF
C1279 ro_div_new_0/ro_complete_0/cbank_2/switch_4/vin VDD 1.50fF
C1280 ro_div_new_0/ro_complete_0/cbank_2/switch_2/vin VDD 1.30fF
C1281 ro_div_new_0/ro_complete_0/cbank_2/switch_3/vin VDD 0.56fF
C1282 ro_div_new_0/ro_complete_0/cbank_2/switch_1/vin VDD 1.14fF
C1283 ro_div_new_0/ro_complete_0/cbank_2/switch_0/vin VDD 1.02fF
C1284 ro_div_new_0/ro_complete_0/cbank_1/switch_5/vin VDD 0.78fF
C1285 ro_div_new_0/ro_complete_0/a0 VDD 7.88fF
C1286 ro_div_new_0/ro_complete_0/cbank_1/switch_4/vin VDD 1.50fF
C1287 ro_div_new_0/ro_complete_0/a1 VDD 5.39fF
C1288 ro_div_new_0/ro_complete_0/cbank_1/switch_2/vin VDD 1.30fF
C1289 ro_div_new_0/ro_complete_0/a3 VDD 6.85fF
C1290 ro_div_new_0/ro_complete_0/cbank_1/switch_3/vin VDD 0.56fF
C1291 ro_div_new_0/ro_complete_0/a2 VDD 5.48fF
C1292 ro_div_new_0/ro_complete_0/cbank_1/switch_1/vin VDD 1.14fF
C1293 ro_div_new_0/ro_complete_0/a4 VDD 5.36fF
C1294 ro_div_new_0/ro_complete_0/cbank_1/switch_0/vin VDD 1.02fF
C1295 ro_div_new_0/ro_complete_0/a5 VDD 5.19fF
C1296 ro_div_new_0/ro_complete_0/cbank_0/v VDD 14.98fF
C1297 ro_div_new_0/ro_complete_0/cbank_0/switch_5/vin VDD 0.78fF
C1298 ro_div_new_0/ro_complete_0/cbank_0/switch_4/vin VDD 1.50fF
C1299 ro_div_new_0/ro_complete_0/cbank_0/switch_2/vin VDD 1.30fF
C1300 ro_div_new_0/ro_complete_0/cbank_0/switch_3/vin VDD 0.56fF
C1301 ro_div_new_0/ro_complete_0/cbank_0/switch_1/vin VDD 1.14fF
C1302 ro_div_new_0/ro_complete_0/cbank_0/switch_0/vin VDD 1.02fF
C1303 ro_div_new_0/ro_complete_0/ro_var_extend_0/vcont VDD 0.27fF
.ends