drc-error-fix
diff --git a/gds/user_analog_project_wrapper.gds.gz b/gds/user_analog_project_wrapper.gds.gz index 4e92997..8751e9b 100644 --- a/gds/user_analog_project_wrapper.gds.gz +++ b/gds/user_analog_project_wrapper.gds.gz Binary files differ
diff --git a/mag/div_pd_buffered.mag b/mag/div_pd_buffered.mag index 532fc65..cd2fdd1 100644 --- a/mag/div_pd_buffered.mag +++ b/mag/div_pd_buffered.mag
@@ -1,6 +1,6 @@ magic tech sky130A -timestamp 1647810727 +timestamp 1647818636 << locali >> rect 5076 1340 5818 1489 rect 4847 790 4958 799 @@ -47,7 +47,7 @@ rect -525 -188 32 -172 rect 2050 -174 7557 -172 rect 2050 -175 4971 -174 -rect -525 -2102 -380 -188 +rect -525 -2184 -380 -188 rect -60 -316 29 -314 rect -60 -318 4956 -316 rect 7862 -318 7951 -163 @@ -60,26 +60,26 @@ rect -143 -873 -108 -742 rect 13 -873 50 -742 rect -143 -897 50 -873 -rect -542 -2128 -354 -2102 -rect -542 -2252 -518 -2128 -rect -384 -2252 -354 -2128 -rect -542 -2273 -354 -2252 +rect -542 -2210 -354 -2184 +rect -542 -2334 -518 -2210 +rect -384 -2334 -354 -2210 +rect -542 -2355 -354 -2334 << via1 >> rect -467 568 -308 730 rect 5403 454 5518 550 rect -108 -873 13 -742 -rect -518 -2252 -384 -2128 +rect -518 -2334 -384 -2210 << metal2 >> -rect -590 6498 -406 6516 -rect -590 6365 -571 6498 -rect -425 6365 -406 6498 -rect -590 6349 -406 6365 -rect -552 1658 -444 6349 -rect -275 5109 -121 5121 -rect -275 4994 -259 5109 -rect -133 4994 -121 5109 -rect -275 4980 -121 4994 -rect -244 3039 -161 4980 +rect -590 6544 -406 6562 +rect -590 6411 -571 6544 +rect -425 6411 -406 6544 +rect -590 6395 -406 6411 +rect -552 1658 -444 6395 +rect -275 5143 -121 5155 +rect -275 5028 -259 5143 +rect -133 5028 -121 5143 +rect -275 5014 -121 5028 +rect -244 3039 -161 5014 rect -42 3574 90 3586 rect -42 3473 -30 3574 rect 77 3473 90 3574 @@ -120,26 +120,26 @@ rect -143 -873 -108 -742 rect 13 -873 50 -742 rect -143 -897 50 -873 -rect -542 -2128 -354 -2102 -rect -542 -2252 -518 -2128 -rect -384 -2150 -354 -2128 -rect -384 -2244 56 -2150 -rect -384 -2252 -354 -2244 -rect -542 -2273 -354 -2252 +rect -542 -2210 -354 -2184 +rect -542 -2334 -518 -2210 +rect -384 -2232 -354 -2210 +rect -384 -2326 56 -2232 +rect -384 -2334 -354 -2326 +rect -542 -2355 -354 -2334 << via2 >> -rect -571 6365 -425 6498 -rect -259 4994 -133 5109 +rect -571 6411 -425 6544 +rect -259 5028 -133 5143 rect -30 3473 77 3574 rect -467 568 -308 730 << metal3 >> -rect -590 6498 -406 6516 -rect -590 6365 -571 6498 -rect -425 6365 -406 6498 -rect -590 6349 -406 6365 -rect -275 5109 -121 5121 -rect -275 4994 -259 5109 -rect -133 4994 -121 5109 -rect -275 4980 -121 4994 +rect -590 6544 -406 6562 +rect -590 6411 -571 6544 +rect -425 6411 -406 6544 +rect -590 6395 -406 6411 +rect -275 5143 -121 5155 +rect -275 5028 -259 5143 +rect -133 5028 -121 5143 +rect -275 5014 -121 5028 rect -42 3574 90 3586 rect -42 3473 -30 3574 rect 77 3473 90 3574 @@ -149,25 +149,25 @@ rect -308 568 -295 730 rect -480 552 -295 568 << via3 >> -rect -571 6365 -425 6498 -rect -259 4994 -133 5109 +rect -571 6411 -425 6544 +rect -259 5028 -133 5143 rect -30 3473 77 3574 rect -467 568 -308 730 << metal4 >> -rect -926 6659 308 6794 -rect -924 6016 -768 6659 -rect -590 6498 61 6532 -rect -590 6365 -571 6498 -rect -425 6365 61 6498 -rect -590 6349 61 6365 -rect -929 5424 -768 6016 -rect -929 5415 308 5424 -rect -926 5289 308 5415 -rect -924 4075 -768 5289 -rect -275 5109 63 5137 -rect -275 4994 -259 5109 -rect -133 4994 63 5109 -rect -275 4980 63 4994 +rect -926 6671 308 6806 +rect -924 6050 -768 6671 +rect -590 6544 61 6578 +rect -590 6411 -571 6544 +rect -425 6411 61 6544 +rect -590 6395 61 6411 +rect -929 5458 -768 6050 +rect -929 5449 308 5458 +rect -926 5323 308 5449 +rect -924 4075 -768 5323 +rect -275 5143 63 5171 +rect -275 5028 -259 5143 +rect -133 5028 63 5143 +rect -275 5014 63 5028 rect -570 4075 67 4078 rect -924 3936 354 4075 rect -924 3931 -287 3936 @@ -194,50 +194,50 @@ rect -480 552 -295 568 rect 8466 -612 8575 1369 rect -924 -1134 329 -959 -rect -924 -2333 -768 -1134 -rect -947 -2508 293 -2333 +rect -924 -2415 -768 -1134 +rect -947 -2590 293 -2415 << metal5 >> -rect 186 6072 404 6077 -rect 179 5655 414 6072 -rect 186 4503 404 4707 -rect 145 -1871 363 -1667 +rect 186 6118 404 6123 +rect 179 5689 414 6118 +rect 186 4503 404 4741 +rect 145 -1953 363 -1667 +use tapered_buf tapered_buf_3 +timestamp 1647818295 +transform 1 0 429 0 1 -2316 +box -470 -910 43675 401 use tapered_buf tapered_buf_4 -timestamp 1647784636 -transform 1 0 473 0 1 6893 -box -470 -910 43675 400 +timestamp 1647818295 +transform 1 0 473 0 1 6939 +box -470 -910 43675 401 +use tapered_buf tapered_buf_1 +timestamp 1647818295 +transform 1 0 473 0 1 5557 +box -470 -910 43675 401 use pd pd_1 -timestamp 1647810585 +timestamp 1647818636 transform 1 0 6015 0 1 779 box -215 -855 1685 810 +use tapered_buf tapered_buf_0 +timestamp 1647818295 +transform 1 0 468 0 1 4170 +box -470 -910 43675 401 +use tapered_buf tapered_buf_2 +timestamp 1647818295 +transform 1 0 434 0 1 -881 +box -470 -910 43675 401 use divider divider_0 timestamp 1647769399 transform 1 0 489 0 1 316 box -490 -235 4690 2150 -use tapered_buf tapered_buf_1 -timestamp 1647784636 -transform 1 0 473 0 1 5523 -box -470 -910 43675 400 -use tapered_buf tapered_buf_0 -timestamp 1647784636 -transform 1 0 468 0 1 4170 -box -470 -910 43675 400 -use tapered_buf tapered_buf_3 -timestamp 1647784636 -transform 1 0 429 0 1 -2234 -box -470 -910 43675 400 -use tapered_buf tapered_buf_2 -timestamp 1647784636 -transform 1 0 434 0 1 -881 -box -470 -910 43675 400 << labels >> rlabel space 40 -1345 40 -1345 1 up -rlabel space -14 -2692 -14 -2692 1 down rlabel space 48 4207 48 4207 1 ref -rlabel space 64 5553 64 5553 1 div -rlabel space 64 6923 64 6923 1 div -rlabel space 18 6944 18 6944 1 clk -rlabel space 32 5564 32 5564 1 mc2 rlabel space 13 4217 13 4217 1 ref rlabel metal4 8501 2091 8501 2091 1 vdd! rlabel metal4 -877 1968 -877 1968 1 gnd! +rlabel space 64 5587 64 5587 1 div +rlabel space 32 5598 32 5598 1 mc2 +rlabel space 64 6935 64 6935 1 div +rlabel space 18 6956 18 6956 1 clk +rlabel space -14 -2774 -14 -2774 1 down << end >>
diff --git a/mag/tapered_buf.mag b/mag/tapered_buf.mag index 2b0da57..878b2ab 100644 --- a/mag/tapered_buf.mag +++ b/mag/tapered_buf.mag
@@ -1,16 +1,12 @@ magic tech sky130A -timestamp 1647815768 +timestamp 1647818295 << nwell >> -rect -98 383 140 404 -rect -98 358 141 383 -rect -98 319 29689 358 -rect -66 317 29689 319 -rect -35 306 29689 317 +rect 142 316 29689 358 +rect -35 306 29689 316 rect -35 85 29690 306 rect 35 -709 43675 -470 -rect 31 -710 43675 -709 -rect 31 -887 43660 -710 +rect 31 -887 43675 -709 << nmos >> rect 275 0 290 50 rect 360 0 375 50 @@ -77001,15 +76997,14 @@ rect 41059 -829 41114 -782 rect 43069 -835 43124 -788 << metal4 >> -rect -98 383 140 404 -rect -284 370 -250 378 -rect -98 370 141 383 -rect -284 358 141 370 -rect -284 335 29689 358 -rect -284 200 -230 335 -rect -100 319 29689 335 -rect -100 318 25811 319 -rect -100 285 1071 318 +rect -280 335 -70 401 +rect -280 200 -230 335 +rect -100 296 -70 335 +rect 142 319 29689 358 +rect 142 318 25811 319 +rect 142 316 1071 318 +rect -35 296 1071 316 +rect -100 285 1071 296 rect -100 240 210 285 rect 270 240 550 285 rect 610 240 745 285 @@ -77103,8 +77098,8 @@ rect -100 235 29670 237 rect -100 205 180 235 rect -100 200 -80 205 -rect -284 159 -80 200 -rect -260 140 -80 159 +rect -280 150 -80 200 +rect -260 140 -80 150 rect 295 105 705 110 rect 295 60 305 105 rect 345 60 475 105 @@ -77932,12 +77927,10 @@ rect -230 200 -100 335 rect -235 -805 -105 -670 << metal5 >> -rect -280 378 -70 400 -rect -284 335 -70 378 -rect -284 200 -230 335 +rect -280 335 -70 401 +rect -280 200 -230 335 rect -100 200 -70 335 -rect -284 159 -70 200 -rect -280 -670 -70 159 +rect -280 -670 -70 200 rect -280 -805 -235 -670 rect -105 -805 -70 -670 rect -280 -910 -70 -805
diff --git a/netgen/user_analog_project_wrapper.spice b/netgen/user_analog_project_wrapper.spice index 1ef2fac..1b30017 100644 --- a/netgen/user_analog_project_wrapper.spice +++ b/netgen/user_analog_project_wrapper.spice
@@ -106,1948 +106,1948 @@ + wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6] + wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3] + wbs_stb_i wbs_we_i -C0 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/a_160_230# 0.09fF -C1 cp_buffered_0/tapered_buf_1/a_4670_0# cp_buffered_0/tapered_buf_1/a_210_n610# 29.21fF -C2 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF -C3 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a1 0.14fF -C4 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF -C5 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a3 0.09fF -C6 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.20fF -C7 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF -C8 ro_complete_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF -C9 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF -C10 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_160_n140# 0.17fF -C11 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF -C12 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.38fF -C13 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.11fF -C14 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/vco 1.46fF -C15 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.24fF -C16 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_160_230# 0.17fF -C17 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/div 0.65fF -C18 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_4670_0# 29.21fF -C19 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/A 0.01fF -C20 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/tspc_0/Q 0.05fF -C21 pd_buffered_0/tapered_buf_3/a_210_n610# pd_buffered_0/tapered_buf_3/out 26.29fF -C22 pd_buffered_0/tapered_buf_2/a_n10_230# pd_buffered_0/tapered_buf_2/in 0.02fF -C23 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C24 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF -C25 divider_1/nor_1/B divider_1/tspc_2/Z4 0.02fF -C26 cp_buffered_0/tapered_buf_2/in cp_buffered_0/tapered_buf_2/a_160_n140# 0.19fF -C27 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF -C28 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF -C29 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/vco 0.01fF -C30 divider_0/nor_0/Z1 divider_0/and_0/B 0.78fF -C31 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/a_160_230# 0.09fF -C32 cp_buffered_0/tapered_buf_0/a_4670_0# cp_buffered_0/tapered_buf_0/a_210_n610# 29.21fF -C33 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/div 0.65fF -C34 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z2 0.11fF -C35 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF -C36 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF -C37 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z1 0.08fF -C38 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/v 0.08fF -C39 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.09fF -C40 div_pd_buffered_0/tapered_buf_3/a_4670_0# div_pd_buffered_0/tapered_buf_3/a_1650_0# 4.78fF -C41 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF -C42 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF -C43 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/vco 0.01fF -C44 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D div_pd_buffered_0/divider_0/clk 0.26fF -C45 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF -C46 cp_buffered_0/tapered_buf_2/a_1650_0# cp_buffered_0/tapered_buf_2/a_210_n610# 2.89fF -C47 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_n10_n140# 0.05fF -C48 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_210_n610# 0.84fF -C49 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/div 0.12fF -C50 pd_buffered_0/pd_0/tspc_r_0/Z1 pd_buffered_0/pd_0/tspc_r_0/Z2 0.71fF -C51 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z4 0.20fF -C52 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF -C53 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF -C54 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z3 0.05fF -C55 divider_1/nor_0/B divider_1/tspc_2/Z1 0.03fF -C56 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/vco 1.36fF -C57 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/tspc_r_1/z5 0.03fF -C58 div_pd_buffered_0/pd_0/tspc_r_1/Z2 div_pd_buffered_0/pd_0/R 0.21fF -C59 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/UP 0.03fF -C60 ro_complete_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 2.89fF -C61 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C62 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/div 0.12fF -C63 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF -C64 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z2 0.01fF -C65 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C66 divider_0/tspc_0/Z4 divider_0/tspc_0/Z3 0.65fF -C67 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/ref 0.65fF -C68 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_1650_0# 1.27fF -C69 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/a_160_n140# 0.05fF -C70 pd_buffered_0/tapered_buf_0/a_1650_0# pd_buffered_0/tapered_buf_0/a_4670_0# 4.78fF -C71 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/tapered_buf_0/a_160_230# 0.17fF -C72 pd_buffered_0/pd_0/tspc_r_0/Z4 pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF -C73 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/DOWN 0.11fF -C74 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z1 0.17fF -C75 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/ref 0.02fF -C76 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/a_630_n680# 0.35fF -C77 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF -C78 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C79 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF -C80 div_pd_buffered_0/tapered_buf_4/a_n10_n140# div_pd_buffered_0/tapered_buf_4/a_160_n140# 0.05fF -C81 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/out 0.61fF -C82 pll_full_1/pd_0/tspc_r_0/Qbar pll_full_1/pd_0/UP 0.21fF -C83 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z4 0.12fF -C84 ro_complete_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 2.89fF -C85 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.05fF -C86 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z4 0.36fF -C87 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Q 0.05fF -C88 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C89 divider_1/tspc_0/Q divider_1/tspc_0/a_630_n680# 0.04fF -C90 divider_0/and_0/OUT divider_0/and_0/B 0.01fF -C91 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF -C92 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C93 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF -C94 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C95 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF -C96 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/vco 1.46fF -C97 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/D 0.03fF -C98 divider_0/nor_1/A divider_0/prescaler_0/tspc_1/Q 0.03fF -C99 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/DOWN 0.02fF -C100 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/tspc_r_0/Qbar 0.01fF -C101 ro_complete_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 2.89fF -C102 ro_complete_0/a3 ro_complete_0/cbank_2/switch_1/vin 0.13fF -C103 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF -C104 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.36fF -C105 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z4 0.15fF -C106 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/tapered_buf_1/in 0.05fF -C107 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF -C108 divider_0/tspc_0/Z4 divider_0/tspc_0/Z2 0.36fF -C109 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF -C110 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF -C111 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C112 divider_0/nor_1/B divider_0/and_0/A 0.26fF -C113 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_1/Z3 0.27fF -C114 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/D 0.05fF -C115 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C116 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C117 div_pd_buffered_0/tapered_buf_3/a_210_n610# div_pd_buffered_0/divider_0/mc2 26.29fF -C118 divider_0/nor_1/A divider_0/tspc_0/Q 0.55fF -C119 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.38fF -C120 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF -C121 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.03fF -C122 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/in 0.19fF -C123 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF -C124 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/ro_complete_0/cbank_2/v 0.04fF -C125 div_pd_buffered_0/divider_0/tspc_2/Z2 div_pd_buffered_0/divider_0/tspc_2/Z4 0.36fF -C126 divider_0/nor_1/B divider_0/tspc_1/Z3 0.38fF -C127 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/a_630_n680# 0.12fF -C128 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin ro_complete_buffered_0/tapered_buf_1/in 1.43fF -C129 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_0/Q 0.01fF -C130 divider_0/prescaler_0/Out divider_0/tspc_0/Z3 0.45fF -C131 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF -C132 pd_buffered_0/tapered_buf_2/a_160_230# pd_buffered_0/tapered_buf_2/a_580_0# 0.02fF -C133 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_1/Qbar1 0.01fF -C134 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/R 0.30fF -C135 divider_1/tspc_1/Z1 divider_1/tspc_1/Z2 1.07fF -C136 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/tapered_buf_0/in 0.19fF -C137 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/R 0.29fF -C138 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF -C139 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C140 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF -C141 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF -C142 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/vco 0.11fF -C143 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF -C144 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C145 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF -C146 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF -C147 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/a_n10_n140# 0.01fF -C148 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_210_n610# 0.22fF -C149 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/nor_1/B 0.38fF -C150 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z1 0.00fF -C151 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.12fF -C152 pll_full_1/ro_complete_0/a2 pll_full_1/vco 0.11fF -C153 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF -C154 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z4 0.12fF -C155 divider_0/nor_1/B divider_0/tspc_1/Z4 0.21fF -C156 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF -C157 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z3 0.05fF -C158 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z1 0.03fF -C159 divider_1/tspc_0/Q divider_1/nor_1/A 0.55fF -C160 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_1/z1 0.21fF -C161 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF -C162 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF -C163 cp_buffered_0/cp_0/a_1710_0# cp_buffered_0/cp_0/down 0.32fF -C164 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF -C165 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF -C166 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/div 0.02fF -C167 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a1 0.14fF -C168 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_2/Z4 0.02fF -C169 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C170 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/clk 0.45fF -C171 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/in 0.19fF -C172 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF -C173 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C174 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.04fF -C175 pll_full_1/ro_complete_0/cbank_1/switch_0/vin pll_full_1/vco 1.58fF -C176 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/UP 0.33fF -C177 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.35fF -C178 divider_0/prescaler_0/Out divider_0/tspc_0/Z2 0.11fF -C179 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF -C180 divider_1/prescaler_0/tspc_0/Z2 divider_1/and_0/OUT 0.06fF -C181 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF -C182 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF -C183 divider_1/tspc_1/Q divider_1/tspc_2/Z1 0.01fF -C184 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF -C185 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF -C186 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_1650_0# 1.27fF -C187 ro_complete_0/a5 ro_complete_0/cbank_2/switch_0/vin 0.09fF -C188 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C189 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z3 0.65fF -C190 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/D 0.03fF -C191 pd_buffered_0/tapered_buf_3/a_4670_0# pd_buffered_0/tapered_buf_3/a_210_n610# 29.21fF -C192 div_pd_buffered_0/tapered_buf_2/a_4670_0# div_pd_buffered_0/tapered_buf_2/a_210_n610# 29.21fF -C193 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF -C194 div_pd_buffered_0/tapered_buf_3/a_210_n610# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.22fF -C195 divider_1/mc2 divider_1/and_0/A 0.16fF -C196 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/tspc_r_0/z5 0.20fF -C197 pll_full_1/pd_0/R pll_full_1/pd_0/UP 0.46fF -C198 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF -C199 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C200 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z4 0.12fF -C201 divider_1/tspc_2/Z1 divider_1/tspc_2/Z2 1.07fF -C202 divider_1/nor_0/B divider_1/tspc_2/Z3 0.38fF -C203 div_pd_buffered_0/pd_0/tspc_r_1/Z2 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.14fF -C204 pll_full_1/ro_complete_0/cbank_2/switch_0/vin pll_full_1/ro_complete_0/cbank_2/v 1.45fF -C205 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/A 0.16fF -C206 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/and_0/OUT 0.14fF -C207 divider_0/nor_1/Z1 divider_0/and_0/A 0.80fF -C208 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF -C209 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/pd_0/DOWN 0.19fF -C210 divider_1/tspc_0/Q divider_1/tspc_0/Z3 0.05fF -C211 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF -C212 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.17fF -C213 divider_1/tspc_1/Z1 divider_1/tspc_1/Z4 0.00fF -C214 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z2 0.01fF -C215 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF -C216 pd_buffered_0/tapered_buf_0/a_580_0# pd_buffered_0/tapered_buf_0/a_210_n610# 0.84fF -C217 pd_buffered_0/tapered_buf_1/a_160_230# pd_buffered_0/tapered_buf_1/a_160_n140# 0.17fF -C218 pd_buffered_0/pd_0/tspc_r_0/z5 pd_buffered_0/pd_0/tspc_r_1/z5 0.02fF -C219 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z2 0.25fF -C220 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF -C221 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF -C222 io_clamp_high[0] io_analog[4] 0.53fF -C223 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z2 0.71fF -C224 divider_1/and_0/out1 divider_1/and_0/Z1 0.36fF -C225 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF -C226 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/in 0.19fF -C227 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.14fF -C228 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C229 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF -C230 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF -C231 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a3 3.17fF -C232 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF -C233 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.03fF -C234 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z2 0.36fF -C235 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.11fF -C236 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/clk 0.12fF -C237 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z2 0.19fF -C238 pll_full_1/div pll_full_1/vco 2.26fF -C239 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF -C240 divider_1/and_0/OUT divider_1/prescaler_0/nand_0/z1 0.01fF -C241 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/UP 1.06fF -C242 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF -C243 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C244 div_pd_buffered_0/pd_0/tspc_r_0/Z1 div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.71fF -C245 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.20fF -C246 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF -C247 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/in 0.19fF -C248 ro_complete_0/a2 ro_complete_0/cbank_1/v 0.05fF -C249 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/a0 0.13fF -C250 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/in 0.02fF -C251 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF -C252 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Q 0.55fF -C253 pll_full_1/ro_complete_0/cbank_1/switch_5/vin pll_full_1/vco 1.46fF -C254 div_pd_buffered_0/tapered_buf_0/a_580_0# div_pd_buffered_0/tapered_buf_0/a_210_n610# 0.84fF -C255 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/clk 0.45fF -C256 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/DOWN 0.12fF -C257 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/D 0.11fF -C258 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF -C259 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_2/D 0.16fF -C260 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.03fF -C261 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.12fF -C262 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_1/B 0.18fF -C263 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z4 0.12fF -C264 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF -C265 divider_1/nor_1/A divider_1/tspc_0/a_630_n680# 0.35fF -C266 divider_0/and_0/out1 divider_0/and_0/A 0.01fF -C267 divider_0/tspc_0/Z3 divider_0/tspc_0/Q 0.05fF -C268 divider_1/and_0/OUT divider_1/clk 0.04fF -C269 filter_0/a_4216_n5230# filter_0/v 0.91fF -C270 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_0/Q 0.14fF -C271 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/vco 0.01fF -C272 divider_0/nor_1/A divider_0/and_0/A 0.01fF -C273 div_pd_buffered_0/tapered_buf_1/a_n10_n140# div_pd_buffered_0/tapered_buf_1/a_160_n140# 0.05fF -C274 div_pd_buffered_0/pd_0/tspc_r_0/Z4 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF -C275 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/DOWN 0.11fF -C276 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z1 0.17fF -C277 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.43fF -C278 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF -C279 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.05fF -C280 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.08fF -C281 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF -C282 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z1 0.01fF -C283 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/Q 0.22fF -C284 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF -C285 divider_1/tspc_1/Z2 divider_1/tspc_1/Z3 0.16fF -C286 pll_full_0/divider_0/and_0/OUT pll_full_0/div 0.01fF -C287 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF -C288 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF -C289 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/a_160_230# 0.09fF -C290 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C291 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.16fF -C292 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/and_0/A 0.80fF -C293 pll_full_1/ro_complete_0/cbank_2/switch_5/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF -C294 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/R 0.29fF -C295 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF -C296 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C297 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C298 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z4 0.12fF -C299 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z2 1.07fF -C300 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z3 0.38fF -C301 div_pd_buffered_0/divider_0/and_0/B div_pd_buffered_0/divider_0/and_0/Z1 0.07fF -C302 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Qbar1 0.38fF -C303 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF -C304 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF -C305 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C306 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/a_630_n680# 0.05fF -C307 filter_0/a_4216_n2998# filter_0/v 0.36fF -C308 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/and_pd_0/Out1 0.12fF -C309 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/UP 0.21fF -C310 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.78fF -C311 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/vco 1.46fF -C312 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/D 0.15fF -C313 divider_0/nor_1/A divider_0/tspc_1/Z4 0.02fF -C314 divider_0/mc2 divider_0/and_0/A 0.16fF -C315 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.01fF -C316 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_580_0# 0.02fF -C317 ro_complete_0/a4 ro_complete_0/cbank_2/switch_1/vin 0.09fF -C318 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF -C319 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF -C320 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.35fF -C321 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_160_230# 0.17fF -C322 ro_complete_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.02fF -C323 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Z4 0.12fF -C324 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z2 0.01fF -C325 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Z3 0.38fF -C326 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 div_pd_buffered_0/divider_0/clk 0.12fF -C327 divider_0/nor_1/B divider_0/tspc_2/Z4 0.02fF -C328 divider_0/tspc_0/Z4 divider_0/tspc_0/Z1 0.00fF -C329 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF -C330 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/Z1 0.36fF -C331 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z2 0.25fF -C332 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_0/Z2 0.14fF -C333 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C334 divider_1/tspc_0/Z3 divider_1/tspc_0/a_630_n680# 0.05fF -C335 divider_1/nor_1/Z1 divider_1/nor_1/B 0.06fF -C336 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/Qbar 0.01fF -C337 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/ref 0.12fF -C338 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF -C339 div_pd_buffered_0/tapered_buf_2/in div_pd_buffered_0/divider_0/mc2 0.02fF -C340 divider_1/tspc_1/Q divider_1/tspc_2/Z3 0.45fF -C341 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/R 0.29fF -C342 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_580_0# 0.35fF -C343 div_pd_buffered_0/tapered_buf_1/out div_pd_buffered_0/tapered_buf_1/a_210_n610# 26.29fF -C344 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.06fF -C345 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.06fF -C346 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF -C347 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.12fF -C348 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/nand_0/z1 0.01fF -C349 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/vco 0.11fF -C350 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/nor_0/B 0.35fF -C351 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/clk 0.60fF -C352 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/a_630_n680# 0.19fF -C353 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z1 0.06fF -C354 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF -C355 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/DIV 0.51fF -C356 divider_1/prescaler_0/tspc_1/Z2 divider_1/and_0/OUT 0.06fF -C357 divider_1/tspc_2/Z2 divider_1/tspc_2/Z3 0.16fF -C358 divider_1/nor_0/B divider_1/tspc_2/Z4 0.22fF -C359 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.14fF -C360 ro_complete_buffered_0/tapered_buf_3/a_1650_0# ro_complete_buffered_0/tapered_buf_3/a_4670_0# 4.78fF -C361 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C362 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/a_160_230# 0.17fF -C363 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Z2 0.23fF -C364 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C365 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.16fF -C366 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF -C367 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_580_0# 0.35fF -C368 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF -C369 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_580_0# 0.35fF -C370 ro_complete_buffered_0/tapered_buf_1/a_580_0# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 1.27fF -C371 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.04fF -C372 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/div 0.03fF -C373 pll_full_1/divider_0/and_0/OUT pll_full_1/vco 0.06fF -C374 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF -C375 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_n10_n140# 0.05fF -C376 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 0.84fF -C377 pd_buffered_0/pd_0/REF pd_buffered_0/tapered_buf_0/a_210_n610# 26.29fF -C378 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/and_pd_0/Out1 0.05fF -C379 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/tspc_r_1/Qbar 0.01fF -C380 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/R 0.27fF -C381 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/a_630_n680# 0.05fF -C382 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/nor_1/B 0.03fF -C383 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF -C384 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF -C385 divider_1/tspc_1/Z3 divider_1/tspc_1/Z4 0.65fF -C386 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/Out 0.21fF -C387 divider_1/and_0/A divider_1/and_0/B 0.18fF -C388 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF -C389 ro_complete_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_2/a_580_0# 1.27fF -C390 ro_complete_0/a4 ro_complete_0/cbank_1/switch_1/vin 0.09fF -C391 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/switch_5/vin 0.20fF -C392 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF -C393 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF -C394 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/and_0/B 0.18fF -C395 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C396 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/vco 0.64fF -C397 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/Qbar 0.01fF -C398 divider_1/tspc_0/Z3 divider_1/nor_1/A 0.38fF -C399 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF -C400 divider_0/nor_0/B divider_0/tspc_2/Z1 0.03fF -C401 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z1 0.09fF -C402 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF -C403 pll_full_1/cp_0/upbar pll_full_1/cp_0/down 0.02fF -C404 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF -C405 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF -C406 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF -C407 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/vco 1.46fF -C408 divider_1/prescaler_0/tspc_2/D divider_1/prescaler_0/nand_0/z1 0.24fF -C409 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF -C410 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Q 0.05fF -C411 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.20fF -C412 div_pd_buffered_0/tapered_buf_2/a_580_0# div_pd_buffered_0/tapered_buf_2/a_210_n610# 0.84fF -C413 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/and_pd_0/Out1 0.18fF -C414 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF -C415 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/nor_1/A 0.21fF -C416 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C417 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF -C418 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.19fF -C419 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF -C420 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z4 0.14fF -C421 div_pd_buffered_0/divider_0/tspc_0/Z2 div_pd_buffered_0/divider_0/tspc_0/Z3 0.16fF -C422 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 div_pd_buffered_0/divider_0/clk 0.12fF -C423 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.09fF -C424 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.15fF -C425 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/and_0/A 0.01fF -C426 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF -C427 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF -C428 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF -C429 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z4 0.20fF -C430 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF -C431 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF -C432 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF -C433 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/vco 0.01fF -C434 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/ref 0.17fF -C435 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/tapered_buf_4/in 0.02fF -C436 divider_1/prescaler_0/tspc_2/D divider_1/clk 0.26fF -C437 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/ref 0.04fF -C438 div_pd_buffered_0/pd_0/tspc_r_0/z5 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.02fF -C439 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.25fF -C440 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/UP 0.03fF -C441 ro_complete_0/a0 ro_complete_0/cbank_1/switch_5/vin 0.09fF -C442 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z4 0.21fF -C443 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/tapered_buf_1/in 0.05fF -C444 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z3 0.45fF -C445 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Q 0.04fF -C446 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/A 0.26fF -C447 divider_0/tspc_1/Z2 divider_0/tspc_0/Q 0.14fF -C448 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/D 0.03fF -C449 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF -C450 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C451 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C452 pd_buffered_0/tapered_buf_2/a_1650_0# pd_buffered_0/tapered_buf_2/a_210_n610# 2.89fF -C453 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_580_0# 0.35fF -C454 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF -C455 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_4/vin 0.20fF -C456 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/Out 0.05fF -C457 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/UP 2.89fF -C458 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z1 0.71fF -C459 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/Z3 0.65fF -C460 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF -C461 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_1/Z4 0.02fF -C462 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.36fF -C463 divider_1/prescaler_0/Out divider_1/tspc_0/a_630_n680# 0.01fF -C464 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/a_630_n680# 0.12fF -C465 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF -C466 divider_0/prescaler_0/Out divider_0/prescaler_0/m1_2700_2190# 0.11fF -C467 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.45fF -C468 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z3 0.16fF -C469 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z4 0.22fF -C470 divider_1/mc2 divider_1/prescaler_0/tspc_2/a_630_n680# 0.33fF -C471 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/D 0.05fF -C472 pd_buffered_0/tapered_buf_1/a_580_0# pd_buffered_0/tapered_buf_1/a_1650_0# 1.27fF -C473 pd_buffered_0/tapered_buf_1/a_n10_n140# pd_buffered_0/pd_0/UP 0.04fF -C474 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF -C475 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Q 0.05fF -C476 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.12fF -C477 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_580_0# 0.35fF -C478 ro_complete_buffered_0/tapered_buf_3/a_1650_0# ro_complete_buffered_0/tapered_buf_3/a_210_n610# 2.89fF -C479 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_580_0# 0.84fF -C480 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/pd_0/UP 0.19fF -C481 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF -C482 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.12fF -C483 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF -C484 ro_complete_buffered_0/tapered_buf_0/a_580_0# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 0.84fF -C485 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.84fF -C486 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF -C487 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C488 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/a_630_n680# 0.01fF -C489 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_1/Z4 0.21fF -C490 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF -C491 pll_full_1/ro_complete_0/a0 pll_full_1/vco 0.11fF -C492 divider_0/tspc_0/Z4 divider_0/tspc_0/a_630_n680# 0.12fF -C493 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.06fF -C494 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF -C495 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF -C496 pll_full_1/divider_0/and_0/A pll_full_1/divider_0/and_0/B 0.18fF -C497 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF -C498 ro_complete_buffered_0/tapered_buf_4/a_210_n610# ro_complete_buffered_0/ro_complete_0/a2 26.29fF -C499 divider_1/tspc_1/Q divider_1/tspc_2/Z4 0.15fF -C500 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/UP 0.03fF -C501 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF -C502 ro_complete_buffered_0/tapered_buf_5/a_210_n610# ro_complete_buffered_0/ro_complete_0/a3 26.29fF -C503 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/tspc_2/a_630_n680# 0.04fF -C504 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/Z2 0.36fF -C505 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF -C506 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z1 0.00fF -C507 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/Out 0.28fF -C508 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/tapered_buf_1/in 0.05fF -C509 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/R 0.29fF -C510 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/Z1 0.04fF -C511 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z2 0.01fF -C512 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/clk 0.05fF -C513 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/divider_0/prescaler_0/nand_0/z1 0.24fF -C514 divider_1/prescaler_0/tspc_0/Z2 divider_1/clk 0.11fF -C515 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF -C516 divider_1/tspc_2/Z2 divider_1/tspc_2/Z4 0.36fF -C517 divider_1/tspc_2/Z3 divider_1/Out 0.05fF -C518 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_0/Q 0.01fF -C519 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/and_pd_0/Out1 0.12fF -C520 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/UP 0.21fF -C521 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/in 0.02fF -C522 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/in 0.19fF -C523 ro_complete_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_2/a_210_n610# 2.89fF -C524 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.13fF -C525 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.07fF -C526 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_1650_0# 1.27fF -C527 divider_1/tspc_1/a_630_n680# divider_1/nor_1/B 0.35fF -C528 divider_1/prescaler_0/Out divider_1/nor_1/A 0.15fF -C529 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/B 0.18fF -C530 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/vco 0.26fF -C531 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C532 divider_0/tspc_1/Q divider_0/tspc_2/Z1 0.01fF -C533 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z3 0.06fF -C534 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_1650_0# 2.89fF -C535 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/R 0.36fF -C536 pd_buffered_0/pd_0/tspc_r_1/Z1 pd_buffered_0/pd_0/tspc_r_1/Z2 0.71fF -C537 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z4 0.20fF -C538 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF -C539 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/nor_1/B 0.38fF -C540 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z1 0.00fF -C541 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF -C542 pll_full_0/ro_complete_0/a2 pll_full_0/vco 0.11fF -C543 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF -C544 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z1 0.03fF -C545 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/in 0.02fF -C546 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF -C547 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.09fF -C548 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C549 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a1 3.18fF -C550 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z3 0.45fF -C551 pll_full_1/ro_complete_0/a3 pll_full_1/vco 0.11fF -C552 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/nor_0/B 0.00fF -C553 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_0/Q 0.14fF -C554 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.05fF -C555 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/clk 0.01fF -C556 divider_0/prescaler_0/Out divider_0/tspc_0/a_630_n680# 0.01fF -C557 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C558 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF -C559 divider_1/tspc_0/Q divider_1/tspc_1/Z2 0.14fF -C560 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF -C561 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF -C562 divider_0/nor_0/B divider_0/tspc_2/Z3 0.38fF -C563 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/ro_complete_0/a0 26.29fF -C564 div_pd_buffered_0/tapered_buf_2/a_n10_230# div_pd_buffered_0/tapered_buf_2/a_160_230# 0.09fF -C565 divider_1/nor_1/B divider_1/nor_0/B 0.47fF -C566 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/Q 0.04fF -C567 divider_1/prescaler_0/tspc_1/Z3 divider_1/clk 0.45fF -C568 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF -C569 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/vco 1.58fF -C570 div_pd_buffered_0/tapered_buf_0/a_4670_0# div_pd_buffered_0/tapered_buf_0/a_1650_0# 4.78fF -C571 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/a_210_n610# 0.22fF -C572 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z3 0.06fF -C573 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/in 0.02fF -C574 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.11fF -C575 ro_complete_buffered_0/tapered_buf_1/a_160_n140# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.35fF -C576 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.05fF -C577 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/R 0.21fF -C578 divider_1/tspc_0/Z1 divider_1/nor_1/A 0.03fF -C579 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF -C580 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF -C581 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF -C582 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z1 0.09fF -C583 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z2 0.19fF -C584 div_pd_buffered_0/tapered_buf_2/in div_pd_buffered_0/tapered_buf_2/a_n10_n140# 0.04fF -C585 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF -C586 divider_0/mc2 divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF -C587 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z3 0.65fF -C588 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF -C589 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/and_pd_0/Out1 0.05fF -C590 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/tspc_r_1/Qbar 0.01fF -C591 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/R 0.27fF -C592 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_1/switch_3/vin 0.09fF -C593 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/nor_1/B 1.21fF -C594 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF -C595 ro_complete_0/a0 ro_complete_0/cbank_1/v 0.05fF -C596 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z3 0.06fF -C597 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z2 0.11fF -C598 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C599 divider_1/prescaler_0/Out divider_1/tspc_0/Z3 0.45fF -C600 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z1 0.00fF -C601 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z4 0.15fF -C602 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF -C603 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF -C604 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/R 0.03fF -C605 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_1/z5 0.03fF -C606 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/pd_0/tspc_r_1/Z2 0.71fF -C607 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.45fF -C608 divider_1/nor_1/A divider_1/prescaler_0/tspc_1/Q 0.03fF -C609 divider_1/tspc_1/Z1 divider_1/nor_1/B 0.03fF -C610 io_clamp_low[2] io_analog[6] 0.53fF -C611 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_1650_0# 1.27fF -C612 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z4 0.02fF -C613 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C614 ro_complete_buffered_0/tapered_buf_4/a_n10_n140# ro_complete_buffered_0/tapered_buf_4/in 0.04fF -C615 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/a_630_n680# 0.12fF -C616 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_210_n610# 0.84fF -C617 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_n10_n140# 0.05fF -C618 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/a_630_n680# 0.19fF -C619 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z3 0.11fF -C620 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z3 0.33fF -C621 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF -C622 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z4 0.36fF -C623 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/div 0.05fF -C624 divider_1/mc2 divider_1/nor_1/B 0.06fF -C625 divider_0/and_0/OUT divider_0/clk 0.04fF -C626 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF -C627 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C628 div_pd_buffered_0/tapered_buf_2/a_580_0# div_pd_buffered_0/tapered_buf_2/a_160_n140# 0.35fF -C629 pd_buffered_0/pd_0/tspc_r_0/z5 pd_buffered_0/pd_0/UP 0.03fF -C630 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF -C631 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z2 0.36fF -C632 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_1650_0# 1.27fF -C633 divider_1/prescaler_0/tspc_2/Z4 divider_1/prescaler_0/tspc_2/D 0.11fF -C634 div_pd_buffered_0/tapered_buf_4/a_4670_0# div_pd_buffered_0/tapered_buf_4/a_1650_0# 4.78fF -C635 pll_full_0/div pll_full_0/vco 2.26fF -C636 cp_buffered_0/tapered_buf_1/a_210_n610# cp_buffered_0/cp_0/out 26.29fF -C637 cp_buffered_0/tapered_buf_1/a_n10_n140# cp_buffered_0/tapered_buf_1/in 0.04fF -C638 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF -C639 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_1650_0# 1.27fF -C640 ro_complete_0/a2 ro_complete_0/cbank_2/switch_2/vin 0.14fF -C641 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF -C642 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF -C643 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.09fF -C644 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/DOWN 0.07fF -C645 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/and_0/B 0.08fF -C646 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/nor_0/B 0.22fF -C647 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.19fF -C648 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/clk 0.01fF -C649 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF -C650 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.06fF -C651 div_pd_buffered_0/tapered_buf_3/in div_pd_buffered_0/tapered_buf_3/a_n10_n140# 0.04fF -C652 divider_1/tspc_0/Z1 divider_1/tspc_0/Z3 0.06fF -C653 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF -C654 divider_0/tspc_1/Z3 divider_0/tspc_1/Q 0.05fF -C655 divider_1/tspc_0/Q divider_1/tspc_1/Z4 0.15fF -C656 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF -C657 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z3 0.16fF -C658 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/tapered_buf_0/a_580_0# 0.35fF -C659 divider_0/nor_1/A divider_0/nor_1/B 1.21fF -C660 pd_buffered_0/pd_0/and_pd_0/Z1 pd_buffered_0/pd_0/UP 0.06fF -C661 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/tspc_r_0/Qbar 0.01fF -C662 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Q 0.55fF -C663 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/vco 1.46fF -C664 divider_1/prescaler_0/tspc_2/Z3 divider_1/clk 0.45fF -C665 cp_buffered_0/tapered_buf_0/a_210_n610# cp_buffered_0/cp_0/down 26.29fF -C666 cp_buffered_0/tapered_buf_0/a_n10_n140# cp_buffered_0/tapered_buf_0/in 0.04fF -C667 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/R 0.27fF -C668 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/nor_0/B 0.42fF -C669 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# 0.05fF -C670 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.03fF -C671 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/nor_1/A 0.35fF -C672 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF -C673 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF -C674 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_4670_0# 4.78fF -C675 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.17fF -C676 ro_complete_0/a3 ro_complete_0/cbank_1/v 0.05fF -C677 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF -C678 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z2 0.40fF -C679 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D div_pd_buffered_0/divider_0/clk 0.29fF -C680 ro_complete_buffered_0/tapered_buf_1/a_160_n140# ro_complete_buffered_0/tapered_buf_1/in 0.19fF -C681 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 2.89fF -C682 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF -C683 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C684 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_2/Z4 0.02fF -C685 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF -C686 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/vco 0.45fF -C687 divider_1/prescaler_0/Out divider_1/clk 0.51fF -C688 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.15fF -C689 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Z4 0.65fF -C690 pll_full_1/cp_0/down pll_full_1/cp_0/a_1710_0# 0.32fF -C691 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z1 0.01fF -C692 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/Q 0.22fF -C693 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_4/vin 0.20fF -C694 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_160_230# 0.17fF -C695 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_580_0# 0.35fF -C696 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/R 0.01fF -C697 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Q 0.04fF -C698 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.06fF -C699 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF -C700 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.38fF -C701 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.11fF -C702 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/clk 0.11fF -C703 pd_buffered_0/tapered_buf_3/a_1650_0# pd_buffered_0/tapered_buf_3/a_4670_0# 4.78fF -C704 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.03fF -C705 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF -C706 divider_0/tspc_1/Q divider_0/tspc_2/Z3 0.45fF -C707 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Q 0.04fF -C708 divider_0/mc2 divider_0/nor_1/B 0.06fF -C709 divider_1/nor_1/B divider_1/tspc_1/Q 0.51fF -C710 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z4 0.00fF -C711 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Q 0.21fF -C712 divider_1/prescaler_0/tspc_1/Z2 divider_1/clk 0.11fF -C713 pd_buffered_0/tapered_buf_1/a_580_0# pd_buffered_0/tapered_buf_1/a_160_n140# 0.35fF -C714 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/tspc_r_1/z5 0.20fF -C715 pll_full_1/pd_0/DOWN pll_full_1/ref 1.48fF -C716 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF -C717 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/A 0.80fF -C718 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C719 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_160_230# 0.02fF -C720 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_210_n610# 0.22fF -C721 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF -C722 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF -C723 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z3 0.38fF -C724 divider_1/and_0/B divider_1/and_0/Z1 0.07fF -C725 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z2 0.25fF -C726 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF -C727 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.17fF -C728 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/nor_0/B 0.47fF -C729 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Z3 0.05fF -C730 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF -C731 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 2.89fF -C732 ro_complete_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.17fF -C733 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF -C734 divider_0/tspc_1/a_630_n680# divider_0/nor_0/B 0.00fF -C735 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF -C736 ro_complete_0/a2 ro_complete_0/cbank_2/v 0.05fF -C737 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF -C738 divider_0/nor_0/B divider_0/tspc_2/Z4 0.22fF -C739 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF -C740 divider_1/nor_1/B divider_1/tspc_2/Z2 0.20fF -C741 divider_1/prescaler_0/tspc_1/Z4 divider_1/clk 0.12fF -C742 pd_buffered_0/tapered_buf_0/in pd_buffered_0/tapered_buf_0/a_n10_n140# 0.04fF -C743 pd_buffered_0/tapered_buf_1/a_1650_0# pd_buffered_0/tapered_buf_1/a_4670_0# 4.78fF -C744 pd_buffered_0/tapered_buf_1/a_160_n140# pd_buffered_0/pd_0/UP 0.19fF -C745 pd_buffered_0/pd_0/and_pd_0/Out1 pd_buffered_0/pd_0/and_pd_0/Z1 0.18fF -C746 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF -C747 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF -C748 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_160_230# 0.02fF -C749 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_210_n610# 0.22fF -C750 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF -C751 div_pd_buffered_0/tapered_buf_1/a_n10_n140# div_pd_buffered_0/pd_0/DOWN 0.04fF -C752 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF -C753 div_pd_buffered_0/tapered_buf_1/a_4670_0# div_pd_buffered_0/tapered_buf_1/a_210_n610# 29.21fF -C754 ro_complete_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_2/a_580_0# 0.35fF -C755 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/out1 0.31fF -C756 div_pd_buffered_0/divider_0/tspc_1/Z4 div_pd_buffered_0/divider_0/tspc_0/Q 0.15fF -C757 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z3 0.65fF -C758 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/tapered_buf_1/in 0.05fF -C759 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_0/Q 0.01fF -C760 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.11fF -C761 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF -C762 div_pd_buffered_0/tapered_buf_3/a_n10_230# div_pd_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF -C763 divider_1/nor_1/A divider_1/tspc_1/Z2 0.15fF -C764 divider_1/mc2 divider_1/and_0/out1 0.06fF -C765 divider_0/and_0/A divider_0/and_0/B 0.18fF -C766 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF -C767 divider_1/tspc_2/a_630_n680# divider_1/nor_0/B 0.35fF -C768 divider_1/prescaler_0/tspc_1/Q divider_1/clk 0.60fF -C769 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF -C770 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/vco 0.11fF -C771 ro_complete_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_5/a_4670_0# 4.78fF -C772 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a4 0.12fF -C773 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_3/vin 0.09fF -C774 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/R 0.36fF -C775 div_pd_buffered_0/pd_0/tspc_r_1/Z1 div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.71fF -C776 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.20fF -C777 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF -C778 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/a_n10_230# 0.01fF -C779 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_580_0# 0.02fF -C780 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF -C781 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/out1 0.06fF -C782 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/nor_1/B 0.35fF -C783 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/Z4 0.36fF -C784 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/Q 0.05fF -C785 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Z2 0.01fF -C786 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/and_0/B 0.29fF -C787 div_pd_buffered_0/tapered_buf_3/a_4670_0# div_pd_buffered_0/tapered_buf_3/a_210_n610# 29.21fF -C788 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z2 0.19fF -C789 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z3 0.65fF -C790 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/vco 0.45fF -C791 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C792 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_0/z1 0.24fF -C793 divider_1/tspc_1/Z3 divider_1/nor_1/B 0.38fF -C794 divider_1/tspc_0/Z2 divider_1/tspc_0/Z4 0.36fF -C795 pd_buffered_0/tapered_buf_1/a_160_230# pd_buffered_0/tapered_buf_1/a_580_0# 0.02fF -C796 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_160_n140# 0.22fF -C797 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.12fF -C798 pll_full_0/filter_0/a_4216_n5230# pll_full_0/vco 1.58fF -C799 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/div 0.03fF -C800 pll_full_0/divider_0/and_0/OUT pll_full_0/vco 0.06fF -C801 ro_complete_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_6/a_4670_0# 4.78fF -C802 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.17fF -C803 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF -C804 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 1.07fF -C805 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C806 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/a_740_n680# 0.08fF -C807 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.65fF -C808 pll_full_1/ro_complete_0/a4 pll_full_1/vco 0.01fF -C809 pll_full_0/ref pll_full_0/pd_0/R 0.61fF -C810 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.05fF -C811 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF -C812 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z4 0.28fF -C813 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/tspc_r_0/Qbar 0.05fF -C814 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_0/Qbar1 0.30fF -C815 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/UP 0.03fF -C816 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF -C817 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.26fF -C818 divider_1/nor_1/A divider_1/and_0/A 0.01fF -C819 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/vco 0.64fF -C820 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z1 0.09fF -C821 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.19fF -C822 cp_buffered_0/cp_0/upbar cp_buffered_0/cp_0/down 0.02fF -C823 ro_complete_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_7/a_4670_0# 4.78fF -C824 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.17fF -C825 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF -C826 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/nor_1/A 0.15fF -C827 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/a0 0.09fF -C828 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF -C829 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.12fF -C830 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF -C831 div_pd_buffered_0/tapered_buf_2/a_4670_0# div_pd_buffered_0/tapered_buf_2/a_1650_0# 4.78fF -C832 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF -C833 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C834 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.00fF -C835 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF -C836 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z2 0.14fF -C837 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.32fF -C838 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF -C839 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/z5 0.11fF -C840 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Q 0.91fF -C841 pll_full_1/divider_0/and_0/B pll_full_1/divider_0/and_0/Z1 0.07fF -C842 pd_buffered_0/tapered_buf_0/a_580_0# pd_buffered_0/tapered_buf_0/a_1650_0# 1.27fF -C843 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_0/z5 0.04fF -C844 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF -C845 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C846 pll_full_0/pd_0/R pll_full_0/div 0.51fF -C847 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z4 0.36fF -C848 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 0.84fF -C849 divider_1/nor_1/B divider_1/and_0/B 0.31fF -C850 divider_1/prescaler_0/tspc_2/Z4 divider_1/clk 0.12fF -C851 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF -C852 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/A 0.01fF -C853 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.09fF -C854 div_pd_buffered_0/tapered_buf_4/a_4670_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 29.21fF -C855 pll_full_0/cp_0/a_1710_0# pll_full_0/pd_0/DOWN 0.04fF -C856 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/R 0.03fF -C857 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_n10_n140# 0.05fF -C858 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 0.84fF -C859 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF -C860 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF -C861 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/nor_1/B 0.38fF -C862 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C863 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF -C864 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF -C865 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z2 0.01fF -C866 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/tapered_buf_1/in 0.05fF -C867 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z3 0.06fF -C868 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 pll_full_1/vco 0.12fF -C869 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z3 0.06fF -C870 cp_buffered_0/tapered_buf_2/a_1650_0# cp_buffered_0/tapered_buf_2/a_580_0# 1.27fF -C871 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF -C872 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF -C873 pd_buffered_0/tapered_buf_1/a_n10_n140# pd_buffered_0/tapered_buf_1/a_n10_230# 0.01fF -C874 pd_buffered_0/pd_0/tspc_r_0/Z4 pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF -C875 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_1/Z4 0.02fF -C876 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z4 0.21fF -C877 divider_1/nor_1/A divider_1/tspc_1/Z4 0.02fF -C878 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF -C879 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF -C880 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z3 0.45fF -C881 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Q 0.04fF -C882 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/A 0.26fF -C883 pd_buffered_0/tapered_buf_2/a_n10_n140# pd_buffered_0/tapered_buf_2/in 0.04fF -C884 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/tapered_buf_1/a_160_n140# 0.19fF -C885 div_pd_buffered_0/pd_0/tspc_r_0/z5 div_pd_buffered_0/pd_0/UP 0.03fF -C886 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_n10_n140# 0.05fF -C887 ro_complete_buffered_0/tapered_buf_3/a_580_0# ro_complete_buffered_0/tapered_buf_3/a_210_n610# 0.84fF -C888 ro_complete_buffered_0/tapered_buf_2/in ro_complete_buffered_0/tapered_buf_2/a_n10_n140# 0.04fF -C889 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a3 0.13fF -C890 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF -C891 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/a_630_n680# 0.01fF -C892 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 1.07fF -C893 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.05fF -C894 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Q 0.51fF -C895 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF -C896 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF -C897 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.04fF -C898 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/clk 0.51fF -C899 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Q 0.04fF -C900 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF -C901 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/nor_0/B 0.35fF -C902 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/vco 0.60fF -C903 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF -C904 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF -C905 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/div 0.19fF -C906 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/Z3 0.38fF -C907 divider_0/tspc_1/Q divider_0/tspc_2/Z4 0.15fF -C908 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/UP 0.11fF -C909 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z4 0.02fF -C910 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF -C911 div_pd_buffered_0/tapered_buf_3/a_160_n140# div_pd_buffered_0/tapered_buf_3/a_n10_n140# 0.05fF -C912 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Z4 0.65fF -C913 divider_0/mc2 divider_0/and_0/out1 0.06fF -C914 cp_buffered_0/tapered_buf_1/a_1650_0# cp_buffered_0/tapered_buf_1/a_210_n610# 2.89fF -C915 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF -C916 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z4 0.22fF -C917 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_1/A 0.04fF -C918 div_pd_buffered_0/pd_0/and_pd_0/Z1 div_pd_buffered_0/pd_0/UP 0.06fF -C919 divider_0/mc2 divider_0/nor_1/A 0.04fF -C920 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.22fF -C921 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF -C922 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a3 2.04fF -C923 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/in 0.04fF -C924 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.22fF -C925 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z2 1.07fF -C926 pll_full_1/ro_complete_0/a1 pll_full_1/vco 0.11fF -C927 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_2/Z2 0.20fF -C928 divider_1/tspc_1/a_630_n680# divider_1/nor_0/B 0.00fF -C929 divider_0/nor_1/B divider_0/nor_0/B 0.47fF -C930 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF -C931 pll_full_0/pd_0/tspc_r_1/z5 pll_full_0/div 0.04fF -C932 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF -C933 divider_0/tspc_2/Z3 divider_0/Out 0.05fF -C934 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z4 0.21fF -C935 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C936 pll_full_0/ro_complete_0/a0 pll_full_0/vco 0.11fF -C937 divider_1/tspc_1/Q divider_1/tspc_2/a_630_n680# 0.01fF -C938 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/divider_0/mc2 0.34fF -C939 div_pd_buffered_0/tapered_buf_0/a_160_230# div_pd_buffered_0/tapered_buf_0/a_160_n140# 0.17fF -C940 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/pd_0/UP 0.02fF -C941 cp_buffered_0/tapered_buf_0/a_1650_0# cp_buffered_0/tapered_buf_0/a_210_n610# 2.89fF -C942 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF -C943 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF -C944 ro_complete_0/a4 ro_complete_0/cbank_1/v 0.05fF -C945 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.13fF -C946 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/a0 3.46fF -C947 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF -C948 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_0/Q 0.45fF -C949 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_160_230# 0.02fF -C950 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_210_n610# 0.22fF -C951 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF -C952 ro_complete_0/a0 ro_complete_0/cbank_2/switch_5/vin 0.09fF -C953 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z4 0.02fF -C954 pd_buffered_0/tapered_buf_3/a_n10_n140# pd_buffered_0/pd_0/DOWN 0.04fF -C955 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF -C956 divider_1/and_0/OUT divider_1/and_0/Z1 0.04fF -C957 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z2 0.01fF -C958 divider_1/prescaler_0/tspc_2/Q divider_1/clk 0.05fF -C959 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/DOWN 0.03fF -C960 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.20fF -C961 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_3/vin 0.09fF -C962 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF -C963 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/div 0.19fF -C964 cp_buffered_0/tapered_buf_2/a_4670_0# cp_buffered_0/tapered_buf_2/a_1650_0# 4.78fF -C965 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C966 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/tspc_0/Z3 0.16fF -C967 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/vco 0.12fF -C968 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/R 0.33fF -C969 io_clamp_low[2] io_clamp_high[2] 0.53fF -C970 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/Q 0.04fF -C971 divider_1/nor_1/Z1 divider_1/and_0/B 0.18fF -C972 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_160_n140# 0.22fF -C973 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/DOWN 0.03fF -C974 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF -C975 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.35fF -C976 io_clamp_high[1] io_analog[5] 0.53fF -C977 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/vco 0.26fF -C978 div_pd_buffered_0/tapered_buf_4/a_210_n610# div_pd_buffered_0/tapered_buf_4/a_160_n140# 0.22fF -C979 divider_1/and_0/out1 divider_1/and_0/B 0.18fF -C980 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_n10_n140# 0.05fF -C981 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 0.84fF -C982 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/DOWN 0.11fF -C983 div_pd_buffered_0/pd_0/and_pd_0/Out1 div_pd_buffered_0/pd_0/and_pd_0/Z1 0.18fF -C984 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_n10_230# 0.09fF -C985 ro_complete_buffered_0/tapered_buf_2/in ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.19fF -C986 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.16fF -C987 div_pd_buffered_0/tapered_buf_0/a_580_0# div_pd_buffered_0/tapered_buf_0/a_1650_0# 1.27fF -C988 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.20fF -C989 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.09fF -C990 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF -C991 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z4 0.00fF -C992 divider_0/prescaler_0/Out divider_0/tspc_0/Z4 0.12fF -C993 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF -C994 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C995 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Q 0.05fF -C996 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF -C997 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z3 0.45fF -C998 pll_full_0/ro_complete_0/a3 pll_full_0/vco 0.11fF -C999 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_n10_n140# 0.05fF -C1000 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 0.84fF -C1001 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_0/Z4 0.04fF -C1002 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF -C1003 ro_complete_0/a5 ro_complete_0/cbank_1/switch_0/vin 0.09fF -C1004 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF -C1005 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.00fF -C1006 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/v 0.05fF -C1007 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/and_0/B 0.31fF -C1008 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.22fF -C1009 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.04fF -C1010 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.65fF -C1011 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/vco 0.14fF -C1012 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_210_n610# 0.22fF -C1013 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF -C1014 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/D 0.09fF -C1015 divider_1/mc2 divider_1/nor_0/B 0.15fF -C1016 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF -C1017 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/div 0.02fF -C1018 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF -C1019 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/tapered_buf_4/a_n10_n140# 0.01fF -C1020 divider_0/nor_1/A divider_0/tspc_0/Z3 0.38fF -C1021 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF -C1022 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/switch_1/vin 0.19fF -C1023 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.12fF -C1024 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_4670_0# 4.78fF -C1025 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF -C1026 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/nor_1/B 0.01fF -C1027 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.91fF -C1028 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF -C1029 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_0/B 0.15fF -C1030 ro_complete_0/a1 ro_complete_0/cbank_1/v 0.05fF -C1031 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_1/Z2 0.15fF -C1032 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/a_630_n680# 0.01fF -C1033 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z4 0.00fF -C1034 divider_0/nor_1/B divider_0/tspc_1/Z2 0.30fF -C1035 ro_complete_buffered_0/tapered_buf_1/a_4670_0# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 4.78fF -C1036 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/a_630_n680# 0.01fF -C1037 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF -C1038 divider_0/prescaler_0/Out divider_0/clk 0.51fF -C1039 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF -C1040 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF -C1041 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/in 0.04fF -C1042 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/R 0.61fF -C1043 pd_buffered_0/tapered_buf_2/a_1650_0# pd_buffered_0/tapered_buf_2/a_580_0# 1.27fF -C1044 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_1/Z2 0.21fF -C1045 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF -C1046 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z2 0.11fF -C1047 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C1048 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.04fF -C1049 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z4 0.15fF -C1050 ro_complete_0/a2 ro_complete_0/cbank_1/switch_3/vin 0.09fF -C1051 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a4 0.12fF -C1052 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF -C1053 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF -C1054 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF -C1055 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_160_230# 0.17fF -C1056 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/nor_1/B 0.30fF -C1057 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Q 0.04fF -C1058 divider_0/nor_1/B divider_0/tspc_1/Q 0.51fF -C1059 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF -C1060 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/Z1 0.04fF -C1061 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z2 0.01fF -C1062 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/vco 0.05fF -C1063 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.45fF -C1064 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_0/Qbar 0.02fF -C1065 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/a_630_n680# 0.12fF -C1066 div_pd_buffered_0/tapered_buf_2/a_580_0# div_pd_buffered_0/tapered_buf_2/a_1650_0# 1.27fF -C1067 divider_0/nor_1/A divider_0/tspc_0/Z2 0.23fF -C1068 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/in 0.19fF -C1069 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF -C1070 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/div 0.05fF -C1071 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.05fF -C1072 pll_full_0/pd_0/DOWN pll_full_0/ref 1.48fF -C1073 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF -C1074 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C1075 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 4.58fF -C1076 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/clk 0.11fF -C1077 divider_0/nor_1/B divider_0/tspc_2/Z2 0.20fF -C1078 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/B 0.18fF -C1079 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF -C1080 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF -C1081 divider_1/tspc_0/Q divider_1/nor_1/B 0.22fF -C1082 divider_1/tspc_1/Q divider_1/nor_0/B 0.22fF -C1083 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_2/Q 0.19fF -C1084 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/clk 0.01fF -C1085 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF -C1086 div_pd_buffered_0/pd_0/tspc_r_0/Z4 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF -C1087 cp_buffered_0/cp_0/out cp_buffered_0/cp_0/down 0.79fF -C1088 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/in 0.19fF -C1089 pll_full_1/filter_0/a_4216_n5230# pll_full_1/vco 1.58fF -C1090 ro_complete_0/a3 ro_complete_0/cbank_2/switch_2/vin 0.09fF -C1091 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.19fF -C1092 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/UP 0.21fF -C1093 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C1094 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_1/in 0.10fF -C1095 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/a0 0.09fF -C1096 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_0/B 0.00fF -C1097 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.05fF -C1098 pd_buffered_0/tapered_buf_3/a_1650_0# pd_buffered_0/tapered_buf_3/a_210_n610# 2.89fF -C1099 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF -C1100 ro_complete_0/a0 ro_complete_0/cbank_2/v 0.05fF -C1101 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C1102 divider_0/and_0/B divider_0/and_0/Z1 0.07fF -C1103 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/z5 0.11fF -C1104 divider_1/tspc_2/a_630_n680# divider_1/Out 0.04fF -C1105 divider_1/nor_0/B divider_1/tspc_2/Z2 0.40fF -C1106 divider_1/prescaler_0/tspc_0/D divider_1/clk 0.29fF -C1107 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/a_1710_0# 0.83fF -C1108 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/UP 0.11fF -C1109 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z4 0.02fF -C1110 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C1111 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/vco 0.45fF -C1112 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/UP 0.11fF -C1113 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.09fF -C1114 ro_complete_buffered_0/tapered_buf_5/a_4670_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 29.21fF -C1115 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.14fF -C1116 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a4 0.09fF -C1117 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a5 0.09fF -C1118 ro_complete_buffered_0/tapered_buf_7/a_210_n610# ro_complete_buffered_0/ro_complete_0/a5 26.29fF -C1119 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z1 0.03fF -C1120 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.01fF -C1121 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C1122 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z3 0.05fF -C1123 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF -C1124 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Qbar1 0.20fF -C1125 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF -C1126 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z3 0.33fF -C1127 pd_buffered_0/tapered_buf_0/a_580_0# pd_buffered_0/tapered_buf_0/a_160_230# 0.02fF -C1128 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/tapered_buf_0/a_210_n610# 0.22fF -C1129 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z1 0.09fF -C1130 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z2 0.19fF -C1131 divider_0/mc2 divider_0/nor_0/B 0.15fF -C1132 io_clamp_low[0] io_analog[4] 0.53fF -C1133 cp_buffered_0/cp_0/a_1710_0# cp_buffered_0/cp_0/out 0.84fF -C1134 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF -C1135 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.09fF -C1136 ro_complete_buffered_0/tapered_buf_6/a_4670_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 29.21fF -C1137 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF -C1138 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/Out 0.05fF -C1139 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_4670_0# 29.21fF -C1140 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF -C1141 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Z4 0.65fF -C1142 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.15fF -C1143 pll_full_1/ro_complete_0/a5 pll_full_1/vco 0.15fF -C1144 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF -C1145 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C1146 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z1 0.08fF -C1147 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z4 0.20fF -C1148 divider_0/tspc_2/a_630_n680# divider_0/nor_0/B 0.35fF -C1149 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF -C1150 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.02fF -C1151 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF -C1152 div_pd_buffered_0/tapered_buf_4/a_210_n610# div_pd_buffered_0/divider_0/clk 26.29fF -C1153 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.09fF -C1154 ro_complete_buffered_0/tapered_buf_7/a_4670_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 29.21fF -C1155 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.65fF -C1156 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF -C1157 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z3 0.38fF -C1158 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.01fF -C1159 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/clk 0.11fF -C1160 divider_0/nor_1/B divider_0/and_0/B 0.31fF -C1161 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Q 0.91fF -C1162 ro_complete_0/a3 ro_complete_0/cbank_2/v 0.05fF -C1163 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z3 0.65fF -C1164 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_0/Q 0.01fF -C1165 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF -C1166 divider_1/and_0/OUT divider_1/and_0/out1 0.31fF -C1167 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/DOWN 0.03fF -C1168 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF -C1169 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.09fF -C1170 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.01fF -C1171 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.09fF -C1172 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/in 0.19fF -C1173 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF -C1174 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/tapered_buf_1/in 1.27fF -C1175 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/nor_0/B 0.22fF -C1176 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.19fF -C1177 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/vco 0.01fF -C1178 div_pd_buffered_0/divider_0/tspc_2/Z3 div_pd_buffered_0/divider_0/tspc_2/Z4 0.65fF -C1179 pd_buffered_0/tapered_buf_2/a_210_n610# pd_buffered_0/tapered_buf_2/a_580_0# 0.84fF -C1180 pll_full_1/pd_0/R pll_full_1/pd_0/DOWN 0.36fF -C1181 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF -C1182 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF -C1183 pd_buffered_0/tapered_buf_1/a_n10_230# pd_buffered_0/tapered_buf_1/a_160_230# 0.09fF -C1184 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/DOWN 0.02fF -C1185 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/R 0.30fF -C1186 divider_1/tspc_0/a_630_n680# divider_1/nor_1/B 0.01fF -C1187 divider_1/tspc_1/Z1 divider_1/tspc_1/Z3 0.06fF -C1188 divider_0/nor_1/A divider_0/tspc_1/Z2 0.15fF -C1189 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/vco 0.45fF -C1190 divider_1/nor_0/B divider_1/and_0/B 0.29fF -C1191 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF -C1192 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF -C1193 ro_complete_buffered_0/tapered_buf_2/in ro_complete_buffered_0/tapered_buf_2/a_n10_230# 0.02fF -C1194 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a4 0.12fF -C1195 ro_complete_0/a2 ro_complete_0/cbank_0/switch_3/vin 0.09fF -C1196 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C1197 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C1198 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF -C1199 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.05fF -C1200 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF -C1201 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_n10_n140# 0.05fF -C1202 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z2 0.23fF -C1203 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.06fF -C1204 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/vco 1.46fF -C1205 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/div 0.04fF -C1206 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z2 0.40fF -C1207 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/vco 0.29fF -C1208 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/tspc_r_0/Qbar 0.02fF -C1209 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/a_630_n680# 0.01fF -C1210 divider_0/tspc_0/Z2 divider_0/tspc_0/Z3 0.16fF -C1211 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF -C1212 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF -C1213 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C1214 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/cp_0/upbar 26.29fF -C1215 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z2 0.25fF -C1216 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/ref 0.19fF -C1217 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF -C1218 pll_full_0/ro_complete_0/a4 pll_full_0/vco 0.01fF -C1219 div_pd_buffered_0/tapered_buf_2/a_n10_n140# div_pd_buffered_0/tapered_buf_2/a_n10_230# 0.01fF -C1220 divider_1/prescaler_0/tspc_2/Z2 divider_1/and_0/OUT 0.05fF -C1221 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF -C1222 div_pd_buffered_0/tapered_buf_1/a_n10_n140# div_pd_buffered_0/tapered_buf_1/a_n10_230# 0.01fF -C1223 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_1/B 0.06fF -C1224 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF -C1225 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF -C1226 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF -C1227 pll_full_1/pd_0/tspc_r_1/z5 pll_full_1/div 0.04fF -C1228 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_n10_230# 0.09fF -C1229 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Q 0.04fF -C1230 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.33fF -C1231 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/vco 1.27fF -C1232 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/UP 0.33fF -C1233 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/nor_1/A 0.15fF -C1234 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF -C1235 cp_buffered_0/tapered_buf_2/in cp_buffered_0/tapered_buf_2/a_n10_230# 0.02fF -C1236 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF -C1237 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C1238 divider_1/tspc_1/Q divider_1/tspc_2/Z2 0.14fF -C1239 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_0/D 0.32fF -C1240 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/clk 0.01fF -C1241 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF -C1242 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/R 0.61fF -C1243 ro_complete_0/a5 ro_complete_0/cbank_1/v 0.10fF -C1244 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/a0 0.09fF -C1245 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/B 0.01fF -C1246 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C1247 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/nor_0/B 0.47fF -C1248 divider_1/nor_0/Z1 divider_1/nor_1/B 0.18fF -C1249 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z1 1.07fF -C1250 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF -C1251 divider_1/nor_1/A divider_1/nor_1/B 1.21fF -C1252 divider_1/mc2 divider_1/and_0/B 0.20fF -C1253 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z3 0.06fF -C1254 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/vco 0.12fF -C1255 divider_1/nor_0/B divider_1/Out 0.22fF -C1256 divider_1/tspc_2/Z1 divider_1/tspc_2/Z3 0.06fF -C1257 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/a_n10_n140# 0.01fF -C1258 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C1259 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/B 0.20fF -C1260 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF -C1261 divider_0/nor_1/B divider_0/tspc_0/a_630_n680# 0.01fF -C1262 divider_0/nor_1/Z1 divider_0/and_0/B 0.18fF -C1263 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/out1 0.31fF -C1264 pll_full_1/divider_0/tspc_1/Z4 pll_full_1/divider_0/tspc_0/Q 0.15fF -C1265 io_clamp_low[1] io_clamp_high[1] 0.53fF -C1266 divider_0/tspc_1/Q divider_0/tspc_2/a_630_n680# 0.01fF -C1267 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF -C1268 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/in 0.19fF -C1269 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF -C1270 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.02fF -C1271 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 0.22fF -C1272 divider_1/tspc_1/Z2 divider_1/tspc_1/Z4 0.36fF -C1273 divider_1/tspc_1/Z3 divider_1/tspc_1/Q 0.05fF -C1274 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z3 0.05fF -C1275 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z4 0.08fF -C1276 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/a_n10_230# 0.01fF -C1277 pd_buffered_0/tapered_buf_0/a_1650_0# pd_buffered_0/tapered_buf_0/a_210_n610# 2.89fF -C1278 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/R 0.51fF -C1279 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF -C1280 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF -C1281 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF -C1282 divider_0/nor_1/A divider_0/tspc_0/Z1 0.03fF -C1283 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z3 0.33fF -C1284 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_580_0# 0.35fF -C1285 pll_full_1/ref pll_full_1/pd_0/tspc_r_0/Z1 0.17fF -C1286 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/B 0.35fF -C1287 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/vco 0.60fF -C1288 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/a_n10_n140# 0.01fF -C1289 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_2/a_n10_230# 0.01fF -C1290 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a3 0.13fF -C1291 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.19fF -C1292 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF -C1293 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_210_n610# 0.22fF -C1294 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/and_0/A 0.80fF -C1295 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.22fF -C1296 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_580_0# 0.35fF -C1297 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_1/B 0.35fF -C1298 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/vco 0.11fF -C1299 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z3 0.11fF -C1300 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/and_0/B 0.29fF -C1301 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF -C1302 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF -C1303 divider_0/prescaler_0/tspc_2/Q divider_0/clk 0.05fF -C1304 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/tapered_buf_3/a_160_230# 0.09fF -C1305 pd_buffered_0/tapered_buf_2/a_1650_0# pd_buffered_0/tapered_buf_2/a_4670_0# 4.78fF -C1306 divider_0/nor_0/Z1 divider_0/nor_1/B 0.18fF -C1307 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/clk 0.01fF -C1308 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF -C1309 pll_full_0/ro_complete_0/a1 pll_full_0/vco 0.11fF -C1310 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_580_0# 0.35fF -C1311 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.11fF -C1312 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/a_n10_n140# 0.01fF -C1313 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF -C1314 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/nor_1/B 0.06fF -C1315 div_pd_buffered_0/tapered_buf_1/a_n10_230# div_pd_buffered_0/tapered_buf_1/a_160_230# 0.09fF -C1316 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.21fF -C1317 div_pd_buffered_0/tapered_buf_3/a_160_230# div_pd_buffered_0/tapered_buf_3/a_n10_230# 0.09fF -C1318 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/and_0/OUT 0.05fF -C1319 divider_1/prescaler_0/m1_2700_2190# divider_1/and_0/OUT 0.14fF -C1320 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF -C1321 divider_0/and_0/out1 divider_0/and_0/B 0.18fF -C1322 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.38fF -C1323 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF -C1324 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/tapered_buf_0/a_160_230# 0.09fF -C1325 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_0/Q 0.45fF -C1326 divider_0/nor_1/A divider_0/and_0/B 0.08fF -C1327 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF -C1328 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z1 0.09fF -C1329 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.19fF -C1330 ro_complete_0/a0 ro_complete_0/cbank_2/switch_4/vin 0.13fF -C1331 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF -C1332 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/v 0.05fF -C1333 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/R 0.02fF -C1334 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z2 0.25fF -C1335 div_pd_buffered_0/tapered_buf_1/a_4670_0# div_pd_buffered_0/tapered_buf_1/a_1650_0# 4.78fF -C1336 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_160_230# 0.02fF -C1337 div_pd_buffered_0/tapered_buf_3/in div_pd_buffered_0/tapered_buf_3/a_n10_230# 0.02fF -C1338 ro_complete_buffered_0/tapered_buf_0/in ro_complete_buffered_0/tapered_buf_0/a_n10_n140# 0.04fF -C1339 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z2 0.14fF -C1340 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z3 0.05fF -C1341 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.32fF -C1342 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/vco 0.01fF -C1343 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF -C1344 divider_0/tspc_1/Z1 divider_0/tspc_0/Q 0.01fF -C1345 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Q 0.05fF -C1346 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_580_0# 0.84fF -C1347 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF -C1348 divider_0/nor_1/A divider_0/prescaler_0/m1_2700_2190# 0.01fF -C1349 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/Z2 0.14fF -C1350 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z3 0.16fF -C1351 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/vco 0.12fF -C1352 ro_complete_0/a2 ro_complete_0/cbank_2/switch_3/vin 0.09fF -C1353 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_160_n140# 0.35fF -C1354 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF -C1355 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a4 0.09fF -C1356 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a5 0.09fF -C1357 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/in 0.02fF -C1358 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/and_0/B 0.18fF -C1359 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.00fF -C1360 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/tapered_buf_1/a_1650_0# 2.89fF -C1361 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.03fF -C1362 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF -C1363 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_0/a_630_n680# 0.04fF -C1364 pll_full_1/divider_0/nor_0/B pll_full_1/div 0.27fF -C1365 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z3 0.06fF -C1366 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/DOWN 0.03fF -C1367 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF -C1368 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/ref 0.12fF -C1369 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/UP 0.11fF -C1370 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Q 0.20fF -C1371 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/D 0.09fF -C1372 pd_buffered_0/pd_0/tspc_r_1/Z4 pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF -C1373 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF -C1374 divider_0/mc2 divider_0/and_0/B 0.20fF -C1375 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z3 0.65fF -C1376 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/in 0.02fF -C1377 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/div 0.17fF -C1378 div_pd_buffered_0/tapered_buf_2/a_580_0# div_pd_buffered_0/tapered_buf_2/a_160_230# 0.02fF -C1379 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_580_0# 0.35fF -C1380 ro_complete_buffered_0/tapered_buf_3/a_n10_230# ro_complete_buffered_0/tapered_buf_3/in 0.02fF -C1381 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.12fF -C1382 divider_1/tspc_1/a_630_n680# divider_1/tspc_0/Q 0.01fF -C1383 ro_complete_buffered_0/tapered_buf_0/a_580_0# ro_complete_buffered_0/tapered_buf_0/a_160_230# 0.02fF -C1384 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 0.22fF -C1385 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_1/Q 0.51fF -C1386 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z2 0.01fF -C1387 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.05fF -C1388 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.08fF -C1389 div_pd_buffered_0/tapered_buf_0/out div_pd_buffered_0/tapered_buf_0/a_210_n610# 26.29fF -C1390 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Q 0.55fF -C1391 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF -C1392 pll_full_0/pd_0/and_pd_0/Z1 pll_full_0/pd_0/UP 0.06fF -C1393 ro_complete_0/a4 ro_complete_0/cbank_2/v 0.05fF -C1394 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/DOWN 0.11fF -C1395 pll_full_1/pd_0/R pll_full_1/ref 0.61fF -C1396 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF -C1397 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C1398 div_pd_buffered_0/tapered_buf_2/a_1650_0# div_pd_buffered_0/tapered_buf_2/a_210_n610# 2.89fF -C1399 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/nand_1/z1 0.22fF -C1400 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/tspc_0/D 0.04fF -C1401 pd_buffered_0/tapered_buf_0/a_n10_230# pd_buffered_0/tapered_buf_0/a_160_230# 0.09fF -C1402 pd_buffered_0/tapered_buf_0/a_4670_0# pd_buffered_0/tapered_buf_0/a_210_n610# 29.21fF -C1403 pd_buffered_0/pd_0/and_pd_0/Out1 pd_buffered_0/pd_0/UP 0.33fF -C1404 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_1/Qbar 0.21fF -C1405 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF -C1406 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/vco 0.14fF -C1407 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/DOWN 0.02fF -C1408 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/R 0.30fF -C1409 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/in 0.02fF -C1410 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.11fF -C1411 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/v 0.05fF -C1412 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/nor_1/A 0.15fF -C1413 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/nor_0/B 0.06fF -C1414 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_2/Z2 0.20fF -C1415 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF -C1416 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Qbar1 0.38fF -C1417 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF -C1418 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF -C1419 pd_buffered_0/pd_0/tspc_r_0/Z2 pd_buffered_0/pd_0/tspc_r_0/Z4 0.14fF -C1420 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z2 0.15fF -C1421 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF -C1422 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z2 0.01fF -C1423 divider_1/tspc_2/Z1 divider_1/tspc_2/Z4 0.00fF -C1424 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF -C1425 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF -C1426 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF -C1427 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/nor_1/B 1.21fF -C1428 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/nor_0/B 0.06fF -C1429 div_pd_buffered_0/tapered_buf_3/a_160_230# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.17fF -C1430 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF -C1431 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/A 0.01fF -C1432 div_pd_buffered_0/divider_0/tspc_0/Z3 div_pd_buffered_0/divider_0/tspc_0/Q 0.05fF -C1433 divider_0/tspc_1/Q divider_0/nor_0/B 0.22fF -C1434 divider_0/tspc_0/Z1 divider_0/tspc_0/Z3 0.06fF -C1435 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/Q 0.19fF -C1436 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.01fF -C1437 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/R 0.01fF -C1438 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/tspc_r_1/Qbar 0.21fF -C1439 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF -C1440 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_1/B 0.30fF -C1441 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z4 0.12fF -C1442 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z2 1.07fF -C1443 divider_0/nor_1/A divider_0/tspc_0/a_630_n680# 0.35fF -C1444 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z4 0.08fF -C1445 div_pd_buffered_0/tapered_buf_4/in div_pd_buffered_0/tapered_buf_4/a_160_n140# 0.19fF -C1446 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_1650_0# 1.27fF -C1447 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF -C1448 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF -C1449 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/vco 0.05fF -C1450 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.09fF -C1451 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a5 2.39fF -C1452 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C1453 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/and_0/OUT 0.14fF -C1454 pll_full_1/divider_0/prescaler_0/Out pll_full_1/vco 0.51fF -C1455 div_pd_buffered_0/pd_0/UP div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.04fF -C1456 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_0/Q 0.01fF -C1457 div_pd_buffered_0/tapered_buf_3/in div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.19fF -C1458 pd_buffered_0/tapered_buf_2/a_4670_0# pd_buffered_0/tapered_buf_2/a_210_n610# 29.21fF -C1459 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF -C1460 divider_1/tspc_0/Q divider_1/tspc_1/Z1 0.01fF -C1461 divider_1/mc2 divider_1/and_0/OUT 0.05fF -C1462 divider_0/tspc_2/a_630_n680# divider_0/Out 0.04fF -C1463 divider_0/nor_0/B divider_0/tspc_2/Z2 0.40fF -C1464 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.29fF -C1465 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF -C1466 pd_buffered_0/tapered_buf_0/in pd_buffered_0/tapered_buf_0/a_n10_230# 0.02fF -C1467 pll_full_1/pd_0/DOWN pll_full_1/pd_0/UP 4.58fF -C1468 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_1650_0# 1.27fF -C1469 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF -C1470 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/OUT 0.05fF -C1471 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z2 1.07fF -C1472 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.20fF -C1473 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/and_0/B 0.08fF -C1474 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.20fF -C1475 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.09fF -C1476 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/vco 0.12fF -C1477 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_2/D 0.16fF -C1478 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z3 0.16fF -C1479 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF -C1480 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF -C1481 ro_complete_0/a1 ro_complete_0/cbank_2/v 0.05fF -C1482 divider_1/nor_1/A divider_1/tspc_0/Z2 0.23fF -C1483 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z3 0.05fF -C1484 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z1 0.17fF -C1485 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/z5 0.11fF -C1486 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF -C1487 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/ro_complete_0/a1 26.29fF -C1488 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_0/B 0.00fF -C1489 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF -C1490 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/R 0.51fF -C1491 ro_complete_buffered_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_3/a_n10_n140# 0.04fF -C1492 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z2 1.07fF -C1493 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/B 0.31fF -C1494 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.22fF -C1495 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.04fF -C1496 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF -C1497 divider_0/tspc_1/Z3 divider_0/tspc_0/Q 0.45fF -C1498 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF -C1499 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF -C1500 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF -C1501 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z4 0.12fF -C1502 pd_buffered_0/pd_0/tspc_r_0/Z2 pd_buffered_0/pd_0/R 0.21fF -C1503 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/z5 0.20fF -C1504 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z1 0.03fF -C1505 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF -C1506 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C1507 div_pd_buffered_0/tapered_buf_2/a_210_n610# div_pd_buffered_0/pd_0/REF 26.29fF -C1508 ro_complete_0/a2 ro_complete_0/cbank_0/switch_2/vin 0.14fF -C1509 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a4 0.09fF -C1510 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a5 0.09fF -C1511 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF -C1512 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C1513 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/a3 0.09fF -C1514 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/clk 0.14fF -C1515 divider_1/prescaler_0/m1_2700_2190# divider_1/nor_1/A 0.01fF -C1516 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF -C1517 ro_complete_buffered_0/tapered_buf_1/in ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.36fF -C1518 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z4 0.00fF -C1519 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF -C1520 divider_0/tspc_1/Z4 divider_0/tspc_0/Q 0.15fF -C1521 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF -C1522 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Q 0.04fF -C1523 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/clk 0.01fF -C1524 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/out 26.29fF -C1525 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/and_pd_0/Z1 0.07fF -C1526 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF -C1527 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF -C1528 pll_full_0/ro_complete_0/a5 pll_full_0/vco 0.15fF -C1529 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF -C1530 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.38fF -C1531 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF -C1532 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/ref 0.65fF -C1533 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_210_n610# 0.84fF -C1534 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/nor_1/A 0.03fF -C1535 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF -C1536 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_1650_0# 1.27fF -C1537 ro_complete_buffered_0/tapered_buf_3/a_n10_230# ro_complete_buffered_0/tapered_buf_3/a_160_230# 0.09fF -C1538 ro_complete_buffered_0/tapered_buf_3/a_4670_0# ro_complete_buffered_0/tapered_buf_3/a_210_n610# 29.21fF -C1539 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C1540 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/R 0.21fF -C1541 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/UP 0.03fF -C1542 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Q 0.01fF -C1543 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/and_0/A 0.01fF -C1544 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF -C1545 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.12fF -C1546 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 1.07fF -C1547 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/vco 0.01fF -C1548 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF -C1549 divider_1/tspc_0/Z3 divider_1/tspc_0/Z2 0.16fF -C1550 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z3 0.06fF -C1551 divider_0/nor_0/B divider_0/and_0/B 0.29fF -C1552 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF -C1553 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/nand_1/z1 0.01fF -C1554 divider_1/prescaler_0/tspc_2/Z2 divider_1/clk 0.11fF -C1555 pd_buffered_0/tapered_buf_0/a_n10_230# pd_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF -C1556 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/tspc_r_0/Z1 0.71fF -C1557 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z3 0.38fF -C1558 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/nor_1/A 0.01fF -C1559 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# 0.01fF -C1560 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C1561 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.28fF -C1562 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z3 0.05fF -C1563 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z1 0.03fF -C1564 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF -C1565 pll_full_1/ro_complete_0/cbank_2/v pll_full_1/vco 1.36fF -C1566 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.05fF -C1567 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF -C1568 divider_1/nor_1/A divider_1/tspc_0/Z4 0.21fF -C1569 divider_1/prescaler_0/tspc_0/Z3 divider_1/clk 0.64fF -C1570 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.01fF -C1571 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF -C1572 divider_0/mc2 divider_0/and_0/OUT 0.05fF -C1573 divider_1/tspc_2/Z3 divider_1/tspc_2/Z4 0.65fF -C1574 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_0/B 0.22fF -C1575 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF -C1576 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/vco 0.01fF -C1577 div_pd_buffered_0/pd_0/tspc_r_1/Z4 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF -C1578 pd_buffered_0/tapered_buf_2/a_210_n610# pd_buffered_0/pd_0/DIV 26.29fF -C1579 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_1/Z4 0.02fF -C1580 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z3 0.06fF -C1581 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/a_630_n680# 0.35fF -C1582 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.91fF -C1583 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C1584 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF -C1585 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C1586 io_clamp_low[0] io_clamp_high[0] 0.53fF -C1587 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C1588 divider_1/nor_0/Z1 divider_1/nor_0/B 0.06fF -C1589 divider_0/tspc_1/Q divider_0/tspc_2/Z2 0.14fF -C1590 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z3 0.05fF -C1591 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/D 0.32fF -C1592 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF -C1593 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/in 0.19fF -C1594 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z3 0.16fF -C1595 pd_buffered_0/pd_0/DIV pd_buffered_0/tapered_buf_0/in 0.02fF -C1596 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_4670_0# 29.21fF -C1597 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF -C1598 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/z5 0.11fF -C1599 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_1/z5 0.02fF -C1600 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z2 0.23fF -C1601 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF -C1602 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/vco 1.46fF -C1603 cp_buffered_0/tapered_buf_1/a_1650_0# cp_buffered_0/tapered_buf_1/a_4670_0# 4.78fF -C1604 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_160_230# 0.17fF -C1605 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/div 0.04fF -C1606 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z2 0.40fF -C1607 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/vco 0.29fF -C1608 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF -C1609 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.13fF -C1610 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C1611 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.18fF -C1612 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF -C1613 div_pd_buffered_0/pd_0/and_pd_0/Out1 div_pd_buffered_0/pd_0/UP 0.33fF -C1614 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF -C1615 ro_complete_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/in 0.02fF -C1616 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_0/Q 0.45fF -C1617 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.03fF -C1618 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/a_630_n680# 0.01fF -C1619 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF -C1620 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_2/D 0.16fF -C1621 pll_full_1/ro_complete_0/cbank_1/switch_2/vin pll_full_1/vco 1.46fF -C1622 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/UP 0.06fF -C1623 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z3 0.33fF -C1624 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF -C1625 divider_1/tspc_0/Q divider_1/tspc_1/Z3 0.45fF -C1626 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/a_630_n680# 0.01fF -C1627 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/clk 0.14fF -C1628 divider_0/nor_0/B divider_0/Out 0.22fF -C1629 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF -C1630 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/UP 0.45fF -C1631 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/z5 0.04fF -C1632 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.04fF -C1633 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF -C1634 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/vco 1.27fF -C1635 div_pd_buffered_0/pd_0/tspc_r_0/Z2 div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.14fF -C1636 ro_complete_buffered_0/tapered_buf_3/a_580_0# ro_complete_buffered_0/tapered_buf_3/a_1650_0# 1.27fF -C1637 cp_buffered_0/tapered_buf_0/a_1650_0# cp_buffered_0/tapered_buf_0/a_4670_0# 4.78fF -C1638 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_160_230# 0.17fF -C1639 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/nor_1/B 0.18fF -C1640 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/v 0.05fF -C1641 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/Z3 0.16fF -C1642 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z2 1.07fF -C1643 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF -C1644 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z2 0.36fF -C1645 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_0/Z3 0.05fF -C1646 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF -C1647 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF -C1648 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/pd_0/tspc_r_1/Z3 0.09fF -C1649 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/nand_0/z1 0.07fF -C1650 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z2 0.01fF -C1651 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF -C1652 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF -C1653 divider_1/tspc_0/Z3 divider_1/tspc_0/Z4 0.65fF -C1654 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z4 0.12fF -C1655 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z2 0.25fF -C1656 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/pd_0/DOWN 0.02fF -C1657 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_160_n140# 0.35fF -C1658 divider_1/and_0/OUT divider_1/and_0/B 0.01fF -C1659 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/nor_0/B 0.47fF -C1660 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/R 0.01fF -C1661 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/tspc_r_1/Qbar 0.21fF -C1662 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF -C1663 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_580_0# 1.27fF -C1664 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z3 0.16fF -C1665 pll_full_1/ro_complete_0/cbank_2/switch_2/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF -C1666 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z4 0.00fF -C1667 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.15fF -C1668 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/and_0/B 0.78fF -C1669 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z1 0.08fF -C1670 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z2 0.36fF -C1671 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C1672 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.01fF -C1673 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/vco 0.11fF -C1674 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_0/Z2 0.21fF -C1675 divider_1/mc2 divider_1/nor_1/A 0.04fF -C1676 divider_1/prescaler_0/m1_2700_2190# divider_1/clk 0.01fF -C1677 divider_1/tspc_1/Z2 divider_1/nor_1/B 0.30fF -C1678 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/a_630_n680# 0.19fF -C1679 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Q 0.04fF -C1680 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z3 0.65fF -C1681 io_clamp_high[2] io_analog[6] 0.53fF -C1682 div_pd_buffered_0/tapered_buf_4/a_n10_n140# div_pd_buffered_0/tapered_buf_4/in 0.04fF -C1683 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF -C1684 pll_full_0/divider_0/tspc_1/Z4 pll_full_0/divider_0/tspc_0/Q 0.15fF -C1685 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z4 0.00fF -C1686 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF -C1687 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_0/a_740_n680# 0.21fF -C1688 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/and_0/B 0.78fF -C1689 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF -C1690 divider_1/prescaler_0/Out divider_1/tspc_0/Z2 0.11fF -C1691 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/divider_0/tspc_2/Z4 0.65fF -C1692 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF -C1693 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/div 0.17fF -C1694 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z2 1.07fF -C1695 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/ref 0.04fF -C1696 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF -C1697 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/vco 0.11fF -C1698 pd_buffered_0/tapered_buf_1/a_n10_230# pd_buffered_0/pd_0/UP 0.02fF -C1699 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/and_pd_0/Out1 0.33fF -C1700 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF -C1701 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z1 0.17fF -C1702 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.29fF -C1703 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF -C1704 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF -C1705 ro_complete_buffered_0/tapered_buf_3/a_n10_230# ro_complete_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF -C1706 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_0/vin 0.19fF -C1707 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF -C1708 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.09fF -C1709 pd_buffered_0/tapered_buf_2/a_160_230# pd_buffered_0/tapered_buf_2/a_n10_230# 0.09fF -C1710 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.21fF -C1711 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.16fF -C1712 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z4 0.14fF -C1713 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z1 0.01fF -C1714 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_0/Q 0.22fF -C1715 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/z5 0.20fF -C1716 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF -C1717 divider_0/tspc_1/a_630_n680# divider_0/tspc_0/Q 0.01fF -C1718 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF -C1719 ro_complete_0/a5 ro_complete_0/cbank_2/v 0.08fF -C1720 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_580_0# 0.84fF -C1721 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_0/Qbar 0.03fF -C1722 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF -C1723 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_1/Q 0.13fF -C1724 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z4 0.00fF -C1725 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF -C1726 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.02fF -C1727 divider_1/prescaler_0/tspc_0/D divider_1/prescaler_0/nand_1/z1 0.21fF -C1728 divider_1/nor_1/B divider_1/and_0/A 0.26fF -C1729 cp_buffered_0/cp_0/a_10_n50# cp_buffered_0/cp_0/a_1710_0# 0.04fF -C1730 div_pd_buffered_0/pd_0/tspc_r_0/Z2 div_pd_buffered_0/pd_0/R 0.21fF -C1731 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/nor_1/B 0.30fF -C1732 divider_1/prescaler_0/Out divider_1/prescaler_0/m1_2700_2190# 0.11fF -C1733 ro_complete_buffered_0/tapered_buf_6/a_210_n610# ro_complete_buffered_0/ro_complete_0/a4 26.29fF -C1734 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.02fF -C1735 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 0.22fF -C1736 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF -C1737 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.08fF -C1738 pll_full_1/ro_complete_0/a1 pll_full_1/ro_complete_0/cbank_2/v 0.05fF -C1739 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF -C1740 pll_full_0/pd_0/tspc_r_1/z5 pll_full_0/pd_0/tspc_r_1/Z4 0.04fF -C1741 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z4 0.12fF -C1742 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z2 1.07fF -C1743 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z3 0.38fF -C1744 divider_1/tspc_0/Z1 divider_1/tspc_0/Z2 1.07fF -C1745 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z4 0.01fF -C1746 divider_1/prescaler_0/tspc_0/Z4 divider_1/clk 0.12fF -C1747 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Q 0.20fF -C1748 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF -C1749 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF -C1750 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C1751 div_pd_buffered_0/tapered_buf_2/in div_pd_buffered_0/tapered_buf_2/a_n10_230# 0.02fF -C1752 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/upbar 0.29fF -C1753 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z2 0.14fF -C1754 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z3 0.05fF -C1755 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF -C1756 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/vco 0.01fF -C1757 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/and_pd_0/Z1 0.07fF -C1758 ro_complete_buffered_0/tapered_buf_5/a_n10_n140# ro_complete_buffered_0/tapered_buf_5/in 0.04fF -C1759 ro_complete_buffered_0/tapered_buf_3/a_580_0# ro_complete_buffered_0/tapered_buf_3/a_160_230# 0.02fF -C1760 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_210_n610# 0.22fF -C1761 pll_full_0/pd_0/DOWN pll_full_0/pd_0/R 0.36fF -C1762 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Z4 0.12fF -C1763 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF -C1764 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/clk 0.64fF -C1765 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.33fF -C1766 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.09fF -C1767 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF -C1768 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/B 0.01fF -C1769 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/Z1 0.36fF -C1770 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Q 0.15fF -C1771 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF -C1772 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/tspc_0/D 0.04fF -C1773 cp_buffered_0/tapered_buf_2/a_580_0# cp_buffered_0/tapered_buf_2/a_160_n140# 0.35fF -C1774 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/tspc_r_1/z5 0.03fF -C1775 pd_buffered_0/pd_0/tspc_r_1/Z2 pd_buffered_0/pd_0/R 0.21fF -C1776 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/UP 0.03fF -C1777 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.18fF -C1778 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF -C1779 divider_1/nor_1/B divider_1/tspc_1/Z4 0.21fF -C1780 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z4 0.36fF -C1781 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_n10_n140# 0.05fF -C1782 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_210_n610# 0.84fF -C1783 pll_full_1/pd_0/R pll_full_1/div 0.51fF -C1784 pll_full_0/divider_0/nor_0/B pll_full_0/div 0.27fF -C1785 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF -C1786 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/R 0.03fF -C1787 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF -C1788 ro_complete_buffered_0/tapered_buf_6/a_n10_n140# ro_complete_buffered_0/tapered_buf_6/in 0.04fF -C1789 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/a0 0.13fF -C1790 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Q 0.04fF -C1791 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.01fF -C1792 ro_complete_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/a_160_230# 0.09fF -C1793 ro_complete_buffered_0/tapered_buf_0/a_4670_0# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 29.21fF -C1794 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF -C1795 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C1796 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/a3 0.09fF -C1797 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/nand_0/z1 0.07fF -C1798 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C1799 divider_1/prescaler_0/Out divider_1/tspc_0/Z4 0.12fF -C1800 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z4 0.08fF -C1801 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF -C1802 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF -C1803 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF -C1804 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Q 0.51fF -C1805 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z2 0.01fF -C1806 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF -C1807 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF -C1808 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF -C1809 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_210_n610# 0.84fF -C1810 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF -C1811 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/tapered_buf_1/a_n10_230# 0.02fF -C1812 ro_complete_buffered_0/tapered_buf_7/a_n10_n140# ro_complete_buffered_0/tapered_buf_7/in 0.04fF -C1813 ro_complete_0/a4 ro_complete_0/cbank_2/switch_0/vin 0.12fF -C1814 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z4 0.12fF -C1815 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF -C1816 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/clk 0.04fF -C1817 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF -C1818 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C1819 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_0/Q 0.14fF -C1820 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/vco 0.01fF -C1821 cp_buffered_0/tapered_buf_2/a_4670_0# cp_buffered_0/tapered_buf_2/a_210_n610# 29.21fF -C1822 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_160_230# 0.17fF -C1823 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Q 0.38fF -C1824 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF -C1825 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF -C1826 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF -C1827 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF -C1828 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/D 0.03fF -C1829 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/tspc_r_0/Qbar 0.01fF -C1830 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF -C1831 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C1832 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z4 0.01fF -C1833 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z2 0.20fF -C1834 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF -C1835 div_pd_buffered_0/tapered_buf_0/a_160_230# div_pd_buffered_0/tapered_buf_0/a_580_0# 0.02fF -C1836 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF -C1837 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.11fF -C1838 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/z5 0.03fF -C1839 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z2 0.19fF -C1840 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/clk 0.04fF -C1841 div_pd_buffered_0/tapered_buf_0/a_4670_0# div_pd_buffered_0/tapered_buf_0/a_210_n610# 29.21fF -C1842 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/Z4 0.65fF -C1843 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.20fF -C1844 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_1650_0# 1.27fF -C1845 pll_full_1/divider_0/and_0/OUT pll_full_1/div 0.01fF -C1846 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/divider_0/prescaler_0/nand_1/z1 0.21fF -C1847 divider_1/tspc_0/Z1 divider_1/tspc_0/Z4 0.00fF -C1848 divider_1/nor_1/Z1 divider_1/and_0/A 0.80fF -C1849 pd_buffered_0/tapered_buf_1/a_n10_n140# pd_buffered_0/tapered_buf_1/a_160_n140# 0.05fF -C1850 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.38fF -C1851 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C1852 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/nor_1/B 1.21fF -C1853 divider_0/nor_1/A divider_0/tspc_0/Z4 0.21fF -C1854 io_clamp_low[1] io_analog[5] 0.53fF -C1855 div_pd_buffered_0/tapered_buf_4/a_160_230# div_pd_buffered_0/tapered_buf_4/a_160_n140# 0.17fF -C1856 divider_1/and_0/out1 divider_1/and_0/A 0.01fF -C1857 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.02fF -C1858 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 0.22fF -C1859 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.06fF -C1860 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.09fF -C1861 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C1862 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/UP 0.45fF -C1863 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.15fF -C1864 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/vco 1.46fF -C1865 ro_complete_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_2/a_4670_0# 4.78fF -C1866 div_pd_buffered_0/tapered_buf_3/a_1650_0# div_pd_buffered_0/tapered_buf_3/a_210_n610# 2.89fF -C1867 divider_1/nor_0/Z1 divider_1/and_0/B 0.78fF -C1868 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF -C1869 divider_1/nor_1/A divider_1/and_0/B 0.08fF -C1870 pll_full_1/pd_0/DOWN pll_full_1/cp_0/a_1710_0# 0.04fF -C1871 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF -C1872 pll_full_0/divider_0/prescaler_0/Out pll_full_0/vco 0.51fF -C1873 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.25fF -C1874 div_pd_buffered_0/tapered_buf_3/a_160_230# div_pd_buffered_0/tapered_buf_3/a_580_0# 0.02fF -C1875 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.02fF -C1876 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 0.22fF -C1877 ro_complete_0/a3 ro_complete_0/cbank_1/switch_2/vin 0.09fF -C1878 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C1879 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/nor_1/A 0.15fF -C1880 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF -C1881 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C1882 pd_buffered_0/tapered_buf_2/a_n10_n140# pd_buffered_0/tapered_buf_2/a_n10_230# 0.01fF -C1883 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF -C1884 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z3 0.45fF -C1885 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/and_0/A 0.26fF -C1886 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.36fF -C1887 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_1/Q 0.21fF -C1888 divider_0/nor_1/B divider_0/tspc_0/Q 0.22fF -C1889 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF -C1890 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z3 0.09fF -C1891 div_pd_buffered_0/tapered_buf_4/a_1650_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 2.89fF -C1892 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/B 0.08fF -C1893 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF -C1894 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF -C1895 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/vco 0.12fF -C1896 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_0/Z3 0.11fF -C1897 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z3 0.65fF -C1898 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 2.89fF -C1899 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF -C1900 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/tspc_2/Z3 0.05fF -C1901 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.13fF -C1902 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF -C1903 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z3 0.05fF -C1904 divider_0/nor_1/B divider_0/tspc_1/Z1 0.03fF -C1905 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/m1_2700_2190# 0.08fF -C1906 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C1907 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF -C1908 div_pd_buffered_0/tapered_buf_0/a_1650_0# div_pd_buffered_0/tapered_buf_0/a_210_n610# 2.89fF -C1909 div_pd_buffered_0/divider_0/tspc_2/Z2 div_pd_buffered_0/divider_0/tspc_2/Z3 0.16fF -C1910 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z4 0.22fF -C1911 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Q 0.04fF -C1912 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.64fF -C1913 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.45fF -C1914 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF -C1915 divider_0/nor_1/A divider_0/prescaler_0/Out 0.15fF -C1916 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF -C1917 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.31fF -C1918 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF -C1919 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF -C1920 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_1/switch_1/vin 0.09fF -C1921 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/and_pd_0/Out1 0.33fF -C1922 ro_complete_buffered_0/tapered_buf_1/out ro_complete_buffered_0/tapered_buf_1/a_210_n610# 26.29fF -C1923 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.09fF -C1924 ro_complete_buffered_0/tapered_buf_4/a_4670_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 29.21fF -C1925 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/a_630_n680# 0.05fF -C1926 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/nor_1/B 0.03fF -C1927 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.05fF -C1928 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.08fF -C1929 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Z4 0.21fF -C1930 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z3 0.45fF -C1931 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF -C1932 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF -C1933 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/Out 0.05fF -C1934 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C1935 div_pd_buffered_0/divider_0/and_0/A div_pd_buffered_0/divider_0/and_0/B 0.18fF -C1936 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF -C1937 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C1938 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF -C1939 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/nand_1/z1 0.01fF -C1940 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF -C1941 pd_buffered_0/pd_0/tspc_r_1/Z2 pd_buffered_0/pd_0/tspc_r_1/Z4 0.14fF +C0 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_0/Q 0.14fF +C1 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/vco 0.01fF +C2 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF +C3 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF +C4 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF +C5 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/D 0.03fF +C6 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF +C7 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C8 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z2 0.20fF +C9 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/and_pd_0/Z1 0.18fF +C10 div_pd_buffered_0/tapered_buf_0/a_160_230# div_pd_buffered_0/tapered_buf_0/a_580_0# 0.02fF +C11 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF +C12 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.11fF +C13 pd_buffered_0/tapered_buf_1/a_n10_n140# pd_buffered_0/tapered_buf_1/a_n10_230# 0.01fF +C14 pd_buffered_0/pd_0/tspc_r_0/Z4 pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF +C15 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/R 0.33fF +C16 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/clk 0.04fF +C17 div_pd_buffered_0/tapered_buf_0/a_4670_0# div_pd_buffered_0/tapered_buf_0/a_210_n610# 29.21fF +C18 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/Z4 0.65fF +C19 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.20fF +C20 pll_full_1/divider_0/and_0/OUT pll_full_1/div 0.01fF +C21 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/divider_0/prescaler_0/nand_1/z1 0.21fF +C22 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_1650_0# 1.27fF +C23 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C24 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/nor_1/B 1.21fF +C25 io_clamp_low[1] io_analog[5] 0.53fF +C26 divider_1/and_0/out1 divider_1/and_0/A 0.01fF +C27 divider_0/mc2 divider_0/nor_0/B 0.15fF +C28 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.02fF +C29 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 0.22fF +C30 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C31 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.09fF +C32 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C33 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/UP 0.45fF +C34 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/UP 0.11fF +C35 div_pd_buffered_0/tapered_buf_2/a_1650_0# div_pd_buffered_0/tapered_buf_2/a_580_0# 1.27fF +C36 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/R 0.02fF +C37 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.15fF +C38 cp_buffered_0/tapered_buf_1/a_1650_0# cp_buffered_0/tapered_buf_1/a_210_n610# 2.89fF +C39 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/vco 1.46fF +C40 div_pd_buffered_0/tapered_buf_3/a_160_n140# div_pd_buffered_0/tapered_buf_3/a_580_0# 0.35fF +C41 divider_0/nor_1/A divider_0/tspc_0/Z3 0.38fF +C42 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF +C43 ro_complete_0/a5 ro_complete_0/cbank_1/switch_0/vin 0.09fF +C44 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF +C45 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF +C46 pll_full_1/pd_0/DOWN pll_full_1/cp_0/a_1710_0# 0.04fF +C47 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF +C48 pll_full_0/divider_0/prescaler_0/Out pll_full_0/vco 0.51fF +C49 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/z5 0.04fF +C50 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.25fF +C51 divider_1/tspc_0/Z2 divider_1/nor_1/A 0.23fF +C52 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.02fF +C53 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 0.22fF +C54 ro_complete_buffered_0/tapered_buf_2/a_580_0# ro_complete_buffered_0/tapered_buf_2/a_160_230# 0.02fF +C55 ro_complete_0/cbank_0/v ro_complete_0/cbank_0/switch_3/vin 1.30fF +C56 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C57 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/nor_1/A 0.15fF +C58 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.04fF +C59 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF +C60 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C61 pd_buffered_0/tapered_buf_2/a_580_0# pd_buffered_0/tapered_buf_2/a_1650_0# 1.27fF +C62 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z3 0.45fF +C63 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/and_0/A 0.26fF +C64 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.36fF +C65 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_1/Q 0.21fF +C66 divider_0/nor_1/B divider_0/tspc_0/Q 0.22fF +C67 ro_complete_0/a1 ro_complete_0/cbank_1/v 0.05fF +C68 divider_1/tspc_0/Q divider_1/tspc_1/Z3 0.45fF +C69 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF +C70 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/B 0.08fF +C71 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF +C72 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF +C73 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/vco 0.12fF +C74 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z2 0.19fF +C75 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z3 0.65fF +C76 cp_buffered_0/tapered_buf_2/a_n10_230# cp_buffered_0/tapered_buf_2/in 0.02fF +C77 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z4 0.02fF +C78 pd_buffered_0/tapered_buf_3/a_n10_n140# pd_buffered_0/pd_0/DOWN 0.04fF +C79 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z2 0.71fF +C80 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/tspc_2/Z3 0.05fF +C81 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.13fF +C82 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C83 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z3 0.05fF +C84 divider_0/nor_1/B divider_0/tspc_1/Z1 0.03fF +C85 divider_0/nor_1/A divider_0/tspc_0/Z2 0.23fF +C86 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/m1_2700_2190# 0.08fF +C87 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C88 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF +C89 div_pd_buffered_0/tapered_buf_0/a_1650_0# div_pd_buffered_0/tapered_buf_0/a_210_n610# 2.89fF +C90 div_pd_buffered_0/divider_0/tspc_2/Z2 div_pd_buffered_0/divider_0/tspc_2/Z3 0.16fF +C91 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z4 0.22fF +C92 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/z5 0.11fF +C93 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Q 0.04fF +C94 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.64fF +C95 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF +C96 divider_1/nor_0/B divider_1/tspc_1/a_630_n680# 0.00fF +C97 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z4 0.01fF +C98 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.31fF +C99 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF +C100 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF +C101 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_1/switch_1/vin 0.09fF +C102 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/DOWN 0.21fF +C103 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/and_pd_0/Out1 0.33fF +C104 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_160_n140# 0.22fF +C105 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/DOWN 0.03fF +C106 ro_complete_buffered_0/tapered_buf_1/out ro_complete_buffered_0/tapered_buf_1/a_210_n610# 26.29fF +C107 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/a_630_n680# 0.05fF +C108 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/nor_1/B 0.03fF +C109 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.05fF +C110 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.08fF +C111 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Z4 0.21fF +C112 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z3 0.45fF +C113 ro_complete_buffered_0/tapered_buf_3/a_580_0# ro_complete_buffered_0/tapered_buf_3/a_1650_0# 1.27fF +C114 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF +C115 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF +C116 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/Out 0.05fF +C117 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C118 div_pd_buffered_0/divider_0/and_0/A div_pd_buffered_0/divider_0/and_0/B 0.18fF +C119 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF +C120 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C121 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF +C122 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/nand_1/z1 0.01fF +C123 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF +C124 cp_buffered_0/tapered_buf_2/a_n10_230# cp_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF +C125 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_160_230# 0.17fF +C126 pd_buffered_0/tapered_buf_3/a_1650_0# pd_buffered_0/tapered_buf_3/a_4670_0# 4.78fF +C127 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF +C128 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/a_630_n680# 0.19fF +C129 divider_1/nor_1/Z1 divider_1/nor_1/B 0.06fF +C130 ro_complete_buffered_0/tapered_buf_2/a_580_0# ro_complete_buffered_0/tapered_buf_2/a_1650_0# 1.27fF +C131 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.20fF +C132 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF +C133 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF +C134 ro_complete_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF +C135 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF +C136 ro_complete_0/a0 ro_complete_0/cbank_2/switch_5/vin 0.09fF +C137 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF +C138 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.38fF +C139 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.11fF +C140 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/vco 1.46fF +C141 div_pd_buffered_0/tapered_buf_1/in div_pd_buffered_0/tapered_buf_1/a_n10_230# 0.02fF +C142 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.24fF +C143 div_pd_buffered_0/tapered_buf_2/a_4670_0# div_pd_buffered_0/tapered_buf_2/a_210_n610# 29.21fF +C144 ro_complete_0/a3 ro_complete_0/cbank_2/switch_2/vin 0.09fF +C145 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/A 0.01fF +C146 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/tspc_0/Q 0.05fF +C147 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_2/in 0.04fF +C148 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C149 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF +C150 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a2 0.09fF +C151 ro_complete_0/a4 ro_complete_0/cbank_1/switch_1/vin 0.09fF +C152 divider_1/nor_1/B divider_1/tspc_2/Z4 0.02fF +C153 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C154 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF +C155 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/vco 0.01fF +C156 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/div 0.65fF +C157 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/Z2 0.14fF +C158 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z2 0.11fF +C159 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z1 0.08fF +C160 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/v 0.08fF +C161 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.09fF +C162 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF +C163 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF +C164 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/vco 0.01fF +C165 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D div_pd_buffered_0/divider_0/clk 0.26fF +C166 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF +C167 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF +C168 divider_1/tspc_0/Z1 divider_1/nor_1/A 0.03fF +C169 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z3 0.05fF +C170 divider_1/nor_0/B divider_1/tspc_2/Z1 0.03fF +C171 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/vco 1.36fF +C172 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/tspc_r_1/z5 0.03fF +C173 div_pd_buffered_0/pd_0/tspc_r_1/Z2 div_pd_buffered_0/pd_0/R 0.21fF +C174 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/UP 0.03fF +C175 divider_1/tspc_0/Z2 divider_1/tspc_0/Z4 0.36fF +C176 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_160_n140# 0.17fF +C177 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/in 0.04fF +C178 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/R 0.61fF +C179 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C180 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/div 0.12fF +C181 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF +C182 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C183 divider_0/tspc_0/Z4 divider_0/tspc_0/Z3 0.65fF +C184 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/ref 0.02fF +C185 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/a_630_n680# 0.35fF +C186 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF +C187 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C188 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF +C189 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z2 0.25fF +C190 divider_1/mc2 divider_1/and_0/A 0.16fF +C191 divider_1/nor_0/Z1 divider_1/nor_0/B 0.06fF +C192 pll_full_1/pd_0/tspc_r_0/Qbar pll_full_1/pd_0/UP 0.21fF +C193 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z4 0.12fF +C194 ro_complete_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 2.89fF +C195 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.05fF +C196 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z4 0.36fF +C197 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Q 0.05fF +C198 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/in 0.19fF +C199 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C200 cp_buffered_0/tapered_buf_0/in cp_buffered_0/tapered_buf_0/a_n10_230# 0.02fF +C201 div_pd_buffered_0/tapered_buf_3/a_160_230# div_pd_buffered_0/tapered_buf_3/a_n10_230# 0.09fF +C202 divider_0/and_0/OUT divider_0/and_0/B 0.01fF +C203 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF +C204 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C205 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF +C206 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C207 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF +C208 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/vco 1.46fF +C209 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/D 0.03fF +C210 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/tspc_r_0/Qbar 0.01fF +C211 ro_complete_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 2.89fF +C212 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C213 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z4 0.15fF +C214 divider_0/nor_1/A divider_0/tspc_1/Z2 0.15fF +C215 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/tapered_buf_1/in 0.05fF +C216 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF +C217 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF +C218 divider_0/tspc_0/Z4 divider_0/tspc_0/Z2 0.36fF +C219 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF +C220 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF +C221 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C222 divider_0/nor_1/B divider_0/and_0/A 0.26fF +C223 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_1/Z3 0.27fF +C224 divider_1/tspc_0/Q divider_1/nor_1/A 0.55fF +C225 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/D 0.05fF +C226 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C227 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C228 divider_1/tspc_1/Q divider_1/tspc_1/a_630_n680# 0.04fF +C229 pd_buffered_0/tapered_buf_2/a_n10_230# pd_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF +C230 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.38fF +C231 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/z5 0.11fF +C232 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF +C233 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.03fF +C234 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/a_1710_0# 0.83fF +C235 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/ro_complete_0/cbank_2/v 0.04fF +C236 div_pd_buffered_0/divider_0/tspc_2/Z2 div_pd_buffered_0/divider_0/tspc_2/Z4 0.36fF +C237 divider_0/nor_1/B divider_0/tspc_1/Z3 0.38fF +C238 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/a_630_n680# 0.12fF +C239 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin ro_complete_buffered_0/tapered_buf_1/in 1.43fF +C240 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_0/Q 0.01fF +C241 divider_0/prescaler_0/Out divider_0/tspc_0/Z3 0.45fF +C242 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF +C243 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_1/Qbar1 0.01fF +C244 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_n10_n140# 0.05fF +C245 divider_1/tspc_1/Z1 divider_1/tspc_1/Z2 1.07fF +C246 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF +C247 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C248 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF +C249 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/vco 0.11fF +C250 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C251 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C252 pd_buffered_0/tapered_buf_0/a_580_0# pd_buffered_0/tapered_buf_0/a_160_230# 0.02fF +C253 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/tapered_buf_0/a_210_n610# 0.22fF +C254 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z2 0.19fF +C255 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z1 0.09fF +C256 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF +C257 cp_buffered_0/cp_0/a_1710_0# cp_buffered_0/cp_0/out 0.84fF +C258 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/nor_1/B 0.38fF +C259 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z1 0.00fF +C260 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.12fF +C261 pll_full_1/ro_complete_0/a2 pll_full_1/vco 0.11fF +C262 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/div 0.19fF +C263 divider_0/nor_1/B divider_0/tspc_1/Z4 0.21fF +C264 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF +C265 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_4670_0# 4.78fF +C266 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z3 0.05fF +C267 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z1 0.03fF +C268 divider_1/tspc_0/Z4 divider_1/tspc_0/Z1 0.00fF +C269 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_1/z1 0.21fF +C270 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF +C271 divider_1/nor_1/B divider_1/tspc_0/a_630_n680# 0.01fF +C272 pll_full_0/ref pll_full_0/pd_0/DOWN 1.48fF +C273 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF +C274 cp_buffered_0/tapered_buf_2/a_1650_0# cp_buffered_0/tapered_buf_2/a_210_n610# 2.89fF +C275 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_210_n610# 0.84fF +C276 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_n10_n140# 0.05fF +C277 ro_complete_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_2/a_210_n610# 0.22fF +C278 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF +C279 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/div 0.02fF +C280 divider_0/mc2 divider_0/and_0/B 0.20fF +C281 cp_buffered_0/tapered_buf_0/a_160_230# cp_buffered_0/tapered_buf_0/a_580_0# 0.02fF +C282 cp_buffered_0/tapered_buf_0/a_210_n610# cp_buffered_0/tapered_buf_0/a_160_n140# 0.22fF +C283 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_2/Z4 0.02fF +C284 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C285 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/clk 0.45fF +C286 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/in 0.19fF +C287 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF +C288 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C289 ro_complete_buffered_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_3/a_n10_230# 0.02fF +C290 ro_complete_0/a0 ro_complete_0/cbank_2/v 0.05fF +C291 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.04fF +C292 pll_full_1/ro_complete_0/cbank_1/switch_0/vin pll_full_1/vco 1.58fF +C293 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/UP 0.33fF +C294 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/UP 0.33fF +C295 divider_0/prescaler_0/Out divider_0/tspc_0/Z2 0.11fF +C296 ro_complete_buffered_0/tapered_buf_4/a_160_230# ro_complete_buffered_0/tapered_buf_4/a_580_0# 0.02fF +C297 ro_complete_0/a5 ro_complete_0/cbank_1/v 0.10fF +C298 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/a0 0.09fF +C299 div_pd_buffered_0/tapered_buf_4/a_210_n610# div_pd_buffered_0/tapered_buf_4/a_1650_0# 2.89fF +C300 divider_1/prescaler_0/tspc_0/Z2 divider_1/and_0/OUT 0.06fF +C301 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF +C302 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF +C303 divider_1/tspc_1/Q divider_1/tspc_2/Z1 0.01fF +C304 divider_1/tspc_1/Z3 divider_1/tspc_1/a_630_n680# 0.05fF +C305 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a2 0.09fF +C306 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF +C307 pll_full_0/ref pll_full_0/pd_0/R 0.61fF +C308 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z3 0.65fF +C309 ro_complete_0/cbank_1/v ro_complete_0/a4 0.05fF +C310 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_1650_0# 1.27fF +C311 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF +C312 divider_0/nor_1/A divider_0/tspc_0/Z1 0.03fF +C313 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C314 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z3 0.65fF +C315 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/D 0.03fF +C316 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/UP 0.06fF +C317 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF +C318 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 0.84fF +C319 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_n10_n140# 0.05fF +C320 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/in 0.19fF +C321 pll_full_1/pd_0/R pll_full_1/pd_0/UP 0.46fF +C322 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C323 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C324 divider_1/tspc_2/Z1 divider_1/tspc_2/Z2 1.07fF +C325 divider_1/nor_0/B divider_1/tspc_2/Z3 0.38fF +C326 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z4 0.12fF +C327 div_pd_buffered_0/pd_0/tspc_r_1/Z2 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.14fF +C328 pd_buffered_0/tapered_buf_1/a_n10_230# pd_buffered_0/tapered_buf_1/a_160_230# 0.09fF +C329 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/DOWN 0.02fF +C330 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/R 0.30fF +C331 pll_full_1/ro_complete_0/cbank_2/switch_0/vin pll_full_1/ro_complete_0/cbank_2/v 1.45fF +C332 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/A 0.16fF +C333 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/and_0/OUT 0.14fF +C334 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF +C335 divider_0/nor_1/Z1 divider_0/and_0/A 0.80fF +C336 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF +C337 div_pd_buffered_0/tapered_buf_4/a_n10_n140# div_pd_buffered_0/tapered_buf_4/a_n10_230# 0.01fF +C338 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF +C339 divider_1/tspc_1/Z1 divider_1/tspc_1/Z4 0.00fF +C340 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z2 0.01fF +C341 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C342 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF +C343 io_clamp_high[0] io_analog[4] 0.53fF +C344 divider_1/and_0/out1 divider_1/and_0/Z1 0.36fF +C345 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF +C346 divider_1/tspc_0/Z2 divider_1/tspc_0/Z1 1.07fF +C347 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/in 0.19fF +C348 pd_buffered_0/tapered_buf_2/a_210_n610# pd_buffered_0/pd_0/DIV 26.29fF +C349 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.14fF +C350 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C351 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF +C352 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF +C353 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/cp_0/upbar 26.29fF +C354 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a3 3.17fF +C355 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF +C356 ro_complete_0/a3 ro_complete_0/cbank_2/v 0.05fF +C357 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.03fF +C358 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z2 0.36fF +C359 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF +C360 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.11fF +C361 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/clk 0.12fF +C362 divider_1/prescaler_0/Out divider_1/nor_1/A 0.15fF +C363 divider_0/nor_1/A divider_0/and_0/B 0.08fF +C364 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z2 0.19fF +C365 pll_full_1/div pll_full_1/vco 2.26fF +C366 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF +C367 div_pd_buffered_0/tapered_buf_2/in div_pd_buffered_0/tapered_buf_2/a_n10_230# 0.02fF +C368 divider_1/and_0/OUT divider_1/prescaler_0/nand_0/z1 0.01fF +C369 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF +C370 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C371 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF +C372 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.20fF +C373 div_pd_buffered_0/pd_0/tspc_r_0/Z1 div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.71fF +C374 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/in 0.19fF +C375 ro_complete_0/cbank_0/v ro_complete_0/cbank_0/switch_2/vin 1.30fF +C376 divider_0/nor_1/A divider_0/prescaler_0/m1_2700_2190# 0.01fF +C377 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/in 0.02fF +C378 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF +C379 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Q 0.55fF +C380 pll_full_1/ro_complete_0/cbank_1/switch_5/vin pll_full_1/vco 1.46fF +C381 div_pd_buffered_0/tapered_buf_0/a_580_0# div_pd_buffered_0/tapered_buf_0/a_210_n610# 0.84fF +C382 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/clk 0.45fF +C383 ro_complete_0/a0 ro_complete_0/cbank_2/switch_4/vin 0.13fF +C384 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF +C385 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/D 0.11fF +C386 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF +C387 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_2/D 0.16fF +C388 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.03fF +C389 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_1/B 0.18fF +C390 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z4 0.12fF +C391 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF +C392 divider_0/and_0/out1 divider_0/and_0/A 0.01fF +C393 divider_0/tspc_0/Z3 divider_0/tspc_0/Q 0.05fF +C394 divider_1/and_0/OUT divider_1/clk 0.04fF +C395 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_0/Q 0.14fF +C396 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/vco 0.01fF +C397 div_pd_buffered_0/tapered_buf_1/a_n10_n140# div_pd_buffered_0/tapered_buf_1/a_160_n140# 0.05fF +C398 div_pd_buffered_0/pd_0/tspc_r_0/Z4 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF +C399 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/DOWN 0.11fF +C400 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z1 0.17fF +C401 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_1650_0# 1.27fF +C402 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z3 0.33fF +C403 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF +C404 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.05fF +C405 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.08fF +C406 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF +C407 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z1 0.01fF +C408 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/Q 0.22fF +C409 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF +C410 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/R 0.29fF +C411 divider_1/tspc_1/Z2 divider_1/tspc_1/Z3 0.16fF +C412 pll_full_0/divider_0/and_0/OUT pll_full_0/div 0.01fF +C413 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF +C414 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C415 pd_buffered_0/tapered_buf_0/a_1650_0# pd_buffered_0/tapered_buf_0/a_210_n610# 2.89fF +C416 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/R 0.51fF +C417 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/a_160_230# 0.09fF +C418 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C419 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C420 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/and_0/A 0.80fF +C421 pll_full_1/ro_complete_0/cbank_2/switch_5/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF +C422 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF +C423 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C424 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_580_0# 0.35fF +C425 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C426 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z2 1.07fF +C427 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z3 0.38fF +C428 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z4 0.12fF +C429 div_pd_buffered_0/divider_0/and_0/B div_pd_buffered_0/divider_0/and_0/Z1 0.07fF +C430 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.84fF +C431 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Qbar1 0.38fF +C432 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C433 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF +C434 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C435 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/a_630_n680# 0.05fF +C436 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.78fF +C437 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/vco 1.46fF +C438 divider_1/nor_1/A divider_1/prescaler_0/tspc_1/Q 0.03fF +C439 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/D 0.15fF +C440 divider_1/nor_0/Z1 divider_1/and_0/B 0.78fF +C441 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.02fF +C442 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/tapered_buf_3/a_160_230# 0.09fF +C443 pd_buffered_0/tapered_buf_3/a_4670_0# pd_buffered_0/tapered_buf_3/a_210_n610# 29.21fF +C444 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.01fF +C445 ro_complete_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_2/a_160_230# 0.17fF +C446 cp_buffered_0/tapered_buf_0/a_210_n610# cp_buffered_0/tapered_buf_0/a_1650_0# 2.89fF +C447 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF +C448 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.35fF +C449 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_160_230# 0.17fF +C450 ro_complete_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.02fF +C451 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Z4 0.12fF +C452 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z2 0.01fF +C453 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Z3 0.38fF +C454 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 div_pd_buffered_0/divider_0/clk 0.12fF +C455 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_580_0# 0.35fF +C456 div_pd_buffered_0/tapered_buf_3/a_160_230# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.17fF +C457 divider_0/nor_1/B divider_0/tspc_2/Z4 0.02fF +C458 divider_0/tspc_0/Z4 divider_0/tspc_0/Z1 0.00fF +C459 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF +C460 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 2.89fF +C461 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/Z1 0.36fF +C462 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_0/Z2 0.14fF +C463 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C464 divider_1/mc2 divider_1/prescaler_0/tspc_2/a_630_n680# 0.33fF +C465 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/Qbar 0.01fF +C466 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/ref 0.12fF +C467 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF +C468 divider_1/tspc_1/Q divider_1/tspc_2/Z3 0.45fF +C469 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/R 0.29fF +C470 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.38fF +C471 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/pd_0/DOWN 0.19fF +C472 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_580_0# 0.35fF +C473 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.06fF +C474 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.06fF +C475 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C476 divider_1/prescaler_0/Out divider_1/tspc_0/Z4 0.12fF +C477 divider_0/nor_1/A divider_0/tspc_0/a_630_n680# 0.35fF +C478 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/nand_0/z1 0.01fF +C479 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/vco 0.11fF +C480 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/nor_0/B 0.35fF +C481 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/clk 0.60fF +C482 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z1 0.06fF +C483 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF +C484 divider_1/prescaler_0/tspc_1/Z2 divider_1/and_0/OUT 0.06fF +C485 divider_1/tspc_2/Z2 divider_1/tspc_2/Z3 0.16fF +C486 divider_1/nor_0/B divider_1/tspc_2/Z4 0.22fF +C487 divider_0/mc2 divider_0/and_0/OUT 0.05fF +C488 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_580_0# 0.84fF +C489 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C490 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/a_160_230# 0.17fF +C491 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Z2 0.23fF +C492 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C493 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.16fF +C494 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_580_0# 0.35fF +C495 ro_complete_buffered_0/tapered_buf_1/a_580_0# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 1.27fF +C496 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.04fF +C497 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/div 0.03fF +C498 pll_full_1/divider_0/and_0/OUT pll_full_1/vco 0.06fF +C499 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/ro_complete_0/a0 26.29fF +C500 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF +C501 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/a_630_n680# 0.05fF +C502 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/nor_1/B 0.03fF +C503 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF +C504 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF +C505 divider_1/tspc_1/Z3 divider_1/tspc_1/Z4 0.65fF +C506 divider_1/tspc_0/Z3 divider_1/tspc_0/a_630_n680# 0.05fF +C507 divider_1/and_0/A divider_1/and_0/B 0.18fF +C508 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF +C509 pd_buffered_0/pd_0/tspc_r_1/Z4 pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF +C510 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/switch_5/vin 0.20fF +C511 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF +C512 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/and_0/B 0.18fF +C513 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C514 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/in 0.02fF +C515 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/vco 0.64fF +C516 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/UP 0.11fF +C517 divider_1/prescaler_0/m1_2700_2190# divider_1/nor_1/A 0.01fF +C518 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF +C519 divider_0/nor_0/B divider_0/tspc_2/Z1 0.03fF +C520 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/ref 0.65fF +C521 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF +C522 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_160_230# 0.17fF +C523 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF +C524 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF +C525 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF +C526 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/vco 1.46fF +C527 divider_1/prescaler_0/tspc_2/D divider_1/prescaler_0/nand_0/z1 0.24fF +C528 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF +C529 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Q 0.05fF +C530 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.20fF +C531 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF +C532 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/nor_1/A 0.21fF +C533 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C534 pd_buffered_0/tapered_buf_0/a_n10_230# pd_buffered_0/tapered_buf_0/a_160_230# 0.09fF +C535 pd_buffered_0/tapered_buf_0/a_4670_0# pd_buffered_0/tapered_buf_0/a_210_n610# 29.21fF +C536 pd_buffered_0/pd_0/and_pd_0/Out1 pd_buffered_0/pd_0/UP 0.33fF +C537 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.19fF +C538 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF +C539 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF +C540 div_pd_buffered_0/divider_0/tspc_0/Z2 div_pd_buffered_0/divider_0/tspc_0/Z3 0.16fF +C541 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 div_pd_buffered_0/divider_0/clk 0.12fF +C542 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.09fF +C543 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.15fF +C544 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/and_0/A 0.01fF +C545 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF +C546 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF +C547 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z4 0.20fF +C548 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF +C549 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF +C550 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF +C551 divider_1/tspc_0/Z2 divider_1/prescaler_0/Out 0.11fF +C552 divider_1/prescaler_0/tspc_2/D divider_1/clk 0.26fF +C553 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z4 0.08fF +C554 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/vco 0.01fF +C555 div_pd_buffered_0/tapered_buf_3/a_4670_0# div_pd_buffered_0/tapered_buf_3/a_210_n610# 29.21fF +C556 div_pd_buffered_0/pd_0/tspc_r_0/z5 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.02fF +C557 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.25fF +C558 pd_buffered_0/pd_0/tspc_r_0/Z2 pd_buffered_0/pd_0/tspc_r_0/Z4 0.14fF +C559 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/UP 0.21fF +C560 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z4 0.21fF +C561 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/tapered_buf_1/in 0.05fF +C562 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z3 0.45fF +C563 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Q 0.04fF +C564 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/A 0.26fF +C565 divider_0/tspc_1/Z2 divider_0/tspc_0/Q 0.14fF +C566 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/D 0.03fF +C567 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF +C568 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C569 divider_1/tspc_1/Z2 divider_1/nor_1/A 0.15fF +C570 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C571 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/pd_0/DOWN 0.02fF +C572 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.14fF +C573 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_580_0# 0.35fF +C574 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_4/vin 0.20fF +C575 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/Out 0.05fF +C576 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/UP 2.89fF +C577 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF +C578 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/R 0.01fF +C579 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/tspc_r_1/Qbar 0.21fF +C580 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar1 0.11fF +C581 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/Z3 0.65fF +C582 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C583 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_1650_0# 1.27fF +C584 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_1/Z4 0.02fF +C585 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.36fF +C586 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/a_630_n680# 0.12fF +C587 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF +C588 divider_0/prescaler_0/Out divider_0/prescaler_0/m1_2700_2190# 0.11fF +C589 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.45fF +C590 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.09fF +C591 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z3 0.16fF +C592 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z4 0.22fF +C593 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/D 0.05fF +C594 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_210_n610# 0.22fF +C595 ro_complete_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_2/a_210_n610# 2.89fF +C596 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF +C597 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Q 0.05fF +C598 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.12fF +C599 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/Out 0.21fF +C600 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF +C601 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_580_0# 0.35fF +C602 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/switch_1/vin 0.20fF +C603 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/pd_0/UP 0.19fF +C604 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF +C605 pd_buffered_0/tapered_buf_0/in pd_buffered_0/tapered_buf_0/a_n10_230# 0.02fF +C606 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.12fF +C607 ro_complete_buffered_0/tapered_buf_0/a_580_0# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 0.84fF +C608 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF +C609 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.84fF +C610 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF +C611 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C612 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_580_0# 0.35fF +C613 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/R 0.01fF +C614 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/a_630_n680# 0.01fF +C615 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF +C616 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_1650_0# 1.27fF +C617 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_1/Z4 0.21fF +C618 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF +C619 pll_full_1/ro_complete_0/a0 pll_full_1/vco 0.11fF +C620 divider_0/tspc_0/Z4 divider_0/tspc_0/a_630_n680# 0.12fF +C621 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.06fF +C622 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF +C623 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF +C624 pll_full_1/divider_0/and_0/A pll_full_1/divider_0/and_0/B 0.18fF +C625 divider_1/prescaler_0/m1_2700_2190# divider_1/and_0/OUT 0.14fF +C626 divider_1/mc2 divider_1/nor_1/B 0.06fF +C627 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C628 divider_1/tspc_1/Q divider_1/tspc_2/Z4 0.15fF +C629 divider_1/nor_1/A divider_1/and_0/A 0.01fF +C630 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a2 0.14fF +C631 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/UP 0.03fF +C632 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z1 0.17fF +C633 ro_complete_0/cbank_1/v ro_complete_0/a2 0.05fF +C634 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF +C635 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/tspc_2/a_630_n680# 0.04fF +C636 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/Z2 0.36fF +C637 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C638 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z1 0.00fF +C639 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/Out 0.28fF +C640 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/tapered_buf_1/in 0.05fF +C641 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/Z1 0.04fF +C642 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z2 0.01fF +C643 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/clk 0.05fF +C644 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/divider_0/prescaler_0/nand_0/z1 0.24fF +C645 divider_1/prescaler_0/tspc_0/Z2 divider_1/clk 0.11fF +C646 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF +C647 divider_1/tspc_2/Z2 divider_1/tspc_2/Z4 0.36fF +C648 divider_1/tspc_2/Z3 divider_1/Out 0.05fF +C649 divider_0/mc2 divider_0/nor_1/A 0.04fF +C650 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_0/Q 0.01fF +C651 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/and_pd_0/Out1 0.12fF +C652 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/UP 0.21fF +C653 pd_buffered_0/pd_0/tspc_r_0/Z2 pd_buffered_0/pd_0/R 0.21fF +C654 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.13fF +C655 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/UP 0.03fF +C656 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.07fF +C657 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/B 0.18fF +C658 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/vco 0.26fF +C659 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C660 divider_0/tspc_1/Q divider_0/tspc_2/Z1 0.01fF +C661 ro_complete_buffered_0/tapered_buf_3/a_4670_0# ro_complete_buffered_0/tapered_buf_3/a_1650_0# 4.78fF +C662 divider_1/nor_1/A divider_1/tspc_1/Z4 0.02fF +C663 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z3 0.06fF +C664 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/nor_1/B 0.38fF +C665 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z1 0.00fF +C666 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF +C667 pll_full_0/ro_complete_0/a2 pll_full_0/vco 0.11fF +C668 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF +C669 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z1 0.03fF +C670 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/in 0.02fF +C671 ro_complete_buffered_0/tapered_buf_2/a_n10_230# ro_complete_buffered_0/tapered_buf_2/a_160_230# 0.09fF +C672 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF +C673 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.09fF +C674 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C675 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/out 26.29fF +C676 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/and_pd_0/Z1 0.07fF +C677 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a1 3.18fF +C678 ro_complete_0/a1 ro_complete_0/cbank_2/v 0.05fF +C679 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z3 0.45fF +C680 pll_full_1/ro_complete_0/a3 pll_full_1/vco 0.11fF +C681 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/nor_0/B 0.00fF +C682 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_0/Q 0.14fF +C683 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.05fF +C684 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/clk 0.01fF +C685 divider_0/prescaler_0/Out divider_0/tspc_0/a_630_n680# 0.01fF +C686 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C687 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF +C688 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF +C689 divider_0/nor_0/B divider_0/tspc_2/Z3 0.38fF +C690 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF +C691 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF +C692 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/vco 1.58fF +C693 divider_1/nor_1/B divider_1/nor_0/B 0.47fF +C694 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/Q 0.04fF +C695 divider_1/prescaler_0/tspc_1/Z3 divider_1/clk 0.45fF +C696 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/tapered_buf_1/in 0.02fF +C697 div_pd_buffered_0/tapered_buf_0/a_4670_0# div_pd_buffered_0/tapered_buf_0/a_1650_0# 4.78fF +C698 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/a_210_n610# 0.22fF +C699 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z3 0.06fF +C700 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/in 0.02fF +C701 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.11fF +C702 pd_buffered_0/tapered_buf_0/a_n10_230# pd_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF +C703 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_n10_n140# 0.05fF +C704 ro_complete_buffered_0/tapered_buf_1/a_160_n140# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.35fF +C705 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.05fF +C706 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF +C707 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF +C708 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF +C709 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF +C710 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z3 0.65fF +C711 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF +C712 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.02fF +C713 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 0.22fF +C714 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/and_pd_0/Out1 0.05fF +C715 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/tspc_r_1/Qbar 0.01fF +C716 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/R 0.27fF +C717 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF +C718 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_1/switch_3/vin 0.09fF +C719 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/nor_1/B 1.21fF +C720 divider_1/nor_1/Z1 divider_1/and_0/B 0.18fF +C721 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF +C722 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z3 0.06fF +C723 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z2 0.11fF +C724 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C725 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z1 0.00fF +C726 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z4 0.15fF +C727 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF +C728 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF +C729 div_pd_buffered_0/tapered_buf_3/a_160_230# div_pd_buffered_0/tapered_buf_3/a_580_0# 0.02fF +C730 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_1/z5 0.03fF +C731 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/pd_0/tspc_r_1/Z2 0.71fF +C732 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.45fF +C733 divider_1/mc2 divider_1/and_0/out1 0.06fF +C734 divider_1/tspc_1/Z1 divider_1/nor_1/B 0.03fF +C735 io_clamp_low[2] io_analog[6] 0.53fF +C736 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z3 0.25fF +C737 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_1650_0# 1.27fF +C738 pd_buffered_0/pd_0/DIV pd_buffered_0/tapered_buf_0/in 0.02fF +C739 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_4670_0# 29.21fF +C740 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF +C741 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/z5 0.11fF +C742 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C743 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/a_630_n680# 0.12fF +C744 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_160_230# 0.17fF +C745 cp_buffered_0/tapered_buf_1/a_1650_0# cp_buffered_0/tapered_buf_1/a_4670_0# 4.78fF +C746 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z3 0.11fF +C747 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF +C748 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z4 0.36fF +C749 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/div 0.05fF +C750 divider_0/and_0/OUT divider_0/clk 0.04fF +C751 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF +C752 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C753 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/div 0.65fF +C754 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF +C755 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z2 0.36fF +C756 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.09fF +C757 div_pd_buffered_0/tapered_buf_2/a_160_230# div_pd_buffered_0/tapered_buf_2/a_n10_230# 0.09fF +C758 divider_1/prescaler_0/tspc_2/Z4 divider_1/prescaler_0/tspc_2/D 0.11fF +C759 pll_full_0/div pll_full_0/vco 2.26fF +C760 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF +C761 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_1650_0# 1.27fF +C762 ro_complete_buffered_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.19fF +C763 ro_complete_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_2/a_n10_n140# 0.05fF +C764 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/UP 0.45fF +C765 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF +C766 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.09fF +C767 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/and_0/B 0.08fF +C768 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/nor_0/B 0.22fF +C769 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.19fF +C770 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/clk 0.01fF +C771 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF +C772 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF +C773 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.06fF +C774 cp_buffered_0/tapered_buf_0/a_1650_0# cp_buffered_0/tapered_buf_0/a_4670_0# 4.78fF +C775 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF +C776 divider_0/tspc_1/Z3 divider_0/tspc_1/Q 0.05fF +C777 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF +C778 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF +C779 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_2/D 0.16fF +C780 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z3 0.16fF +C781 ro_complete_0/a2 ro_complete_0/cbank_1/switch_3/vin 0.09fF +C782 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/tspc_r_0/Qbar 0.01fF +C783 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Q 0.55fF +C784 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/vco 1.46fF +C785 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z1 0.17fF +C786 divider_1/prescaler_0/tspc_2/Z3 divider_1/clk 0.45fF +C787 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z2 0.25fF +C788 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/pd_0/DOWN 0.02fF +C789 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/nor_0/B 0.42fF +C790 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# 0.05fF +C791 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.03fF +C792 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/nor_1/A 0.35fF +C793 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF +C794 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF +C795 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF +C796 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z2 0.40fF +C797 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D div_pd_buffered_0/divider_0/clk 0.29fF +C798 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 2.89fF +C799 ro_complete_buffered_0/tapered_buf_1/a_160_n140# ro_complete_buffered_0/tapered_buf_1/in 0.19fF +C800 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF +C801 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C802 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_2/Z4 0.02fF +C803 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF +C804 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/vco 0.45fF +C805 divider_1/prescaler_0/Out divider_1/clk 0.51fF +C806 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.15fF +C807 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z2 0.25fF +C808 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Z4 0.65fF +C809 ro_complete_buffered_0/tapered_buf_4/a_210_n610# ro_complete_buffered_0/ro_complete_0/a2 26.29fF +C810 pll_full_1/cp_0/down pll_full_1/cp_0/a_1710_0# 0.32fF +C811 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z1 0.01fF +C812 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/Q 0.22fF +C813 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_4/vin 0.20fF +C814 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z3 0.65fF +C815 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Q 0.04fF +C816 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.06fF +C817 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF +C818 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.38fF +C819 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.11fF +C820 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/clk 0.11fF +C821 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.03fF +C822 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF +C823 divider_0/tspc_1/Q divider_0/tspc_2/Z3 0.45fF +C824 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Q 0.04fF +C825 divider_1/tspc_0/Q divider_1/tspc_1/a_630_n680# 0.01fF +C826 divider_1/nor_1/B divider_1/tspc_1/Q 0.51fF +C827 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z4 0.00fF +C828 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Q 0.21fF +C829 divider_1/prescaler_0/tspc_1/Z2 divider_1/clk 0.11fF +C830 pll_full_1/pd_0/DOWN pll_full_1/ref 1.48fF +C831 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C832 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/A 0.80fF +C833 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C834 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF +C835 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z3 0.38fF +C836 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF +C837 div_pd_buffered_0/tapered_buf_4/a_1650_0# div_pd_buffered_0/tapered_buf_4/a_4670_0# 4.78fF +C838 divider_1/and_0/B divider_1/and_0/Z1 0.07fF +C839 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_3/vin 0.20fF +C840 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C841 pd_buffered_0/tapered_buf_1/a_n10_230# pd_buffered_0/pd_0/UP 0.02fF +C842 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/and_pd_0/Out1 0.33fF +C843 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/nor_0/B 0.47fF +C844 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Z3 0.05fF +C845 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF +C846 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 2.89fF +C847 ro_complete_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.17fF +C848 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF +C849 divider_0/tspc_1/a_630_n680# divider_0/nor_0/B 0.00fF +C850 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF +C851 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF +C852 divider_0/nor_0/B divider_0/tspc_2/Z4 0.22fF +C853 pd_buffered_0/tapered_buf_2/a_580_0# pd_buffered_0/tapered_buf_2/a_160_230# 0.02fF +C854 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF +C855 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z4 0.02fF +C856 divider_1/nor_1/B divider_1/tspc_2/Z2 0.20fF +C857 divider_1/prescaler_0/tspc_1/Z4 divider_1/clk 0.12fF +C858 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF +C859 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF +C860 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF +C861 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF +C862 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_580_0# 0.84fF +C863 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/tspc_r_0/Qbar1 0.01fF +C864 div_pd_buffered_0/tapered_buf_1/a_4670_0# div_pd_buffered_0/tapered_buf_1/a_210_n610# 29.21fF +C865 cp_buffered_0/cp_0/a_10_n50# cp_buffered_0/cp_0/a_1710_0# 0.04fF +C866 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/out1 0.31fF +C867 div_pd_buffered_0/divider_0/tspc_1/Z4 div_pd_buffered_0/divider_0/tspc_0/Q 0.15fF +C868 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z3 0.65fF +C869 divider_0/nor_1/A divider_0/tspc_0/Z4 0.21fF +C870 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/tapered_buf_1/in 0.05fF +C871 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_0/Q 0.01fF +C872 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.11fF +C873 div_pd_buffered_0/tapered_buf_2/in div_pd_buffered_0/tapered_buf_2/a_160_n140# 0.19fF +C874 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF +C875 divider_0/and_0/A divider_0/and_0/B 0.18fF +C876 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z1 0.09fF +C877 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C878 divider_1/tspc_2/a_630_n680# divider_1/nor_0/B 0.35fF +C879 divider_1/prescaler_0/tspc_1/Q divider_1/clk 0.60fF +C880 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF +C881 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/vco 0.11fF +C882 ro_complete_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 2.89fF +C883 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a4 0.12fF +C884 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_3/vin 0.09fF +C885 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/R 0.36fF +C886 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF +C887 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.20fF +C888 div_pd_buffered_0/pd_0/tspc_r_1/Z1 div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.71fF +C889 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/a_n10_230# 0.01fF +C890 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/out1 0.06fF +C891 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/Z4 0.36fF +C892 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/Q 0.05fF +C893 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/nor_1/B 0.35fF +C894 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Z2 0.01fF +C895 div_pd_buffered_0/tapered_buf_3/a_4670_0# div_pd_buffered_0/tapered_buf_3/a_1650_0# 4.78fF +C896 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/upbar 0.29fF +C897 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/ref 0.65fF +C898 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/and_0/B 0.29fF +C899 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z2 0.19fF +C900 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z3 0.65fF +C901 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/vco 0.45fF +C902 cp_buffered_0/cp_0/down cp_buffered_0/cp_0/a_1710_0# 0.32fF +C903 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C904 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z1 0.09fF +C905 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_0/z1 0.24fF +C906 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 0.84fF +C907 div_pd_buffered_0/tapered_buf_3/a_210_n610# div_pd_buffered_0/tapered_buf_3/a_1650_0# 2.89fF +C908 divider_1/tspc_1/Z3 divider_1/nor_1/B 0.38fF +C909 pll_full_0/filter_0/a_4216_n5230# pll_full_0/vco 1.58fF +C910 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/div 0.03fF +C911 pll_full_0/divider_0/and_0/OUT pll_full_0/vco 0.06fF +C912 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.17fF +C913 ro_complete_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_6/a_4670_0# 4.78fF +C914 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C915 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C916 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/tspc_r_1/Qbar1 0.01fF +C917 cp_buffered_0/tapered_buf_2/a_580_0# cp_buffered_0/tapered_buf_2/a_160_n140# 0.35fF +C918 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/tspc_r_1/z5 0.03fF +C919 pd_buffered_0/pd_0/tspc_r_1/Z2 pd_buffered_0/pd_0/R 0.21fF +C920 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/UP 0.03fF +C921 ro_complete_0/a5 ro_complete_0/cbank_2/v 0.08fF +C922 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.65fF +C923 pll_full_1/ro_complete_0/a4 pll_full_1/vco 0.01fF +C924 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.05fF +C925 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_210_n610# 0.84fF +C926 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_n10_n140# 0.05fF +C927 ro_complete_0/a3 ro_complete_0/cbank_1/switch_2/vin 0.09fF +C928 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z4 0.28fF +C929 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z3 0.33fF +C930 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_0/Qbar1 0.30fF +C931 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF +C932 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.26fF +C933 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/vco 0.64fF +C934 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.19fF +C935 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z1 0.09fF +C936 ro_complete_0/cbank_2/v ro_complete_0/a4 0.05fF +C937 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_580_0# 0.02fF +C938 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.17fF +C939 ro_complete_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_7/a_4670_0# 4.78fF +C940 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/switch_3/vin 0.20fF +C941 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/nor_1/A 0.15fF +C942 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/a0 0.09fF +C943 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF +C944 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.12fF +C945 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF +C946 divider_0/nor_1/A divider_0/prescaler_0/Out 0.15fF +C947 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF +C948 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF +C949 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C950 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF +C951 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.00fF +C952 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF +C953 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z2 0.14fF +C954 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.32fF +C955 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF +C956 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/in 0.02fF +C957 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF +C958 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Q 0.91fF +C959 pll_full_1/divider_0/and_0/B pll_full_1/divider_0/and_0/Z1 0.07fF +C960 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/nand_0/z1 0.07fF +C961 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_0/z5 0.04fF +C962 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF +C963 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C964 pll_full_0/pd_0/tspc_r_1/z5 pll_full_0/div 0.04fF +C965 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/pd_0/DOWN 0.19fF +C966 divider_1/tspc_0/Q divider_1/tspc_1/Z2 0.14fF +C967 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z4 0.36fF +C968 divider_1/nor_1/B divider_1/and_0/B 0.31fF +C969 divider_1/prescaler_0/tspc_2/Z4 divider_1/clk 0.12fF +C970 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF +C971 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/A 0.01fF +C972 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/R 0.03fF +C973 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/tspc_r_0/Qbar 0.01fF +C974 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_0/Qbar1 0.20fF +C975 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/nor_1/B 0.38fF +C976 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C977 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C978 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF +C979 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z2 0.01fF +C980 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/tapered_buf_1/in 0.05fF +C981 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z3 0.06fF +C982 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 pll_full_1/vco 0.12fF +C983 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 4.58fF +C984 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z3 0.06fF +C985 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF +C986 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF +C987 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF +C988 divider_1/prescaler_0/m1_2700_2190# divider_1/clk 0.01fF +C989 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_1/Z4 0.02fF +C990 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z4 0.21fF +C991 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF +C992 divider_1/mc2 divider_1/nor_0/B 0.15fF +C993 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z3 0.45fF +C994 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Q 0.04fF +C995 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/A 0.26fF +C996 div_pd_buffered_0/pd_0/tspc_r_0/z5 div_pd_buffered_0/pd_0/UP 0.03fF +C997 pd_buffered_0/tapered_buf_1/a_n10_n140# pd_buffered_0/tapered_buf_1/a_160_n140# 0.05fF +C998 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.38fF +C999 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a3 0.13fF +C1000 divider_0/nor_0/Z1 divider_0/nor_1/B 0.18fF +C1001 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF +C1002 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/a_630_n680# 0.01fF +C1003 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C1004 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.05fF +C1005 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Q 0.51fF +C1006 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF +C1007 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF +C1008 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.04fF +C1009 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/clk 0.51fF +C1010 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Q 0.04fF +C1011 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF +C1012 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/nor_0/B 0.35fF +C1013 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/vco 0.60fF +C1014 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/R 0.29fF +C1015 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF +C1016 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF +C1017 divider_0/tspc_1/Q divider_0/tspc_2/Z4 0.15fF +C1018 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z4 0.02fF +C1019 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF +C1020 divider_1/nor_1/A divider_1/tspc_0/a_630_n680# 0.35fF +C1021 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Z4 0.65fF +C1022 ro_complete_buffered_0/tapered_buf_3/a_n10_230# ro_complete_buffered_0/tapered_buf_3/a_160_230# 0.09fF +C1023 ro_complete_buffered_0/tapered_buf_3/a_4670_0# ro_complete_buffered_0/tapered_buf_3/a_210_n610# 29.21fF +C1024 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF +C1025 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z4 0.22fF +C1026 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/R 0.21fF +C1027 div_pd_buffered_0/tapered_buf_1/a_n10_n140# div_pd_buffered_0/tapered_buf_1/in 0.04fF +C1028 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_1/A 0.04fF +C1029 div_pd_buffered_0/pd_0/and_pd_0/Z1 div_pd_buffered_0/pd_0/UP 0.06fF +C1030 ro_complete_buffered_0/tapered_buf_2/a_n10_230# ro_complete_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF +C1031 ro_complete_0/a3 ro_complete_0/cbank_0/switch_1/vin 0.13fF +C1032 div_pd_buffered_0/tapered_buf_2/a_1650_0# div_pd_buffered_0/tapered_buf_2/a_4670_0# 4.78fF +C1033 ro_complete_buffered_0/tapered_buf_5/a_n10_n140# ro_complete_buffered_0/tapered_buf_5/in 0.04fF +C1034 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a3 2.04fF +C1035 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.22fF +C1036 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/in 0.04fF +C1037 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF +C1038 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z2 1.07fF +C1039 pll_full_1/ro_complete_0/a1 pll_full_1/vco 0.11fF +C1040 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_2/Z2 0.20fF +C1041 divider_0/nor_1/B divider_0/nor_0/B 0.47fF +C1042 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF +C1043 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_580_0# 1.27fF +C1044 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF +C1045 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF +C1046 divider_0/tspc_2/Z3 divider_0/Out 0.05fF +C1047 pll_full_0/pd_0/R pll_full_0/div 0.51fF +C1048 pd_buffered_0/tapered_buf_2/a_1650_0# pd_buffered_0/tapered_buf_2/a_210_n610# 2.89fF +C1049 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z4 0.21fF +C1050 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C1051 pll_full_0/ro_complete_0/a0 pll_full_0/vco 0.11fF +C1052 divider_1/tspc_1/Q divider_1/tspc_2/a_630_n680# 0.01fF +C1053 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/divider_0/mc2 0.34fF +C1054 div_pd_buffered_0/tapered_buf_0/a_160_230# div_pd_buffered_0/tapered_buf_0/a_160_n140# 0.17fF +C1055 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/pd_0/UP 0.02fF +C1056 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF +C1057 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/a2 0.14fF +C1058 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.13fF +C1059 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/Out 0.11fF +C1060 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/a0 3.46fF +C1061 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF +C1062 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_0/Q 0.45fF +C1063 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF +C1064 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF +C1065 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_n10_n140# 0.05fF +C1066 divider_1/tspc_0/Q divider_1/tspc_1/Z4 0.15fF +C1067 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF +C1068 divider_1/and_0/OUT divider_1/and_0/Z1 0.04fF +C1069 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z2 0.01fF +C1070 divider_1/prescaler_0/tspc_2/Q divider_1/clk 0.05fF +C1071 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.20fF +C1072 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_3/vin 0.09fF +C1073 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF +C1074 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/div 0.19fF +C1075 divider_0/nor_1/A divider_0/prescaler_0/tspc_1/Q 0.03fF +C1076 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C1077 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/tspc_0/Z3 0.16fF +C1078 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/vco 0.12fF +C1079 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF +C1080 io_clamp_low[2] io_clamp_high[2] 0.53fF +C1081 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/Q 0.04fF +C1082 divider_1/nor_1/A divider_1/nor_1/B 1.21fF +C1083 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF +C1084 io_clamp_high[1] io_analog[5] 0.53fF +C1085 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/vco 0.26fF +C1086 divider_1/and_0/out1 divider_1/and_0/B 0.18fF +C1087 cp_buffered_0/tapered_buf_2/a_n10_230# cp_buffered_0/tapered_buf_2/a_160_230# 0.09fF +C1088 pd_buffered_0/tapered_buf_2/a_n10_n140# pd_buffered_0/tapered_buf_2/in 0.04fF +C1089 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 0.84fF +C1090 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_n10_n140# 0.05fF +C1091 div_pd_buffered_0/pd_0/and_pd_0/Out1 div_pd_buffered_0/pd_0/and_pd_0/Z1 0.18fF +C1092 pd_buffered_0/pd_0/tspc_r_1/Z2 pd_buffered_0/pd_0/tspc_r_1/Z4 0.14fF +C1093 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C1094 div_pd_buffered_0/tapered_buf_0/a_580_0# div_pd_buffered_0/tapered_buf_0/a_1650_0# 1.27fF +C1095 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.20fF +C1096 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.09fF +C1097 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF +C1098 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/a_160_230# 0.09fF +C1099 cp_buffered_0/tapered_buf_1/a_4670_0# cp_buffered_0/tapered_buf_1/a_210_n610# 29.21fF +C1100 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z4 0.00fF +C1101 div_pd_buffered_0/tapered_buf_2/a_580_0# div_pd_buffered_0/tapered_buf_2/a_210_n610# 0.84fF +C1102 divider_0/prescaler_0/Out divider_0/tspc_0/Z4 0.12fF +C1103 divider_0/nor_1/A divider_0/tspc_0/Q 0.55fF +C1104 ro_complete_0/a3 ro_complete_0/cbank_2/switch_1/vin 0.13fF +C1105 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z4 0.08fF +C1106 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF +C1107 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C1108 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Q 0.05fF +C1109 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z3 0.45fF +C1110 pll_full_0/ro_complete_0/a3 pll_full_0/vco 0.11fF +C1111 cp_buffered_0/tapered_buf_2/a_1650_0# cp_buffered_0/tapered_buf_2/a_580_0# 1.27fF +C1112 pd_buffered_0/tapered_buf_3/a_210_n610# pd_buffered_0/tapered_buf_3/out 26.29fF +C1113 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 0.84fF +C1114 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_n10_n140# 0.05fF +C1115 ro_complete_buffered_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_3/a_n10_n140# 0.04fF +C1116 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/switch_1/vin 0.19fF +C1117 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF +C1118 cp_buffered_0/tapered_buf_2/in cp_buffered_0/tapered_buf_2/a_160_n140# 0.19fF +C1119 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C1120 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/v 0.05fF +C1121 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/and_0/B 0.31fF +C1122 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.22fF +C1123 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.04fF +C1124 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF +C1125 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.45fF +C1126 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C1127 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/vco 0.14fF +C1128 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF +C1129 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF +C1130 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Q 0.38fF +C1131 divider_1/tspc_0/Z4 divider_1/tspc_0/a_630_n680# 0.12fF +C1132 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/D 0.09fF +C1133 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF +C1134 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF +C1135 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/switch_1/vin 0.19fF +C1136 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.12fF +C1137 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF +C1138 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z4 0.20fF +C1139 pd_buffered_0/pd_0/tspc_r_0/Z1 pd_buffered_0/pd_0/tspc_r_0/Z2 0.71fF +C1140 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_4670_0# 4.78fF +C1141 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/in 0.19fF +C1142 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/nor_1/B 0.01fF +C1143 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.91fF +C1144 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C1145 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_0/B 0.15fF +C1146 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_1/Z2 0.15fF +C1147 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/a_630_n680# 0.01fF +C1148 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z4 0.00fF +C1149 div_pd_buffered_0/tapered_buf_3/a_160_n140# div_pd_buffered_0/tapered_buf_3/a_210_n610# 0.22fF +C1150 divider_0/nor_1/B divider_0/tspc_1/Z2 0.30fF +C1151 ro_complete_buffered_0/tapered_buf_1/a_4670_0# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 4.78fF +C1152 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/a_630_n680# 0.01fF +C1153 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.17fF +C1154 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF +C1155 divider_0/prescaler_0/Out divider_0/clk 0.51fF +C1156 ro_complete_buffered_0/tapered_buf_4/a_n10_n140# ro_complete_buffered_0/tapered_buf_4/in 0.04fF +C1157 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF +C1158 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_1/Z2 0.21fF +C1159 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF +C1160 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z2 0.11fF +C1161 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1162 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z2 0.71fF +C1163 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z4 0.15fF +C1164 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/a_160_n140# 0.05fF +C1165 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/tapered_buf_0/a_160_230# 0.17fF +C1166 pd_buffered_0/tapered_buf_0/a_1650_0# pd_buffered_0/tapered_buf_0/a_4670_0# 4.78fF +C1167 pd_buffered_0/pd_0/tspc_r_0/Z4 pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF +C1168 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/DOWN 0.11fF +C1169 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z1 0.17fF +C1170 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a4 0.12fF +C1171 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF +C1172 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C1173 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF +C1174 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/out 0.61fF +C1175 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/nor_1/B 0.30fF +C1176 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/div 0.17fF +C1177 div_pd_buffered_0/tapered_buf_2/a_580_0# div_pd_buffered_0/tapered_buf_2/a_160_230# 0.02fF +C1178 divider_0/nor_1/B divider_0/tspc_1/Q 0.51fF +C1179 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF +C1180 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/Z1 0.04fF +C1181 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z2 0.01fF +C1182 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/vco 0.05fF +C1183 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.35fF +C1184 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.45fF +C1185 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_0/Qbar 0.02fF +C1186 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/a_630_n680# 0.12fF +C1187 ro_complete_buffered_0/tapered_buf_3/a_n10_230# ro_complete_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF +C1188 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF +C1189 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/div 0.05fF +C1190 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_160_230# 0.02fF +C1191 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_210_n610# 0.22fF +C1192 divider_0/mc2 divider_0/and_0/A 0.16fF +C1193 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z4 0.14fF +C1194 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF +C1195 cp_buffered_0/tapered_buf_0/a_160_230# cp_buffered_0/tapered_buf_0/a_160_n140# 0.17fF +C1196 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C1197 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/clk 0.11fF +C1198 divider_0/nor_1/B divider_0/tspc_2/Z2 0.20fF +C1199 ro_complete_buffered_0/tapered_buf_4/a_160_230# ro_complete_buffered_0/tapered_buf_4/a_160_n140# 0.17fF +C1200 ro_complete_0/a5 ro_complete_0/cbank_2/switch_0/vin 0.09fF +C1201 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/B 0.18fF +C1202 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF +C1203 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF +C1204 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/div 0.02fF +C1205 div_pd_buffered_0/tapered_buf_3/a_n10_230# div_pd_buffered_0/tapered_buf_3/in 0.02fF +C1206 divider_1/tspc_1/Q divider_1/nor_0/B 0.22fF +C1207 divider_1/tspc_1/Z2 divider_1/tspc_1/a_630_n680# 0.01fF +C1208 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_2/Q 0.19fF +C1209 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/clk 0.01fF +C1210 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF +C1211 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF +C1212 div_pd_buffered_0/pd_0/tspc_r_0/Z4 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF +C1213 pll_full_1/filter_0/a_4216_n5230# pll_full_1/vco 1.58fF +C1214 divider_1/tspc_0/Z2 divider_1/tspc_0/a_630_n680# 0.01fF +C1215 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/a4 0.12fF +C1216 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.19fF +C1217 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C1218 filter_0/a_4216_n5230# filter_0/v 0.91fF +C1219 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_1/in 0.10fF +C1220 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/a0 0.09fF +C1221 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_0/B 0.00fF +C1222 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.05fF +C1223 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF +C1224 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 0.22fF +C1225 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C1226 div_pd_buffered_0/tapered_buf_4/a_n10_n140# div_pd_buffered_0/pd_0/DOWN 0.04fF +C1227 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_210_n610# 0.22fF +C1228 divider_0/and_0/B divider_0/and_0/Z1 0.07fF +C1229 divider_1/tspc_2/a_630_n680# divider_1/Out 0.04fF +C1230 divider_1/nor_0/B divider_1/tspc_2/Z2 0.40fF +C1231 divider_1/prescaler_0/tspc_0/D divider_1/clk 0.29fF +C1232 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/UP 0.11fF +C1233 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z4 0.02fF +C1234 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C1235 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/vco 0.45fF +C1236 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/UP 0.11fF +C1237 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.14fF +C1238 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a4 0.09fF +C1239 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a5 0.09fF +C1240 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/tapered_buf_0/in 0.19fF +C1241 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/R 0.29fF +C1242 ro_complete_buffered_0/tapered_buf_7/a_210_n610# ro_complete_buffered_0/ro_complete_0/a5 26.29fF +C1243 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z1 0.03fF +C1244 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.01fF +C1245 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C1246 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF +C1247 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Qbar1 0.20fF +C1248 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF +C1249 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z3 0.33fF +C1250 divider_1/mc2 divider_1/and_0/B 0.20fF +C1251 io_clamp_low[0] io_analog[4] 0.53fF +C1252 div_pd_buffered_0/tapered_buf_2/a_210_n610# div_pd_buffered_0/divider_0/mc2 26.29fF +C1253 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF +C1254 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.09fF +C1255 ro_complete_buffered_0/tapered_buf_6/a_4670_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 29.21fF +C1256 ro_complete_0/a5 ro_complete_0/cbank_0/switch_0/vin 0.09fF +C1257 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/Out 0.05fF +C1258 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_4670_0# 29.21fF +C1259 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF +C1260 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Z4 0.65fF +C1261 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.15fF +C1262 pll_full_1/ro_complete_0/a5 pll_full_1/vco 0.15fF +C1263 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C1264 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF +C1265 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z1 0.08fF +C1266 divider_0/nor_1/A divider_0/and_0/A 0.01fF +C1267 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/a0 0.13fF +C1268 divider_0/tspc_2/a_630_n680# divider_0/nor_0/B 0.35fF +C1269 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF +C1270 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a4 0.12fF +C1271 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.02fF +C1272 ro_complete_0/cbank_2/v ro_complete_0/a2 0.05fF +C1273 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.09fF +C1274 ro_complete_buffered_0/tapered_buf_7/a_4670_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 29.21fF +C1275 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_3/vin 0.20fF +C1276 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C1277 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF +C1278 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z3 0.38fF +C1279 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/DOWN 0.12fF +C1280 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.01fF +C1281 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/clk 0.11fF +C1282 divider_0/nor_1/B divider_0/and_0/B 0.31fF +C1283 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Q 0.91fF +C1284 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.43fF +C1285 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/UP 0.03fF +C1286 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_160_230# 0.17fF +C1287 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_0/Q 0.01fF +C1288 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF +C1289 divider_1/and_0/OUT divider_1/and_0/out1 0.31fF +C1290 divider_1/tspc_1/Z4 divider_1/tspc_1/a_630_n680# 0.12fF +C1291 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/DOWN 0.03fF +C1292 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/tspc_r_0/z5 0.20fF +C1293 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF +C1294 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.09fF +C1295 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.01fF +C1296 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.09fF +C1297 divider_0/nor_1/A divider_0/tspc_1/Z4 0.02fF +C1298 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF +C1299 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/tapered_buf_1/in 1.27fF +C1300 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/nor_0/B 0.22fF +C1301 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.19fF +C1302 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/vco 0.01fF +C1303 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/DOWN 0.07fF +C1304 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Qbar1 0.30fF +C1305 div_pd_buffered_0/divider_0/tspc_2/Z3 div_pd_buffered_0/divider_0/tspc_2/Z4 0.65fF +C1306 pll_full_1/pd_0/R pll_full_1/pd_0/DOWN 0.36fF +C1307 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/z5 0.11fF +C1308 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF +C1309 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF +C1310 divider_1/tspc_1/Z1 divider_1/tspc_1/Z3 0.06fF +C1311 divider_1/tspc_0/Z3 divider_1/nor_1/A 0.38fF +C1312 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/vco 0.45fF +C1313 divider_1/nor_0/B divider_1/and_0/B 0.29fF +C1314 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/DOWN 0.02fF +C1315 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C1316 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF +C1317 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_4670_0# 29.21fF +C1318 pd_buffered_0/tapered_buf_0/a_580_0# pd_buffered_0/tapered_buf_0/a_210_n610# 0.84fF +C1319 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF +C1320 pd_buffered_0/tapered_buf_1/a_160_230# pd_buffered_0/tapered_buf_1/a_160_n140# 0.17fF +C1321 pd_buffered_0/pd_0/tspc_r_0/z5 pd_buffered_0/pd_0/tspc_r_1/z5 0.02fF +C1322 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z2 0.25fF +C1323 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C1324 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C1325 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF +C1326 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.05fF +C1327 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF +C1328 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z2 0.23fF +C1329 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C1330 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/vco 1.46fF +C1331 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/div 0.04fF +C1332 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z2 0.40fF +C1333 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/vco 0.29fF +C1334 ro_complete_buffered_0/tapered_buf_3/a_160_230# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.02fF +C1335 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/a_630_n680# 0.01fF +C1336 divider_0/tspc_0/Z2 divider_0/tspc_0/Z3 0.16fF +C1337 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF +C1338 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C1339 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C1340 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z2 0.25fF +C1341 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/ref 0.19fF +C1342 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF +C1343 pll_full_0/ro_complete_0/a4 pll_full_0/vco 0.01fF +C1344 divider_1/prescaler_0/tspc_2/Z2 divider_1/and_0/OUT 0.05fF +C1345 pd_buffered_0/tapered_buf_3/a_1650_0# pd_buffered_0/tapered_buf_3/a_210_n610# 2.89fF +C1346 ro_complete_0/cbank_0/v ro_complete_0/cbank_0/switch_0/vin 1.30fF +C1347 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/R 0.03fF +C1348 div_pd_buffered_0/tapered_buf_1/a_n10_n140# div_pd_buffered_0/tapered_buf_1/a_n10_230# 0.01fF +C1349 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_1/B 0.06fF +C1350 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF +C1351 cp_buffered_0/tapered_buf_0/a_210_n610# cp_buffered_0/tapered_buf_0/a_580_0# 0.84fF +C1352 cp_buffered_0/tapered_buf_0/a_n10_n140# cp_buffered_0/tapered_buf_0/a_160_n140# 0.05fF +C1353 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/UP 1.06fF +C1354 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF +C1355 pll_full_1/pd_0/tspc_r_1/z5 pll_full_1/div 0.04fF +C1356 pll_full_0/cp_0/down pll_full_0/cp_0/upbar 0.02fF +C1357 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Q 0.04fF +C1358 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.33fF +C1359 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/vco 1.27fF +C1360 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1361 div_pd_buffered_0/tapered_buf_4/a_210_n610# div_pd_buffered_0/tapered_buf_4/a_4670_0# 29.21fF +C1362 divider_1/mc2 divider_1/nor_1/A 0.04fF +C1363 pll_full_1/cp_0/upbar pll_full_1/cp_0/down 0.02fF +C1364 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/nor_1/A 0.15fF +C1365 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF +C1366 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF +C1367 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C1368 divider_1/tspc_1/Q divider_1/tspc_2/Z2 0.14fF +C1369 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_0/D 0.32fF +C1370 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/clk 0.01fF +C1371 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF +C1372 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/R 0.61fF +C1373 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.12fF +C1374 ro_complete_0/cbank_1/v ro_complete_0/cbank_1/switch_1/vin 1.30fF +C1375 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF +C1376 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/B 0.01fF +C1377 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C1378 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/nor_0/B 0.47fF +C1379 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z1 1.07fF +C1380 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF +C1381 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF +C1382 divider_1/tspc_0/Q divider_1/tspc_0/a_630_n680# 0.04fF +C1383 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z3 0.06fF +C1384 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/vco 0.12fF +C1385 divider_1/tspc_2/Z1 divider_1/tspc_2/Z3 0.06fF +C1386 divider_1/nor_0/B divider_1/Out 0.22fF +C1387 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C1388 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/B 0.20fF +C1389 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/clk 0.14fF +C1390 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF +C1391 divider_0/nor_1/B divider_0/tspc_0/a_630_n680# 0.01fF +C1392 divider_0/nor_1/Z1 divider_0/and_0/B 0.18fF +C1393 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF +C1394 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/out1 0.31fF +C1395 pll_full_1/divider_0/tspc_1/Z4 pll_full_1/divider_0/tspc_0/Q 0.15fF +C1396 io_clamp_low[1] io_clamp_high[1] 0.53fF +C1397 div_pd_buffered_0/tapered_buf_3/a_n10_230# div_pd_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF +C1398 divider_0/tspc_1/Q divider_0/tspc_2/a_630_n680# 0.01fF +C1399 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF +C1400 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF +C1401 div_pd_buffered_0/tapered_buf_3/a_n10_n140# div_pd_buffered_0/tapered_buf_3/in 0.04fF +C1402 divider_1/tspc_1/Z2 divider_1/tspc_1/Z4 0.36fF +C1403 divider_1/tspc_1/Z3 divider_1/tspc_1/Q 0.05fF +C1404 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z3 0.05fF +C1405 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z4 0.08fF +C1406 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF +C1407 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C1408 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF +C1409 pll_full_1/ref pll_full_1/pd_0/tspc_r_0/Z1 0.17fF +C1410 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/B 0.35fF +C1411 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/vco 0.60fF +C1412 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/a_n10_n140# 0.01fF +C1413 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.19fF +C1414 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF +C1415 filter_0/a_4216_n2998# filter_0/v 0.36fF +C1416 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/and_pd_0/Out1 0.12fF +C1417 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/UP 0.21fF +C1418 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_210_n610# 0.22fF +C1419 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/and_0/A 0.80fF +C1420 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.22fF +C1421 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_1/B 0.35fF +C1422 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/vco 0.11fF +C1423 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z3 0.11fF +C1424 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/and_0/B 0.29fF +C1425 div_pd_buffered_0/tapered_buf_3/a_210_n610# div_pd_buffered_0/tapered_buf_3/a_580_0# 0.84fF +C1426 divider_1/tspc_0/Z4 divider_1/tspc_0/Z3 0.65fF +C1427 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF +C1428 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF +C1429 divider_0/prescaler_0/tspc_2/Q divider_0/clk 0.05fF +C1430 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/clk 0.01fF +C1431 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF +C1432 pll_full_0/ro_complete_0/a1 pll_full_0/vco 0.11fF +C1433 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.11fF +C1434 div_pd_buffered_0/tapered_buf_3/a_210_n610# div_pd_buffered_0/divider_0/clk 26.29fF +C1435 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/a_n10_n140# 0.01fF +C1436 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/switch_3/vin 0.20fF +C1437 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/nor_1/B 0.06fF +C1438 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF +C1439 div_pd_buffered_0/tapered_buf_1/a_n10_230# div_pd_buffered_0/tapered_buf_1/a_160_230# 0.09fF +C1440 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.21fF +C1441 div_pd_buffered_0/tapered_buf_2/a_580_0# div_pd_buffered_0/tapered_buf_2/a_160_n140# 0.35fF +C1442 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.09fF +C1443 ro_complete_buffered_0/tapered_buf_5/a_4670_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 29.21fF +C1444 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/and_0/OUT 0.05fF +C1445 div_pd_buffered_0/tapered_buf_3/a_160_n140# div_pd_buffered_0/tapered_buf_3/in 0.19fF +C1446 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF +C1447 ro_complete_0/a0 ro_complete_0/cbank_1/switch_5/vin 0.09fF +C1448 divider_1/mc2 divider_1/and_0/OUT 0.05fF +C1449 divider_1/tspc_0/Q divider_1/nor_1/B 0.22fF +C1450 divider_0/and_0/out1 divider_0/and_0/B 0.18fF +C1451 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF +C1452 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/tapered_buf_0/a_160_230# 0.09fF +C1453 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/Out 0.21fF +C1454 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF +C1455 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_0/Q 0.45fF +C1456 divider_0/mc2 divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF +C1457 pd_buffered_0/tapered_buf_2/a_n10_230# pd_buffered_0/tapered_buf_2/in 0.02fF +C1458 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.19fF +C1459 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z1 0.09fF +C1460 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/DIV 0.51fF +C1461 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/v 0.05fF +C1462 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_160_230# 0.02fF +C1463 div_pd_buffered_0/tapered_buf_1/a_4670_0# div_pd_buffered_0/tapered_buf_1/a_1650_0# 4.78fF +C1464 ro_complete_buffered_0/tapered_buf_0/in ro_complete_buffered_0/tapered_buf_0/a_n10_n140# 0.04fF +C1465 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z2 0.14fF +C1466 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z3 0.05fF +C1467 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.32fF +C1468 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/vco 0.01fF +C1469 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF +C1470 divider_0/tspc_1/Z1 divider_0/tspc_0/Q 0.01fF +C1471 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Q 0.05fF +C1472 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF +C1473 pll_full_0/cp_0/a_1710_0# pll_full_0/pd_0/DOWN 0.04fF +C1474 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/Z2 0.14fF +C1475 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z3 0.16fF +C1476 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/vco 0.12fF +C1477 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF +C1478 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_160_n140# 0.35fF +C1479 pd_buffered_0/pd_0/REF pd_buffered_0/tapered_buf_0/a_210_n610# 26.29fF +C1480 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/and_pd_0/Out1 0.05fF +C1481 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/tspc_r_1/Qbar 0.01fF +C1482 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/R 0.27fF +C1483 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF +C1484 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a4 0.09fF +C1485 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a5 0.09fF +C1486 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/and_0/B 0.18fF +C1487 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.00fF +C1488 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Z3 0.03fF +C1489 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/tapered_buf_1/a_1650_0# 2.89fF +C1490 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.03fF +C1491 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF +C1492 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_0/a_630_n680# 0.04fF +C1493 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z3 0.06fF +C1494 pll_full_1/divider_0/nor_0/B pll_full_1/div 0.27fF +C1495 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_1650_0# 2.89fF +C1496 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/DOWN 0.03fF +C1497 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C1498 div_pd_buffered_0/tapered_buf_4/a_210_n610# div_pd_buffered_0/tapered_buf_4/out 26.29fF +C1499 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_160_230# 0.17fF +C1500 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Q 0.20fF +C1501 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/D 0.09fF +C1502 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF +C1503 ro_complete_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_2/in 0.19fF +C1504 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z3 0.65fF +C1505 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z3 0.33fF +C1506 ro_complete_buffered_0/tapered_buf_2/a_4670_0# ro_complete_buffered_0/tapered_buf_2/a_210_n610# 29.21fF +C1507 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/div 0.17fF +C1508 divider_1/tspc_0/Z2 divider_1/tspc_0/Z3 0.16fF +C1509 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z4 0.01fF +C1510 ro_complete_0/a1 ro_complete_0/cbank_2/switch_3/vin 0.14fF +C1511 cp_buffered_0/tapered_buf_0/a_160_230# cp_buffered_0/tapered_buf_0/a_n10_230# 0.09fF +C1512 cp_buffered_0/tapered_buf_0/a_210_n610# cp_buffered_0/tapered_buf_0/a_4670_0# 29.21fF +C1513 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.12fF +C1514 ro_complete_buffered_0/tapered_buf_0/a_580_0# ro_complete_buffered_0/tapered_buf_0/a_160_230# 0.02fF +C1515 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 0.22fF +C1516 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_1/Q 0.51fF +C1517 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z2 0.01fF +C1518 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.05fF +C1519 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.08fF +C1520 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/R 0.27fF +C1521 div_pd_buffered_0/tapered_buf_0/out div_pd_buffered_0/tapered_buf_0/a_210_n610# 26.29fF +C1522 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Q 0.55fF +C1523 divider_1/prescaler_0/Out divider_1/tspc_0/a_630_n680# 0.01fF +C1524 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF +C1525 ro_complete_buffered_0/tapered_buf_4/a_4670_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 29.21fF +C1526 pll_full_0/pd_0/and_pd_0/Z1 pll_full_0/pd_0/UP 0.06fF +C1527 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/DOWN 0.11fF +C1528 pll_full_1/pd_0/R pll_full_1/ref 0.61fF +C1529 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C1530 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C1531 div_pd_buffered_0/tapered_buf_2/in div_pd_buffered_0/tapered_buf_2/a_n10_n140# 0.04fF +C1532 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/nand_1/z1 0.22fF +C1533 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/tspc_0/D 0.04fF +C1534 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_1/Qbar 0.21fF +C1535 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C1536 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/vco 0.14fF +C1537 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/DOWN 0.02fF +C1538 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/R 0.30fF +C1539 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Q 0.15fF +C1540 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.11fF +C1541 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/v 0.05fF +C1542 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/nor_1/A 0.15fF +C1543 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/nor_0/B 0.06fF +C1544 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_2/Z2 0.20fF +C1545 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Z2 0.21fF +C1546 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF +C1547 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/in 0.19fF +C1548 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF +C1549 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z2 0.15fF +C1550 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF +C1551 divider_1/tspc_2/Z1 divider_1/tspc_2/Z4 0.00fF +C1552 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF +C1553 cp_buffered_0/tapered_buf_2/a_1650_0# cp_buffered_0/tapered_buf_2/a_4670_0# 4.78fF +C1554 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF +C1555 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/nor_1/B 1.21fF +C1556 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/nor_0/B 0.06fF +C1557 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF +C1558 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/A 0.01fF +C1559 div_pd_buffered_0/divider_0/tspc_0/Z3 div_pd_buffered_0/divider_0/tspc_0/Q 0.05fF +C1560 cp_buffered_0/cp_0/down cp_buffered_0/cp_0/upbar 0.02fF +C1561 divider_0/tspc_1/Q divider_0/nor_0/B 0.22fF +C1562 divider_0/tspc_0/Z1 divider_0/tspc_0/Z3 0.06fF +C1563 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/Q 0.19fF +C1564 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.01fF +C1565 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_1/B 0.30fF +C1566 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z2 1.07fF +C1567 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z4 0.12fF +C1568 divider_0/mc2 divider_0/nor_1/B 0.06fF +C1569 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF +C1570 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF +C1571 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/vco 0.05fF +C1572 pd_buffered_0/tapered_buf_1/a_580_0# pd_buffered_0/tapered_buf_1/a_1650_0# 1.27fF +C1573 pd_buffered_0/tapered_buf_1/a_n10_n140# pd_buffered_0/pd_0/UP 0.04fF +C1574 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.09fF +C1575 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a5 2.39fF +C1576 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C1577 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF +C1578 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/and_0/OUT 0.14fF +C1579 pll_full_1/divider_0/prescaler_0/Out pll_full_1/vco 0.51fF +C1580 div_pd_buffered_0/pd_0/UP div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.04fF +C1581 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_0/Q 0.01fF +C1582 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF +C1583 divider_0/tspc_2/a_630_n680# divider_0/Out 0.04fF +C1584 divider_0/nor_0/B divider_0/tspc_2/Z2 0.40fF +C1585 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.29fF +C1586 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_210_n610# 0.22fF +C1587 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a4 0.09fF +C1588 pll_full_1/pd_0/DOWN pll_full_1/pd_0/UP 4.58fF +C1589 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/UP 0.03fF +C1590 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF +C1591 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/OUT 0.05fF +C1592 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z2 1.07fF +C1593 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.20fF +C1594 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_210_n610# 0.22fF +C1595 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/and_0/B 0.08fF +C1596 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.20fF +C1597 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.09fF +C1598 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/vco 0.12fF +C1599 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/a_n10_n140# 0.01fF +C1600 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z3 0.16fF +C1601 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF +C1602 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF +C1603 ro_complete_0/a0 ro_complete_0/cbank_1/v 0.05fF +C1604 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z4 0.20fF +C1605 divider_1/tspc_0/Z1 divider_1/tspc_0/Z3 0.06fF +C1606 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z3 0.05fF +C1607 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/z5 0.11fF +C1608 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF +C1609 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_0/B 0.00fF +C1610 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF +C1611 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF +C1612 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.17fF +C1613 ro_complete_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_5/a_4670_0# 4.78fF +C1614 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/R 0.51fF +C1615 divider_1/nor_1/Z1 divider_1/and_0/A 0.80fF +C1616 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z2 1.07fF +C1617 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/B 0.31fF +C1618 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.22fF +C1619 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.04fF +C1620 divider_0/tspc_1/Z3 divider_0/tspc_0/Q 0.45fF +C1621 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/ro_complete_0/a1 26.29fF +C1622 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF +C1623 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF +C1624 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF +C1625 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/z5 0.20fF +C1626 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z1 0.03fF +C1627 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF +C1628 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C1629 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z3 0.09fF +C1630 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/tapered_buf_1/a_210_n610# 26.29fF +C1631 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_1650_0# 2.89fF +C1632 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/R 0.36fF +C1633 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF +C1634 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z4 0.20fF +C1635 pd_buffered_0/pd_0/tspc_r_1/Z1 pd_buffered_0/pd_0/tspc_r_1/Z2 0.71fF +C1636 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF +C1637 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C1638 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/a3 0.09fF +C1639 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/clk 0.14fF +C1640 divider_0/nor_1/A divider_0/nor_1/B 1.21fF +C1641 div_pd_buffered_0/tapered_buf_3/a_160_n140# div_pd_buffered_0/tapered_buf_3/a_n10_n140# 0.05fF +C1642 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF +C1643 divider_0/nor_0/Z1 divider_0/and_0/B 0.78fF +C1644 ro_complete_buffered_0/tapered_buf_1/in ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.36fF +C1645 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z4 0.00fF +C1646 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF +C1647 divider_0/tspc_1/Z4 divider_0/tspc_0/Q 0.15fF +C1648 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF +C1649 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Q 0.04fF +C1650 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/clk 0.01fF +C1651 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_n10_n140# 0.05fF +C1652 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF +C1653 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF +C1654 pll_full_0/ro_complete_0/a5 pll_full_0/vco 0.15fF +C1655 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z4 0.08fF +C1656 ro_complete_0/cbank_2/v ro_complete_0/cbank_2/switch_3/vin 1.30fF +C1657 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.38fF +C1658 ro_complete_0/a1 ro_complete_0/cbank_0/switch_3/vin 0.14fF +C1659 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/a4 0.09fF +C1660 ro_complete_0/cbank_0/v ro_complete_0/cbank_0/switch_1/vin 1.30fF +C1661 ro_complete_0/a3 ro_complete_0/cbank_0/switch_2/vin 0.09fF +C1662 pd_buffered_0/tapered_buf_2/a_n10_230# pd_buffered_0/tapered_buf_2/a_160_230# 0.09fF +C1663 pd_buffered_0/tapered_buf_2/a_4670_0# pd_buffered_0/tapered_buf_2/a_210_n610# 29.21fF +C1664 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_210_n610# 0.84fF +C1665 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/nor_1/A 0.03fF +C1666 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C1667 cp_buffered_0/tapered_buf_0/a_n10_n140# cp_buffered_0/tapered_buf_0/a_n10_230# 0.01fF +C1668 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C1669 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/z5 0.03fF +C1670 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF +C1671 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Q 0.01fF +C1672 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/and_0/A 0.01fF +C1673 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF +C1674 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C1675 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.12fF +C1676 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/vco 0.01fF +C1677 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF +C1678 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/a_n10_n140# 0.01fF +C1679 ro_complete_0/a3 ro_complete_0/cbank_1/v 0.05fF +C1680 divider_1/tspc_0/Q divider_1/tspc_0/Z3 0.05fF +C1681 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z3 0.06fF +C1682 divider_0/nor_0/B divider_0/and_0/B 0.29fF +C1683 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C1684 div_pd_buffered_0/tapered_buf_2/a_n10_230# div_pd_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF +C1685 divider_1/nor_1/A divider_1/and_0/B 0.08fF +C1686 divider_1/nor_1/B divider_1/tspc_1/a_630_n680# 0.35fF +C1687 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/nand_1/z1 0.01fF +C1688 divider_1/prescaler_0/tspc_2/Z2 divider_1/clk 0.11fF +C1689 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/tspc_r_0/Z1 0.71fF +C1690 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z3 0.38fF +C1691 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z2 0.19fF +C1692 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z1 0.09fF +C1693 ro_complete_0/cbank_1/v ro_complete_0/cbank_1/switch_3/vin 1.30fF +C1694 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/nor_1/A 0.01fF +C1695 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# 0.01fF +C1696 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1697 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.28fF +C1698 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z3 0.05fF +C1699 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z1 0.03fF +C1700 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF +C1701 pll_full_1/ro_complete_0/cbank_2/v pll_full_1/vco 1.36fF +C1702 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.05fF +C1703 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_160_n140# 0.35fF +C1704 divider_1/prescaler_0/tspc_0/Z3 divider_1/clk 0.64fF +C1705 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.01fF +C1706 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF +C1707 divider_1/tspc_2/Z3 divider_1/tspc_2/Z4 0.65fF +C1708 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_0/B 0.22fF +C1709 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF +C1710 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/vco 0.01fF +C1711 div_pd_buffered_0/pd_0/tspc_r_1/Z4 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF +C1712 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/R 0.03fF +C1713 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_1/Z4 0.02fF +C1714 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z3 0.06fF +C1715 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/a_630_n680# 0.35fF +C1716 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.91fF +C1717 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1718 ro_complete_buffered_0/tapered_buf_5/a_210_n610# ro_complete_buffered_0/ro_complete_0/a3 26.29fF +C1719 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF +C1720 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C1721 io_clamp_low[0] io_clamp_high[0] 0.53fF +C1722 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C1723 divider_0/tspc_1/Q divider_0/tspc_2/Z2 0.14fF +C1724 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z3 0.05fF +C1725 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/D 0.32fF +C1726 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF +C1727 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z3 0.16fF +C1728 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_1/z5 0.02fF +C1729 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z2 0.23fF +C1730 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C1731 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/vco 1.46fF +C1732 ro_complete_buffered_0/tapered_buf_2/a_n10_230# ro_complete_buffered_0/tapered_buf_2/in 0.02fF +C1733 ro_complete_buffered_0/tapered_buf_2/a_4670_0# ro_complete_buffered_0/tapered_buf_2/a_1650_0# 4.78fF +C1734 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/div 0.04fF +C1735 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z2 0.40fF +C1736 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/vco 0.29fF +C1737 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_580_0# 0.35fF +C1738 divider_0/mc2 divider_0/and_0/out1 0.06fF +C1739 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.13fF +C1740 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1741 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.18fF +C1742 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C1743 div_pd_buffered_0/pd_0/and_pd_0/Out1 div_pd_buffered_0/pd_0/UP 0.33fF +C1744 pd_buffered_0/pd_0/tspc_r_0/z5 pd_buffered_0/pd_0/UP 0.03fF +C1745 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF +C1746 ro_complete_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/in 0.02fF +C1747 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/in 0.02fF +C1748 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/a_630_n680# 0.01fF +C1749 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF +C1750 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_2/D 0.16fF +C1751 pll_full_1/ro_complete_0/cbank_1/switch_2/vin pll_full_1/vco 1.46fF +C1752 pll_full_0/pd_0/DOWN pll_full_0/pd_0/R 0.36fF +C1753 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_0/Q 0.45fF +C1754 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.03fF +C1755 cp_buffered_0/tapered_buf_1/a_210_n610# cp_buffered_0/cp_0/out 26.29fF +C1756 cp_buffered_0/tapered_buf_1/a_n10_n140# cp_buffered_0/tapered_buf_1/in 0.04fF +C1757 ro_complete_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_2/a_580_0# 0.35fF +C1758 div_pd_buffered_0/tapered_buf_2/a_1650_0# div_pd_buffered_0/tapered_buf_2/a_210_n610# 2.89fF +C1759 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF +C1760 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/a_630_n680# 0.01fF +C1761 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF +C1762 divider_0/nor_0/B divider_0/Out 0.22fF +C1763 pd_buffered_0/tapered_buf_2/a_1650_0# pd_buffered_0/tapered_buf_2/a_4670_0# 4.78fF +C1764 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_1650_0# 1.27fF +C1765 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/z5 0.04fF +C1766 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.04fF +C1767 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF +C1768 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/vco 1.27fF +C1769 div_pd_buffered_0/pd_0/tspc_r_0/Z2 div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.14fF +C1770 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1771 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/tapered_buf_0/a_580_0# 0.35fF +C1772 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_3/vin 0.20fF +C1773 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/nor_1/B 0.18fF +C1774 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/v 0.05fF +C1775 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/Z3 0.16fF +C1776 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z2 1.07fF +C1777 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF +C1778 pd_buffered_0/pd_0/and_pd_0/Z1 pd_buffered_0/pd_0/UP 0.06fF +C1779 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z2 0.36fF +C1780 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_0/Z3 0.05fF +C1781 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF +C1782 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF +C1783 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_580_0# 0.35fF +C1784 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/pd_0/tspc_r_1/Z3 0.09fF +C1785 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z2 0.01fF +C1786 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF +C1787 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF +C1788 divider_1/nor_0/Z1 divider_1/nor_1/B 0.18fF +C1789 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z4 0.12fF +C1790 divider_1/and_0/OUT divider_1/and_0/B 0.01fF +C1791 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/nor_0/B 0.47fF +C1792 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 0.84fF +C1793 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_n10_n140# 0.05fF +C1794 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF +C1795 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF +C1796 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/R 0.01fF +C1797 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/tspc_r_1/Qbar 0.21fF +C1798 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_580_0# 1.27fF +C1799 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z3 0.16fF +C1800 pll_full_1/ro_complete_0/cbank_2/switch_2/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF +C1801 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z4 0.00fF +C1802 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.15fF +C1803 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/and_0/B 0.78fF +C1804 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z1 0.08fF +C1805 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z2 0.36fF +C1806 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C1807 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.01fF +C1808 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/vco 0.11fF +C1809 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_580_0# 0.35fF +C1810 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_0/Z2 0.21fF +C1811 divider_1/tspc_1/Z2 divider_1/nor_1/B 0.30fF +C1812 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/a_630_n680# 0.19fF +C1813 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Q 0.04fF +C1814 io_clamp_high[2] io_analog[6] 0.53fF +C1815 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF +C1816 pll_full_0/divider_0/tspc_1/Z4 pll_full_0/divider_0/tspc_0/Q 0.15fF +C1817 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z4 0.00fF +C1818 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF +C1819 pd_buffered_0/tapered_buf_1/a_580_0# pd_buffered_0/tapered_buf_1/a_160_n140# 0.35fF +C1820 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/tspc_r_1/z5 0.20fF +C1821 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/and_0/B 0.78fF +C1822 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF +C1823 cp_buffered_0/tapered_buf_0/a_210_n610# cp_buffered_0/cp_0/down 26.29fF +C1824 cp_buffered_0/tapered_buf_0/a_n10_n140# cp_buffered_0/tapered_buf_0/in 0.04fF +C1825 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_160_230# 0.02fF +C1826 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_210_n610# 0.22fF +C1827 divider_1/prescaler_0/Out divider_1/tspc_0/Z3 0.45fF +C1828 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF +C1829 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/divider_0/tspc_2/Z4 0.65fF +C1830 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/tspc_r_0/Qbar 0.05fF +C1831 cp_buffered_0/cp_0/down cp_buffered_0/cp_0/out 0.79fF +C1832 cp_buffered_0/tapered_buf_0/in cp_buffered_0/tapered_buf_0/a_160_n140# 0.19fF +C1833 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF +C1834 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/div 0.12fF +C1835 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z2 1.07fF +C1836 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF +C1837 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/ref 0.04fF +C1838 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF +C1839 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/vco 0.11fF +C1840 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z1 0.17fF +C1841 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.29fF +C1842 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF +C1843 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C1844 ro_complete_buffered_0/tapered_buf_2/a_580_0# ro_complete_buffered_0/tapered_buf_2/a_210_n610# 0.84fF +C1845 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF +C1846 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.09fF +C1847 pd_buffered_0/tapered_buf_0/in pd_buffered_0/tapered_buf_0/a_n10_n140# 0.04fF +C1848 pd_buffered_0/tapered_buf_1/a_160_n140# pd_buffered_0/pd_0/UP 0.19fF +C1849 pd_buffered_0/tapered_buf_1/a_1650_0# pd_buffered_0/tapered_buf_1/a_4670_0# 4.78fF +C1850 pd_buffered_0/pd_0/and_pd_0/Out1 pd_buffered_0/pd_0/and_pd_0/Z1 0.18fF +C1851 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF +C1852 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.21fF +C1853 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.16fF +C1854 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z1 0.01fF +C1855 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_0/Q 0.22fF +C1856 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF +C1857 divider_0/tspc_1/a_630_n680# divider_0/tspc_0/Q 0.01fF +C1858 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF +C1859 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/tspc_r_0/Qbar 0.02fF +C1860 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_0/Qbar 0.03fF +C1861 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF +C1862 divider_1/tspc_0/Q divider_1/tspc_1/Z1 0.01fF +C1863 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_1/Q 0.13fF +C1864 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z4 0.00fF +C1865 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF +C1866 divider_1/prescaler_0/tspc_0/D divider_1/prescaler_0/nand_1/z1 0.21fF +C1867 divider_1/nor_1/B divider_1/and_0/A 0.26fF +C1868 div_pd_buffered_0/pd_0/tspc_r_0/Z2 div_pd_buffered_0/pd_0/R 0.21fF +C1869 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF +C1870 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/nor_1/B 0.30fF +C1871 ro_complete_buffered_0/tapered_buf_6/a_210_n610# ro_complete_buffered_0/ro_complete_0/a4 26.29fF +C1872 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C1873 pll_full_1/ro_complete_0/a1 pll_full_1/ro_complete_0/cbank_2/v 0.05fF +C1874 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF +C1875 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF +C1876 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z2 1.07fF +C1877 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z3 0.38fF +C1878 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z4 0.12fF +C1879 divider_1/prescaler_0/tspc_0/Z4 divider_1/clk 0.12fF +C1880 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Q 0.20fF +C1881 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF +C1882 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C1883 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z2 0.14fF +C1884 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z3 0.05fF +C1885 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF +C1886 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/vco 0.01fF +C1887 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/and_pd_0/Z1 0.07fF +C1888 pd_buffered_0/tapered_buf_1/a_160_230# pd_buffered_0/tapered_buf_1/a_580_0# 0.02fF +C1889 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_160_n140# 0.22fF +C1890 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.12fF +C1891 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Z4 0.12fF +C1892 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF +C1893 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/clk 0.64fF +C1894 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C1895 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.09fF +C1896 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF +C1897 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/B 0.01fF +C1898 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/Z1 0.36fF +C1899 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/a_630_n680# 0.19fF +C1900 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF +C1901 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/tspc_0/D 0.04fF +C1902 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Qbar1 0.38fF +C1903 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.18fF +C1904 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF +C1905 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF +C1906 divider_1/nor_1/B divider_1/tspc_1/Z4 0.21fF +C1907 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z4 0.36fF +C1908 pll_full_1/pd_0/R pll_full_1/div 0.51fF +C1909 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF +C1910 pll_full_0/divider_0/nor_0/B pll_full_0/div 0.27fF +C1911 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_1650_0# 1.27fF +C1912 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C1913 ro_complete_buffered_0/tapered_buf_6/a_n10_n140# ro_complete_buffered_0/tapered_buf_6/in 0.04fF +C1914 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/a0 0.13fF +C1915 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Q 0.04fF +C1916 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.01fF +C1917 ro_complete_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/a_160_230# 0.09fF +C1918 ro_complete_buffered_0/tapered_buf_0/a_4670_0# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 29.21fF +C1919 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF +C1920 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C1921 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/a3 0.09fF +C1922 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/nand_0/z1 0.07fF +C1923 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C1924 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1925 divider_1/tspc_0/Z4 divider_1/nor_1/A 0.21fF +C1926 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF +C1927 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF +C1928 pd_buffered_0/tapered_buf_2/a_580_0# pd_buffered_0/tapered_buf_2/a_210_n610# 0.84fF +C1929 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/in 0.19fF +C1930 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Q 0.51fF +C1931 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z2 0.01fF +C1932 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF +C1933 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF +C1934 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/z5 0.04fF +C1935 pd_buffered_0/tapered_buf_0/a_580_0# pd_buffered_0/tapered_buf_0/a_1650_0# 1.27fF +C1936 ro_complete_buffered_0/tapered_buf_7/a_n10_n140# ro_complete_buffered_0/tapered_buf_7/in 0.04fF +C1937 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z4 0.12fF +C1938 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF +C1939 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/clk 0.04fF +C1940 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF +C1941 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF Xpd_buffered_0/tapered_buf_2 vdda1 vssa1 pd_buffered_0/tapered_buf_2/in pd_buffered_0/pd_0/DIV + tapered_buf Xpd_buffered_0/tapered_buf_3 vdd vssa1 pd_buffered_0/pd_0/DOWN pd_buffered_0/tapered_buf_3/out @@ -2949,7 +2949,7 @@ C2820 pll_full_0/pd_0/tspc_r_0/Qbar1 vssa1 1.34fF C2821 pll_full_0/pd_0/tspc_r_0/Z3 vssa1 2.12fF C2822 pll_full_0/ref vssa1 4.34fF -C2823 div_pd_buffered_0/tapered_buf_0/out vssa1 385.91fF +C2823 div_pd_buffered_0/tapered_buf_0/out vssa1 385.99fF C2824 div_pd_buffered_0/tapered_buf_0/a_n10_n140# vssa1 0.06fF **FLOATING C2825 div_pd_buffered_0/tapered_buf_0/a_210_n610# vssa1 592.97fF **FLOATING C2826 div_pd_buffered_0/tapered_buf_0/a_160_230# vssa1 0.15fF **FLOATING @@ -2958,7 +2958,7 @@ C2829 div_pd_buffered_0/tapered_buf_0/a_1650_0# vssa1 63.61fF **FLOATING C2830 div_pd_buffered_0/tapered_buf_0/a_580_0# vssa1 16.76fF **FLOATING C2831 div_pd_buffered_0/tapered_buf_0/a_160_n140# vssa1 4.09fF **FLOATING -C2832 div_pd_buffered_0/tapered_buf_1/out vssa1 385.93fF +C2832 div_pd_buffered_0/tapered_buf_1/in vssa1 1.13fF C2833 div_pd_buffered_0/tapered_buf_1/a_n10_n140# vssa1 0.06fF **FLOATING C2834 div_pd_buffered_0/tapered_buf_1/a_210_n610# vssa1 592.97fF **FLOATING C2835 div_pd_buffered_0/tapered_buf_1/a_160_230# vssa1 0.15fF **FLOATING @@ -2991,7 +2991,7 @@ C2862 div_pd_buffered_0/divider_0/tspc_0/Z1 vssa1 0.99fF C2863 div_pd_buffered_0/divider_0/nor_1/A vssa1 7.04fF C2864 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# vssa1 1.15fF **FLOATING -C2865 div_pd_buffered_0/divider_0/clk vssa1 399.47fF +C2865 div_pd_buffered_0/divider_0/clk vssa1 399.62fF C2866 div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF C2867 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D vssa1 2.64fF C2868 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q vssa1 3.64fF @@ -3020,8 +3020,8 @@ C2891 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING C2892 div_pd_buffered_0/divider_0/nor_1/Z1 vssa1 1.34fF C2893 div_pd_buffered_0/divider_0/nor_0/Z1 vssa1 1.34fF -C2894 div_pd_buffered_0/divider_0/mc2 vssa1 393.11fF -C2895 div_pd_buffered_0/pd_0/UP vssa1 5.85fF +C2894 div_pd_buffered_0/divider_0/mc2 vssa1 393.39fF +C2895 div_pd_buffered_0/pd_0/UP vssa1 6.08fF C2896 div_pd_buffered_0/pd_0/and_pd_0/Z1 vssa1 0.39fF C2897 div_pd_buffered_0/pd_0/and_pd_0/Out1 vssa1 2.22fF C2898 div_pd_buffered_0/pd_0/tspc_r_1/z5 vssa1 1.10fF @@ -3030,10 +3030,10 @@ C2901 div_pd_buffered_0/pd_0/tspc_r_1/Qbar vssa1 0.79fF C2902 div_pd_buffered_0/pd_0/tspc_r_1/Z2 vssa1 1.22fF C2903 div_pd_buffered_0/pd_0/tspc_r_1/Z1 vssa1 0.67fF -C2904 div_pd_buffered_0/pd_0/DOWN vssa1 9.94fF +C2904 div_pd_buffered_0/pd_0/DOWN vssa1 8.79fF C2905 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 vssa1 1.34fF C2906 div_pd_buffered_0/pd_0/tspc_r_1/Z3 vssa1 2.12fF -C2907 div_pd_buffered_0/pd_0/DIV vssa1 5.85fF +C2907 div_pd_buffered_0/pd_0/DIV vssa1 6.57fF C2908 div_pd_buffered_0/pd_0/tspc_r_0/z5 vssa1 1.10fF C2909 div_pd_buffered_0/pd_0/tspc_r_0/Z4 vssa1 1.07fF C2910 div_pd_buffered_0/pd_0/tspc_r_0/Qbar vssa1 0.88fF @@ -3041,8 +3041,8 @@ C2912 div_pd_buffered_0/pd_0/tspc_r_0/Z1 vssa1 0.67fF C2913 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 vssa1 1.34fF C2914 div_pd_buffered_0/pd_0/tspc_r_0/Z3 vssa1 2.12fF -C2915 div_pd_buffered_0/pd_0/REF vssa1 391.02fF -C2916 div_pd_buffered_0/tapered_buf_4/in vssa1 1.13fF +C2915 div_pd_buffered_0/pd_0/REF vssa1 392.16fF +C2916 div_pd_buffered_0/tapered_buf_4/out vssa1 385.93fF C2917 div_pd_buffered_0/tapered_buf_4/a_n10_n140# vssa1 0.06fF **FLOATING C2918 div_pd_buffered_0/tapered_buf_4/a_210_n610# vssa1 592.97fF **FLOATING C2919 div_pd_buffered_0/tapered_buf_4/a_160_230# vssa1 0.15fF **FLOATING