blob: 916e31e5a674adeee32c198ea7667c5b2bf1fa1e [file] [log] [blame]
* SPICE3 file created from user_analog_project_wrapper.ext - technology: sky130A
.subckt user_analog_project_wrapper gpio_analog[0] gpio_analog[10] gpio_analog[11]
+ gpio_analog[12] gpio_analog[13] gpio_analog[14] gpio_analog[15] gpio_analog[16]
+ gpio_analog[17] gpio_analog[1] gpio_analog[2] gpio_analog[3] gpio_analog[4] gpio_analog[5]
+ gpio_analog[6] gpio_analog[7] gpio_analog[8] gpio_analog[9] gpio_noesd[0] gpio_noesd[10]
+ gpio_noesd[11] gpio_noesd[12] gpio_noesd[13] gpio_noesd[14] gpio_noesd[15] gpio_noesd[16]
+ gpio_noesd[17] gpio_noesd[1] gpio_noesd[2] gpio_noesd[3] gpio_noesd[4] gpio_noesd[5]
+ gpio_noesd[6] gpio_noesd[7] gpio_noesd[8] gpio_noesd[9] io_analog[0] io_analog[10]
+ io_analog[1] io_analog[2] io_analog[3] io_analog[4] io_analog[5] io_analog[6] io_analog[7]
+ io_analog[8] io_analog[9] io_clamp_high[0] io_clamp_high[1] io_clamp_high[2] io_clamp_low[0]
+ io_clamp_low[1] io_clamp_low[2] io_in[0] io_in[10] io_in[11] io_in[12] io_in[13]
+ io_in[14] io_in[15] io_in[16] io_in[17] io_in[18] io_in[19] io_in[1] io_in[20] io_in[21]
+ io_in[22] io_in[23] io_in[24] io_in[25] io_in[26] io_in[2] io_in[3] io_in[4] io_in[5]
+ io_in[6] io_in[7] io_in[8] io_in[9] io_in_3v3[0] io_in_3v3[10] io_in_3v3[11] io_in_3v3[12]
+ io_in_3v3[13] io_in_3v3[14] io_in_3v3[15] io_in_3v3[16] io_in_3v3[17] io_in_3v3[18]
+ io_in_3v3[19] io_in_3v3[1] io_in_3v3[20] io_in_3v3[21] io_in_3v3[22] io_in_3v3[23]
+ io_in_3v3[24] io_in_3v3[25] io_in_3v3[26] io_in_3v3[2] io_in_3v3[3] io_in_3v3[4]
+ io_in_3v3[5] io_in_3v3[6] io_in_3v3[7] io_in_3v3[8] io_in_3v3[9] io_oeb[0] io_oeb[10]
+ io_oeb[11] io_oeb[12] io_oeb[13] io_oeb[14] io_oeb[15] io_oeb[16] io_oeb[17] io_oeb[18]
+ io_oeb[19] io_oeb[1] io_oeb[20] io_oeb[21] io_oeb[22] io_oeb[23] io_oeb[24] io_oeb[25]
+ io_oeb[26] io_oeb[2] io_oeb[3] io_oeb[4] io_oeb[5] io_oeb[6] io_oeb[7] io_oeb[8]
+ io_oeb[9] io_out[0] io_out[10] io_out[11] io_out[12] io_out[13] io_out[14] io_out[15]
+ io_out[16] io_out[17] io_out[18] io_out[19] io_out[1] io_out[20] io_out[21] io_out[22]
+ io_out[23] io_out[24] io_out[25] io_out[26] io_out[2] io_out[3] io_out[4] io_out[5]
+ io_out[6] io_out[7] io_out[8] io_out[9] la_data_in[0] la_data_in[100] la_data_in[101]
+ la_data_in[102] la_data_in[103] la_data_in[104] la_data_in[105] la_data_in[106]
+ la_data_in[107] la_data_in[108] la_data_in[109] la_data_in[10] la_data_in[110] la_data_in[111]
+ la_data_in[112] la_data_in[113] la_data_in[114] la_data_in[115] la_data_in[116]
+ la_data_in[117] la_data_in[118] la_data_in[119] la_data_in[11] la_data_in[120] la_data_in[121]
+ la_data_in[122] la_data_in[123] la_data_in[124] la_data_in[125] la_data_in[126]
+ la_data_in[127] la_data_in[12] la_data_in[13] la_data_in[14] la_data_in[15] la_data_in[16]
+ la_data_in[17] la_data_in[18] la_data_in[19] la_data_in[1] la_data_in[20] la_data_in[21]
+ la_data_in[22] la_data_in[23] la_data_in[24] la_data_in[25] la_data_in[26] la_data_in[27]
+ la_data_in[28] la_data_in[29] la_data_in[2] la_data_in[30] la_data_in[31] la_data_in[32]
+ la_data_in[33] la_data_in[34] la_data_in[35] la_data_in[36] la_data_in[37] la_data_in[38]
+ la_data_in[39] la_data_in[3] la_data_in[40] la_data_in[41] la_data_in[42] la_data_in[43]
+ la_data_in[44] la_data_in[45] la_data_in[46] la_data_in[47] la_data_in[48] la_data_in[49]
+ la_data_in[4] la_data_in[50] la_data_in[51] la_data_in[52] la_data_in[53] la_data_in[54]
+ la_data_in[55] la_data_in[56] la_data_in[57] la_data_in[58] la_data_in[59] la_data_in[5]
+ la_data_in[60] la_data_in[61] la_data_in[62] la_data_in[63] la_data_in[64] la_data_in[65]
+ la_data_in[66] la_data_in[67] la_data_in[68] la_data_in[69] la_data_in[6] la_data_in[70]
+ la_data_in[71] la_data_in[72] la_data_in[73] la_data_in[74] la_data_in[75] la_data_in[76]
+ la_data_in[77] la_data_in[78] la_data_in[79] la_data_in[7] la_data_in[80] la_data_in[81]
+ la_data_in[82] la_data_in[83] la_data_in[84] la_data_in[85] la_data_in[86] la_data_in[87]
+ la_data_in[88] la_data_in[89] la_data_in[8] la_data_in[90] la_data_in[91] la_data_in[92]
+ la_data_in[93] la_data_in[94] la_data_in[95] la_data_in[96] la_data_in[97] la_data_in[98]
+ la_data_in[99] la_data_in[9] la_data_out[0] la_data_out[100] la_data_out[101] la_data_out[102]
+ la_data_out[103] la_data_out[104] la_data_out[105] la_data_out[106] la_data_out[107]
+ la_data_out[108] la_data_out[109] la_data_out[10] la_data_out[110] la_data_out[111]
+ la_data_out[112] la_data_out[113] la_data_out[114] la_data_out[115] la_data_out[116]
+ la_data_out[117] la_data_out[118] la_data_out[119] la_data_out[11] la_data_out[120]
+ la_data_out[121] la_data_out[122] la_data_out[123] la_data_out[124] la_data_out[125]
+ la_data_out[126] la_data_out[127] la_data_out[12] la_data_out[13] la_data_out[14]
+ la_data_out[15] la_data_out[16] la_data_out[17] la_data_out[18] la_data_out[19]
+ la_data_out[1] la_data_out[20] la_data_out[21] la_data_out[22] la_data_out[23] la_data_out[24]
+ la_data_out[25] la_data_out[26] la_data_out[27] la_data_out[28] la_data_out[29]
+ la_data_out[2] la_data_out[30] la_data_out[31] la_data_out[32] la_data_out[33] la_data_out[34]
+ la_data_out[35] la_data_out[36] la_data_out[37] la_data_out[38] la_data_out[39]
+ la_data_out[3] la_data_out[40] la_data_out[41] la_data_out[42] la_data_out[43] la_data_out[44]
+ la_data_out[45] la_data_out[46] la_data_out[47] la_data_out[48] la_data_out[49]
+ la_data_out[4] la_data_out[50] la_data_out[51] la_data_out[52] la_data_out[53] la_data_out[54]
+ la_data_out[55] la_data_out[56] la_data_out[57] la_data_out[58] la_data_out[59]
+ la_data_out[5] la_data_out[60] la_data_out[61] la_data_out[62] la_data_out[63] la_data_out[64]
+ la_data_out[65] la_data_out[66] la_data_out[67] la_data_out[68] la_data_out[69]
+ la_data_out[6] la_data_out[70] la_data_out[71] la_data_out[72] la_data_out[73] la_data_out[74]
+ la_data_out[75] la_data_out[76] la_data_out[77] la_data_out[78] la_data_out[79]
+ la_data_out[7] la_data_out[80] la_data_out[81] la_data_out[82] la_data_out[83] la_data_out[84]
+ la_data_out[85] la_data_out[86] la_data_out[87] la_data_out[88] la_data_out[89]
+ la_data_out[8] la_data_out[90] la_data_out[91] la_data_out[92] la_data_out[93] la_data_out[94]
+ la_data_out[95] la_data_out[96] la_data_out[97] la_data_out[98] la_data_out[99]
+ la_data_out[9] la_oenb[0] la_oenb[100] la_oenb[101] la_oenb[102] la_oenb[103] la_oenb[104]
+ la_oenb[105] la_oenb[106] la_oenb[107] la_oenb[108] la_oenb[109] la_oenb[10] la_oenb[110]
+ la_oenb[111] la_oenb[112] la_oenb[113] la_oenb[114] la_oenb[115] la_oenb[116] la_oenb[117]
+ la_oenb[118] la_oenb[119] la_oenb[11] la_oenb[120] la_oenb[121] la_oenb[122] la_oenb[123]
+ la_oenb[124] la_oenb[125] la_oenb[126] la_oenb[127] la_oenb[12] la_oenb[13] la_oenb[14]
+ la_oenb[15] la_oenb[16] la_oenb[17] la_oenb[18] la_oenb[19] la_oenb[1] la_oenb[20]
+ la_oenb[21] la_oenb[22] la_oenb[23] la_oenb[24] la_oenb[25] la_oenb[26] la_oenb[27]
+ la_oenb[28] la_oenb[29] la_oenb[2] la_oenb[30] la_oenb[31] la_oenb[32] la_oenb[33]
+ la_oenb[34] la_oenb[35] la_oenb[36] la_oenb[37] la_oenb[38] la_oenb[39] la_oenb[3]
+ la_oenb[40] la_oenb[41] la_oenb[42] la_oenb[43] la_oenb[44] la_oenb[45] la_oenb[46]
+ la_oenb[47] la_oenb[48] la_oenb[49] la_oenb[4] la_oenb[50] la_oenb[51] la_oenb[52]
+ la_oenb[53] la_oenb[54] la_oenb[55] la_oenb[56] la_oenb[57] la_oenb[58] la_oenb[59]
+ la_oenb[5] la_oenb[60] la_oenb[61] la_oenb[62] la_oenb[63] la_oenb[64] la_oenb[65]
+ la_oenb[66] la_oenb[67] la_oenb[68] la_oenb[69] la_oenb[6] la_oenb[70] la_oenb[71]
+ la_oenb[72] la_oenb[73] la_oenb[74] la_oenb[75] la_oenb[76] la_oenb[77] la_oenb[78]
+ la_oenb[79] la_oenb[7] la_oenb[80] la_oenb[81] la_oenb[82] la_oenb[83] la_oenb[84]
+ la_oenb[85] la_oenb[86] la_oenb[87] la_oenb[88] la_oenb[89] la_oenb[8] la_oenb[90]
+ la_oenb[91] la_oenb[92] la_oenb[93] la_oenb[94] la_oenb[95] la_oenb[96] la_oenb[97]
+ la_oenb[98] la_oenb[99] la_oenb[9] user_clock2 user_irq[0] user_irq[1] user_irq[2]
+ vccd1 vccd2 vdda1 vdda2 vssa1 vssa2 vssd1 vssd2 wb_clk_i wb_rst_i wbs_ack_o wbs_adr_i[0]
+ wbs_adr_i[10] wbs_adr_i[11] wbs_adr_i[12] wbs_adr_i[13] wbs_adr_i[14] wbs_adr_i[15]
+ wbs_adr_i[16] wbs_adr_i[17] wbs_adr_i[18] wbs_adr_i[19] wbs_adr_i[1] wbs_adr_i[20]
+ wbs_adr_i[21] wbs_adr_i[22] wbs_adr_i[23] wbs_adr_i[24] wbs_adr_i[25] wbs_adr_i[26]
+ wbs_adr_i[27] wbs_adr_i[28] wbs_adr_i[29] wbs_adr_i[2] wbs_adr_i[30] wbs_adr_i[31]
+ wbs_adr_i[3] wbs_adr_i[4] wbs_adr_i[5] wbs_adr_i[6] wbs_adr_i[7] wbs_adr_i[8] wbs_adr_i[9]
+ wbs_cyc_i wbs_dat_i[0] wbs_dat_i[10] wbs_dat_i[11] wbs_dat_i[12] wbs_dat_i[13] wbs_dat_i[14]
+ wbs_dat_i[15] wbs_dat_i[16] wbs_dat_i[17] wbs_dat_i[18] wbs_dat_i[19] wbs_dat_i[1]
+ wbs_dat_i[20] wbs_dat_i[21] wbs_dat_i[22] wbs_dat_i[23] wbs_dat_i[24] wbs_dat_i[25]
+ wbs_dat_i[26] wbs_dat_i[27] wbs_dat_i[28] wbs_dat_i[29] wbs_dat_i[2] wbs_dat_i[30]
+ wbs_dat_i[31] wbs_dat_i[3] wbs_dat_i[4] wbs_dat_i[5] wbs_dat_i[6] wbs_dat_i[7] wbs_dat_i[8]
+ wbs_dat_i[9] wbs_dat_o[0] wbs_dat_o[10] wbs_dat_o[11] wbs_dat_o[12] wbs_dat_o[13]
+ wbs_dat_o[14] wbs_dat_o[15] wbs_dat_o[16] wbs_dat_o[17] wbs_dat_o[18] wbs_dat_o[19]
+ wbs_dat_o[1] wbs_dat_o[20] wbs_dat_o[21] wbs_dat_o[22] wbs_dat_o[23] wbs_dat_o[24]
+ wbs_dat_o[25] wbs_dat_o[26] wbs_dat_o[27] wbs_dat_o[28] wbs_dat_o[29] wbs_dat_o[2]
+ wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6]
+ wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3]
+ wbs_stb_i wbs_we_i
C0 divbuf_0/OUT2 divbuf_0/a_492_n240# 0.42fF
C1 divider_1/nor_1/B divider_1/and_0/B 0.31fF
C2 divider_1/tspc_1/Q divider_1/nor_0/B 0.22fF
C3 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_2/D 0.32fF
C4 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/clk 0.01fF
C5 divider_2/tspc_1/Z2 divider_2/tspc_1/Z4 0.36fF
C6 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z2 1.07fF
C7 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z4 0.12fF
C8 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/clk 0.01fF
C9 ro_complete_1/a4 ro_complete_1/cbank_1/switch_1/vin 0.09fF
C10 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/v 1.30fF
C11 divider_2/and_0/out1 divider_2/and_0/Z1 0.36fF
C12 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z3 0.06fF
C13 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF
C14 divider_0/tspc_1/a_630_n680# divider_0/nor_0/B 0.00fF
C15 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF
C16 pd_1/R pd_1/tspc_r_1/Qbar1 0.30fF
C17 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z3 0.09fF
C18 pd_1/DOWN pd_1/tspc_r_0/z5 0.03fF
C19 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z4 0.36fF
C20 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Q 0.05fF
C21 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF
C22 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/Out 0.04fF
C23 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/A 0.26fF
C24 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF
C25 pll_full_0/pd_0/tspc_r_1/z5 pll_full_0/pd_0/tspc_r_1/Z4 0.04fF
C26 divider_1/nor_0/B divider_1/tspc_2/Z2 0.40fF
C27 divider_1/tspc_2/a_630_n680# divider_1/Out 0.04fF
C28 divider_2/nor_1/B divider_2/tspc_2/Z4 0.02fF
C29 divider_2/prescaler_0/tspc_1/Z2 divider_2/clk 0.11fF
C30 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/Out 0.11fF
C31 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_4/vin 0.20fF
C32 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF
C33 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF
C34 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT 43.38fF
C35 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF
C36 divider_0/tspc_1/Q divider_0/tspc_2/a_630_n680# 0.01fF
C37 divider_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.01fF
C38 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/Q 0.19fF
C39 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.14fF
C40 cp_0/a_1710_n2840# cp_0/out 0.61fF
C41 cp_0/a_10_n50# cp_0/vbias 0.19fF
C42 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Qbar1 0.38fF
C43 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z2 0.01fF
C44 pll_full_0/ro_complete_0/a1 pll_full_0/divider_0/clk 0.11fF
C45 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z1 0.03fF
C46 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF
C47 divider_1/tspc_1/Z2 divider_1/tspc_1/Z3 0.16fF
C48 divider_1/nor_1/B divider_1/tspc_1/Z4 0.21fF
C49 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z4 0.08fF
C50 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z3 0.05fF
C51 ro_complete_1/a5 ro_complete_1/cbank_2/v 0.08fF
C52 ro_complete_1/a0 ro_complete_1/cbank_1/switch_5/vin 0.09fF
C53 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z4 0.08fF
C54 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF
C55 divider_2/nor_1/A divider_2/tspc_0/Z1 0.03fF
C56 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/Out 0.11fF
C57 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF
C58 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.29fF
C59 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF
C60 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Q 0.51fF
C61 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF
C62 divbuf_0/OUT divbuf_0/OUT2 0.06fF
C63 ro_complete_0/a4 ro_complete_0/cbank_1/switch_1/vin 0.09fF
C64 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF
C65 divider_1/prescaler_0/tspc_2/Z4 divider_1/prescaler_0/tspc_2/D 0.11fF
C66 divider_2/nor_1/B divider_2/tspc_1/a_630_n680# 0.35fF
C67 divider_2/prescaler_0/Out divider_2/clk 0.51fF
C68 divbuf_4/a_492_n240# divbuf_4/OUT5 0.01fF
C69 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/v 1.30fF
C70 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF
C71 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
C72 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF
C73 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Q 0.04fF
C74 divider_0/tspc_1/Z2 divider_0/nor_1/A 0.15fF
C75 divider_0/nor_1/B divider_0/tspc_1/Z3 0.38fF
C76 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF
C77 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF
C78 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF
C79 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/z5 0.11fF
C80 divider_1/mc2 divider_1/and_0/A 0.16fF
C81 divider_0/and_0/out1 divider_0/and_0/A 0.01fF
C82 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z2 0.20fF
C83 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/Out 0.12fF
C84 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF
C85 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z4 0.02fF
C86 divider_2/tspc_0/Z1 divider_2/tspc_0/Z3 0.06fF
C87 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z4 0.08fF
C88 divbuf_3/OUT3 divbuf_3/OUT5 0.01fF
C89 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
C90 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/D 0.15fF
C91 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF
C92 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF
C93 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z4 0.00fF
C94 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/clk 0.05fF
C95 ro_complete_0/a3 ro_complete_0/cbank_2/v 0.05fF
C96 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z2 1.07fF
C97 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Q 0.38fF
C98 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z4 0.12fF
C99 divbuf_3/OUT3 divbuf_3/OUT 0.26fF
C100 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT2 0.06fF
C101 divider_2/prescaler_0/tspc_0/Q divider_2/prescaler_0/nand_1/z1 0.01fF
C102 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/Out 0.05fF
C103 divider_2/prescaler_0/tspc_2/Z2 divider_2/clk 0.11fF
C104 divbuf_6/OUT3 divbuf_6/OUT 0.26fF
C105 divbuf_6/OUT4 divbuf_6/OUT5 20.26fF
C106 divider_0/mc2 divider_0/and_0/OUT 0.05fF
C107 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z2 0.25fF
C108 divider_0/nor_1/A divider_0/and_0/B 0.08fF
C109 pd_1/DOWN pd_1/UP 0.46fF
C110 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF
C111 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF
C112 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF
C113 divider_1/tspc_1/Z3 divider_1/tspc_1/Z4 0.65fF
C114 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.29fF
C115 ro_complete_1/a2 ro_complete_1/cbank_1/switch_3/vin 0.09fF
C116 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z4 0.36fF
C117 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Q 0.04fF
C118 ro_complete_1/cbank_0/v ro_complete_1/cbank_2/v 0.04fF
C119 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT3 0.26fF
C120 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/R 0.33fF
C121 divider_2/tspc_2/Z1 divider_2/tspc_2/Z4 0.00fF
C122 pll_full_0/pd_0/DIV pll_full_0/divider_0/and_0/OUT 0.01fF
C123 divider_1/tspc_0/Z1 divider_1/tspc_0/Z4 0.00fF
C124 divider_0/nor_1/B divider_0/tspc_1/Z2 0.30fF
C125 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Q 0.04fF
C126 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF
C127 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Q 0.20fF
C128 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF
C129 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z1 0.71fF
C130 pd_0/REF pd_0/tspc_r_1/Z3 0.65fF
C131 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z3 0.05fF
C132 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Q 0.05fF
C133 divider_1/tspc_1/Q divider_1/tspc_2/Z2 0.14fF
C134 divider_1/prescaler_0/tspc_0/Q divider_1/prescaler_0/tspc_2/D 0.04fF
C135 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/nand_1/z1 0.22fF
C136 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
C137 divbuf_3/a_492_n240# divbuf_3/IN 0.13fF
C138 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z3 0.05fF
C139 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF
C140 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z3 0.16fF
C141 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/Out 0.08fF
C142 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF
C143 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
C144 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z3 0.05fF
C145 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF
C146 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF
C147 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/IN 0.00fF
C148 divider_1/prescaler_0/m1_2700_2190# divider_1/nor_1/A 0.01fF
C149 divider_1/tspc_1/a_630_n680# divider_1/nor_1/B 0.35fF
C150 divider_0/nor_1/A divider_0/tspc_1/Z4 0.02fF
C151 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF
C152 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.06fF
C153 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_0/Z4 0.04fF
C154 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z3 0.16fF
C155 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/clk 0.01fF
C156 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z1 0.01fF
C157 divider_2/tspc_0/Z1 divider_2/tspc_0/Z4 0.00fF
C158 divider_1/tspc_2/Z1 divider_1/tspc_2/Z3 0.06fF
C159 divider_1/nor_0/B divider_1/Out 0.22fF
C160 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF
C161 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF
C162 divider_2/prescaler_0/tspc_1/Z4 divider_2/prescaler_0/Out 0.28fF
C163 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
C164 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF
C165 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF
C166 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF
C167 divider_0/nor_1/B divider_0/and_0/B 0.31fF
C168 divider_0/tspc_1/Q divider_0/nor_0/B 0.22fF
C169 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/D 0.32fF
C170 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF
C171 pd_1/DOWN pd_1/and_pd_0/Out1 0.12fF
C172 pd_1/REF pd_1/tspc_r_1/Z1 0.17fF
C173 divider_1/tspc_1/Z2 divider_1/tspc_1/Z4 0.36fF
C174 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z2 1.07fF
C175 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z4 0.12fF
C176 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/clk 0.01fF
C177 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF
C178 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z3 0.38fF
C179 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF
C180 divider_1/and_0/out1 divider_1/and_0/Z1 0.36fF
C181 ro_complete_1/a0 ro_complete_1/cbank_1/v 0.05fF
C182 divider_2/and_0/OUT divider_2/and_0/B 0.01fF
C183 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/Out 0.91fF
C184 divbuf_7/a_492_n240# divbuf_7/OUT 0.00fF
C185 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
C186 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF
C187 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z4 0.12fF
C188 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF
C189 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/Out 0.11fF
C190 divider_0/nor_0/B divider_0/tspc_2/Z2 0.40fF
C191 divider_0/tspc_2/a_630_n680# divider_0/Out 0.04fF
C192 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Z1 0.02fF
C193 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/UP 0.11fF
C194 divider_1/nor_1/B divider_1/tspc_2/Z4 0.02fF
C195 divider_1/prescaler_0/tspc_1/Z2 divider_1/clk 0.11fF
C196 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/Out 0.11fF
C197 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF
C198 divider_2/tspc_1/Z2 divider_2/tspc_1/a_630_n680# 0.01fF
C199 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/a_630_n680# 0.19fF
C200 divbuf_4/OUT2 divbuf_4/OUT3 1.37fF
C201 ro_complete_1/cbank_2/switch_0/vin ro_complete_1/cbank_2/v 1.44fF
C202 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT 0.06fF
C203 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT5 0.01fF
C204 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF
C205 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z1 1.07fF
C206 divider_1/tspc_0/Z1 divider_1/nor_1/A 0.03fF
C207 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF
C208 divider_0/nor_1/B divider_0/tspc_1/Z4 0.21fF
C209 divider_0/tspc_0/a_630_n680# divider_0/nor_1/A 0.35fF
C210 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF
C211 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF
C212 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF
C213 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF
C214 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/Out 0.19fF
C215 divider_1/tspc_0/Q divider_1/nor_1/A 0.55fF
C216 ro_complete_0/a4 ro_complete_0/cbank_1/v 0.05fF
C217 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF
C218 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF
C219 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/cbank_0/v 1.30fF
C220 divbuf_5/OUT2 divbuf_5/OUT3 1.37fF
C221 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
C222 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF
C223 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_0/Q 0.01fF
C224 pll_full_0/ro_complete_0/a5 pll_full_0/divider_0/clk 0.15fF
C225 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z3 0.05fF
C226 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF
C227 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/Out 0.08fF
C228 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF
C229 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/clk 0.26fF
C230 divider_1/prescaler_0/Out divider_1/clk 0.51fF
C231 divbuf_2/OUT5 divbuf_2/a_492_n240# 0.01fF
C232 divider_2/prescaler_0/tspc_2/D divider_2/prescaler_0/nand_1/z1 0.21fF
C233 divbuf_3/OUT5 divbuf_3/OUT 43.38fF
C234 ro_complete_1/a3 ro_complete_1/cbank_1/v 0.05fF
C235 divbuf_6/OUT5 divbuf_6/OUT 43.38fF
C236 divider_0/tspc_0/Z3 divider_0/tspc_0/a_630_n680# 0.05fF
C237 pd_0/tspc_r_0/Z3 pd_0/R 0.27fF
C238 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/Qbar 0.01fF
C239 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
C240 pd_1/tspc_r_1/Z2 pd_1/tspc_r_1/Z4 0.14fF
C241 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/nor_1/A 0.21fF
C242 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF
C243 divider_2/nor_1/A divider_2/prescaler_0/tspc_1/Q 0.03fF
C244 divbuf_3/a_492_n240# divbuf_3/OUT2 0.42fF
C245 divider_2/tspc_2/Z3 divider_2/tspc_2/Z4 0.65fF
C246 io_clamp_low[0] io_clamp_high[0] 0.53fF
C247 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF
C248 divider_0/nor_1/B divider_0/tspc_0/a_630_n680# 0.01fF
C249 divider_0/tspc_0/Q divider_0/nor_1/A 0.55fF
C250 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Q 0.04fF
C251 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Qbar1 0.38fF
C252 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/clk 0.45fF
C253 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z2 1.07fF
C254 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z4 0.12fF
C255 divider_1/prescaler_0/tspc_0/Q divider_1/prescaler_0/nand_1/z1 0.01fF
C256 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/Out 0.05fF
C257 divider_1/prescaler_0/tspc_2/Z2 divider_1/clk 0.11fF
C258 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/v 1.30fF
C259 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z4 0.12fF
C260 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z4 0.36fF
C261 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF
C262 ro_complete_1/cbank_2/switch_5/vin ro_complete_1/cbank_2/v 1.30fF
C263 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF
C264 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z2 0.01fF
C265 divider_1/tspc_0/Z1 divider_1/tspc_0/Z2 1.07fF
C266 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF
C267 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF
C268 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/z5 0.04fF
C269 pd_1/tspc_r_0/Qbar1 pd_1/tspc_r_0/Z3 0.38fF
C270 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Z1 0.02fF
C271 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF
C272 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/divider_0/clk 1.32fF
C273 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z3 0.45fF
C274 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z4 0.36fF
C275 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Q 0.04fF
C276 ro_complete_0/a0 ro_complete_0/cbank_2/switch_4/vin 0.13fF
C277 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF
C278 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z4 0.14fF
C279 divider_1/tspc_2/Z1 divider_1/tspc_2/Z4 0.00fF
C280 divbuf_6/a_492_n240# divbuf_6/OUT2 0.42fF
C281 divider_0/tspc_0/Z2 divider_0/tspc_0/Z4 0.36fF
C282 divider_0/tspc_0/Z3 divider_0/tspc_0/Q 0.05fF
C283 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF
C284 divider_0/tspc_1/Q divider_0/tspc_2/Z2 0.14fF
C285 divider_0/prescaler_0/tspc_0/Q divider_0/prescaler_0/tspc_2/D 0.04fF
C286 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF
C287 pd_1/REF pd_1/tspc_r_1/Z2 0.19fF
C288 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z1 0.01fF
C289 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF
C290 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/divider_0/clk 1.27fF
C291 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF
C292 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z4 0.22fF
C293 divider_2/tspc_0/Q divider_2/tspc_1/Z1 0.01fF
C294 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF
C295 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z3 0.16fF
C296 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/Out 0.08fF
C297 divbuf_2/a_492_n240# divbuf_2/IN 0.13fF
C298 divbuf_7/IN divbuf_7/OUT5 0.00fF
C299 divider_0/tspc_0/Q divider_0/nor_1/B 0.22fF
C300 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF
C301 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF
C302 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF
C303 divider_0/nor_0/B divider_0/Out 0.22fF
C304 pd_1/tspc_r_1/Qbar1 pd_1/UP 0.11fF
C305 io_clamp_high[2] io_analog[6] 0.53fF
C306 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF
C307 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/A 0.80fF
C308 divbuf_0/OUT divbuf_0/OUT3 0.26fF
C309 divbuf_0/OUT5 divbuf_0/OUT4 20.26fF
C310 divbuf_0/IN divbuf_0/a_492_n240# 0.13fF
C311 divider_1/prescaler_0/tspc_1/Z4 divider_1/prescaler_0/Out 0.28fF
C312 divbuf_1/OUT4 divbuf_1/OUT5 20.26fF
C313 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF
C314 divbuf_4/OUT2 divbuf_4/OUT5 0.02fF
C315 divbuf_4/OUT3 divbuf_4/OUT4 5.16fF
C316 pll_full_0/divbuf_1/OUT4 pll_full_0/divbuf_1/OUT 1.11fF
C317 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF
C318 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
C319 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF
C320 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF
C321 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF
C322 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z3 0.25fF
C323 pd_0/DOWN pd_0/UP 0.46fF
C324 pd_0/tspc_r_1/Z2 pd_0/tspc_r_1/Z4 0.14fF
C325 divider_2/nor_1/A divider_2/mc2 0.04fF
C326 divider_1/tspc_0/Q divider_1/nor_1/B 0.22fF
C327 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF
C328 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.04fF
C329 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/clk 0.45fF
C330 divider_1/and_0/OUT divider_1/and_0/B 0.01fF
C331 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/Out 0.91fF
C332 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/switch_5/vin 0.20fF
C333 pll_full_0/pd_0/DOWN pll_full_0/pd_0/R 0.36fF
C334 divbuf_5/OUT2 divbuf_5/OUT5 0.02fF
C335 divbuf_5/OUT3 divbuf_5/OUT4 5.16fF
C336 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF
C337 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z4 0.12fF
C338 divider_0/nor_1/B divider_0/tspc_2/Z4 0.02fF
C339 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF
C340 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/Out 0.11fF
C341 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/nor_1/A 0.23fF
C342 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/IN 0.13fF
C343 pll_full_0/pd_0/REF pll_full_0/pd_0/DOWN 1.48fF
C344 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_0/Z3 0.11fF
C345 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/a_630_n680# 0.19fF
C346 ro_complete_0/a1 ro_complete_0/cbank_2/v 0.05fF
C347 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_0/vin 0.19fF
C348 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/v 1.30fF
C349 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT3 1.37fF
C350 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
C351 pd_0/DOWN pd_0/R 0.36fF
C352 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z4 0.20fF
C353 pd_0/DIV pd_0/tspc_r_0/z5 0.04fF
C354 pd_0/tspc_r_0/Z1 pd_0/tspc_r_0/Z2 0.71fF
C355 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/clk 0.01fF
C356 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF
C357 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF
C358 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_2/a_740_n680# 0.01fF
C359 ro_complete_0/a4 ro_complete_0/cbank_0/switch_1/vin 0.09fF
C360 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF
C361 divider_0/tspc_0/Q divider_0/tspc_1/Z3 0.45fF
C362 pd_0/tspc_r_0/Z4 pd_0/tspc_r_1/Z4 0.02fF
C363 pd_0/DOWN pd_0/and_pd_0/Out1 0.12fF
C364 pd_0/REF pd_0/tspc_r_1/Z1 0.17fF
C365 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Q 0.20fF
C366 divider_0/prescaler_0/Out divider_0/clk 0.51fF
C367 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/clk 0.12fF
C368 ro_complete_0/a5 ro_complete_0/cbank_0/switch_0/vin 0.09fF
C369 divider_2/nor_1/A divider_2/and_0/A 0.01fF
C370 divider_1/prescaler_0/tspc_2/D divider_1/prescaler_0/nand_1/z1 0.21fF
C371 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF
C372 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/Z3 0.03fF
C373 divbuf_5/a_492_n240# divbuf_5/IN 0.13fF
C374 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF
C375 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z3 0.65fF
C376 pll_full_0/pd_0/DIV pll_full_0/divider_0/clk 2.26fF
C377 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF
C378 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF
C379 cp_0/a_1710_0# cp_0/out 0.84fF
C380 pd_1/R pd_1/tspc_r_1/Qbar 0.03fF
C381 pd_0/tspc_r_1/Z3 pd_0/UP 0.03fF
C382 divider_1/tspc_0/Q divider_1/tspc_1/Z3 0.45fF
C383 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z4 0.15fF
C384 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/Out 0.15fF
C385 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/clk 0.64fF
C386 divider_1/tspc_2/Z3 divider_1/tspc_2/Z4 0.65fF
C387 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/Out 0.21fF
C388 ro_complete_1/a4 ro_complete_1/cbank_1/v 0.05fF
C389 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF
C390 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF
C391 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF
C392 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/nor_1/A 0.03fF
C393 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF
C394 divider_0/prescaler_0/tspc_0/Q divider_0/prescaler_0/nand_1/z1 0.01fF
C395 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/Out 0.05fF
C396 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF
C397 pll_full_0/pd_0/tspc_r_1/z5 pll_full_0/pd_0/tspc_r_1/Z3 0.11fF
C398 divider_1/nor_1/A divider_1/prescaler_0/tspc_1/Q 0.03fF
C399 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z4 0.36fF
C400 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF
C401 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divbuf_0/IN 0.05fF
C402 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/switch_1/vin 0.19fF
C403 divbuf_7/OUT2 divbuf_7/OUT 0.06fF
C404 divbuf_7/OUT3 divbuf_7/OUT5 0.01fF
C405 pll_full_0/divbuf_0/OUT4 pll_full_0/divbuf_0/OUT5 20.26fF
C406 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
C407 divider_0/tspc_0/Q divider_0/tspc_1/Z2 0.14fF
C408 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z4 0.36fF
C409 pd_0/R pd_0/tspc_r_1/Z3 0.29fF
C410 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
C411 io_clamp_low[1] io_analog[5] 0.53fF
C412 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF
C413 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
C414 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF
C415 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a2 0.09fF
C416 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_0/Z3 0.16fF
C417 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF
C418 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/D 0.05fF
C419 divbuf_2/OUT divbuf_2/OUT2 0.06fF
C420 divbuf_2/OUT5 divbuf_2/OUT3 0.01fF
C421 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/UP 0.33fF
C422 divbuf_4/OUT3 divbuf_4/OUT 0.26fF
C423 divbuf_4/OUT4 divbuf_4/OUT5 20.26fF
C424 divider_1/tspc_0/Z3 divider_1/tspc_0/a_630_n680# 0.05fF
C425 divider_0/tspc_0/Z2 divider_0/prescaler_0/Out 0.11fF
C426 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
C427 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF
C428 pd_1/R pd_1/tspc_r_0/Z3 0.27fF
C429 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/clk 0.12fF
C430 divider_1/tspc_0/Q divider_1/tspc_1/Z2 0.14fF
C431 ro_complete_0/a2 ro_complete_0/cbank_1/v 0.05fF
C432 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
C433 divider_2/tspc_0/Z1 divider_2/tspc_0/Z2 1.07fF
C434 divider_2/prescaler_0/tspc_0/Z2 divider_2/and_0/OUT 0.05fF
C435 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/R 0.29fF
C436 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/Qbar 0.21fF
C437 divider_2/nor_1/B divider_2/nor_0/B 0.47fF
C438 divider_2/and_0/OUT divider_2/prescaler_0/tspc_0/D 0.03fF
C439 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/D 0.09fF
C440 ro_complete_1/a2 ro_complete_1/cbank_1/v 0.05fF
C441 ro_complete_1/a5 ro_complete_1/cbank_1/switch_0/vin 0.09fF
C442 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/v 1.30fF
C443 divbuf_5/OUT3 divbuf_5/OUT 0.26fF
C444 divbuf_5/OUT4 divbuf_5/OUT5 20.26fF
C445 divider_0/tspc_0/Z2 divider_0/tspc_0/Z1 1.07fF
C446 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/D 0.11fF
C447 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/Out 0.28fF
C448 pd_1/R pd_1/and_pd_0/Z1 0.02fF
C449 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/clk 0.60fF
C450 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z3 0.65fF
C451 divbuf_2/OUT5 divbuf_2/IN 0.00fF
C452 ro_complete_0/a0 ro_complete_0/cbank_2/switch_5/vin 0.09fF
C453 divider_2/mc2 divider_2/nor_1/B 0.06fF
C454 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z3 0.65fF
C455 ro_complete_1/a1 ro_complete_1/cbank_1/v 0.05fF
C456 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT4 5.16fF
C457 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/z5 0.20fF
C458 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF
C459 divider_1/tspc_0/Z3 divider_1/prescaler_0/Out 0.45fF
C460 divider_0/and_0/OUT divider_0/and_0/B 0.01fF
C461 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/Out 0.91fF
C462 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_0/D 0.16fF
C463 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.05fF
C464 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z2 0.19fF
C465 divider_2/nor_1/B divider_2/tspc_1/Z1 0.03fF
C466 pll_full_0/pd_0/DIV pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF
C467 pll_full_0/divbuf_1/a_492_n240# pll_full_0/divbuf_1/OUT5 0.01fF
C468 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
C469 divider_1/tspc_0/Z3 divider_1/tspc_0/Z4 0.65fF
C470 divider_0/mc2 divider_0/and_0/out1 0.06fF
C471 divider_0/tspc_0/Q divider_0/tspc_1/Z4 0.15fF
C472 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
C473 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
C474 pd_1/R pd_1/tspc_r_0/Qbar1 0.01fF
C475 pd_1/tspc_r_0/Qbar pd_1/DOWN 0.21fF
C476 pd_0/tspc_r_0/z5 pd_0/tspc_r_1/z5 0.02fF
C477 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z2 0.25fF
C478 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF
C479 divbuf_1/OUT5 divbuf_1/a_492_n240# 0.01fF
C480 divider_1/nor_1/Z1 divider_1/nor_1/B 0.06fF
C481 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF
C482 pd_1/tspc_r_0/Z4 pd_1/DIV 0.02fF
C483 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF
C484 divider_1/tspc_0/Q divider_1/tspc_1/Z4 0.15fF
C485 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_2/a_740_n680# 0.01fF
C486 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/clk 0.12fF
C487 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF
C488 divider_2/nor_0/Z1 divider_2/nor_0/B 0.06fF
C489 ro_complete_1/a3 ro_complete_1/cbank_2/switch_2/vin 0.09fF
C490 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/Out 0.04fF
C491 divider_2/nor_1/B divider_2/and_0/A 0.26fF
C492 divbuf_6/a_492_n240# divbuf_6/OUT 0.00fF
C493 pd_0/DIV pd_0/tspc_r_0/Qbar1 0.12fF
C494 divider_1/nor_0/Z1 divider_1/nor_1/B 0.18fF
C495 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_1/z1 0.21fF
C496 pd_1/REF pd_1/tspc_r_1/Z4 0.02fF
C497 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/a_630_n680# 0.12fF
C498 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF
C499 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF
C500 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/v 1.30fF
C501 divider_2/nor_0/B divider_2/tspc_2/Z1 0.03fF
C502 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z3 0.05fF
C503 divbuf_7/OUT4 divbuf_7/OUT 1.11fF
C504 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.44fF
C505 divider_0/tspc_0/Q divider_0/tspc_0/a_630_n680# 0.04fF
C506 divider_0/mc2 divider_0/nor_0/B 0.15fF
C507 pd_1/tspc_r_0/Z2 pd_1/R 0.21fF
C508 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF
C509 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF
C510 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/divider_0/clk 1.36fF
C511 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/Out 0.21fF
C512 divider_1/nor_1/A divider_1/and_0/A 0.01fF
C513 divbuf_0/OUT divbuf_0/a_492_n240# 0.00fF
C514 ro_complete_0/a2 ro_complete_0/cbank_1/switch_3/vin 0.09fF
C515 divbuf_2/OUT divbuf_2/OUT4 1.11fF
C516 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_4/vin 0.20fF
C517 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF
C518 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z4 0.02fF
C519 divider_2/tspc_1/Z1 divider_2/tspc_1/Z3 0.06fF
C520 divider_2/nor_1/B divider_2/tspc_1/Q 0.51fF
C521 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z2 0.01fF
C522 divbuf_4/OUT5 divbuf_4/OUT 43.38fF
C523 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar 0.03fF
C524 divider_2/and_0/out1 divider_2/and_0/B 0.18fF
C525 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF
C526 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
C527 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF
C528 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_0/Qbar1 0.20fF
C529 divider_1/tspc_0/Z3 divider_1/nor_1/A 0.38fF
C530 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF
C531 divider_0/nor_1/Z1 divider_0/and_0/A 0.80fF
C532 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_0/D 0.09fF
C533 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/Z3 0.33fF
C534 divider_2/nor_1/B divider_2/tspc_2/Z2 0.20fF
C535 divider_2/and_0/OUT divider_2/prescaler_0/nand_0/z1 0.01fF
C536 divider_2/prescaler_0/tspc_0/Z3 divider_2/clk 0.45fF
C537 divbuf_5/OUT5 divbuf_5/OUT 43.38fF
C538 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF
C539 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF
C540 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/divider_0/clk 1.46fF
C541 divider_1/mc2 divider_1/nor_1/A 0.04fF
C542 divider_1/prescaler_0/m1_2700_2190# divider_1/and_0/OUT 0.14fF
C543 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Q 0.04fF
C544 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF
C545 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/B 0.35fF
C546 pll_full_0/divider_0/prescaler_0/tspc_0/Q pll_full_0/divider_0/clk 0.05fF
C547 ro_complete_0/a0 ro_complete_0/cbank_2/v 0.05fF
C548 divider_2/tspc_0/a_630_n680# divider_2/prescaler_0/Out 0.01fF
C549 divider_2/and_0/OUT divider_2/clk 0.04fF
C550 divbuf_7/a_492_n240# divbuf_7/IN 0.13fF
C551 divider_0/tspc_0/Z2 divider_0/nor_1/A 0.23fF
C552 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF
C553 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/nor_1/A 1.21fF
C554 divider_1/prescaler_0/tspc_0/Z4 divider_1/clk 0.12fF
C555 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/switch_1/vin 0.19fF
C556 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/DOWN 0.11fF
C557 divider_2/tspc_0/Q divider_2/tspc_0/a_630_n680# 0.04fF
C558 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/a_630_n680# 0.19fF
C559 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_0/Z4 0.36fF
C560 divider_2/nor_1/Z1 divider_2/and_0/A 0.80fF
C561 divider_1/nor_1/B divider_1/nor_0/B 0.47fF
C562 divider_1/and_0/OUT divider_1/prescaler_0/tspc_0/D 0.03fF
C563 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/D 0.09fF
C564 divider_2/tspc_1/Z1 divider_2/tspc_1/Z2 1.07fF
C565 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/D 0.11fF
C566 divbuf_1/OUT3 divbuf_1/OUT4 5.16fF
C567 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF
C568 divbuf_4/a_492_n240# divbuf_4/OUT2 0.42fF
C569 divider_2/nor_0/B divider_2/and_0/B 0.29fF
C570 pll_full_0/filter_0/a_4216_n5230# pll_full_0/divider_0/clk 1.58fF
C571 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/Qbar 0.01fF
C572 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
C573 divider_1/tspc_1/a_630_n680# divider_1/tspc_0/Q 0.01fF
C574 divider_0/mc2 divider_0/and_0/A 0.16fF
C575 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF
C576 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF
C577 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/clk 0.01fF
C578 ro_complete_0/a4 ro_complete_0/cbank_0/switch_0/vin 0.12fF
C579 ro_complete_0/a5 ro_complete_0/cbank_2/switch_0/vin 0.09fF
C580 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z4 0.14fF
C581 divider_2/tspc_1/Z3 divider_2/tspc_1/Q 0.05fF
C582 divider_2/mc2 divider_2/and_0/B 0.20fF
C583 divbuf_3/OUT2 divbuf_3/OUT3 1.37fF
C584 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF
C585 divbuf_5/a_492_n240# divbuf_5/OUT5 0.01fF
C586 ro_complete_0/a0 ro_complete_0/cbank_0/switch_4/vin 0.13fF
C587 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/mc2 0.33fF
C588 divider_0/tspc_0/Z2 divider_0/tspc_0/Z3 0.16fF
C589 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF
C590 pd_1/tspc_r_0/z5 pd_1/tspc_r_0/Z3 0.11fF
C591 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF
C592 divider_1/tspc_0/Z3 divider_1/tspc_0/Z2 0.16fF
C593 divider_0/nor_1/A divider_0/prescaler_0/tspc_1/Q 0.03fF
C594 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/Out 0.11fF
C595 divider_1/nor_1/B divider_1/tspc_1/Z1 0.03fF
C596 pll_full_0/pd_0/REF pll_full_0/divbuf_1/a_492_n240# 0.13fF
C597 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF
C598 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 4.58fF
C599 divider_2/tspc_1/Q divider_2/tspc_2/Z1 0.01fF
C600 divbuf_3/OUT5 divbuf_3/IN 0.00fF
C601 ro_complete_1/a5 ro_complete_1/cbank_1/v 0.10fF
C602 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/a0 0.09fF
C603 divbuf_6/IN divbuf_6/OUT5 0.00fF
C604 pll_full_0/divbuf_1/a_492_n240# pll_full_0/divbuf_1/OUT2 0.42fF
C605 pd_0/tspc_r_0/Z3 pd_0/DOWN 0.03fF
C606 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/z5 0.11fF
C607 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF
C608 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/D 0.05fF
C609 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z3 0.25fF
C610 divider_2/nor_1/A divider_2/tspc_0/a_630_n680# 0.35fF
C611 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/Out 0.11fF
C612 divider_2/tspc_2/Z1 divider_2/tspc_2/Z2 1.07fF
C613 divider_2/nor_0/B divider_2/tspc_2/Z3 0.38fF
C614 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z4 0.12fF
C615 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF
C616 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF
C617 pd_1/tspc_r_1/Qbar pd_1/UP 0.21fF
C618 io_clamp_high[0] io_analog[4] 0.53fF
C619 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_0/B 0.00fF
C620 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/clk 0.01fF
C621 divider_1/nor_1/Z1 divider_1/and_0/B 0.18fF
C622 ro_complete_0/a4 ro_complete_0/cbank_2/switch_1/vin 0.09fF
C623 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/Out 0.04fF
C624 divider_1/nor_1/B divider_1/and_0/A 0.26fF
C625 divbuf_1/OUT5 divbuf_1/OUT2 0.02fF
C626 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF
C627 divider_2/tspc_1/Z1 divider_2/tspc_1/Z4 0.00fF
C628 divider_2/tspc_0/Z3 divider_2/tspc_0/a_630_n680# 0.05fF
C629 divider_2/and_0/A divider_2/and_0/B 0.18fF
C630 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z2 1.07fF
C631 divider_0/mc2 divider_0/prescaler_0/tspc_0/a_630_n680# 0.33fF
C632 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF
C633 pd_1/R pd_1/tspc_r_1/Z3 0.29fF
C634 pd_1/tspc_r_0/Z1 pd_1/DIV 0.17fF
C635 pd_1/tspc_r_0/Qbar1 pd_1/tspc_r_0/z5 0.20fF
C636 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF
C637 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF
C638 divider_1/nor_0/Z1 divider_1/and_0/B 0.78fF
C639 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF
C640 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/Out 0.01fF
C641 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.19fF
C642 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/clk 0.14fF
C643 ro_complete_0/a3 ro_complete_0/cbank_1/v 0.05fF
C644 divider_1/nor_0/B divider_1/tspc_2/Z1 0.03fF
C645 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z3 0.05fF
C646 pll_full_0/pd_0/DIV pll_full_0/pd_0/R 0.51fF
C647 divider_2/prescaler_0/tspc_0/D divider_2/prescaler_0/nand_0/z1 0.24fF
C648 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/Out 0.19fF
C649 divider_0/nor_0/Z1 divider_0/nor_1/B 0.18fF
C650 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF
C651 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
C652 divider_1/mc2 divider_1/nor_1/B 0.06fF
C653 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_0/D 0.16fF
C654 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/Out 0.21fF
C655 cp_0/a_1710_n2840# cp_0/upbar 0.29fF
C656 pd_1/tspc_r_0/Z4 pd_1/tspc_r_1/Z4 0.02fF
C657 pd_1/REF pd_1/tspc_r_1/Qbar1 0.12fF
C658 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF
C659 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF
C660 divider_1/tspc_1/Z1 divider_1/tspc_1/Z3 0.06fF
C661 divider_1/nor_1/B divider_1/tspc_1/Q 0.51fF
C662 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z2 0.01fF
C663 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF
C664 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/clk 0.29fF
C665 divider_2/prescaler_0/tspc_0/Z2 divider_2/clk 0.11fF
C666 divider_1/and_0/out1 divider_1/and_0/B 0.18fF
C667 ro_complete_1/a0 ro_complete_1/cbank_2/switch_4/vin 0.13fF
C668 ro_complete_1/cbank_0/v ro_complete_1/cbank_1/v 1.27fF
C669 divider_2/and_0/OUT divider_2/and_0/out1 0.31fF
C670 divider_2/prescaler_0/tspc_0/D divider_2/clk 0.26fF
C671 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.35fF
C672 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF
C673 divider_2/nor_1/A divider_2/prescaler_0/m1_2700_2190# 0.01fF
C674 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Out1 0.05fF
C675 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_1/A 0.15fF
C676 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z3 0.38fF
C677 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF
C678 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF
C679 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF
C680 divider_1/nor_1/B divider_1/tspc_2/Z2 0.20fF
C681 divider_1/and_0/OUT divider_1/prescaler_0/nand_0/z1 0.01fF
C682 divbuf_0/OUT5 divbuf_0/OUT2 0.02fF
C683 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF
C684 divbuf_1/OUT3 divbuf_1/OUT5 0.01fF
C685 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/a_492_n240# 0.01fF
C686 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF
C687 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF
C688 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z4 0.20fF
C689 pd_0/REF pd_0/tspc_r_1/z5 0.04fF
C690 pd_0/tspc_r_1/Z1 pd_0/tspc_r_1/Z2 0.71fF
C691 pd_1/and_pd_0/Z1 pd_1/UP 0.06fF
C692 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF
C693 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/clk 0.01fF
C694 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/Z4 0.08fF
C695 divider_1/and_0/OUT divider_1/clk 0.04fF
C696 ro_complete_0/a2 ro_complete_0/cbank_2/switch_2/vin 0.14fF
C697 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.45fF
C698 divbuf_3/OUT2 divbuf_3/OUT5 0.02fF
C699 divbuf_3/OUT3 divbuf_3/OUT4 5.16fF
C700 divbuf_1/OUT2 divbuf_1/a_492_n240# 0.42fF
C701 ro_complete_1/a2 ro_complete_1/cbank_2/switch_2/vin 0.14fF
C702 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z3 0.65fF
C703 divider_2/tspc_0/Z4 divider_2/tspc_0/a_630_n680# 0.12fF
C704 divider_2/prescaler_0/tspc_0/Z4 divider_2/clk 0.12fF
C705 divider_0/nor_1/B divider_0/nor_0/B 0.47fF
C706 divider_0/and_0/OUT divider_0/prescaler_0/tspc_0/D 0.03fF
C707 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF
C708 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF
C709 pd_0/tspc_r_1/Qbar pd_0/UP 0.21fF
C710 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/divider_0/clk 1.46fF
C711 divider_1/tspc_1/Z1 divider_1/tspc_1/Z2 1.07fF
C712 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/B 0.08fF
C713 divider_1/nor_0/B divider_1/and_0/B 0.29fF
C714 divbuf_3/OUT2 divbuf_3/OUT 0.06fF
C715 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/UP 0.03fF
C716 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/R 0.21fF
C717 divider_2/tspc_1/Q divider_2/tspc_2/Z3 0.45fF
C718 divbuf_6/OUT2 divbuf_6/OUT 0.06fF
C719 divbuf_6/OUT3 divbuf_6/OUT5 0.01fF
C720 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z1 0.09fF
C721 pd_0/DIV pd_0/tspc_r_0/Z2 0.19fF
C722 divider_0/nor_1/A divider_0/and_0/A 0.01fF
C723 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z2 0.30fF
C724 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.04fF
C725 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF
C726 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF
C727 divider_1/tspc_1/Z3 divider_1/tspc_1/Q 0.05fF
C728 divider_2/mc2 divider_2/and_0/OUT 0.05fF
C729 divbuf_1/OUT divbuf_1/OUT4 1.11fF
C730 divider_2/tspc_2/Z2 divider_2/tspc_2/Z3 0.16fF
C731 divider_2/nor_0/B divider_2/tspc_2/Z4 0.22fF
C732 pll_full_0/divbuf_0/OUT4 pll_full_0/divbuf_0/OUT3 5.16fF
C733 pd_0/R pd_0/tspc_r_1/Qbar 0.03fF
C734 divider_0/prescaler_0/m1_2700_2190# divider_0/nor_1/A 0.01fF
C735 divider_0/nor_1/B divider_0/tspc_1/Z1 0.03fF
C736 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z3 0.05fF
C737 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.15fF
C738 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z4 0.02fF
C739 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF
C740 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF
C741 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/Z3 0.38fF
C742 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF
C743 divider_1/prescaler_0/tspc_0/Z3 divider_1/clk 0.45fF
C744 filter_0/a_4216_n2998# filter_0/v 0.31fF
C745 pd_1/and_pd_0/Out1 pd_1/and_pd_0/Z1 0.18fF
C746 divider_2/nor_1/A divider_2/prescaler_0/Out 0.15fF
C747 divider_1/tspc_1/Q divider_1/tspc_2/Z1 0.01fF
C748 divbuf_0/OUT3 divbuf_0/OUT4 5.16fF
C749 divider_2/nor_1/B divider_2/tspc_0/a_630_n680# 0.01fF
C750 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z3 0.06fF
C751 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Q 0.05fF
C752 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF
C753 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z2 0.01fF
C754 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/IN 5.26fF
C755 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF
C756 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
C757 cp_0/a_1710_0# cp_0/a_1710_n2840# 0.83fF
C758 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Out1 0.05fF
C759 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z4 0.65fF
C760 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF
C761 divider_2/nor_1/A divider_2/tspc_0/Q 0.55fF
C762 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z3 0.33fF
C763 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.31fF
C764 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_0/B 0.22fF
C765 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/D 0.32fF
C766 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/clk 0.01fF
C767 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z3 0.05fF
C768 divider_1/tspc_2/Z1 divider_1/tspc_2/Z2 1.07fF
C769 divider_1/nor_0/B divider_1/tspc_2/Z3 0.38fF
C770 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z4 0.12fF
C771 ro_complete_0/a5 ro_complete_0/cbank_2/v 0.08fF
C772 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF
C773 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z3 0.25fF
C774 divider_2/tspc_1/a_630_n680# divider_2/nor_0/B 0.00fF
C775 divider_2/tspc_0/Z3 divider_2/prescaler_0/Out 0.45fF
C776 divider_2/and_0/OUT divider_2/prescaler_0/tspc_0/Q 0.04fF
C777 divider_2/prescaler_0/tspc_1/Z3 divider_2/clk 0.45fF
C778 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF
C779 pd_1/tspc_r_0/z5 pd_1/tspc_r_1/z5 0.02fF
C780 pd_0/and_pd_0/Z1 pd_0/UP 0.06fF
C781 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF
C782 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF
C783 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/divider_0/clk 1.46fF
C784 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/nand_0/z1 0.07fF
C785 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/Out 0.04fF
C786 divider_0/nor_1/B divider_0/and_0/A 0.26fF
C787 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z2 0.40fF
C788 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divbuf_0/IN 0.04fF
C789 divider_2/tspc_0/Q divider_2/tspc_0/Z3 0.05fF
C790 divider_1/tspc_1/Z1 divider_1/tspc_1/Z4 0.00fF
C791 divider_1/and_0/A divider_1/and_0/B 0.18fF
C792 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF
C793 divbuf_7/a_492_n240# divbuf_7/OUT5 0.01fF
C794 ro_complete_0/cbank_2/v ro_complete_0/cbank_0/v 0.04fF
C795 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF
C796 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z2 0.01fF
C797 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF
C798 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z4 0.21fF
C799 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/nor_1/A 0.35fF
C800 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF
C801 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF
C802 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF
C803 divider_1/tspc_0/a_630_n680# divider_1/prescaler_0/Out 0.01fF
C804 divider_1/prescaler_0/m1_2700_2190# divider_1/clk 0.01fF
C805 divider_0/nor_0/B divider_0/tspc_2/Z1 0.03fF
C806 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF
C807 divider_1/prescaler_0/tspc_0/D divider_1/prescaler_0/nand_0/z1 0.24fF
C808 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/Out 0.19fF
C809 pll_full_0/pd_0/REF pll_full_0/divbuf_1/OUT5 0.00fF
C810 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/clk 0.01fF
C811 divbuf_4/a_492_n240# divbuf_4/OUT 0.00fF
C812 ro_complete_0/a3 ro_complete_0/cbank_0/switch_1/vin 0.13fF
C813 ro_complete_0/a2 ro_complete_0/cbank_0/switch_3/vin 0.09fF
C814 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT5 0.02fF
C815 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z4 0.12fF
C816 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF
C817 divider_0/nor_1/B divider_0/tspc_1/Q 0.51fF
C818 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF
C819 divider_0/nor_0/Z1 divider_0/and_0/B 0.78fF
C820 pd_0/R pd_0/and_pd_0/Z1 0.02fF
C821 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/z5 0.20fF
C822 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF
C823 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/Out 0.08fF
C824 divider_1/mc2 divider_1/and_0/B 0.20fF
C825 divider_0/and_0/out1 divider_0/and_0/B 0.18fF
C826 ro_complete_0/a4 ro_complete_0/cbank_2/switch_0/vin 0.12fF
C827 pll_full_0/cp_0/a_1710_0# pll_full_0/pd_0/DOWN 0.04fF
C828 divider_1/and_0/OUT divider_1/and_0/out1 0.31fF
C829 divider_1/prescaler_0/tspc_0/D divider_1/clk 0.26fF
C830 divbuf_3/OUT4 divbuf_3/OUT5 20.26fF
C831 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/UP 0.21fF
C832 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF
C833 divider_0/nor_1/B divider_0/tspc_2/Z2 0.20fF
C834 divider_0/tspc_0/Z4 divider_0/prescaler_0/Out 0.12fF
C835 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF
C836 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF
C837 pd_1/DIV pd_1/tspc_r_0/Z3 0.65fF
C838 pd_0/and_pd_0/Out1 pd_0/and_pd_0/Z1 0.18fF
C839 divider_2/nor_1/A divider_2/tspc_0/Z3 0.38fF
C840 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z3 0.06fF
C841 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/Z3 0.20fF
C842 divider_2/tspc_1/Q divider_2/tspc_2/Z4 0.15fF
C843 divider_2/tspc_0/Z4 divider_2/prescaler_0/Out 0.12fF
C844 divider_2/prescaler_0/tspc_2/Z3 divider_2/clk 0.64fF
C845 divbuf_3/OUT4 divbuf_3/OUT 1.11fF
C846 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/OUT5 0.02fF
C847 divbuf_6/OUT4 divbuf_6/OUT 1.11fF
C848 divider_0/tspc_0/Z1 divider_0/tspc_0/Z4 0.00fF
C849 divider_0/tspc_0/Z2 divider_0/tspc_0/a_630_n680# 0.01fF
C850 pd_0/DIV pd_0/R 0.51fF
C851 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF
C852 divider_1/tspc_1/a_630_n680# divider_1/nor_0/B 0.00fF
C853 divider_0/and_0/OUT divider_0/clk 0.04fF
C854 cp_0/upbar cp_0/down 0.02fF
C855 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF
C856 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/nor_1/A 0.55fF
C857 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.04fF
C858 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF
C859 divider_1/tspc_0/Z4 divider_1/prescaler_0/Out 0.12fF
C860 divbuf_1/OUT divbuf_1/OUT5 43.38fF
C861 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Z4 0.65fF
C862 divider_2/tspc_2/Z2 divider_2/tspc_2/Z4 0.36fF
C863 divider_2/tspc_2/Z3 divider_2/Out 0.05fF
C864 ro_complete_1/a0 ro_complete_1/cbank_2/switch_5/vin 0.09fF
C865 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT3 0.01fF
C866 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF
C867 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF
C868 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF
C869 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF
C870 pd_0/REF pd_0/tspc_r_1/Qbar1 0.12fF
C871 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z3 0.16fF
C872 divider_0/nor_0/B divider_0/and_0/B 0.29fF
C873 filter_0/a_4216_n5230# filter_0/v 0.19fF
C874 pd_1/tspc_r_1/z5 pd_1/UP 0.03fF
C875 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF
C876 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/clk 0.11fF
C877 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a1 0.14fF
C878 divider_1/tspc_1/Q divider_1/tspc_2/Z3 0.45fF
C879 divbuf_2/a_492_n240# divbuf_2/OUT2 0.42fF
C880 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_4/vin 0.20fF
C881 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF
C882 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Q 0.04fF
C883 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z4 0.00fF
C884 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Q 0.21fF
C885 divider_2/and_0/B divider_2/and_0/Z1 0.07fF
C886 divider_1/tspc_0/a_630_n680# divider_1/nor_1/A 0.35fF
C887 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z4 0.08fF
C888 divider_0/tspc_1/Z3 divider_0/tspc_1/Q 0.05fF
C889 pd_1/tspc_r_0/Qbar1 pd_1/DIV 0.12fF
C890 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF
C891 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF
C892 pll_full_0/ro_complete_0/a2 pll_full_0/divider_0/clk 0.11fF
C893 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z2 0.14fF
C894 pll_full_0/divider_0/prescaler_0/tspc_0/Q pll_full_0/divider_0/prescaler_0/tspc_2/D 0.04fF
C895 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF
C896 ro_complete_0/a1 ro_complete_0/cbank_1/v 0.05fF
C897 divider_1/tspc_2/Z2 divider_1/tspc_2/Z3 0.16fF
C898 divider_1/nor_0/B divider_1/tspc_2/Z4 0.22fF
C899 divider_2/prescaler_0/tspc_1/Z4 divider_2/clk 0.12fF
C900 divbuf_6/a_492_n240# divbuf_6/IN 0.13fF
C901 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/a_740_n680# 0.19fF
C902 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF
C903 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/z5 0.04fF
C904 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Q 0.38fF
C905 divider_0/tspc_1/Q divider_0/tspc_2/Z1 0.01fF
C906 pd_1/R pd_1/UP 0.45fF
C907 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z1 0.09fF
C908 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/nor_1/B 0.22fF
C909 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF
C910 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/divider_0/clk 1.61fF
C911 divider_2/tspc_0/Q divider_2/nor_1/B 0.22fF
C912 divider_2/nor_1/A divider_2/tspc_0/Z4 0.21fF
C913 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_0/a_630_n680# 0.01fF
C914 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z3 0.06fF
C915 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF
C916 pll_full_0/divider_0/nor_0/B pll_full_0/divbuf_0/IN 0.29fF
C917 divbuf_1/IN divbuf_1/OUT5 0.00fF
C918 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF
C919 divider_2/prescaler_0/tspc_1/Q divider_2/clk 0.60fF
C920 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF
C921 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF
C922 divbuf_7/OUT2 divbuf_7/OUT3 1.37fF
C923 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF
C924 pd_0/tspc_r_0/Z4 pd_0/tspc_r_0/z5 0.04fF
C925 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF
C926 divider_0/nor_0/B divider_0/tspc_2/Z3 0.38fF
C927 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF
C928 pd_1/tspc_r_1/Z3 pd_1/UP 0.03fF
C929 io_clamp_low[2] io_analog[6] 0.53fF
C930 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF
C931 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.45fF
C932 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF
C933 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF
C934 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/DIV 0.12fF
C935 divider_1/nor_1/A divider_1/prescaler_0/Out 0.15fF
C936 divider_1/and_0/OUT divider_1/prescaler_0/tspc_0/Q 0.04fF
C937 divider_1/prescaler_0/tspc_1/Z3 divider_1/clk 0.45fF
C938 divbuf_0/OUT5 divbuf_0/OUT3 0.01fF
C939 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF
C940 divbuf_1/OUT divbuf_1/a_492_n240# 0.00fF
C941 divbuf_1/OUT3 divbuf_1/OUT2 1.37fF
C942 divider_2/tspc_0/Z3 divider_2/tspc_0/Z4 0.65fF
C943 divbuf_4/IN divbuf_4/OUT5 0.00fF
C944 ro_complete_1/cbank_1/v ro_complete_1/cbank_2/v 1.36fF
C945 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT 0.26fF
C946 pll_full_0/divbuf_1/OUT4 pll_full_0/divbuf_1/OUT5 20.26fF
C947 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF
C948 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF
C949 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z1 0.06fF
C950 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF
C951 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF
C952 cp_0/a_1710_0# cp_0/a_10_n50# 0.04fF
C953 pd_1/tspc_r_0/Z2 pd_1/DIV 0.19fF
C954 divider_1/tspc_0/Z4 divider_1/nor_1/A 0.21fF
C955 divider_0/and_0/A divider_0/and_0/B 0.18fF
C956 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z4 0.02fF
C957 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/clk 0.11fF
C958 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/Out 0.11fF
C959 pll_full_0/pd_0/REF pll_full_0/pd_0/R 0.61fF
C960 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z4 0.12fF
C961 ro_complete_0/a3 ro_complete_0/cbank_2/switch_2/vin 0.09fF
C962 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF
C963 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_0/vin 0.19fF
C964 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF
C965 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_1/Q 0.13fF
C966 divbuf_5/IN divbuf_5/OUT5 0.00fF
C967 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF
C968 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF
C969 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Q 0.04fF
C970 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z2 0.01fF
C971 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_0/z1 0.24fF
C972 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/Out 0.19fF
C973 cp_0/a_1710_0# cp_0/down 0.32fF
C974 pd_1/DOWN pd_1/tspc_r_1/Qbar 0.02fF
C975 pd_1/R pd_1/and_pd_0/Out1 0.33fF
C976 pd_0/tspc_r_1/z5 pd_0/UP 0.03fF
C977 divider_2/nor_1/A divider_2/nor_1/B 1.21fF
C978 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z4 0.00fF
C979 divbuf_2/OUT divbuf_2/a_492_n240# 0.00fF
C980 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF
C981 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF
C982 ro_complete_1/cbank_1/switch_2/vin ro_complete_1/cbank_1/v 1.30fF
C983 divider_2/prescaler_0/tspc_2/Z4 divider_2/clk 0.12fF
C984 pd_0/DIV pd_0/tspc_r_0/Z4 0.02fF
C985 pd_0/tspc_r_0/Qbar1 pd_0/R 0.01fF
C986 pd_0/DOWN pd_0/tspc_r_0/Qbar 0.21fF
C987 divider_0/tspc_1/a_630_n680# divider_0/tspc_0/Q 0.01fF
C988 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z3 0.45fF
C989 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/divider_0/clk 1.46fF
C990 divider_1/mc2 divider_1/and_0/OUT 0.05fF
C991 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Q 0.05fF
C992 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF
C993 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.26fF
C994 divbuf_0/IN divbuf_0/OUT5 0.00fF
C995 ro_complete_0/a5 ro_complete_0/cbank_1/switch_0/vin 0.09fF
C996 divider_2/tspc_0/Q divider_2/tspc_1/Z3 0.45fF
C997 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/clk 0.51fF
C998 divbuf_1/IN divbuf_1/a_492_n240# 0.13fF
C999 ro_complete_1/a0 ro_complete_1/cbank_2/v 0.05fF
C1000 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/R 0.27fF
C1001 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF
C1002 divider_0/tspc_0/Z4 divider_0/nor_1/A 0.21fF
C1003 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF
C1004 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z3 0.06fF
C1005 ro_complete_0/a3 ro_complete_0/cbank_1/switch_2/vin 0.09fF
C1006 divider_1/tspc_1/Q divider_1/tspc_2/Z4 0.15fF
C1007 divider_1/tspc_0/Z2 divider_1/prescaler_0/Out 0.11fF
C1008 divider_1/prescaler_0/tspc_2/Z3 divider_1/clk 0.64fF
C1009 divider_2/tspc_0/Z2 divider_2/tspc_0/a_630_n680# 0.01fF
C1010 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Z4 0.65fF
C1011 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z2 0.36fF
C1012 divider_1/tspc_0/a_630_n680# divider_1/nor_1/B 0.01fF
C1013 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.45fF
C1014 pd_1/R pd_1/tspc_r_1/Z2 0.21fF
C1015 pd_1/DOWN pd_1/tspc_r_0/Z3 0.03fF
C1016 pll_full_0/divider_0/prescaler_0/tspc_0/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF
C1017 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF
C1018 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/clk 0.11fF
C1019 divider_1/tspc_0/Z4 divider_1/tspc_0/Z2 0.36fF
C1020 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Z4 0.65fF
C1021 vdda1 vssa1 548.48fF
C1022 ro_complete_0/a4 ro_complete_0/cbank_2/v 0.05fF
C1023 ro_complete_0/a0 ro_complete_0/cbank_1/switch_5/vin 0.09fF
C1024 divider_1/tspc_2/Z2 divider_1/tspc_2/Z4 0.36fF
C1025 divider_1/tspc_2/Z3 divider_1/Out 0.05fF
C1026 ro_complete_1/a4 ro_complete_1/cbank_2/switch_0/vin 0.12fF
C1027 divider_0/tspc_0/Z3 divider_0/tspc_0/Z4 0.65fF
C1028 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF
C1029 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF
C1030 divider_0/tspc_1/Q divider_0/tspc_2/Z3 0.45fF
C1031 pd_1/DOWN pd_1/and_pd_0/Z1 0.07fF
C1032 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z2 0.25fF
C1033 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z2 0.14fF
C1034 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF
C1035 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF
C1036 divider_2/tspc_0/Q divider_2/tspc_1/Z2 0.14fF
C1037 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z4 0.00fF
C1038 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Q 0.21fF
C1039 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF
C1040 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/Q 0.20fF
C1041 divider_1/and_0/B divider_1/and_0/Z1 0.07fF
C1042 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT4 1.11fF
C1043 divider_2/and_0/OUT divider_2/and_0/Z1 0.04fF
C1044 divider_2/tspc_2/a_630_n680# divider_2/nor_0/B 0.35fF
C1045 divider_2/prescaler_0/tspc_0/Q divider_2/clk 0.05fF
C1046 ro_complete_1/a3 ro_complete_1/cbank_2/v 0.05fF
C1047 divbuf_7/OUT2 divbuf_7/OUT5 0.02fF
C1048 divbuf_7/OUT3 divbuf_7/OUT4 5.16fF
C1049 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/a_492_n240# 0.42fF
C1050 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF
C1051 divider_0/tspc_0/Q divider_0/tspc_1/Z1 0.01fF
C1052 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z4 0.00fF
C1053 pd_0/R pd_0/REF 0.61fF
C1054 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/DOWN 0.03fF
C1055 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF
C1056 divider_0/nor_0/B divider_0/tspc_2/Z4 0.22fF
C1057 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.18fF
C1058 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
C1059 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF
C1060 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/clk 0.01fF
C1061 divbuf_0/OUT divbuf_0/OUT4 1.11fF
C1062 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z1 0.17fF
C1063 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/Z3 0.06fF
C1064 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/a_630_n680# 0.19fF
C1065 divider_1/prescaler_0/tspc_1/Z4 divider_1/clk 0.12fF
C1066 divbuf_2/OUT5 divbuf_2/OUT2 0.02fF
C1067 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/clk 0.01fF
C1068 ro_complete_0/a2 ro_complete_0/cbank_0/switch_2/vin 0.14fF
C1069 divbuf_4/OUT2 divbuf_4/OUT 0.06fF
C1070 divbuf_4/OUT3 divbuf_4/OUT5 0.01fF
C1071 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF
C1072 pd_1/R pd_1/DIV 0.51fF
C1073 pd_1/tspc_r_0/Qbar1 pd_1/DOWN 0.11fF
C1074 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF
C1075 divider_1/tspc_0/Q divider_1/tspc_1/Z1 0.01fF
C1076 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/prescaler_0/Out 0.28fF
C1077 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/DIV 0.17fF
C1078 divider_1/prescaler_0/tspc_1/Q divider_1/clk 0.60fF
C1079 ro_complete_1/a3 ro_complete_1/cbank_1/switch_2/vin 0.09fF
C1080 divider_2/prescaler_0/tspc_2/Z4 divider_2/prescaler_0/tspc_1/Q 0.21fF
C1081 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/D 0.03fF
C1082 pll_full_0/pd_0/and_pd_0/Z1 pll_full_0/pd_0/UP 0.06fF
C1083 divbuf_5/OUT2 divbuf_5/OUT 0.06fF
C1084 divbuf_5/OUT3 divbuf_5/OUT5 0.01fF
C1085 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
C1086 divider_0/and_0/OUT divider_0/prescaler_0/tspc_0/Q 0.04fF
C1087 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF
C1088 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/nor_1/A 0.38fF
C1089 divider_2/nor_1/A divider_2/tspc_1/Z2 0.15fF
C1090 divider_1/nor_1/A divider_1/tspc_0/Z2 0.23fF
C1091 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF
C1092 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/Out 0.91fF
C1093 divbuf_2/OUT2 divbuf_2/OUT3 1.37fF
C1094 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/switch_5/vin 0.20fF
C1095 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF
C1096 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/z5 0.11fF
C1097 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z4 0.15fF
C1098 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF
C1099 divider_2/tspc_0/Q divider_2/tspc_1/Z4 0.15fF
C1100 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_1/Q 0.13fF
C1101 divbuf_3/a_492_n240# divbuf_3/OUT5 0.01fF
C1102 divbuf_1/OUT divbuf_1/OUT2 0.06fF
C1103 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a4 0.12fF
C1104 ro_complete_1/a2 ro_complete_1/cbank_0/switch_3/vin 0.09fF
C1105 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/tspc_r_1/Qbar 0.05fF
C1106 divider_1/tspc_0/Z1 divider_1/tspc_0/Z3 0.06fF
C1107 divider_1/tspc_0/Z3 divider_1/tspc_0/Q 0.05fF
C1108 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF
C1109 pd_1/tspc_r_0/Qbar pd_1/tspc_r_0/Qbar1 0.01fF
C1110 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z1 0.09fF
C1111 pd_0/REF pd_0/tspc_r_1/Z2 0.19fF
C1112 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z4 0.00fF
C1113 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF
C1114 divider_2/nor_1/A divider_2/and_0/B 0.08fF
C1115 divider_1/prescaler_0/tspc_2/Z4 divider_1/clk 0.12fF
C1116 ro_complete_0/a3 ro_complete_0/cbank_2/switch_1/vin 0.13fF
C1117 divbuf_3/a_492_n240# divbuf_3/OUT 0.00fF
C1118 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/a1 0.14fF
C1119 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/a3 0.09fF
C1120 divider_2/mc2 divider_2/and_0/out1 0.06fF
C1121 divbuf_5/a_492_n240# divbuf_5/OUT2 0.42fF
C1122 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF
C1123 pd_0/tspc_r_1/Qbar1 pd_0/UP 0.11fF
C1124 divider_1/nor_1/A divider_1/nor_1/B 1.21fF
C1125 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF
C1126 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/R 0.21fF
C1127 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z2 0.71fF
C1128 divider_2/prescaler_0/m1_2700_2190# divider_2/and_0/OUT 0.14fF
C1129 divbuf_2/OUT5 divbuf_2/OUT 43.38fF
C1130 ro_complete_0/a0 ro_complete_0/cbank_1/v 0.05fF
C1131 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/v 1.30fF
C1132 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/cbank_0/v 1.30fF
C1133 divider_2/tspc_1/Q divider_2/tspc_2/a_630_n680# 0.01fF
C1134 divider_2/tspc_0/Z2 divider_2/prescaler_0/Out 0.11fF
C1135 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_0/Q 0.19fF
C1136 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/clk 0.14fF
C1137 divbuf_6/a_492_n240# divbuf_6/OUT5 0.01fF
C1138 pd_0/DIV pd_0/tspc_r_0/Z3 0.65fF
C1139 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/a_740_n680# 0.08fF
C1140 divider_0/mc2 divider_0/nor_1/A 0.04fF
C1141 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF
C1142 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_0/a_630_n680# 0.04fF
C1143 pll_full_0/ro_complete_0/a0 pll_full_0/divider_0/clk 0.01fF
C1144 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z2 0.19fF
C1145 divider_1/prescaler_0/tspc_0/Z2 divider_1/and_0/OUT 0.05fF
C1146 divider_0/tspc_1/Q divider_0/tspc_2/Z4 0.15fF
C1147 divider_0/nor_1/A divider_0/prescaler_0/Out 0.15fF
C1148 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.64fF
C1149 pd_1/tspc_r_1/Qbar1 pd_1/tspc_r_1/Qbar 0.01fF
C1150 divider_2/nor_1/A divider_2/tspc_1/Z4 0.02fF
C1151 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Z4 0.65fF
C1152 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF
C1153 divbuf_1/OUT divbuf_1/OUT3 0.26fF
C1154 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.44fF
C1155 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT5 43.38fF
C1156 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z2 0.01fF
C1157 divider_2/prescaler_0/tspc_2/D divider_2/clk 0.29fF
C1158 divbuf_7/OUT3 divbuf_7/OUT 0.26fF
C1159 divbuf_7/OUT4 divbuf_7/OUT5 20.26fF
C1160 io_clamp_low[2] io_clamp_high[2] 0.53fF
C1161 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF
C1162 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF
C1163 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF
C1164 pd_0/DOWN pd_0/tspc_r_1/Qbar 0.02fF
C1165 pd_0/R pd_0/tspc_r_1/Qbar1 0.30fF
C1166 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_1/B 0.18fF
C1167 divider_0/tspc_0/Z1 divider_0/nor_1/A 0.03fF
C1168 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Z4 0.65fF
C1169 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF
C1170 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF
C1171 divider_0/tspc_2/Z3 divider_0/Out 0.05fF
C1172 io_clamp_high[1] io_analog[5] 0.53fF
C1173 divider_2/nor_0/Z1 divider_2/nor_1/B 0.18fF
C1174 divbuf_0/OUT5 divbuf_0/a_492_n240# 0.01fF
C1175 divbuf_0/OUT2 divbuf_0/OUT3 1.37fF
C1176 divider_2/nor_1/B divider_2/tspc_1/Z3 0.38fF
C1177 divider_2/prescaler_0/tspc_1/Z2 divider_2/and_0/OUT 0.06fF
C1178 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z3 0.33fF
C1179 divider_2/mc2 divider_2/nor_0/B 0.15fF
C1180 divbuf_2/OUT divbuf_2/OUT3 0.26fF
C1181 divbuf_2/OUT5 divbuf_2/OUT4 20.26fF
C1182 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a3 0.13fF
C1183 divbuf_4/OUT4 divbuf_4/OUT 1.11fF
C1184 divider_2/and_0/out1 divider_2/and_0/A 0.01fF
C1185 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z2 0.01fF
C1186 divider_0/tspc_0/Z3 divider_0/prescaler_0/Out 0.45fF
C1187 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF
C1188 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF
C1189 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/Z2 1.07fF
C1190 divider_2/nor_1/Z1 divider_2/nor_1/B 0.06fF
C1191 divider_0/and_0/B divider_0/and_0/Z1 0.07fF
C1192 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/D 0.15fF
C1193 divider_1/and_0/OUT divider_1/and_0/Z1 0.04fF
C1194 divider_1/tspc_2/a_630_n680# divider_1/nor_0/B 0.35fF
C1195 divider_1/prescaler_0/tspc_0/Q divider_1/clk 0.05fF
C1196 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF
C1197 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/D 0.05fF
C1198 ro_complete_1/a3 ro_complete_1/cbank_2/switch_1/vin 0.13fF
C1199 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF
C1200 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/v 1.30fF
C1201 divbuf_5/OUT4 divbuf_5/OUT 1.11fF
C1202 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z3 0.16fF
C1203 divider_0/mc2 divider_0/nor_1/B 0.06fF
C1204 divider_0/tspc_0/Z3 divider_0/tspc_0/Z1 0.06fF
C1205 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z3 0.33fF
C1206 pll_full_0/ro_complete_0/a3 pll_full_0/divider_0/clk 0.11fF
C1207 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF
C1208 divider_2/nor_1/A divider_2/tspc_0/Z2 0.23fF
C1209 pll_full_0/pd_0/tspc_r_1/z5 pll_full_0/pd_0/UP 0.03fF
C1210 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/R 0.01fF
C1211 divbuf_2/OUT3 divbuf_2/OUT4 5.16fF
C1212 ro_complete_1/a4 ro_complete_1/cbank_2/v 0.05fF
C1213 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/v 1.30fF
C1214 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/OUT3 1.37fF
C1215 pd_0/DOWN pd_0/tspc_r_0/z5 0.03fF
C1216 pd_0/tspc_r_0/Z2 pd_0/R 0.21fF
C1217 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF
C1218 pd_1/tspc_r_1/Z4 pd_1/tspc_r_1/z5 0.04fF
C1219 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF
C1220 divbuf_0/OUT5 divbuf_0/OUT 43.38fF
C1221 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/Z4 0.00fF
C1222 divider_1/prescaler_0/tspc_2/Z4 divider_1/prescaler_0/tspc_1/Q 0.21fF
C1223 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/D 0.03fF
C1224 divider_2/nor_1/B divider_2/tspc_1/Z2 0.30fF
C1225 divider_2/tspc_0/Z3 divider_2/tspc_0/Z2 0.16fF
C1226 divider_2/prescaler_0/tspc_1/Z4 divider_2/prescaler_0/tspc_2/a_740_n680# 0.01fF
C1227 ro_complete_1/a2 ro_complete_1/cbank_2/switch_3/vin 0.09fF
C1228 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF
C1229 divbuf_4/a_492_n240# divbuf_4/IN 0.13fF
C1230 ro_complete_1/cbank_2/switch_2/vin ro_complete_1/cbank_2/v 1.30fF
C1231 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z4 0.00fF
C1232 pll_full_0/divbuf_1/a_492_n240# pll_full_0/divbuf_1/OUT 0.00fF
C1233 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF
C1234 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF
C1235 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_0/D 0.16fF
C1236 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Q 0.05fF
C1237 pd_1/R pd_1/DOWN 0.36fF
C1238 pd_0/DOWN pd_0/and_pd_0/Z1 0.07fF
C1239 pd_1/and_pd_0/Out1 pd_1/UP 0.33fF
C1240 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF
C1241 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/Out 0.11fF
C1242 divider_1/nor_0/Z1 divider_1/nor_0/B 0.06fF
C1243 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z1 0.71fF
C1244 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/mc2 0.33fF
C1245 divider_2/mc2 divider_2/and_0/A 0.16fF
C1246 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_1/Q 0.15fF
C1247 divider_2/prescaler_0/tspc_2/Z2 divider_2/and_0/OUT 0.06fF
C1248 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/a1 0.14fF
C1249 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF
C1250 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF
C1251 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/Z3 0.20fF
C1252 pd_1/tspc_r_0/z5 pd_1/DIV 0.04fF
C1253 divider_1/nor_1/A divider_1/tspc_1/Z2 0.15fF
C1254 ro_complete_0/a2 ro_complete_0/cbank_2/v 0.05fF
C1255 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/Z3 0.38fF
C1256 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_0/D 0.16fF
C1257 divider_2/nor_1/B divider_2/and_0/B 0.31fF
C1258 divider_2/tspc_1/Q divider_2/nor_0/B 0.22fF
C1259 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_2/D 0.32fF
C1260 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/clk 0.01fF
C1261 ro_complete_1/a2 ro_complete_1/cbank_2/v 0.05fF
C1262 ro_complete_1/a5 ro_complete_1/cbank_2/switch_0/vin 0.09fF
C1263 divbuf_6/OUT2 divbuf_6/OUT3 1.37fF
C1264 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Qbar1 0.38fF
C1265 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/D 0.09fF
C1266 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF
C1267 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z4 0.20fF
C1268 pd_1/REF pd_1/tspc_r_1/z5 0.04fF
C1269 pd_1/tspc_r_1/Z1 pd_1/tspc_r_1/Z2 0.71fF
C1270 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF
C1271 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.20fF
C1272 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/R 0.30fF
C1273 divider_2/tspc_0/Q divider_2/tspc_1/a_630_n680# 0.01fF
C1274 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Q 0.04fF
C1275 divider_2/nor_0/B divider_2/tspc_2/Z2 0.40fF
C1276 divider_2/tspc_2/a_630_n680# divider_2/Out 0.04fF
C1277 ro_complete_1/a1 ro_complete_1/cbank_2/v 0.05fF
C1278 divbuf_7/OUT5 divbuf_7/OUT 43.38fF
C1279 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/REF 0.12fF
C1280 divider_0/tspc_0/Z4 divider_0/tspc_0/a_630_n680# 0.12fF
C1281 divider_1/nor_1/Z1 divider_1/and_0/A 0.80fF
C1282 io_clamp_low[0] io_analog[4] 0.53fF
C1283 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF
C1284 divider_1/nor_1/A divider_1/and_0/B 0.08fF
C1285 divider_1/tspc_1/Q divider_1/tspc_2/a_630_n680# 0.01fF
C1286 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_0/Q 0.19fF
C1287 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/clk 0.14fF
C1288 divider_2/tspc_1/Z2 divider_2/tspc_1/Z3 0.16fF
C1289 divider_2/nor_1/B divider_2/tspc_1/Z4 0.21fF
C1290 divider_2/tspc_0/Z2 divider_2/tspc_0/Z4 0.36fF
C1291 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z4 0.08fF
C1292 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z3 0.05fF
C1293 ro_complete_0/a1 ro_complete_0/cbank_0/switch_3/vin 0.14fF
C1294 ro_complete_0/a3 ro_complete_0/cbank_0/switch_2/vin 0.09fF
C1295 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF
C1296 divider_0/nor_1/Z1 divider_0/and_0/B 0.18fF
C1297 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF
C1298 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.01fF
C1299 pd_1/R pd_1/REF 0.61fF
C1300 pd_0/R pd_0/UP 0.45fF
C1301 pd_0/tspc_r_1/Z4 pd_0/tspc_r_1/z5 0.04fF
C1302 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/Out 0.21fF
C1303 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z2 0.01fF
C1304 divider_1/prescaler_0/tspc_2/D divider_1/clk 0.29fF
C1305 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/a0 0.13fF
C1306 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar 0.02fF
C1307 divider_2/prescaler_0/tspc_2/Z4 divider_2/prescaler_0/tspc_2/D 0.11fF
C1308 ro_complete_0/a0 ro_complete_0/cbank_0/switch_5/vin 0.09fF
C1309 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z4 0.08fF
C1310 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF
C1311 pd_1/REF pd_1/tspc_r_1/Z3 0.65fF
C1312 pd_0/and_pd_0/Out1 pd_0/UP 0.33fF
C1313 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF
C1314 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF
C1315 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.78fF
C1316 divider_1/nor_1/A divider_1/tspc_1/Z4 0.02fF
C1317 divider_1/nor_1/B divider_1/tspc_1/Z3 0.38fF
C1318 divider_1/prescaler_0/tspc_1/Z2 divider_1/and_0/OUT 0.06fF
C1319 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z3 0.33fF
C1320 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/Qbar 0.01fF
C1321 divider_2/nor_0/Z1 divider_2/and_0/B 0.78fF
C1322 divider_1/and_0/out1 divider_1/and_0/A 0.01fF
C1323 ro_complete_1/cbank_1/switch_0/vin ro_complete_1/cbank_1/v 1.45fF
C1324 pll_full_0/cp_0/down pll_full_0/cp_0/upbar 0.02fF
C1325 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF
C1326 divbuf_7/a_492_n240# divbuf_7/OUT2 0.42fF
C1327 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
C1328 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/a_740_n680# 0.33fF
C1329 divider_0/tspc_0/Z3 divider_0/nor_1/A 0.38fF
C1330 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF
C1331 pd_0/tspc_r_0/Z2 pd_0/tspc_r_0/Z4 0.14fF
C1332 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF
C1333 divider_0/tspc_2/a_630_n680# divider_0/nor_0/B 0.35fF
C1334 divider_0/prescaler_0/tspc_0/Q divider_0/clk 0.05fF
C1335 divider_2/nor_1/Z1 divider_2/and_0/B 0.18fF
C1336 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/D 0.05fF
C1337 ro_complete_1/a2 ro_complete_1/cbank_0/switch_2/vin 0.14fF
C1338 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a4 0.09fF
C1339 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a5 0.09fF
C1340 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/switch_5/vin 0.20fF
C1341 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/a_492_n240# 0.00fF
C1342 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF
C1343 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z4 0.12fF
C1344 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF
C1345 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF
C1346 divider_0/nor_1/B divider_0/nor_1/A 1.21fF
C1347 divider_0/mc2 divider_0/and_0/B 0.20fF
C1348 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z4 0.14fF
C1349 pd_0/R pd_0/and_pd_0/Out1 0.33fF
C1350 pd_0/REF pd_0/tspc_r_1/Z4 0.02fF
C1351 divider_1/mc2 divider_1/and_0/out1 0.06fF
C1352 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/nor_0/B 0.47fF
C1353 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF
C1354 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF
C1355 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z3 0.33fF
C1356 ro_complete_0/a5 ro_complete_0/cbank_1/v 0.10fF
C1357 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF
C1358 ro_complete_1/a4 ro_complete_1/cbank_2/switch_1/vin 0.09fF
C1359 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/v 1.30fF
C1360 divider_2/tspc_1/Z3 divider_2/tspc_1/Z4 0.65fF
C1361 divbuf_5/a_492_n240# divbuf_5/OUT 0.00fF
C1362 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF
C1363 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/a_630_n680# 0.05fF
C1364 pll_full_0/ro_complete_0/a4 pll_full_0/divider_0/clk 0.11fF
C1365 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF
C1366 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.03fF
C1367 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF
C1368 divider_1/nor_1/B divider_1/tspc_1/Z2 0.30fF
C1369 divider_1/prescaler_0/tspc_1/Z4 divider_1/prescaler_0/tspc_2/a_740_n680# 0.01fF
C1370 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/A 0.01fF
C1371 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/nand_0/z1 0.07fF
C1372 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z3 0.05fF
C1373 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF
C1374 divider_2/tspc_1/Q divider_2/tspc_2/Z2 0.14fF
C1375 divider_2/prescaler_0/tspc_0/Q divider_2/prescaler_0/tspc_2/D 0.04fF
C1376 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/nand_1/z1 0.22fF
C1377 divbuf_6/OUT2 divbuf_6/OUT5 0.02fF
C1378 divbuf_6/OUT3 divbuf_6/OUT4 5.16fF
C1379 ro_complete_0/cbank_1/v ro_complete_0/cbank_0/v 1.27fF
C1380 pd_0/tspc_r_0/Qbar1 pd_0/DOWN 0.11fF
C1381 pd_0/DIV pd_0/tspc_r_0/Z1 0.17fF
C1382 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF
C1383 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/nor_1/A 0.01fF
C1384 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z1 0.03fF
C1385 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z3 0.05fF
C1386 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.15fF
C1387 pd_1/tspc_r_1/Qbar1 pd_1/tspc_r_1/z5 0.20fF
C1388 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_1/Q 0.15fF
C1389 divider_1/prescaler_0/tspc_2/Z2 divider_1/and_0/OUT 0.06fF
C1390 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z3 0.09fF
C1391 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z3 0.16fF
C1392 divider_2/prescaler_0/m1_2700_2190# divider_2/clk 0.01fF
C1393 ro_complete_1/cbank_1/switch_5/vin ro_complete_1/cbank_1/v 1.30fF
C1394 divider_2/tspc_2/Z1 divider_2/tspc_2/Z3 0.06fF
C1395 divider_2/nor_0/B divider_2/Out 0.22fF
C1396 io_clamp_low[1] io_clamp_high[1] 0.53fF
C1397 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/a_630_n680# 0.19fF
C1398 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.05fF
C1399 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF
C1400 pd_0/R pd_0/tspc_r_1/Z2 0.21fF
C1401 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/DIV 0.04fF
C1402 divider_1/prescaler_0/tspc_0/Z2 divider_1/clk 0.11fF
C1403 divider_1/mc2 divider_1/nor_0/B 0.15fF
Xpd_0 VDD gnd pd_0/REF pd_0/DIV pd_0/UP pd_0/DOWN pd_0/R pd
Xpd_1 VDD gnd pd_1/REF pd_1/DIV pd_1/UP pd_1/DOWN pd_1/R pd
Xcp_0 cp_0/vbias vdd gnd cp_0/out cp_0/down cp_0/upbar cp
Xfilter_0 gnd filter_0/v filter
Xro_complete_0 ro_complete_0/a0 ro_complete_0/a1 ro_complete_0/a5 ro_complete_0/a4
+ ro_complete_0/a3 ro_complete_0/a2 ro_complete
Xdivbuf_0 VDD divbuf_0/IN divbuf_0/OUT divbuf_0/OUT2 divbuf_0/OUT3 divbuf_0/OUT4 divbuf_0/OUT5
+ gnd divbuf
Xro_complete_1 ro_complete_1/a0 ro_complete_1/a1 ro_complete_1/a5 ro_complete_1/a4
+ ro_complete_1/a3 ro_complete_1/a2 ro_complete
Xdivbuf_1 VDD divbuf_1/IN divbuf_1/OUT divbuf_1/OUT2 divbuf_1/OUT3 divbuf_1/OUT4 divbuf_1/OUT5
+ gnd divbuf
Xdivbuf_2 VDD divbuf_2/IN divbuf_2/OUT divbuf_2/OUT2 divbuf_2/OUT3 divbuf_2/OUT4 divbuf_2/OUT5
+ gnd divbuf
Xdivbuf_3 VDD divbuf_3/IN divbuf_3/OUT divbuf_3/OUT2 divbuf_3/OUT3 divbuf_3/OUT4 divbuf_3/OUT5
+ gnd divbuf
Xdivbuf_4 VDD divbuf_4/IN divbuf_4/OUT divbuf_4/OUT2 divbuf_4/OUT3 divbuf_4/OUT4 divbuf_4/OUT5
+ gnd divbuf
Xdivbuf_5 VDD divbuf_5/IN divbuf_5/OUT divbuf_5/OUT2 divbuf_5/OUT3 divbuf_5/OUT4 divbuf_5/OUT5
+ gnd divbuf
Xdivbuf_6 VDD divbuf_6/IN divbuf_6/OUT divbuf_6/OUT2 divbuf_6/OUT3 divbuf_6/OUT4 divbuf_6/OUT5
+ gnd divbuf
Xdivbuf_7 VDD divbuf_7/IN divbuf_7/OUT divbuf_7/OUT2 divbuf_7/OUT3 divbuf_7/OUT4 divbuf_7/OUT5
+ gnd divbuf
Xdivider_0 gnd vdd divider_0/Out divider_0/clk divider_0/mc2 divider
Xdivider_1 gnd vdd divider_1/Out divider_1/clk divider_1/mc2 divider
Xdivider_2 gnd vdd divider_2/Out divider_2/clk divider_2/mc2 divider
Xpll_full_0 vdd pll_full
C1404 io_analog[4] vdd 43.96fF
C1405 io_analog[5] vdd 44.13fF
C1406 io_analog[6] vdd 43.46fF
C1407 io_in_3v3[0] vdd 0.61fF
C1408 io_oeb[26] vdd 0.61fF
C1409 io_in[0] vdd 0.61fF
C1410 io_out[26] vdd 0.61fF
C1411 io_out[0] vdd 0.61fF
C1412 io_in[26] vdd 0.61fF
C1413 io_oeb[0] vdd 0.61fF
C1414 io_in_3v3[26] vdd 0.61fF
C1415 io_in_3v3[1] vdd 0.61fF
C1416 io_oeb[25] vdd 0.61fF
C1417 io_in[1] vdd 0.61fF
C1418 io_out[25] vdd 0.61fF
C1419 io_out[1] vdd 0.61fF
C1420 io_in[25] vdd 0.61fF
C1421 io_oeb[1] vdd 0.61fF
C1422 io_in_3v3[25] vdd 0.61fF
C1423 io_in_3v3[2] vdd 0.61fF
C1424 io_oeb[24] vdd 0.61fF
C1425 io_in[2] vdd 0.61fF
C1426 io_out[24] vdd 0.61fF
C1427 io_out[2] vdd 0.61fF
C1428 io_in[24] vdd 0.61fF
C1429 io_oeb[2] vdd 0.61fF
C1430 io_in_3v3[24] vdd 0.61fF
C1431 io_in_3v3[3] vdd 0.61fF
C1432 gpio_noesd[17] vdd 2.32fF
C1433 io_in[3] vdd 0.61fF
C1434 gpio_analog[17] vdd 2.30fF
C1435 io_out[3] vdd 0.61fF
C1436 io_oeb[3] vdd 0.61fF
C1437 io_in_3v3[4] vdd 0.61fF
C1438 io_in[4] vdd 0.61fF
C1439 io_out[4] vdd 0.61fF
C1440 io_oeb[4] vdd 0.61fF
C1441 io_oeb[23] vdd 0.61fF
C1442 io_out[23] vdd 0.61fF
C1443 io_in[23] vdd 0.61fF
C1444 io_in_3v3[23] vdd 0.61fF
C1445 gpio_noesd[16] vdd 2.30fF
C1446 gpio_analog[16] vdd 2.30fF
C1447 io_in_3v3[5] vdd 0.61fF
C1448 io_in[5] vdd 0.61fF
C1449 io_out[5] vdd 0.61fF
C1450 io_oeb[5] vdd 0.61fF
C1451 io_oeb[22] vdd 0.61fF
C1452 io_out[22] vdd 0.61fF
C1453 io_in[22] vdd 0.61fF
C1454 io_in_3v3[22] vdd 0.61fF
C1455 gpio_noesd[15] vdd 2.31fF
C1456 gpio_analog[15] vdd 2.30fF
C1457 io_in_3v3[6] vdd 0.61fF
C1458 io_in[6] vdd 0.61fF
C1459 io_out[6] vdd 0.61fF
C1460 io_oeb[6] vdd 0.61fF
C1461 io_oeb[21] vdd 0.61fF
C1462 io_out[21] vdd 0.61fF
C1463 io_in[21] vdd 0.61fF
C1464 io_in_3v3[21] vdd 0.61fF
C1465 gpio_noesd[14] vdd 2.30fF
C1466 gpio_analog[14] vdd 2.29fF
C1467 vssa1 vdd 5997.40fF
C1468 vssd2 vdd 38.54fF
C1469 vssd1 vdd 13.04fF
C1470 vdda2 vdd 38.30fF
C1471 vdda1 vdd 4568.78fF
C1472 io_oeb[20] vdd 0.61fF
C1473 io_out[20] vdd 0.61fF
C1474 io_in[20] vdd 0.61fF
C1475 io_in_3v3[20] vdd 0.61fF
C1476 gpio_noesd[13] vdd 2.31fF
C1477 gpio_analog[13] vdd 2.30fF
C1478 gpio_analog[0] vdd 0.61fF
C1479 gpio_noesd[0] vdd 0.61fF
C1480 io_in_3v3[7] vdd 0.61fF
C1481 io_in[7] vdd 0.61fF
C1482 io_out[7] vdd 0.61fF
C1483 io_oeb[7] vdd 0.61fF
C1484 io_oeb[19] vdd 0.61fF
C1485 io_out[19] vdd 0.61fF
C1486 io_in[19] vdd 0.61fF
C1487 io_in_3v3[19] vdd 0.61fF
C1488 gpio_noesd[12] vdd 2.32fF
C1489 gpio_analog[12] vdd 2.30fF
C1490 gpio_analog[1] vdd 0.61fF
C1491 gpio_noesd[1] vdd 0.61fF
C1492 io_in_3v3[8] vdd 0.61fF
C1493 io_in[8] vdd 0.61fF
C1494 io_out[8] vdd 0.61fF
C1495 io_oeb[8] vdd 0.61fF
C1496 io_oeb[18] vdd 0.61fF
C1497 io_out[18] vdd 0.61fF
C1498 io_in[18] vdd 0.61fF
C1499 io_in_3v3[18] vdd 0.61fF
C1500 gpio_noesd[11] vdd 2.30fF
C1501 gpio_analog[11] vdd 2.29fF
C1502 gpio_analog[2] vdd 0.61fF
C1503 gpio_noesd[2] vdd 0.61fF
C1504 io_in_3v3[9] vdd 0.61fF
C1505 io_in[9] vdd 0.61fF
C1506 io_out[9] vdd 0.61fF
C1507 io_oeb[9] vdd 0.61fF
C1508 io_oeb[17] vdd 0.61fF
C1509 io_out[17] vdd 0.61fF
C1510 io_in[17] vdd 0.61fF
C1511 io_in_3v3[17] vdd 0.61fF
C1512 gpio_noesd[10] vdd 2.31fF
C1513 gpio_analog[10] vdd 2.29fF
C1514 gpio_analog[3] vdd 0.61fF
C1515 gpio_noesd[3] vdd 0.61fF
C1516 io_in_3v3[10] vdd 0.61fF
C1517 io_in[10] vdd 0.61fF
C1518 io_out[10] vdd 0.61fF
C1519 io_oeb[10] vdd 0.61fF
C1520 io_oeb[16] vdd 0.61fF
C1521 io_out[16] vdd 0.61fF
C1522 io_in[16] vdd 0.61fF
C1523 io_in_3v3[16] vdd 0.61fF
C1524 gpio_noesd[9] vdd 2.28fF
C1525 gpio_analog[9] vdd 2.28fF
C1526 gpio_analog[4] vdd 0.61fF
C1527 gpio_noesd[4] vdd 0.61fF
C1528 io_in_3v3[11] vdd 0.61fF
C1529 io_in[11] vdd 0.61fF
C1530 io_out[11] vdd 0.61fF
C1531 io_oeb[11] vdd 0.61fF
C1532 io_oeb[15] vdd 0.61fF
C1533 io_out[15] vdd 0.61fF
C1534 io_in[15] vdd 0.61fF
C1535 io_in_3v3[15] vdd 0.61fF
C1536 gpio_noesd[8] vdd 2.28fF
C1537 gpio_analog[8] vdd 2.26fF
C1538 gpio_analog[5] vdd 0.61fF
C1539 gpio_noesd[5] vdd 0.61fF
C1540 io_in_3v3[12] vdd 0.61fF
C1541 io_in[12] vdd 0.61fF
C1542 io_out[12] vdd 0.61fF
C1543 io_oeb[12] vdd 0.61fF
C1544 io_oeb[14] vdd 0.61fF
C1545 io_out[14] vdd 0.61fF
C1546 io_in[14] vdd 0.61fF
C1547 io_in_3v3[14] vdd 0.61fF
C1548 gpio_noesd[7] vdd 2.30fF
C1549 gpio_analog[7] vdd 2.28fF
C1550 vssa2 vdd 38.35fF
C1551 gpio_analog[6] vdd 5.71fF
C1552 gpio_noesd[6] vdd 5.70fF
C1553 io_in_3v3[13] vdd 0.61fF
C1554 io_in[13] vdd 0.61fF
C1555 io_out[13] vdd 0.61fF
C1556 io_oeb[13] vdd 0.61fF
C1557 vccd1 vdd 39.84fF
C1558 vccd2 vdd 38.46fF
C1559 io_analog[0] vdd 19.99fF
C1560 io_analog[10] vdd 19.36fF
C1561 io_analog[1] vdd 13.17fF
C1562 io_analog[2] vdd 12.57fF
C1563 io_analog[3] vdd 12.83fF
C1564 io_clamp_high[0] vdd 3.58fF
C1565 io_clamp_low[0] vdd 3.58fF
C1566 io_clamp_high[1] vdd 3.58fF
C1567 io_clamp_low[1] vdd 3.58fF
C1568 io_clamp_high[2] vdd 3.58fF
C1569 io_clamp_low[2] vdd 3.58fF
C1570 io_analog[7] vdd 12.74fF
C1571 io_analog[8] vdd 13.08fF
C1572 io_analog[9] vdd 13.08fF
C1573 user_irq[2] vdd 0.63fF
C1574 user_irq[1] vdd 0.63fF
C1575 user_irq[0] vdd 0.63fF
C1576 user_clock2 vdd 0.63fF
C1577 la_oenb[127] vdd 0.63fF
C1578 la_data_out[127] vdd 0.63fF
C1579 la_data_in[127] vdd 0.63fF
C1580 la_oenb[126] vdd 0.63fF
C1581 la_data_out[126] vdd 0.63fF
C1582 la_data_in[126] vdd 0.63fF
C1583 la_oenb[125] vdd 0.63fF
C1584 la_data_out[125] vdd 0.63fF
C1585 la_data_in[125] vdd 0.63fF
C1586 la_oenb[124] vdd 0.63fF
C1587 la_data_out[124] vdd 0.63fF
C1588 la_data_in[124] vdd 0.63fF
C1589 la_oenb[123] vdd 0.63fF
C1590 la_data_out[123] vdd 0.63fF
C1591 la_data_in[123] vdd 0.63fF
C1592 la_oenb[122] vdd 0.63fF
C1593 la_data_out[122] vdd 0.63fF
C1594 la_data_in[122] vdd 0.63fF
C1595 la_oenb[121] vdd 0.63fF
C1596 la_data_out[121] vdd 0.63fF
C1597 la_data_in[121] vdd 0.63fF
C1598 la_oenb[120] vdd 0.63fF
C1599 la_data_out[120] vdd 0.63fF
C1600 la_data_in[120] vdd 0.63fF
C1601 la_oenb[119] vdd 0.63fF
C1602 la_data_out[119] vdd 0.63fF
C1603 la_data_in[119] vdd 0.63fF
C1604 la_oenb[118] vdd 0.63fF
C1605 la_data_out[118] vdd 0.63fF
C1606 la_data_in[118] vdd 0.63fF
C1607 la_oenb[117] vdd 0.63fF
C1608 la_data_out[117] vdd 0.63fF
C1609 la_data_in[117] vdd 0.63fF
C1610 la_oenb[116] vdd 0.63fF
C1611 la_data_out[116] vdd 0.63fF
C1612 la_data_in[116] vdd 0.63fF
C1613 la_oenb[115] vdd 0.63fF
C1614 la_data_out[115] vdd 0.63fF
C1615 la_data_in[115] vdd 0.63fF
C1616 la_oenb[114] vdd 0.63fF
C1617 la_data_out[114] vdd 0.63fF
C1618 la_data_in[114] vdd 0.63fF
C1619 la_oenb[113] vdd 0.63fF
C1620 la_data_out[113] vdd 0.63fF
C1621 la_data_in[113] vdd 0.63fF
C1622 la_oenb[112] vdd 0.63fF
C1623 la_data_out[112] vdd 0.63fF
C1624 la_data_in[112] vdd 0.63fF
C1625 la_oenb[111] vdd 0.63fF
C1626 la_data_out[111] vdd 0.63fF
C1627 la_data_in[111] vdd 0.63fF
C1628 la_oenb[110] vdd 0.63fF
C1629 la_data_out[110] vdd 0.63fF
C1630 la_data_in[110] vdd 0.63fF
C1631 la_oenb[109] vdd 0.63fF
C1632 la_data_out[109] vdd 0.63fF
C1633 la_data_in[109] vdd 0.63fF
C1634 la_oenb[108] vdd 0.63fF
C1635 la_data_out[108] vdd 0.63fF
C1636 la_data_in[108] vdd 0.63fF
C1637 la_oenb[107] vdd 0.63fF
C1638 la_data_out[107] vdd 0.63fF
C1639 la_data_in[107] vdd 0.63fF
C1640 la_oenb[106] vdd 0.63fF
C1641 la_data_out[106] vdd 0.63fF
C1642 la_data_in[106] vdd 0.63fF
C1643 la_oenb[105] vdd 0.63fF
C1644 la_data_out[105] vdd 0.63fF
C1645 la_data_in[105] vdd 0.63fF
C1646 la_oenb[104] vdd 0.63fF
C1647 la_data_out[104] vdd 0.63fF
C1648 la_data_in[104] vdd 0.63fF
C1649 la_oenb[103] vdd 0.63fF
C1650 la_data_out[103] vdd 0.63fF
C1651 la_data_in[103] vdd 0.63fF
C1652 la_oenb[102] vdd 0.63fF
C1653 la_data_out[102] vdd 0.63fF
C1654 la_data_in[102] vdd 0.63fF
C1655 la_oenb[101] vdd 0.63fF
C1656 la_data_out[101] vdd 0.63fF
C1657 la_data_in[101] vdd 0.63fF
C1658 la_oenb[100] vdd 0.63fF
C1659 la_data_out[100] vdd 0.63fF
C1660 la_data_in[100] vdd 0.63fF
C1661 la_oenb[99] vdd 0.63fF
C1662 la_data_out[99] vdd 0.63fF
C1663 la_data_in[99] vdd 0.63fF
C1664 la_oenb[98] vdd 0.63fF
C1665 la_data_out[98] vdd 0.63fF
C1666 la_data_in[98] vdd 0.63fF
C1667 la_oenb[97] vdd 0.63fF
C1668 la_data_out[97] vdd 0.63fF
C1669 la_data_in[97] vdd 0.63fF
C1670 la_oenb[96] vdd 0.63fF
C1671 la_data_out[96] vdd 0.63fF
C1672 la_data_in[96] vdd 0.63fF
C1673 la_oenb[95] vdd 0.63fF
C1674 la_data_out[95] vdd 0.63fF
C1675 la_data_in[95] vdd 0.63fF
C1676 la_oenb[94] vdd 0.63fF
C1677 la_data_out[94] vdd 0.63fF
C1678 la_data_in[94] vdd 0.63fF
C1679 la_oenb[93] vdd 0.63fF
C1680 la_data_out[93] vdd 0.63fF
C1681 la_data_in[93] vdd 0.63fF
C1682 la_oenb[92] vdd 0.63fF
C1683 la_data_out[92] vdd 0.63fF
C1684 la_data_in[92] vdd 0.63fF
C1685 la_oenb[91] vdd 0.63fF
C1686 la_data_out[91] vdd 0.63fF
C1687 la_data_in[91] vdd 0.63fF
C1688 la_oenb[90] vdd 0.63fF
C1689 la_data_out[90] vdd 0.63fF
C1690 la_data_in[90] vdd 0.63fF
C1691 la_oenb[89] vdd 0.63fF
C1692 la_data_out[89] vdd 0.63fF
C1693 la_data_in[89] vdd 0.63fF
C1694 la_oenb[88] vdd 0.63fF
C1695 la_data_out[88] vdd 0.63fF
C1696 la_data_in[88] vdd 0.63fF
C1697 la_oenb[87] vdd 0.63fF
C1698 la_data_out[87] vdd 0.63fF
C1699 la_data_in[87] vdd 0.63fF
C1700 la_oenb[86] vdd 0.63fF
C1701 la_data_out[86] vdd 0.63fF
C1702 la_data_in[86] vdd 0.63fF
C1703 la_oenb[85] vdd 0.63fF
C1704 la_data_out[85] vdd 0.63fF
C1705 la_data_in[85] vdd 0.63fF
C1706 la_oenb[84] vdd 0.63fF
C1707 la_data_out[84] vdd 0.63fF
C1708 la_data_in[84] vdd 0.63fF
C1709 la_oenb[83] vdd 0.63fF
C1710 la_data_out[83] vdd 0.63fF
C1711 la_data_in[83] vdd 0.63fF
C1712 la_oenb[82] vdd 0.63fF
C1713 la_data_out[82] vdd 0.63fF
C1714 la_data_in[82] vdd 0.63fF
C1715 la_oenb[81] vdd 0.63fF
C1716 la_data_out[81] vdd 0.63fF
C1717 la_data_in[81] vdd 0.63fF
C1718 la_oenb[80] vdd 0.63fF
C1719 la_data_out[80] vdd 0.63fF
C1720 la_data_in[80] vdd 0.63fF
C1721 la_oenb[79] vdd 0.63fF
C1722 la_data_out[79] vdd 0.63fF
C1723 la_data_in[79] vdd 0.63fF
C1724 la_oenb[78] vdd 0.63fF
C1725 la_data_out[78] vdd 0.63fF
C1726 la_data_in[78] vdd 0.63fF
C1727 la_oenb[77] vdd 0.63fF
C1728 la_data_out[77] vdd 0.63fF
C1729 la_data_in[77] vdd 0.63fF
C1730 la_oenb[76] vdd 0.63fF
C1731 la_data_out[76] vdd 0.63fF
C1732 la_data_in[76] vdd 0.63fF
C1733 la_oenb[75] vdd 0.63fF
C1734 la_data_out[75] vdd 0.63fF
C1735 la_data_in[75] vdd 0.63fF
C1736 la_oenb[74] vdd 0.63fF
C1737 la_data_out[74] vdd 0.63fF
C1738 la_data_in[74] vdd 0.63fF
C1739 la_oenb[73] vdd 0.63fF
C1740 la_data_out[73] vdd 0.63fF
C1741 la_data_in[73] vdd 0.63fF
C1742 la_oenb[72] vdd 0.63fF
C1743 la_data_out[72] vdd 0.63fF
C1744 la_data_in[72] vdd 0.63fF
C1745 la_oenb[71] vdd 0.63fF
C1746 la_data_out[71] vdd 0.63fF
C1747 la_data_in[71] vdd 0.63fF
C1748 la_oenb[70] vdd 0.63fF
C1749 la_data_out[70] vdd 0.63fF
C1750 la_data_in[70] vdd 0.63fF
C1751 la_oenb[69] vdd 0.63fF
C1752 la_data_out[69] vdd 0.63fF
C1753 la_data_in[69] vdd 0.63fF
C1754 la_oenb[68] vdd 0.63fF
C1755 la_data_out[68] vdd 0.63fF
C1756 la_data_in[68] vdd 0.63fF
C1757 la_oenb[67] vdd 0.63fF
C1758 la_data_out[67] vdd 0.63fF
C1759 la_data_in[67] vdd 0.63fF
C1760 la_oenb[66] vdd 0.63fF
C1761 la_data_out[66] vdd 0.63fF
C1762 la_data_in[66] vdd 0.63fF
C1763 la_oenb[65] vdd 0.63fF
C1764 la_data_out[65] vdd 0.63fF
C1765 la_data_in[65] vdd 0.63fF
C1766 la_oenb[64] vdd 0.63fF
C1767 la_data_out[64] vdd 0.63fF
C1768 la_data_in[64] vdd 0.63fF
C1769 la_oenb[63] vdd 0.63fF
C1770 la_data_out[63] vdd 0.63fF
C1771 la_data_in[63] vdd 0.63fF
C1772 la_oenb[62] vdd 0.63fF
C1773 la_data_out[62] vdd 0.63fF
C1774 la_data_in[62] vdd 0.63fF
C1775 la_oenb[61] vdd 0.63fF
C1776 la_data_out[61] vdd 0.63fF
C1777 la_data_in[61] vdd 0.63fF
C1778 la_oenb[60] vdd 0.63fF
C1779 la_data_out[60] vdd 0.63fF
C1780 la_data_in[60] vdd 0.63fF
C1781 la_oenb[59] vdd 0.63fF
C1782 la_data_out[59] vdd 0.63fF
C1783 la_data_in[59] vdd 0.63fF
C1784 la_oenb[58] vdd 0.63fF
C1785 la_data_out[58] vdd 0.63fF
C1786 la_data_in[58] vdd 0.63fF
C1787 la_oenb[57] vdd 0.63fF
C1788 la_data_out[57] vdd 0.63fF
C1789 la_data_in[57] vdd 0.63fF
C1790 la_oenb[56] vdd 0.63fF
C1791 la_data_out[56] vdd 0.63fF
C1792 la_data_in[56] vdd 0.63fF
C1793 la_oenb[55] vdd 0.63fF
C1794 la_data_out[55] vdd 0.63fF
C1795 la_data_in[55] vdd 0.63fF
C1796 la_oenb[54] vdd 0.63fF
C1797 la_data_out[54] vdd 0.63fF
C1798 la_data_in[54] vdd 0.63fF
C1799 la_oenb[53] vdd 0.63fF
C1800 la_data_out[53] vdd 0.63fF
C1801 la_data_in[53] vdd 0.63fF
C1802 la_oenb[52] vdd 0.63fF
C1803 la_data_out[52] vdd 0.63fF
C1804 la_data_in[52] vdd 0.63fF
C1805 la_oenb[51] vdd 0.63fF
C1806 la_data_out[51] vdd 0.63fF
C1807 la_data_in[51] vdd 0.63fF
C1808 la_oenb[50] vdd 0.63fF
C1809 la_data_out[50] vdd 0.63fF
C1810 la_data_in[50] vdd 0.63fF
C1811 la_oenb[49] vdd 0.63fF
C1812 la_data_out[49] vdd 0.63fF
C1813 la_data_in[49] vdd 0.63fF
C1814 la_oenb[48] vdd 0.63fF
C1815 la_data_out[48] vdd 0.63fF
C1816 la_data_in[48] vdd 0.63fF
C1817 la_oenb[47] vdd 0.63fF
C1818 la_data_out[47] vdd 0.63fF
C1819 la_data_in[47] vdd 0.63fF
C1820 la_oenb[46] vdd 0.63fF
C1821 la_data_out[46] vdd 0.63fF
C1822 la_data_in[46] vdd 0.63fF
C1823 la_oenb[45] vdd 0.63fF
C1824 la_data_out[45] vdd 0.63fF
C1825 la_data_in[45] vdd 0.63fF
C1826 la_oenb[44] vdd 0.63fF
C1827 la_data_out[44] vdd 0.63fF
C1828 la_data_in[44] vdd 0.63fF
C1829 la_oenb[43] vdd 0.63fF
C1830 la_data_out[43] vdd 0.63fF
C1831 la_data_in[43] vdd 0.63fF
C1832 la_oenb[42] vdd 0.63fF
C1833 la_data_out[42] vdd 0.63fF
C1834 la_data_in[42] vdd 0.63fF
C1835 la_oenb[41] vdd 0.63fF
C1836 la_data_out[41] vdd 0.63fF
C1837 la_data_in[41] vdd 0.63fF
C1838 la_oenb[40] vdd 0.63fF
C1839 la_data_out[40] vdd 0.63fF
C1840 la_data_in[40] vdd 0.63fF
C1841 la_oenb[39] vdd 0.63fF
C1842 la_data_out[39] vdd 0.63fF
C1843 la_data_in[39] vdd 0.63fF
C1844 la_oenb[38] vdd 0.63fF
C1845 la_data_out[38] vdd 0.63fF
C1846 la_data_in[38] vdd 0.63fF
C1847 la_oenb[37] vdd 0.63fF
C1848 la_data_out[37] vdd 0.63fF
C1849 la_data_in[37] vdd 0.63fF
C1850 la_oenb[36] vdd 0.63fF
C1851 la_data_out[36] vdd 0.63fF
C1852 la_data_in[36] vdd 0.63fF
C1853 la_oenb[35] vdd 0.63fF
C1854 la_data_out[35] vdd 0.63fF
C1855 la_data_in[35] vdd 0.63fF
C1856 la_oenb[34] vdd 0.63fF
C1857 la_data_out[34] vdd 0.63fF
C1858 la_data_in[34] vdd 0.63fF
C1859 la_oenb[33] vdd 0.63fF
C1860 la_data_out[33] vdd 0.63fF
C1861 la_data_in[33] vdd 0.63fF
C1862 la_oenb[32] vdd 0.63fF
C1863 la_data_out[32] vdd 0.63fF
C1864 la_data_in[32] vdd 0.63fF
C1865 la_oenb[31] vdd 0.63fF
C1866 la_data_out[31] vdd 0.63fF
C1867 la_data_in[31] vdd 0.63fF
C1868 la_oenb[30] vdd 0.63fF
C1869 la_data_out[30] vdd 0.63fF
C1870 la_data_in[30] vdd 0.63fF
C1871 la_oenb[29] vdd 0.63fF
C1872 la_data_out[29] vdd 0.63fF
C1873 la_data_in[29] vdd 0.63fF
C1874 la_oenb[28] vdd 0.63fF
C1875 la_data_out[28] vdd 0.63fF
C1876 la_data_in[28] vdd 0.63fF
C1877 la_oenb[27] vdd 0.63fF
C1878 la_data_out[27] vdd 0.63fF
C1879 la_data_in[27] vdd 0.63fF
C1880 la_oenb[26] vdd 0.63fF
C1881 la_data_out[26] vdd 0.63fF
C1882 la_data_in[26] vdd 0.63fF
C1883 la_oenb[25] vdd 0.63fF
C1884 la_data_out[25] vdd 0.63fF
C1885 la_data_in[25] vdd 0.63fF
C1886 la_oenb[24] vdd 0.63fF
C1887 la_data_out[24] vdd 0.63fF
C1888 la_data_in[24] vdd 0.63fF
C1889 la_oenb[23] vdd 0.63fF
C1890 la_data_out[23] vdd 0.63fF
C1891 la_data_in[23] vdd 0.63fF
C1892 la_oenb[22] vdd 0.63fF
C1893 la_data_out[22] vdd 0.63fF
C1894 la_data_in[22] vdd 0.63fF
C1895 la_oenb[21] vdd 0.63fF
C1896 la_data_out[21] vdd 0.63fF
C1897 la_data_in[21] vdd 0.63fF
C1898 la_oenb[20] vdd 0.63fF
C1899 la_data_out[20] vdd 0.63fF
C1900 la_data_in[20] vdd 0.63fF
C1901 la_oenb[19] vdd 0.63fF
C1902 la_data_out[19] vdd 0.63fF
C1903 la_data_in[19] vdd 0.63fF
C1904 la_oenb[18] vdd 0.63fF
C1905 la_data_out[18] vdd 0.63fF
C1906 la_data_in[18] vdd 0.63fF
C1907 la_oenb[17] vdd 0.63fF
C1908 la_data_out[17] vdd 0.63fF
C1909 la_data_in[17] vdd 0.63fF
C1910 la_oenb[16] vdd 0.63fF
C1911 la_data_out[16] vdd 0.63fF
C1912 la_data_in[16] vdd 0.63fF
C1913 la_oenb[15] vdd 0.63fF
C1914 la_data_out[15] vdd 0.63fF
C1915 la_data_in[15] vdd 0.63fF
C1916 la_oenb[14] vdd 0.63fF
C1917 la_data_out[14] vdd 0.63fF
C1918 la_data_in[14] vdd 0.63fF
C1919 la_oenb[13] vdd 0.63fF
C1920 la_data_out[13] vdd 0.63fF
C1921 la_data_in[13] vdd 0.63fF
C1922 la_oenb[12] vdd 0.63fF
C1923 la_data_out[12] vdd 0.63fF
C1924 la_data_in[12] vdd 0.63fF
C1925 la_oenb[11] vdd 0.63fF
C1926 la_data_out[11] vdd 0.63fF
C1927 la_data_in[11] vdd 0.63fF
C1928 la_oenb[10] vdd 0.63fF
C1929 la_data_out[10] vdd 0.63fF
C1930 la_data_in[10] vdd 0.63fF
C1931 la_oenb[9] vdd 0.63fF
C1932 la_data_out[9] vdd 0.63fF
C1933 la_data_in[9] vdd 0.63fF
C1934 la_oenb[8] vdd 0.63fF
C1935 la_data_out[8] vdd 0.63fF
C1936 la_data_in[8] vdd 0.63fF
C1937 la_oenb[7] vdd 0.63fF
C1938 la_data_out[7] vdd 0.63fF
C1939 la_data_in[7] vdd 0.63fF
C1940 la_oenb[6] vdd 0.63fF
C1941 la_data_out[6] vdd 0.63fF
C1942 la_data_in[6] vdd 0.63fF
C1943 la_oenb[5] vdd 0.63fF
C1944 la_data_out[5] vdd 0.63fF
C1945 la_data_in[5] vdd 0.63fF
C1946 la_oenb[4] vdd 0.63fF
C1947 la_data_out[4] vdd 0.63fF
C1948 la_data_in[4] vdd 0.63fF
C1949 la_oenb[3] vdd 0.63fF
C1950 la_data_out[3] vdd 0.63fF
C1951 la_data_in[3] vdd 0.63fF
C1952 la_oenb[2] vdd 0.63fF
C1953 la_data_out[2] vdd 0.63fF
C1954 la_data_in[2] vdd 0.63fF
C1955 la_oenb[1] vdd 0.63fF
C1956 la_data_out[1] vdd 0.63fF
C1957 la_data_in[1] vdd 0.63fF
C1958 la_oenb[0] vdd 0.63fF
C1959 la_data_out[0] vdd 0.63fF
C1960 la_data_in[0] vdd 0.63fF
C1961 wbs_dat_o[31] vdd 0.63fF
C1962 wbs_dat_i[31] vdd 0.63fF
C1963 wbs_adr_i[31] vdd 0.63fF
C1964 wbs_dat_o[30] vdd 0.63fF
C1965 wbs_dat_i[30] vdd 0.63fF
C1966 wbs_adr_i[30] vdd 0.63fF
C1967 wbs_dat_o[29] vdd 0.63fF
C1968 wbs_dat_i[29] vdd 0.63fF
C1969 wbs_adr_i[29] vdd 0.63fF
C1970 wbs_dat_o[28] vdd 0.63fF
C1971 wbs_dat_i[28] vdd 0.63fF
C1972 wbs_adr_i[28] vdd 0.63fF
C1973 wbs_dat_o[27] vdd 0.63fF
C1974 wbs_dat_i[27] vdd 0.63fF
C1975 wbs_adr_i[27] vdd 0.63fF
C1976 wbs_dat_o[26] vdd 0.63fF
C1977 wbs_dat_i[26] vdd 0.63fF
C1978 wbs_adr_i[26] vdd 0.63fF
C1979 wbs_dat_o[25] vdd 0.63fF
C1980 wbs_dat_i[25] vdd 0.63fF
C1981 wbs_adr_i[25] vdd 0.63fF
C1982 wbs_dat_o[24] vdd 0.63fF
C1983 wbs_dat_i[24] vdd 0.63fF
C1984 wbs_adr_i[24] vdd 0.63fF
C1985 wbs_dat_o[23] vdd 0.63fF
C1986 wbs_dat_i[23] vdd 0.63fF
C1987 wbs_adr_i[23] vdd 0.63fF
C1988 wbs_dat_o[22] vdd 0.63fF
C1989 wbs_dat_i[22] vdd 0.63fF
C1990 wbs_adr_i[22] vdd 0.63fF
C1991 wbs_dat_o[21] vdd 0.63fF
C1992 wbs_dat_i[21] vdd 0.63fF
C1993 wbs_adr_i[21] vdd 0.63fF
C1994 wbs_dat_o[20] vdd 0.63fF
C1995 wbs_dat_i[20] vdd 0.63fF
C1996 wbs_adr_i[20] vdd 0.63fF
C1997 wbs_dat_o[19] vdd 0.63fF
C1998 wbs_dat_i[19] vdd 0.63fF
C1999 wbs_adr_i[19] vdd 0.63fF
C2000 wbs_dat_o[18] vdd 0.63fF
C2001 wbs_dat_i[18] vdd 0.63fF
C2002 wbs_adr_i[18] vdd 0.63fF
C2003 wbs_dat_o[17] vdd 0.63fF
C2004 wbs_dat_i[17] vdd 0.63fF
C2005 wbs_adr_i[17] vdd 0.63fF
C2006 wbs_dat_o[16] vdd 0.63fF
C2007 wbs_dat_i[16] vdd 0.63fF
C2008 wbs_adr_i[16] vdd 0.63fF
C2009 wbs_dat_o[15] vdd 0.63fF
C2010 wbs_dat_i[15] vdd 0.63fF
C2011 wbs_adr_i[15] vdd 0.63fF
C2012 wbs_dat_o[14] vdd 0.63fF
C2013 wbs_dat_i[14] vdd 0.63fF
C2014 wbs_adr_i[14] vdd 0.63fF
C2015 wbs_dat_o[13] vdd 0.63fF
C2016 wbs_dat_i[13] vdd 0.63fF
C2017 wbs_adr_i[13] vdd 0.63fF
C2018 wbs_dat_o[12] vdd 0.63fF
C2019 wbs_dat_i[12] vdd 0.63fF
C2020 wbs_adr_i[12] vdd 0.63fF
C2021 wbs_dat_o[11] vdd 0.63fF
C2022 wbs_dat_i[11] vdd 0.63fF
C2023 wbs_adr_i[11] vdd 0.63fF
C2024 wbs_dat_o[10] vdd 0.63fF
C2025 wbs_dat_i[10] vdd 0.63fF
C2026 wbs_adr_i[10] vdd 0.63fF
C2027 wbs_dat_o[9] vdd 0.63fF
C2028 wbs_dat_i[9] vdd 0.63fF
C2029 wbs_adr_i[9] vdd 0.63fF
C2030 wbs_dat_o[8] vdd 0.63fF
C2031 wbs_dat_i[8] vdd 0.63fF
C2032 wbs_adr_i[8] vdd 0.63fF
C2033 wbs_dat_o[7] vdd 0.63fF
C2034 wbs_dat_i[7] vdd 0.63fF
C2035 wbs_adr_i[7] vdd 0.63fF
C2036 wbs_dat_o[6] vdd 0.63fF
C2037 wbs_dat_i[6] vdd 0.63fF
C2038 wbs_adr_i[6] vdd 0.63fF
C2039 wbs_dat_o[5] vdd 0.63fF
C2040 wbs_dat_i[5] vdd 0.63fF
C2041 wbs_adr_i[5] vdd 0.63fF
C2042 wbs_dat_o[4] vdd 0.63fF
C2043 wbs_dat_i[4] vdd 0.63fF
C2044 wbs_adr_i[4] vdd 0.63fF
C2045 wbs_sel_i[3] vdd 0.63fF
C2046 wbs_dat_o[3] vdd 0.63fF
C2047 wbs_dat_i[3] vdd 0.63fF
C2048 wbs_adr_i[3] vdd 0.63fF
C2049 wbs_sel_i[2] vdd 0.63fF
C2050 wbs_dat_o[2] vdd 0.63fF
C2051 wbs_dat_i[2] vdd 0.63fF
C2052 wbs_adr_i[2] vdd 0.63fF
C2053 wbs_sel_i[1] vdd 0.63fF
C2054 wbs_dat_o[1] vdd 0.63fF
C2055 wbs_dat_i[1] vdd 0.63fF
C2056 wbs_adr_i[1] vdd 0.63fF
C2057 wbs_sel_i[0] vdd 0.63fF
C2058 wbs_dat_o[0] vdd 0.63fF
C2059 wbs_dat_i[0] vdd 0.63fF
C2060 wbs_adr_i[0] vdd 0.63fF
C2061 wbs_we_i vdd 0.63fF
C2062 wbs_stb_i vdd 0.63fF
C2063 wbs_cyc_i vdd 0.63fF
C2064 wbs_ack_o vdd 0.63fF
C2065 wb_rst_i vdd 0.63fF
C2066 wb_clk_i vdd 0.63fF
C2067 pll_full_0/divider_0/and_0/Z1 vdd 0.65fF
C2068 pll_full_0/divider_0/and_0/B vdd 2.45fF
C2069 pll_full_0/divider_0/and_0/A vdd 2.35fF
C2070 pll_full_0/divider_0/and_0/out1 vdd 2.99fF
C2071 pll_full_0/divider_0/tspc_2/Z4 vdd 0.86fF
C2072 pll_full_0/divbuf_0/IN vdd 9.95fF
C2073 pll_full_0/divider_0/tspc_2/Z3 vdd 2.26fF
C2074 pll_full_0/divider_0/tspc_2/Z2 vdd 1.46fF
C2075 pll_full_0/divider_0/tspc_2/Z1 vdd 0.99fF
C2076 pll_full_0/divider_0/nor_0/B vdd 6.48fF
C2077 pll_full_0/divider_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING
C2078 pll_full_0/divider_0/tspc_1/Z4 vdd 0.86fF
C2079 pll_full_0/divider_0/tspc_1/Q vdd 3.12fF
C2080 pll_full_0/divider_0/tspc_1/Z3 vdd 2.26fF
C2081 pll_full_0/divider_0/tspc_1/Z2 vdd 1.46fF
C2082 pll_full_0/divider_0/tspc_1/Z1 vdd 0.99fF
C2083 pll_full_0/divider_0/nor_1/B vdd 7.12fF
C2084 pll_full_0/divider_0/tspc_1/a_630_n680# vdd 1.15fF **FLOATING
C2085 pll_full_0/divider_0/tspc_0/Z4 vdd 0.86fF
C2086 pll_full_0/divider_0/tspc_0/Q vdd 3.14fF
C2087 pll_full_0/divider_0/tspc_0/Z3 vdd 2.26fF
C2088 pll_full_0/divider_0/tspc_0/Z2 vdd 1.46fF
C2089 pll_full_0/divider_0/tspc_0/Z1 vdd 0.99fF
C2090 pll_full_0/divider_0/nor_1/A vdd 7.08fF
C2091 pll_full_0/divider_0/tspc_0/a_630_n680# vdd 1.15fF **FLOATING
C2092 pll_full_0/divider_0/clk vdd 31.85fF
C2093 pll_full_0/divider_0/prescaler_0/Out vdd 4.59fF
C2094 pll_full_0/divider_0/prescaler_0/nand_1/z1 vdd 0.36fF
C2095 pll_full_0/divider_0/prescaler_0/tspc_2/D vdd 2.64fF
C2096 pll_full_0/divider_0/prescaler_0/tspc_0/Q vdd 3.64fF
C2097 pll_full_0/divider_0/prescaler_0/tspc_1/Q vdd 3.61fF
C2098 pll_full_0/divider_0/prescaler_0/nand_0/z1 vdd 0.36fF
C2099 pll_full_0/divider_0/prescaler_0/tspc_0/D vdd 3.12fF
C2100 pll_full_0/divider_0/and_0/OUT vdd 5.67fF
C2101 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 vdd 0.86fF
C2102 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 vdd 2.26fF
C2103 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 vdd 1.46fF
C2104 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 vdd 0.99fF
C2105 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# vdd 1.16fF **FLOATING
C2106 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# vdd 2.11fF **FLOATING
C2107 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 vdd 0.86fF
C2108 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 vdd 2.26fF
C2109 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 vdd 1.48fF
C2110 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 vdd 0.99fF
C2111 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# vdd 1.14fF **FLOATING
C2112 pll_full_0/divider_0/prescaler_0/m1_2700_2190# vdd 4.22fF **FLOATING
C2113 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 vdd 0.86fF
C2114 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 vdd 2.26fF
C2115 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 vdd 1.19fF
C2116 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 vdd 0.99fF
C2117 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# vdd 1.47fF **FLOATING
C2118 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# vdd 2.11fF **FLOATING
C2119 pll_full_0/divider_0/nor_1/Z1 vdd 1.34fF
C2120 pll_full_0/divider_0/nor_0/Z1 vdd 1.34fF
C2121 pll_full_0/divbuf_1/OUT vdd 363.82fF
C2122 pll_full_0/divbuf_1/OUT5 vdd 350.37fF
C2123 pll_full_0/divbuf_1/OUT4 vdd 133.72fF
C2124 pll_full_0/divbuf_1/OUT3 vdd 34.03fF
C2125 pll_full_0/divbuf_1/OUT2 vdd 8.71fF
C2126 pll_full_0/divbuf_1/a_492_n240# vdd 2.46fF **FLOATING
C2127 pll_full_0/divbuf_0/OUT5 vdd 350.37fF
C2128 pll_full_0/divbuf_0/OUT4 vdd 133.72fF
C2129 pll_full_0/divbuf_0/OUT3 vdd 34.03fF
C2130 pll_full_0/divbuf_0/OUT2 vdd 8.71fF
C2131 pll_full_0/divbuf_0/a_492_n240# vdd 2.46fF **FLOATING
C2132 pll_full_0/ro_complete_0/cbank_2/v vdd 17.88fF
C2133 pll_full_0/ro_complete_0/cbank_2/switch_5/vin vdd 0.78fF
C2134 pll_full_0/ro_complete_0/cbank_2/switch_4/vin vdd 1.50fF
C2135 pll_full_0/ro_complete_0/cbank_2/switch_2/vin vdd 1.30fF
C2136 pll_full_0/ro_complete_0/cbank_2/switch_3/vin vdd 0.56fF
C2137 pll_full_0/ro_complete_0/cbank_2/switch_1/vin vdd 1.14fF
C2138 pll_full_0/ro_complete_0/cbank_2/switch_0/vin vdd 1.02fF
C2139 pll_full_0/ro_complete_0/cbank_1/switch_5/vin vdd 0.78fF
C2140 pll_full_0/ro_complete_0/a0 vdd 7.88fF
C2141 pll_full_0/ro_complete_0/cbank_1/switch_4/vin vdd 1.50fF
C2142 pll_full_0/ro_complete_0/a1 vdd 5.39fF
C2143 pll_full_0/ro_complete_0/cbank_1/switch_2/vin vdd 1.30fF
C2144 pll_full_0/ro_complete_0/a3 vdd 6.85fF
C2145 pll_full_0/ro_complete_0/cbank_1/switch_3/vin vdd 0.56fF
C2146 pll_full_0/ro_complete_0/a2 vdd 5.48fF
C2147 pll_full_0/ro_complete_0/cbank_1/switch_1/vin vdd 1.14fF
C2148 pll_full_0/ro_complete_0/a4 vdd 5.36fF
C2149 pll_full_0/ro_complete_0/cbank_1/switch_0/vin vdd 1.02fF
C2150 pll_full_0/ro_complete_0/a5 vdd 5.19fF
C2151 pll_full_0/ro_complete_0/cbank_0/v vdd 15.02fF
C2152 pll_full_0/ro_complete_0/cbank_0/switch_5/vin vdd 0.78fF
C2153 pll_full_0/ro_complete_0/cbank_0/switch_4/vin vdd 1.50fF
C2154 pll_full_0/ro_complete_0/cbank_0/switch_2/vin vdd 1.30fF
C2155 pll_full_0/ro_complete_0/cbank_0/switch_3/vin vdd 0.56fF
C2156 pll_full_0/ro_complete_0/cbank_0/switch_1/vin vdd 1.14fF
C2157 pll_full_0/ro_complete_0/cbank_0/switch_0/vin vdd 1.02fF
C2158 pll_full_0/ro_complete_0/ro_var_extend_0/vcont vdd 0.27fF
C2159 pll_full_0/filter_0/a_4216_n5230# vdd 419.25fF **FLOATING
C2160 pll_full_0/filter_0/a_4216_n2998# vdd 1.39fF **FLOATING
C2161 pll_full_0/cp_0/down vdd 1.54fF
C2162 pll_full_0/cp_0/upbar vdd 1.79fF
C2163 pll_full_0/cp_0/a_7110_n2840# vdd 0.17fF **FLOATING
C2164 pll_full_0/cp_0/a_3060_n2840# vdd 1.71fF **FLOATING
C2165 pll_full_0/cp_0/a_7110_0# vdd 0.17fF **FLOATING
C2166 pll_full_0/cp_0/a_6370_0# vdd 0.40fF **FLOATING
C2167 pll_full_0/cp_0/a_3060_0# vdd 2.49fF **FLOATING
C2168 pll_full_0/cp_0/a_1710_0# vdd 7.47fF **FLOATING
C2169 pll_full_0/pd_0/UP vdd 6.61fF
C2170 pll_full_0/pd_0/and_pd_0/Z1 vdd 0.39fF
C2171 pll_full_0/pd_0/and_pd_0/Out1 vdd 2.22fF
C2172 pll_full_0/pd_0/tspc_r_1/z5 vdd 1.10fF
C2173 pll_full_0/pd_0/tspc_r_1/Z4 vdd 1.07fF
C2174 pll_full_0/pd_0/tspc_r_1/Qbar vdd 0.88fF
C2175 pll_full_0/pd_0/tspc_r_1/Z2 vdd 1.22fF
C2176 pll_full_0/pd_0/tspc_r_1/Z1 vdd 0.67fF
C2177 pll_full_0/pd_0/tspc_r_1/Qbar1 vdd 1.34fF
C2178 pll_full_0/pd_0/tspc_r_1/Z3 vdd 2.12fF
C2179 pll_full_0/pd_0/REF vdd 6.44fF
C2180 pll_full_0/pd_0/tspc_r_0/z5 vdd 1.10fF
C2181 pll_full_0/pd_0/tspc_r_0/Z4 vdd 1.07fF
C2182 pll_full_0/pd_0/R vdd 3.05fF
C2183 pll_full_0/pd_0/tspc_r_0/Qbar vdd 0.79fF
C2184 pll_full_0/pd_0/tspc_r_0/Z2 vdd 1.22fF
C2185 pll_full_0/pd_0/tspc_r_0/Z1 vdd 0.67fF
C2186 pll_full_0/pd_0/DOWN vdd 7.24fF
C2187 pll_full_0/pd_0/tspc_r_0/Qbar1 vdd 1.34fF
C2188 pll_full_0/pd_0/tspc_r_0/Z3 vdd 2.12fF
C2189 pll_full_0/pd_0/DIV vdd 371.87fF
C2190 divider_2/and_0/Z1 vdd 0.74fF
C2191 divider_2/and_0/B vdd 2.25fF
C2192 divider_2/and_0/A vdd 2.19fF
C2193 divider_2/and_0/out1 vdd 2.93fF
C2194 divider_2/tspc_2/Z4 vdd 0.86fF
C2195 divider_2/Out vdd 1.60fF
C2196 divider_2/tspc_2/Z3 vdd 2.26fF
C2197 divider_2/tspc_2/Z2 vdd 1.46fF
C2198 divider_2/tspc_2/Z1 vdd 0.99fF
C2199 divider_2/nor_0/B vdd 6.33fF
C2200 divider_2/tspc_2/a_630_n680# vdd 1.14fF **FLOATING
C2201 divider_2/tspc_1/Z4 vdd 0.86fF
C2202 divider_2/tspc_1/Q vdd 3.12fF
C2203 divider_2/tspc_1/Z3 vdd 2.26fF
C2204 divider_2/tspc_1/Z2 vdd 1.46fF
C2205 divider_2/tspc_1/Z1 vdd 0.99fF
C2206 divider_2/nor_1/B vdd 7.05fF
C2207 divider_2/tspc_1/a_630_n680# vdd 1.15fF **FLOATING
C2208 divider_2/tspc_0/Z4 vdd 0.86fF
C2209 divider_2/tspc_0/Q vdd 3.14fF
C2210 divider_2/tspc_0/Z3 vdd 2.26fF
C2211 divider_2/tspc_0/Z2 vdd 1.46fF
C2212 divider_2/tspc_0/Z1 vdd 0.99fF
C2213 divider_2/nor_1/A vdd 7.04fF
C2214 divider_2/tspc_0/a_630_n680# vdd 1.15fF **FLOATING
C2215 divider_2/clk vdd 5.63fF
C2216 divider_2/prescaler_0/Out vdd 4.59fF
C2217 divider_2/prescaler_0/nand_1/z1 vdd 0.36fF
C2218 divider_2/prescaler_0/tspc_2/D vdd 2.64fF
C2219 divider_2/prescaler_0/tspc_0/Q vdd 3.64fF
C2220 divider_2/prescaler_0/tspc_1/Q vdd 3.61fF
C2221 divider_2/prescaler_0/nand_0/z1 vdd 0.36fF
C2222 divider_2/prescaler_0/tspc_0/D vdd 3.12fF
C2223 divider_2/and_0/OUT vdd 5.62fF
C2224 divider_2/prescaler_0/tspc_2/Z4 vdd 0.86fF
C2225 divider_2/prescaler_0/tspc_2/Z3 vdd 2.26fF
C2226 divider_2/prescaler_0/tspc_2/Z2 vdd 1.46fF
C2227 divider_2/prescaler_0/tspc_2/Z1 vdd 0.99fF
C2228 divider_2/prescaler_0/tspc_2/a_630_n680# vdd 1.16fF **FLOATING
C2229 divider_2/prescaler_0/tspc_2/a_740_n680# vdd 2.11fF **FLOATING
C2230 divider_2/prescaler_0/tspc_1/Z4 vdd 0.86fF
C2231 divider_2/prescaler_0/tspc_1/Z3 vdd 2.26fF
C2232 divider_2/prescaler_0/tspc_1/Z2 vdd 1.48fF
C2233 divider_2/prescaler_0/tspc_1/Z1 vdd 0.99fF
C2234 divider_2/prescaler_0/tspc_1/a_630_n680# vdd 1.14fF **FLOATING
C2235 divider_2/prescaler_0/m1_2700_2190# vdd 4.22fF **FLOATING
C2236 divider_2/prescaler_0/tspc_0/Z4 vdd 0.86fF
C2237 divider_2/prescaler_0/tspc_0/Z3 vdd 2.26fF
C2238 divider_2/prescaler_0/tspc_0/Z2 vdd 1.46fF
C2239 divider_2/prescaler_0/tspc_0/Z1 vdd 0.99fF
C2240 divider_2/prescaler_0/tspc_0/a_630_n680# vdd 1.14fF **FLOATING
C2241 divider_2/prescaler_0/tspc_0/a_740_n680# vdd 2.11fF **FLOATING
C2242 divider_2/nor_1/Z1 vdd 1.34fF
C2243 divider_2/nor_0/Z1 vdd 1.34fF
C2244 divider_2/mc2 vdd 5.29fF
C2245 divider_1/and_0/Z1 vdd 0.74fF
C2246 divider_1/and_0/B vdd 2.25fF
C2247 divider_1/and_0/A vdd 2.19fF
C2248 divider_1/and_0/out1 vdd 2.93fF
C2249 divider_1/tspc_2/Z4 vdd 0.86fF
C2250 divider_1/Out vdd 1.60fF
C2251 divider_1/tspc_2/Z3 vdd 2.26fF
C2252 divider_1/tspc_2/Z2 vdd 1.46fF
C2253 divider_1/tspc_2/Z1 vdd 0.99fF
C2254 divider_1/nor_0/B vdd 6.33fF
C2255 divider_1/tspc_2/a_630_n680# vdd 1.14fF **FLOATING
C2256 divider_1/tspc_1/Z4 vdd 0.86fF
C2257 divider_1/tspc_1/Q vdd 3.12fF
C2258 divider_1/tspc_1/Z3 vdd 2.26fF
C2259 divider_1/tspc_1/Z2 vdd 1.46fF
C2260 divider_1/tspc_1/Z1 vdd 0.99fF
C2261 divider_1/nor_1/B vdd 7.05fF
C2262 divider_1/tspc_1/a_630_n680# vdd 1.15fF **FLOATING
C2263 divider_1/tspc_0/Z4 vdd 0.86fF
C2264 divider_1/tspc_0/Q vdd 3.14fF
C2265 divider_1/tspc_0/Z3 vdd 2.26fF
C2266 divider_1/tspc_0/Z2 vdd 1.46fF
C2267 divider_1/tspc_0/Z1 vdd 0.99fF
C2268 divider_1/nor_1/A vdd 7.04fF
C2269 divider_1/tspc_0/a_630_n680# vdd 1.15fF **FLOATING
C2270 divider_1/clk vdd 5.63fF
C2271 divider_1/prescaler_0/Out vdd 4.59fF
C2272 divider_1/prescaler_0/nand_1/z1 vdd 0.36fF
C2273 divider_1/prescaler_0/tspc_2/D vdd 2.64fF
C2274 divider_1/prescaler_0/tspc_0/Q vdd 3.64fF
C2275 divider_1/prescaler_0/tspc_1/Q vdd 3.61fF
C2276 divider_1/prescaler_0/nand_0/z1 vdd 0.36fF
C2277 divider_1/prescaler_0/tspc_0/D vdd 3.12fF
C2278 divider_1/and_0/OUT vdd 5.62fF
C2279 divider_1/prescaler_0/tspc_2/Z4 vdd 0.86fF
C2280 divider_1/prescaler_0/tspc_2/Z3 vdd 2.26fF
C2281 divider_1/prescaler_0/tspc_2/Z2 vdd 1.46fF
C2282 divider_1/prescaler_0/tspc_2/Z1 vdd 0.99fF
C2283 divider_1/prescaler_0/tspc_2/a_630_n680# vdd 1.16fF **FLOATING
C2284 divider_1/prescaler_0/tspc_2/a_740_n680# vdd 2.11fF **FLOATING
C2285 divider_1/prescaler_0/tspc_1/Z4 vdd 0.86fF
C2286 divider_1/prescaler_0/tspc_1/Z3 vdd 2.26fF
C2287 divider_1/prescaler_0/tspc_1/Z2 vdd 1.48fF
C2288 divider_1/prescaler_0/tspc_1/Z1 vdd 0.99fF
C2289 divider_1/prescaler_0/tspc_1/a_630_n680# vdd 1.14fF **FLOATING
C2290 divider_1/prescaler_0/m1_2700_2190# vdd 4.22fF **FLOATING
C2291 divider_1/prescaler_0/tspc_0/Z4 vdd 0.86fF
C2292 divider_1/prescaler_0/tspc_0/Z3 vdd 2.26fF
C2293 divider_1/prescaler_0/tspc_0/Z2 vdd 1.46fF
C2294 divider_1/prescaler_0/tspc_0/Z1 vdd 0.99fF
C2295 divider_1/prescaler_0/tspc_0/a_630_n680# vdd 1.14fF **FLOATING
C2296 divider_1/prescaler_0/tspc_0/a_740_n680# vdd 2.11fF **FLOATING
C2297 divider_1/nor_1/Z1 vdd 1.34fF
C2298 divider_1/nor_0/Z1 vdd 1.34fF
C2299 divider_1/mc2 vdd 5.29fF
C2300 divider_0/and_0/Z1 vdd 0.74fF
C2301 divider_0/and_0/B vdd 2.25fF
C2302 divider_0/and_0/A vdd 2.19fF
C2303 divider_0/and_0/out1 vdd 2.93fF
C2304 divider_0/tspc_2/Z4 vdd 0.86fF
C2305 divider_0/Out vdd 1.60fF
C2306 divider_0/tspc_2/Z3 vdd 2.26fF
C2307 divider_0/tspc_2/Z2 vdd 1.46fF
C2308 divider_0/tspc_2/Z1 vdd 0.99fF
C2309 divider_0/nor_0/B vdd 6.33fF
C2310 divider_0/tspc_2/a_630_n680# vdd 1.14fF **FLOATING
C2311 divider_0/tspc_1/Z4 vdd 0.86fF
C2312 divider_0/tspc_1/Q vdd 3.12fF
C2313 divider_0/tspc_1/Z3 vdd 2.26fF
C2314 divider_0/tspc_1/Z2 vdd 1.46fF
C2315 divider_0/tspc_1/Z1 vdd 0.99fF
C2316 divider_0/nor_1/B vdd 7.05fF
C2317 divider_0/tspc_1/a_630_n680# vdd 1.15fF **FLOATING
C2318 divider_0/tspc_0/Z4 vdd 0.86fF
C2319 divider_0/tspc_0/Q vdd 3.14fF
C2320 divider_0/tspc_0/Z3 vdd 2.26fF
C2321 divider_0/tspc_0/Z2 vdd 1.46fF
C2322 divider_0/tspc_0/Z1 vdd 0.99fF
C2323 divider_0/nor_1/A vdd 7.04fF
C2324 divider_0/tspc_0/a_630_n680# vdd 1.15fF **FLOATING
C2325 divider_0/clk vdd 5.63fF
C2326 divider_0/prescaler_0/Out vdd 4.59fF
C2327 divider_0/prescaler_0/nand_1/z1 vdd 0.36fF
C2328 divider_0/prescaler_0/tspc_2/D vdd 2.64fF
C2329 divider_0/prescaler_0/tspc_0/Q vdd 3.64fF
C2330 divider_0/prescaler_0/tspc_1/Q vdd 3.61fF
C2331 divider_0/prescaler_0/nand_0/z1 vdd 0.36fF
C2332 divider_0/prescaler_0/tspc_0/D vdd 3.12fF
C2333 divider_0/and_0/OUT vdd 5.62fF
C2334 divider_0/prescaler_0/tspc_2/Z4 vdd 0.86fF
C2335 divider_0/prescaler_0/tspc_2/Z3 vdd 2.26fF
C2336 divider_0/prescaler_0/tspc_2/Z2 vdd 1.46fF
C2337 divider_0/prescaler_0/tspc_2/Z1 vdd 0.99fF
C2338 divider_0/prescaler_0/tspc_2/a_630_n680# vdd 1.16fF **FLOATING
C2339 divider_0/prescaler_0/tspc_2/a_740_n680# vdd 2.11fF **FLOATING
C2340 divider_0/prescaler_0/tspc_1/Z4 vdd 0.86fF
C2341 divider_0/prescaler_0/tspc_1/Z3 vdd 2.26fF
C2342 divider_0/prescaler_0/tspc_1/Z2 vdd 1.48fF
C2343 divider_0/prescaler_0/tspc_1/Z1 vdd 0.99fF
C2344 divider_0/prescaler_0/tspc_1/a_630_n680# vdd 1.14fF **FLOATING
C2345 divider_0/prescaler_0/m1_2700_2190# vdd 4.22fF **FLOATING
C2346 divider_0/prescaler_0/tspc_0/Z4 vdd 0.86fF
C2347 divider_0/prescaler_0/tspc_0/Z3 vdd 2.26fF
C2348 divider_0/prescaler_0/tspc_0/Z2 vdd 1.46fF
C2349 divider_0/prescaler_0/tspc_0/Z1 vdd 0.99fF
C2350 divider_0/prescaler_0/tspc_0/a_630_n680# vdd 1.14fF **FLOATING
C2351 divider_0/prescaler_0/tspc_0/a_740_n680# vdd 2.11fF **FLOATING
C2352 divider_0/nor_1/Z1 vdd 1.34fF
C2353 divider_0/nor_0/Z1 vdd 1.34fF
C2354 divider_0/mc2 vdd 5.29fF
C2355 divbuf_7/OUT vdd 363.82fF
C2356 divbuf_7/OUT5 vdd 350.37fF
C2357 divbuf_7/OUT4 vdd 133.72fF
C2358 divbuf_7/OUT3 vdd 34.03fF
C2359 divbuf_7/OUT2 vdd 8.71fF
C2360 divbuf_7/IN vdd 0.89fF
C2361 divbuf_7/a_492_n240# vdd 2.46fF **FLOATING
C2362 divbuf_6/OUT vdd 363.82fF
C2363 divbuf_6/OUT5 vdd 350.37fF
C2364 divbuf_6/OUT4 vdd 133.72fF
C2365 divbuf_6/OUT3 vdd 34.03fF
C2366 divbuf_6/OUT2 vdd 8.71fF
C2367 divbuf_6/IN vdd 0.89fF
C2368 divbuf_6/a_492_n240# vdd 2.46fF **FLOATING
C2369 divbuf_5/OUT vdd 363.82fF
C2370 divbuf_5/OUT5 vdd 350.37fF
C2371 divbuf_5/OUT4 vdd 133.72fF
C2372 divbuf_5/OUT3 vdd 34.03fF
C2373 divbuf_5/OUT2 vdd 8.71fF
C2374 divbuf_5/IN vdd 0.89fF
C2375 divbuf_5/a_492_n240# vdd 2.46fF **FLOATING
C2376 divbuf_4/OUT vdd 363.82fF
C2377 divbuf_4/OUT5 vdd 350.37fF
C2378 divbuf_4/OUT4 vdd 133.72fF
C2379 divbuf_4/OUT3 vdd 34.03fF
C2380 divbuf_4/OUT2 vdd 8.71fF
C2381 divbuf_4/IN vdd 0.89fF
C2382 divbuf_4/a_492_n240# vdd 2.46fF **FLOATING
C2383 divbuf_3/OUT vdd 363.82fF
C2384 divbuf_3/OUT5 vdd 350.37fF
C2385 divbuf_3/OUT4 vdd 133.72fF
C2386 divbuf_3/OUT3 vdd 34.03fF
C2387 divbuf_3/OUT2 vdd 8.71fF
C2388 divbuf_3/IN vdd 0.89fF
C2389 divbuf_3/a_492_n240# vdd 2.46fF **FLOATING
C2390 divbuf_2/OUT vdd 363.82fF
C2391 divbuf_2/OUT5 vdd 350.37fF
C2392 divbuf_2/OUT4 vdd 133.72fF
C2393 divbuf_2/OUT3 vdd 34.03fF
C2394 divbuf_2/OUT2 vdd 8.71fF
C2395 divbuf_2/IN vdd 0.89fF
C2396 divbuf_2/a_492_n240# vdd 2.46fF **FLOATING
C2397 divbuf_1/OUT vdd 363.82fF
C2398 divbuf_1/OUT5 vdd 350.37fF
C2399 divbuf_1/OUT4 vdd 133.72fF
C2400 divbuf_1/OUT3 vdd 34.03fF
C2401 divbuf_1/OUT2 vdd 8.71fF
C2402 divbuf_1/IN vdd 0.89fF
C2403 divbuf_1/a_492_n240# vdd 2.46fF **FLOATING
C2404 ro_complete_1/cbank_2/v vdd 17.84fF
C2405 ro_complete_1/cbank_2/switch_5/vin vdd 0.78fF
C2406 ro_complete_1/cbank_2/switch_4/vin vdd 1.50fF
C2407 ro_complete_1/cbank_2/switch_2/vin vdd 1.30fF
C2408 ro_complete_1/cbank_2/switch_3/vin vdd 0.56fF
C2409 ro_complete_1/cbank_2/switch_1/vin vdd 1.14fF
C2410 ro_complete_1/cbank_2/switch_0/vin vdd 1.02fF
C2411 ro_complete_1/cbank_1/v vdd 16.34fF
C2412 ro_complete_1/cbank_1/switch_5/vin vdd 0.78fF
C2413 ro_complete_1/a0 vdd 7.88fF
C2414 ro_complete_1/cbank_1/switch_4/vin vdd 1.50fF
C2415 ro_complete_1/a1 vdd 5.39fF
C2416 ro_complete_1/cbank_1/switch_2/vin vdd 1.30fF
C2417 ro_complete_1/a3 vdd 6.85fF
C2418 ro_complete_1/cbank_1/switch_3/vin vdd 0.56fF
C2419 ro_complete_1/a2 vdd 5.48fF
C2420 ro_complete_1/cbank_1/switch_1/vin vdd 1.14fF
C2421 ro_complete_1/a4 vdd 5.36fF
C2422 ro_complete_1/cbank_1/switch_0/vin vdd 1.02fF
C2423 ro_complete_1/a5 vdd 5.19fF
C2424 ro_complete_1/cbank_0/v vdd 14.98fF
C2425 ro_complete_1/cbank_0/switch_5/vin vdd 0.78fF
C2426 ro_complete_1/cbank_0/switch_4/vin vdd 1.50fF
C2427 ro_complete_1/cbank_0/switch_2/vin vdd 1.30fF
C2428 ro_complete_1/cbank_0/switch_3/vin vdd 0.56fF
C2429 ro_complete_1/cbank_0/switch_1/vin vdd 1.14fF
C2430 ro_complete_1/cbank_0/switch_0/vin vdd 1.02fF
C2431 ro_complete_1/ro_var_extend_0/vcont vdd 0.27fF
C2432 divbuf_0/OUT vdd 363.82fF
C2433 divbuf_0/OUT5 vdd 350.37fF
C2434 divbuf_0/OUT4 vdd 133.72fF
C2435 divbuf_0/OUT3 vdd 34.03fF
C2436 divbuf_0/OUT2 vdd 8.71fF
C2437 divbuf_0/IN vdd 0.89fF
C2438 divbuf_0/a_492_n240# vdd 2.46fF **FLOATING
C2439 ro_complete_0/cbank_2/v vdd 17.84fF
C2440 ro_complete_0/cbank_2/switch_5/vin vdd 0.78fF
C2441 ro_complete_0/cbank_2/switch_4/vin vdd 1.50fF
C2442 ro_complete_0/cbank_2/switch_2/vin vdd 1.30fF
C2443 ro_complete_0/cbank_2/switch_3/vin vdd 0.56fF
C2444 ro_complete_0/cbank_2/switch_1/vin vdd 1.14fF
C2445 ro_complete_0/cbank_2/switch_0/vin vdd 1.02fF
C2446 ro_complete_0/cbank_1/v vdd 16.34fF
C2447 ro_complete_0/cbank_1/switch_5/vin vdd 0.78fF
C2448 ro_complete_0/a0 vdd 7.88fF
C2449 ro_complete_0/cbank_1/switch_4/vin vdd 1.50fF
C2450 ro_complete_0/a1 vdd 5.39fF
C2451 ro_complete_0/cbank_1/switch_2/vin vdd 1.30fF
C2452 ro_complete_0/a3 vdd 6.85fF
C2453 ro_complete_0/cbank_1/switch_3/vin vdd 0.56fF
C2454 ro_complete_0/a2 vdd 5.48fF
C2455 ro_complete_0/cbank_1/switch_1/vin vdd 1.14fF
C2456 ro_complete_0/a4 vdd 5.36fF
C2457 ro_complete_0/cbank_1/switch_0/vin vdd 1.02fF
C2458 ro_complete_0/a5 vdd 5.19fF
C2459 ro_complete_0/cbank_0/v vdd 14.98fF
C2460 ro_complete_0/cbank_0/switch_5/vin vdd 0.78fF
C2461 ro_complete_0/cbank_0/switch_4/vin vdd 1.50fF
C2462 ro_complete_0/cbank_0/switch_2/vin vdd 1.30fF
C2463 ro_complete_0/cbank_0/switch_3/vin vdd 0.56fF
C2464 ro_complete_0/cbank_0/switch_1/vin vdd 1.14fF
C2465 ro_complete_0/cbank_0/switch_0/vin vdd 1.02fF
C2466 ro_complete_0/ro_var_extend_0/vcont vdd 0.27fF
C2467 filter_0/v vdd 85.69fF
C2468 filter_0/a_4216_n5230# vdd 418.47fF **FLOATING
C2469 filter_0/a_4216_n2998# vdd 1.03fF **FLOATING
C2470 cp_0/down vdd 1.54fF
C2471 cp_0/vbias vdd 2.41fF
C2472 cp_0/out vdd 5.26fF
C2473 cp_0/upbar vdd 1.50fF
C2474 cp_0/a_7110_n2840# vdd 0.17fF **FLOATING
C2475 cp_0/a_3060_n2840# vdd 1.71fF **FLOATING
C2476 cp_0/a_7110_0# vdd 0.17fF **FLOATING
C2477 cp_0/a_6370_0# vdd 0.40fF **FLOATING
C2478 cp_0/a_3060_0# vdd 1.65fF **FLOATING
C2479 cp_0/a_1710_0# vdd 5.76fF **FLOATING
C2480 cp_0/a_1710_n2840# vdd 4.89fF **FLOATING
C2481 cp_0/a_10_n50# vdd 2.96fF **FLOATING
C2482 pd_1/UP vdd 2.21fF
C2483 pd_1/and_pd_0/Z1 vdd 0.39fF
C2484 pd_1/and_pd_0/Out1 vdd 2.22fF
C2485 pd_1/tspc_r_1/z5 vdd 1.10fF
C2486 pd_1/tspc_r_1/Z4 vdd 1.07fF
C2487 pd_1/tspc_r_1/Qbar vdd 0.88fF
C2488 pd_1/tspc_r_1/Z2 vdd 1.22fF
C2489 pd_1/tspc_r_1/Z1 vdd 0.67fF
C2490 pd_1/tspc_r_1/Qbar1 vdd 1.34fF
C2491 pd_1/tspc_r_1/Z3 vdd 2.12fF
C2492 pd_1/REF vdd 1.80fF
C2493 pd_1/tspc_r_0/z5 vdd 1.10fF
C2494 pd_1/tspc_r_0/Z4 vdd 1.07fF
C2495 pd_1/R vdd 3.05fF
C2496 pd_1/tspc_r_0/Qbar vdd 0.79fF
C2497 pd_1/tspc_r_0/Z2 vdd 1.22fF
C2498 pd_1/tspc_r_0/Z1 vdd 0.67fF
C2499 pd_1/DOWN vdd 3.08fF
C2500 pd_1/tspc_r_0/Qbar1 vdd 1.34fF
C2501 pd_1/tspc_r_0/Z3 vdd 2.12fF
C2502 pd_1/DIV vdd 1.82fF
C2503 pd_0/UP vdd 2.21fF
C2504 pd_0/and_pd_0/Z1 vdd 0.39fF
C2505 pd_0/and_pd_0/Out1 vdd 2.22fF
C2506 pd_0/tspc_r_1/z5 vdd 1.10fF
C2507 pd_0/tspc_r_1/Z4 vdd 1.07fF
C2508 pd_0/tspc_r_1/Qbar vdd 0.88fF
C2509 pd_0/tspc_r_1/Z2 vdd 1.22fF
C2510 pd_0/tspc_r_1/Z1 vdd 0.67fF
C2511 pd_0/tspc_r_1/Qbar1 vdd 1.34fF
C2512 pd_0/tspc_r_1/Z3 vdd 2.12fF
C2513 pd_0/REF vdd 1.80fF
C2514 pd_0/tspc_r_0/z5 vdd 1.10fF
C2515 pd_0/tspc_r_0/Z4 vdd 1.07fF
C2516 pd_0/R vdd 3.05fF
C2517 pd_0/tspc_r_0/Qbar vdd 0.79fF
C2518 pd_0/tspc_r_0/Z2 vdd 1.22fF
C2519 pd_0/tspc_r_0/Z1 vdd 0.67fF
C2520 pd_0/DOWN vdd 3.08fF
C2521 pd_0/tspc_r_0/Qbar1 vdd 1.34fF
C2522 pd_0/tspc_r_0/Z3 vdd 2.12fF
C2523 pd_0/DIV vdd 1.82fF
.ends