removed-pd
diff --git a/gds/user_analog_project_wrapper.gds.gz b/gds/user_analog_project_wrapper.gds.gz index 8751e9b..89679e8 100644 --- a/gds/user_analog_project_wrapper.gds.gz +++ b/gds/user_analog_project_wrapper.gds.gz Binary files differ
diff --git a/mag/user_analog_project_wrapper.mag b/mag/user_analog_project_wrapper.mag index 70dbcd0..7ed8f15 100644 --- a/mag/user_analog_project_wrapper.mag +++ b/mag/user_analog_project_wrapper.mag
@@ -1,6 +1,6 @@ magic tech sky130A -timestamp 1647810892 +timestamp 1647859123 << psubdiff >> rect 69510 340048 70875 340158 rect 69510 338866 69629 340048 @@ -9098,14 +9098,14 @@ timestamp 1640983258 transform 1 0 38025 0 1 41313 box -1800 -11005 6240 390 +use div_pd_buffered div_pd_buffered_0 +timestamp 1647810892 +transform 1 0 11556 0 1 170913 +box -947 -3144 44148 7293 use divider divider_0 timestamp 1647769399 transform 1 0 246803 0 1 129340 box -490 -235 4690 2150 -use pd_buffered pd_buffered_0 -timestamp 1647806646 -transform 1 0 16753 0 1 228360 -box -947 -3144 44148 4358 use cp_buffered cp_buffered_0 timestamp 1647806434 transform 1 0 13561 0 1 262981 @@ -9126,10 +9126,6 @@ timestamp 1647806646 transform 1 0 237047 0 1 315756 box -2962 -10858 43775 10271 -use div_pd_buffered div_pd_buffered_0 -timestamp 1647810892 -transform 1 0 11556 0 1 170913 -box -947 -3144 44148 7293 << labels >> flabel metal3 s 291760 134615 292400 134671 0 FreeSans 560 0 0 0 gpio_analog[0] port 0 nsew signal bidirectional
diff --git a/netgen/user_analog_project_wrapper.spice b/netgen/user_analog_project_wrapper.spice index fbb8bc6..344a230 100644 --- a/netgen/user_analog_project_wrapper.spice +++ b/netgen/user_analog_project_wrapper.spice
@@ -106,1958 +106,1818 @@ + wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6] + wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3] + wbs_stb_i wbs_we_i -C0 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_0/Q 0.14fF -C1 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/vco 0.01fF -C2 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF -C3 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF -C4 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF -C5 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/D 0.03fF -C6 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF -C7 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C8 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z2 0.20fF -C9 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/and_pd_0/Z1 0.18fF -C10 div_pd_buffered_0/tapered_buf_0/a_160_230# div_pd_buffered_0/tapered_buf_0/a_580_0# 0.02fF -C11 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF -C12 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.11fF -C13 pd_buffered_0/tapered_buf_1/a_n10_n140# pd_buffered_0/tapered_buf_1/a_n10_230# 0.01fF -C14 pd_buffered_0/pd_0/tspc_r_0/Z4 pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF -C15 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/R 0.33fF -C16 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/clk 0.04fF -C17 div_pd_buffered_0/tapered_buf_0/a_4670_0# div_pd_buffered_0/tapered_buf_0/a_210_n610# 29.21fF -C18 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/Z4 0.65fF -C19 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.20fF -C20 pll_full_1/divider_0/and_0/OUT pll_full_1/div 0.01fF -C21 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/divider_0/prescaler_0/nand_1/z1 0.21fF -C22 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_1650_0# 1.27fF -C23 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C24 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/nor_1/B 1.21fF -C25 io_clamp_low[1] io_analog[5] 0.53fF -C26 divider_1/and_0/out1 divider_1/and_0/A 0.01fF -C27 divider_0/mc2 divider_0/nor_0/B 0.15fF -C28 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.02fF -C29 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 0.22fF -C30 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.06fF -C31 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.09fF -C32 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C33 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/UP 0.45fF -C34 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/UP 0.11fF -C35 div_pd_buffered_0/tapered_buf_2/a_1650_0# div_pd_buffered_0/tapered_buf_2/a_580_0# 1.27fF -C36 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/R 0.02fF -C37 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.15fF -C38 cp_buffered_0/tapered_buf_1/a_1650_0# cp_buffered_0/tapered_buf_1/a_210_n610# 2.89fF -C39 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/vco 1.46fF -C40 div_pd_buffered_0/tapered_buf_3/a_160_n140# div_pd_buffered_0/tapered_buf_3/a_580_0# 0.35fF -C41 divider_0/nor_1/A divider_0/tspc_0/Z3 0.38fF -C42 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF -C43 ro_complete_0/a5 ro_complete_0/cbank_1/switch_0/vin 0.09fF -C44 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF -C45 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF -C46 pll_full_1/pd_0/DOWN pll_full_1/cp_0/a_1710_0# 0.04fF -C47 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF -C48 pll_full_0/divider_0/prescaler_0/Out pll_full_0/vco 0.51fF -C49 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/z5 0.04fF -C50 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.25fF -C51 divider_1/tspc_0/Z2 divider_1/nor_1/A 0.23fF -C52 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.02fF -C53 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 0.22fF -C54 ro_complete_buffered_0/tapered_buf_2/a_580_0# ro_complete_buffered_0/tapered_buf_2/a_160_230# 0.02fF -C55 ro_complete_0/cbank_0/v ro_complete_0/cbank_0/switch_3/vin 1.30fF -C56 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C57 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/nor_1/A 0.15fF -C58 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.04fF -C59 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF -C60 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C61 pd_buffered_0/tapered_buf_2/a_580_0# pd_buffered_0/tapered_buf_2/a_1650_0# 1.27fF -C62 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z3 0.45fF -C63 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/and_0/A 0.26fF -C64 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.36fF -C65 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_1/Q 0.21fF -C66 divider_0/nor_1/B divider_0/tspc_0/Q 0.22fF -C67 ro_complete_0/a1 ro_complete_0/cbank_1/v 0.05fF -C68 divider_1/tspc_0/Q divider_1/tspc_1/Z3 0.45fF -C69 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF -C70 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/B 0.08fF -C71 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF -C72 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF -C73 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/vco 0.12fF -C74 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z2 0.19fF -C75 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z3 0.65fF -C76 cp_buffered_0/tapered_buf_2/a_n10_230# cp_buffered_0/tapered_buf_2/in 0.02fF -C77 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z4 0.02fF -C78 pd_buffered_0/tapered_buf_3/a_n10_n140# pd_buffered_0/pd_0/DOWN 0.04fF -C79 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z2 0.71fF -C80 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/tspc_2/Z3 0.05fF -C81 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.13fF -C82 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF -C83 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z3 0.05fF -C84 divider_0/nor_1/B divider_0/tspc_1/Z1 0.03fF -C85 divider_0/nor_1/A divider_0/tspc_0/Z2 0.23fF -C86 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/m1_2700_2190# 0.08fF -C87 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C88 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF -C89 div_pd_buffered_0/tapered_buf_0/a_1650_0# div_pd_buffered_0/tapered_buf_0/a_210_n610# 2.89fF -C90 div_pd_buffered_0/divider_0/tspc_2/Z2 div_pd_buffered_0/divider_0/tspc_2/Z3 0.16fF -C91 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z4 0.22fF -C92 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/z5 0.11fF -C93 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Q 0.04fF -C94 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.64fF -C95 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF -C96 divider_1/nor_0/B divider_1/tspc_1/a_630_n680# 0.00fF -C97 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z4 0.01fF -C98 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.31fF -C99 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF -C100 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF -C101 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_1/switch_1/vin 0.09fF -C102 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/DOWN 0.21fF -C103 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/and_pd_0/Out1 0.33fF -C104 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_160_n140# 0.22fF -C105 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/DOWN 0.03fF -C106 ro_complete_buffered_0/tapered_buf_1/out ro_complete_buffered_0/tapered_buf_1/a_210_n610# 26.29fF -C107 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/a_630_n680# 0.05fF -C108 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/nor_1/B 0.03fF -C109 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.05fF -C110 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.08fF -C111 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Z4 0.21fF -C112 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z3 0.45fF -C113 ro_complete_buffered_0/tapered_buf_3/a_580_0# ro_complete_buffered_0/tapered_buf_3/a_1650_0# 1.27fF -C114 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF -C115 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF -C116 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/Out 0.05fF -C117 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C118 div_pd_buffered_0/divider_0/and_0/A div_pd_buffered_0/divider_0/and_0/B 0.18fF -C119 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF -C120 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C121 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF -C122 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/nand_1/z1 0.01fF -C123 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF -C124 cp_buffered_0/tapered_buf_2/a_n10_230# cp_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF -C125 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_160_230# 0.17fF -C126 pd_buffered_0/tapered_buf_3/a_1650_0# pd_buffered_0/tapered_buf_3/a_4670_0# 4.78fF -C127 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF -C128 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/a_630_n680# 0.19fF -C129 divider_1/nor_1/Z1 divider_1/nor_1/B 0.06fF -C130 ro_complete_buffered_0/tapered_buf_2/a_580_0# ro_complete_buffered_0/tapered_buf_2/a_1650_0# 1.27fF -C131 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.20fF -C132 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF -C133 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF -C134 ro_complete_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF -C135 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF -C136 ro_complete_0/a0 ro_complete_0/cbank_2/switch_5/vin 0.09fF -C137 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF -C138 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.38fF -C139 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.11fF -C140 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/vco 1.46fF -C141 div_pd_buffered_0/tapered_buf_1/in div_pd_buffered_0/tapered_buf_1/a_n10_230# 0.02fF -C142 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.24fF -C143 div_pd_buffered_0/tapered_buf_2/a_4670_0# div_pd_buffered_0/tapered_buf_2/a_210_n610# 29.21fF -C144 ro_complete_0/a3 ro_complete_0/cbank_2/switch_2/vin 0.09fF -C145 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/A 0.01fF -C146 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/tspc_0/Q 0.05fF -C147 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_2/in 0.04fF -C148 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C149 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF -C150 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a2 0.09fF -C151 ro_complete_0/a4 ro_complete_0/cbank_1/switch_1/vin 0.09fF -C152 divider_1/nor_1/B divider_1/tspc_2/Z4 0.02fF -C153 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF -C154 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF -C155 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/vco 0.01fF -C156 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/div 0.65fF -C157 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/Z2 0.14fF -C158 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z2 0.11fF -C159 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z1 0.08fF -C160 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/v 0.08fF -C161 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.09fF -C162 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF -C163 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF -C164 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/vco 0.01fF -C165 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D div_pd_buffered_0/divider_0/clk 0.26fF -C166 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF -C167 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF -C168 divider_1/tspc_0/Z1 divider_1/nor_1/A 0.03fF -C169 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z3 0.05fF -C170 divider_1/nor_0/B divider_1/tspc_2/Z1 0.03fF -C171 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/vco 1.36fF -C172 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/tspc_r_1/z5 0.03fF -C173 div_pd_buffered_0/pd_0/tspc_r_1/Z2 div_pd_buffered_0/pd_0/R 0.21fF -C174 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/UP 0.03fF -C175 divider_1/tspc_0/Z2 divider_1/tspc_0/Z4 0.36fF -C176 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_160_n140# 0.17fF -C177 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/in 0.04fF -C178 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/R 0.61fF -C179 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C180 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/div 0.12fF -C181 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF -C182 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C183 divider_0/tspc_0/Z4 divider_0/tspc_0/Z3 0.65fF -C184 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/ref 0.02fF -C185 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/a_630_n680# 0.35fF -C186 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF -C187 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C188 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF -C189 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z2 0.25fF -C190 divider_1/mc2 divider_1/and_0/A 0.16fF -C191 divider_1/nor_0/Z1 divider_1/nor_0/B 0.06fF -C192 pll_full_1/pd_0/tspc_r_0/Qbar pll_full_1/pd_0/UP 0.21fF -C193 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z4 0.12fF -C194 ro_complete_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 2.89fF -C195 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.05fF -C196 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z4 0.36fF -C197 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Q 0.05fF -C198 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/in 0.19fF -C199 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C200 cp_buffered_0/tapered_buf_0/in cp_buffered_0/tapered_buf_0/a_n10_230# 0.02fF -C201 div_pd_buffered_0/tapered_buf_3/a_160_230# div_pd_buffered_0/tapered_buf_3/a_n10_230# 0.09fF -C202 divider_0/and_0/OUT divider_0/and_0/B 0.01fF -C203 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF -C204 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C205 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF -C206 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C207 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF -C208 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/vco 1.46fF -C209 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/D 0.03fF -C210 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/tspc_r_0/Qbar 0.01fF -C211 ro_complete_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 2.89fF -C212 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.36fF -C213 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z4 0.15fF -C214 divider_0/nor_1/A divider_0/tspc_1/Z2 0.15fF -C215 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/tapered_buf_1/in 0.05fF -C216 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF -C217 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF -C218 divider_0/tspc_0/Z4 divider_0/tspc_0/Z2 0.36fF -C219 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF -C220 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF -C221 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C222 divider_0/nor_1/B divider_0/and_0/A 0.26fF -C223 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_1/Z3 0.27fF -C224 divider_1/tspc_0/Q divider_1/nor_1/A 0.55fF -C225 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/D 0.05fF -C226 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C227 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C228 divider_1/tspc_1/Q divider_1/tspc_1/a_630_n680# 0.04fF -C229 pd_buffered_0/tapered_buf_2/a_n10_230# pd_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF -C230 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.38fF -C231 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/z5 0.11fF -C232 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF -C233 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.03fF -C234 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/a_1710_0# 0.83fF -C235 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/ro_complete_0/cbank_2/v 0.04fF -C236 div_pd_buffered_0/divider_0/tspc_2/Z2 div_pd_buffered_0/divider_0/tspc_2/Z4 0.36fF -C237 divider_0/nor_1/B divider_0/tspc_1/Z3 0.38fF -C238 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/a_630_n680# 0.12fF -C239 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin ro_complete_buffered_0/tapered_buf_1/in 1.43fF -C240 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_0/Q 0.01fF -C241 divider_0/prescaler_0/Out divider_0/tspc_0/Z3 0.45fF -C242 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF -C243 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_1/Qbar1 0.01fF -C244 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_n10_n140# 0.05fF -C245 divider_1/tspc_1/Z1 divider_1/tspc_1/Z2 1.07fF -C246 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF -C247 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C248 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF -C249 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/vco 0.11fF -C250 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C251 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF -C252 pd_buffered_0/tapered_buf_0/a_580_0# pd_buffered_0/tapered_buf_0/a_160_230# 0.02fF -C253 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/tapered_buf_0/a_210_n610# 0.22fF -C254 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z2 0.19fF -C255 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z1 0.09fF -C256 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF -C257 cp_buffered_0/cp_0/a_1710_0# cp_buffered_0/cp_0/out 0.84fF -C258 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/nor_1/B 0.38fF -C259 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z1 0.00fF -C260 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.12fF -C261 pll_full_1/ro_complete_0/a2 pll_full_1/vco 0.11fF -C262 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/div 0.19fF -C263 divider_0/nor_1/B divider_0/tspc_1/Z4 0.21fF -C264 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF -C265 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_4670_0# 4.78fF -C266 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z3 0.05fF -C267 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z1 0.03fF -C268 divider_1/tspc_0/Z4 divider_1/tspc_0/Z1 0.00fF -C269 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_1/z1 0.21fF -C270 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF -C271 divider_1/nor_1/B divider_1/tspc_0/a_630_n680# 0.01fF -C272 pll_full_0/ref pll_full_0/pd_0/DOWN 1.48fF -C273 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF -C274 cp_buffered_0/tapered_buf_2/a_1650_0# cp_buffered_0/tapered_buf_2/a_210_n610# 2.89fF -C275 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_210_n610# 0.84fF -C276 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_n10_n140# 0.05fF -C277 ro_complete_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_2/a_210_n610# 0.22fF -C278 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF -C279 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/div 0.02fF -C280 divider_0/mc2 divider_0/and_0/B 0.20fF -C281 cp_buffered_0/tapered_buf_0/a_160_230# cp_buffered_0/tapered_buf_0/a_580_0# 0.02fF -C282 cp_buffered_0/tapered_buf_0/a_210_n610# cp_buffered_0/tapered_buf_0/a_160_n140# 0.22fF -C283 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_2/Z4 0.02fF -C284 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C285 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/clk 0.45fF -C286 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/in 0.19fF -C287 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF -C288 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C289 ro_complete_buffered_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_3/a_n10_230# 0.02fF -C290 ro_complete_0/a0 ro_complete_0/cbank_2/v 0.05fF -C291 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.04fF -C292 pll_full_1/ro_complete_0/cbank_1/switch_0/vin pll_full_1/vco 1.58fF -C293 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/UP 0.33fF -C294 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/UP 0.33fF -C295 divider_0/prescaler_0/Out divider_0/tspc_0/Z2 0.11fF -C296 ro_complete_buffered_0/tapered_buf_4/a_160_230# ro_complete_buffered_0/tapered_buf_4/a_580_0# 0.02fF -C297 ro_complete_0/a5 ro_complete_0/cbank_1/v 0.10fF -C298 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/a0 0.09fF -C299 div_pd_buffered_0/tapered_buf_4/a_210_n610# div_pd_buffered_0/tapered_buf_4/a_1650_0# 2.89fF -C300 divider_1/prescaler_0/tspc_0/Z2 divider_1/and_0/OUT 0.06fF -C301 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF -C302 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF -C303 divider_1/tspc_1/Q divider_1/tspc_2/Z1 0.01fF -C304 divider_1/tspc_1/Z3 divider_1/tspc_1/a_630_n680# 0.05fF -C305 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a2 0.09fF -C306 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF -C307 pll_full_0/ref pll_full_0/pd_0/R 0.61fF -C308 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z3 0.65fF -C309 ro_complete_0/cbank_1/v ro_complete_0/a4 0.05fF -C310 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_1650_0# 1.27fF -C311 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF -C312 divider_0/nor_1/A divider_0/tspc_0/Z1 0.03fF -C313 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C314 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z3 0.65fF -C315 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/D 0.03fF -C316 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/UP 0.06fF -C317 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF -C318 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 0.84fF -C319 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_n10_n140# 0.05fF -C320 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/in 0.19fF -C321 pll_full_1/pd_0/R pll_full_1/pd_0/UP 0.46fF -C322 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF -C323 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C324 divider_1/tspc_2/Z1 divider_1/tspc_2/Z2 1.07fF -C325 divider_1/nor_0/B divider_1/tspc_2/Z3 0.38fF -C326 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z4 0.12fF -C327 div_pd_buffered_0/pd_0/tspc_r_1/Z2 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.14fF -C328 pd_buffered_0/tapered_buf_1/a_n10_230# pd_buffered_0/tapered_buf_1/a_160_230# 0.09fF -C329 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/DOWN 0.02fF -C330 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/R 0.30fF -C331 pll_full_1/ro_complete_0/cbank_2/switch_0/vin pll_full_1/ro_complete_0/cbank_2/v 1.45fF -C332 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/A 0.16fF -C333 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/and_0/OUT 0.14fF -C334 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF -C335 divider_0/nor_1/Z1 divider_0/and_0/A 0.80fF -C336 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF -C337 div_pd_buffered_0/tapered_buf_4/a_n10_n140# div_pd_buffered_0/tapered_buf_4/a_n10_230# 0.01fF -C338 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF -C339 divider_1/tspc_1/Z1 divider_1/tspc_1/Z4 0.00fF -C340 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z2 0.01fF -C341 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF -C342 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF -C343 io_clamp_high[0] io_analog[4] 0.53fF -C344 divider_1/and_0/out1 divider_1/and_0/Z1 0.36fF -C345 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF -C346 divider_1/tspc_0/Z2 divider_1/tspc_0/Z1 1.07fF -C347 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/in 0.19fF -C348 pd_buffered_0/tapered_buf_2/a_210_n610# pd_buffered_0/pd_0/DIV 26.29fF -C349 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.14fF -C350 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C351 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF -C352 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF -C353 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/cp_0/upbar 26.29fF -C354 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a3 3.17fF -C355 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF -C356 ro_complete_0/a3 ro_complete_0/cbank_2/v 0.05fF -C357 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.03fF -C358 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z2 0.36fF -C359 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF -C360 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.11fF -C361 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/clk 0.12fF -C362 divider_1/prescaler_0/Out divider_1/nor_1/A 0.15fF -C363 divider_0/nor_1/A divider_0/and_0/B 0.08fF -C364 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z2 0.19fF -C365 pll_full_1/div pll_full_1/vco 2.26fF -C366 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF -C367 div_pd_buffered_0/tapered_buf_2/in div_pd_buffered_0/tapered_buf_2/a_n10_230# 0.02fF -C368 divider_1/and_0/OUT divider_1/prescaler_0/nand_0/z1 0.01fF -C369 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF -C370 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C371 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF -C372 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.20fF -C373 div_pd_buffered_0/pd_0/tspc_r_0/Z1 div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.71fF -C374 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/in 0.19fF -C375 ro_complete_0/cbank_0/v ro_complete_0/cbank_0/switch_2/vin 1.30fF -C376 divider_0/nor_1/A divider_0/prescaler_0/m1_2700_2190# 0.01fF -C377 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/in 0.02fF -C378 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF -C379 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Q 0.55fF -C380 pll_full_1/ro_complete_0/cbank_1/switch_5/vin pll_full_1/vco 1.46fF -C381 div_pd_buffered_0/tapered_buf_0/a_580_0# div_pd_buffered_0/tapered_buf_0/a_210_n610# 0.84fF -C382 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/clk 0.45fF -C383 ro_complete_0/a0 ro_complete_0/cbank_2/switch_4/vin 0.13fF -C384 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF -C385 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/D 0.11fF -C386 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF -C387 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_2/D 0.16fF -C388 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.03fF -C389 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_1/B 0.18fF -C390 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z4 0.12fF -C391 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF -C392 divider_0/and_0/out1 divider_0/and_0/A 0.01fF -C393 divider_0/tspc_0/Z3 divider_0/tspc_0/Q 0.05fF -C394 divider_1/and_0/OUT divider_1/clk 0.04fF -C395 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_0/Q 0.14fF -C396 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/vco 0.01fF -C397 div_pd_buffered_0/tapered_buf_1/a_n10_n140# div_pd_buffered_0/tapered_buf_1/a_160_n140# 0.05fF -C398 div_pd_buffered_0/pd_0/tspc_r_0/Z4 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF -C399 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/DOWN 0.11fF -C400 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z1 0.17fF -C401 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_1650_0# 1.27fF -C402 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z3 0.33fF -C403 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF -C404 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.05fF -C405 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.08fF -C406 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF -C407 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z1 0.01fF -C408 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/Q 0.22fF -C409 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF -C410 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/R 0.29fF -C411 divider_1/tspc_1/Z2 divider_1/tspc_1/Z3 0.16fF -C412 pll_full_0/divider_0/and_0/OUT pll_full_0/div 0.01fF -C413 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF -C414 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF -C415 pd_buffered_0/tapered_buf_0/a_1650_0# pd_buffered_0/tapered_buf_0/a_210_n610# 2.89fF -C416 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/R 0.51fF -C417 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/a_160_230# 0.09fF -C418 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C419 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.16fF -C420 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/and_0/A 0.80fF -C421 pll_full_1/ro_complete_0/cbank_2/switch_5/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF -C422 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF -C423 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C424 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_580_0# 0.35fF -C425 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C426 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z2 1.07fF -C427 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z3 0.38fF -C428 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z4 0.12fF -C429 div_pd_buffered_0/divider_0/and_0/B div_pd_buffered_0/divider_0/and_0/Z1 0.07fF -C430 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.84fF -C431 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Qbar1 0.38fF -C432 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF -C433 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF -C434 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C435 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/a_630_n680# 0.05fF -C436 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.78fF -C437 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/vco 1.46fF -C438 divider_1/nor_1/A divider_1/prescaler_0/tspc_1/Q 0.03fF -C439 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/D 0.15fF -C440 divider_1/nor_0/Z1 divider_1/and_0/B 0.78fF -C441 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.02fF -C442 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/tapered_buf_3/a_160_230# 0.09fF -C443 pd_buffered_0/tapered_buf_3/a_4670_0# pd_buffered_0/tapered_buf_3/a_210_n610# 29.21fF -C444 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.01fF -C445 ro_complete_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_2/a_160_230# 0.17fF -C446 cp_buffered_0/tapered_buf_0/a_210_n610# cp_buffered_0/tapered_buf_0/a_1650_0# 2.89fF -C447 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF -C448 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.35fF -C449 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_160_230# 0.17fF -C450 ro_complete_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.02fF -C451 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Z4 0.12fF -C452 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z2 0.01fF -C453 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Z3 0.38fF -C454 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 div_pd_buffered_0/divider_0/clk 0.12fF -C455 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_580_0# 0.35fF -C456 div_pd_buffered_0/tapered_buf_3/a_160_230# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.17fF -C457 divider_0/nor_1/B divider_0/tspc_2/Z4 0.02fF -C458 divider_0/tspc_0/Z4 divider_0/tspc_0/Z1 0.00fF -C459 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF -C460 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 2.89fF -C461 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/Z1 0.36fF -C462 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_0/Z2 0.14fF -C463 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C464 divider_1/mc2 divider_1/prescaler_0/tspc_2/a_630_n680# 0.33fF -C465 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/Qbar 0.01fF -C466 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/ref 0.12fF -C467 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF -C468 divider_1/tspc_1/Q divider_1/tspc_2/Z3 0.45fF -C469 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/R 0.29fF -C470 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.38fF -C471 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/pd_0/DOWN 0.19fF -C472 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_580_0# 0.35fF -C473 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.06fF -C474 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.06fF -C475 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.12fF -C476 divider_1/prescaler_0/Out divider_1/tspc_0/Z4 0.12fF -C477 divider_0/nor_1/A divider_0/tspc_0/a_630_n680# 0.35fF -C478 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/nand_0/z1 0.01fF -C479 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/vco 0.11fF -C480 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/nor_0/B 0.35fF -C481 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/clk 0.60fF -C482 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z1 0.06fF -C483 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF -C484 divider_1/prescaler_0/tspc_1/Z2 divider_1/and_0/OUT 0.06fF -C485 divider_1/tspc_2/Z2 divider_1/tspc_2/Z3 0.16fF -C486 divider_1/nor_0/B divider_1/tspc_2/Z4 0.22fF -C487 divider_0/mc2 divider_0/and_0/OUT 0.05fF -C488 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_580_0# 0.84fF -C489 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C490 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/a_160_230# 0.17fF -C491 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Z2 0.23fF -C492 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C493 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.16fF -C494 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_580_0# 0.35fF -C495 ro_complete_buffered_0/tapered_buf_1/a_580_0# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 1.27fF -C496 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.04fF -C497 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/div 0.03fF -C498 pll_full_1/divider_0/and_0/OUT pll_full_1/vco 0.06fF -C499 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/ro_complete_0/a0 26.29fF -C500 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF -C501 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/a_630_n680# 0.05fF -C502 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/nor_1/B 0.03fF -C503 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF -C504 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF -C505 divider_1/tspc_1/Z3 divider_1/tspc_1/Z4 0.65fF -C506 divider_1/tspc_0/Z3 divider_1/tspc_0/a_630_n680# 0.05fF -C507 divider_1/and_0/A divider_1/and_0/B 0.18fF -C508 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF -C509 pd_buffered_0/pd_0/tspc_r_1/Z4 pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF -C510 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/switch_5/vin 0.20fF -C511 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF -C512 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/and_0/B 0.18fF -C513 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C514 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/in 0.02fF -C515 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/vco 0.64fF -C516 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/UP 0.11fF -C517 divider_1/prescaler_0/m1_2700_2190# divider_1/nor_1/A 0.01fF -C518 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF -C519 divider_0/nor_0/B divider_0/tspc_2/Z1 0.03fF -C520 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/ref 0.65fF -C521 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF -C522 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_160_230# 0.17fF -C523 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF -C524 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF -C525 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF -C526 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/vco 1.46fF -C527 divider_1/prescaler_0/tspc_2/D divider_1/prescaler_0/nand_0/z1 0.24fF -C528 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF -C529 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Q 0.05fF -C530 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.20fF -C531 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF -C532 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/nor_1/A 0.21fF -C533 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C534 pd_buffered_0/tapered_buf_0/a_n10_230# pd_buffered_0/tapered_buf_0/a_160_230# 0.09fF -C535 pd_buffered_0/tapered_buf_0/a_4670_0# pd_buffered_0/tapered_buf_0/a_210_n610# 29.21fF -C536 pd_buffered_0/pd_0/and_pd_0/Out1 pd_buffered_0/pd_0/UP 0.33fF -C537 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.19fF -C538 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF -C539 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF -C540 div_pd_buffered_0/divider_0/tspc_0/Z2 div_pd_buffered_0/divider_0/tspc_0/Z3 0.16fF -C541 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 div_pd_buffered_0/divider_0/clk 0.12fF -C542 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.09fF -C543 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.15fF -C544 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/and_0/A 0.01fF -C545 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF -C546 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF -C547 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z4 0.20fF -C548 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF -C549 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF -C550 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF -C551 divider_1/tspc_0/Z2 divider_1/prescaler_0/Out 0.11fF -C552 divider_1/prescaler_0/tspc_2/D divider_1/clk 0.26fF -C553 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z4 0.08fF -C554 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/vco 0.01fF -C555 div_pd_buffered_0/tapered_buf_3/a_4670_0# div_pd_buffered_0/tapered_buf_3/a_210_n610# 29.21fF -C556 div_pd_buffered_0/pd_0/tspc_r_0/z5 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.02fF -C557 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.25fF -C558 pd_buffered_0/pd_0/tspc_r_0/Z2 pd_buffered_0/pd_0/tspc_r_0/Z4 0.14fF -C559 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/UP 0.21fF -C560 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z4 0.21fF -C561 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/tapered_buf_1/in 0.05fF -C562 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z3 0.45fF -C563 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Q 0.04fF -C564 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/A 0.26fF -C565 divider_0/tspc_1/Z2 divider_0/tspc_0/Q 0.14fF -C566 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/D 0.03fF -C567 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF -C568 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C569 divider_1/tspc_1/Z2 divider_1/nor_1/A 0.15fF -C570 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C571 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/pd_0/DOWN 0.02fF -C572 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.14fF -C573 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_580_0# 0.35fF -C574 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_4/vin 0.20fF -C575 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/Out 0.05fF -C576 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/UP 2.89fF -C577 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF -C578 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/R 0.01fF -C579 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/tspc_r_1/Qbar 0.21fF -C580 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar1 0.11fF -C581 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/Z3 0.65fF -C582 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF -C583 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_1650_0# 1.27fF -C584 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_1/Z4 0.02fF -C585 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.36fF -C586 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/a_630_n680# 0.12fF -C587 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF -C588 divider_0/prescaler_0/Out divider_0/prescaler_0/m1_2700_2190# 0.11fF -C589 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.45fF -C590 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.09fF -C591 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z3 0.16fF -C592 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z4 0.22fF -C593 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/D 0.05fF -C594 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_210_n610# 0.22fF -C595 ro_complete_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_2/a_210_n610# 2.89fF -C596 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF -C597 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Q 0.05fF -C598 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.12fF -C599 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/Out 0.21fF -C600 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF -C601 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_580_0# 0.35fF -C602 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/switch_1/vin 0.20fF -C603 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/pd_0/UP 0.19fF -C604 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF -C605 pd_buffered_0/tapered_buf_0/in pd_buffered_0/tapered_buf_0/a_n10_230# 0.02fF -C606 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.12fF -C607 ro_complete_buffered_0/tapered_buf_0/a_580_0# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 0.84fF -C608 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF -C609 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.84fF -C610 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF -C611 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C612 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_580_0# 0.35fF -C613 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/R 0.01fF -C614 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/a_630_n680# 0.01fF -C615 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF -C616 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_1650_0# 1.27fF -C617 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_1/Z4 0.21fF -C618 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF -C619 pll_full_1/ro_complete_0/a0 pll_full_1/vco 0.11fF -C620 divider_0/tspc_0/Z4 divider_0/tspc_0/a_630_n680# 0.12fF -C621 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.06fF -C622 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF -C623 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF -C624 pll_full_1/divider_0/and_0/A pll_full_1/divider_0/and_0/B 0.18fF -C625 divider_1/prescaler_0/m1_2700_2190# divider_1/and_0/OUT 0.14fF -C626 divider_1/mc2 divider_1/nor_1/B 0.06fF -C627 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF -C628 divider_1/tspc_1/Q divider_1/tspc_2/Z4 0.15fF -C629 divider_1/nor_1/A divider_1/and_0/A 0.01fF -C630 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a2 0.14fF -C631 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/UP 0.03fF -C632 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z1 0.17fF -C633 ro_complete_0/cbank_1/v ro_complete_0/a2 0.05fF -C634 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF -C635 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/tspc_2/a_630_n680# 0.04fF -C636 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/Z2 0.36fF -C637 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF -C638 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z1 0.00fF -C639 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/Out 0.28fF -C640 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/tapered_buf_1/in 0.05fF -C641 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/Z1 0.04fF -C642 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z2 0.01fF -C643 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/clk 0.05fF -C644 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/divider_0/prescaler_0/nand_0/z1 0.24fF -C645 divider_1/prescaler_0/tspc_0/Z2 divider_1/clk 0.11fF -C646 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF -C647 divider_1/tspc_2/Z2 divider_1/tspc_2/Z4 0.36fF -C648 divider_1/tspc_2/Z3 divider_1/Out 0.05fF -C649 divider_0/mc2 divider_0/nor_1/A 0.04fF -C650 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_0/Q 0.01fF -C651 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/and_pd_0/Out1 0.12fF -C652 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/UP 0.21fF -C653 pd_buffered_0/pd_0/tspc_r_0/Z2 pd_buffered_0/pd_0/R 0.21fF -C654 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.13fF -C655 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/UP 0.03fF -C656 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.07fF -C657 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/B 0.18fF -C658 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/vco 0.26fF -C659 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C660 divider_0/tspc_1/Q divider_0/tspc_2/Z1 0.01fF -C661 ro_complete_buffered_0/tapered_buf_3/a_4670_0# ro_complete_buffered_0/tapered_buf_3/a_1650_0# 4.78fF -C662 divider_1/nor_1/A divider_1/tspc_1/Z4 0.02fF -C663 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z3 0.06fF -C664 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/nor_1/B 0.38fF -C665 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z1 0.00fF -C666 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF -C667 pll_full_0/ro_complete_0/a2 pll_full_0/vco 0.11fF -C668 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF -C669 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z1 0.03fF -C670 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/in 0.02fF -C671 ro_complete_buffered_0/tapered_buf_2/a_n10_230# ro_complete_buffered_0/tapered_buf_2/a_160_230# 0.09fF -C672 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF -C673 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.09fF -C674 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C675 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/out 26.29fF -C676 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/and_pd_0/Z1 0.07fF -C677 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a1 3.18fF -C678 ro_complete_0/a1 ro_complete_0/cbank_2/v 0.05fF -C679 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z3 0.45fF -C680 pll_full_1/ro_complete_0/a3 pll_full_1/vco 0.11fF -C681 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/nor_0/B 0.00fF -C682 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_0/Q 0.14fF -C683 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.05fF -C684 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/clk 0.01fF -C685 divider_0/prescaler_0/Out divider_0/tspc_0/a_630_n680# 0.01fF -C686 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C687 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF -C688 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF -C689 divider_0/nor_0/B divider_0/tspc_2/Z3 0.38fF -C690 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF -C691 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF -C692 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/vco 1.58fF -C693 divider_1/nor_1/B divider_1/nor_0/B 0.47fF -C694 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/Q 0.04fF -C695 divider_1/prescaler_0/tspc_1/Z3 divider_1/clk 0.45fF -C696 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/tapered_buf_1/in 0.02fF -C697 div_pd_buffered_0/tapered_buf_0/a_4670_0# div_pd_buffered_0/tapered_buf_0/a_1650_0# 4.78fF -C698 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/a_210_n610# 0.22fF -C699 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z3 0.06fF -C700 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/in 0.02fF -C701 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.11fF -C702 pd_buffered_0/tapered_buf_0/a_n10_230# pd_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF -C703 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_n10_n140# 0.05fF -C704 ro_complete_buffered_0/tapered_buf_1/a_160_n140# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.35fF -C705 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.05fF -C706 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF -C707 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF -C708 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF -C709 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF -C710 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z3 0.65fF -C711 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF -C712 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.02fF -C713 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 0.22fF -C714 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/and_pd_0/Out1 0.05fF -C715 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/tspc_r_1/Qbar 0.01fF -C716 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/R 0.27fF -C717 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF -C718 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_1/switch_3/vin 0.09fF -C719 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/nor_1/B 1.21fF -C720 divider_1/nor_1/Z1 divider_1/and_0/B 0.18fF -C721 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF -C722 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z3 0.06fF -C723 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z2 0.11fF -C724 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C725 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z1 0.00fF -C726 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z4 0.15fF -C727 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF -C728 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF -C729 div_pd_buffered_0/tapered_buf_3/a_160_230# div_pd_buffered_0/tapered_buf_3/a_580_0# 0.02fF -C730 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_1/z5 0.03fF -C731 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/pd_0/tspc_r_1/Z2 0.71fF -C732 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.45fF -C733 divider_1/mc2 divider_1/and_0/out1 0.06fF -C734 divider_1/tspc_1/Z1 divider_1/nor_1/B 0.03fF -C735 io_clamp_low[2] io_analog[6] 0.53fF -C736 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z3 0.25fF -C737 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_1650_0# 1.27fF -C738 pd_buffered_0/pd_0/DIV pd_buffered_0/tapered_buf_0/in 0.02fF -C739 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_4670_0# 29.21fF -C740 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF -C741 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/z5 0.11fF -C742 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C743 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/a_630_n680# 0.12fF -C744 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_160_230# 0.17fF -C745 cp_buffered_0/tapered_buf_1/a_1650_0# cp_buffered_0/tapered_buf_1/a_4670_0# 4.78fF -C746 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z3 0.11fF -C747 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF -C748 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z4 0.36fF -C749 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/div 0.05fF -C750 divider_0/and_0/OUT divider_0/clk 0.04fF -C751 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF -C752 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C753 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/div 0.65fF -C754 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF -C755 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z2 0.36fF -C756 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.09fF -C757 div_pd_buffered_0/tapered_buf_2/a_160_230# div_pd_buffered_0/tapered_buf_2/a_n10_230# 0.09fF -C758 divider_1/prescaler_0/tspc_2/Z4 divider_1/prescaler_0/tspc_2/D 0.11fF -C759 pll_full_0/div pll_full_0/vco 2.26fF -C760 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF -C761 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_1650_0# 1.27fF -C762 ro_complete_buffered_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.19fF -C763 ro_complete_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_2/a_n10_n140# 0.05fF -C764 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/UP 0.45fF -C765 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF -C766 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.09fF -C767 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/and_0/B 0.08fF -C768 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/nor_0/B 0.22fF -C769 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.19fF -C770 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/clk 0.01fF -C771 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF -C772 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF -C773 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.06fF -C774 cp_buffered_0/tapered_buf_0/a_1650_0# cp_buffered_0/tapered_buf_0/a_4670_0# 4.78fF -C775 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF -C776 divider_0/tspc_1/Z3 divider_0/tspc_1/Q 0.05fF -C777 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF -C778 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF -C779 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_2/D 0.16fF -C780 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z3 0.16fF -C781 ro_complete_0/a2 ro_complete_0/cbank_1/switch_3/vin 0.09fF -C782 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/tspc_r_0/Qbar 0.01fF -C783 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Q 0.55fF -C784 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/vco 1.46fF -C785 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z1 0.17fF -C786 divider_1/prescaler_0/tspc_2/Z3 divider_1/clk 0.45fF -C787 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z2 0.25fF -C788 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/pd_0/DOWN 0.02fF -C789 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/nor_0/B 0.42fF -C790 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# 0.05fF -C791 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.03fF -C792 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/nor_1/A 0.35fF -C793 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF -C794 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF -C795 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF -C796 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z2 0.40fF -C797 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D div_pd_buffered_0/divider_0/clk 0.29fF -C798 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 2.89fF -C799 ro_complete_buffered_0/tapered_buf_1/a_160_n140# ro_complete_buffered_0/tapered_buf_1/in 0.19fF -C800 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF -C801 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C802 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_2/Z4 0.02fF -C803 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF -C804 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/vco 0.45fF -C805 divider_1/prescaler_0/Out divider_1/clk 0.51fF -C806 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.15fF -C807 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z2 0.25fF -C808 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Z4 0.65fF -C809 ro_complete_buffered_0/tapered_buf_4/a_210_n610# ro_complete_buffered_0/ro_complete_0/a2 26.29fF -C810 pll_full_1/cp_0/down pll_full_1/cp_0/a_1710_0# 0.32fF -C811 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z1 0.01fF -C812 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/Q 0.22fF -C813 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_4/vin 0.20fF -C814 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z3 0.65fF -C815 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Q 0.04fF -C816 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.06fF -C817 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF -C818 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.38fF -C819 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.11fF -C820 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/clk 0.11fF -C821 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.03fF -C822 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF -C823 divider_0/tspc_1/Q divider_0/tspc_2/Z3 0.45fF -C824 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Q 0.04fF -C825 divider_1/tspc_0/Q divider_1/tspc_1/a_630_n680# 0.01fF -C826 divider_1/nor_1/B divider_1/tspc_1/Q 0.51fF -C827 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z4 0.00fF -C828 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Q 0.21fF -C829 divider_1/prescaler_0/tspc_1/Z2 divider_1/clk 0.11fF -C830 pll_full_1/pd_0/DOWN pll_full_1/ref 1.48fF -C831 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF -C832 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/A 0.80fF -C833 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C834 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF -C835 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z3 0.38fF -C836 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF -C837 div_pd_buffered_0/tapered_buf_4/a_1650_0# div_pd_buffered_0/tapered_buf_4/a_4670_0# 4.78fF -C838 divider_1/and_0/B divider_1/and_0/Z1 0.07fF -C839 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_3/vin 0.20fF -C840 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF -C841 pd_buffered_0/tapered_buf_1/a_n10_230# pd_buffered_0/pd_0/UP 0.02fF -C842 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/and_pd_0/Out1 0.33fF -C843 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/nor_0/B 0.47fF -C844 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Z3 0.05fF -C845 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF -C846 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 2.89fF -C847 ro_complete_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.17fF -C848 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF -C849 divider_0/tspc_1/a_630_n680# divider_0/nor_0/B 0.00fF -C850 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF -C851 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF -C852 divider_0/nor_0/B divider_0/tspc_2/Z4 0.22fF -C853 pd_buffered_0/tapered_buf_2/a_580_0# pd_buffered_0/tapered_buf_2/a_160_230# 0.02fF -C854 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF -C855 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z4 0.02fF -C856 divider_1/nor_1/B divider_1/tspc_2/Z2 0.20fF -C857 divider_1/prescaler_0/tspc_1/Z4 divider_1/clk 0.12fF -C858 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF -C859 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF -C860 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF -C861 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF -C862 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_580_0# 0.84fF -C863 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/tspc_r_0/Qbar1 0.01fF -C864 div_pd_buffered_0/tapered_buf_1/a_4670_0# div_pd_buffered_0/tapered_buf_1/a_210_n610# 29.21fF -C865 cp_buffered_0/cp_0/a_10_n50# cp_buffered_0/cp_0/a_1710_0# 0.04fF -C866 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/out1 0.31fF -C867 div_pd_buffered_0/divider_0/tspc_1/Z4 div_pd_buffered_0/divider_0/tspc_0/Q 0.15fF -C868 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z3 0.65fF -C869 divider_0/nor_1/A divider_0/tspc_0/Z4 0.21fF -C870 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/tapered_buf_1/in 0.05fF -C871 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_0/Q 0.01fF -C872 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.11fF -C873 div_pd_buffered_0/tapered_buf_2/in div_pd_buffered_0/tapered_buf_2/a_160_n140# 0.19fF -C874 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF -C875 divider_0/and_0/A divider_0/and_0/B 0.18fF -C876 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z1 0.09fF -C877 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF -C878 divider_1/tspc_2/a_630_n680# divider_1/nor_0/B 0.35fF -C879 divider_1/prescaler_0/tspc_1/Q divider_1/clk 0.60fF -C880 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF -C881 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/vco 0.11fF -C882 ro_complete_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 2.89fF -C883 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a4 0.12fF -C884 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_3/vin 0.09fF -C885 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/R 0.36fF -C886 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF -C887 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.20fF -C888 div_pd_buffered_0/pd_0/tspc_r_1/Z1 div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.71fF -C889 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/a_n10_230# 0.01fF -C890 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/out1 0.06fF -C891 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/Z4 0.36fF -C892 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/Q 0.05fF -C893 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/nor_1/B 0.35fF -C894 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Z2 0.01fF -C895 div_pd_buffered_0/tapered_buf_3/a_4670_0# div_pd_buffered_0/tapered_buf_3/a_1650_0# 4.78fF -C896 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/upbar 0.29fF -C897 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/ref 0.65fF -C898 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/and_0/B 0.29fF -C899 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z2 0.19fF -C900 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z3 0.65fF -C901 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/vco 0.45fF -C902 cp_buffered_0/cp_0/down cp_buffered_0/cp_0/a_1710_0# 0.32fF -C903 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C904 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z1 0.09fF -C905 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_0/z1 0.24fF -C906 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 0.84fF -C907 div_pd_buffered_0/tapered_buf_3/a_210_n610# div_pd_buffered_0/tapered_buf_3/a_1650_0# 2.89fF -C908 divider_1/tspc_1/Z3 divider_1/nor_1/B 0.38fF -C909 pll_full_0/filter_0/a_4216_n5230# pll_full_0/vco 1.58fF -C910 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/div 0.03fF -C911 pll_full_0/divider_0/and_0/OUT pll_full_0/vco 0.06fF -C912 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.17fF -C913 ro_complete_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_6/a_4670_0# 4.78fF -C914 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 1.07fF -C915 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C916 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/tspc_r_1/Qbar1 0.01fF -C917 cp_buffered_0/tapered_buf_2/a_580_0# cp_buffered_0/tapered_buf_2/a_160_n140# 0.35fF -C918 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/tspc_r_1/z5 0.03fF -C919 pd_buffered_0/pd_0/tspc_r_1/Z2 pd_buffered_0/pd_0/R 0.21fF -C920 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/UP 0.03fF -C921 ro_complete_0/a5 ro_complete_0/cbank_2/v 0.08fF -C922 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.65fF -C923 pll_full_1/ro_complete_0/a4 pll_full_1/vco 0.01fF -C924 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.05fF -C925 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_210_n610# 0.84fF -C926 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_n10_n140# 0.05fF -C927 ro_complete_0/a3 ro_complete_0/cbank_1/switch_2/vin 0.09fF -C928 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z4 0.28fF -C929 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z3 0.33fF -C930 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_0/Qbar1 0.30fF -C931 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF -C932 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.26fF -C933 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/vco 0.64fF -C934 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.19fF -C935 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z1 0.09fF -C936 ro_complete_0/cbank_2/v ro_complete_0/a4 0.05fF -C937 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_580_0# 0.02fF -C938 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.17fF -C939 ro_complete_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_7/a_4670_0# 4.78fF -C940 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/switch_3/vin 0.20fF -C941 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/nor_1/A 0.15fF -C942 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/a0 0.09fF -C943 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF -C944 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.12fF -C945 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF -C946 divider_0/nor_1/A divider_0/prescaler_0/Out 0.15fF -C947 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF -C948 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF -C949 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C950 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF -C951 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.00fF -C952 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF -C953 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z2 0.14fF -C954 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.32fF -C955 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF -C956 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/in 0.02fF -C957 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF -C958 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Q 0.91fF -C959 pll_full_1/divider_0/and_0/B pll_full_1/divider_0/and_0/Z1 0.07fF -C960 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/nand_0/z1 0.07fF -C961 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_0/z5 0.04fF -C962 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF -C963 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C964 pll_full_0/pd_0/tspc_r_1/z5 pll_full_0/div 0.04fF -C965 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/pd_0/DOWN 0.19fF -C966 divider_1/tspc_0/Q divider_1/tspc_1/Z2 0.14fF -C967 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z4 0.36fF -C968 divider_1/nor_1/B divider_1/and_0/B 0.31fF -C969 divider_1/prescaler_0/tspc_2/Z4 divider_1/clk 0.12fF -C970 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF -C971 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/A 0.01fF -C972 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/R 0.03fF -C973 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/tspc_r_0/Qbar 0.01fF -C974 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_0/Qbar1 0.20fF -C975 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/nor_1/B 0.38fF -C976 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C977 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF -C978 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF -C979 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z2 0.01fF -C980 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/tapered_buf_1/in 0.05fF -C981 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z3 0.06fF -C982 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 pll_full_1/vco 0.12fF -C983 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 4.58fF -C984 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z3 0.06fF -C985 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF -C986 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF -C987 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF -C988 divider_1/prescaler_0/m1_2700_2190# divider_1/clk 0.01fF -C989 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_1/Z4 0.02fF -C990 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z4 0.21fF -C991 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF -C992 divider_1/mc2 divider_1/nor_0/B 0.15fF -C993 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z3 0.45fF -C994 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Q 0.04fF -C995 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/A 0.26fF -C996 div_pd_buffered_0/pd_0/tspc_r_0/z5 div_pd_buffered_0/pd_0/UP 0.03fF -C997 pd_buffered_0/tapered_buf_1/a_n10_n140# pd_buffered_0/tapered_buf_1/a_160_n140# 0.05fF -C998 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.38fF -C999 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a3 0.13fF -C1000 divider_0/nor_0/Z1 divider_0/nor_1/B 0.18fF -C1001 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF -C1002 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/a_630_n680# 0.01fF -C1003 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 1.07fF -C1004 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.05fF -C1005 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Q 0.51fF -C1006 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF -C1007 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF -C1008 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.04fF -C1009 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/clk 0.51fF -C1010 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Q 0.04fF -C1011 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF -C1012 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/nor_0/B 0.35fF -C1013 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/vco 0.60fF -C1014 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/R 0.29fF -C1015 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF -C1016 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF -C1017 divider_0/tspc_1/Q divider_0/tspc_2/Z4 0.15fF -C1018 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z4 0.02fF -C1019 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF -C1020 divider_1/nor_1/A divider_1/tspc_0/a_630_n680# 0.35fF -C1021 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Z4 0.65fF -C1022 ro_complete_buffered_0/tapered_buf_3/a_n10_230# ro_complete_buffered_0/tapered_buf_3/a_160_230# 0.09fF -C1023 ro_complete_buffered_0/tapered_buf_3/a_4670_0# ro_complete_buffered_0/tapered_buf_3/a_210_n610# 29.21fF -C1024 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF -C1025 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z4 0.22fF -C1026 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/R 0.21fF -C1027 div_pd_buffered_0/tapered_buf_1/a_n10_n140# div_pd_buffered_0/tapered_buf_1/in 0.04fF -C1028 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_1/A 0.04fF -C1029 div_pd_buffered_0/pd_0/and_pd_0/Z1 div_pd_buffered_0/pd_0/UP 0.06fF -C1030 ro_complete_buffered_0/tapered_buf_2/a_n10_230# ro_complete_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF -C1031 ro_complete_0/a3 ro_complete_0/cbank_0/switch_1/vin 0.13fF -C1032 div_pd_buffered_0/tapered_buf_2/a_1650_0# div_pd_buffered_0/tapered_buf_2/a_4670_0# 4.78fF -C1033 ro_complete_buffered_0/tapered_buf_5/a_n10_n140# ro_complete_buffered_0/tapered_buf_5/in 0.04fF -C1034 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a3 2.04fF -C1035 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.22fF -C1036 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/in 0.04fF -C1037 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF +C0 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF +C1 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C2 pll_full_1/ro_complete_0/a1 pll_full_1/ro_complete_0/cbank_2/v 0.05fF +C3 pll_full_1/ref pll_full_1/pd_0/R 0.61fF +C4 div_pd_buffered_0/tapered_buf_3/a_210_n610# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.22fF +C5 divider_1/mc2 divider_1/and_0/A 0.16fF +C6 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z4 0.12fF +C7 divider_1/tspc_2/Z1 divider_1/tspc_2/Z2 1.07fF +C8 divider_1/nor_0/B divider_1/tspc_2/Z3 0.38fF +C9 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_1650_0# 1.27fF +C10 ro_complete_buffered_0/tapered_buf_3/a_n10_230# ro_complete_buffered_0/tapered_buf_3/a_160_230# 0.09fF +C11 ro_complete_buffered_0/tapered_buf_3/a_4670_0# ro_complete_buffered_0/tapered_buf_3/a_210_n610# 29.21fF +C12 div_pd_buffered_0/pd_0/tspc_r_1/Z2 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.14fF +C13 divider_0/mc2 divider_0/and_0/out1 0.06fF +C14 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.45fF +C15 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/A 0.16fF +C16 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/and_0/OUT 0.14fF +C17 divider_0/nor_1/Z1 divider_0/and_0/A 0.80fF +C18 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF +C19 pll_full_1/pd_0/R pll_full_1/pd_0/and_pd_0/Z1 0.02fF +C20 cp_buffered_0/tapered_buf_2/a_n10_230# cp_buffered_0/tapered_buf_2/a_160_230# 0.09fF +C21 cp_buffered_0/tapered_buf_2/a_4670_0# cp_buffered_0/tapered_buf_2/a_210_n610# 29.21fF +C22 divider_1/tspc_0/Q divider_1/tspc_0/Z3 0.05fF +C23 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF +C24 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C25 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.09fF +C26 divider_1/tspc_1/Z1 divider_1/tspc_1/Z4 0.00fF +C27 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z2 0.01fF +C28 divider_1/and_0/out1 divider_1/and_0/Z1 0.36fF +C29 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/B 0.01fF +C30 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/tspc_r_1/Qbar1 0.01fF +C31 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF +C32 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF +C33 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/in 0.19fF +C34 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF +C35 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C36 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a3 3.17fF +C37 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF +C38 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF +C39 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z2 0.36fF +C40 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Qbar1 0.38fF +C41 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.11fF +C42 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/clk 0.12fF +C43 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z2 0.19fF +C44 pll_full_0/div pll_full_0/vco 2.26fF +C45 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/a0 0.13fF +C46 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/nand_0/z1 0.07fF +C47 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C48 divider_1/and_0/OUT divider_1/prescaler_0/nand_0/z1 0.01fF +C49 div_pd_buffered_0/pd_0/tspc_r_0/Z1 div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.71fF +C50 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.20fF +C51 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF +C52 ro_complete_0/a0 ro_complete_0/cbank_2/switch_5/vin 0.09fF +C53 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/in 0.19fF +C54 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/in 0.02fF +C55 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF +C56 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Q 0.55fF +C57 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/vco 1.46fF +C58 div_pd_buffered_0/tapered_buf_0/a_580_0# div_pd_buffered_0/tapered_buf_0/a_210_n610# 0.84fF +C59 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/clk 0.45fF +C60 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/D 0.11fF +C61 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF +C62 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_2/D 0.16fF +C63 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.03fF +C64 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_160_230# 0.17fF +C65 cp_buffered_0/tapered_buf_1/a_1650_0# cp_buffered_0/tapered_buf_1/a_4670_0# 4.78fF +C66 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/nor_1/B 0.18fF +C67 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z4 0.12fF +C68 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF +C69 divider_1/nor_1/A divider_1/tspc_0/a_630_n680# 0.35fF +C70 divider_0/and_0/out1 divider_0/and_0/A 0.01fF +C71 divider_0/tspc_0/Z3 divider_0/tspc_0/Q 0.05fF +C72 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF +C73 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_0/Q 0.14fF +C74 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/vco 0.01fF +C75 divider_1/and_0/OUT divider_1/clk 0.04fF +C76 div_pd_buffered_0/tapered_buf_1/a_n10_n140# div_pd_buffered_0/tapered_buf_1/a_160_n140# 0.05fF +C77 div_pd_buffered_0/pd_0/tspc_r_0/Z4 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF +C78 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z1 0.17fF +C79 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/DOWN 0.11fF +C80 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF +C81 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.05fF +C82 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.08fF +C83 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF +C84 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z1 0.01fF +C85 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/Q 0.22fF +C86 ro_complete_buffered_0/tapered_buf_3/a_580_0# ro_complete_buffered_0/tapered_buf_3/a_1650_0# 1.27fF +C87 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_160_230# 0.17fF +C88 cp_buffered_0/tapered_buf_0/a_1650_0# cp_buffered_0/tapered_buf_0/a_4670_0# 4.78fF +C89 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.20fF +C90 divider_1/tspc_1/Z2 divider_1/tspc_1/Z3 0.16fF +C91 pll_full_1/divider_0/and_0/OUT pll_full_1/div 0.01fF +C92 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/divider_0/prescaler_0/nand_1/z1 0.21fF +C93 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C94 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF +C95 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C96 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/a_160_230# 0.09fF +C97 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C98 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C99 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/A 0.80fF +C100 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C101 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C102 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF +C103 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF +C104 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z3 0.38fF +C105 div_pd_buffered_0/divider_0/and_0/B div_pd_buffered_0/divider_0/and_0/Z1 0.07fF +C106 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/a_630_n680# 0.05fF +C107 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF +C108 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C109 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.09fF +C110 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C111 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/and_0/B 0.78fF +C112 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/vco 1.46fF +C113 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/D 0.15fF +C114 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/R 0.21fF +C115 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.01fF +C116 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF +C117 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Z3 0.38fF +C118 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 div_pd_buffered_0/divider_0/clk 0.12fF +C119 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/tapered_buf_4/a_n10_n140# 0.01fF +C120 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.35fF +C121 divider_0/nor_1/A divider_0/tspc_0/Z3 0.38fF +C122 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF +C123 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_160_230# 0.17fF +C124 ro_complete_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.02fF +C125 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF +C126 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF +C127 divider_0/nor_1/B divider_0/tspc_2/Z4 0.02fF +C128 divider_0/tspc_0/Z4 divider_0/tspc_0/Z1 0.00fF +C129 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF +C130 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF +C131 divider_1/tspc_0/Z3 divider_1/tspc_0/a_630_n680# 0.05fF +C132 divider_1/nor_1/Z1 divider_1/nor_1/B 0.06fF +C133 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/Z2 0.14fF +C134 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C135 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF +C136 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/ref 0.12fF +C137 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.36fF +C138 divider_1/tspc_1/Q divider_1/tspc_2/Z3 0.45fF +C139 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF +C140 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/R 0.29fF +C141 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.04fF +C142 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_580_0# 0.35fF +C143 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.06fF +C144 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.06fF +C145 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C146 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/nor_0/B 0.35fF +C147 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/clk 0.60fF +C148 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF +C149 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/vco 0.11fF +C150 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/a_630_n680# 0.19fF +C151 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z1 0.06fF +C152 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF +C153 divider_1/prescaler_0/tspc_1/Z2 divider_1/and_0/OUT 0.06fF +C154 ro_complete_buffered_0/tapered_buf_3/a_n10_230# ro_complete_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF +C155 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_0/vin 0.19fF +C156 divider_1/tspc_2/Z2 divider_1/tspc_2/Z3 0.16fF +C157 divider_1/nor_0/B divider_1/tspc_2/Z4 0.22fF +C158 io_clamp_low[2] io_analog[6] 0.53fF +C159 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C160 div_pd_buffered_0/tapered_buf_2/a_580_0# div_pd_buffered_0/tapered_buf_2/a_1650_0# 1.27fF +C161 divider_0/nor_1/A divider_0/tspc_0/Z2 0.23fF +C162 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_580_0# 0.35fF +C163 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/a_160_230# 0.17fF +C164 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Z2 0.23fF +C165 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C166 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.16fF +C167 ro_complete_buffered_0/tapered_buf_1/a_580_0# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 1.27fF +C168 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.04fF +C169 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/div 0.03fF +C170 pll_full_0/divider_0/and_0/OUT pll_full_0/vco 0.06fF +C171 cp_buffered_0/tapered_buf_2/a_n10_230# cp_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF +C172 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_1/switch_1/vin 0.09fF +C173 divider_1/tspc_1/Z3 divider_1/tspc_1/Z4 0.65fF +C174 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/a_630_n680# 0.05fF +C175 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/nor_1/B 0.03fF +C176 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.05fF +C177 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.08fF +C178 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.02fF +C179 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 0.22fF +C180 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF +C181 divider_1/and_0/A divider_1/and_0/B 0.18fF +C182 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF +C183 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF +C184 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C185 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF +C186 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/and_0/B 0.18fF +C187 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/vco 0.64fF +C188 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/UP 0.11fF +C189 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/upbar 0.29fF +C190 divider_1/tspc_0/Z3 divider_1/nor_1/A 0.38fF +C191 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF +C192 divider_0/nor_0/B divider_0/tspc_2/Z1 0.03fF +C193 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/ref 0.65fF +C194 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.20fF +C195 divider_1/prescaler_0/tspc_2/D divider_1/prescaler_0/nand_0/z1 0.24fF +C196 ro_complete_buffered_0/tapered_buf_3/a_580_0# ro_complete_buffered_0/tapered_buf_3/a_160_230# 0.02fF +C197 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_210_n610# 0.22fF +C198 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF +C199 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.38fF +C200 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.11fF +C201 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/vco 1.46fF +C202 ro_complete_0/a0 ro_complete_0/cbank_2/v 0.05fF +C203 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/A 0.01fF +C204 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/tspc_0/Q 0.05fF +C205 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.20fF +C206 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF +C207 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C208 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_1/Z4 0.02fF +C209 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/nor_1/A 0.21fF +C210 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C211 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.09fF +C212 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/z5 0.20fF +C213 div_pd_buffered_0/divider_0/tspc_0/Z2 div_pd_buffered_0/divider_0/tspc_0/Z3 0.16fF +C214 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 div_pd_buffered_0/divider_0/clk 0.12fF +C215 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF +C216 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/A 0.01fF +C217 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF +C218 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF +C219 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_n10_n140# 0.05fF +C220 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_210_n610# 0.84fF +C221 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF +C222 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z1 0.08fF +C223 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/v 0.08fF +C224 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.09fF +C225 divider_1/prescaler_0/tspc_2/D divider_1/clk 0.26fF +C226 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/vco 0.01fF +C227 div_pd_buffered_0/pd_0/tspc_r_0/z5 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.02fF +C228 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.25fF +C229 div_pd_buffered_0/tapered_buf_3/a_210_n610# div_pd_buffered_0/divider_0/clk 26.29fF +C230 divider_0/mc2 divider_0/nor_0/B 0.15fF +C231 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z4 0.21fF +C232 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/tapered_buf_1/in 0.05fF +C233 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z3 0.45fF +C234 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Q 0.04fF +C235 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/A 0.26fF +C236 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C237 divider_0/tspc_1/Z2 divider_0/tspc_0/Q 0.14fF +C238 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/D 0.03fF +C239 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF +C240 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF +C241 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_210_n610# 0.84fF +C242 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF +C243 ro_complete_0/a4 ro_complete_0/cbank_2/switch_0/vin 0.12fF +C244 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/Out 0.05fF +C245 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/UP 2.89fF +C246 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_580_0# 0.35fF +C247 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF +C248 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z4 0.02fF +C249 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF +C250 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_1/Qbar1 0.11fF +C251 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/Z3 0.65fF +C252 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C253 divider_1/prescaler_0/Out divider_1/tspc_0/a_630_n680# 0.01fF +C254 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/a_630_n680# 0.12fF +C255 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF +C256 divider_0/prescaler_0/Out divider_0/prescaler_0/m1_2700_2190# 0.11fF +C257 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.45fF +C258 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/div 0.17fF +C259 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF +C260 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z4 0.22fF +C261 divider_1/mc2 divider_1/prescaler_0/tspc_2/a_630_n680# 0.33fF +C262 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/D 0.05fF +C263 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z4 0.36fF +C264 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Q 0.05fF +C265 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.12fF +C266 ro_complete_0/a3 ro_complete_0/cbank_2/v 0.05fF +C267 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/tspc_r_1/Z4 0.14fF +C268 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/pd_0/UP 0.19fF +C269 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF +C270 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_580_0# 0.35fF +C271 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.12fF +C272 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF +C273 ro_complete_buffered_0/tapered_buf_0/a_580_0# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 0.84fF +C274 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.84fF +C275 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF +C276 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C277 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z4 0.21fF +C278 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C279 pll_full_0/ro_complete_0/a0 pll_full_0/vco 0.11fF +C280 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/R 0.01fF +C281 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/a_630_n680# 0.01fF +C282 divider_0/tspc_0/Z4 divider_0/tspc_0/a_630_n680# 0.12fF +C283 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.06fF +C284 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF +C285 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF +C286 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF +C287 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C288 divider_1/tspc_1/Q divider_1/tspc_2/Z4 0.15fF +C289 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/UP 0.03fF +C290 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/tspc_2/a_630_n680# 0.04fF +C291 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/Z2 0.36fF +C292 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C293 divider_0/nor_1/A divider_0/tspc_1/Z2 0.15fF +C294 ro_complete_buffered_0/tapered_buf_5/a_210_n610# ro_complete_buffered_0/ro_complete_0/a3 26.29fF +C295 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z1 0.00fF +C296 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/Out 0.28fF +C297 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/tapered_buf_1/in 0.05fF +C298 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF +C299 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/Z1 0.04fF +C300 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z2 0.01fF +C301 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/clk 0.05fF +C302 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/ro_complete_0/cbank_2/v 0.04fF +C303 divider_1/prescaler_0/tspc_0/Z2 divider_1/clk 0.11fF +C304 ro_complete_0/a3 ro_complete_0/cbank_1/switch_2/vin 0.09fF +C305 divider_1/tspc_2/Z2 divider_1/tspc_2/Z4 0.36fF +C306 divider_1/tspc_2/Z3 divider_1/Out 0.05fF +C307 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_0/Q 0.01fF +C308 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/and_pd_0/Out1 0.12fF +C309 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/UP 0.21fF +C310 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/in 0.02fF +C311 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/UP 0.03fF +C312 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.07fF +C313 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF +C314 divider_1/tspc_1/a_630_n680# divider_1/nor_1/B 0.35fF +C315 divider_1/prescaler_0/Out divider_1/nor_1/A 0.15fF +C316 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/vco 0.26fF +C317 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/B 0.18fF +C318 divider_0/tspc_1/Q divider_0/tspc_2/Z1 0.01fF +C319 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C320 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/nor_1/B 0.38fF +C321 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z1 0.00fF +C322 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.12fF +C323 pll_full_1/ro_complete_0/a2 pll_full_1/vco 0.11fF +C324 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z3 0.06fF +C325 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 2.89fF +C326 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF +C327 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z3 0.05fF +C328 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z1 0.03fF +C329 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/in 0.02fF +C330 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF +C331 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C332 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/nor_0/B 0.00fF +C333 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_0/Q 0.14fF +C334 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.05fF +C335 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/clk 0.01fF +C336 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a1 3.18fF +C337 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z3 0.45fF +C338 pll_full_0/ro_complete_0/a3 pll_full_0/vco 0.11fF +C339 divider_0/prescaler_0/Out divider_0/tspc_0/a_630_n680# 0.01fF +C340 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C341 divider_1/tspc_0/Q divider_1/tspc_1/Z2 0.14fF +C342 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF +C343 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF +C344 divider_0/nor_0/B divider_0/tspc_2/Z3 0.38fF +C345 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF +C346 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.04fF +C347 pll_full_1/ro_complete_0/cbank_1/switch_0/vin pll_full_1/vco 1.58fF +C348 div_pd_buffered_0/tapered_buf_2/a_n10_230# div_pd_buffered_0/tapered_buf_2/a_160_230# 0.09fF +C349 divider_1/nor_1/B divider_1/nor_0/B 0.47fF +C350 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/Q 0.04fF +C351 divider_1/prescaler_0/tspc_1/Z3 divider_1/clk 0.45fF +C352 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.09fF +C353 ro_complete_buffered_0/tapered_buf_4/a_4670_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 29.21fF +C354 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/pd_0/DOWN 0.19fF +C355 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/tapered_buf_1/in 0.02fF +C356 div_pd_buffered_0/tapered_buf_0/a_4670_0# div_pd_buffered_0/tapered_buf_0/a_1650_0# 4.78fF +C357 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/a_210_n610# 0.22fF +C358 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z3 0.06fF +C359 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/in 0.02fF +C360 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF +C361 ro_complete_buffered_0/tapered_buf_1/a_160_n140# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.35fF +C362 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF +C363 divider_1/tspc_0/Z1 divider_1/nor_1/A 0.03fF +C364 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF +C365 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF +C366 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF +C367 div_pd_buffered_0/tapered_buf_2/in div_pd_buffered_0/tapered_buf_2/a_n10_n140# 0.04fF +C368 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF +C369 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/a_160_230# 0.09fF +C370 cp_buffered_0/tapered_buf_1/a_4670_0# cp_buffered_0/tapered_buf_1/a_210_n610# 29.21fF +C371 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a1 0.14fF +C372 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF +C373 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a3 0.09fF +C374 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z3 0.65fF +C375 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/D 0.03fF +C376 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.02fF +C377 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 0.22fF +C378 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF +C379 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/and_pd_0/Out1 0.05fF +C380 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/tspc_r_1/Qbar 0.01fF +C381 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/R 0.27fF +C382 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/nor_1/B 1.21fF +C383 divider_0/nor_1/A divider_0/tspc_0/Z1 0.03fF +C384 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z3 0.33fF +C385 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF +C386 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF +C387 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z2 0.11fF +C388 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C389 divider_1/prescaler_0/Out divider_1/tspc_0/Z3 0.45fF +C390 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z1 0.00fF +C391 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z4 0.15fF +C392 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF +C393 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF +C394 divider_1/nor_1/A divider_1/prescaler_0/tspc_1/Q 0.03fF +C395 divider_1/tspc_1/Z1 divider_1/nor_1/B 0.03fF +C396 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/a_160_230# 0.09fF +C397 cp_buffered_0/tapered_buf_0/a_4670_0# cp_buffered_0/tapered_buf_0/a_210_n610# 29.21fF +C398 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z2 0.71fF +C399 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/z5 0.03fF +C400 pll_full_1/ro_complete_0/cbank_2/switch_0/vin pll_full_1/ro_complete_0/cbank_2/v 1.45fF +C401 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF +C402 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF +C403 divider_0/nor_0/Z1 divider_0/nor_1/B 0.18fF +C404 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_1650_0# 1.27fF +C405 pll_full_1/pd_0/tspc_r_0/Qbar pll_full_1/pd_0/DOWN 0.02fF +C406 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C407 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/a_630_n680# 0.12fF +C408 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_210_n610# 0.84fF +C409 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_n10_n140# 0.05fF +C410 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/a_630_n680# 0.19fF +C411 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z3 0.11fF +C412 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z3 0.33fF +C413 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF +C414 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF +C415 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/div 0.05fF +C416 divider_1/mc2 divider_1/nor_1/B 0.06fF +C417 divider_0/and_0/OUT divider_0/clk 0.04fF +C418 cp_buffered_0/cp_0/a_10_n50# cp_buffered_0/cp_0/a_1710_0# 0.04fF +C419 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.14fF +C420 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C421 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/div 0.65fF +C422 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_1650_0# 1.27fF +C423 divider_1/prescaler_0/tspc_2/Z4 divider_1/prescaler_0/tspc_2/D 0.11fF +C424 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.03fF +C425 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z2 0.36fF +C426 pll_full_1/div pll_full_1/vco 2.26fF +C427 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_1650_0# 1.27fF +C428 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF +C429 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF +C430 pll_full_1/pd_0/tspc_r_0/Qbar pll_full_1/pd_0/R 0.03fF +C431 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF +C432 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/and_0/B 0.08fF +C433 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/nor_0/B 0.22fF +C434 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.19fF +C435 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/clk 0.01fF +C436 divider_0/nor_1/A divider_0/and_0/B 0.08fF +C437 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF +C438 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF +C439 div_pd_buffered_0/tapered_buf_3/in div_pd_buffered_0/tapered_buf_3/a_n10_n140# 0.04fF +C440 divider_1/tspc_0/Z1 divider_1/tspc_0/Z3 0.06fF +C441 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF +C442 divider_0/tspc_1/Z3 divider_0/tspc_1/Q 0.05fF +C443 divider_1/tspc_0/Q divider_1/tspc_1/Z4 0.15fF +C444 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF +C445 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z3 0.16fF +C446 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/out 0.61fF +C447 divider_1/prescaler_0/tspc_2/Z3 divider_1/clk 0.45fF +C448 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/Qbar 0.01fF +C449 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Q 0.55fF +C450 pll_full_1/ro_complete_0/cbank_1/switch_5/vin pll_full_1/vco 1.46fF +C451 divider_0/nor_1/A divider_0/prescaler_0/m1_2700_2190# 0.01fF +C452 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C453 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/nor_0/B 0.42fF +C454 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# 0.05fF +C455 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.03fF +C456 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/nor_1/A 0.35fF +C457 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF +C458 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF +C459 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z2 0.40fF +C460 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D div_pd_buffered_0/divider_0/clk 0.29fF +C461 ro_complete_buffered_0/tapered_buf_1/a_160_n140# ro_complete_buffered_0/tapered_buf_1/in 0.19fF +C462 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 2.89fF +C463 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF +C464 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C465 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z4 0.02fF +C466 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C467 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/vco 0.45fF +C468 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z2 0.25fF +C469 pll_full_1/ref pll_full_1/pd_0/tspc_r_0/Z1 0.17fF +C470 divider_1/prescaler_0/Out divider_1/clk 0.51fF +C471 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.15fF +C472 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Z4 0.65fF +C473 ro_complete_0/a3 ro_complete_0/cbank_2/switch_1/vin 0.13fF +C474 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF +C475 pll_full_0/cp_0/down pll_full_0/cp_0/a_1710_0# 0.32fF +C476 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z1 0.01fF +C477 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/Q 0.22fF +C478 io_clamp_high[1] io_analog[5] 0.53fF +C479 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF +C480 divider_0/mc2 divider_0/and_0/B 0.20fF +C481 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF +C482 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Q 0.04fF +C483 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.06fF +C484 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF +C485 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.38fF +C486 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.11fF +C487 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/clk 0.11fF +C488 div_pd_buffered_0/tapered_buf_2/a_580_0# div_pd_buffered_0/tapered_buf_2/a_160_230# 0.02fF +C489 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF +C490 divider_0/tspc_1/Q divider_0/tspc_2/Z3 0.45fF +C491 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Q 0.04fF +C492 divider_1/nor_1/B divider_1/tspc_1/Q 0.51fF +C493 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z4 0.00fF +C494 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Q 0.21fF +C495 divider_1/prescaler_0/tspc_1/Z2 divider_1/clk 0.11fF +C496 pll_full_0/pd_0/DOWN pll_full_0/ref 1.48fF +C497 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C498 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/and_0/A 0.80fF +C499 pll_full_1/ro_complete_0/cbank_2/switch_5/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF +C500 divider_1/and_0/B divider_1/and_0/Z1 0.07fF +C501 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/in 0.19fF +C502 ro_complete_0/a4 ro_complete_0/cbank_2/v 0.05fF +C503 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF +C504 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z4 0.12fF +C505 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z2 1.07fF +C506 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z3 0.38fF +C507 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C508 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 2.89fF +C509 ro_complete_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.17fF +C510 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF +C511 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/nor_0/B 0.47fF +C512 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Z3 0.05fF +C513 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF +C514 divider_0/tspc_1/a_630_n680# divider_0/nor_0/B 0.00fF +C515 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF +C516 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF +C517 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF +C518 divider_0/nor_0/B divider_0/tspc_2/Z4 0.22fF +C519 divider_1/nor_1/B divider_1/tspc_2/Z2 0.20fF +C520 divider_1/prescaler_0/tspc_1/Z4 divider_1/clk 0.12fF +C521 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Z4 0.12fF +C522 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z2 0.01fF +C523 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/a_n10_n140# 0.01fF +C524 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF +C525 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/Z1 0.36fF +C526 div_pd_buffered_0/tapered_buf_1/a_4670_0# div_pd_buffered_0/tapered_buf_1/a_210_n610# 29.21fF +C527 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z3 0.65fF +C528 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/tapered_buf_1/in 0.05fF +C529 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_0/Q 0.01fF +C530 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF +C531 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/out1 0.31fF +C532 div_pd_buffered_0/divider_0/tspc_1/Z4 div_pd_buffered_0/divider_0/tspc_0/Q 0.15fF +C533 pll_full_1/ref pll_full_1/pd_0/tspc_r_0/Z4 0.02fF +C534 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF +C535 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF +C536 cp_buffered_0/cp_0/a_1710_0# cp_buffered_0/cp_0/down 0.32fF +C537 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z1 0.09fF +C538 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C539 div_pd_buffered_0/tapered_buf_3/a_n10_230# div_pd_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF +C540 divider_1/nor_1/A divider_1/tspc_1/Z2 0.15fF +C541 divider_1/mc2 divider_1/and_0/out1 0.06fF +C542 divider_0/and_0/A divider_0/and_0/B 0.18fF +C543 divider_1/tspc_2/a_630_n680# divider_1/nor_0/B 0.35fF +C544 divider_1/prescaler_0/tspc_1/Q divider_1/clk 0.60fF +C545 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a1 0.14fF +C546 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/nand_0/z1 0.01fF +C547 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/vco 0.11fF +C548 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/R 0.36fF +C549 div_pd_buffered_0/pd_0/tspc_r_1/Z1 div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.71fF +C550 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.20fF +C551 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF +C552 ro_complete_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_5/a_4670_0# 4.78fF +C553 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF +C554 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF +C555 divider_0/nor_1/A divider_0/tspc_0/a_630_n680# 0.35fF +C556 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z4 0.08fF +C557 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/a_n10_230# 0.01fF +C558 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/out1 0.06fF +C559 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/Z4 0.36fF +C560 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/Q 0.05fF +C561 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/nor_1/B 0.35fF +C562 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Z2 0.01fF +C563 div_pd_buffered_0/tapered_buf_3/a_4670_0# div_pd_buffered_0/tapered_buf_3/a_210_n610# 29.21fF +C564 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z2 0.19fF +C565 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z3 0.65fF +C566 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/vco 0.45fF +C567 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/and_0/B 0.29fF +C568 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C569 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_0/z1 0.24fF +C570 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF +C571 pll_full_1/filter_0/a_4216_n5230# pll_full_1/vco 1.58fF +C572 divider_1/tspc_1/Z3 divider_1/nor_1/B 0.38fF +C573 divider_1/tspc_0/Z2 divider_1/tspc_0/Z4 0.36fF +C574 ro_complete_0/a5 ro_complete_0/cbank_2/switch_0/vin 0.09fF +C575 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/div 0.03fF +C576 pll_full_1/divider_0/and_0/OUT pll_full_1/vco 0.06fF +C577 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/UP 0.03fF +C578 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.17fF +C579 ro_complete_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_6/a_4670_0# 4.78fF +C580 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C581 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C582 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/a_740_n680# 0.08fF +C583 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF +C584 pll_full_0/ro_complete_0/a4 pll_full_0/vco 0.01fF +C585 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.05fF +C586 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z4 0.28fF +C587 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/cp_0/upbar 26.29fF +C588 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Qbar1 0.30fF +C589 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/switch_5/vin 0.20fF +C590 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.26fF +C591 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/vco 0.64fF +C592 divider_1/nor_1/A divider_1/and_0/A 0.01fF +C593 ro_complete_0/a1 ro_complete_0/cbank_2/v 0.05fF +C594 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z1 0.09fF +C595 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.19fF +C596 div_pd_buffered_0/tapered_buf_4/a_n10_n140# div_pd_buffered_0/pd_0/DOWN 0.04fF +C597 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF +C598 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.12fF +C599 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF +C600 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.17fF +C601 ro_complete_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_7/a_4670_0# 4.78fF +C602 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/ro_complete_0/a1 26.29fF +C603 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/nor_1/A 0.15fF +C604 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF +C605 div_pd_buffered_0/tapered_buf_2/a_4670_0# div_pd_buffered_0/tapered_buf_2/a_1650_0# 4.78fF +C606 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF +C607 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C608 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF +C609 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C610 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z2 0.14fF +C611 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.32fF +C612 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF +C613 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Q 0.91fF +C614 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF +C615 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/z5 0.04fF +C616 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.19fF +C617 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF +C618 pll_full_1/pd_0/tspc_r_1/z5 pll_full_1/div 0.04fF +C619 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z4 0.36fF +C620 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.15fF +C621 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/and_0/A 0.01fF +C622 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 0.84fF +C623 divider_1/nor_1/B divider_1/and_0/B 0.31fF +C624 divider_1/prescaler_0/tspc_2/Z4 divider_1/clk 0.12fF +C625 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/R 0.03fF +C626 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Qbar1 0.20fF +C627 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/nor_1/B 0.38fF +C628 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C629 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF +C630 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C631 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/pd_0/DOWN 0.02fF +C632 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z2 0.01fF +C633 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/tapered_buf_1/in 0.05fF +C634 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z3 0.06fF +C635 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/vco 0.12fF +C636 pll_full_1/pd_0/DOWN pll_full_1/pd_0/UP 4.58fF +C637 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z3 0.06fF +C638 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF +C639 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF +C640 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF +C641 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z4 0.21fF +C642 divider_1/nor_1/A divider_1/tspc_1/Z4 0.02fF +C643 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF +C644 ro_complete_0/a2 ro_complete_0/cbank_1/v 0.05fF +C645 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/a0 0.13fF +C646 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z3 0.45fF +C647 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Q 0.04fF +C648 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/A 0.26fF +C649 io_clamp_low[0] io_analog[4] 0.53fF +C650 div_pd_buffered_0/pd_0/tspc_r_0/z5 div_pd_buffered_0/pd_0/UP 0.03fF +C651 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF +C652 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Q 0.51fF +C653 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF +C654 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF +C655 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.04fF +C656 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/clk 0.51fF +C657 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF +C658 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF +C659 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF +C660 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C661 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF +C662 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Q 0.04fF +C663 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF +C664 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/B 0.35fF +C665 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/vco 0.60fF +C666 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/R 0.29fF +C667 pll_full_1/pd_0/R pll_full_1/pd_0/UP 0.46fF +C668 divider_0/tspc_1/Q divider_0/tspc_2/Z4 0.15fF +C669 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/in 0.04fF +C670 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_4/vin 0.20fF +C671 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_1/Z4 0.02fF +C672 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.36fF +C673 div_pd_buffered_0/tapered_buf_3/a_160_n140# div_pd_buffered_0/tapered_buf_3/a_n10_n140# 0.05fF +C674 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Z4 0.65fF +C675 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.43fF +C676 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z3 0.16fF +C677 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z4 0.22fF +C678 div_pd_buffered_0/tapered_buf_1/a_n10_n140# div_pd_buffered_0/tapered_buf_1/in 0.04fF +C679 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_1/A 0.04fF +C680 div_pd_buffered_0/pd_0/and_pd_0/Z1 div_pd_buffered_0/pd_0/UP 0.06fF +C681 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_2/Z2 0.20fF +C682 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a3 2.04fF +C683 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/in 0.04fF +C684 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.22fF +C685 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF +C686 pll_full_0/ro_complete_0/a1 pll_full_0/vco 0.11fF +C687 divider_1/tspc_1/a_630_n680# divider_1/nor_0/B 0.00fF +C688 divider_0/nor_1/B divider_0/nor_0/B 0.47fF +C689 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF +C690 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF +C691 divider_0/tspc_2/Z3 divider_0/Out 0.05fF +C692 pll_full_1/pd_0/R pll_full_1/div 0.51fF +C693 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_1/Z4 0.21fF +C694 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF +C695 pll_full_1/ro_complete_0/a0 pll_full_1/vco 0.11fF +C696 divider_1/tspc_1/Q divider_1/tspc_2/a_630_n680# 0.01fF +C697 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF +C698 pll_full_1/divider_0/and_0/A pll_full_1/divider_0/and_0/B 0.18fF +C699 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/divider_0/mc2 0.34fF +C700 div_pd_buffered_0/tapered_buf_0/a_160_230# div_pd_buffered_0/tapered_buf_0/a_160_n140# 0.17fF +C701 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/pd_0/UP 0.02fF +C702 divider_0/mc2 divider_0/and_0/OUT 0.05fF +C703 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF +C704 pll_full_1/pd_0/DOWN pll_full_1/pd_0/and_pd_0/Out1 0.12fF +C705 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/a0 3.46fF +C706 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF +C707 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_0/Q 0.45fF +C708 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF +C709 divider_1/and_0/OUT divider_1/and_0/Z1 0.04fF +C710 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z2 0.01fF +C711 divider_1/prescaler_0/tspc_2/Q divider_1/clk 0.05fF +C712 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_580_0# 0.02fF +C713 ro_complete_0/a4 ro_complete_0/cbank_2/switch_1/vin 0.09fF +C714 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF +C715 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/divider_0/prescaler_0/nand_0/z1 0.24fF +C716 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/in 0.19fF +C717 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF +C718 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.20fF +C719 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF +C720 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/div 0.19fF +C721 pll_full_1/pd_0/R pll_full_1/pd_0/and_pd_0/Out1 0.33fF +C722 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C723 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z3 0.16fF +C724 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/vco 0.12fF +C725 cp_buffered_0/tapered_buf_2/a_580_0# cp_buffered_0/tapered_buf_2/a_160_230# 0.02fF +C726 cp_buffered_0/tapered_buf_2/a_160_n140# cp_buffered_0/tapered_buf_2/a_210_n610# 0.22fF +C727 io_clamp_low[2] io_clamp_high[2] 0.53fF +C728 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/Q 0.04fF +C729 divider_1/nor_1/Z1 divider_1/and_0/B 0.18fF +C730 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.13fF +C731 div_pd_buffered_0/tapered_buf_4/a_210_n610# div_pd_buffered_0/tapered_buf_4/a_160_n140# 0.22fF +C732 divider_1/and_0/out1 divider_1/and_0/B 0.18fF +C733 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF +C734 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/vco 0.26fF +C735 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_n10_n140# 0.05fF +C736 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 0.84fF +C737 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C738 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/pd_0/tspc_r_1/Z3 0.09fF +C739 div_pd_buffered_0/pd_0/and_pd_0/Out1 div_pd_buffered_0/pd_0/and_pd_0/Z1 0.18fF +C740 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF +C741 div_pd_buffered_0/tapered_buf_0/a_580_0# div_pd_buffered_0/tapered_buf_0/a_1650_0# 1.27fF +C742 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.20fF +C743 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.09fF +C744 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF +C745 divider_0/prescaler_0/Out divider_0/tspc_0/Z4 0.12fF +C746 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.09fF +C747 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C748 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Q 0.05fF +C749 ro_complete_buffered_0/tapered_buf_3/a_1650_0# ro_complete_buffered_0/tapered_buf_3/a_4670_0# 4.78fF +C750 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z3 0.45fF +C751 pll_full_1/ro_complete_0/a3 pll_full_1/vco 0.11fF +C752 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF +C753 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF +C754 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_n10_n140# 0.05fF +C755 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 0.84fF +C756 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C757 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C758 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF +C759 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/and_0/B 0.31fF +C760 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.22fF +C761 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.04fF +C762 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C763 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/vco 0.14fF +C764 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_210_n610# 0.22fF +C765 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF +C766 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/D 0.09fF +C767 divider_1/mc2 divider_1/nor_0/B 0.15fF +C768 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.11fF +C769 ro_complete_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_2/a_580_0# 1.27fF +C770 ro_complete_0/a4 ro_complete_0/cbank_1/switch_1/vin 0.09fF +C771 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.05fF +C772 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.12fF +C773 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF +C774 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_4670_0# 4.78fF +C775 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z2 0.15fF +C776 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF +C777 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/in 0.19fF +C778 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/nor_1/B 0.01fF +C779 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.91fF +C780 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C781 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_0/B 0.15fF +C782 divider_0/nor_1/B divider_0/tspc_1/Z2 0.30fF +C783 ro_complete_buffered_0/tapered_buf_1/a_4670_0# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 4.78fF +C784 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z4 0.00fF +C785 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF +C786 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_1/switch_3/vin 0.09fF +C787 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF +C788 divider_0/prescaler_0/Out divider_0/clk 0.51fF +C789 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z2 0.21fF +C790 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z3 0.06fF +C791 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z2 0.11fF +C792 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C793 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF +C794 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z4 0.15fF +C795 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF +C796 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a4 0.12fF +C797 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF +C798 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_1/B 0.30fF +C799 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF +C800 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C801 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Q 0.04fF +C802 divider_0/nor_1/B divider_0/tspc_1/Q 0.51fF +C803 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF +C804 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF +C805 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF +C806 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/vco 0.05fF +C807 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.45fF +C808 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/Qbar 0.02fF +C809 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/a_630_n680# 0.12fF +C810 ro_complete_0/a5 ro_complete_0/cbank_2/v 0.08fF +C811 ro_complete_0/a0 ro_complete_0/cbank_1/switch_5/vin 0.09fF +C812 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z4 0.36fF +C813 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/div 0.05fF +C814 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF +C815 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C816 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/clk 0.11fF +C817 divider_0/nor_1/B divider_0/tspc_2/Z2 0.20fF +C818 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF +C819 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF +C820 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.09fF +C821 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/div 0.02fF +C822 divider_1/tspc_0/Q divider_1/nor_1/B 0.22fF +C823 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF +C824 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.06fF +C825 divider_1/tspc_1/Q divider_1/nor_0/B 0.22fF +C826 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_2/Q 0.19fF +C827 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/clk 0.01fF +C828 div_pd_buffered_0/pd_0/tspc_r_0/Z4 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF +C829 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF +C830 pll_full_0/filter_0/a_4216_n5230# pll_full_0/vco 1.58fF +C831 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C832 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF +C833 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_1/in 0.10fF +C834 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/a0 0.09fF +C835 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_0/B 0.00fF +C836 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF +C837 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF +C838 filter_0/v filter_0/a_4216_n2998# 0.36fF +C839 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF +C840 divider_0/and_0/B divider_0/and_0/Z1 0.07fF +C841 ro_complete_buffered_0/tapered_buf_3/a_1650_0# ro_complete_buffered_0/tapered_buf_3/a_210_n610# 2.89fF +C842 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_580_0# 0.84fF +C843 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/UP 0.11fF +C844 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_2/Z4 0.02fF +C845 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF +C846 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/vco 0.45fF +C847 div_pd_buffered_0/tapered_buf_4/out div_pd_buffered_0/tapered_buf_4/a_210_n610# 26.29fF +C848 divider_1/tspc_2/a_630_n680# divider_1/Out 0.04fF +C849 divider_1/nor_0/B divider_1/tspc_2/Z2 0.40fF +C850 divider_1/prescaler_0/tspc_0/D divider_1/clk 0.29fF +C851 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Qbar1 0.38fF +C852 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/UP 0.11fF +C853 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.09fF +C854 ro_complete_buffered_0/tapered_buf_5/a_4670_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 29.21fF +C855 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF +C856 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF +C857 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF +C858 ro_complete_buffered_0/tapered_buf_7/a_210_n610# ro_complete_buffered_0/ro_complete_0/a5 26.29fF +C859 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z1 0.03fF +C860 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF +C861 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C862 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z3 0.05fF +C863 cp_buffered_0/tapered_buf_2/a_1650_0# cp_buffered_0/tapered_buf_2/a_210_n610# 2.89fF +C864 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_4/vin 0.20fF +C865 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_0/Qbar1 0.20fF +C866 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.03fF +C867 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z3 0.33fF +C868 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF +C869 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.09fF +C870 ro_complete_buffered_0/tapered_buf_6/a_4670_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 29.21fF +C871 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF +C872 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C873 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_4670_0# 29.21fF +C874 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF +C875 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF +C876 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF +C877 pll_full_0/ro_complete_0/a5 pll_full_0/vco 0.15fF +C878 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z1 0.08fF +C879 divider_0/tspc_2/a_630_n680# divider_0/nor_0/B 0.35fF +C880 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF +C881 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/in 0.19fF +C882 ro_complete_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_2/a_210_n610# 2.89fF +C883 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF +C884 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.02fF +C885 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z4 0.01fF +C886 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.09fF +C887 ro_complete_buffered_0/tapered_buf_7/a_4670_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 29.21fF +C888 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C889 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/DOWN 0.12fF +C890 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.01fF +C891 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/clk 0.11fF +C892 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF +C893 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z3 0.38fF +C894 divider_0/nor_1/B divider_0/and_0/B 0.31fF +C895 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Q 0.91fF +C896 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/UP 0.03fF +C897 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF +C898 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_0/Q 0.01fF +C899 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.11fF +C900 divider_1/and_0/OUT divider_1/and_0/out1 0.31fF +C901 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/DOWN 0.03fF +C902 pll_full_1/pd_0/tspc_r_0/Qbar pll_full_1/pd_0/and_pd_0/Z1 0.02fF +C903 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF +C904 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.09fF +C905 divider_0/nor_1/A divider_0/tspc_0/Z4 0.21fF +C906 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.01fF +C907 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF +C908 pll_full_0/pd_0/and_pd_0/Z1 pll_full_0/pd_0/DOWN 0.07fF +C909 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_0/Qbar1 0.30fF +C910 div_pd_buffered_0/divider_0/tspc_2/Z3 div_pd_buffered_0/divider_0/tspc_2/Z4 0.65fF +C911 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/in 0.19fF +C912 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF +C913 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/tapered_buf_1/in 1.27fF +C914 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_0/B 0.22fF +C915 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF +C916 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/vco 0.01fF +C917 pll_full_0/pd_0/R pll_full_0/pd_0/DOWN 0.36fF +C918 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/z5 0.11fF +C919 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a4 0.12fF +C920 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_3/vin 0.09fF +C921 divider_1/tspc_0/a_630_n680# divider_1/nor_1/B 0.01fF +C922 divider_1/tspc_1/Z1 divider_1/tspc_1/Z3 0.06fF +C923 ro_complete_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_2/a_4670_0# 4.78fF +C924 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/vco 0.45fF +C925 pll_full_1/cp_0/a_1710_0# pll_full_1/pd_0/DOWN 0.04fF +C926 divider_1/nor_0/B divider_1/and_0/B 0.29fF +C927 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C928 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C929 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF +C930 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C931 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF +C932 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.05fF +C933 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF +C934 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z2 0.23fF +C935 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C936 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/vco 1.46fF +C937 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/div 0.04fF +C938 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z2 0.40fF +C939 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/vco 0.29fF +C940 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/a_630_n680# 0.01fF +C941 divider_0/tspc_0/Z2 divider_0/tspc_0/Z3 0.16fF +C942 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF +C943 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C944 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C945 div_pd_buffered_0/tapered_buf_2/a_n10_n140# div_pd_buffered_0/tapered_buf_2/a_n10_230# 0.01fF +C946 divider_1/prescaler_0/tspc_2/Z2 divider_1/and_0/OUT 0.05fF +C947 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z2 0.25fF +C948 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/ref 0.19fF +C949 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.65fF +C950 pll_full_1/ro_complete_0/a4 pll_full_1/vco 0.01fF +C951 ro_complete_0/a0 ro_complete_0/cbank_1/v 0.05fF +C952 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF +C953 pll_full_0/pd_0/tspc_r_1/z5 pll_full_0/div 0.04fF +C954 div_pd_buffered_0/tapered_buf_1/a_n10_n140# div_pd_buffered_0/tapered_buf_1/a_n10_230# 0.01fF +C955 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_1/B 0.06fF +C956 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF +C957 pll_full_1/cp_0/down pll_full_1/cp_0/upbar 0.02fF +C958 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.04fF +C959 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF +C960 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/vco 1.27fF +C961 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF +C962 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/nor_1/A 0.15fF +C963 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/a0 0.09fF +C964 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/z5 0.11fF +C965 divider_1/tspc_1/Q divider_1/tspc_2/Z2 0.14fF +C966 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_0/D 0.32fF +C967 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/clk 0.01fF +C968 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.00fF +C969 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF +C970 ro_complete_buffered_0/tapered_buf_4/a_n10_n140# ro_complete_buffered_0/tapered_buf_4/in 0.04fF +C971 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.45fF +C972 pll_full_1/divider_0/and_0/B pll_full_1/divider_0/and_0/Z1 0.07fF +C973 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/R 0.61fF +C974 divider_0/nor_1/A divider_0/prescaler_0/Out 0.15fF +C975 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF +C976 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_1/z5 0.02fF +C977 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/B 0.01fF +C978 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C979 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/nor_0/B 0.47fF +C980 divider_1/nor_0/Z1 divider_1/nor_1/B 0.18fF +C981 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z1 1.07fF +C982 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF +C983 cp_buffered_0/tapered_buf_1/a_210_n610# cp_buffered_0/cp_0/out 26.29fF +C984 cp_buffered_0/tapered_buf_1/a_n10_n140# cp_buffered_0/tapered_buf_1/in 0.04fF +C985 divider_1/nor_1/A divider_1/nor_1/B 1.21fF +C986 divider_1/mc2 divider_1/and_0/B 0.20fF +C987 divider_1/tspc_2/Z1 divider_1/tspc_2/Z3 0.06fF +C988 divider_1/nor_0/B divider_1/Out 0.22fF +C989 ro_complete_0/a2 ro_complete_0/cbank_2/switch_2/vin 0.14fF +C990 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF +C991 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z3 0.06fF +C992 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 pll_full_1/vco 0.12fF +C993 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/a_n10_n140# 0.01fF +C994 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF +C995 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C996 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/B 0.20fF +C997 divider_0/nor_1/B divider_0/tspc_0/a_630_n680# 0.01fF +C998 divider_0/nor_1/Z1 divider_0/and_0/B 0.18fF +C999 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF +C1000 pll_full_0/divider_0/tspc_1/Z4 pll_full_0/divider_0/tspc_0/Q 0.15fF +C1001 cp_buffered_0/tapered_buf_2/a_160_n140# cp_buffered_0/tapered_buf_2/in 0.19fF +C1002 io_clamp_low[1] io_clamp_high[1] 0.53fF +C1003 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a3 0.13fF +C1004 divider_0/tspc_1/Q divider_0/tspc_2/a_630_n680# 0.01fF +C1005 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF +C1006 cp_buffered_0/tapered_buf_0/a_210_n610# cp_buffered_0/cp_0/down 26.29fF +C1007 cp_buffered_0/tapered_buf_0/a_n10_n140# cp_buffered_0/tapered_buf_0/in 0.04fF +C1008 divider_1/tspc_1/Z2 divider_1/tspc_1/Z4 0.36fF +C1009 divider_1/tspc_1/Z3 divider_1/tspc_1/Q 0.05fF +C1010 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z3 0.05fF +C1011 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z4 0.08fF +C1012 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/a_630_n680# 0.01fF +C1013 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C1014 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.05fF +C1015 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.17fF +C1016 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_4670_0# 4.78fF +C1017 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_4670_0# 29.21fF +C1018 ro_complete_0/a3 ro_complete_0/cbank_1/v 0.05fF +C1019 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z1 0.17fF +C1020 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/nor_0/B 0.35fF +C1021 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/vco 0.60fF +C1022 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/a_n10_n140# 0.01fF +C1023 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF +C1024 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF +C1025 divider_0/nor_0/Z1 divider_0/and_0/B 0.78fF +C1026 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.22fF +C1027 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF +C1028 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/vco 0.11fF +C1029 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_210_n610# 0.22fF +C1030 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/and_0/A 0.80fF +C1031 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z3 0.11fF +C1032 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.29fF +C1033 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF +C1034 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF +C1035 divider_0/prescaler_0/tspc_2/Q divider_0/clk 0.05fF +C1036 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_160_230# 0.17fF +C1037 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/clk 0.01fF C1038 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z2 1.07fF C1039 pll_full_1/ro_complete_0/a1 pll_full_1/vco 0.11fF -C1040 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_2/Z2 0.20fF -C1041 divider_0/nor_1/B divider_0/nor_0/B 0.47fF -C1042 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF -C1043 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_580_0# 1.27fF -C1044 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF -C1045 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF -C1046 divider_0/tspc_2/Z3 divider_0/Out 0.05fF -C1047 pll_full_0/pd_0/R pll_full_0/div 0.51fF -C1048 pd_buffered_0/tapered_buf_2/a_1650_0# pd_buffered_0/tapered_buf_2/a_210_n610# 2.89fF -C1049 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z4 0.21fF -C1050 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C1051 pll_full_0/ro_complete_0/a0 pll_full_0/vco 0.11fF -C1052 divider_1/tspc_1/Q divider_1/tspc_2/a_630_n680# 0.01fF -C1053 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/divider_0/mc2 0.34fF -C1054 div_pd_buffered_0/tapered_buf_0/a_160_230# div_pd_buffered_0/tapered_buf_0/a_160_n140# 0.17fF -C1055 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/pd_0/UP 0.02fF -C1056 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF -C1057 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/a2 0.14fF -C1058 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.13fF -C1059 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/Out 0.11fF -C1060 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/a0 3.46fF -C1061 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF -C1062 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_0/Q 0.45fF -C1063 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF -C1064 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF -C1065 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_n10_n140# 0.05fF -C1066 divider_1/tspc_0/Q divider_1/tspc_1/Z4 0.15fF -C1067 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF -C1068 divider_1/and_0/OUT divider_1/and_0/Z1 0.04fF -C1069 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z2 0.01fF -C1070 divider_1/prescaler_0/tspc_2/Q divider_1/clk 0.05fF -C1071 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.20fF +C1040 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.11fF +C1041 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/a_n10_n140# 0.01fF +C1042 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF +C1043 div_pd_buffered_0/tapered_buf_3/a_160_230# div_pd_buffered_0/tapered_buf_3/a_n10_230# 0.09fF +C1044 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF +C1045 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/z5 0.11fF +C1046 div_pd_buffered_0/tapered_buf_1/a_n10_230# div_pd_buffered_0/tapered_buf_1/a_160_230# 0.09fF +C1047 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.21fF +C1048 divider_1/prescaler_0/m1_2700_2190# divider_1/and_0/OUT 0.14fF +C1049 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF +C1050 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_160_230# 0.02fF +C1051 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_210_n610# 0.22fF +C1052 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.13fF +C1053 divider_0/and_0/out1 divider_0/and_0/B 0.18fF +C1054 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.17fF +C1055 pll_full_1/cp_0/a_1710_0# pll_full_1/cp_0/down 0.32fF +C1056 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/tapered_buf_0/a_160_230# 0.09fF +C1057 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_0/Q 0.45fF +C1058 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z2 0.25fF +C1059 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z1 0.09fF +C1060 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.19fF +C1061 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_1650_0# 1.27fF +C1062 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF +C1063 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C1064 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_160_230# 0.02fF +C1065 div_pd_buffered_0/tapered_buf_1/a_4670_0# div_pd_buffered_0/tapered_buf_1/a_1650_0# 4.78fF +C1066 div_pd_buffered_0/tapered_buf_3/in div_pd_buffered_0/tapered_buf_3/a_n10_230# 0.02fF +C1067 ro_complete_buffered_0/tapered_buf_0/in ro_complete_buffered_0/tapered_buf_0/a_n10_n140# 0.04fF +C1068 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z2 0.14fF +C1069 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z3 0.05fF +C1070 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF +C1071 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/vco 0.01fF C1072 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_3/vin 0.09fF -C1073 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF -C1074 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/div 0.19fF -C1075 divider_0/nor_1/A divider_0/prescaler_0/tspc_1/Q 0.03fF -C1076 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C1077 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/tspc_0/Z3 0.16fF -C1078 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/vco 0.12fF -C1079 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF -C1080 io_clamp_low[2] io_clamp_high[2] 0.53fF -C1081 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/Q 0.04fF -C1082 divider_1/nor_1/A divider_1/nor_1/B 1.21fF -C1083 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF -C1084 io_clamp_high[1] io_analog[5] 0.53fF -C1085 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/vco 0.26fF -C1086 divider_1/and_0/out1 divider_1/and_0/B 0.18fF -C1087 cp_buffered_0/tapered_buf_2/a_n10_230# cp_buffered_0/tapered_buf_2/a_160_230# 0.09fF -C1088 pd_buffered_0/tapered_buf_2/a_n10_n140# pd_buffered_0/tapered_buf_2/in 0.04fF -C1089 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 0.84fF -C1090 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_n10_n140# 0.05fF -C1091 div_pd_buffered_0/pd_0/and_pd_0/Out1 div_pd_buffered_0/pd_0/and_pd_0/Z1 0.18fF -C1092 pd_buffered_0/pd_0/tspc_r_1/Z2 pd_buffered_0/pd_0/tspc_r_1/Z4 0.14fF -C1093 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.16fF -C1094 div_pd_buffered_0/tapered_buf_0/a_580_0# div_pd_buffered_0/tapered_buf_0/a_1650_0# 1.27fF -C1095 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.20fF -C1096 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.09fF -C1097 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF -C1098 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/a_160_230# 0.09fF -C1099 cp_buffered_0/tapered_buf_1/a_4670_0# cp_buffered_0/tapered_buf_1/a_210_n610# 29.21fF -C1100 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z4 0.00fF -C1101 div_pd_buffered_0/tapered_buf_2/a_580_0# div_pd_buffered_0/tapered_buf_2/a_210_n610# 0.84fF -C1102 divider_0/prescaler_0/Out divider_0/tspc_0/Z4 0.12fF -C1103 divider_0/nor_1/A divider_0/tspc_0/Q 0.55fF -C1104 ro_complete_0/a3 ro_complete_0/cbank_2/switch_1/vin 0.13fF -C1105 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z4 0.08fF -C1106 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF -C1107 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C1108 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Q 0.05fF -C1109 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z3 0.45fF -C1110 pll_full_0/ro_complete_0/a3 pll_full_0/vco 0.11fF -C1111 cp_buffered_0/tapered_buf_2/a_1650_0# cp_buffered_0/tapered_buf_2/a_580_0# 1.27fF -C1112 pd_buffered_0/tapered_buf_3/a_210_n610# pd_buffered_0/tapered_buf_3/out 26.29fF -C1113 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 0.84fF -C1114 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_n10_n140# 0.05fF -C1115 ro_complete_buffered_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_3/a_n10_n140# 0.04fF -C1116 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/switch_1/vin 0.19fF -C1117 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF -C1118 cp_buffered_0/tapered_buf_2/in cp_buffered_0/tapered_buf_2/a_160_n140# 0.19fF -C1119 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.00fF -C1120 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/v 0.05fF -C1121 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/and_0/B 0.31fF -C1122 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.22fF -C1123 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.04fF -C1124 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF -C1125 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.45fF -C1126 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.65fF -C1127 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/vco 0.14fF -C1128 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF -C1129 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF -C1130 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Q 0.38fF -C1131 divider_1/tspc_0/Z4 divider_1/tspc_0/a_630_n680# 0.12fF -C1132 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/D 0.09fF -C1133 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF -C1134 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF -C1135 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/switch_1/vin 0.19fF -C1136 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.12fF -C1137 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF -C1138 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z4 0.20fF -C1139 pd_buffered_0/pd_0/tspc_r_0/Z1 pd_buffered_0/pd_0/tspc_r_0/Z2 0.71fF -C1140 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_4670_0# 4.78fF -C1141 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/in 0.19fF -C1142 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/nor_1/B 0.01fF -C1143 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.91fF -C1144 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF -C1145 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_0/B 0.15fF -C1146 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_1/Z2 0.15fF -C1147 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/a_630_n680# 0.01fF -C1148 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z4 0.00fF -C1149 div_pd_buffered_0/tapered_buf_3/a_160_n140# div_pd_buffered_0/tapered_buf_3/a_210_n610# 0.22fF -C1150 divider_0/nor_1/B divider_0/tspc_1/Z2 0.30fF -C1151 ro_complete_buffered_0/tapered_buf_1/a_4670_0# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 4.78fF -C1152 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/a_630_n680# 0.01fF -C1153 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.17fF -C1154 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF -C1155 divider_0/prescaler_0/Out divider_0/clk 0.51fF -C1156 ro_complete_buffered_0/tapered_buf_4/a_n10_n140# ro_complete_buffered_0/tapered_buf_4/in 0.04fF -C1157 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF -C1158 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_1/Z2 0.21fF -C1159 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF -C1160 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z2 0.11fF -C1161 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C1162 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z2 0.71fF -C1163 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z4 0.15fF -C1164 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/a_160_n140# 0.05fF -C1165 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/tapered_buf_0/a_160_230# 0.17fF -C1166 pd_buffered_0/tapered_buf_0/a_1650_0# pd_buffered_0/tapered_buf_0/a_4670_0# 4.78fF -C1167 pd_buffered_0/pd_0/tspc_r_0/Z4 pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF -C1168 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/DOWN 0.11fF -C1169 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z1 0.17fF -C1170 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a4 0.12fF -C1171 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF -C1172 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF -C1173 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF -C1174 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/out 0.61fF -C1175 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/nor_1/B 0.30fF -C1176 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/div 0.17fF -C1177 div_pd_buffered_0/tapered_buf_2/a_580_0# div_pd_buffered_0/tapered_buf_2/a_160_230# 0.02fF -C1178 divider_0/nor_1/B divider_0/tspc_1/Q 0.51fF -C1179 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF -C1180 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/Z1 0.04fF -C1181 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z2 0.01fF -C1182 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/vco 0.05fF -C1183 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.35fF -C1184 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.45fF -C1185 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_0/Qbar 0.02fF -C1186 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/a_630_n680# 0.12fF -C1187 ro_complete_buffered_0/tapered_buf_3/a_n10_230# ro_complete_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF -C1188 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF -C1189 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/div 0.05fF -C1190 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_160_230# 0.02fF -C1191 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_210_n610# 0.22fF -C1192 divider_0/mc2 divider_0/and_0/A 0.16fF -C1193 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z4 0.14fF -C1194 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF -C1195 cp_buffered_0/tapered_buf_0/a_160_230# cp_buffered_0/tapered_buf_0/a_160_n140# 0.17fF -C1196 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C1197 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/clk 0.11fF -C1198 divider_0/nor_1/B divider_0/tspc_2/Z2 0.20fF -C1199 ro_complete_buffered_0/tapered_buf_4/a_160_230# ro_complete_buffered_0/tapered_buf_4/a_160_n140# 0.17fF -C1200 ro_complete_0/a5 ro_complete_0/cbank_2/switch_0/vin 0.09fF -C1201 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/B 0.18fF -C1202 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF -C1203 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF -C1204 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/div 0.02fF -C1205 div_pd_buffered_0/tapered_buf_3/a_n10_230# div_pd_buffered_0/tapered_buf_3/in 0.02fF -C1206 divider_1/tspc_1/Q divider_1/nor_0/B 0.22fF -C1207 divider_1/tspc_1/Z2 divider_1/tspc_1/a_630_n680# 0.01fF -C1208 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_2/Q 0.19fF -C1209 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/clk 0.01fF -C1210 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF -C1211 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF -C1212 div_pd_buffered_0/pd_0/tspc_r_0/Z4 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF -C1213 pll_full_1/filter_0/a_4216_n5230# pll_full_1/vco 1.58fF -C1214 divider_1/tspc_0/Z2 divider_1/tspc_0/a_630_n680# 0.01fF -C1215 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/a4 0.12fF -C1216 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.19fF -C1217 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C1218 filter_0/a_4216_n5230# filter_0/v 0.91fF -C1219 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_1/in 0.10fF -C1220 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/a0 0.09fF -C1221 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_0/B 0.00fF -C1222 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.05fF -C1223 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF -C1224 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 0.22fF -C1225 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C1226 div_pd_buffered_0/tapered_buf_4/a_n10_n140# div_pd_buffered_0/pd_0/DOWN 0.04fF -C1227 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_210_n610# 0.22fF -C1228 divider_0/and_0/B divider_0/and_0/Z1 0.07fF -C1229 divider_1/tspc_2/a_630_n680# divider_1/Out 0.04fF -C1230 divider_1/nor_0/B divider_1/tspc_2/Z2 0.40fF -C1231 divider_1/prescaler_0/tspc_0/D divider_1/clk 0.29fF -C1232 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/UP 0.11fF -C1233 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z4 0.02fF -C1234 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C1235 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/vco 0.45fF -C1236 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/UP 0.11fF -C1237 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.14fF -C1238 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a4 0.09fF -C1239 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a5 0.09fF -C1240 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/tapered_buf_0/in 0.19fF -C1241 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/R 0.29fF -C1242 ro_complete_buffered_0/tapered_buf_7/a_210_n610# ro_complete_buffered_0/ro_complete_0/a5 26.29fF -C1243 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z1 0.03fF -C1244 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.01fF -C1245 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C1246 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF -C1247 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Qbar1 0.20fF -C1248 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF -C1249 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z3 0.33fF -C1250 divider_1/mc2 divider_1/and_0/B 0.20fF -C1251 io_clamp_low[0] io_analog[4] 0.53fF -C1252 div_pd_buffered_0/tapered_buf_2/a_210_n610# div_pd_buffered_0/divider_0/mc2 26.29fF -C1253 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF -C1254 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.09fF -C1255 ro_complete_buffered_0/tapered_buf_6/a_4670_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 29.21fF -C1256 ro_complete_0/a5 ro_complete_0/cbank_0/switch_0/vin 0.09fF -C1257 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/Out 0.05fF -C1258 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_4670_0# 29.21fF -C1259 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF -C1260 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Z4 0.65fF -C1261 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.15fF -C1262 pll_full_1/ro_complete_0/a5 pll_full_1/vco 0.15fF -C1263 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C1264 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF -C1265 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z1 0.08fF -C1266 divider_0/nor_1/A divider_0/and_0/A 0.01fF -C1267 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/a0 0.13fF -C1268 divider_0/tspc_2/a_630_n680# divider_0/nor_0/B 0.35fF -C1269 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF -C1270 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a4 0.12fF -C1271 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.02fF -C1272 ro_complete_0/cbank_2/v ro_complete_0/a2 0.05fF -C1273 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.09fF -C1274 ro_complete_buffered_0/tapered_buf_7/a_4670_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 29.21fF -C1275 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_3/vin 0.20fF -C1276 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.65fF -C1277 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF -C1278 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z3 0.38fF -C1279 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/DOWN 0.12fF -C1280 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.01fF -C1281 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/clk 0.11fF -C1282 divider_0/nor_1/B divider_0/and_0/B 0.31fF -C1283 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Q 0.91fF -C1284 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.43fF -C1285 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/UP 0.03fF -C1286 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_160_230# 0.17fF -C1287 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_0/Q 0.01fF -C1288 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF -C1289 divider_1/and_0/OUT divider_1/and_0/out1 0.31fF -C1290 divider_1/tspc_1/Z4 divider_1/tspc_1/a_630_n680# 0.12fF -C1291 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/DOWN 0.03fF -C1292 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/tspc_r_0/z5 0.20fF -C1293 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF -C1294 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.09fF -C1295 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.01fF -C1296 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.09fF -C1297 divider_0/nor_1/A divider_0/tspc_1/Z4 0.02fF -C1298 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF -C1299 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/tapered_buf_1/in 1.27fF -C1300 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/nor_0/B 0.22fF -C1301 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.19fF -C1302 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/vco 0.01fF -C1303 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/DOWN 0.07fF -C1304 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Qbar1 0.30fF -C1305 div_pd_buffered_0/divider_0/tspc_2/Z3 div_pd_buffered_0/divider_0/tspc_2/Z4 0.65fF -C1306 pll_full_1/pd_0/R pll_full_1/pd_0/DOWN 0.36fF -C1307 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/z5 0.11fF -C1308 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF -C1309 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF -C1310 divider_1/tspc_1/Z1 divider_1/tspc_1/Z3 0.06fF -C1311 divider_1/tspc_0/Z3 divider_1/nor_1/A 0.38fF -C1312 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/vco 0.45fF -C1313 divider_1/nor_0/B divider_1/and_0/B 0.29fF -C1314 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/DOWN 0.02fF -C1315 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF -C1316 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF -C1317 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_4670_0# 29.21fF -C1318 pd_buffered_0/tapered_buf_0/a_580_0# pd_buffered_0/tapered_buf_0/a_210_n610# 0.84fF -C1319 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF -C1320 pd_buffered_0/tapered_buf_1/a_160_230# pd_buffered_0/tapered_buf_1/a_160_n140# 0.17fF -C1321 pd_buffered_0/pd_0/tspc_r_0/z5 pd_buffered_0/pd_0/tspc_r_1/z5 0.02fF -C1322 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z2 0.25fF -C1323 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C1324 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C1325 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF -C1326 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.05fF -C1327 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF -C1328 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z2 0.23fF -C1329 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.06fF -C1330 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/vco 1.46fF -C1331 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/div 0.04fF -C1332 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z2 0.40fF -C1333 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/vco 0.29fF -C1334 ro_complete_buffered_0/tapered_buf_3/a_160_230# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.02fF -C1335 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/a_630_n680# 0.01fF -C1336 divider_0/tspc_0/Z2 divider_0/tspc_0/Z3 0.16fF -C1337 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF -C1338 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF -C1339 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C1340 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z2 0.25fF -C1341 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/ref 0.19fF -C1342 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF -C1343 pll_full_0/ro_complete_0/a4 pll_full_0/vco 0.01fF -C1344 divider_1/prescaler_0/tspc_2/Z2 divider_1/and_0/OUT 0.05fF -C1345 pd_buffered_0/tapered_buf_3/a_1650_0# pd_buffered_0/tapered_buf_3/a_210_n610# 2.89fF -C1346 ro_complete_0/cbank_0/v ro_complete_0/cbank_0/switch_0/vin 1.30fF -C1347 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/R 0.03fF -C1348 div_pd_buffered_0/tapered_buf_1/a_n10_n140# div_pd_buffered_0/tapered_buf_1/a_n10_230# 0.01fF -C1349 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_1/B 0.06fF -C1350 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF -C1351 cp_buffered_0/tapered_buf_0/a_210_n610# cp_buffered_0/tapered_buf_0/a_580_0# 0.84fF -C1352 cp_buffered_0/tapered_buf_0/a_n10_n140# cp_buffered_0/tapered_buf_0/a_160_n140# 0.05fF -C1353 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/UP 1.06fF -C1354 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF -C1355 pll_full_1/pd_0/tspc_r_1/z5 pll_full_1/div 0.04fF -C1356 pll_full_0/cp_0/down pll_full_0/cp_0/upbar 0.02fF -C1357 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Q 0.04fF -C1358 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.33fF -C1359 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/vco 1.27fF -C1360 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF -C1361 div_pd_buffered_0/tapered_buf_4/a_210_n610# div_pd_buffered_0/tapered_buf_4/a_4670_0# 29.21fF -C1362 divider_1/mc2 divider_1/nor_1/A 0.04fF -C1363 pll_full_1/cp_0/upbar pll_full_1/cp_0/down 0.02fF -C1364 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/nor_1/A 0.15fF -C1365 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF -C1366 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF -C1367 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C1368 divider_1/tspc_1/Q divider_1/tspc_2/Z2 0.14fF -C1369 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_0/D 0.32fF -C1370 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/clk 0.01fF -C1371 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF -C1372 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/R 0.61fF -C1373 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.12fF -C1374 ro_complete_0/cbank_1/v ro_complete_0/cbank_1/switch_1/vin 1.30fF -C1375 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF -C1376 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/B 0.01fF -C1377 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C1378 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/nor_0/B 0.47fF -C1379 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z1 1.07fF -C1380 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF -C1381 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF -C1382 divider_1/tspc_0/Q divider_1/tspc_0/a_630_n680# 0.04fF -C1383 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z3 0.06fF -C1384 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/vco 0.12fF -C1385 divider_1/tspc_2/Z1 divider_1/tspc_2/Z3 0.06fF -C1386 divider_1/nor_0/B divider_1/Out 0.22fF -C1387 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C1388 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/B 0.20fF -C1389 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/clk 0.14fF -C1390 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF -C1391 divider_0/nor_1/B divider_0/tspc_0/a_630_n680# 0.01fF -C1392 divider_0/nor_1/Z1 divider_0/and_0/B 0.18fF -C1393 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF -C1394 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/out1 0.31fF -C1395 pll_full_1/divider_0/tspc_1/Z4 pll_full_1/divider_0/tspc_0/Q 0.15fF -C1396 io_clamp_low[1] io_clamp_high[1] 0.53fF -C1397 div_pd_buffered_0/tapered_buf_3/a_n10_230# div_pd_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF -C1398 divider_0/tspc_1/Q divider_0/tspc_2/a_630_n680# 0.01fF -C1399 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF -C1400 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF -C1401 div_pd_buffered_0/tapered_buf_3/a_n10_n140# div_pd_buffered_0/tapered_buf_3/in 0.04fF -C1402 divider_1/tspc_1/Z2 divider_1/tspc_1/Z4 0.36fF -C1403 divider_1/tspc_1/Z3 divider_1/tspc_1/Q 0.05fF -C1404 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z3 0.05fF -C1405 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z4 0.08fF -C1406 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF -C1407 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF -C1408 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF -C1409 pll_full_1/ref pll_full_1/pd_0/tspc_r_0/Z1 0.17fF -C1410 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/B 0.35fF -C1411 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/vco 0.60fF -C1412 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/a_n10_n140# 0.01fF -C1413 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.19fF -C1414 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF -C1415 filter_0/a_4216_n2998# filter_0/v 0.36fF -C1416 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/and_pd_0/Out1 0.12fF -C1417 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/UP 0.21fF -C1418 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_210_n610# 0.22fF -C1419 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/and_0/A 0.80fF -C1420 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.22fF -C1421 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_1/B 0.35fF -C1422 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/vco 0.11fF -C1423 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z3 0.11fF -C1424 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/and_0/B 0.29fF -C1425 div_pd_buffered_0/tapered_buf_3/a_210_n610# div_pd_buffered_0/tapered_buf_3/a_580_0# 0.84fF -C1426 divider_1/tspc_0/Z4 divider_1/tspc_0/Z3 0.65fF -C1427 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF -C1428 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF -C1429 divider_0/prescaler_0/tspc_2/Q divider_0/clk 0.05fF -C1430 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/clk 0.01fF -C1431 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF -C1432 pll_full_0/ro_complete_0/a1 pll_full_0/vco 0.11fF -C1433 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.11fF -C1434 div_pd_buffered_0/tapered_buf_3/a_210_n610# div_pd_buffered_0/divider_0/clk 26.29fF -C1435 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/a_n10_n140# 0.01fF -C1436 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/switch_3/vin 0.20fF -C1437 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/nor_1/B 0.06fF -C1438 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF -C1439 div_pd_buffered_0/tapered_buf_1/a_n10_230# div_pd_buffered_0/tapered_buf_1/a_160_230# 0.09fF -C1440 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.21fF -C1441 div_pd_buffered_0/tapered_buf_2/a_580_0# div_pd_buffered_0/tapered_buf_2/a_160_n140# 0.35fF -C1442 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.09fF -C1443 ro_complete_buffered_0/tapered_buf_5/a_4670_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 29.21fF -C1444 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/and_0/OUT 0.05fF -C1445 div_pd_buffered_0/tapered_buf_3/a_160_n140# div_pd_buffered_0/tapered_buf_3/in 0.19fF -C1446 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF -C1447 ro_complete_0/a0 ro_complete_0/cbank_1/switch_5/vin 0.09fF -C1448 divider_1/mc2 divider_1/and_0/OUT 0.05fF -C1449 divider_1/tspc_0/Q divider_1/nor_1/B 0.22fF -C1450 divider_0/and_0/out1 divider_0/and_0/B 0.18fF -C1451 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF -C1452 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/tapered_buf_0/a_160_230# 0.09fF -C1453 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/Out 0.21fF -C1454 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF -C1455 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_0/Q 0.45fF -C1456 divider_0/mc2 divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF -C1457 pd_buffered_0/tapered_buf_2/a_n10_230# pd_buffered_0/tapered_buf_2/in 0.02fF -C1458 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.19fF -C1459 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z1 0.09fF -C1460 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/DIV 0.51fF -C1461 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/v 0.05fF -C1462 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_160_230# 0.02fF -C1463 div_pd_buffered_0/tapered_buf_1/a_4670_0# div_pd_buffered_0/tapered_buf_1/a_1650_0# 4.78fF -C1464 ro_complete_buffered_0/tapered_buf_0/in ro_complete_buffered_0/tapered_buf_0/a_n10_n140# 0.04fF -C1465 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z2 0.14fF -C1466 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z3 0.05fF -C1467 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.32fF -C1468 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/vco 0.01fF -C1469 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF -C1470 divider_0/tspc_1/Z1 divider_0/tspc_0/Q 0.01fF -C1471 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Q 0.05fF -C1472 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF -C1473 pll_full_0/cp_0/a_1710_0# pll_full_0/pd_0/DOWN 0.04fF -C1474 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/Z2 0.14fF -C1475 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z3 0.16fF -C1476 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/vco 0.12fF -C1477 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF -C1478 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_160_n140# 0.35fF -C1479 pd_buffered_0/pd_0/REF pd_buffered_0/tapered_buf_0/a_210_n610# 26.29fF -C1480 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/and_pd_0/Out1 0.05fF -C1481 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/tspc_r_1/Qbar 0.01fF -C1482 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/R 0.27fF -C1483 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF -C1484 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a4 0.09fF -C1485 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a5 0.09fF -C1486 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/and_0/B 0.18fF -C1487 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.00fF -C1488 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Z3 0.03fF -C1489 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/tapered_buf_1/a_1650_0# 2.89fF -C1490 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.03fF -C1491 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF -C1492 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_0/a_630_n680# 0.04fF -C1493 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z3 0.06fF -C1494 pll_full_1/divider_0/nor_0/B pll_full_1/div 0.27fF -C1495 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_1650_0# 2.89fF -C1496 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/DOWN 0.03fF -C1497 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF -C1498 div_pd_buffered_0/tapered_buf_4/a_210_n610# div_pd_buffered_0/tapered_buf_4/out 26.29fF -C1499 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_160_230# 0.17fF -C1500 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Q 0.20fF -C1501 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/D 0.09fF -C1502 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF -C1503 ro_complete_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_2/in 0.19fF -C1504 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z3 0.65fF -C1505 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z3 0.33fF -C1506 ro_complete_buffered_0/tapered_buf_2/a_4670_0# ro_complete_buffered_0/tapered_buf_2/a_210_n610# 29.21fF -C1507 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/div 0.17fF -C1508 divider_1/tspc_0/Z2 divider_1/tspc_0/Z3 0.16fF -C1509 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z4 0.01fF -C1510 ro_complete_0/a1 ro_complete_0/cbank_2/switch_3/vin 0.14fF -C1511 cp_buffered_0/tapered_buf_0/a_160_230# cp_buffered_0/tapered_buf_0/a_n10_230# 0.09fF -C1512 cp_buffered_0/tapered_buf_0/a_210_n610# cp_buffered_0/tapered_buf_0/a_4670_0# 29.21fF -C1513 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.12fF -C1514 ro_complete_buffered_0/tapered_buf_0/a_580_0# ro_complete_buffered_0/tapered_buf_0/a_160_230# 0.02fF -C1515 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 0.22fF -C1516 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_1/Q 0.51fF -C1517 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z2 0.01fF -C1518 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.05fF -C1519 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.08fF -C1520 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/R 0.27fF -C1521 div_pd_buffered_0/tapered_buf_0/out div_pd_buffered_0/tapered_buf_0/a_210_n610# 26.29fF -C1522 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Q 0.55fF -C1523 divider_1/prescaler_0/Out divider_1/tspc_0/a_630_n680# 0.01fF -C1524 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF -C1525 ro_complete_buffered_0/tapered_buf_4/a_4670_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 29.21fF -C1526 pll_full_0/pd_0/and_pd_0/Z1 pll_full_0/pd_0/UP 0.06fF -C1527 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/DOWN 0.11fF -C1528 pll_full_1/pd_0/R pll_full_1/ref 0.61fF -C1529 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF -C1530 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C1531 div_pd_buffered_0/tapered_buf_2/in div_pd_buffered_0/tapered_buf_2/a_n10_n140# 0.04fF -C1532 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/nand_1/z1 0.22fF -C1533 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/tspc_0/D 0.04fF -C1534 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_1/Qbar 0.21fF -C1535 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF -C1536 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/vco 0.14fF -C1537 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/DOWN 0.02fF -C1538 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/R 0.30fF -C1539 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Q 0.15fF -C1540 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.11fF -C1541 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/v 0.05fF -C1542 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/nor_1/A 0.15fF -C1543 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/nor_0/B 0.06fF -C1544 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_2/Z2 0.20fF -C1545 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Z2 0.21fF -C1546 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF -C1547 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/in 0.19fF -C1548 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF -C1549 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z2 0.15fF -C1550 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF -C1551 divider_1/tspc_2/Z1 divider_1/tspc_2/Z4 0.00fF -C1552 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF -C1553 cp_buffered_0/tapered_buf_2/a_1650_0# cp_buffered_0/tapered_buf_2/a_4670_0# 4.78fF -C1554 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF -C1555 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/nor_1/B 1.21fF -C1556 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/nor_0/B 0.06fF -C1557 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF -C1558 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/A 0.01fF -C1559 div_pd_buffered_0/divider_0/tspc_0/Z3 div_pd_buffered_0/divider_0/tspc_0/Q 0.05fF -C1560 cp_buffered_0/cp_0/down cp_buffered_0/cp_0/upbar 0.02fF -C1561 divider_0/tspc_1/Q divider_0/nor_0/B 0.22fF -C1562 divider_0/tspc_0/Z1 divider_0/tspc_0/Z3 0.06fF -C1563 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/Q 0.19fF -C1564 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.01fF -C1565 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_1/B 0.30fF -C1566 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z2 1.07fF -C1567 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z4 0.12fF -C1568 divider_0/mc2 divider_0/nor_1/B 0.06fF -C1569 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF -C1570 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF -C1571 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/vco 0.05fF -C1572 pd_buffered_0/tapered_buf_1/a_580_0# pd_buffered_0/tapered_buf_1/a_1650_0# 1.27fF -C1573 pd_buffered_0/tapered_buf_1/a_n10_n140# pd_buffered_0/pd_0/UP 0.04fF -C1574 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.09fF -C1575 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a5 2.39fF -C1576 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C1577 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF -C1578 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/and_0/OUT 0.14fF -C1579 pll_full_1/divider_0/prescaler_0/Out pll_full_1/vco 0.51fF -C1580 div_pd_buffered_0/pd_0/UP div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.04fF -C1581 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_0/Q 0.01fF -C1582 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF -C1583 divider_0/tspc_2/a_630_n680# divider_0/Out 0.04fF -C1584 divider_0/nor_0/B divider_0/tspc_2/Z2 0.40fF -C1585 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.29fF -C1586 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_210_n610# 0.22fF -C1587 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a4 0.09fF -C1588 pll_full_1/pd_0/DOWN pll_full_1/pd_0/UP 4.58fF -C1589 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/UP 0.03fF -C1590 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF -C1591 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/OUT 0.05fF -C1592 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z2 1.07fF -C1593 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.20fF -C1594 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_210_n610# 0.22fF -C1595 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/and_0/B 0.08fF -C1596 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.20fF -C1597 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.09fF -C1598 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/vco 0.12fF -C1599 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/a_n10_n140# 0.01fF -C1600 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z3 0.16fF -C1601 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF -C1602 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF -C1603 ro_complete_0/a0 ro_complete_0/cbank_1/v 0.05fF -C1604 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z4 0.20fF -C1605 divider_1/tspc_0/Z1 divider_1/tspc_0/Z3 0.06fF -C1606 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z3 0.05fF -C1607 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/z5 0.11fF -C1608 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF -C1609 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_0/B 0.00fF -C1610 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF -C1611 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF -C1612 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.17fF -C1613 ro_complete_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_5/a_4670_0# 4.78fF -C1614 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/R 0.51fF -C1615 divider_1/nor_1/Z1 divider_1/and_0/A 0.80fF -C1616 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z2 1.07fF -C1617 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/B 0.31fF -C1618 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.22fF -C1619 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.04fF -C1620 divider_0/tspc_1/Z3 divider_0/tspc_0/Q 0.45fF -C1621 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/ro_complete_0/a1 26.29fF -C1622 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF -C1623 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF -C1624 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF -C1625 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/z5 0.20fF -C1626 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z1 0.03fF -C1627 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF -C1628 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C1629 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z3 0.09fF -C1630 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/tapered_buf_1/a_210_n610# 26.29fF -C1631 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_1650_0# 2.89fF -C1632 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/R 0.36fF -C1633 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF -C1634 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z4 0.20fF -C1635 pd_buffered_0/pd_0/tspc_r_1/Z1 pd_buffered_0/pd_0/tspc_r_1/Z2 0.71fF +C1073 divider_0/tspc_1/Z1 divider_0/tspc_0/Q 0.01fF +C1074 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Q 0.05fF +C1075 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_160_230# 0.02fF +C1076 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_210_n610# 0.22fF +C1077 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF +C1078 ro_complete_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_2/a_580_0# 0.35fF +C1079 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/Z2 0.14fF +C1080 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/tspc_0/Z3 0.16fF +C1081 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/vco 0.12fF +C1082 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/DOWN 0.21fF +C1083 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_160_n140# 0.35fF +C1084 divider_0/nor_1/A divider_0/prescaler_0/tspc_1/Q 0.03fF +C1085 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF +C1086 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a4 0.09fF +C1087 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a5 0.09fF +C1088 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.18fF +C1089 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF +C1090 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_1/Z3 0.03fF +C1091 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/tapered_buf_1/a_1650_0# 2.89fF +C1092 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.03fF +C1093 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF +C1094 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_0/a_630_n680# 0.04fF +C1095 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF +C1096 pll_full_0/divider_0/nor_0/B pll_full_0/div 0.27fF +C1097 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/DOWN 0.03fF +C1098 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C1099 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z4 0.00fF +C1100 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Q 0.20fF +C1101 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/D 0.09fF +C1102 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z3 0.65fF +C1103 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/div 0.17fF +C1104 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF +C1105 divider_1/tspc_1/a_630_n680# divider_1/tspc_0/Q 0.01fF +C1106 divider_0/nor_1/A divider_0/tspc_0/Q 0.55fF +C1107 ro_complete_buffered_0/tapered_buf_0/a_580_0# ro_complete_buffered_0/tapered_buf_0/a_160_230# 0.02fF +C1108 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 0.22fF +C1109 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Q 0.51fF +C1110 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z2 0.01fF +C1111 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF +C1112 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF +C1113 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/R 0.27fF +C1114 div_pd_buffered_0/tapered_buf_0/out div_pd_buffered_0/tapered_buf_0/a_210_n610# 26.29fF +C1115 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Q 0.55fF +C1116 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF +C1117 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/UP 0.06fF +C1118 div_pd_buffered_0/tapered_buf_2/a_1650_0# div_pd_buffered_0/tapered_buf_2/a_210_n610# 2.89fF +C1119 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/DOWN 0.11fF +C1120 pll_full_0/pd_0/R pll_full_0/ref 0.61fF +C1121 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C1122 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/v 0.05fF +C1123 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF +C1124 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF +C1125 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C1126 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/vco 0.14fF +C1127 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/nand_1/z1 0.22fF +C1128 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/tspc_0/D 0.04fF +C1129 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/DOWN 0.02fF +C1130 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/R 0.30fF +C1131 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/nor_1/A 0.15fF +C1132 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/nor_0/B 0.06fF +C1133 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF +C1134 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF +C1135 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C1136 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z2 0.20fF +C1137 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_0/Z2 0.21fF +C1138 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF +C1139 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/switch_1/vin 0.19fF +C1140 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z2 0.01fF +C1141 cp_buffered_0/cp_0/upbar cp_buffered_0/cp_0/down 0.02fF +C1142 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_1/Z2 0.15fF +C1143 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/a_630_n680# 0.01fF +C1144 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF +C1145 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/a_630_n680# 0.01fF +C1146 divider_1/tspc_2/Z1 divider_1/tspc_2/Z4 0.00fF +C1147 io_clamp_high[2] io_analog[6] 0.53fF +C1148 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C1149 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/nor_1/B 1.21fF +C1150 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF +C1151 div_pd_buffered_0/tapered_buf_3/a_160_230# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.17fF +C1152 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF +C1153 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/A 0.01fF +C1154 div_pd_buffered_0/divider_0/tspc_0/Z3 div_pd_buffered_0/divider_0/tspc_0/Q 0.05fF +C1155 divider_0/tspc_1/Q divider_0/nor_0/B 0.22fF +C1156 divider_0/tspc_0/Z1 divider_0/tspc_0/Z3 0.06fF +C1157 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/Q 0.19fF +C1158 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.01fF +C1159 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z4 0.12fF +C1160 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z2 1.07fF +C1161 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/nor_1/B 0.30fF +C1162 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_n10_n140# 0.05fF +C1163 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 0.84fF +C1164 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF +C1165 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF +C1166 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/Z1 0.04fF +C1167 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z2 0.01fF +C1168 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/vco 0.05fF +C1169 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF +C1170 div_pd_buffered_0/pd_0/UP div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.04fF +C1171 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_0/Q 0.01fF +C1172 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a5 2.39fF +C1173 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C1174 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF +C1175 pll_full_0/divider_0/prescaler_0/Out pll_full_0/vco 0.51fF +C1176 div_pd_buffered_0/tapered_buf_3/in div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.19fF +C1177 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/and_pd_0/Z1 0.18fF +C1178 divider_1/tspc_0/Q divider_1/tspc_1/Z1 0.01fF +C1179 divider_1/mc2 divider_1/and_0/OUT 0.05fF +C1180 divider_0/tspc_2/a_630_n680# divider_0/Out 0.04fF +C1181 divider_0/nor_0/B divider_0/tspc_2/Z2 0.40fF +C1182 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.29fF +C1183 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_n10_n140# 0.05fF +C1184 ro_complete_buffered_0/tapered_buf_3/a_580_0# ro_complete_buffered_0/tapered_buf_3/a_210_n610# 0.84fF +C1185 ro_complete_buffered_0/tapered_buf_2/in ro_complete_buffered_0/tapered_buf_2/a_n10_n140# 0.04fF +C1186 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 4.58fF +C1187 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/B 0.18fF +C1188 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/OUT 0.05fF +C1189 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z2 1.07fF +C1190 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF +C1191 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/B 0.08fF +C1192 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF +C1193 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF +C1194 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/vco 0.12fF +C1195 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_2/D 0.16fF +C1196 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z3 0.16fF +C1197 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF +C1198 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF +C1199 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF +C1200 divider_1/nor_1/A divider_1/tspc_0/Z2 0.23fF +C1201 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z3 0.05fF +C1202 cp_buffered_0/tapered_buf_1/a_1650_0# cp_buffered_0/tapered_buf_1/a_210_n610# 2.89fF +C1203 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF +C1204 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.19fF +C1205 divider_0/mc2 divider_0/nor_1/A 0.04fF +C1206 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.22fF +C1207 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF +C1208 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_0/B 0.00fF +C1209 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.05fF +C1210 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.17fF +C1211 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/R 0.51fF +C1212 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF +C1213 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.31fF +C1214 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF +C1215 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF +C1216 cp_buffered_0/tapered_buf_2/a_160_n140# cp_buffered_0/tapered_buf_2/a_580_0# 0.35fF +C1217 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.14fF +C1218 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a4 0.09fF +C1219 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a5 0.09fF +C1220 divider_0/tspc_1/Z3 divider_0/tspc_0/Q 0.45fF +C1221 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z4 0.12fF +C1222 cp_buffered_0/tapered_buf_0/a_1650_0# cp_buffered_0/tapered_buf_0/a_210_n610# 2.89fF +C1223 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF +C1224 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z1 0.03fF +C1225 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.01fF +C1226 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C1227 ro_complete_0/a4 ro_complete_0/cbank_1/v 0.05fF +C1228 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF +C1229 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C1230 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF +C1231 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/tapered_buf_1/a_210_n610# 26.29fF +C1232 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/clk 0.14fF +C1233 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/div 0.19fF +C1234 divider_1/prescaler_0/m1_2700_2190# divider_1/nor_1/A 0.01fF +C1235 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF +C1236 ro_complete_buffered_0/tapered_buf_1/in ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.36fF +C1237 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF +C1238 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/Out 0.05fF +C1239 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF +C1240 divider_0/tspc_1/Z4 divider_0/tspc_0/Q 0.15fF +C1241 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Q 0.04fF +C1242 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/clk 0.01fF +C1243 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Z4 0.65fF +C1244 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.15fF +C1245 pll_full_1/ro_complete_0/a5 pll_full_1/vco 0.15fF +C1246 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.38fF +C1247 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C1248 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_210_n610# 0.84fF +C1249 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/nor_1/A 0.03fF +C1250 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C1251 divider_0/nor_1/A divider_0/and_0/A 0.01fF +C1252 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF +C1253 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_1/z5 0.03fF +C1254 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z4 0.20fF +C1255 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Q 0.01fF +C1256 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/and_0/A 0.01fF +C1257 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF +C1258 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C1259 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/vco 0.01fF +C1260 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF +C1261 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.35fF +C1262 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C1263 divider_1/tspc_0/Z3 divider_1/tspc_0/Z2 0.16fF +C1264 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z3 0.06fF +C1265 divider_0/nor_0/B divider_0/and_0/B 0.29fF +C1266 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/nand_1/z1 0.01fF +C1267 divider_1/prescaler_0/tspc_2/Z2 divider_1/clk 0.11fF +C1268 ro_complete_buffered_0/tapered_buf_2/in ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.19fF +C1269 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_n10_230# 0.09fF +C1270 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z1 0.71fF +C1271 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z3 0.38fF +C1272 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/R 0.29fF +C1273 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF +C1274 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/nor_1/A 0.01fF +C1275 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# 0.01fF +C1276 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1277 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF +C1278 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z3 0.05fF +C1279 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z1 0.03fF +C1280 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/vco 1.36fF +C1281 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.05fF +C1282 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.01fF +C1283 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.09fF +C1284 divider_1/nor_1/A divider_1/tspc_0/Z4 0.21fF +C1285 divider_1/prescaler_0/tspc_0/Z3 divider_1/clk 0.64fF +C1286 divider_1/tspc_2/Z3 divider_1/tspc_2/Z4 0.65fF +C1287 ro_complete_0/a5 ro_complete_0/cbank_1/switch_0/vin 0.09fF +C1288 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF +C1289 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/nor_0/B 0.22fF +C1290 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.19fF +C1291 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/vco 0.01fF +C1292 io_clamp_low[1] io_analog[5] 0.53fF +C1293 div_pd_buffered_0/pd_0/tspc_r_1/Z4 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF +C1294 divider_0/nor_1/A divider_0/tspc_1/Z4 0.02fF +C1295 divider_0/mc2 divider_0/and_0/A 0.16fF +C1296 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/a_630_n680# 0.35fF +C1297 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF +C1298 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1299 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_1/Z4 0.02fF +C1300 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z3 0.06fF +C1301 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF +C1302 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C1303 cp_buffered_0/tapered_buf_2/a_n10_230# cp_buffered_0/tapered_buf_2/in 0.02fF +C1304 io_clamp_low[0] io_clamp_high[0] 0.53fF +C1305 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C1306 divider_1/nor_0/Z1 divider_1/nor_0/B 0.06fF +C1307 divider_0/tspc_1/Q divider_0/tspc_2/Z2 0.14fF +C1308 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z3 0.05fF +C1309 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/D 0.32fF +C1310 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF +C1311 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF +C1312 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z2 0.23fF +C1313 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C1314 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/vco 1.46fF +C1315 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z3 0.16fF +C1316 ro_complete_0/a1 ro_complete_0/cbank_1/v 0.05fF +C1317 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/div 0.04fF +C1318 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z2 0.40fF +C1319 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/vco 0.29fF +C1320 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.18fF +C1321 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C1322 div_pd_buffered_0/pd_0/and_pd_0/Out1 div_pd_buffered_0/pd_0/UP 0.33fF +C1323 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF +C1324 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1325 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF +C1326 ro_complete_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/in 0.02fF +C1327 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF +C1328 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C1329 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF +C1330 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/vco 1.46fF +C1331 pll_full_1/pd_0/DOWN pll_full_1/pd_0/R 0.36fF +C1332 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_0/Q 0.45fF +C1333 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.03fF +C1334 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z3 0.33fF +C1335 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF +C1336 divider_1/tspc_0/Q divider_1/tspc_1/Z3 0.45fF +C1337 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/a_630_n680# 0.01fF +C1338 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/clk 0.14fF +C1339 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF +C1340 divider_0/nor_0/B divider_0/Out 0.22fF +C1341 ro_complete_0/a2 ro_complete_0/cbank_1/switch_3/vin 0.09fF +C1342 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF +C1343 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Q 0.04fF +C1344 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.33fF +C1345 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/vco 1.27fF +C1346 div_pd_buffered_0/pd_0/tspc_r_0/Z2 div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.14fF +C1347 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/Z3 0.16fF +C1348 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z2 1.07fF +C1349 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF +C1350 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_1/B 0.18fF +C1351 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C1352 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z2 0.36fF +C1353 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_0/Z3 0.05fF +C1354 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.14fF +C1355 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF +C1356 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C1357 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/nand_0/z1 0.07fF +C1358 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z2 0.01fF +C1359 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF +C1360 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF +C1361 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z3 0.09fF +C1362 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/in 0.19fF +C1363 divider_1/tspc_0/Z3 divider_1/tspc_0/Z4 0.65fF +C1364 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z4 0.12fF +C1365 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.05fF +C1366 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/nor_0/B 0.47fF +C1367 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_160_n140# 0.35fF +C1368 divider_1/and_0/OUT divider_1/and_0/B 0.01fF +C1369 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/R 0.01fF +C1370 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF +C1371 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/tspc_r_1/Qbar 0.21fF +C1372 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_n10_n140# 0.05fF +C1373 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 0.84fF +C1374 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z4 0.00fF +C1375 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.15fF +C1376 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/and_0/B 0.78fF +C1377 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/Out 0.21fF +C1378 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_580_0# 1.27fF +C1379 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF +C1380 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C1381 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z1 0.08fF +C1382 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z2 0.36fF +C1383 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C1384 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF +C1385 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/vco 0.11fF +C1386 divider_1/mc2 divider_1/nor_1/A 0.04fF +C1387 divider_1/prescaler_0/m1_2700_2190# divider_1/clk 0.01fF +C1388 cp_buffered_0/tapered_buf_2/a_580_0# cp_buffered_0/tapered_buf_2/a_1650_0# 1.27fF +C1389 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Z2 0.21fF +C1390 cp_buffered_0/cp_0/out cp_buffered_0/cp_0/down 0.79fF +C1391 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/in 0.19fF +C1392 pll_full_1/ref pll_full_1/pd_0/tspc_r_0/Qbar1 0.12fF +C1393 divider_1/tspc_1/Z2 divider_1/nor_1/B 0.30fF +C1394 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/a_630_n680# 0.19fF +C1395 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Q 0.04fF +C1396 ro_complete_0/a3 ro_complete_0/cbank_2/switch_2/vin 0.09fF +C1397 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/out1 0.31fF +C1398 pll_full_1/divider_0/tspc_1/Z4 pll_full_1/divider_0/tspc_0/Q 0.15fF +C1399 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z4 0.00fF +C1400 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF +C1401 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF +C1402 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_0/a_740_n680# 0.21fF +C1403 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.78fF +C1404 div_pd_buffered_0/tapered_buf_2/a_580_0# div_pd_buffered_0/tapered_buf_2/a_210_n610# 0.84fF +C1405 divider_1/prescaler_0/Out divider_1/tspc_0/Z2 0.11fF +C1406 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF +C1407 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/tspc_r_0/Qbar 0.05fF +C1408 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z2 1.07fF +C1409 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/a_1710_0# 0.83fF +C1410 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.19fF +C1411 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/div 0.12fF +C1412 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/ref 0.04fF +C1413 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_1/B 0.35fF +C1414 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/vco 0.11fF +C1415 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF +C1416 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/and_0/B 0.29fF +C1417 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z1 0.17fF +C1418 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF +C1419 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C1420 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF +C1421 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF +C1422 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z1 0.01fF +C1423 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_0/Q 0.22fF +C1424 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.21fF +C1425 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF +C1426 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF +C1427 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF +C1428 divider_0/tspc_1/a_630_n680# divider_0/tspc_0/Q 0.01fF +C1429 pll_full_0/pd_0/and_pd_0/Z1 pll_full_0/pd_0/tspc_r_0/Qbar 0.02fF +C1430 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_1/Q 0.13fF +C1431 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z4 0.00fF +C1432 cp_buffered_0/cp_0/a_1710_0# cp_buffered_0/cp_0/out 0.84fF +C1433 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Qbar 0.03fF +C1434 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/nor_1/B 0.06fF +C1435 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF +C1436 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/and_0/OUT 0.05fF +C1437 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.02fF +C1438 divider_1/prescaler_0/tspc_0/D divider_1/prescaler_0/nand_1/z1 0.21fF +C1439 divider_1/nor_1/B divider_1/and_0/A 0.26fF +C1440 div_pd_buffered_0/pd_0/tspc_r_0/Z2 div_pd_buffered_0/pd_0/R 0.21fF +C1441 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/nor_1/B 0.30fF +C1442 divider_1/prescaler_0/Out divider_1/prescaler_0/m1_2700_2190# 0.11fF +C1443 ro_complete_buffered_0/tapered_buf_6/a_210_n610# ro_complete_buffered_0/ro_complete_0/a4 26.29fF +C1444 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C1445 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C1446 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/z5 0.04fF +C1447 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z4 0.12fF +C1448 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z2 1.07fF +C1449 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z3 0.38fF +C1450 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF +C1451 divider_1/tspc_0/Z1 divider_1/tspc_0/Z2 1.07fF +C1452 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z4 0.01fF +C1453 divider_1/prescaler_0/tspc_0/Z4 divider_1/clk 0.12fF +C1454 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Q 0.20fF +C1455 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF +C1456 div_pd_buffered_0/tapered_buf_2/in div_pd_buffered_0/tapered_buf_2/a_n10_230# 0.02fF +C1457 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/v 0.05fF +C1458 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z2 0.14fF +C1459 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z3 0.05fF +C1460 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.32fF +C1461 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/vco 0.01fF +C1462 ro_complete_buffered_0/tapered_buf_5/a_n10_n140# ro_complete_buffered_0/tapered_buf_5/in 0.04fF +C1463 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/and_pd_0/Z1 0.07fF +C1464 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Z4 0.12fF +C1465 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF +C1466 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/clk 0.64fF +C1467 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C1468 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF +C1469 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/Z1 0.36fF +C1470 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF +C1471 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF +C1472 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Q 0.15fF +C1473 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF +C1474 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/tspc_0/D 0.04fF +C1475 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF +C1476 divider_1/nor_1/B divider_1/tspc_1/Z4 0.21fF +C1477 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z4 0.36fF +C1478 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/and_0/B 0.18fF +C1479 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.00fF +C1480 pll_full_0/pd_0/R pll_full_0/div 0.51fF +C1481 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z3 0.06fF +C1482 pll_full_1/divider_0/nor_0/B pll_full_1/div 0.27fF +C1483 ro_complete_buffered_0/tapered_buf_6/a_n10_n140# ro_complete_buffered_0/tapered_buf_6/in 0.04fF +C1484 ro_complete_buffered_0/tapered_buf_4/a_210_n610# ro_complete_buffered_0/ro_complete_0/a2 26.29fF +C1485 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF +C1486 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C1487 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Q 0.04fF +C1488 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.01fF +C1489 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF +C1490 ro_complete_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/a_160_230# 0.09fF +C1491 ro_complete_buffered_0/tapered_buf_0/a_4670_0# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 29.21fF +C1492 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF +C1493 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C1494 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/a3 0.09fF +C1495 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF +C1496 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C1497 divider_1/prescaler_0/Out divider_1/tspc_0/Z4 0.12fF +C1498 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z4 0.08fF +C1499 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1500 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF +C1501 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.12fF +C1502 ro_complete_buffered_0/tapered_buf_2/in ro_complete_buffered_0/tapered_buf_2/a_n10_230# 0.02fF +C1503 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a4 0.12fF +C1504 ro_complete_0/a2 ro_complete_0/cbank_0/switch_3/vin 0.09fF +C1505 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_1/Q 0.51fF +C1506 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z2 0.01fF +C1507 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.05fF +C1508 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.08fF +C1509 ro_complete_buffered_0/tapered_buf_7/a_n10_n140# ro_complete_buffered_0/tapered_buf_7/in 0.04fF +C1510 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z4 0.12fF +C1511 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF +C1512 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/clk 0.04fF +C1513 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF +C1514 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C1515 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_0/Q 0.14fF +C1516 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/vco 0.01fF +C1517 pll_full_1/ref pll_full_1/pd_0/tspc_r_0/z5 0.04fF +C1518 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Q 0.38fF +C1519 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF +C1520 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF +C1521 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF +C1522 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/D 0.03fF +C1523 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.11fF +C1524 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/v 0.05fF +C1525 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF +C1526 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_2/Z2 0.20fF +C1527 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF +C1528 div_pd_buffered_0/tapered_buf_0/a_160_230# div_pd_buffered_0/tapered_buf_0/a_580_0# 0.02fF +C1529 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF +C1530 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.11fF +C1531 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF +C1532 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/R 0.33fF +C1533 pll_full_1/pd_0/tspc_r_0/Qbar pll_full_1/pd_0/UP 0.21fF +C1534 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/clk 0.04fF +C1535 div_pd_buffered_0/tapered_buf_0/a_4670_0# div_pd_buffered_0/tapered_buf_0/a_210_n610# 29.21fF +C1536 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/Z4 0.65fF +C1537 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_1650_0# 1.27fF +C1538 pll_full_0/divider_0/and_0/OUT pll_full_0/div 0.01fF +C1539 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF +C1540 cp_buffered_0/tapered_buf_2/a_160_n140# cp_buffered_0/tapered_buf_2/a_160_230# 0.17fF +C1541 cp_buffered_0/tapered_buf_2/a_1650_0# cp_buffered_0/tapered_buf_2/a_4670_0# 4.78fF +C1542 divider_1/tspc_0/Z1 divider_1/tspc_0/Z4 0.00fF +C1543 divider_1/nor_1/Z1 divider_1/and_0/A 0.80fF +C1544 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF +C1545 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/nor_1/B 1.21fF +C1546 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/pd_0/tspc_r_1/Z2 0.71fF +C1547 div_pd_buffered_0/tapered_buf_4/a_160_230# div_pd_buffered_0/tapered_buf_4/a_160_n140# 0.17fF +C1548 divider_1/and_0/out1 divider_1/and_0/A 0.01fF +C1549 ro_complete_0/a5 ro_complete_0/cbank_1/v 0.10fF +C1550 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/a0 0.09fF +C1551 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.02fF +C1552 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 0.22fF +C1553 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/ro_complete_0/a0 26.29fF +C1554 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C1555 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF +C1556 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C1557 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/UP 0.45fF +C1558 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/vco 1.46fF +C1559 pll_full_0/pd_0/and_pd_0/Z1 pll_full_0/pd_0/R 0.02fF +C1560 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.15fF +C1561 filter_0/a_4216_n5230# filter_0/v 0.91fF +C1562 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.09fF +C1563 div_pd_buffered_0/tapered_buf_3/a_1650_0# div_pd_buffered_0/tapered_buf_3/a_210_n610# 2.89fF +C1564 divider_1/nor_0/Z1 divider_1/and_0/B 0.78fF +C1565 divider_1/nor_1/A divider_1/and_0/B 0.08fF +C1566 pll_full_0/pd_0/DOWN pll_full_0/cp_0/a_1710_0# 0.04fF +C1567 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/and_0/OUT 0.14fF +C1568 pll_full_1/divider_0/prescaler_0/Out pll_full_1/vco 0.51fF +C1569 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_0/z5 0.04fF +C1570 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.25fF +C1571 div_pd_buffered_0/tapered_buf_3/a_160_230# div_pd_buffered_0/tapered_buf_3/a_580_0# 0.02fF +C1572 divider_0/mc2 divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF +C1573 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.02fF +C1574 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 0.22fF +C1575 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1576 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/nor_1/A 0.15fF +C1577 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF +C1578 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1579 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF +C1580 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z3 0.45fF +C1581 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/and_0/A 0.26fF +C1582 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_1/Q 0.21fF +C1583 divider_0/nor_1/B divider_0/tspc_0/Q 0.22fF +C1584 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_580_0# 0.35fF +C1585 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.20fF +C1586 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_2/a_n10_230# 0.01fF +C1587 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a3 0.13fF +C1588 div_pd_buffered_0/tapered_buf_4/a_1650_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 2.89fF +C1589 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/and_0/B 0.08fF +C1590 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.20fF +C1591 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.09fF +C1592 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/vco 0.12fF +C1593 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z3 0.65fF +C1594 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_580_0# 0.35fF +C1595 pll_full_1/pd_0/tspc_r_0/Qbar pll_full_1/pd_0/and_pd_0/Out1 0.05fF +C1596 pll_full_1/pd_0/tspc_r_0/Z1 pll_full_1/pd_0/tspc_r_0/Z2 0.71fF +C1597 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/tspc_2/Z3 0.05fF +C1598 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.13fF +C1599 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C1600 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z3 0.05fF +C1601 divider_0/nor_1/B divider_0/tspc_1/Z1 0.03fF +C1602 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/m1_2700_2190# 0.08fF +C1603 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C1604 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF +C1605 div_pd_buffered_0/tapered_buf_0/a_1650_0# div_pd_buffered_0/tapered_buf_0/a_210_n610# 2.89fF +C1606 div_pd_buffered_0/divider_0/tspc_2/Z2 div_pd_buffered_0/divider_0/tspc_2/Z3 0.16fF +C1607 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z4 0.22fF +C1608 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Q 0.04fF +C1609 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.64fF +C1610 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_580_0# 0.35fF +C1611 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z2 1.07fF +C1612 pll_full_1/ref pll_full_1/pd_0/tspc_r_0/Z2 0.19fF +C1613 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF +C1614 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/B 0.31fF +C1615 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.22fF +C1616 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.04fF +C1617 io_clamp_high[0] io_analog[4] 0.53fF +C1618 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/and_pd_0/Out1 0.33fF +C1619 div_pd_buffered_0/tapered_buf_2/a_580_0# div_pd_buffered_0/tapered_buf_2/a_160_n140# 0.35fF +C1620 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF +C1621 div_pd_buffered_0/tapered_buf_4/a_4670_0# div_pd_buffered_0/tapered_buf_4/a_1650_0# 4.78fF +C1622 ro_complete_buffered_0/tapered_buf_1/out ro_complete_buffered_0/tapered_buf_1/a_210_n610# 26.29fF +C1623 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/a_630_n680# 0.05fF +C1624 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/nor_1/B 0.03fF +C1625 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF +C1626 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF +C1627 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Z4 0.21fF +C1628 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z3 0.45fF +C1629 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF +C1630 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF +C1631 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/Out 0.05fF +C1632 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C1633 div_pd_buffered_0/divider_0/and_0/A div_pd_buffered_0/divider_0/and_0/B 0.18fF +C1634 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/nand_1/z1 0.01fF +C1635 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF C1636 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF C1637 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF C1638 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/a3 0.09fF -C1639 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/clk 0.14fF -C1640 divider_0/nor_1/A divider_0/nor_1/B 1.21fF -C1641 div_pd_buffered_0/tapered_buf_3/a_160_n140# div_pd_buffered_0/tapered_buf_3/a_n10_n140# 0.05fF -C1642 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF -C1643 divider_0/nor_0/Z1 divider_0/and_0/B 0.78fF -C1644 ro_complete_buffered_0/tapered_buf_1/in ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.36fF -C1645 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z4 0.00fF -C1646 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF -C1647 divider_0/tspc_1/Z4 divider_0/tspc_0/Q 0.15fF -C1648 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF -C1649 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Q 0.04fF -C1650 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/clk 0.01fF -C1651 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_n10_n140# 0.05fF -C1652 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF -C1653 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF -C1654 pll_full_0/ro_complete_0/a5 pll_full_0/vco 0.15fF -C1655 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z4 0.08fF -C1656 ro_complete_0/cbank_2/v ro_complete_0/cbank_2/switch_3/vin 1.30fF -C1657 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.38fF -C1658 ro_complete_0/a1 ro_complete_0/cbank_0/switch_3/vin 0.14fF -C1659 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/a4 0.09fF -C1660 ro_complete_0/cbank_0/v ro_complete_0/cbank_0/switch_1/vin 1.30fF -C1661 ro_complete_0/a3 ro_complete_0/cbank_0/switch_2/vin 0.09fF -C1662 pd_buffered_0/tapered_buf_2/a_n10_230# pd_buffered_0/tapered_buf_2/a_160_230# 0.09fF -C1663 pd_buffered_0/tapered_buf_2/a_4670_0# pd_buffered_0/tapered_buf_2/a_210_n610# 29.21fF -C1664 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_210_n610# 0.84fF -C1665 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/nor_1/A 0.03fF -C1666 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF -C1667 cp_buffered_0/tapered_buf_0/a_n10_n140# cp_buffered_0/tapered_buf_0/a_n10_230# 0.01fF -C1668 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C1669 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/z5 0.03fF -C1670 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF -C1671 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Q 0.01fF -C1672 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/and_0/A 0.01fF -C1673 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF -C1674 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 1.07fF -C1675 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.12fF -C1676 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/vco 0.01fF -C1677 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF -C1678 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/a_n10_n140# 0.01fF -C1679 ro_complete_0/a3 ro_complete_0/cbank_1/v 0.05fF -C1680 divider_1/tspc_0/Q divider_1/tspc_0/Z3 0.05fF -C1681 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z3 0.06fF -C1682 divider_0/nor_0/B divider_0/and_0/B 0.29fF -C1683 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF -C1684 div_pd_buffered_0/tapered_buf_2/a_n10_230# div_pd_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF -C1685 divider_1/nor_1/A divider_1/and_0/B 0.08fF -C1686 divider_1/nor_1/B divider_1/tspc_1/a_630_n680# 0.35fF -C1687 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/nand_1/z1 0.01fF -C1688 divider_1/prescaler_0/tspc_2/Z2 divider_1/clk 0.11fF -C1689 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/tspc_r_0/Z1 0.71fF -C1690 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z3 0.38fF -C1691 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z2 0.19fF -C1692 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z1 0.09fF -C1693 ro_complete_0/cbank_1/v ro_complete_0/cbank_1/switch_3/vin 1.30fF -C1694 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/nor_1/A 0.01fF -C1695 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# 0.01fF -C1696 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C1697 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.28fF -C1698 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z3 0.05fF -C1699 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z1 0.03fF -C1700 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF -C1701 pll_full_1/ro_complete_0/cbank_2/v pll_full_1/vco 1.36fF -C1702 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.05fF -C1703 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_160_n140# 0.35fF -C1704 divider_1/prescaler_0/tspc_0/Z3 divider_1/clk 0.64fF -C1705 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.01fF -C1706 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF -C1707 divider_1/tspc_2/Z3 divider_1/tspc_2/Z4 0.65fF -C1708 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_0/B 0.22fF -C1709 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF -C1710 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/vco 0.01fF -C1711 div_pd_buffered_0/pd_0/tspc_r_1/Z4 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF -C1712 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/R 0.03fF -C1713 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_1/Z4 0.02fF -C1714 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z3 0.06fF -C1715 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/a_630_n680# 0.35fF -C1716 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.91fF -C1717 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C1718 ro_complete_buffered_0/tapered_buf_5/a_210_n610# ro_complete_buffered_0/ro_complete_0/a3 26.29fF -C1719 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF -C1720 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C1721 io_clamp_low[0] io_clamp_high[0] 0.53fF -C1722 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C1723 divider_0/tspc_1/Q divider_0/tspc_2/Z2 0.14fF -C1724 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z3 0.05fF -C1725 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/D 0.32fF -C1726 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF -C1727 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z3 0.16fF -C1728 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_1/z5 0.02fF -C1729 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z2 0.23fF -C1730 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF -C1731 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/vco 1.46fF -C1732 ro_complete_buffered_0/tapered_buf_2/a_n10_230# ro_complete_buffered_0/tapered_buf_2/in 0.02fF -C1733 ro_complete_buffered_0/tapered_buf_2/a_4670_0# ro_complete_buffered_0/tapered_buf_2/a_1650_0# 4.78fF -C1734 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/div 0.04fF -C1735 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z2 0.40fF -C1736 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/vco 0.29fF -C1737 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_580_0# 0.35fF -C1738 divider_0/mc2 divider_0/and_0/out1 0.06fF -C1739 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.13fF -C1740 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C1741 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.18fF -C1742 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF -C1743 div_pd_buffered_0/pd_0/and_pd_0/Out1 div_pd_buffered_0/pd_0/UP 0.33fF -C1744 pd_buffered_0/pd_0/tspc_r_0/z5 pd_buffered_0/pd_0/UP 0.03fF -C1745 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF -C1746 ro_complete_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/in 0.02fF -C1747 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/in 0.02fF -C1748 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/a_630_n680# 0.01fF -C1749 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF -C1750 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_2/D 0.16fF -C1751 pll_full_1/ro_complete_0/cbank_1/switch_2/vin pll_full_1/vco 1.46fF -C1752 pll_full_0/pd_0/DOWN pll_full_0/pd_0/R 0.36fF -C1753 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_0/Q 0.45fF -C1754 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.03fF -C1755 cp_buffered_0/tapered_buf_1/a_210_n610# cp_buffered_0/cp_0/out 26.29fF -C1756 cp_buffered_0/tapered_buf_1/a_n10_n140# cp_buffered_0/tapered_buf_1/in 0.04fF -C1757 ro_complete_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_2/a_580_0# 0.35fF -C1758 div_pd_buffered_0/tapered_buf_2/a_1650_0# div_pd_buffered_0/tapered_buf_2/a_210_n610# 2.89fF -C1759 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF -C1760 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/a_630_n680# 0.01fF -C1761 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF -C1762 divider_0/nor_0/B divider_0/Out 0.22fF -C1763 pd_buffered_0/tapered_buf_2/a_1650_0# pd_buffered_0/tapered_buf_2/a_4670_0# 4.78fF -C1764 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_1650_0# 1.27fF -C1765 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/z5 0.04fF -C1766 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.04fF -C1767 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF -C1768 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/vco 1.27fF -C1769 div_pd_buffered_0/pd_0/tspc_r_0/Z2 div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.14fF -C1770 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF -C1771 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/tapered_buf_0/a_580_0# 0.35fF -C1772 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_3/vin 0.20fF -C1773 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/nor_1/B 0.18fF -C1774 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/v 0.05fF -C1775 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/Z3 0.16fF -C1776 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z2 1.07fF -C1777 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF -C1778 pd_buffered_0/pd_0/and_pd_0/Z1 pd_buffered_0/pd_0/UP 0.06fF -C1779 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z2 0.36fF -C1780 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_0/Z3 0.05fF -C1781 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF -C1782 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF -C1783 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_580_0# 0.35fF -C1784 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/pd_0/tspc_r_1/Z3 0.09fF -C1785 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z2 0.01fF -C1786 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF -C1787 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF -C1788 divider_1/nor_0/Z1 divider_1/nor_1/B 0.18fF -C1789 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z4 0.12fF -C1790 divider_1/and_0/OUT divider_1/and_0/B 0.01fF -C1791 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/nor_0/B 0.47fF -C1792 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 0.84fF -C1793 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_n10_n140# 0.05fF -C1794 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF -C1795 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF -C1796 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/R 0.01fF -C1797 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/tspc_r_1/Qbar 0.21fF -C1798 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_580_0# 1.27fF -C1799 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z3 0.16fF -C1800 pll_full_1/ro_complete_0/cbank_2/switch_2/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF -C1801 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z4 0.00fF -C1802 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.15fF -C1803 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/and_0/B 0.78fF -C1804 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z1 0.08fF -C1805 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z2 0.36fF -C1806 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C1807 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.01fF -C1808 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/vco 0.11fF -C1809 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_580_0# 0.35fF -C1810 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_0/Z2 0.21fF -C1811 divider_1/tspc_1/Z2 divider_1/nor_1/B 0.30fF -C1812 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/a_630_n680# 0.19fF -C1813 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Q 0.04fF -C1814 io_clamp_high[2] io_analog[6] 0.53fF -C1815 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF -C1816 pll_full_0/divider_0/tspc_1/Z4 pll_full_0/divider_0/tspc_0/Q 0.15fF -C1817 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z4 0.00fF -C1818 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF -C1819 pd_buffered_0/tapered_buf_1/a_580_0# pd_buffered_0/tapered_buf_1/a_160_n140# 0.35fF -C1820 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/tspc_r_1/z5 0.20fF -C1821 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/and_0/B 0.78fF -C1822 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF -C1823 cp_buffered_0/tapered_buf_0/a_210_n610# cp_buffered_0/cp_0/down 26.29fF -C1824 cp_buffered_0/tapered_buf_0/a_n10_n140# cp_buffered_0/tapered_buf_0/in 0.04fF -C1825 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_160_230# 0.02fF -C1826 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_210_n610# 0.22fF -C1827 divider_1/prescaler_0/Out divider_1/tspc_0/Z3 0.45fF -C1828 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF -C1829 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/divider_0/tspc_2/Z4 0.65fF -C1830 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/tspc_r_0/Qbar 0.05fF -C1831 cp_buffered_0/cp_0/down cp_buffered_0/cp_0/out 0.79fF -C1832 cp_buffered_0/tapered_buf_0/in cp_buffered_0/tapered_buf_0/a_160_n140# 0.19fF -C1833 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF -C1834 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/div 0.12fF -C1835 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z2 1.07fF -C1836 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF -C1837 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/ref 0.04fF -C1838 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF -C1839 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/vco 0.11fF -C1840 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z1 0.17fF -C1841 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.29fF -C1842 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF -C1843 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF -C1844 ro_complete_buffered_0/tapered_buf_2/a_580_0# ro_complete_buffered_0/tapered_buf_2/a_210_n610# 0.84fF -C1845 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF -C1846 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.09fF -C1847 pd_buffered_0/tapered_buf_0/in pd_buffered_0/tapered_buf_0/a_n10_n140# 0.04fF -C1848 pd_buffered_0/tapered_buf_1/a_160_n140# pd_buffered_0/pd_0/UP 0.19fF -C1849 pd_buffered_0/tapered_buf_1/a_1650_0# pd_buffered_0/tapered_buf_1/a_4670_0# 4.78fF -C1850 pd_buffered_0/pd_0/and_pd_0/Out1 pd_buffered_0/pd_0/and_pd_0/Z1 0.18fF -C1851 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF -C1852 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.21fF -C1853 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.16fF -C1854 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z1 0.01fF -C1855 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_0/Q 0.22fF -C1856 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF -C1857 divider_0/tspc_1/a_630_n680# divider_0/tspc_0/Q 0.01fF -C1858 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF -C1859 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/tspc_r_0/Qbar 0.02fF -C1860 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_0/Qbar 0.03fF -C1861 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF -C1862 divider_1/tspc_0/Q divider_1/tspc_1/Z1 0.01fF -C1863 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_1/Q 0.13fF -C1864 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z4 0.00fF -C1865 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF -C1866 divider_1/prescaler_0/tspc_0/D divider_1/prescaler_0/nand_1/z1 0.21fF -C1867 divider_1/nor_1/B divider_1/and_0/A 0.26fF -C1868 div_pd_buffered_0/pd_0/tspc_r_0/Z2 div_pd_buffered_0/pd_0/R 0.21fF -C1869 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF -C1870 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/nor_1/B 0.30fF -C1871 ro_complete_buffered_0/tapered_buf_6/a_210_n610# ro_complete_buffered_0/ro_complete_0/a4 26.29fF -C1872 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.08fF -C1873 pll_full_1/ro_complete_0/a1 pll_full_1/ro_complete_0/cbank_2/v 0.05fF -C1874 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF -C1875 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF -C1876 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z2 1.07fF -C1877 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z3 0.38fF -C1878 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z4 0.12fF -C1879 divider_1/prescaler_0/tspc_0/Z4 divider_1/clk 0.12fF -C1880 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Q 0.20fF -C1881 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF -C1882 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C1883 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z2 0.14fF -C1884 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z3 0.05fF -C1885 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF -C1886 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/vco 0.01fF -C1887 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/and_pd_0/Z1 0.07fF -C1888 pd_buffered_0/tapered_buf_1/a_160_230# pd_buffered_0/tapered_buf_1/a_580_0# 0.02fF -C1889 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_160_n140# 0.22fF -C1890 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.12fF -C1891 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Z4 0.12fF -C1892 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF -C1893 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/clk 0.64fF -C1894 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.33fF -C1895 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.09fF -C1896 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF -C1897 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/B 0.01fF -C1898 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/Z1 0.36fF -C1899 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/a_630_n680# 0.19fF -C1900 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF -C1901 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/tspc_0/D 0.04fF -C1902 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Qbar1 0.38fF -C1903 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.18fF -C1904 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF -C1905 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF -C1906 divider_1/nor_1/B divider_1/tspc_1/Z4 0.21fF -C1907 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z4 0.36fF -C1908 pll_full_1/pd_0/R pll_full_1/div 0.51fF -C1909 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF -C1910 pll_full_0/divider_0/nor_0/B pll_full_0/div 0.27fF -C1911 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_1650_0# 1.27fF -C1912 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF -C1913 ro_complete_buffered_0/tapered_buf_6/a_n10_n140# ro_complete_buffered_0/tapered_buf_6/in 0.04fF -C1914 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/a0 0.13fF -C1915 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Q 0.04fF -C1916 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.01fF -C1917 ro_complete_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/a_160_230# 0.09fF -C1918 ro_complete_buffered_0/tapered_buf_0/a_4670_0# ro_complete_buffered_0/tapered_buf_0/a_210_n610# 29.21fF -C1919 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF -C1920 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C1921 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/a3 0.09fF -C1922 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/nand_0/z1 0.07fF -C1923 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C1924 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF -C1925 divider_1/tspc_0/Z4 divider_1/nor_1/A 0.21fF -C1926 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF -C1927 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF -C1928 pd_buffered_0/tapered_buf_2/a_580_0# pd_buffered_0/tapered_buf_2/a_210_n610# 0.84fF -C1929 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/in 0.19fF -C1930 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Q 0.51fF -C1931 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z2 0.01fF -C1932 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF -C1933 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF -C1934 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/z5 0.04fF -C1935 pd_buffered_0/tapered_buf_0/a_580_0# pd_buffered_0/tapered_buf_0/a_1650_0# 1.27fF -C1936 ro_complete_buffered_0/tapered_buf_7/a_n10_n140# ro_complete_buffered_0/tapered_buf_7/in 0.04fF -C1937 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z4 0.12fF -C1938 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF -C1939 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/clk 0.04fF -C1940 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/tapered_buf_1/in 1.30fF -C1941 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -Xpd_buffered_0/tapered_buf_2 vdda1 vssa1 pd_buffered_0/tapered_buf_2/in pd_buffered_0/pd_0/DIV -+ tapered_buf -Xpd_buffered_0/tapered_buf_3 vdd vssa1 pd_buffered_0/pd_0/DOWN pd_buffered_0/tapered_buf_3/out -+ tapered_buf -Xpd_buffered_0/pd_0 vssa1 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/UP -+ pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/R vssa1 vdd pd -Xpd_buffered_0/tapered_buf_1 vdd vssa1 pd_buffered_0/pd_0/UP pd_buffered_0/tapered_buf_1/out -+ tapered_buf -Xpd_buffered_0/tapered_buf_0 vdda1 vssa1 pd_buffered_0/tapered_buf_0/in pd_buffered_0/pd_0/REF -+ tapered_buf +C1639 ro_complete_0/a0 ro_complete_0/cbank_2/switch_4/vin 0.13fF +C1640 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF +C1641 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z4 0.00fF +C1642 divider_0/nor_1/A divider_0/nor_1/B 1.21fF +C1643 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF +C1644 div_pd_buffered_0/tapered_buf_1/in div_pd_buffered_0/tapered_buf_1/a_n10_230# 0.02fF +C1645 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.24fF +C1646 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF +C1647 ro_complete_buffered_0/tapered_buf_0/a_n10_230# ro_complete_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF +C1648 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF +C1649 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF +C1650 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF +C1651 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF +C1652 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/vco 1.46fF +C1653 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_160_230# 0.17fF +C1654 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF +C1655 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Q 0.05fF +C1656 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF +C1657 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C1658 ro_complete_0/a2 ro_complete_0/cbank_2/switch_3/vin 0.09fF +C1659 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.12fF +C1660 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C1661 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/vco 0.01fF +C1662 divider_1/nor_1/B divider_1/tspc_2/Z4 0.02fF +C1663 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/in 0.02fF +C1664 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/div 0.65fF +C1665 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_0/Z2 0.14fF +C1666 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z2 0.11fF +C1667 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF +C1668 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF +C1669 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF +C1670 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D div_pd_buffered_0/divider_0/clk 0.26fF +C1671 div_pd_buffered_0/tapered_buf_3/a_4670_0# div_pd_buffered_0/tapered_buf_3/a_1650_0# 4.78fF +C1672 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF +C1673 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF +C1674 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/vco 0.01fF +C1675 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF +C1676 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/in 0.02fF +C1677 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.28fF +C1678 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_580_0# 0.35fF +C1679 ro_complete_buffered_0/tapered_buf_3/a_n10_230# ro_complete_buffered_0/tapered_buf_3/in 0.02fF +C1680 pll_full_1/ro_complete_0/cbank_2/v pll_full_1/vco 1.36fF +C1681 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z3 0.05fF +C1682 divider_1/nor_0/B divider_1/tspc_2/Z1 0.03fF +C1683 divider_0/mc2 divider_0/nor_1/B 0.06fF +C1684 ro_complete_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 2.89fF +C1685 div_pd_buffered_0/pd_0/tspc_r_1/Z2 div_pd_buffered_0/pd_0/R 0.21fF +C1686 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/tspc_r_1/z5 0.03fF +C1687 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/UP 0.03fF +C1688 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C1689 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/div 0.12fF +C1690 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C1691 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z2 0.01fF +C1692 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C1693 divider_0/tspc_0/Z4 divider_0/tspc_0/Z3 0.65fF +C1694 cp_buffered_0/tapered_buf_2/a_160_n140# cp_buffered_0/tapered_buf_2/a_n10_n140# 0.05fF +C1695 cp_buffered_0/tapered_buf_2/a_580_0# cp_buffered_0/tapered_buf_2/a_210_n610# 0.84fF +C1696 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/in 0.02fF +C1697 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/ref 0.02fF +C1698 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/a_630_n680# 0.35fF +C1699 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.91fF +C1700 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1701 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/nor_0/B 0.06fF +C1702 ro_complete_0/a2 ro_complete_0/cbank_2/v 0.05fF +C1703 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/UP 0.21fF +C1704 div_pd_buffered_0/tapered_buf_4/a_n10_n140# div_pd_buffered_0/tapered_buf_4/a_160_n140# 0.05fF +C1705 ro_complete_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 2.89fF +C1706 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/tspc_r_1/Z3 0.25fF +C1707 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z4 0.12fF +C1708 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.05fF +C1709 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF +C1710 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Q 0.05fF +C1711 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C1712 divider_1/tspc_0/Q divider_1/tspc_0/a_630_n680# 0.04fF +C1713 divider_0/and_0/OUT divider_0/and_0/B 0.01fF +C1714 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.13fF +C1715 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1716 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/D 0.03fF +C1717 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF +C1718 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/a_630_n680# 0.01fF +C1719 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF +C1720 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_2/D 0.16fF +C1721 pll_full_1/ro_complete_0/cbank_1/switch_2/vin pll_full_1/vco 1.46fF +C1722 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/tspc_r_0/Qbar 0.01fF +C1723 ro_complete_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 2.89fF +C1724 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C1725 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z4 0.15fF +C1726 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/tapered_buf_1/in 0.05fF +C1727 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF +C1728 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z3 0.27fF +C1729 divider_0/tspc_0/Z4 divider_0/tspc_0/Z2 0.36fF +C1730 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF +C1731 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF +C1732 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C1733 divider_0/nor_1/B divider_0/and_0/A 0.26fF +C1734 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/D 0.05fF +C1735 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_1650_0# 1.27fF +C1736 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/v 0.05fF +C1737 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z1 0.09fF +C1738 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF +C1739 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.38fF +C1740 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF +C1741 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.03fF +C1742 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF +C1743 pll_full_1/ref pll_full_1/pd_0/tspc_r_0/Z3 0.65fF +C1744 div_pd_buffered_0/divider_0/tspc_2/Z2 div_pd_buffered_0/divider_0/tspc_2/Z4 0.36fF +C1745 divider_0/nor_1/B divider_0/tspc_1/Z3 0.38fF +C1746 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/a_630_n680# 0.12fF +C1747 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin ro_complete_buffered_0/tapered_buf_1/in 1.43fF +C1748 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_0/Q 0.01fF +C1749 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar1 0.01fF +C1750 divider_0/prescaler_0/Out divider_0/tspc_0/Z3 0.45fF +C1751 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF +C1752 divider_1/tspc_1/Z1 divider_1/tspc_1/Z2 1.07fF +C1753 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_1650_0# 1.27fF +C1754 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z3 0.16fF +C1755 pll_full_1/ro_complete_0/cbank_2/switch_2/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF +C1756 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.01fF +C1757 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/vco 0.11fF +C1758 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C1759 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C1760 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/nor_1/B 0.38fF +C1761 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z1 0.00fF +C1762 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF +C1763 pll_full_0/ro_complete_0/a2 pll_full_0/vco 0.11fF +C1764 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF +C1765 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z4 0.12fF +C1766 divider_0/nor_1/B divider_0/tspc_1/Z4 0.21fF +C1767 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF +C1768 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF +C1769 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z1 0.03fF +C1770 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF +C1771 divider_1/tspc_0/Q divider_1/nor_1/A 0.55fF +C1772 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_1/z1 0.21fF +C1773 div_pd_buffered_0/tapered_buf_2/a_210_n610# div_pd_buffered_0/divider_0/mc2 26.29fF +C1774 ro_complete_buffered_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_3/a_n10_n140# 0.04fF +C1775 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/divider_0/tspc_2/Z4 0.65fF +C1776 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF +C1777 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/div 0.02fF +C1778 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.09fF +C1779 div_pd_buffered_0/tapered_buf_4/a_4670_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 29.21fF +C1780 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/in 0.19fF +C1781 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF +C1782 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C1783 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF +C1784 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/vco 1.58fF +C1785 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_2/Z4 0.02fF +C1786 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C1787 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/clk 0.45fF +C1788 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/UP 0.33fF +C1789 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/UP 0.33fF +C1790 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.35fF +C1791 divider_0/prescaler_0/Out divider_0/tspc_0/Z2 0.11fF +C1792 pll_full_1/ref pll_full_1/pd_0/DOWN 1.48fF +C1793 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF +C1794 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.09fF +C1795 divider_1/prescaler_0/tspc_0/Z2 divider_1/and_0/OUT 0.06fF +C1796 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z4 0.20fF +C1797 divider_1/tspc_1/Q divider_1/tspc_2/Z1 0.01fF +C1798 ro_complete_0/a2 ro_complete_0/cbank_0/switch_2/vin 0.14fF +C1799 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a4 0.09fF +C1800 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a5 0.09fF +C1801 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.16fF +C1802 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF +C1803 pll_full_1/pd_0/tspc_r_0/Qbar pll_full_1/pd_0/tspc_r_0/Qbar1 0.01fF +C1804 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_1650_0# 1.27fF +C1805 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1806 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z3 0.65fF +C1807 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF +C1808 pll_full_1/pd_0/DOWN pll_full_1/pd_0/and_pd_0/Z1 0.07fF +C1809 pll_full_0/pd_0/and_pd_0/Z1 pll_full_0/pd_0/UP 0.06fF +C1810 div_pd_buffered_0/tapered_buf_2/a_4670_0# div_pd_buffered_0/tapered_buf_2/a_210_n610# 29.21fF +C1811 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF Xcp_buffered_0 vdda1 vdda1 cp_buffered Xfilter_0 vssa1 filter_0/v filter Xro_complete_0 ro_complete_0/a0 ro_complete_0/a1 ro_complete_0/a5 ro_complete_0/a4 @@ -2066,1306 +1926,1284 @@ Xdivider_0 vdda1 vdd divider_0/Out divider_0/clk divider_0/mc2 vdda1 vdd divider Xdivider_1 vssa1 vdda1 divider_1/Out divider_1/clk divider_1/mc2 vssa1 vdda1 divider Xdiv_pd_buffered_0 vdda1 vssa1 div_pd_buffered -Xpll_full_0 vdd pll_full_0/ref pll_full_0/div pll_full_0/vco pll_full Xpll_full_1 vdd pll_full_1/ref pll_full_1/div pll_full_1/vco pll_full -C1942 io_analog[4] vssa1 43.96fF -C1943 io_analog[5] vssa1 44.13fF -C1944 io_analog[6] vssa1 43.46fF -C1945 io_in_3v3[0] vssa1 0.61fF -C1946 io_oeb[26] vssa1 0.61fF -C1947 io_in[0] vssa1 0.61fF -C1948 io_out[26] vssa1 0.61fF -C1949 io_out[0] vssa1 0.61fF -C1950 io_in[26] vssa1 0.61fF -C1951 io_oeb[0] vssa1 0.61fF -C1952 io_in_3v3[26] vssa1 0.61fF -C1953 io_in_3v3[1] vssa1 0.61fF -C1954 io_oeb[25] vssa1 0.61fF -C1955 io_in[1] vssa1 0.61fF -C1956 io_out[25] vssa1 0.61fF -C1957 io_out[1] vssa1 0.61fF -C1958 io_in[25] vssa1 0.61fF -C1959 io_oeb[1] vssa1 0.61fF -C1960 io_in_3v3[25] vssa1 0.61fF -C1961 io_in_3v3[2] vssa1 0.61fF -C1962 io_oeb[24] vssa1 0.61fF -C1963 io_in[2] vssa1 0.61fF -C1964 io_out[24] vssa1 0.61fF -C1965 io_out[2] vssa1 0.61fF -C1966 io_in[24] vssa1 0.61fF -C1967 io_oeb[2] vssa1 0.61fF -C1968 io_in_3v3[24] vssa1 0.61fF -C1969 io_in_3v3[3] vssa1 0.61fF -C1970 gpio_noesd[17] vssa1 2.32fF -C1971 io_in[3] vssa1 0.61fF -C1972 gpio_analog[17] vssa1 2.30fF -C1973 io_out[3] vssa1 0.61fF -C1974 io_oeb[3] vssa1 0.61fF -C1975 io_in_3v3[4] vssa1 0.61fF -C1976 io_in[4] vssa1 0.61fF -C1977 io_out[4] vssa1 0.61fF -C1978 io_oeb[4] vssa1 0.61fF -C1979 io_oeb[23] vssa1 0.61fF -C1980 io_out[23] vssa1 0.61fF -C1981 io_in[23] vssa1 0.61fF -C1982 io_in_3v3[23] vssa1 0.61fF -C1983 gpio_noesd[16] vssa1 2.30fF -C1984 gpio_analog[16] vssa1 2.30fF -C1985 io_in_3v3[5] vssa1 0.61fF -C1986 io_in[5] vssa1 0.61fF -C1987 io_out[5] vssa1 0.61fF -C1988 io_oeb[5] vssa1 0.61fF -C1989 io_oeb[22] vssa1 0.61fF -C1990 io_out[22] vssa1 0.61fF -C1991 io_in[22] vssa1 0.61fF -C1992 io_in_3v3[22] vssa1 0.61fF -C1993 gpio_noesd[15] vssa1 2.31fF -C1994 gpio_analog[15] vssa1 2.30fF -C1995 io_in_3v3[6] vssa1 0.61fF -C1996 io_in[6] vssa1 0.61fF -C1997 io_out[6] vssa1 0.61fF -C1998 io_oeb[6] vssa1 0.61fF -C1999 io_oeb[21] vssa1 0.61fF -C2000 io_out[21] vssa1 0.61fF -C2001 io_in[21] vssa1 0.61fF -C2002 io_in_3v3[21] vssa1 0.61fF -C2003 gpio_noesd[14] vssa1 2.30fF -C2004 gpio_analog[14] vssa1 2.29fF -C2005 vssd2 vssa1 38.54fF -C2006 vssd1 vssa1 13.04fF -C2007 vdda2 vssa1 38.30fF -C2008 io_oeb[20] vssa1 0.61fF -C2009 io_out[20] vssa1 0.61fF -C2010 io_in[20] vssa1 0.61fF -C2011 io_in_3v3[20] vssa1 0.61fF -C2012 gpio_noesd[13] vssa1 2.31fF -C2013 gpio_analog[13] vssa1 2.30fF -C2014 gpio_analog[0] vssa1 0.61fF -C2015 gpio_noesd[0] vssa1 0.61fF -C2016 io_in_3v3[7] vssa1 0.61fF -C2017 io_in[7] vssa1 0.61fF -C2018 io_out[7] vssa1 0.61fF -C2019 io_oeb[7] vssa1 0.61fF -C2020 io_oeb[19] vssa1 0.61fF -C2021 io_out[19] vssa1 0.61fF -C2022 io_in[19] vssa1 0.61fF -C2023 io_in_3v3[19] vssa1 0.61fF -C2024 gpio_noesd[12] vssa1 2.32fF -C2025 gpio_analog[12] vssa1 2.30fF -C2026 gpio_analog[1] vssa1 0.61fF -C2027 gpio_noesd[1] vssa1 0.61fF -C2028 io_in_3v3[8] vssa1 0.61fF -C2029 io_in[8] vssa1 0.61fF -C2030 io_out[8] vssa1 0.61fF -C2031 io_oeb[8] vssa1 0.61fF -C2032 io_oeb[18] vssa1 0.61fF -C2033 io_out[18] vssa1 0.61fF -C2034 io_in[18] vssa1 0.61fF -C2035 io_in_3v3[18] vssa1 0.61fF -C2036 gpio_noesd[11] vssa1 2.30fF -C2037 gpio_analog[11] vssa1 2.29fF -C2038 gpio_analog[2] vssa1 0.61fF -C2039 gpio_noesd[2] vssa1 0.61fF -C2040 io_in_3v3[9] vssa1 0.61fF -C2041 io_in[9] vssa1 0.61fF -C2042 io_out[9] vssa1 0.61fF -C2043 io_oeb[9] vssa1 0.61fF -C2044 io_oeb[17] vssa1 0.61fF -C2045 io_out[17] vssa1 0.61fF -C2046 io_in[17] vssa1 0.61fF -C2047 io_in_3v3[17] vssa1 0.61fF -C2048 gpio_noesd[10] vssa1 2.31fF -C2049 gpio_analog[10] vssa1 2.29fF -C2050 gpio_analog[3] vssa1 0.61fF -C2051 gpio_noesd[3] vssa1 0.61fF -C2052 io_in_3v3[10] vssa1 0.61fF -C2053 io_in[10] vssa1 0.61fF -C2054 io_out[10] vssa1 0.61fF -C2055 io_oeb[10] vssa1 0.61fF -C2056 io_oeb[16] vssa1 0.61fF -C2057 io_out[16] vssa1 0.61fF -C2058 io_in[16] vssa1 0.61fF -C2059 io_in_3v3[16] vssa1 0.61fF -C2060 gpio_noesd[9] vssa1 2.28fF -C2061 gpio_analog[9] vssa1 2.28fF -C2062 gpio_analog[4] vssa1 0.61fF -C2063 gpio_noesd[4] vssa1 0.61fF -C2064 io_in_3v3[11] vssa1 0.61fF -C2065 io_in[11] vssa1 0.61fF -C2066 io_out[11] vssa1 0.61fF -C2067 io_oeb[11] vssa1 0.61fF -C2068 io_oeb[15] vssa1 0.61fF -C2069 io_out[15] vssa1 0.61fF -C2070 io_in[15] vssa1 0.61fF -C2071 io_in_3v3[15] vssa1 0.61fF -C2072 gpio_noesd[8] vssa1 2.28fF -C2073 gpio_analog[8] vssa1 2.26fF -C2074 gpio_analog[5] vssa1 0.61fF -C2075 gpio_noesd[5] vssa1 0.61fF -C2076 io_in_3v3[12] vssa1 0.61fF -C2077 io_in[12] vssa1 0.61fF -C2078 io_out[12] vssa1 0.61fF -C2079 io_oeb[12] vssa1 0.61fF -C2080 io_oeb[14] vssa1 0.61fF -C2081 io_out[14] vssa1 0.61fF -C2082 io_in[14] vssa1 0.61fF -C2083 io_in_3v3[14] vssa1 0.61fF -C2084 gpio_noesd[7] vssa1 2.30fF -C2085 gpio_analog[7] vssa1 2.28fF -C2086 vssa2 vssa1 38.35fF -C2087 gpio_analog[6] vssa1 5.71fF -C2088 gpio_noesd[6] vssa1 5.70fF -C2089 io_in_3v3[13] vssa1 0.61fF -C2090 io_in[13] vssa1 0.61fF -C2091 io_out[13] vssa1 0.61fF -C2092 io_oeb[13] vssa1 0.61fF -C2093 vccd1 vssa1 39.84fF -C2094 vccd2 vssa1 38.46fF -C2095 io_analog[0] vssa1 19.99fF -C2096 io_analog[10] vssa1 19.36fF -C2097 io_analog[1] vssa1 13.17fF -C2098 io_analog[2] vssa1 12.57fF -C2099 io_analog[3] vssa1 12.83fF -C2100 io_clamp_high[0] vssa1 3.58fF -C2101 io_clamp_low[0] vssa1 3.58fF -C2102 io_clamp_high[1] vssa1 3.58fF -C2103 io_clamp_low[1] vssa1 3.58fF -C2104 io_clamp_high[2] vssa1 3.58fF -C2105 io_clamp_low[2] vssa1 3.58fF -C2106 io_analog[7] vssa1 12.74fF -C2107 io_analog[8] vssa1 13.08fF -C2108 io_analog[9] vssa1 13.08fF -C2109 user_irq[2] vssa1 0.63fF -C2110 user_irq[1] vssa1 0.63fF -C2111 user_irq[0] vssa1 0.63fF -C2112 user_clock2 vssa1 0.63fF -C2113 la_oenb[127] vssa1 0.63fF -C2114 la_data_out[127] vssa1 0.63fF -C2115 la_data_in[127] vssa1 0.63fF -C2116 la_oenb[126] vssa1 0.63fF -C2117 la_data_out[126] vssa1 0.63fF -C2118 la_data_in[126] vssa1 0.63fF -C2119 la_oenb[125] vssa1 0.63fF -C2120 la_data_out[125] vssa1 0.63fF -C2121 la_data_in[125] vssa1 0.63fF -C2122 la_oenb[124] vssa1 0.63fF -C2123 la_data_out[124] vssa1 0.63fF -C2124 la_data_in[124] vssa1 0.63fF -C2125 la_oenb[123] vssa1 0.63fF -C2126 la_data_out[123] vssa1 0.63fF -C2127 la_data_in[123] vssa1 0.63fF -C2128 la_oenb[122] vssa1 0.63fF -C2129 la_data_out[122] vssa1 0.63fF -C2130 la_data_in[122] vssa1 0.63fF -C2131 la_oenb[121] vssa1 0.63fF -C2132 la_data_out[121] vssa1 0.63fF -C2133 la_data_in[121] vssa1 0.63fF -C2134 la_oenb[120] vssa1 0.63fF -C2135 la_data_out[120] vssa1 0.63fF -C2136 la_data_in[120] vssa1 0.63fF -C2137 la_oenb[119] vssa1 0.63fF -C2138 la_data_out[119] vssa1 0.63fF -C2139 la_data_in[119] vssa1 0.63fF -C2140 la_oenb[118] vssa1 0.63fF -C2141 la_data_out[118] vssa1 0.63fF -C2142 la_data_in[118] vssa1 0.63fF -C2143 la_oenb[117] vssa1 0.63fF -C2144 la_data_out[117] vssa1 0.63fF -C2145 la_data_in[117] vssa1 0.63fF -C2146 la_oenb[116] vssa1 0.63fF -C2147 la_data_out[116] vssa1 0.63fF -C2148 la_data_in[116] vssa1 0.63fF -C2149 la_oenb[115] vssa1 0.63fF -C2150 la_data_out[115] vssa1 0.63fF -C2151 la_data_in[115] vssa1 0.63fF -C2152 la_oenb[114] vssa1 0.63fF -C2153 la_data_out[114] vssa1 0.63fF -C2154 la_data_in[114] vssa1 0.63fF -C2155 la_oenb[113] vssa1 0.63fF -C2156 la_data_out[113] vssa1 0.63fF -C2157 la_data_in[113] vssa1 0.63fF -C2158 la_oenb[112] vssa1 0.63fF -C2159 la_data_out[112] vssa1 0.63fF -C2160 la_data_in[112] vssa1 0.63fF -C2161 la_oenb[111] vssa1 0.63fF -C2162 la_data_out[111] vssa1 0.63fF -C2163 la_data_in[111] vssa1 0.63fF -C2164 la_oenb[110] vssa1 0.63fF -C2165 la_data_out[110] vssa1 0.63fF -C2166 la_data_in[110] vssa1 0.63fF -C2167 la_oenb[109] vssa1 0.63fF -C2168 la_data_out[109] vssa1 0.63fF -C2169 la_data_in[109] vssa1 0.63fF -C2170 la_oenb[108] vssa1 0.63fF -C2171 la_data_out[108] vssa1 0.63fF -C2172 la_data_in[108] vssa1 0.63fF -C2173 la_oenb[107] vssa1 0.63fF -C2174 la_data_out[107] vssa1 0.63fF -C2175 la_data_in[107] vssa1 0.63fF -C2176 la_oenb[106] vssa1 0.63fF -C2177 la_data_out[106] vssa1 0.63fF -C2178 la_data_in[106] vssa1 0.63fF -C2179 la_oenb[105] vssa1 0.63fF -C2180 la_data_out[105] vssa1 0.63fF -C2181 la_data_in[105] vssa1 0.63fF -C2182 la_oenb[104] vssa1 0.63fF -C2183 la_data_out[104] vssa1 0.63fF -C2184 la_data_in[104] vssa1 0.63fF -C2185 la_oenb[103] vssa1 0.63fF -C2186 la_data_out[103] vssa1 0.63fF -C2187 la_data_in[103] vssa1 0.63fF -C2188 la_oenb[102] vssa1 0.63fF -C2189 la_data_out[102] vssa1 0.63fF -C2190 la_data_in[102] vssa1 0.63fF -C2191 la_oenb[101] vssa1 0.63fF -C2192 la_data_out[101] vssa1 0.63fF -C2193 la_data_in[101] vssa1 0.63fF -C2194 la_oenb[100] vssa1 0.63fF -C2195 la_data_out[100] vssa1 0.63fF -C2196 la_data_in[100] vssa1 0.63fF -C2197 la_oenb[99] vssa1 0.63fF -C2198 la_data_out[99] vssa1 0.63fF -C2199 la_data_in[99] vssa1 0.63fF -C2200 la_oenb[98] vssa1 0.63fF -C2201 la_data_out[98] vssa1 0.63fF -C2202 la_data_in[98] vssa1 0.63fF -C2203 la_oenb[97] vssa1 0.63fF -C2204 la_data_out[97] vssa1 0.63fF -C2205 la_data_in[97] vssa1 0.63fF -C2206 la_oenb[96] vssa1 0.63fF -C2207 la_data_out[96] vssa1 0.63fF -C2208 la_data_in[96] vssa1 0.63fF -C2209 la_oenb[95] vssa1 0.63fF -C2210 la_data_out[95] vssa1 0.63fF -C2211 la_data_in[95] vssa1 0.63fF -C2212 la_oenb[94] vssa1 0.63fF -C2213 la_data_out[94] vssa1 0.63fF -C2214 la_data_in[94] vssa1 0.63fF -C2215 la_oenb[93] vssa1 0.63fF -C2216 la_data_out[93] vssa1 0.63fF -C2217 la_data_in[93] vssa1 0.63fF -C2218 la_oenb[92] vssa1 0.63fF -C2219 la_data_out[92] vssa1 0.63fF -C2220 la_data_in[92] vssa1 0.63fF -C2221 la_oenb[91] vssa1 0.63fF -C2222 la_data_out[91] vssa1 0.63fF -C2223 la_data_in[91] vssa1 0.63fF -C2224 la_oenb[90] vssa1 0.63fF -C2225 la_data_out[90] vssa1 0.63fF -C2226 la_data_in[90] vssa1 0.63fF -C2227 la_oenb[89] vssa1 0.63fF -C2228 la_data_out[89] vssa1 0.63fF -C2229 la_data_in[89] vssa1 0.63fF -C2230 la_oenb[88] vssa1 0.63fF -C2231 la_data_out[88] vssa1 0.63fF -C2232 la_data_in[88] vssa1 0.63fF -C2233 la_oenb[87] vssa1 0.63fF -C2234 la_data_out[87] vssa1 0.63fF -C2235 la_data_in[87] vssa1 0.63fF -C2236 la_oenb[86] vssa1 0.63fF -C2237 la_data_out[86] vssa1 0.63fF -C2238 la_data_in[86] vssa1 0.63fF -C2239 la_oenb[85] vssa1 0.63fF -C2240 la_data_out[85] vssa1 0.63fF -C2241 la_data_in[85] vssa1 0.63fF -C2242 la_oenb[84] vssa1 0.63fF -C2243 la_data_out[84] vssa1 0.63fF -C2244 la_data_in[84] vssa1 0.63fF -C2245 la_oenb[83] vssa1 0.63fF -C2246 la_data_out[83] vssa1 0.63fF -C2247 la_data_in[83] vssa1 0.63fF -C2248 la_oenb[82] vssa1 0.63fF -C2249 la_data_out[82] vssa1 0.63fF -C2250 la_data_in[82] vssa1 0.63fF -C2251 la_oenb[81] vssa1 0.63fF -C2252 la_data_out[81] vssa1 0.63fF -C2253 la_data_in[81] vssa1 0.63fF -C2254 la_oenb[80] vssa1 0.63fF -C2255 la_data_out[80] vssa1 0.63fF -C2256 la_data_in[80] vssa1 0.63fF -C2257 la_oenb[79] vssa1 0.63fF -C2258 la_data_out[79] vssa1 0.63fF -C2259 la_data_in[79] vssa1 0.63fF -C2260 la_oenb[78] vssa1 0.63fF -C2261 la_data_out[78] vssa1 0.63fF -C2262 la_data_in[78] vssa1 0.63fF -C2263 la_oenb[77] vssa1 0.63fF -C2264 la_data_out[77] vssa1 0.63fF -C2265 la_data_in[77] vssa1 0.63fF -C2266 la_oenb[76] vssa1 0.63fF -C2267 la_data_out[76] vssa1 0.63fF -C2268 la_data_in[76] vssa1 0.63fF -C2269 la_oenb[75] vssa1 0.63fF -C2270 la_data_out[75] vssa1 0.63fF -C2271 la_data_in[75] vssa1 0.63fF -C2272 la_oenb[74] vssa1 0.63fF -C2273 la_data_out[74] vssa1 0.63fF -C2274 la_data_in[74] vssa1 0.63fF -C2275 la_oenb[73] vssa1 0.63fF -C2276 la_data_out[73] vssa1 0.63fF -C2277 la_data_in[73] vssa1 0.63fF -C2278 la_oenb[72] vssa1 0.63fF -C2279 la_data_out[72] vssa1 0.63fF -C2280 la_data_in[72] vssa1 0.63fF -C2281 la_oenb[71] vssa1 0.63fF -C2282 la_data_out[71] vssa1 0.63fF -C2283 la_data_in[71] vssa1 0.63fF -C2284 la_oenb[70] vssa1 0.63fF -C2285 la_data_out[70] vssa1 0.63fF -C2286 la_data_in[70] vssa1 0.63fF -C2287 la_oenb[69] vssa1 0.63fF -C2288 la_data_out[69] vssa1 0.63fF -C2289 la_data_in[69] vssa1 0.63fF -C2290 la_oenb[68] vssa1 0.63fF -C2291 la_data_out[68] vssa1 0.63fF -C2292 la_data_in[68] vssa1 0.63fF -C2293 la_oenb[67] vssa1 0.63fF -C2294 la_data_out[67] vssa1 0.63fF -C2295 la_data_in[67] vssa1 0.63fF -C2296 la_oenb[66] vssa1 0.63fF -C2297 la_data_out[66] vssa1 0.63fF -C2298 la_data_in[66] vssa1 0.63fF -C2299 la_oenb[65] vssa1 0.63fF -C2300 la_data_out[65] vssa1 0.63fF -C2301 la_data_in[65] vssa1 0.63fF -C2302 la_oenb[64] vssa1 0.63fF -C2303 la_data_out[64] vssa1 0.63fF -C2304 la_data_in[64] vssa1 0.63fF -C2305 la_oenb[63] vssa1 0.63fF -C2306 la_data_out[63] vssa1 0.63fF -C2307 la_data_in[63] vssa1 0.63fF -C2308 la_oenb[62] vssa1 0.63fF -C2309 la_data_out[62] vssa1 0.63fF -C2310 la_data_in[62] vssa1 0.63fF -C2311 la_oenb[61] vssa1 0.63fF -C2312 la_data_out[61] vssa1 0.63fF -C2313 la_data_in[61] vssa1 0.63fF -C2314 la_oenb[60] vssa1 0.63fF -C2315 la_data_out[60] vssa1 0.63fF -C2316 la_data_in[60] vssa1 0.63fF -C2317 la_oenb[59] vssa1 0.63fF -C2318 la_data_out[59] vssa1 0.63fF -C2319 la_data_in[59] vssa1 0.63fF -C2320 la_oenb[58] vssa1 0.63fF -C2321 la_data_out[58] vssa1 0.63fF -C2322 la_data_in[58] vssa1 0.63fF -C2323 la_oenb[57] vssa1 0.63fF -C2324 la_data_out[57] vssa1 0.63fF -C2325 la_data_in[57] vssa1 0.63fF -C2326 la_oenb[56] vssa1 0.63fF -C2327 la_data_out[56] vssa1 0.63fF -C2328 la_data_in[56] vssa1 0.63fF -C2329 la_oenb[55] vssa1 0.63fF -C2330 la_data_out[55] vssa1 0.63fF -C2331 la_data_in[55] vssa1 0.63fF -C2332 la_oenb[54] vssa1 0.63fF -C2333 la_data_out[54] vssa1 0.63fF -C2334 la_data_in[54] vssa1 0.63fF -C2335 la_oenb[53] vssa1 0.63fF -C2336 la_data_out[53] vssa1 0.63fF -C2337 la_data_in[53] vssa1 0.63fF -C2338 la_oenb[52] vssa1 0.63fF -C2339 la_data_out[52] vssa1 0.63fF -C2340 la_data_in[52] vssa1 0.63fF -C2341 la_oenb[51] vssa1 0.63fF -C2342 la_data_out[51] vssa1 0.63fF -C2343 la_data_in[51] vssa1 0.63fF -C2344 la_oenb[50] vssa1 0.63fF -C2345 la_data_out[50] vssa1 0.63fF -C2346 la_data_in[50] vssa1 0.63fF -C2347 la_oenb[49] vssa1 0.63fF -C2348 la_data_out[49] vssa1 0.63fF -C2349 la_data_in[49] vssa1 0.63fF -C2350 la_oenb[48] vssa1 0.63fF -C2351 la_data_out[48] vssa1 0.63fF -C2352 la_data_in[48] vssa1 0.63fF -C2353 la_oenb[47] vssa1 0.63fF -C2354 la_data_out[47] vssa1 0.63fF -C2355 la_data_in[47] vssa1 0.63fF -C2356 la_oenb[46] vssa1 0.63fF -C2357 la_data_out[46] vssa1 0.63fF -C2358 la_data_in[46] vssa1 0.63fF -C2359 la_oenb[45] vssa1 0.63fF -C2360 la_data_out[45] vssa1 0.63fF -C2361 la_data_in[45] vssa1 0.63fF -C2362 la_oenb[44] vssa1 0.63fF -C2363 la_data_out[44] vssa1 0.63fF -C2364 la_data_in[44] vssa1 0.63fF -C2365 la_oenb[43] vssa1 0.63fF -C2366 la_data_out[43] vssa1 0.63fF -C2367 la_data_in[43] vssa1 0.63fF -C2368 la_oenb[42] vssa1 0.63fF -C2369 la_data_out[42] vssa1 0.63fF -C2370 la_data_in[42] vssa1 0.63fF -C2371 la_oenb[41] vssa1 0.63fF -C2372 la_data_out[41] vssa1 0.63fF -C2373 la_data_in[41] vssa1 0.63fF -C2374 la_oenb[40] vssa1 0.63fF -C2375 la_data_out[40] vssa1 0.63fF -C2376 la_data_in[40] vssa1 0.63fF -C2377 la_oenb[39] vssa1 0.63fF -C2378 la_data_out[39] vssa1 0.63fF -C2379 la_data_in[39] vssa1 0.63fF -C2380 la_oenb[38] vssa1 0.63fF -C2381 la_data_out[38] vssa1 0.63fF -C2382 la_data_in[38] vssa1 0.63fF -C2383 la_oenb[37] vssa1 0.63fF -C2384 la_data_out[37] vssa1 0.63fF -C2385 la_data_in[37] vssa1 0.63fF -C2386 la_oenb[36] vssa1 0.63fF -C2387 la_data_out[36] vssa1 0.63fF -C2388 la_data_in[36] vssa1 0.63fF -C2389 la_oenb[35] vssa1 0.63fF -C2390 la_data_out[35] vssa1 0.63fF -C2391 la_data_in[35] vssa1 0.63fF -C2392 la_oenb[34] vssa1 0.63fF -C2393 la_data_out[34] vssa1 0.63fF -C2394 la_data_in[34] vssa1 0.63fF -C2395 la_oenb[33] vssa1 0.63fF -C2396 la_data_out[33] vssa1 0.63fF -C2397 la_data_in[33] vssa1 0.63fF -C2398 la_oenb[32] vssa1 0.63fF -C2399 la_data_out[32] vssa1 0.63fF -C2400 la_data_in[32] vssa1 0.63fF -C2401 la_oenb[31] vssa1 0.63fF -C2402 la_data_out[31] vssa1 0.63fF -C2403 la_data_in[31] vssa1 0.63fF -C2404 la_oenb[30] vssa1 0.63fF -C2405 la_data_out[30] vssa1 0.63fF -C2406 la_data_in[30] vssa1 0.63fF -C2407 la_oenb[29] vssa1 0.63fF -C2408 la_data_out[29] vssa1 0.63fF -C2409 la_data_in[29] vssa1 0.63fF -C2410 la_oenb[28] vssa1 0.63fF -C2411 la_data_out[28] vssa1 0.63fF -C2412 la_data_in[28] vssa1 0.63fF -C2413 la_oenb[27] vssa1 0.63fF -C2414 la_data_out[27] vssa1 0.63fF -C2415 la_data_in[27] vssa1 0.63fF -C2416 la_oenb[26] vssa1 0.63fF -C2417 la_data_out[26] vssa1 0.63fF -C2418 la_data_in[26] vssa1 0.63fF -C2419 la_oenb[25] vssa1 0.63fF -C2420 la_data_out[25] vssa1 0.63fF -C2421 la_data_in[25] vssa1 0.63fF -C2422 la_oenb[24] vssa1 0.63fF -C2423 la_data_out[24] vssa1 0.63fF -C2424 la_data_in[24] vssa1 0.63fF -C2425 la_oenb[23] vssa1 0.63fF -C2426 la_data_out[23] vssa1 0.63fF -C2427 la_data_in[23] vssa1 0.63fF -C2428 la_oenb[22] vssa1 0.63fF -C2429 la_data_out[22] vssa1 0.63fF -C2430 la_data_in[22] vssa1 0.63fF -C2431 la_oenb[21] vssa1 0.63fF -C2432 la_data_out[21] vssa1 0.63fF -C2433 la_data_in[21] vssa1 0.63fF -C2434 la_oenb[20] vssa1 0.63fF -C2435 la_data_out[20] vssa1 0.63fF -C2436 la_data_in[20] vssa1 0.63fF -C2437 la_oenb[19] vssa1 0.63fF -C2438 la_data_out[19] vssa1 0.63fF -C2439 la_data_in[19] vssa1 0.63fF -C2440 la_oenb[18] vssa1 0.63fF -C2441 la_data_out[18] vssa1 0.63fF -C2442 la_data_in[18] vssa1 0.63fF -C2443 la_oenb[17] vssa1 0.63fF -C2444 la_data_out[17] vssa1 0.63fF -C2445 la_data_in[17] vssa1 0.63fF -C2446 la_oenb[16] vssa1 0.63fF -C2447 la_data_out[16] vssa1 0.63fF -C2448 la_data_in[16] vssa1 0.63fF -C2449 la_oenb[15] vssa1 0.63fF -C2450 la_data_out[15] vssa1 0.63fF -C2451 la_data_in[15] vssa1 0.63fF -C2452 la_oenb[14] vssa1 0.63fF -C2453 la_data_out[14] vssa1 0.63fF -C2454 la_data_in[14] vssa1 0.63fF -C2455 la_oenb[13] vssa1 0.63fF -C2456 la_data_out[13] vssa1 0.63fF -C2457 la_data_in[13] vssa1 0.63fF -C2458 la_oenb[12] vssa1 0.63fF -C2459 la_data_out[12] vssa1 0.63fF -C2460 la_data_in[12] vssa1 0.63fF -C2461 la_oenb[11] vssa1 0.63fF -C2462 la_data_out[11] vssa1 0.63fF -C2463 la_data_in[11] vssa1 0.63fF -C2464 la_oenb[10] vssa1 0.63fF -C2465 la_data_out[10] vssa1 0.63fF -C2466 la_data_in[10] vssa1 0.63fF -C2467 la_oenb[9] vssa1 0.63fF -C2468 la_data_out[9] vssa1 0.63fF -C2469 la_data_in[9] vssa1 0.63fF -C2470 la_oenb[8] vssa1 0.63fF -C2471 la_data_out[8] vssa1 0.63fF -C2472 la_data_in[8] vssa1 0.63fF -C2473 la_oenb[7] vssa1 0.63fF -C2474 la_data_out[7] vssa1 0.63fF -C2475 la_data_in[7] vssa1 0.63fF -C2476 la_oenb[6] vssa1 0.63fF -C2477 la_data_out[6] vssa1 0.63fF -C2478 la_data_in[6] vssa1 0.63fF -C2479 la_oenb[5] vssa1 0.63fF -C2480 la_data_out[5] vssa1 0.63fF -C2481 la_data_in[5] vssa1 0.63fF -C2482 la_oenb[4] vssa1 0.63fF -C2483 la_data_out[4] vssa1 0.63fF -C2484 la_data_in[4] vssa1 0.63fF -C2485 la_oenb[3] vssa1 0.63fF -C2486 la_data_out[3] vssa1 0.63fF -C2487 la_data_in[3] vssa1 0.63fF -C2488 la_oenb[2] vssa1 0.63fF -C2489 la_data_out[2] vssa1 0.63fF -C2490 la_data_in[2] vssa1 0.63fF -C2491 la_oenb[1] vssa1 0.63fF -C2492 la_data_out[1] vssa1 0.63fF -C2493 la_data_in[1] vssa1 0.63fF -C2494 la_oenb[0] vssa1 0.63fF -C2495 la_data_out[0] vssa1 0.63fF -C2496 la_data_in[0] vssa1 0.63fF -C2497 wbs_dat_o[31] vssa1 0.63fF -C2498 wbs_dat_i[31] vssa1 0.63fF -C2499 wbs_adr_i[31] vssa1 0.63fF -C2500 wbs_dat_o[30] vssa1 0.63fF -C2501 wbs_dat_i[30] vssa1 0.63fF -C2502 wbs_adr_i[30] vssa1 0.63fF -C2503 wbs_dat_o[29] vssa1 0.63fF -C2504 wbs_dat_i[29] vssa1 0.63fF -C2505 wbs_adr_i[29] vssa1 0.63fF -C2506 wbs_dat_o[28] vssa1 0.63fF -C2507 wbs_dat_i[28] vssa1 0.63fF -C2508 wbs_adr_i[28] vssa1 0.63fF -C2509 wbs_dat_o[27] vssa1 0.63fF -C2510 wbs_dat_i[27] vssa1 0.63fF -C2511 wbs_adr_i[27] vssa1 0.63fF -C2512 wbs_dat_o[26] vssa1 0.63fF -C2513 wbs_dat_i[26] vssa1 0.63fF -C2514 wbs_adr_i[26] vssa1 0.63fF -C2515 wbs_dat_o[25] vssa1 0.63fF -C2516 wbs_dat_i[25] vssa1 0.63fF -C2517 wbs_adr_i[25] vssa1 0.63fF -C2518 wbs_dat_o[24] vssa1 0.63fF -C2519 wbs_dat_i[24] vssa1 0.63fF -C2520 wbs_adr_i[24] vssa1 0.63fF -C2521 wbs_dat_o[23] vssa1 0.63fF -C2522 wbs_dat_i[23] vssa1 0.63fF -C2523 wbs_adr_i[23] vssa1 0.63fF -C2524 wbs_dat_o[22] vssa1 0.63fF -C2525 wbs_dat_i[22] vssa1 0.63fF -C2526 wbs_adr_i[22] vssa1 0.63fF -C2527 wbs_dat_o[21] vssa1 0.63fF -C2528 wbs_dat_i[21] vssa1 0.63fF -C2529 wbs_adr_i[21] vssa1 0.63fF -C2530 wbs_dat_o[20] vssa1 0.63fF -C2531 wbs_dat_i[20] vssa1 0.63fF -C2532 wbs_adr_i[20] vssa1 0.63fF -C2533 wbs_dat_o[19] vssa1 0.63fF -C2534 wbs_dat_i[19] vssa1 0.63fF -C2535 wbs_adr_i[19] vssa1 0.63fF -C2536 wbs_dat_o[18] vssa1 0.63fF -C2537 wbs_dat_i[18] vssa1 0.63fF -C2538 wbs_adr_i[18] vssa1 0.63fF -C2539 wbs_dat_o[17] vssa1 0.63fF -C2540 wbs_dat_i[17] vssa1 0.63fF -C2541 wbs_adr_i[17] vssa1 0.63fF -C2542 wbs_dat_o[16] vssa1 0.63fF -C2543 wbs_dat_i[16] vssa1 0.63fF -C2544 wbs_adr_i[16] vssa1 0.63fF -C2545 wbs_dat_o[15] vssa1 0.63fF -C2546 wbs_dat_i[15] vssa1 0.63fF -C2547 wbs_adr_i[15] vssa1 0.63fF -C2548 wbs_dat_o[14] vssa1 0.63fF -C2549 wbs_dat_i[14] vssa1 0.63fF -C2550 wbs_adr_i[14] vssa1 0.63fF -C2551 wbs_dat_o[13] vssa1 0.63fF -C2552 wbs_dat_i[13] vssa1 0.63fF -C2553 wbs_adr_i[13] vssa1 0.63fF -C2554 wbs_dat_o[12] vssa1 0.63fF -C2555 wbs_dat_i[12] vssa1 0.63fF -C2556 wbs_adr_i[12] vssa1 0.63fF -C2557 wbs_dat_o[11] vssa1 0.63fF -C2558 wbs_dat_i[11] vssa1 0.63fF -C2559 wbs_adr_i[11] vssa1 0.63fF -C2560 wbs_dat_o[10] vssa1 0.63fF -C2561 wbs_dat_i[10] vssa1 0.63fF -C2562 wbs_adr_i[10] vssa1 0.63fF -C2563 wbs_dat_o[9] vssa1 0.63fF -C2564 wbs_dat_i[9] vssa1 0.63fF -C2565 wbs_adr_i[9] vssa1 0.63fF -C2566 wbs_dat_o[8] vssa1 0.63fF -C2567 wbs_dat_i[8] vssa1 0.63fF -C2568 wbs_adr_i[8] vssa1 0.63fF -C2569 wbs_dat_o[7] vssa1 0.63fF -C2570 wbs_dat_i[7] vssa1 0.63fF -C2571 wbs_adr_i[7] vssa1 0.63fF -C2572 wbs_dat_o[6] vssa1 0.63fF -C2573 wbs_dat_i[6] vssa1 0.63fF -C2574 wbs_adr_i[6] vssa1 0.63fF -C2575 wbs_dat_o[5] vssa1 0.63fF -C2576 wbs_dat_i[5] vssa1 0.63fF -C2577 wbs_adr_i[5] vssa1 0.63fF -C2578 wbs_dat_o[4] vssa1 0.63fF -C2579 wbs_dat_i[4] vssa1 0.63fF -C2580 wbs_adr_i[4] vssa1 0.63fF -C2581 wbs_sel_i[3] vssa1 0.63fF -C2582 wbs_dat_o[3] vssa1 0.63fF -C2583 wbs_dat_i[3] vssa1 0.63fF -C2584 wbs_adr_i[3] vssa1 0.63fF -C2585 wbs_sel_i[2] vssa1 0.63fF -C2586 wbs_dat_o[2] vssa1 0.63fF -C2587 wbs_dat_i[2] vssa1 0.63fF -C2588 wbs_adr_i[2] vssa1 0.63fF -C2589 wbs_sel_i[1] vssa1 0.63fF -C2590 wbs_dat_o[1] vssa1 0.63fF -C2591 wbs_dat_i[1] vssa1 0.63fF -C2592 wbs_adr_i[1] vssa1 0.63fF -C2593 wbs_sel_i[0] vssa1 0.63fF -C2594 wbs_dat_o[0] vssa1 0.63fF -C2595 wbs_dat_i[0] vssa1 0.63fF -C2596 wbs_adr_i[0] vssa1 0.63fF -C2597 wbs_we_i vssa1 0.63fF -C2598 wbs_stb_i vssa1 0.63fF -C2599 wbs_cyc_i vssa1 0.63fF -C2600 wbs_ack_o vssa1 0.63fF -C2601 wb_rst_i vssa1 0.63fF -C2602 wb_clk_i vssa1 0.63fF -C2603 pll_full_1/divider_0/and_0/Z1 vssa1 0.65fF -C2604 pll_full_1/divider_0/and_0/B vssa1 2.45fF -C2605 pll_full_1/divider_0/and_0/A vssa1 2.35fF -C2606 pll_full_1/divider_0/and_0/out1 vssa1 2.99fF -C2607 pll_full_1/divider_0/tspc_2/Z4 vssa1 0.86fF -C2608 pll_full_1/div vssa1 14.90fF -C2609 pll_full_1/divider_0/tspc_2/Z3 vssa1 2.26fF -C2610 pll_full_1/divider_0/tspc_2/Z2 vssa1 1.46fF -C2611 pll_full_1/divider_0/tspc_2/Z1 vssa1 0.99fF -C2612 pll_full_1/divider_0/nor_0/B vssa1 6.48fF -C2614 pll_full_1/divider_0/tspc_1/Z4 vssa1 0.86fF -C2615 pll_full_1/divider_0/tspc_1/Q vssa1 3.12fF -C2616 pll_full_1/divider_0/tspc_1/Z3 vssa1 2.26fF -C2617 pll_full_1/divider_0/tspc_1/Z2 vssa1 1.46fF -C2618 pll_full_1/divider_0/tspc_1/Z1 vssa1 0.99fF -C2619 pll_full_1/divider_0/nor_1/B vssa1 7.12fF -C2621 pll_full_1/divider_0/tspc_0/Z4 vssa1 0.86fF -C2622 pll_full_1/divider_0/tspc_0/Q vssa1 3.14fF -C2623 pll_full_1/divider_0/tspc_0/Z3 vssa1 2.26fF -C2624 pll_full_1/divider_0/tspc_0/Z2 vssa1 1.46fF -C2625 pll_full_1/divider_0/tspc_0/Z1 vssa1 0.99fF -C2626 pll_full_1/divider_0/nor_1/A vssa1 7.08fF -C2628 pll_full_1/vco vssa1 35.22fF -C2629 pll_full_1/divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF -C2630 pll_full_1/divider_0/prescaler_0/tspc_0/D vssa1 2.64fF -C2631 pll_full_1/divider_0/prescaler_0/tspc_2/Q vssa1 3.72fF -C2632 pll_full_1/divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF -C2633 pll_full_1/divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF -C2634 pll_full_1/divider_0/prescaler_0/tspc_2/D vssa1 3.12fF -C2635 pll_full_1/divider_0/and_0/OUT vssa1 5.67fF -C2636 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF -C2637 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF -C2638 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 vssa1 1.19fF -C2639 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF -C2640 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.47fF **FLOATING -C2641 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING -C2642 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF -C2643 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF -C2644 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF -C2645 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF -C2646 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING -C2647 pll_full_1/divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING -C2648 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF -C2649 pll_full_1/divider_0/prescaler_0/Out vssa1 4.59fF -C2650 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF -C2651 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF -C2652 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF -C2653 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING -C2654 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING -C2655 pll_full_1/divider_0/nor_1/Z1 vssa1 1.34fF -C2656 pll_full_1/divider_0/nor_0/Z1 vssa1 1.34fF -C2657 pll_full_1/ro_complete_0/cbank_2/v vssa1 16.43fF -C2658 pll_full_1/ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF -C2659 pll_full_1/ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF -C2660 pll_full_1/ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF -C2661 pll_full_1/ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF -C2662 pll_full_1/ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF -C2663 pll_full_1/ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF -C2664 pll_full_1/ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF -C2665 pll_full_1/ro_complete_0/a0 vssa1 5.35fF -C2666 pll_full_1/ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF -C2667 pll_full_1/ro_complete_0/a1 vssa1 6.54fF -C2668 pll_full_1/ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF -C2669 pll_full_1/ro_complete_0/a3 vssa1 5.96fF -C2670 pll_full_1/ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF -C2671 pll_full_1/ro_complete_0/a2 vssa1 5.21fF -C2672 pll_full_1/ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF -C2673 pll_full_1/ro_complete_0/a4 vssa1 5.81fF -C2674 pll_full_1/ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF -C2675 pll_full_1/ro_complete_0/a5 vssa1 6.74fF -C2676 pll_full_1/ro_complete_0/cbank_0/v vssa1 15.12fF -C2677 pll_full_1/ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF -C2678 pll_full_1/ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF -C2679 pll_full_1/ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF -C2680 pll_full_1/ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF -C2681 pll_full_1/ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF -C2682 pll_full_1/ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF -C2683 pll_full_1/filter_0/a_4216_n5230# vssa1 418.90fF **FLOATING -C2684 pll_full_1/filter_0/a_4216_n2998# vssa1 1.39fF **FLOATING -C2685 pll_full_1/cp_0/down vssa1 1.54fF -C2686 pll_full_1/cp_0/upbar vssa1 1.79fF -C2687 pll_full_1/cp_0/a_7110_n2840# vssa1 0.17fF **FLOATING -C2688 pll_full_1/cp_0/a_3060_n2840# vssa1 1.71fF **FLOATING -C2689 pll_full_1/cp_0/a_7110_0# vssa1 0.17fF **FLOATING -C2690 pll_full_1/cp_0/a_6370_0# vssa1 0.40fF **FLOATING -C2691 pll_full_1/cp_0/a_3060_0# vssa1 2.50fF **FLOATING -C2692 pll_full_1/cp_0/a_1710_0# vssa1 7.47fF **FLOATING -C2693 pll_full_1/pd_0/UP vssa1 5.89fF -C2694 pll_full_1/pd_0/and_pd_0/Z1 vssa1 0.39fF -C2695 pll_full_1/pd_0/and_pd_0/Out1 vssa1 2.22fF -C2696 pll_full_1/pd_0/tspc_r_1/z5 vssa1 1.10fF -C2697 pll_full_1/pd_0/tspc_r_1/Z4 vssa1 1.07fF -C2698 pll_full_1/pd_0/R vssa1 3.05fF -C2699 pll_full_1/pd_0/tspc_r_1/Qbar vssa1 0.79fF -C2700 pll_full_1/pd_0/tspc_r_1/Z2 vssa1 1.22fF -C2701 pll_full_1/pd_0/tspc_r_1/Z1 vssa1 0.67fF -C2702 pll_full_1/pd_0/DOWN vssa1 7.38fF -C2703 pll_full_1/pd_0/tspc_r_1/Qbar1 vssa1 1.34fF -C2704 pll_full_1/pd_0/tspc_r_1/Z3 vssa1 2.12fF -C2705 pll_full_1/pd_0/tspc_r_0/z5 vssa1 1.10fF -C2706 pll_full_1/pd_0/tspc_r_0/Z4 vssa1 1.07fF -C2707 pll_full_1/pd_0/tspc_r_0/Qbar vssa1 0.88fF -C2708 pll_full_1/pd_0/tspc_r_0/Z2 vssa1 1.22fF -C2709 pll_full_1/pd_0/tspc_r_0/Z1 vssa1 0.67fF -C2710 pll_full_1/pd_0/tspc_r_0/Qbar1 vssa1 1.34fF -C2711 pll_full_1/pd_0/tspc_r_0/Z3 vssa1 2.12fF -C2712 pll_full_1/ref vssa1 4.34fF -C2713 pll_full_0/divider_0/and_0/Z1 vssa1 0.65fF -C2714 pll_full_0/divider_0/and_0/B vssa1 2.45fF -C2715 pll_full_0/divider_0/and_0/A vssa1 2.35fF -C2716 pll_full_0/divider_0/and_0/out1 vssa1 2.99fF -C2717 pll_full_0/divider_0/tspc_2/Z4 vssa1 0.86fF -C2718 pll_full_0/div vssa1 14.90fF -C2719 pll_full_0/divider_0/tspc_2/Z3 vssa1 2.26fF -C2720 pll_full_0/divider_0/tspc_2/Z2 vssa1 1.46fF -C2721 pll_full_0/divider_0/tspc_2/Z1 vssa1 0.99fF -C2722 pll_full_0/divider_0/nor_0/B vssa1 6.48fF -C2723 pll_full_0/divider_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING -C2724 pll_full_0/divider_0/tspc_1/Z4 vssa1 0.86fF -C2725 pll_full_0/divider_0/tspc_1/Q vssa1 3.12fF -C2726 pll_full_0/divider_0/tspc_1/Z3 vssa1 2.26fF -C2727 pll_full_0/divider_0/tspc_1/Z2 vssa1 1.46fF -C2728 pll_full_0/divider_0/tspc_1/Z1 vssa1 0.99fF -C2729 pll_full_0/divider_0/nor_1/B vssa1 7.12fF -C2730 pll_full_0/divider_0/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING -C2731 pll_full_0/divider_0/tspc_0/Z4 vssa1 0.86fF -C2732 pll_full_0/divider_0/tspc_0/Q vssa1 3.14fF -C2733 pll_full_0/divider_0/tspc_0/Z3 vssa1 2.26fF -C2734 pll_full_0/divider_0/tspc_0/Z2 vssa1 1.46fF -C2735 pll_full_0/divider_0/tspc_0/Z1 vssa1 0.99fF -C2736 pll_full_0/divider_0/nor_1/A vssa1 7.08fF -C2737 pll_full_0/divider_0/tspc_0/a_630_n680# vssa1 1.15fF **FLOATING -C2738 pll_full_0/vco vssa1 35.22fF -C2739 pll_full_0/divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF -C2740 pll_full_0/divider_0/prescaler_0/tspc_0/D vssa1 2.64fF -C2741 pll_full_0/divider_0/prescaler_0/tspc_2/Q vssa1 3.72fF -C2742 pll_full_0/divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF -C2743 pll_full_0/divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF -C2744 pll_full_0/divider_0/prescaler_0/tspc_2/D vssa1 3.12fF -C2745 pll_full_0/divider_0/and_0/OUT vssa1 5.67fF -C2746 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF -C2747 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF -C2748 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 vssa1 1.19fF -C2749 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF -C2750 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.47fF **FLOATING -C2751 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING -C2752 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF -C2753 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF -C2754 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF -C2755 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF -C2756 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING -C2757 pll_full_0/divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING -C2758 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF -C2759 pll_full_0/divider_0/prescaler_0/Out vssa1 4.59fF -C2760 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF -C2761 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF -C2762 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF -C2763 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING -C2764 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING -C2765 pll_full_0/divider_0/nor_1/Z1 vssa1 1.34fF -C2766 pll_full_0/divider_0/nor_0/Z1 vssa1 1.34fF -C2767 pll_full_0/ro_complete_0/cbank_2/v vssa1 16.43fF -C2768 pll_full_0/ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF -C2769 pll_full_0/ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF -C2770 pll_full_0/ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF -C2771 pll_full_0/ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF -C2772 pll_full_0/ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF -C2773 pll_full_0/ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF -C2774 pll_full_0/ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF -C2775 pll_full_0/ro_complete_0/a0 vssa1 5.35fF -C2776 pll_full_0/ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF -C2777 pll_full_0/ro_complete_0/a1 vssa1 6.54fF -C2778 pll_full_0/ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF -C2779 pll_full_0/ro_complete_0/a3 vssa1 5.96fF -C2780 pll_full_0/ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF -C2781 pll_full_0/ro_complete_0/a2 vssa1 5.21fF -C2782 pll_full_0/ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF -C2783 pll_full_0/ro_complete_0/a4 vssa1 5.81fF -C2784 pll_full_0/ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF -C2785 pll_full_0/ro_complete_0/a5 vssa1 6.74fF -C2786 pll_full_0/ro_complete_0/cbank_0/v vssa1 15.12fF -C2787 pll_full_0/ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF -C2788 pll_full_0/ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF -C2789 pll_full_0/ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF -C2790 pll_full_0/ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF -C2791 pll_full_0/ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF -C2792 pll_full_0/ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF -C2793 pll_full_0/filter_0/a_4216_n5230# vssa1 418.90fF **FLOATING -C2794 pll_full_0/filter_0/a_4216_n2998# vssa1 1.39fF **FLOATING -C2795 pll_full_0/cp_0/down vssa1 1.54fF -C2796 pll_full_0/cp_0/upbar vssa1 1.79fF -C2797 pll_full_0/cp_0/a_7110_n2840# vssa1 0.17fF **FLOATING -C2798 pll_full_0/cp_0/a_3060_n2840# vssa1 1.71fF **FLOATING -C2799 pll_full_0/cp_0/a_7110_0# vssa1 0.17fF **FLOATING -C2800 pll_full_0/cp_0/a_6370_0# vssa1 0.40fF **FLOATING -C2801 pll_full_0/cp_0/a_3060_0# vssa1 2.50fF **FLOATING -C2802 pll_full_0/cp_0/a_1710_0# vssa1 7.47fF **FLOATING -C2803 pll_full_0/pd_0/UP vssa1 5.89fF -C2804 pll_full_0/pd_0/and_pd_0/Z1 vssa1 0.39fF -C2805 pll_full_0/pd_0/and_pd_0/Out1 vssa1 2.22fF -C2806 pll_full_0/pd_0/tspc_r_1/z5 vssa1 1.10fF -C2807 pll_full_0/pd_0/tspc_r_1/Z4 vssa1 1.07fF -C2808 pll_full_0/pd_0/R vssa1 3.05fF -C2809 pll_full_0/pd_0/tspc_r_1/Qbar vssa1 0.79fF -C2810 pll_full_0/pd_0/tspc_r_1/Z2 vssa1 1.22fF -C2811 pll_full_0/pd_0/tspc_r_1/Z1 vssa1 0.67fF -C2812 pll_full_0/pd_0/DOWN vssa1 7.38fF -C2813 pll_full_0/pd_0/tspc_r_1/Qbar1 vssa1 1.34fF -C2814 pll_full_0/pd_0/tspc_r_1/Z3 vssa1 2.12fF -C2815 pll_full_0/pd_0/tspc_r_0/z5 vssa1 1.10fF -C2816 pll_full_0/pd_0/tspc_r_0/Z4 vssa1 1.07fF -C2817 pll_full_0/pd_0/tspc_r_0/Qbar vssa1 0.88fF -C2818 pll_full_0/pd_0/tspc_r_0/Z2 vssa1 1.22fF -C2819 pll_full_0/pd_0/tspc_r_0/Z1 vssa1 0.67fF -C2820 pll_full_0/pd_0/tspc_r_0/Qbar1 vssa1 1.34fF -C2821 pll_full_0/pd_0/tspc_r_0/Z3 vssa1 2.12fF -C2822 pll_full_0/ref vssa1 4.34fF -C2823 div_pd_buffered_0/tapered_buf_0/out vssa1 385.99fF -C2824 div_pd_buffered_0/tapered_buf_0/a_n10_n140# vssa1 0.06fF **FLOATING -C2825 div_pd_buffered_0/tapered_buf_0/a_210_n610# vssa1 592.97fF **FLOATING -C2826 div_pd_buffered_0/tapered_buf_0/a_160_230# vssa1 0.15fF **FLOATING -C2827 div_pd_buffered_0/tapered_buf_0/a_n10_230# vssa1 0.13fF **FLOATING -C2828 div_pd_buffered_0/tapered_buf_0/a_4670_0# vssa1 252.41fF **FLOATING -C2829 div_pd_buffered_0/tapered_buf_0/a_1650_0# vssa1 63.61fF **FLOATING -C2830 div_pd_buffered_0/tapered_buf_0/a_580_0# vssa1 16.76fF **FLOATING -C2831 div_pd_buffered_0/tapered_buf_0/a_160_n140# vssa1 4.09fF **FLOATING -C2832 div_pd_buffered_0/tapered_buf_1/in vssa1 1.13fF -C2833 div_pd_buffered_0/tapered_buf_1/a_n10_n140# vssa1 0.06fF **FLOATING -C2834 div_pd_buffered_0/tapered_buf_1/a_210_n610# vssa1 592.97fF **FLOATING -C2835 div_pd_buffered_0/tapered_buf_1/a_160_230# vssa1 0.15fF **FLOATING -C2836 div_pd_buffered_0/tapered_buf_1/a_n10_230# vssa1 0.13fF **FLOATING -C2837 div_pd_buffered_0/tapered_buf_1/a_4670_0# vssa1 252.41fF **FLOATING -C2838 div_pd_buffered_0/tapered_buf_1/a_1650_0# vssa1 63.61fF **FLOATING -C2839 div_pd_buffered_0/tapered_buf_1/a_580_0# vssa1 16.76fF **FLOATING -C2840 div_pd_buffered_0/tapered_buf_1/a_160_n140# vssa1 4.09fF **FLOATING -C2841 div_pd_buffered_0/divider_0/and_0/Z1 vssa1 0.74fF -C2842 div_pd_buffered_0/divider_0/and_0/B vssa1 2.25fF -C2843 div_pd_buffered_0/divider_0/and_0/A vssa1 2.19fF -C2844 div_pd_buffered_0/divider_0/and_0/out1 vssa1 2.93fF -C2845 div_pd_buffered_0/divider_0/tspc_2/Z4 vssa1 0.86fF -C2846 div_pd_buffered_0/divider_0/tspc_2/Z3 vssa1 2.26fF -C2847 div_pd_buffered_0/divider_0/tspc_2/Z2 vssa1 1.46fF -C2848 div_pd_buffered_0/divider_0/tspc_2/Z1 vssa1 0.99fF -C2849 div_pd_buffered_0/divider_0/nor_0/B vssa1 6.37fF -C2850 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING -C2851 div_pd_buffered_0/divider_0/tspc_1/Z4 vssa1 0.86fF -C2852 div_pd_buffered_0/divider_0/tspc_1/Q vssa1 3.12fF -C2853 div_pd_buffered_0/divider_0/tspc_1/Z3 vssa1 2.26fF -C2854 div_pd_buffered_0/divider_0/tspc_1/Z2 vssa1 1.46fF -C2855 div_pd_buffered_0/divider_0/tspc_1/Z1 vssa1 0.99fF -C2856 div_pd_buffered_0/divider_0/nor_1/B vssa1 7.05fF -C2857 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING -C2858 div_pd_buffered_0/divider_0/tspc_0/Z4 vssa1 0.86fF -C2859 div_pd_buffered_0/divider_0/tspc_0/Q vssa1 3.14fF -C2860 div_pd_buffered_0/divider_0/tspc_0/Z3 vssa1 2.26fF -C2861 div_pd_buffered_0/divider_0/tspc_0/Z2 vssa1 1.46fF -C2862 div_pd_buffered_0/divider_0/tspc_0/Z1 vssa1 0.99fF -C2863 div_pd_buffered_0/divider_0/nor_1/A vssa1 7.04fF -C2864 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# vssa1 1.15fF **FLOATING -C2865 div_pd_buffered_0/divider_0/clk vssa1 399.62fF -C2866 div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF -C2867 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D vssa1 2.64fF -C2868 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q vssa1 3.64fF -C2869 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF -C2870 div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF -C2871 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D vssa1 3.12fF -C2872 div_pd_buffered_0/divider_0/and_0/OUT vssa1 5.62fF -C2873 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF -C2874 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF -C2875 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 vssa1 1.46fF -C2876 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF -C2877 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING -C2878 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING -C2879 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF -C2880 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF -C2881 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF -C2882 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF -C2883 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING -C2884 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING -C2885 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF -C2886 div_pd_buffered_0/divider_0/prescaler_0/Out vssa1 4.59fF -C2887 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF -C2888 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF -C2889 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF -C2890 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING -C2891 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING -C2892 div_pd_buffered_0/divider_0/nor_1/Z1 vssa1 1.34fF -C2893 div_pd_buffered_0/divider_0/nor_0/Z1 vssa1 1.34fF -C2894 div_pd_buffered_0/divider_0/mc2 vssa1 393.39fF -C2895 div_pd_buffered_0/pd_0/UP vssa1 6.08fF -C2896 div_pd_buffered_0/pd_0/and_pd_0/Z1 vssa1 0.39fF -C2897 div_pd_buffered_0/pd_0/and_pd_0/Out1 vssa1 2.22fF -C2898 div_pd_buffered_0/pd_0/tspc_r_1/z5 vssa1 1.10fF -C2899 div_pd_buffered_0/pd_0/tspc_r_1/Z4 vssa1 1.07fF -C2900 div_pd_buffered_0/pd_0/R vssa1 3.05fF -C2901 div_pd_buffered_0/pd_0/tspc_r_1/Qbar vssa1 0.79fF -C2902 div_pd_buffered_0/pd_0/tspc_r_1/Z2 vssa1 1.22fF -C2903 div_pd_buffered_0/pd_0/tspc_r_1/Z1 vssa1 0.67fF -C2904 div_pd_buffered_0/pd_0/DOWN vssa1 8.79fF -C2905 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 vssa1 1.34fF -C2906 div_pd_buffered_0/pd_0/tspc_r_1/Z3 vssa1 2.12fF -C2907 div_pd_buffered_0/pd_0/DIV vssa1 6.57fF -C2908 div_pd_buffered_0/pd_0/tspc_r_0/z5 vssa1 1.10fF -C2909 div_pd_buffered_0/pd_0/tspc_r_0/Z4 vssa1 1.07fF -C2910 div_pd_buffered_0/pd_0/tspc_r_0/Qbar vssa1 0.88fF -C2911 div_pd_buffered_0/pd_0/tspc_r_0/Z2 vssa1 1.22fF -C2912 div_pd_buffered_0/pd_0/tspc_r_0/Z1 vssa1 0.67fF -C2913 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 vssa1 1.34fF -C2914 div_pd_buffered_0/pd_0/tspc_r_0/Z3 vssa1 2.12fF -C2915 div_pd_buffered_0/pd_0/REF vssa1 392.16fF -C2916 div_pd_buffered_0/tapered_buf_4/out vssa1 385.93fF -C2917 div_pd_buffered_0/tapered_buf_4/a_n10_n140# vssa1 0.06fF **FLOATING -C2918 div_pd_buffered_0/tapered_buf_4/a_210_n610# vssa1 592.97fF **FLOATING -C2919 div_pd_buffered_0/tapered_buf_4/a_160_230# vssa1 0.15fF **FLOATING -C2920 div_pd_buffered_0/tapered_buf_4/a_n10_230# vssa1 0.13fF **FLOATING -C2921 div_pd_buffered_0/tapered_buf_4/a_4670_0# vssa1 252.41fF **FLOATING -C2922 div_pd_buffered_0/tapered_buf_4/a_1650_0# vssa1 63.61fF **FLOATING -C2923 div_pd_buffered_0/tapered_buf_4/a_580_0# vssa1 16.76fF **FLOATING -C2924 div_pd_buffered_0/tapered_buf_4/a_160_n140# vssa1 4.09fF **FLOATING -C2925 div_pd_buffered_0/tapered_buf_3/in vssa1 1.13fF -C2926 div_pd_buffered_0/tapered_buf_3/a_n10_n140# vssa1 0.06fF **FLOATING -C2927 div_pd_buffered_0/tapered_buf_3/a_210_n610# vssa1 592.97fF **FLOATING -C2928 div_pd_buffered_0/tapered_buf_3/a_160_230# vssa1 0.15fF **FLOATING -C2929 div_pd_buffered_0/tapered_buf_3/a_n10_230# vssa1 0.13fF **FLOATING -C2930 div_pd_buffered_0/tapered_buf_3/a_4670_0# vssa1 252.41fF **FLOATING -C2931 div_pd_buffered_0/tapered_buf_3/a_1650_0# vssa1 63.61fF **FLOATING -C2932 div_pd_buffered_0/tapered_buf_3/a_580_0# vssa1 16.76fF **FLOATING -C2933 div_pd_buffered_0/tapered_buf_3/a_160_n140# vssa1 4.09fF **FLOATING -C2934 div_pd_buffered_0/tapered_buf_2/in vssa1 1.13fF -C2935 div_pd_buffered_0/tapered_buf_2/a_n10_n140# vssa1 0.06fF **FLOATING -C2936 div_pd_buffered_0/tapered_buf_2/a_210_n610# vssa1 592.97fF **FLOATING -C2937 div_pd_buffered_0/tapered_buf_2/a_160_230# vssa1 0.15fF **FLOATING -C2938 div_pd_buffered_0/tapered_buf_2/a_n10_230# vssa1 0.13fF **FLOATING -C2939 div_pd_buffered_0/tapered_buf_2/a_4670_0# vssa1 252.41fF **FLOATING -C2940 div_pd_buffered_0/tapered_buf_2/a_1650_0# vssa1 63.61fF **FLOATING -C2941 div_pd_buffered_0/tapered_buf_2/a_580_0# vssa1 16.76fF **FLOATING -C2942 div_pd_buffered_0/tapered_buf_2/a_160_n140# vssa1 4.09fF **FLOATING -C2943 divider_1/and_0/Z1 vssa1 0.74fF -C2944 divider_1/and_0/B vssa1 2.25fF -C2945 divider_1/and_0/A vssa1 2.19fF -C2946 divider_1/and_0/out1 vssa1 2.93fF -C2947 divider_1/tspc_2/Z4 vssa1 0.86fF -C2948 divider_1/Out vssa1 1.60fF -C2949 divider_1/tspc_2/Z3 vssa1 2.26fF -C2950 divider_1/tspc_2/Z2 vssa1 1.46fF -C2951 divider_1/tspc_2/Z1 vssa1 0.99fF -C2952 divider_1/nor_0/B vssa1 6.33fF -C2953 divider_1/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING -C2954 divider_1/tspc_1/Z4 vssa1 0.86fF -C2955 divider_1/tspc_1/Q vssa1 3.12fF -C2956 divider_1/tspc_1/Z3 vssa1 2.26fF -C2957 divider_1/tspc_1/Z2 vssa1 1.46fF -C2958 divider_1/tspc_1/Z1 vssa1 0.99fF -C2959 divider_1/nor_1/B vssa1 7.05fF -C2960 divider_1/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING -C2961 divider_1/tspc_0/Z4 vssa1 0.86fF -C2962 divider_1/tspc_0/Q vssa1 3.14fF -C2963 divider_1/tspc_0/Z3 vssa1 2.26fF -C2964 divider_1/tspc_0/Z2 vssa1 1.46fF -C2965 divider_1/tspc_0/Z1 vssa1 0.99fF -C2966 divider_1/nor_1/A vssa1 7.04fF -C2967 divider_1/tspc_0/a_630_n680# vssa1 1.15fF **FLOATING -C2968 divider_1/clk vssa1 5.63fF -C2969 divider_1/prescaler_0/nand_1/z1 vssa1 0.36fF -C2970 divider_1/prescaler_0/tspc_0/D vssa1 2.64fF -C2971 divider_1/prescaler_0/tspc_2/Q vssa1 3.74fF -C2972 divider_1/prescaler_0/tspc_1/Q vssa1 3.61fF -C2973 divider_1/prescaler_0/nand_0/z1 vssa1 0.36fF -C2974 divider_1/prescaler_0/tspc_2/D vssa1 3.12fF -C2975 divider_1/and_0/OUT vssa1 5.62fF -C2976 divider_1/prescaler_0/tspc_2/Z4 vssa1 0.86fF -C2977 divider_1/prescaler_0/tspc_2/Z3 vssa1 2.26fF -C2978 divider_1/prescaler_0/tspc_2/Z2 vssa1 1.46fF -C2979 divider_1/prescaler_0/tspc_2/Z1 vssa1 0.99fF -C2980 divider_1/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING -C2981 divider_1/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING -C2982 divider_1/prescaler_0/tspc_1/Z4 vssa1 0.86fF -C2983 divider_1/prescaler_0/tspc_1/Z3 vssa1 2.26fF -C2984 divider_1/prescaler_0/tspc_1/Z2 vssa1 1.48fF -C2985 divider_1/prescaler_0/tspc_1/Z1 vssa1 0.99fF -C2986 divider_1/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING -C2987 divider_1/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING -C2988 divider_1/prescaler_0/tspc_0/Z4 vssa1 0.86fF -C2989 divider_1/prescaler_0/Out vssa1 4.59fF -C2990 divider_1/prescaler_0/tspc_0/Z3 vssa1 2.26fF -C2991 divider_1/prescaler_0/tspc_0/Z2 vssa1 1.46fF -C2992 divider_1/prescaler_0/tspc_0/Z1 vssa1 0.99fF -C2993 divider_1/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING -C2994 divider_1/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING -C2995 divider_1/nor_1/Z1 vssa1 1.34fF -C2996 divider_1/nor_0/Z1 vssa1 1.34fF -C2997 divider_1/mc2 vssa1 5.29fF -C2998 divider_0/and_0/Z1 vssa1 0.74fF -C2999 divider_0/and_0/B vssa1 2.25fF -C3000 divider_0/and_0/A vssa1 2.19fF -C3001 divider_0/and_0/out1 vssa1 2.93fF -C3002 divider_0/tspc_2/Z4 vssa1 0.86fF -C3003 divider_0/Out vssa1 1.60fF -C3004 divider_0/tspc_2/Z3 vssa1 2.26fF -C3005 divider_0/tspc_2/Z2 vssa1 1.46fF -C3006 divider_0/tspc_2/Z1 vssa1 0.99fF -C3007 divider_0/nor_0/B vssa1 6.33fF -C3008 divider_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING -C3009 divider_0/tspc_1/Z4 vssa1 0.86fF -C3010 divider_0/tspc_1/Q vssa1 3.12fF -C3011 divider_0/tspc_1/Z3 vssa1 2.26fF -C3012 divider_0/tspc_1/Z2 vssa1 1.46fF -C3013 divider_0/tspc_1/Z1 vssa1 0.99fF -C3014 divider_0/nor_1/B vssa1 7.05fF -C3015 divider_0/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING -C3016 divider_0/tspc_0/Z4 vssa1 0.86fF -C3017 divider_0/tspc_0/Q vssa1 3.14fF -C3018 divider_0/tspc_0/Z3 vssa1 2.26fF -C3019 divider_0/tspc_0/Z2 vssa1 1.46fF -C3020 divider_0/tspc_0/Z1 vssa1 0.99fF -C3021 divider_0/nor_1/A vssa1 7.04fF -C3022 divider_0/tspc_0/a_630_n680# vssa1 1.15fF **FLOATING -C3023 divider_0/clk vssa1 5.63fF -C3024 divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF -C3025 divider_0/prescaler_0/tspc_0/D vssa1 2.64fF -C3026 divider_0/prescaler_0/tspc_2/Q vssa1 3.64fF -C3027 divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF -C3028 divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF -C3029 divider_0/prescaler_0/tspc_2/D vssa1 3.12fF -C3030 divider_0/and_0/OUT vssa1 5.62fF -C3031 divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF -C3032 divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF -C3033 divider_0/prescaler_0/tspc_2/Z2 vssa1 1.46fF -C3034 divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF -C3035 divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING -C3036 divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING -C3037 divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF -C3038 divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF -C3039 divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF -C3040 divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF -C3041 divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING -C3042 divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING -C3043 divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF -C3044 divider_0/prescaler_0/Out vssa1 4.59fF -C3045 divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF -C3046 divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF -C3047 divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF -C3048 divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING -C3049 divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING -C3050 divider_0/nor_1/Z1 vssa1 1.34fF -C3051 divider_0/nor_0/Z1 vssa1 1.34fF -C3052 divider_0/mc2 vssa1 5.29fF -C3053 ro_complete_buffered_0/tapered_buf_0/in vssa1 1.13fF -C3054 ro_complete_buffered_0/tapered_buf_0/a_n10_n140# vssa1 0.06fF **FLOATING -C3055 ro_complete_buffered_0/tapered_buf_0/a_210_n610# vssa1 619.27fF **FLOATING -C3056 ro_complete_buffered_0/tapered_buf_0/a_160_230# vssa1 0.15fF **FLOATING -C3057 ro_complete_buffered_0/tapered_buf_0/a_n10_230# vssa1 0.13fF **FLOATING -C3058 ro_complete_buffered_0/tapered_buf_0/a_4670_0# vssa1 252.41fF **FLOATING -C3059 ro_complete_buffered_0/tapered_buf_0/a_1650_0# vssa1 63.61fF **FLOATING -C3060 ro_complete_buffered_0/tapered_buf_0/a_580_0# vssa1 16.76fF **FLOATING -C3061 ro_complete_buffered_0/tapered_buf_0/a_160_n140# vssa1 4.09fF **FLOATING -C3062 ro_complete_buffered_0/tapered_buf_1/out vssa1 385.87fF -C3063 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# vssa1 0.06fF **FLOATING -C3064 ro_complete_buffered_0/tapered_buf_1/a_210_n610# vssa1 592.97fF **FLOATING -C3065 ro_complete_buffered_0/tapered_buf_1/a_160_230# vssa1 0.15fF **FLOATING -C3066 ro_complete_buffered_0/tapered_buf_1/a_n10_230# vssa1 0.13fF **FLOATING -C3067 ro_complete_buffered_0/tapered_buf_1/a_4670_0# vssa1 252.41fF **FLOATING -C3068 ro_complete_buffered_0/tapered_buf_1/a_1650_0# vssa1 63.61fF **FLOATING -C3069 ro_complete_buffered_0/tapered_buf_1/a_580_0# vssa1 16.76fF **FLOATING -C3070 ro_complete_buffered_0/tapered_buf_1/a_160_n140# vssa1 4.09fF **FLOATING -C3071 ro_complete_buffered_0/ro_complete_0/cbank_2/v vssa1 16.53fF -C3072 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF -C3073 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF -C3074 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF -C3075 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF -C3076 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF -C3077 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF -C3078 ro_complete_buffered_0/tapered_buf_1/in vssa1 26.52fF -C3079 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF -C3080 ro_complete_buffered_0/ro_complete_0/a0 vssa1 416.45fF -C3081 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF -C3082 ro_complete_buffered_0/ro_complete_0/a1 vssa1 412.13fF -C3083 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF -C3084 ro_complete_buffered_0/ro_complete_0/a3 vssa1 402.70fF -C3085 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF -C3086 ro_complete_buffered_0/ro_complete_0/a2 vssa1 407.26fF -C3087 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF -C3088 ro_complete_buffered_0/ro_complete_0/a4 vssa1 398.93fF -C3089 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF -C3090 ro_complete_buffered_0/ro_complete_0/a5 vssa1 395.79fF -C3091 ro_complete_buffered_0/ro_complete_0/cbank_0/v vssa1 15.13fF -C3092 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF -C3093 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF -C3094 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF -C3095 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF -C3096 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF -C3097 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF -C3098 ro_complete_buffered_0/tapered_buf_7/in vssa1 1.13fF -C3099 ro_complete_buffered_0/tapered_buf_7/a_n10_n140# vssa1 0.06fF **FLOATING -C3100 ro_complete_buffered_0/tapered_buf_7/a_210_n610# vssa1 592.97fF **FLOATING -C3101 ro_complete_buffered_0/tapered_buf_7/a_160_230# vssa1 0.15fF **FLOATING -C3102 ro_complete_buffered_0/tapered_buf_7/a_n10_230# vssa1 0.13fF **FLOATING -C3103 ro_complete_buffered_0/tapered_buf_7/a_4670_0# vssa1 252.41fF **FLOATING -C3104 ro_complete_buffered_0/tapered_buf_7/a_1650_0# vssa1 63.61fF **FLOATING -C3105 ro_complete_buffered_0/tapered_buf_7/a_580_0# vssa1 16.76fF **FLOATING -C3106 ro_complete_buffered_0/tapered_buf_7/a_160_n140# vssa1 4.09fF **FLOATING -C3107 ro_complete_buffered_0/tapered_buf_6/in vssa1 1.13fF -C3108 ro_complete_buffered_0/tapered_buf_6/a_n10_n140# vssa1 0.06fF **FLOATING -C3109 ro_complete_buffered_0/tapered_buf_6/a_210_n610# vssa1 592.97fF **FLOATING -C3110 ro_complete_buffered_0/tapered_buf_6/a_160_230# vssa1 0.15fF **FLOATING -C3111 ro_complete_buffered_0/tapered_buf_6/a_n10_230# vssa1 0.13fF **FLOATING -C3112 ro_complete_buffered_0/tapered_buf_6/a_4670_0# vssa1 252.41fF **FLOATING -C3113 ro_complete_buffered_0/tapered_buf_6/a_1650_0# vssa1 63.61fF **FLOATING -C3114 ro_complete_buffered_0/tapered_buf_6/a_580_0# vssa1 16.76fF **FLOATING -C3115 ro_complete_buffered_0/tapered_buf_6/a_160_n140# vssa1 4.09fF **FLOATING -C3116 ro_complete_buffered_0/tapered_buf_5/in vssa1 1.13fF -C3117 ro_complete_buffered_0/tapered_buf_5/a_n10_n140# vssa1 0.06fF **FLOATING -C3118 ro_complete_buffered_0/tapered_buf_5/a_210_n610# vssa1 592.97fF **FLOATING -C3119 ro_complete_buffered_0/tapered_buf_5/a_160_230# vssa1 0.15fF **FLOATING -C3120 ro_complete_buffered_0/tapered_buf_5/a_n10_230# vssa1 0.13fF **FLOATING -C3121 ro_complete_buffered_0/tapered_buf_5/a_4670_0# vssa1 252.41fF **FLOATING -C3122 ro_complete_buffered_0/tapered_buf_5/a_1650_0# vssa1 63.61fF **FLOATING -C3123 ro_complete_buffered_0/tapered_buf_5/a_580_0# vssa1 16.76fF **FLOATING -C3124 ro_complete_buffered_0/tapered_buf_5/a_160_n140# vssa1 4.09fF **FLOATING -C3125 ro_complete_buffered_0/tapered_buf_4/in vssa1 1.13fF -C3126 ro_complete_buffered_0/tapered_buf_4/a_n10_n140# vssa1 0.06fF **FLOATING -C3127 ro_complete_buffered_0/tapered_buf_4/a_210_n610# vssa1 592.97fF **FLOATING -C3128 ro_complete_buffered_0/tapered_buf_4/a_160_230# vssa1 0.15fF **FLOATING -C3129 ro_complete_buffered_0/tapered_buf_4/a_n10_230# vssa1 0.13fF **FLOATING -C3130 ro_complete_buffered_0/tapered_buf_4/a_4670_0# vssa1 252.41fF **FLOATING -C3131 ro_complete_buffered_0/tapered_buf_4/a_1650_0# vssa1 63.61fF **FLOATING -C3132 ro_complete_buffered_0/tapered_buf_4/a_580_0# vssa1 16.76fF **FLOATING -C3133 ro_complete_buffered_0/tapered_buf_4/a_160_n140# vssa1 4.09fF **FLOATING -C3134 ro_complete_buffered_0/tapered_buf_3/in vssa1 1.13fF -C3135 ro_complete_buffered_0/tapered_buf_3/a_n10_n140# vssa1 0.06fF **FLOATING -C3136 ro_complete_buffered_0/tapered_buf_3/a_210_n610# vssa1 592.97fF **FLOATING -C3137 ro_complete_buffered_0/tapered_buf_3/a_160_230# vssa1 0.15fF **FLOATING -C3138 ro_complete_buffered_0/tapered_buf_3/a_n10_230# vssa1 0.13fF **FLOATING -C3139 ro_complete_buffered_0/tapered_buf_3/a_4670_0# vssa1 252.41fF **FLOATING -C3140 ro_complete_buffered_0/tapered_buf_3/a_1650_0# vssa1 63.61fF **FLOATING -C3141 ro_complete_buffered_0/tapered_buf_3/a_580_0# vssa1 16.76fF **FLOATING -C3142 ro_complete_buffered_0/tapered_buf_3/a_160_n140# vssa1 4.09fF **FLOATING -C3143 ro_complete_buffered_0/tapered_buf_2/in vssa1 1.13fF -C3144 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# vssa1 0.06fF **FLOATING -C3145 ro_complete_buffered_0/tapered_buf_2/a_210_n610# vssa1 592.97fF **FLOATING -C3146 ro_complete_buffered_0/tapered_buf_2/a_160_230# vssa1 0.15fF **FLOATING -C3147 ro_complete_buffered_0/tapered_buf_2/a_n10_230# vssa1 0.13fF **FLOATING -C3148 ro_complete_buffered_0/tapered_buf_2/a_4670_0# vssa1 252.41fF **FLOATING -C3149 ro_complete_buffered_0/tapered_buf_2/a_1650_0# vssa1 63.61fF **FLOATING -C3150 ro_complete_buffered_0/tapered_buf_2/a_580_0# vssa1 16.76fF **FLOATING -C3151 ro_complete_buffered_0/tapered_buf_2/a_160_n140# vssa1 4.09fF **FLOATING -C3152 ro_complete_0/cbank_2/v vssa1 16.43fF -C3153 ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF -C3154 ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF -C3155 ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF -C3156 ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF -C3157 ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF -C3158 ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF -C3159 ro_complete_0/cbank_1/v vssa1 16.43fF -C3160 ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF -C3161 ro_complete_0/a0 vssa1 5.35fF -C3162 ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF -C3163 ro_complete_0/a1 vssa1 6.54fF -C3164 ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF -C3165 ro_complete_0/a3 vssa1 5.96fF -C3166 ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF -C3167 ro_complete_0/a2 vssa1 5.21fF -C3168 ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF -C3169 ro_complete_0/a4 vssa1 5.81fF -C3170 ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF -C3171 ro_complete_0/a5 vssa1 6.74fF -C3172 ro_complete_0/cbank_0/v vssa1 15.12fF -C3173 ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF -C3174 ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF -C3175 ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF -C3176 ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF -C3177 ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF -C3178 ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF -C3179 filter_0/v vssa1 110.47fF -C3180 filter_0/a_4216_n5230# vssa1 418.47fF **FLOATING -C3181 filter_0/a_4216_n2998# vssa1 1.03fF **FLOATING -C3182 cp_buffered_0/cp_0/down vssa1 397.14fF -C3183 cp_buffered_0/tapered_buf_0/in vssa1 1.13fF -C3184 cp_buffered_0/tapered_buf_0/a_n10_n140# vssa1 0.06fF **FLOATING -C3185 cp_buffered_0/tapered_buf_0/a_210_n610# vssa1 592.97fF **FLOATING -C3186 cp_buffered_0/tapered_buf_0/a_160_230# vssa1 0.15fF **FLOATING -C3187 cp_buffered_0/tapered_buf_0/a_n10_230# vssa1 0.13fF **FLOATING -C3188 cp_buffered_0/tapered_buf_0/a_4670_0# vssa1 252.41fF **FLOATING -C3189 cp_buffered_0/tapered_buf_0/a_1650_0# vssa1 63.61fF **FLOATING -C3190 cp_buffered_0/tapered_buf_0/a_580_0# vssa1 16.76fF **FLOATING -C3191 cp_buffered_0/tapered_buf_0/a_160_n140# vssa1 4.09fF **FLOATING -C3192 cp_buffered_0/cp_0/out vssa1 397.36fF -C3193 cp_buffered_0/tapered_buf_1/in vssa1 1.13fF -C3194 cp_buffered_0/tapered_buf_1/a_n10_n140# vssa1 0.06fF **FLOATING -C3195 cp_buffered_0/tapered_buf_1/a_210_n610# vssa1 592.97fF **FLOATING -C3196 cp_buffered_0/tapered_buf_1/a_160_230# vssa1 0.15fF **FLOATING -C3197 cp_buffered_0/tapered_buf_1/a_n10_230# vssa1 0.13fF **FLOATING -C3198 cp_buffered_0/tapered_buf_1/a_4670_0# vssa1 252.41fF **FLOATING -C3199 cp_buffered_0/tapered_buf_1/a_1650_0# vssa1 63.61fF **FLOATING -C3200 cp_buffered_0/tapered_buf_1/a_580_0# vssa1 16.76fF **FLOATING -C3201 cp_buffered_0/tapered_buf_1/a_160_n140# vssa1 4.09fF **FLOATING -C3202 cp_buffered_0/cp_0/upbar vssa1 393.41fF -C3203 cp_buffered_0/cp_0/a_7110_n2840# vssa1 0.17fF **FLOATING -C3204 cp_buffered_0/cp_0/a_3060_n2840# vssa1 1.71fF **FLOATING -C3205 cp_buffered_0/cp_0/a_7110_0# vssa1 0.17fF **FLOATING -C3206 cp_buffered_0/cp_0/a_6370_0# vssa1 0.40fF **FLOATING -C3207 cp_buffered_0/cp_0/a_3060_0# vssa1 1.65fF **FLOATING -C3208 cp_buffered_0/cp_0/a_1710_0# vssa1 5.76fF **FLOATING -C3209 cp_buffered_0/cp_0/a_1710_n2840# vssa1 5.24fF **FLOATING -C3210 cp_buffered_0/cp_0/a_10_n50# vssa1 3.19fF **FLOATING -C3211 cp_buffered_0/tapered_buf_2/in vssa1 1.13fF -C3212 cp_buffered_0/tapered_buf_2/a_n10_n140# vssa1 0.06fF **FLOATING -C3213 cp_buffered_0/tapered_buf_2/a_210_n610# vssa1 592.97fF **FLOATING -C3214 cp_buffered_0/tapered_buf_2/a_160_230# vssa1 0.15fF **FLOATING -C3215 cp_buffered_0/tapered_buf_2/a_n10_230# vssa1 0.13fF **FLOATING -C3216 cp_buffered_0/tapered_buf_2/a_4670_0# vssa1 252.41fF **FLOATING -C3217 cp_buffered_0/tapered_buf_2/a_1650_0# vssa1 63.61fF **FLOATING -C3218 cp_buffered_0/tapered_buf_2/a_580_0# vssa1 16.76fF **FLOATING -C3219 cp_buffered_0/tapered_buf_2/a_160_n140# vssa1 4.09fF **FLOATING -C3220 pd_buffered_0/tapered_buf_0/in vssa1 1.13fF -C3229 pd_buffered_0/tapered_buf_1/out vssa1 385.91fF -C3238 pd_buffered_0/pd_0/UP vssa1 5.51fF -C3239 pd_buffered_0/pd_0/and_pd_0/Z1 vssa1 0.39fF -C3240 pd_buffered_0/pd_0/and_pd_0/Out1 vssa1 2.22fF -C3241 pd_buffered_0/pd_0/tspc_r_1/z5 vssa1 1.10fF -C3242 pd_buffered_0/pd_0/tspc_r_1/Z4 vssa1 1.07fF -C3243 pd_buffered_0/pd_0/R vssa1 3.05fF -C3244 pd_buffered_0/pd_0/tspc_r_1/Qbar vssa1 0.79fF -C3245 pd_buffered_0/pd_0/tspc_r_1/Z2 vssa1 1.22fF -C3246 pd_buffered_0/pd_0/tspc_r_1/Z1 vssa1 0.67fF -C3247 pd_buffered_0/pd_0/DOWN vssa1 8.92fF -C3248 pd_buffered_0/pd_0/tspc_r_1/Qbar1 vssa1 1.34fF -C3249 pd_buffered_0/pd_0/tspc_r_1/Z3 vssa1 2.12fF -C3250 pd_buffered_0/pd_0/DIV vssa1 390.67fF -C3251 pd_buffered_0/pd_0/tspc_r_0/z5 vssa1 1.10fF -C3252 pd_buffered_0/pd_0/tspc_r_0/Z4 vssa1 1.07fF -C3253 pd_buffered_0/pd_0/tspc_r_0/Qbar vssa1 0.88fF -C3254 pd_buffered_0/pd_0/tspc_r_0/Z2 vssa1 1.22fF -C3255 pd_buffered_0/pd_0/tspc_r_0/Z1 vssa1 0.67fF -C3256 pd_buffered_0/pd_0/tspc_r_0/Qbar1 vssa1 1.34fF -C3257 pd_buffered_0/pd_0/tspc_r_0/Z3 vssa1 2.12fF -C3258 pd_buffered_0/pd_0/REF vssa1 388.56fF -C3259 pd_buffered_0/tapered_buf_3/out vssa1 385.93fF -C3268 pd_buffered_0/tapered_buf_2/in vssa1 1.13fF +Xpll_full_0 vdd pll_full_0/ref pll_full_0/div pll_full_0/vco pll_full +C1812 io_analog[4] vdda1 43.96fF +C1813 io_analog[5] vdda1 44.13fF +C1814 io_analog[6] vdda1 43.46fF +C1815 io_in_3v3[0] vdda1 0.61fF +C1816 io_oeb[26] vdda1 0.61fF +C1817 io_in[0] vdda1 0.61fF +C1818 io_out[26] vdda1 0.61fF +C1819 io_out[0] vdda1 0.61fF +C1820 io_in[26] vdda1 0.61fF +C1821 io_oeb[0] vdda1 0.61fF +C1822 io_in_3v3[26] vdda1 0.61fF +C1823 io_in_3v3[1] vdda1 0.61fF +C1824 io_oeb[25] vdda1 0.61fF +C1825 io_in[1] vdda1 0.61fF +C1826 io_out[25] vdda1 0.61fF +C1827 io_out[1] vdda1 0.61fF +C1828 io_in[25] vdda1 0.61fF +C1829 io_oeb[1] vdda1 0.61fF +C1830 io_in_3v3[25] vdda1 0.61fF +C1831 io_in_3v3[2] vdda1 0.61fF +C1832 io_oeb[24] vdda1 0.61fF +C1833 io_in[2] vdda1 0.61fF +C1834 io_out[24] vdda1 0.61fF +C1835 io_out[2] vdda1 0.61fF +C1836 io_in[24] vdda1 0.61fF +C1837 io_oeb[2] vdda1 0.61fF +C1838 io_in_3v3[24] vdda1 0.61fF +C1839 io_in_3v3[3] vdda1 0.61fF +C1840 gpio_noesd[17] vdda1 2.32fF +C1841 io_in[3] vdda1 0.61fF +C1842 gpio_analog[17] vdda1 2.30fF +C1843 io_out[3] vdda1 0.61fF +C1844 io_oeb[3] vdda1 0.61fF +C1845 io_in_3v3[4] vdda1 0.61fF +C1846 io_in[4] vdda1 0.61fF +C1847 io_out[4] vdda1 0.61fF +C1848 io_oeb[4] vdda1 0.61fF +C1849 io_oeb[23] vdda1 0.61fF +C1850 io_out[23] vdda1 0.61fF +C1851 io_in[23] vdda1 0.61fF +C1852 io_in_3v3[23] vdda1 0.61fF +C1853 gpio_noesd[16] vdda1 2.30fF +C1854 gpio_analog[16] vdda1 2.30fF +C1855 io_in_3v3[5] vdda1 0.61fF +C1856 io_in[5] vdda1 0.61fF +C1857 io_out[5] vdda1 0.61fF +C1858 io_oeb[5] vdda1 0.61fF +C1859 io_oeb[22] vdda1 0.61fF +C1860 io_out[22] vdda1 0.61fF +C1861 io_in[22] vdda1 0.61fF +C1862 io_in_3v3[22] vdda1 0.61fF +C1863 gpio_noesd[15] vdda1 2.31fF +C1864 gpio_analog[15] vdda1 2.30fF +C1865 io_in_3v3[6] vdda1 0.61fF +C1866 io_in[6] vdda1 0.61fF +C1867 io_out[6] vdda1 0.61fF +C1868 io_oeb[6] vdda1 0.61fF +C1869 io_oeb[21] vdda1 0.61fF +C1870 io_out[21] vdda1 0.61fF +C1871 io_in[21] vdda1 0.61fF +C1872 io_in_3v3[21] vdda1 0.61fF +C1873 gpio_noesd[14] vdda1 2.30fF +C1874 gpio_analog[14] vdda1 2.29fF +C1875 vssd2 vdda1 38.54fF +C1876 vssd1 vdda1 13.04fF +C1877 vdda2 vdda1 38.30fF +C1878 io_oeb[20] vdda1 0.61fF +C1879 io_out[20] vdda1 0.61fF +C1880 io_in[20] vdda1 0.61fF +C1881 io_in_3v3[20] vdda1 0.61fF +C1882 gpio_noesd[13] vdda1 2.31fF +C1883 gpio_analog[13] vdda1 2.30fF +C1884 gpio_analog[0] vdda1 0.61fF +C1885 gpio_noesd[0] vdda1 0.61fF +C1886 io_in_3v3[7] vdda1 0.61fF +C1887 io_in[7] vdda1 0.61fF +C1888 io_out[7] vdda1 0.61fF +C1889 io_oeb[7] vdda1 0.61fF +C1890 io_oeb[19] vdda1 0.61fF +C1891 io_out[19] vdda1 0.61fF +C1892 io_in[19] vdda1 0.61fF +C1893 io_in_3v3[19] vdda1 0.61fF +C1894 gpio_noesd[12] vdda1 2.32fF +C1895 gpio_analog[12] vdda1 2.30fF +C1896 gpio_analog[1] vdda1 0.61fF +C1897 gpio_noesd[1] vdda1 0.61fF +C1898 io_in_3v3[8] vdda1 0.61fF +C1899 io_in[8] vdda1 0.61fF +C1900 io_out[8] vdda1 0.61fF +C1901 io_oeb[8] vdda1 0.61fF +C1902 io_oeb[18] vdda1 0.61fF +C1903 io_out[18] vdda1 0.61fF +C1904 io_in[18] vdda1 0.61fF +C1905 io_in_3v3[18] vdda1 0.61fF +C1906 gpio_noesd[11] vdda1 2.30fF +C1907 gpio_analog[11] vdda1 2.29fF +C1908 gpio_analog[2] vdda1 0.61fF +C1909 gpio_noesd[2] vdda1 0.61fF +C1910 io_in_3v3[9] vdda1 0.61fF +C1911 io_in[9] vdda1 0.61fF +C1912 io_out[9] vdda1 0.61fF +C1913 io_oeb[9] vdda1 0.61fF +C1914 io_oeb[17] vdda1 0.61fF +C1915 io_out[17] vdda1 0.61fF +C1916 io_in[17] vdda1 0.61fF +C1917 io_in_3v3[17] vdda1 0.61fF +C1918 gpio_noesd[10] vdda1 2.31fF +C1919 gpio_analog[10] vdda1 2.29fF +C1920 gpio_analog[3] vdda1 0.61fF +C1921 gpio_noesd[3] vdda1 0.61fF +C1922 io_in_3v3[10] vdda1 0.61fF +C1923 io_in[10] vdda1 0.61fF +C1924 io_out[10] vdda1 0.61fF +C1925 io_oeb[10] vdda1 0.61fF +C1926 io_oeb[16] vdda1 0.61fF +C1927 io_out[16] vdda1 0.61fF +C1928 io_in[16] vdda1 0.61fF +C1929 io_in_3v3[16] vdda1 0.61fF +C1930 gpio_noesd[9] vdda1 2.28fF +C1931 gpio_analog[9] vdda1 2.28fF +C1932 gpio_analog[4] vdda1 0.61fF +C1933 gpio_noesd[4] vdda1 0.61fF +C1934 io_in_3v3[11] vdda1 0.61fF +C1935 io_in[11] vdda1 0.61fF +C1936 io_out[11] vdda1 0.61fF +C1937 io_oeb[11] vdda1 0.61fF +C1938 io_oeb[15] vdda1 0.61fF +C1939 io_out[15] vdda1 0.61fF +C1940 io_in[15] vdda1 0.61fF +C1941 io_in_3v3[15] vdda1 0.61fF +C1942 gpio_noesd[8] vdda1 2.28fF +C1943 gpio_analog[8] vdda1 2.26fF +C1944 gpio_analog[5] vdda1 0.61fF +C1945 gpio_noesd[5] vdda1 0.61fF +C1946 io_in_3v3[12] vdda1 0.61fF +C1947 io_in[12] vdda1 0.61fF +C1948 io_out[12] vdda1 0.61fF +C1949 io_oeb[12] vdda1 0.61fF +C1950 io_oeb[14] vdda1 0.61fF +C1951 io_out[14] vdda1 0.61fF +C1952 io_in[14] vdda1 0.61fF +C1953 io_in_3v3[14] vdda1 0.61fF +C1954 gpio_noesd[7] vdda1 2.30fF +C1955 gpio_analog[7] vdda1 2.28fF +C1956 vssa2 vdda1 38.35fF +C1957 gpio_analog[6] vdda1 5.71fF +C1958 gpio_noesd[6] vdda1 5.70fF +C1959 io_in_3v3[13] vdda1 0.61fF +C1960 io_in[13] vdda1 0.61fF +C1961 io_out[13] vdda1 0.61fF +C1962 io_oeb[13] vdda1 0.61fF +C1963 vccd1 vdda1 39.84fF +C1964 vccd2 vdda1 38.46fF +C1965 io_analog[0] vdda1 19.99fF +C1966 io_analog[10] vdda1 19.36fF +C1967 io_analog[1] vdda1 13.17fF +C1968 io_analog[2] vdda1 12.57fF +C1969 io_analog[3] vdda1 12.83fF +C1970 io_clamp_high[0] vdda1 3.58fF +C1971 io_clamp_low[0] vdda1 3.58fF +C1972 io_clamp_high[1] vdda1 3.58fF +C1973 io_clamp_low[1] vdda1 3.58fF +C1974 io_clamp_high[2] vdda1 3.58fF +C1975 io_clamp_low[2] vdda1 3.58fF +C1976 io_analog[7] vdda1 12.74fF +C1977 io_analog[8] vdda1 13.08fF +C1978 io_analog[9] vdda1 13.08fF +C1979 user_irq[2] vdda1 0.63fF +C1980 user_irq[1] vdda1 0.63fF +C1981 user_irq[0] vdda1 0.63fF +C1982 user_clock2 vdda1 0.63fF +C1983 la_oenb[127] vdda1 0.63fF +C1984 la_data_out[127] vdda1 0.63fF +C1985 la_data_in[127] vdda1 0.63fF +C1986 la_oenb[126] vdda1 0.63fF +C1987 la_data_out[126] vdda1 0.63fF +C1988 la_data_in[126] vdda1 0.63fF +C1989 la_oenb[125] vdda1 0.63fF +C1990 la_data_out[125] vdda1 0.63fF +C1991 la_data_in[125] vdda1 0.63fF +C1992 la_oenb[124] vdda1 0.63fF +C1993 la_data_out[124] vdda1 0.63fF +C1994 la_data_in[124] vdda1 0.63fF +C1995 la_oenb[123] vdda1 0.63fF +C1996 la_data_out[123] vdda1 0.63fF +C1997 la_data_in[123] vdda1 0.63fF +C1998 la_oenb[122] vdda1 0.63fF +C1999 la_data_out[122] vdda1 0.63fF +C2000 la_data_in[122] vdda1 0.63fF +C2001 la_oenb[121] vdda1 0.63fF +C2002 la_data_out[121] vdda1 0.63fF +C2003 la_data_in[121] vdda1 0.63fF +C2004 la_oenb[120] vdda1 0.63fF +C2005 la_data_out[120] vdda1 0.63fF +C2006 la_data_in[120] vdda1 0.63fF +C2007 la_oenb[119] vdda1 0.63fF +C2008 la_data_out[119] vdda1 0.63fF +C2009 la_data_in[119] vdda1 0.63fF +C2010 la_oenb[118] vdda1 0.63fF +C2011 la_data_out[118] vdda1 0.63fF +C2012 la_data_in[118] vdda1 0.63fF +C2013 la_oenb[117] vdda1 0.63fF +C2014 la_data_out[117] vdda1 0.63fF +C2015 la_data_in[117] vdda1 0.63fF +C2016 la_oenb[116] vdda1 0.63fF +C2017 la_data_out[116] vdda1 0.63fF +C2018 la_data_in[116] vdda1 0.63fF +C2019 la_oenb[115] vdda1 0.63fF +C2020 la_data_out[115] vdda1 0.63fF +C2021 la_data_in[115] vdda1 0.63fF +C2022 la_oenb[114] vdda1 0.63fF +C2023 la_data_out[114] vdda1 0.63fF +C2024 la_data_in[114] vdda1 0.63fF +C2025 la_oenb[113] vdda1 0.63fF +C2026 la_data_out[113] vdda1 0.63fF +C2027 la_data_in[113] vdda1 0.63fF +C2028 la_oenb[112] vdda1 0.63fF +C2029 la_data_out[112] vdda1 0.63fF +C2030 la_data_in[112] vdda1 0.63fF +C2031 la_oenb[111] vdda1 0.63fF +C2032 la_data_out[111] vdda1 0.63fF +C2033 la_data_in[111] vdda1 0.63fF +C2034 la_oenb[110] vdda1 0.63fF +C2035 la_data_out[110] vdda1 0.63fF +C2036 la_data_in[110] vdda1 0.63fF +C2037 la_oenb[109] vdda1 0.63fF +C2038 la_data_out[109] vdda1 0.63fF +C2039 la_data_in[109] vdda1 0.63fF +C2040 la_oenb[108] vdda1 0.63fF +C2041 la_data_out[108] vdda1 0.63fF +C2042 la_data_in[108] vdda1 0.63fF +C2043 la_oenb[107] vdda1 0.63fF +C2044 la_data_out[107] vdda1 0.63fF +C2045 la_data_in[107] vdda1 0.63fF +C2046 la_oenb[106] vdda1 0.63fF +C2047 la_data_out[106] vdda1 0.63fF +C2048 la_data_in[106] vdda1 0.63fF +C2049 la_oenb[105] vdda1 0.63fF +C2050 la_data_out[105] vdda1 0.63fF +C2051 la_data_in[105] vdda1 0.63fF +C2052 la_oenb[104] vdda1 0.63fF +C2053 la_data_out[104] vdda1 0.63fF +C2054 la_data_in[104] vdda1 0.63fF +C2055 la_oenb[103] vdda1 0.63fF +C2056 la_data_out[103] vdda1 0.63fF +C2057 la_data_in[103] vdda1 0.63fF +C2058 la_oenb[102] vdda1 0.63fF +C2059 la_data_out[102] vdda1 0.63fF +C2060 la_data_in[102] vdda1 0.63fF +C2061 la_oenb[101] vdda1 0.63fF +C2062 la_data_out[101] vdda1 0.63fF +C2063 la_data_in[101] vdda1 0.63fF +C2064 la_oenb[100] vdda1 0.63fF +C2065 la_data_out[100] vdda1 0.63fF +C2066 la_data_in[100] vdda1 0.63fF +C2067 la_oenb[99] vdda1 0.63fF +C2068 la_data_out[99] vdda1 0.63fF +C2069 la_data_in[99] vdda1 0.63fF +C2070 la_oenb[98] vdda1 0.63fF +C2071 la_data_out[98] vdda1 0.63fF +C2072 la_data_in[98] vdda1 0.63fF +C2073 la_oenb[97] vdda1 0.63fF +C2074 la_data_out[97] vdda1 0.63fF +C2075 la_data_in[97] vdda1 0.63fF +C2076 la_oenb[96] vdda1 0.63fF +C2077 la_data_out[96] vdda1 0.63fF +C2078 la_data_in[96] vdda1 0.63fF +C2079 la_oenb[95] vdda1 0.63fF +C2080 la_data_out[95] vdda1 0.63fF +C2081 la_data_in[95] vdda1 0.63fF +C2082 la_oenb[94] vdda1 0.63fF +C2083 la_data_out[94] vdda1 0.63fF +C2084 la_data_in[94] vdda1 0.63fF +C2085 la_oenb[93] vdda1 0.63fF +C2086 la_data_out[93] vdda1 0.63fF +C2087 la_data_in[93] vdda1 0.63fF +C2088 la_oenb[92] vdda1 0.63fF +C2089 la_data_out[92] vdda1 0.63fF +C2090 la_data_in[92] vdda1 0.63fF +C2091 la_oenb[91] vdda1 0.63fF +C2092 la_data_out[91] vdda1 0.63fF +C2093 la_data_in[91] vdda1 0.63fF +C2094 la_oenb[90] vdda1 0.63fF +C2095 la_data_out[90] vdda1 0.63fF +C2096 la_data_in[90] vdda1 0.63fF +C2097 la_oenb[89] vdda1 0.63fF +C2098 la_data_out[89] vdda1 0.63fF +C2099 la_data_in[89] vdda1 0.63fF +C2100 la_oenb[88] vdda1 0.63fF +C2101 la_data_out[88] vdda1 0.63fF +C2102 la_data_in[88] vdda1 0.63fF +C2103 la_oenb[87] vdda1 0.63fF +C2104 la_data_out[87] vdda1 0.63fF +C2105 la_data_in[87] vdda1 0.63fF +C2106 la_oenb[86] vdda1 0.63fF +C2107 la_data_out[86] vdda1 0.63fF +C2108 la_data_in[86] vdda1 0.63fF +C2109 la_oenb[85] vdda1 0.63fF +C2110 la_data_out[85] vdda1 0.63fF +C2111 la_data_in[85] vdda1 0.63fF +C2112 la_oenb[84] vdda1 0.63fF +C2113 la_data_out[84] vdda1 0.63fF +C2114 la_data_in[84] vdda1 0.63fF +C2115 la_oenb[83] vdda1 0.63fF +C2116 la_data_out[83] vdda1 0.63fF +C2117 la_data_in[83] vdda1 0.63fF +C2118 la_oenb[82] vdda1 0.63fF +C2119 la_data_out[82] vdda1 0.63fF +C2120 la_data_in[82] vdda1 0.63fF +C2121 la_oenb[81] vdda1 0.63fF +C2122 la_data_out[81] vdda1 0.63fF +C2123 la_data_in[81] vdda1 0.63fF +C2124 la_oenb[80] vdda1 0.63fF +C2125 la_data_out[80] vdda1 0.63fF +C2126 la_data_in[80] vdda1 0.63fF +C2127 la_oenb[79] vdda1 0.63fF +C2128 la_data_out[79] vdda1 0.63fF +C2129 la_data_in[79] vdda1 0.63fF +C2130 la_oenb[78] vdda1 0.63fF +C2131 la_data_out[78] vdda1 0.63fF +C2132 la_data_in[78] vdda1 0.63fF +C2133 la_oenb[77] vdda1 0.63fF +C2134 la_data_out[77] vdda1 0.63fF +C2135 la_data_in[77] vdda1 0.63fF +C2136 la_oenb[76] vdda1 0.63fF +C2137 la_data_out[76] vdda1 0.63fF +C2138 la_data_in[76] vdda1 0.63fF +C2139 la_oenb[75] vdda1 0.63fF +C2140 la_data_out[75] vdda1 0.63fF +C2141 la_data_in[75] vdda1 0.63fF +C2142 la_oenb[74] vdda1 0.63fF +C2143 la_data_out[74] vdda1 0.63fF +C2144 la_data_in[74] vdda1 0.63fF +C2145 la_oenb[73] vdda1 0.63fF +C2146 la_data_out[73] vdda1 0.63fF +C2147 la_data_in[73] vdda1 0.63fF +C2148 la_oenb[72] vdda1 0.63fF +C2149 la_data_out[72] vdda1 0.63fF +C2150 la_data_in[72] vdda1 0.63fF +C2151 la_oenb[71] vdda1 0.63fF +C2152 la_data_out[71] vdda1 0.63fF +C2153 la_data_in[71] vdda1 0.63fF +C2154 la_oenb[70] vdda1 0.63fF +C2155 la_data_out[70] vdda1 0.63fF +C2156 la_data_in[70] vdda1 0.63fF +C2157 la_oenb[69] vdda1 0.63fF +C2158 la_data_out[69] vdda1 0.63fF +C2159 la_data_in[69] vdda1 0.63fF +C2160 la_oenb[68] vdda1 0.63fF +C2161 la_data_out[68] vdda1 0.63fF +C2162 la_data_in[68] vdda1 0.63fF +C2163 la_oenb[67] vdda1 0.63fF +C2164 la_data_out[67] vdda1 0.63fF +C2165 la_data_in[67] vdda1 0.63fF +C2166 la_oenb[66] vdda1 0.63fF +C2167 la_data_out[66] vdda1 0.63fF +C2168 la_data_in[66] vdda1 0.63fF +C2169 la_oenb[65] vdda1 0.63fF +C2170 la_data_out[65] vdda1 0.63fF +C2171 la_data_in[65] vdda1 0.63fF +C2172 la_oenb[64] vdda1 0.63fF +C2173 la_data_out[64] vdda1 0.63fF +C2174 la_data_in[64] vdda1 0.63fF +C2175 la_oenb[63] vdda1 0.63fF +C2176 la_data_out[63] vdda1 0.63fF +C2177 la_data_in[63] vdda1 0.63fF +C2178 la_oenb[62] vdda1 0.63fF +C2179 la_data_out[62] vdda1 0.63fF +C2180 la_data_in[62] vdda1 0.63fF +C2181 la_oenb[61] vdda1 0.63fF +C2182 la_data_out[61] vdda1 0.63fF +C2183 la_data_in[61] vdda1 0.63fF +C2184 la_oenb[60] vdda1 0.63fF +C2185 la_data_out[60] vdda1 0.63fF +C2186 la_data_in[60] vdda1 0.63fF +C2187 la_oenb[59] vdda1 0.63fF +C2188 la_data_out[59] vdda1 0.63fF +C2189 la_data_in[59] vdda1 0.63fF +C2190 la_oenb[58] vdda1 0.63fF +C2191 la_data_out[58] vdda1 0.63fF +C2192 la_data_in[58] vdda1 0.63fF +C2193 la_oenb[57] vdda1 0.63fF +C2194 la_data_out[57] vdda1 0.63fF +C2195 la_data_in[57] vdda1 0.63fF +C2196 la_oenb[56] vdda1 0.63fF +C2197 la_data_out[56] vdda1 0.63fF +C2198 la_data_in[56] vdda1 0.63fF +C2199 la_oenb[55] vdda1 0.63fF +C2200 la_data_out[55] vdda1 0.63fF +C2201 la_data_in[55] vdda1 0.63fF +C2202 la_oenb[54] vdda1 0.63fF +C2203 la_data_out[54] vdda1 0.63fF +C2204 la_data_in[54] vdda1 0.63fF +C2205 la_oenb[53] vdda1 0.63fF +C2206 la_data_out[53] vdda1 0.63fF +C2207 la_data_in[53] vdda1 0.63fF +C2208 la_oenb[52] vdda1 0.63fF +C2209 la_data_out[52] vdda1 0.63fF +C2210 la_data_in[52] vdda1 0.63fF +C2211 la_oenb[51] vdda1 0.63fF +C2212 la_data_out[51] vdda1 0.63fF +C2213 la_data_in[51] vdda1 0.63fF +C2214 la_oenb[50] vdda1 0.63fF +C2215 la_data_out[50] vdda1 0.63fF +C2216 la_data_in[50] vdda1 0.63fF +C2217 la_oenb[49] vdda1 0.63fF +C2218 la_data_out[49] vdda1 0.63fF +C2219 la_data_in[49] vdda1 0.63fF +C2220 la_oenb[48] vdda1 0.63fF +C2221 la_data_out[48] vdda1 0.63fF +C2222 la_data_in[48] vdda1 0.63fF +C2223 la_oenb[47] vdda1 0.63fF +C2224 la_data_out[47] vdda1 0.63fF +C2225 la_data_in[47] vdda1 0.63fF +C2226 la_oenb[46] vdda1 0.63fF +C2227 la_data_out[46] vdda1 0.63fF +C2228 la_data_in[46] vdda1 0.63fF +C2229 la_oenb[45] vdda1 0.63fF +C2230 la_data_out[45] vdda1 0.63fF +C2231 la_data_in[45] vdda1 0.63fF +C2232 la_oenb[44] vdda1 0.63fF +C2233 la_data_out[44] vdda1 0.63fF +C2234 la_data_in[44] vdda1 0.63fF +C2235 la_oenb[43] vdda1 0.63fF +C2236 la_data_out[43] vdda1 0.63fF +C2237 la_data_in[43] vdda1 0.63fF +C2238 la_oenb[42] vdda1 0.63fF +C2239 la_data_out[42] vdda1 0.63fF +C2240 la_data_in[42] vdda1 0.63fF +C2241 la_oenb[41] vdda1 0.63fF +C2242 la_data_out[41] vdda1 0.63fF +C2243 la_data_in[41] vdda1 0.63fF +C2244 la_oenb[40] vdda1 0.63fF +C2245 la_data_out[40] vdda1 0.63fF +C2246 la_data_in[40] vdda1 0.63fF +C2247 la_oenb[39] vdda1 0.63fF +C2248 la_data_out[39] vdda1 0.63fF +C2249 la_data_in[39] vdda1 0.63fF +C2250 la_oenb[38] vdda1 0.63fF +C2251 la_data_out[38] vdda1 0.63fF +C2252 la_data_in[38] vdda1 0.63fF +C2253 la_oenb[37] vdda1 0.63fF +C2254 la_data_out[37] vdda1 0.63fF +C2255 la_data_in[37] vdda1 0.63fF +C2256 la_oenb[36] vdda1 0.63fF +C2257 la_data_out[36] vdda1 0.63fF +C2258 la_data_in[36] vdda1 0.63fF +C2259 la_oenb[35] vdda1 0.63fF +C2260 la_data_out[35] vdda1 0.63fF +C2261 la_data_in[35] vdda1 0.63fF +C2262 la_oenb[34] vdda1 0.63fF +C2263 la_data_out[34] vdda1 0.63fF +C2264 la_data_in[34] vdda1 0.63fF +C2265 la_oenb[33] vdda1 0.63fF +C2266 la_data_out[33] vdda1 0.63fF +C2267 la_data_in[33] vdda1 0.63fF +C2268 la_oenb[32] vdda1 0.63fF +C2269 la_data_out[32] vdda1 0.63fF +C2270 la_data_in[32] vdda1 0.63fF +C2271 la_oenb[31] vdda1 0.63fF +C2272 la_data_out[31] vdda1 0.63fF +C2273 la_data_in[31] vdda1 0.63fF +C2274 la_oenb[30] vdda1 0.63fF +C2275 la_data_out[30] vdda1 0.63fF +C2276 la_data_in[30] vdda1 0.63fF +C2277 la_oenb[29] vdda1 0.63fF +C2278 la_data_out[29] vdda1 0.63fF +C2279 la_data_in[29] vdda1 0.63fF +C2280 la_oenb[28] vdda1 0.63fF +C2281 la_data_out[28] vdda1 0.63fF +C2282 la_data_in[28] vdda1 0.63fF +C2283 la_oenb[27] vdda1 0.63fF +C2284 la_data_out[27] vdda1 0.63fF +C2285 la_data_in[27] vdda1 0.63fF +C2286 la_oenb[26] vdda1 0.63fF +C2287 la_data_out[26] vdda1 0.63fF +C2288 la_data_in[26] vdda1 0.63fF +C2289 la_oenb[25] vdda1 0.63fF +C2290 la_data_out[25] vdda1 0.63fF +C2291 la_data_in[25] vdda1 0.63fF +C2292 la_oenb[24] vdda1 0.63fF +C2293 la_data_out[24] vdda1 0.63fF +C2294 la_data_in[24] vdda1 0.63fF +C2295 la_oenb[23] vdda1 0.63fF +C2296 la_data_out[23] vdda1 0.63fF +C2297 la_data_in[23] vdda1 0.63fF +C2298 la_oenb[22] vdda1 0.63fF +C2299 la_data_out[22] vdda1 0.63fF +C2300 la_data_in[22] vdda1 0.63fF +C2301 la_oenb[21] vdda1 0.63fF +C2302 la_data_out[21] vdda1 0.63fF +C2303 la_data_in[21] vdda1 0.63fF +C2304 la_oenb[20] vdda1 0.63fF +C2305 la_data_out[20] vdda1 0.63fF +C2306 la_data_in[20] vdda1 0.63fF +C2307 la_oenb[19] vdda1 0.63fF +C2308 la_data_out[19] vdda1 0.63fF +C2309 la_data_in[19] vdda1 0.63fF +C2310 la_oenb[18] vdda1 0.63fF +C2311 la_data_out[18] vdda1 0.63fF +C2312 la_data_in[18] vdda1 0.63fF +C2313 la_oenb[17] vdda1 0.63fF +C2314 la_data_out[17] vdda1 0.63fF +C2315 la_data_in[17] vdda1 0.63fF +C2316 la_oenb[16] vdda1 0.63fF +C2317 la_data_out[16] vdda1 0.63fF +C2318 la_data_in[16] vdda1 0.63fF +C2319 la_oenb[15] vdda1 0.63fF +C2320 la_data_out[15] vdda1 0.63fF +C2321 la_data_in[15] vdda1 0.63fF +C2322 la_oenb[14] vdda1 0.63fF +C2323 la_data_out[14] vdda1 0.63fF +C2324 la_data_in[14] vdda1 0.63fF +C2325 la_oenb[13] vdda1 0.63fF +C2326 la_data_out[13] vdda1 0.63fF +C2327 la_data_in[13] vdda1 0.63fF +C2328 la_oenb[12] vdda1 0.63fF +C2329 la_data_out[12] vdda1 0.63fF +C2330 la_data_in[12] vdda1 0.63fF +C2331 la_oenb[11] vdda1 0.63fF +C2332 la_data_out[11] vdda1 0.63fF +C2333 la_data_in[11] vdda1 0.63fF +C2334 la_oenb[10] vdda1 0.63fF +C2335 la_data_out[10] vdda1 0.63fF +C2336 la_data_in[10] vdda1 0.63fF +C2337 la_oenb[9] vdda1 0.63fF +C2338 la_data_out[9] vdda1 0.63fF +C2339 la_data_in[9] vdda1 0.63fF +C2340 la_oenb[8] vdda1 0.63fF +C2341 la_data_out[8] vdda1 0.63fF +C2342 la_data_in[8] vdda1 0.63fF +C2343 la_oenb[7] vdda1 0.63fF +C2344 la_data_out[7] vdda1 0.63fF +C2345 la_data_in[7] vdda1 0.63fF +C2346 la_oenb[6] vdda1 0.63fF +C2347 la_data_out[6] vdda1 0.63fF +C2348 la_data_in[6] vdda1 0.63fF +C2349 la_oenb[5] vdda1 0.63fF +C2350 la_data_out[5] vdda1 0.63fF +C2351 la_data_in[5] vdda1 0.63fF +C2352 la_oenb[4] vdda1 0.63fF +C2353 la_data_out[4] vdda1 0.63fF +C2354 la_data_in[4] vdda1 0.63fF +C2355 la_oenb[3] vdda1 0.63fF +C2356 la_data_out[3] vdda1 0.63fF +C2357 la_data_in[3] vdda1 0.63fF +C2358 la_oenb[2] vdda1 0.63fF +C2359 la_data_out[2] vdda1 0.63fF +C2360 la_data_in[2] vdda1 0.63fF +C2361 la_oenb[1] vdda1 0.63fF +C2362 la_data_out[1] vdda1 0.63fF +C2363 la_data_in[1] vdda1 0.63fF +C2364 la_oenb[0] vdda1 0.63fF +C2365 la_data_out[0] vdda1 0.63fF +C2366 la_data_in[0] vdda1 0.63fF +C2367 wbs_dat_o[31] vdda1 0.63fF +C2368 wbs_dat_i[31] vdda1 0.63fF +C2369 wbs_adr_i[31] vdda1 0.63fF +C2370 wbs_dat_o[30] vdda1 0.63fF +C2371 wbs_dat_i[30] vdda1 0.63fF +C2372 wbs_adr_i[30] vdda1 0.63fF +C2373 wbs_dat_o[29] vdda1 0.63fF +C2374 wbs_dat_i[29] vdda1 0.63fF +C2375 wbs_adr_i[29] vdda1 0.63fF +C2376 wbs_dat_o[28] vdda1 0.63fF +C2377 wbs_dat_i[28] vdda1 0.63fF +C2378 wbs_adr_i[28] vdda1 0.63fF +C2379 wbs_dat_o[27] vdda1 0.63fF +C2380 wbs_dat_i[27] vdda1 0.63fF +C2381 wbs_adr_i[27] vdda1 0.63fF +C2382 wbs_dat_o[26] vdda1 0.63fF +C2383 wbs_dat_i[26] vdda1 0.63fF +C2384 wbs_adr_i[26] vdda1 0.63fF +C2385 wbs_dat_o[25] vdda1 0.63fF +C2386 wbs_dat_i[25] vdda1 0.63fF +C2387 wbs_adr_i[25] vdda1 0.63fF +C2388 wbs_dat_o[24] vdda1 0.63fF +C2389 wbs_dat_i[24] vdda1 0.63fF +C2390 wbs_adr_i[24] vdda1 0.63fF +C2391 wbs_dat_o[23] vdda1 0.63fF +C2392 wbs_dat_i[23] vdda1 0.63fF +C2393 wbs_adr_i[23] vdda1 0.63fF +C2394 wbs_dat_o[22] vdda1 0.63fF +C2395 wbs_dat_i[22] vdda1 0.63fF +C2396 wbs_adr_i[22] vdda1 0.63fF +C2397 wbs_dat_o[21] vdda1 0.63fF +C2398 wbs_dat_i[21] vdda1 0.63fF +C2399 wbs_adr_i[21] vdda1 0.63fF +C2400 wbs_dat_o[20] vdda1 0.63fF +C2401 wbs_dat_i[20] vdda1 0.63fF +C2402 wbs_adr_i[20] vdda1 0.63fF +C2403 wbs_dat_o[19] vdda1 0.63fF +C2404 wbs_dat_i[19] vdda1 0.63fF +C2405 wbs_adr_i[19] vdda1 0.63fF +C2406 wbs_dat_o[18] vdda1 0.63fF +C2407 wbs_dat_i[18] vdda1 0.63fF +C2408 wbs_adr_i[18] vdda1 0.63fF +C2409 wbs_dat_o[17] vdda1 0.63fF +C2410 wbs_dat_i[17] vdda1 0.63fF +C2411 wbs_adr_i[17] vdda1 0.63fF +C2412 wbs_dat_o[16] vdda1 0.63fF +C2413 wbs_dat_i[16] vdda1 0.63fF +C2414 wbs_adr_i[16] vdda1 0.63fF +C2415 wbs_dat_o[15] vdda1 0.63fF +C2416 wbs_dat_i[15] vdda1 0.63fF +C2417 wbs_adr_i[15] vdda1 0.63fF +C2418 wbs_dat_o[14] vdda1 0.63fF +C2419 wbs_dat_i[14] vdda1 0.63fF +C2420 wbs_adr_i[14] vdda1 0.63fF +C2421 wbs_dat_o[13] vdda1 0.63fF +C2422 wbs_dat_i[13] vdda1 0.63fF +C2423 wbs_adr_i[13] vdda1 0.63fF +C2424 wbs_dat_o[12] vdda1 0.63fF +C2425 wbs_dat_i[12] vdda1 0.63fF +C2426 wbs_adr_i[12] vdda1 0.63fF +C2427 wbs_dat_o[11] vdda1 0.63fF +C2428 wbs_dat_i[11] vdda1 0.63fF +C2429 wbs_adr_i[11] vdda1 0.63fF +C2430 wbs_dat_o[10] vdda1 0.63fF +C2431 wbs_dat_i[10] vdda1 0.63fF +C2432 wbs_adr_i[10] vdda1 0.63fF +C2433 wbs_dat_o[9] vdda1 0.63fF +C2434 wbs_dat_i[9] vdda1 0.63fF +C2435 wbs_adr_i[9] vdda1 0.63fF +C2436 wbs_dat_o[8] vdda1 0.63fF +C2437 wbs_dat_i[8] vdda1 0.63fF +C2438 wbs_adr_i[8] vdda1 0.63fF +C2439 wbs_dat_o[7] vdda1 0.63fF +C2440 wbs_dat_i[7] vdda1 0.63fF +C2441 wbs_adr_i[7] vdda1 0.63fF +C2442 wbs_dat_o[6] vdda1 0.63fF +C2443 wbs_dat_i[6] vdda1 0.63fF +C2444 wbs_adr_i[6] vdda1 0.63fF +C2445 wbs_dat_o[5] vdda1 0.63fF +C2446 wbs_dat_i[5] vdda1 0.63fF +C2447 wbs_adr_i[5] vdda1 0.63fF +C2448 wbs_dat_o[4] vdda1 0.63fF +C2449 wbs_dat_i[4] vdda1 0.63fF +C2450 wbs_adr_i[4] vdda1 0.63fF +C2451 wbs_sel_i[3] vdda1 0.63fF +C2452 wbs_dat_o[3] vdda1 0.63fF +C2453 wbs_dat_i[3] vdda1 0.63fF +C2454 wbs_adr_i[3] vdda1 0.63fF +C2455 wbs_sel_i[2] vdda1 0.63fF +C2456 wbs_dat_o[2] vdda1 0.63fF +C2457 wbs_dat_i[2] vdda1 0.63fF +C2458 wbs_adr_i[2] vdda1 0.63fF +C2459 wbs_sel_i[1] vdda1 0.63fF +C2460 wbs_dat_o[1] vdda1 0.63fF +C2461 wbs_dat_i[1] vdda1 0.63fF +C2462 wbs_adr_i[1] vdda1 0.63fF +C2463 wbs_sel_i[0] vdda1 0.63fF +C2464 wbs_dat_o[0] vdda1 0.63fF +C2465 wbs_dat_i[0] vdda1 0.63fF +C2466 wbs_adr_i[0] vdda1 0.63fF +C2467 wbs_we_i vdda1 0.63fF +C2468 wbs_stb_i vdda1 0.63fF +C2469 wbs_cyc_i vdda1 0.63fF +C2470 wbs_ack_o vdda1 0.63fF +C2471 wb_rst_i vdda1 0.63fF +C2472 wb_clk_i vdda1 0.63fF +C2473 pll_full_0/divider_0/and_0/Z1 vdda1 0.65fF +C2474 pll_full_0/divider_0/and_0/B vdda1 2.45fF +C2475 pll_full_0/divider_0/and_0/A vdda1 2.35fF +C2476 pll_full_0/divider_0/and_0/out1 vdda1 2.99fF +C2477 pll_full_0/divider_0/tspc_2/Z4 vdda1 0.86fF +C2478 pll_full_0/div vdda1 14.90fF +C2479 pll_full_0/divider_0/tspc_2/Z3 vdda1 2.26fF +C2480 pll_full_0/divider_0/tspc_2/Z2 vdda1 1.46fF +C2481 pll_full_0/divider_0/tspc_2/Z1 vdda1 0.99fF +C2482 pll_full_0/divider_0/nor_0/B vdda1 6.48fF +C2483 pll_full_0/divider_0/tspc_2/a_630_n680# vdda1 1.14fF **FLOATING +C2484 pll_full_0/divider_0/tspc_1/Z4 vdda1 0.86fF +C2485 pll_full_0/divider_0/tspc_1/Q vdda1 3.12fF +C2486 pll_full_0/divider_0/tspc_1/Z3 vdda1 2.26fF +C2487 pll_full_0/divider_0/tspc_1/Z2 vdda1 1.46fF +C2488 pll_full_0/divider_0/tspc_1/Z1 vdda1 0.99fF +C2489 pll_full_0/divider_0/nor_1/B vdda1 7.12fF +C2490 pll_full_0/divider_0/tspc_1/a_630_n680# vdda1 1.15fF **FLOATING +C2491 pll_full_0/divider_0/tspc_0/Z4 vdda1 0.86fF +C2492 pll_full_0/divider_0/tspc_0/Q vdda1 3.14fF +C2493 pll_full_0/divider_0/tspc_0/Z3 vdda1 2.26fF +C2494 pll_full_0/divider_0/tspc_0/Z2 vdda1 1.46fF +C2495 pll_full_0/divider_0/tspc_0/Z1 vdda1 0.99fF +C2496 pll_full_0/divider_0/nor_1/A vdda1 7.08fF +C2497 pll_full_0/divider_0/tspc_0/a_630_n680# vdda1 1.15fF **FLOATING +C2498 pll_full_0/vco vdda1 35.22fF +C2499 pll_full_0/divider_0/prescaler_0/nand_1/z1 vdda1 0.36fF +C2500 pll_full_0/divider_0/prescaler_0/tspc_0/D vdda1 2.64fF +C2501 pll_full_0/divider_0/prescaler_0/tspc_2/Q vdda1 3.72fF +C2502 pll_full_0/divider_0/prescaler_0/tspc_1/Q vdda1 3.61fF +C2503 pll_full_0/divider_0/prescaler_0/nand_0/z1 vdda1 0.36fF +C2504 pll_full_0/divider_0/prescaler_0/tspc_2/D vdda1 3.12fF +C2505 pll_full_0/divider_0/and_0/OUT vdda1 5.67fF +C2506 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 vdda1 0.86fF +C2507 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 vdda1 2.26fF +C2508 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 vdda1 1.19fF +C2509 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 vdda1 0.99fF +C2510 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# vdda1 1.47fF **FLOATING +C2511 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# vdda1 2.11fF **FLOATING +C2512 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 vdda1 0.86fF +C2513 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 vdda1 2.26fF +C2514 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 vdda1 1.48fF +C2515 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 vdda1 0.99fF +C2516 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# vdda1 1.14fF **FLOATING +C2517 pll_full_0/divider_0/prescaler_0/m1_2700_2190# vdda1 4.22fF **FLOATING +C2518 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 vdda1 0.86fF +C2519 pll_full_0/divider_0/prescaler_0/Out vdda1 4.59fF +C2520 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 vdda1 2.26fF +C2521 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 vdda1 1.46fF +C2522 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 vdda1 0.99fF +C2523 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# vdda1 1.16fF **FLOATING +C2524 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# vdda1 2.11fF **FLOATING +C2525 pll_full_0/divider_0/nor_1/Z1 vdda1 1.34fF +C2526 pll_full_0/divider_0/nor_0/Z1 vdda1 1.34fF +C2527 pll_full_0/ro_complete_0/cbank_2/v vdda1 16.43fF +C2528 pll_full_0/ro_complete_0/cbank_2/switch_5/vin vdda1 0.78fF +C2529 pll_full_0/ro_complete_0/cbank_2/switch_4/vin vdda1 1.50fF +C2530 pll_full_0/ro_complete_0/cbank_2/switch_2/vin vdda1 1.30fF +C2531 pll_full_0/ro_complete_0/cbank_2/switch_3/vin vdda1 0.56fF +C2532 pll_full_0/ro_complete_0/cbank_2/switch_1/vin vdda1 1.14fF +C2533 pll_full_0/ro_complete_0/cbank_2/switch_0/vin vdda1 1.02fF +C2534 pll_full_0/ro_complete_0/cbank_1/switch_5/vin vdda1 0.78fF +C2535 pll_full_0/ro_complete_0/a0 vdda1 5.35fF +C2536 pll_full_0/ro_complete_0/cbank_1/switch_4/vin vdda1 1.50fF +C2537 pll_full_0/ro_complete_0/a1 vdda1 6.54fF +C2538 pll_full_0/ro_complete_0/cbank_1/switch_2/vin vdda1 1.30fF +C2539 pll_full_0/ro_complete_0/a3 vdda1 5.96fF +C2540 pll_full_0/ro_complete_0/cbank_1/switch_3/vin vdda1 0.56fF +C2541 pll_full_0/ro_complete_0/a2 vdda1 5.21fF +C2542 pll_full_0/ro_complete_0/cbank_1/switch_1/vin vdda1 1.14fF +C2543 pll_full_0/ro_complete_0/a4 vdda1 5.81fF +C2544 pll_full_0/ro_complete_0/cbank_1/switch_0/vin vdda1 1.02fF +C2545 pll_full_0/ro_complete_0/a5 vdda1 6.74fF +C2546 pll_full_0/ro_complete_0/cbank_0/v vdda1 15.12fF +C2547 pll_full_0/ro_complete_0/cbank_0/switch_5/vin vdda1 0.78fF +C2548 pll_full_0/ro_complete_0/cbank_0/switch_4/vin vdda1 1.50fF +C2549 pll_full_0/ro_complete_0/cbank_0/switch_2/vin vdda1 1.30fF +C2550 pll_full_0/ro_complete_0/cbank_0/switch_3/vin vdda1 0.56fF +C2551 pll_full_0/ro_complete_0/cbank_0/switch_1/vin vdda1 1.14fF +C2552 pll_full_0/ro_complete_0/cbank_0/switch_0/vin vdda1 1.02fF +C2553 pll_full_0/filter_0/a_4216_n5230# vdda1 418.90fF **FLOATING +C2554 pll_full_0/filter_0/a_4216_n2998# vdda1 1.39fF **FLOATING +C2555 pll_full_0/cp_0/down vdda1 1.54fF +C2556 pll_full_0/cp_0/upbar vdda1 1.79fF +C2557 pll_full_0/cp_0/a_7110_n2840# vdda1 0.17fF **FLOATING +C2558 pll_full_0/cp_0/a_3060_n2840# vdda1 1.71fF **FLOATING +C2559 pll_full_0/cp_0/a_7110_0# vdda1 0.17fF **FLOATING +C2560 pll_full_0/cp_0/a_6370_0# vdda1 0.40fF **FLOATING +C2561 pll_full_0/cp_0/a_3060_0# vdda1 2.50fF **FLOATING +C2562 pll_full_0/cp_0/a_1710_0# vdda1 7.47fF **FLOATING +C2563 pll_full_0/pd_0/UP vdda1 5.89fF +C2564 pll_full_0/pd_0/and_pd_0/Z1 vdda1 0.39fF +C2565 pll_full_0/pd_0/and_pd_0/Out1 vdda1 2.22fF +C2566 pll_full_0/pd_0/tspc_r_1/z5 vdda1 1.10fF +C2567 pll_full_0/pd_0/tspc_r_1/Z4 vdda1 1.07fF +C2568 pll_full_0/pd_0/R vdda1 3.05fF +C2569 pll_full_0/pd_0/tspc_r_1/Qbar vdda1 0.79fF +C2570 pll_full_0/pd_0/tspc_r_1/Z2 vdda1 1.22fF +C2571 pll_full_0/pd_0/tspc_r_1/Z1 vdda1 0.67fF +C2572 pll_full_0/pd_0/DOWN vdda1 7.38fF +C2573 pll_full_0/pd_0/tspc_r_1/Qbar1 vdda1 1.34fF +C2574 pll_full_0/pd_0/tspc_r_1/Z3 vdda1 2.12fF +C2575 pll_full_0/pd_0/tspc_r_0/z5 vdda1 1.10fF +C2576 pll_full_0/pd_0/tspc_r_0/Z4 vdda1 1.07fF +C2577 pll_full_0/pd_0/tspc_r_0/Qbar vdda1 0.88fF +C2578 pll_full_0/pd_0/tspc_r_0/Z2 vdda1 1.22fF +C2579 pll_full_0/pd_0/tspc_r_0/Z1 vdda1 0.67fF +C2580 pll_full_0/pd_0/tspc_r_0/Qbar1 vdda1 1.34fF +C2581 pll_full_0/pd_0/tspc_r_0/Z3 vdda1 2.12fF +C2582 pll_full_0/ref vdda1 4.34fF +C2583 pll_full_1/divider_0/and_0/Z1 vdda1 0.65fF +C2584 pll_full_1/divider_0/and_0/B vdda1 2.45fF +C2585 pll_full_1/divider_0/and_0/A vdda1 2.35fF +C2586 pll_full_1/divider_0/and_0/out1 vdda1 2.99fF +C2587 pll_full_1/divider_0/tspc_2/Z4 vdda1 0.86fF +C2588 pll_full_1/div vdda1 14.90fF +C2589 pll_full_1/divider_0/tspc_2/Z3 vdda1 2.26fF +C2590 pll_full_1/divider_0/tspc_2/Z2 vdda1 1.46fF +C2591 pll_full_1/divider_0/tspc_2/Z1 vdda1 0.99fF +C2592 pll_full_1/divider_0/nor_0/B vdda1 6.48fF +C2593 pll_full_1/divider_0/tspc_2/a_630_n680# vdda1 1.14fF **FLOATING +C2594 pll_full_1/divider_0/tspc_1/Z4 vdda1 0.86fF +C2595 pll_full_1/divider_0/tspc_1/Q vdda1 3.12fF +C2596 pll_full_1/divider_0/tspc_1/Z3 vdda1 2.26fF +C2597 pll_full_1/divider_0/tspc_1/Z2 vdda1 1.46fF +C2598 pll_full_1/divider_0/tspc_1/Z1 vdda1 0.99fF +C2599 pll_full_1/divider_0/nor_1/B vdda1 7.12fF +C2600 pll_full_1/divider_0/tspc_1/a_630_n680# vdda1 1.15fF **FLOATING +C2601 pll_full_1/divider_0/tspc_0/Z4 vdda1 0.86fF +C2602 pll_full_1/divider_0/tspc_0/Q vdda1 3.14fF +C2603 pll_full_1/divider_0/tspc_0/Z3 vdda1 2.26fF +C2604 pll_full_1/divider_0/tspc_0/Z2 vdda1 1.46fF +C2605 pll_full_1/divider_0/tspc_0/Z1 vdda1 0.99fF +C2606 pll_full_1/divider_0/nor_1/A vdda1 7.08fF +C2607 pll_full_1/divider_0/tspc_0/a_630_n680# vdda1 1.15fF **FLOATING +C2608 pll_full_1/vco vdda1 35.22fF +C2609 pll_full_1/divider_0/prescaler_0/nand_1/z1 vdda1 0.36fF +C2610 pll_full_1/divider_0/prescaler_0/tspc_0/D vdda1 2.64fF +C2611 pll_full_1/divider_0/prescaler_0/tspc_2/Q vdda1 3.72fF +C2612 pll_full_1/divider_0/prescaler_0/tspc_1/Q vdda1 3.61fF +C2613 pll_full_1/divider_0/prescaler_0/nand_0/z1 vdda1 0.36fF +C2614 pll_full_1/divider_0/prescaler_0/tspc_2/D vdda1 3.12fF +C2615 pll_full_1/divider_0/and_0/OUT vdda1 5.67fF +C2616 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 vdda1 0.86fF +C2617 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 vdda1 2.26fF +C2618 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 vdda1 1.19fF +C2619 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 vdda1 0.99fF +C2620 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# vdda1 1.47fF **FLOATING +C2621 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# vdda1 2.11fF **FLOATING +C2622 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 vdda1 0.86fF +C2623 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 vdda1 2.26fF +C2624 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 vdda1 1.48fF +C2625 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 vdda1 0.99fF +C2626 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# vdda1 1.14fF **FLOATING +C2627 pll_full_1/divider_0/prescaler_0/m1_2700_2190# vdda1 4.22fF **FLOATING +C2628 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 vdda1 0.86fF +C2629 pll_full_1/divider_0/prescaler_0/Out vdda1 4.59fF +C2630 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 vdda1 2.26fF +C2631 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 vdda1 1.46fF +C2632 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 vdda1 0.99fF +C2633 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# vdda1 1.16fF **FLOATING +C2634 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# vdda1 2.11fF **FLOATING +C2635 pll_full_1/divider_0/nor_1/Z1 vdda1 1.34fF +C2636 pll_full_1/divider_0/nor_0/Z1 vdda1 1.34fF +C2637 pll_full_1/ro_complete_0/cbank_2/v vdda1 16.43fF +C2638 pll_full_1/ro_complete_0/cbank_2/switch_5/vin vdda1 0.78fF +C2639 pll_full_1/ro_complete_0/cbank_2/switch_4/vin vdda1 1.50fF +C2640 pll_full_1/ro_complete_0/cbank_2/switch_2/vin vdda1 1.30fF +C2641 pll_full_1/ro_complete_0/cbank_2/switch_3/vin vdda1 0.56fF +C2642 pll_full_1/ro_complete_0/cbank_2/switch_1/vin vdda1 1.14fF +C2643 pll_full_1/ro_complete_0/cbank_2/switch_0/vin vdda1 1.02fF +C2644 pll_full_1/ro_complete_0/cbank_1/switch_5/vin vdda1 0.78fF +C2645 pll_full_1/ro_complete_0/a0 vdda1 5.35fF +C2646 pll_full_1/ro_complete_0/cbank_1/switch_4/vin vdda1 1.50fF +C2647 pll_full_1/ro_complete_0/a1 vdda1 6.54fF +C2648 pll_full_1/ro_complete_0/cbank_1/switch_2/vin vdda1 1.30fF +C2649 pll_full_1/ro_complete_0/a3 vdda1 5.96fF +C2650 pll_full_1/ro_complete_0/cbank_1/switch_3/vin vdda1 0.56fF +C2651 pll_full_1/ro_complete_0/a2 vdda1 5.21fF +C2652 pll_full_1/ro_complete_0/cbank_1/switch_1/vin vdda1 1.14fF +C2653 pll_full_1/ro_complete_0/a4 vdda1 5.81fF +C2654 pll_full_1/ro_complete_0/cbank_1/switch_0/vin vdda1 1.02fF +C2655 pll_full_1/ro_complete_0/a5 vdda1 6.74fF +C2656 pll_full_1/ro_complete_0/cbank_0/v vdda1 15.12fF +C2657 pll_full_1/ro_complete_0/cbank_0/switch_5/vin vdda1 0.78fF +C2658 pll_full_1/ro_complete_0/cbank_0/switch_4/vin vdda1 1.50fF +C2659 pll_full_1/ro_complete_0/cbank_0/switch_2/vin vdda1 1.30fF +C2660 pll_full_1/ro_complete_0/cbank_0/switch_3/vin vdda1 0.56fF +C2661 pll_full_1/ro_complete_0/cbank_0/switch_1/vin vdda1 1.14fF +C2662 pll_full_1/ro_complete_0/cbank_0/switch_0/vin vdda1 1.02fF +C2663 pll_full_1/filter_0/a_4216_n5230# vdda1 418.90fF **FLOATING +C2664 pll_full_1/filter_0/a_4216_n2998# vdda1 1.39fF **FLOATING +C2665 pll_full_1/cp_0/down vdda1 1.54fF +C2666 pll_full_1/cp_0/upbar vdda1 1.79fF +C2667 pll_full_1/cp_0/a_7110_n2840# vdda1 0.17fF **FLOATING +C2668 pll_full_1/cp_0/a_3060_n2840# vdda1 1.71fF **FLOATING +C2669 pll_full_1/cp_0/a_7110_0# vdda1 0.17fF **FLOATING +C2670 pll_full_1/cp_0/a_6370_0# vdda1 0.40fF **FLOATING +C2671 pll_full_1/cp_0/a_3060_0# vdda1 2.50fF **FLOATING +C2672 pll_full_1/cp_0/a_1710_0# vdda1 7.47fF **FLOATING +C2673 pll_full_1/pd_0/UP vdda1 5.89fF +C2674 pll_full_1/pd_0/and_pd_0/Z1 vdda1 0.39fF +C2675 pll_full_1/pd_0/and_pd_0/Out1 vdda1 2.22fF +C2676 pll_full_1/pd_0/tspc_r_1/z5 vdda1 1.10fF +C2677 pll_full_1/pd_0/tspc_r_1/Z4 vdda1 1.07fF +C2678 pll_full_1/pd_0/R vdda1 3.05fF +C2679 pll_full_1/pd_0/tspc_r_1/Qbar vdda1 0.79fF +C2680 pll_full_1/pd_0/tspc_r_1/Z2 vdda1 1.22fF +C2681 pll_full_1/pd_0/tspc_r_1/Z1 vdda1 0.67fF +C2682 pll_full_1/pd_0/DOWN vdda1 7.38fF +C2683 pll_full_1/pd_0/tspc_r_1/Qbar1 vdda1 1.34fF +C2684 pll_full_1/pd_0/tspc_r_1/Z3 vdda1 2.12fF +C2685 pll_full_1/pd_0/tspc_r_0/z5 vdda1 1.10fF +C2686 pll_full_1/pd_0/tspc_r_0/Z4 vdda1 1.07fF +C2687 pll_full_1/pd_0/tspc_r_0/Qbar vdda1 0.88fF +C2688 pll_full_1/pd_0/tspc_r_0/Z2 vdda1 1.22fF +C2689 pll_full_1/pd_0/tspc_r_0/Z1 vdda1 0.67fF +C2690 pll_full_1/pd_0/tspc_r_0/Qbar1 vdda1 1.34fF +C2691 pll_full_1/pd_0/tspc_r_0/Z3 vdda1 2.12fF +C2692 pll_full_1/ref vdda1 4.34fF +C2693 div_pd_buffered_0/tapered_buf_0/out vdda1 385.99fF +C2694 div_pd_buffered_0/tapered_buf_0/a_n10_n140# vdda1 0.06fF **FLOATING +C2695 div_pd_buffered_0/tapered_buf_0/a_210_n610# vdda1 592.97fF **FLOATING +C2696 div_pd_buffered_0/tapered_buf_0/a_160_230# vdda1 0.15fF **FLOATING +C2697 div_pd_buffered_0/tapered_buf_0/a_n10_230# vdda1 0.13fF **FLOATING +C2698 div_pd_buffered_0/tapered_buf_0/a_4670_0# vdda1 252.41fF **FLOATING +C2699 div_pd_buffered_0/tapered_buf_0/a_1650_0# vdda1 63.61fF **FLOATING +C2700 div_pd_buffered_0/tapered_buf_0/a_580_0# vdda1 16.76fF **FLOATING +C2701 div_pd_buffered_0/tapered_buf_0/a_160_n140# vdda1 4.09fF **FLOATING +C2702 div_pd_buffered_0/tapered_buf_1/in vdda1 1.13fF +C2703 div_pd_buffered_0/tapered_buf_1/a_n10_n140# vdda1 0.06fF **FLOATING +C2704 div_pd_buffered_0/tapered_buf_1/a_210_n610# vdda1 592.97fF **FLOATING +C2705 div_pd_buffered_0/tapered_buf_1/a_160_230# vdda1 0.15fF **FLOATING +C2706 div_pd_buffered_0/tapered_buf_1/a_n10_230# vdda1 0.13fF **FLOATING +C2707 div_pd_buffered_0/tapered_buf_1/a_4670_0# vdda1 252.41fF **FLOATING +C2708 div_pd_buffered_0/tapered_buf_1/a_1650_0# vdda1 63.61fF **FLOATING +C2709 div_pd_buffered_0/tapered_buf_1/a_580_0# vdda1 16.76fF **FLOATING +C2710 div_pd_buffered_0/tapered_buf_1/a_160_n140# vdda1 4.09fF **FLOATING +C2711 div_pd_buffered_0/divider_0/and_0/Z1 vdda1 0.74fF +C2712 div_pd_buffered_0/divider_0/and_0/B vdda1 2.25fF +C2713 div_pd_buffered_0/divider_0/and_0/A vdda1 2.19fF +C2714 div_pd_buffered_0/divider_0/and_0/out1 vdda1 2.93fF +C2715 div_pd_buffered_0/divider_0/tspc_2/Z4 vdda1 0.86fF +C2716 div_pd_buffered_0/divider_0/tspc_2/Z3 vdda1 2.26fF +C2717 div_pd_buffered_0/divider_0/tspc_2/Z2 vdda1 1.46fF +C2718 div_pd_buffered_0/divider_0/tspc_2/Z1 vdda1 0.99fF +C2719 div_pd_buffered_0/divider_0/nor_0/B vdda1 6.37fF +C2720 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# vdda1 1.14fF **FLOATING +C2721 div_pd_buffered_0/divider_0/tspc_1/Z4 vdda1 0.86fF +C2722 div_pd_buffered_0/divider_0/tspc_1/Q vdda1 3.12fF +C2723 div_pd_buffered_0/divider_0/tspc_1/Z3 vdda1 2.26fF +C2724 div_pd_buffered_0/divider_0/tspc_1/Z2 vdda1 1.46fF +C2725 div_pd_buffered_0/divider_0/tspc_1/Z1 vdda1 0.99fF +C2726 div_pd_buffered_0/divider_0/nor_1/B vdda1 7.05fF +C2727 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# vdda1 1.15fF **FLOATING +C2728 div_pd_buffered_0/divider_0/tspc_0/Z4 vdda1 0.86fF +C2729 div_pd_buffered_0/divider_0/tspc_0/Q vdda1 3.14fF +C2730 div_pd_buffered_0/divider_0/tspc_0/Z3 vdda1 2.26fF +C2731 div_pd_buffered_0/divider_0/tspc_0/Z2 vdda1 1.46fF +C2732 div_pd_buffered_0/divider_0/tspc_0/Z1 vdda1 0.99fF +C2733 div_pd_buffered_0/divider_0/nor_1/A vdda1 7.04fF +C2734 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# vdda1 1.15fF **FLOATING +C2735 div_pd_buffered_0/divider_0/clk vdda1 399.62fF +C2736 div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 vdda1 0.36fF +C2737 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D vdda1 2.64fF +C2738 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q vdda1 3.64fF +C2739 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q vdda1 3.61fF +C2740 div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 vdda1 0.36fF +C2741 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D vdda1 3.12fF +C2742 div_pd_buffered_0/divider_0/and_0/OUT vdda1 5.62fF +C2743 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 vdda1 0.86fF +C2744 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 vdda1 2.26fF +C2745 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 vdda1 1.46fF +C2746 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 vdda1 0.99fF +C2747 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# vdda1 1.14fF **FLOATING +C2748 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# vdda1 2.11fF **FLOATING +C2749 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 vdda1 0.86fF +C2750 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 vdda1 2.26fF +C2751 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 vdda1 1.48fF +C2752 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 vdda1 0.99fF +C2753 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# vdda1 1.14fF **FLOATING +C2754 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# vdda1 4.22fF **FLOATING +C2755 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 vdda1 0.86fF +C2756 div_pd_buffered_0/divider_0/prescaler_0/Out vdda1 4.59fF +C2757 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 vdda1 2.26fF +C2758 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 vdda1 1.46fF +C2759 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 vdda1 0.99fF +C2760 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# vdda1 1.16fF **FLOATING +C2761 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# vdda1 2.11fF **FLOATING +C2762 div_pd_buffered_0/divider_0/nor_1/Z1 vdda1 1.34fF +C2763 div_pd_buffered_0/divider_0/nor_0/Z1 vdda1 1.34fF +C2764 div_pd_buffered_0/divider_0/mc2 vdda1 393.39fF +C2765 div_pd_buffered_0/pd_0/UP vdda1 6.08fF +C2766 div_pd_buffered_0/pd_0/and_pd_0/Z1 vdda1 0.39fF +C2767 div_pd_buffered_0/pd_0/and_pd_0/Out1 vdda1 2.22fF +C2768 div_pd_buffered_0/pd_0/tspc_r_1/z5 vdda1 1.10fF +C2769 div_pd_buffered_0/pd_0/tspc_r_1/Z4 vdda1 1.07fF +C2770 div_pd_buffered_0/pd_0/R vdda1 3.05fF +C2771 div_pd_buffered_0/pd_0/tspc_r_1/Qbar vdda1 0.79fF +C2772 div_pd_buffered_0/pd_0/tspc_r_1/Z2 vdda1 1.22fF +C2773 div_pd_buffered_0/pd_0/tspc_r_1/Z1 vdda1 0.67fF +C2774 div_pd_buffered_0/pd_0/DOWN vdda1 8.79fF +C2775 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 vdda1 1.34fF +C2776 div_pd_buffered_0/pd_0/tspc_r_1/Z3 vdda1 2.12fF +C2777 div_pd_buffered_0/pd_0/DIV vdda1 6.57fF +C2778 div_pd_buffered_0/pd_0/tspc_r_0/z5 vdda1 1.10fF +C2779 div_pd_buffered_0/pd_0/tspc_r_0/Z4 vdda1 1.07fF +C2780 div_pd_buffered_0/pd_0/tspc_r_0/Qbar vdda1 0.88fF +C2781 div_pd_buffered_0/pd_0/tspc_r_0/Z2 vdda1 1.22fF +C2782 div_pd_buffered_0/pd_0/tspc_r_0/Z1 vdda1 0.67fF +C2783 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 vdda1 1.34fF +C2784 div_pd_buffered_0/pd_0/tspc_r_0/Z3 vdda1 2.12fF +C2785 div_pd_buffered_0/pd_0/REF vdda1 392.16fF +C2786 div_pd_buffered_0/tapered_buf_4/out vdda1 385.93fF +C2787 div_pd_buffered_0/tapered_buf_4/a_n10_n140# vdda1 0.06fF **FLOATING +C2788 div_pd_buffered_0/tapered_buf_4/a_210_n610# vdda1 592.97fF **FLOATING +C2789 div_pd_buffered_0/tapered_buf_4/a_160_230# vdda1 0.15fF **FLOATING +C2790 div_pd_buffered_0/tapered_buf_4/a_n10_230# vdda1 0.13fF **FLOATING +C2791 div_pd_buffered_0/tapered_buf_4/a_4670_0# vdda1 252.41fF **FLOATING +C2792 div_pd_buffered_0/tapered_buf_4/a_1650_0# vdda1 63.61fF **FLOATING +C2793 div_pd_buffered_0/tapered_buf_4/a_580_0# vdda1 16.76fF **FLOATING +C2794 div_pd_buffered_0/tapered_buf_4/a_160_n140# vdda1 4.09fF **FLOATING +C2795 div_pd_buffered_0/tapered_buf_3/in vdda1 1.13fF +C2796 div_pd_buffered_0/tapered_buf_3/a_n10_n140# vdda1 0.06fF **FLOATING +C2797 div_pd_buffered_0/tapered_buf_3/a_210_n610# vdda1 592.97fF **FLOATING +C2798 div_pd_buffered_0/tapered_buf_3/a_160_230# vdda1 0.15fF **FLOATING +C2799 div_pd_buffered_0/tapered_buf_3/a_n10_230# vdda1 0.13fF **FLOATING +C2800 div_pd_buffered_0/tapered_buf_3/a_4670_0# vdda1 252.41fF **FLOATING +C2801 div_pd_buffered_0/tapered_buf_3/a_1650_0# vdda1 63.61fF **FLOATING +C2802 div_pd_buffered_0/tapered_buf_3/a_580_0# vdda1 16.76fF **FLOATING +C2803 div_pd_buffered_0/tapered_buf_3/a_160_n140# vdda1 4.09fF **FLOATING +C2804 div_pd_buffered_0/tapered_buf_2/in vdda1 1.13fF +C2805 div_pd_buffered_0/tapered_buf_2/a_n10_n140# vdda1 0.06fF **FLOATING +C2806 div_pd_buffered_0/tapered_buf_2/a_210_n610# vdda1 592.97fF **FLOATING +C2807 div_pd_buffered_0/tapered_buf_2/a_160_230# vdda1 0.15fF **FLOATING +C2808 div_pd_buffered_0/tapered_buf_2/a_n10_230# vdda1 0.13fF **FLOATING +C2809 div_pd_buffered_0/tapered_buf_2/a_4670_0# vdda1 252.41fF **FLOATING +C2810 div_pd_buffered_0/tapered_buf_2/a_1650_0# vdda1 63.61fF **FLOATING +C2811 div_pd_buffered_0/tapered_buf_2/a_580_0# vdda1 16.76fF **FLOATING +C2812 div_pd_buffered_0/tapered_buf_2/a_160_n140# vdda1 4.09fF **FLOATING +C2813 divider_1/and_0/Z1 vdda1 0.74fF +C2814 divider_1/and_0/B vdda1 2.25fF +C2815 divider_1/and_0/A vdda1 2.19fF +C2816 divider_1/and_0/out1 vdda1 2.93fF +C2817 divider_1/tspc_2/Z4 vdda1 0.86fF +C2818 divider_1/Out vdda1 1.60fF +C2819 divider_1/tspc_2/Z3 vdda1 2.26fF +C2820 divider_1/tspc_2/Z2 vdda1 1.46fF +C2821 divider_1/tspc_2/Z1 vdda1 0.99fF +C2822 divider_1/nor_0/B vdda1 6.33fF +C2823 divider_1/tspc_2/a_630_n680# vdda1 1.14fF **FLOATING +C2824 divider_1/tspc_1/Z4 vdda1 0.86fF +C2825 divider_1/tspc_1/Q vdda1 3.12fF +C2826 divider_1/tspc_1/Z3 vdda1 2.26fF +C2827 divider_1/tspc_1/Z2 vdda1 1.46fF +C2828 divider_1/tspc_1/Z1 vdda1 0.99fF +C2829 divider_1/nor_1/B vdda1 7.05fF +C2830 divider_1/tspc_1/a_630_n680# vdda1 1.15fF **FLOATING +C2831 divider_1/tspc_0/Z4 vdda1 0.86fF +C2832 divider_1/tspc_0/Q vdda1 3.14fF +C2833 divider_1/tspc_0/Z3 vdda1 2.26fF +C2834 divider_1/tspc_0/Z2 vdda1 1.46fF +C2835 divider_1/tspc_0/Z1 vdda1 0.99fF +C2836 divider_1/nor_1/A vdda1 7.04fF +C2837 divider_1/tspc_0/a_630_n680# vdda1 1.15fF **FLOATING +C2838 divider_1/clk vdda1 5.63fF +C2839 divider_1/prescaler_0/nand_1/z1 vdda1 0.36fF +C2840 divider_1/prescaler_0/tspc_0/D vdda1 2.64fF +C2841 divider_1/prescaler_0/tspc_2/Q vdda1 3.74fF +C2842 divider_1/prescaler_0/tspc_1/Q vdda1 3.61fF +C2843 divider_1/prescaler_0/nand_0/z1 vdda1 0.36fF +C2844 divider_1/prescaler_0/tspc_2/D vdda1 3.12fF +C2845 divider_1/and_0/OUT vdda1 5.62fF +C2846 divider_1/prescaler_0/tspc_2/Z4 vdda1 0.86fF +C2847 divider_1/prescaler_0/tspc_2/Z3 vdda1 2.26fF +C2848 divider_1/prescaler_0/tspc_2/Z2 vdda1 1.46fF +C2849 divider_1/prescaler_0/tspc_2/Z1 vdda1 0.99fF +C2850 divider_1/prescaler_0/tspc_2/a_630_n680# vdda1 1.14fF **FLOATING +C2851 divider_1/prescaler_0/tspc_2/a_740_n680# vdda1 2.11fF **FLOATING +C2852 divider_1/prescaler_0/tspc_1/Z4 vdda1 0.86fF +C2853 divider_1/prescaler_0/tspc_1/Z3 vdda1 2.26fF +C2854 divider_1/prescaler_0/tspc_1/Z2 vdda1 1.48fF +C2855 divider_1/prescaler_0/tspc_1/Z1 vdda1 0.99fF +C2856 divider_1/prescaler_0/tspc_1/a_630_n680# vdda1 1.14fF **FLOATING +C2857 divider_1/prescaler_0/m1_2700_2190# vdda1 4.22fF **FLOATING +C2858 divider_1/prescaler_0/tspc_0/Z4 vdda1 0.86fF +C2859 divider_1/prescaler_0/Out vdda1 4.59fF +C2860 divider_1/prescaler_0/tspc_0/Z3 vdda1 2.26fF +C2861 divider_1/prescaler_0/tspc_0/Z2 vdda1 1.46fF +C2862 divider_1/prescaler_0/tspc_0/Z1 vdda1 0.99fF +C2863 divider_1/prescaler_0/tspc_0/a_630_n680# vdda1 1.16fF **FLOATING +C2864 divider_1/prescaler_0/tspc_0/a_740_n680# vdda1 2.11fF **FLOATING +C2865 divider_1/nor_1/Z1 vdda1 1.34fF +C2866 divider_1/nor_0/Z1 vdda1 1.34fF +C2867 divider_1/mc2 vdda1 5.29fF +C2868 divider_0/and_0/Z1 vdda1 0.74fF +C2869 divider_0/and_0/B vdda1 2.25fF +C2870 divider_0/and_0/A vdda1 2.19fF +C2871 divider_0/and_0/out1 vdda1 2.93fF +C2872 divider_0/tspc_2/Z4 vdda1 0.86fF +C2873 divider_0/Out vdda1 1.60fF +C2874 divider_0/tspc_2/Z3 vdda1 2.26fF +C2875 divider_0/tspc_2/Z2 vdda1 1.46fF +C2876 divider_0/tspc_2/Z1 vdda1 0.99fF +C2877 divider_0/nor_0/B vdda1 6.33fF +C2878 divider_0/tspc_2/a_630_n680# vdda1 1.14fF **FLOATING +C2879 divider_0/tspc_1/Z4 vdda1 0.86fF +C2880 divider_0/tspc_1/Q vdda1 3.12fF +C2881 divider_0/tspc_1/Z3 vdda1 2.26fF +C2882 divider_0/tspc_1/Z2 vdda1 1.46fF +C2883 divider_0/tspc_1/Z1 vdda1 0.99fF +C2884 divider_0/nor_1/B vdda1 7.05fF +C2885 divider_0/tspc_1/a_630_n680# vdda1 1.15fF **FLOATING +C2886 divider_0/tspc_0/Z4 vdda1 0.86fF +C2887 divider_0/tspc_0/Q vdda1 3.14fF +C2888 divider_0/tspc_0/Z3 vdda1 2.26fF +C2889 divider_0/tspc_0/Z2 vdda1 1.46fF +C2890 divider_0/tspc_0/Z1 vdda1 0.99fF +C2891 divider_0/nor_1/A vdda1 7.04fF +C2892 divider_0/tspc_0/a_630_n680# vdda1 1.15fF **FLOATING +C2893 divider_0/clk vdda1 5.63fF +C2894 divider_0/prescaler_0/nand_1/z1 vdda1 0.36fF +C2895 divider_0/prescaler_0/tspc_0/D vdda1 2.64fF +C2896 divider_0/prescaler_0/tspc_2/Q vdda1 3.64fF +C2897 divider_0/prescaler_0/tspc_1/Q vdda1 3.61fF +C2898 divider_0/prescaler_0/nand_0/z1 vdda1 0.36fF +C2899 divider_0/prescaler_0/tspc_2/D vdda1 3.12fF +C2900 divider_0/and_0/OUT vdda1 5.62fF +C2901 divider_0/prescaler_0/tspc_2/Z4 vdda1 0.86fF +C2902 divider_0/prescaler_0/tspc_2/Z3 vdda1 2.26fF +C2903 divider_0/prescaler_0/tspc_2/Z2 vdda1 1.46fF +C2904 divider_0/prescaler_0/tspc_2/Z1 vdda1 0.99fF +C2905 divider_0/prescaler_0/tspc_2/a_630_n680# vdda1 1.14fF **FLOATING +C2906 divider_0/prescaler_0/tspc_2/a_740_n680# vdda1 2.11fF **FLOATING +C2907 divider_0/prescaler_0/tspc_1/Z4 vdda1 0.86fF +C2908 divider_0/prescaler_0/tspc_1/Z3 vdda1 2.26fF +C2909 divider_0/prescaler_0/tspc_1/Z2 vdda1 1.48fF +C2910 divider_0/prescaler_0/tspc_1/Z1 vdda1 0.99fF +C2911 divider_0/prescaler_0/tspc_1/a_630_n680# vdda1 1.14fF **FLOATING +C2912 divider_0/prescaler_0/m1_2700_2190# vdda1 4.22fF **FLOATING +C2913 divider_0/prescaler_0/tspc_0/Z4 vdda1 0.86fF +C2914 divider_0/prescaler_0/Out vdda1 4.59fF +C2915 divider_0/prescaler_0/tspc_0/Z3 vdda1 2.26fF +C2916 divider_0/prescaler_0/tspc_0/Z2 vdda1 1.46fF +C2917 divider_0/prescaler_0/tspc_0/Z1 vdda1 0.99fF +C2918 divider_0/prescaler_0/tspc_0/a_630_n680# vdda1 1.16fF **FLOATING +C2919 divider_0/prescaler_0/tspc_0/a_740_n680# vdda1 2.11fF **FLOATING +C2920 divider_0/nor_1/Z1 vdda1 1.34fF +C2921 divider_0/nor_0/Z1 vdda1 1.34fF +C2922 divider_0/mc2 vdda1 5.29fF +C2923 ro_complete_buffered_0/tapered_buf_0/in vdda1 1.13fF +C2924 ro_complete_buffered_0/tapered_buf_0/a_n10_n140# vdda1 0.06fF **FLOATING +C2925 ro_complete_buffered_0/tapered_buf_0/a_210_n610# vdda1 619.27fF **FLOATING +C2926 ro_complete_buffered_0/tapered_buf_0/a_160_230# vdda1 0.15fF **FLOATING +C2927 ro_complete_buffered_0/tapered_buf_0/a_n10_230# vdda1 0.13fF **FLOATING +C2928 ro_complete_buffered_0/tapered_buf_0/a_4670_0# vdda1 252.41fF **FLOATING +C2929 ro_complete_buffered_0/tapered_buf_0/a_1650_0# vdda1 63.61fF **FLOATING +C2930 ro_complete_buffered_0/tapered_buf_0/a_580_0# vdda1 16.76fF **FLOATING +C2931 ro_complete_buffered_0/tapered_buf_0/a_160_n140# vdda1 4.09fF **FLOATING +C2932 ro_complete_buffered_0/tapered_buf_1/out vdda1 385.87fF +C2933 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# vdda1 0.06fF **FLOATING +C2934 ro_complete_buffered_0/tapered_buf_1/a_210_n610# vdda1 592.97fF **FLOATING +C2935 ro_complete_buffered_0/tapered_buf_1/a_160_230# vdda1 0.15fF **FLOATING +C2936 ro_complete_buffered_0/tapered_buf_1/a_n10_230# vdda1 0.13fF **FLOATING +C2937 ro_complete_buffered_0/tapered_buf_1/a_4670_0# vdda1 252.41fF **FLOATING +C2938 ro_complete_buffered_0/tapered_buf_1/a_1650_0# vdda1 63.61fF **FLOATING +C2939 ro_complete_buffered_0/tapered_buf_1/a_580_0# vdda1 16.76fF **FLOATING +C2940 ro_complete_buffered_0/tapered_buf_1/a_160_n140# vdda1 4.09fF **FLOATING +C2941 ro_complete_buffered_0/ro_complete_0/cbank_2/v vdda1 16.53fF +C2942 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin vdda1 0.78fF +C2943 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin vdda1 1.50fF +C2944 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin vdda1 1.30fF +C2945 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin vdda1 0.56fF +C2946 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin vdda1 1.14fF +C2947 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin vdda1 1.02fF +C2948 ro_complete_buffered_0/tapered_buf_1/in vdda1 26.52fF +C2949 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin vdda1 0.78fF +C2950 ro_complete_buffered_0/ro_complete_0/a0 vdda1 416.45fF +C2951 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin vdda1 1.50fF +C2952 ro_complete_buffered_0/ro_complete_0/a1 vdda1 412.13fF +C2953 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin vdda1 1.30fF +C2954 ro_complete_buffered_0/ro_complete_0/a3 vdda1 402.70fF +C2955 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin vdda1 0.56fF +C2956 ro_complete_buffered_0/ro_complete_0/a2 vdda1 407.26fF +C2957 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin vdda1 1.14fF +C2958 ro_complete_buffered_0/ro_complete_0/a4 vdda1 398.93fF +C2959 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin vdda1 1.02fF +C2960 ro_complete_buffered_0/ro_complete_0/a5 vdda1 395.79fF +C2961 ro_complete_buffered_0/ro_complete_0/cbank_0/v vdda1 15.13fF +C2962 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin vdda1 0.78fF +C2963 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin vdda1 1.50fF +C2964 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin vdda1 1.30fF +C2965 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin vdda1 0.56fF +C2966 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin vdda1 1.14fF +C2967 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin vdda1 1.02fF +C2968 ro_complete_buffered_0/tapered_buf_7/in vdda1 1.13fF +C2969 ro_complete_buffered_0/tapered_buf_7/a_n10_n140# vdda1 0.06fF **FLOATING +C2970 ro_complete_buffered_0/tapered_buf_7/a_210_n610# vdda1 592.97fF **FLOATING +C2971 ro_complete_buffered_0/tapered_buf_7/a_160_230# vdda1 0.15fF **FLOATING +C2972 ro_complete_buffered_0/tapered_buf_7/a_n10_230# vdda1 0.13fF **FLOATING +C2973 ro_complete_buffered_0/tapered_buf_7/a_4670_0# vdda1 252.41fF **FLOATING +C2974 ro_complete_buffered_0/tapered_buf_7/a_1650_0# vdda1 63.61fF **FLOATING +C2975 ro_complete_buffered_0/tapered_buf_7/a_580_0# vdda1 16.76fF **FLOATING +C2976 ro_complete_buffered_0/tapered_buf_7/a_160_n140# vdda1 4.09fF **FLOATING +C2977 ro_complete_buffered_0/tapered_buf_6/in vdda1 1.13fF +C2978 ro_complete_buffered_0/tapered_buf_6/a_n10_n140# vdda1 0.06fF **FLOATING +C2979 ro_complete_buffered_0/tapered_buf_6/a_210_n610# vdda1 592.97fF **FLOATING +C2980 ro_complete_buffered_0/tapered_buf_6/a_160_230# vdda1 0.15fF **FLOATING +C2981 ro_complete_buffered_0/tapered_buf_6/a_n10_230# vdda1 0.13fF **FLOATING +C2982 ro_complete_buffered_0/tapered_buf_6/a_4670_0# vdda1 252.41fF **FLOATING +C2983 ro_complete_buffered_0/tapered_buf_6/a_1650_0# vdda1 63.61fF **FLOATING +C2984 ro_complete_buffered_0/tapered_buf_6/a_580_0# vdda1 16.76fF **FLOATING +C2985 ro_complete_buffered_0/tapered_buf_6/a_160_n140# vdda1 4.09fF **FLOATING +C2986 ro_complete_buffered_0/tapered_buf_5/in vdda1 1.13fF +C2987 ro_complete_buffered_0/tapered_buf_5/a_n10_n140# vdda1 0.06fF **FLOATING +C2988 ro_complete_buffered_0/tapered_buf_5/a_210_n610# vdda1 592.97fF **FLOATING +C2989 ro_complete_buffered_0/tapered_buf_5/a_160_230# vdda1 0.15fF **FLOATING +C2990 ro_complete_buffered_0/tapered_buf_5/a_n10_230# vdda1 0.13fF **FLOATING +C2991 ro_complete_buffered_0/tapered_buf_5/a_4670_0# vdda1 252.41fF **FLOATING +C2992 ro_complete_buffered_0/tapered_buf_5/a_1650_0# vdda1 63.61fF **FLOATING +C2993 ro_complete_buffered_0/tapered_buf_5/a_580_0# vdda1 16.76fF **FLOATING +C2994 ro_complete_buffered_0/tapered_buf_5/a_160_n140# vdda1 4.09fF **FLOATING +C2995 ro_complete_buffered_0/tapered_buf_4/in vdda1 1.13fF +C2996 ro_complete_buffered_0/tapered_buf_4/a_n10_n140# vdda1 0.06fF **FLOATING +C2997 ro_complete_buffered_0/tapered_buf_4/a_210_n610# vdda1 592.97fF **FLOATING +C2998 ro_complete_buffered_0/tapered_buf_4/a_160_230# vdda1 0.15fF **FLOATING +C2999 ro_complete_buffered_0/tapered_buf_4/a_n10_230# vdda1 0.13fF **FLOATING +C3000 ro_complete_buffered_0/tapered_buf_4/a_4670_0# vdda1 252.41fF **FLOATING +C3001 ro_complete_buffered_0/tapered_buf_4/a_1650_0# vdda1 63.61fF **FLOATING +C3002 ro_complete_buffered_0/tapered_buf_4/a_580_0# vdda1 16.76fF **FLOATING +C3003 ro_complete_buffered_0/tapered_buf_4/a_160_n140# vdda1 4.09fF **FLOATING +C3004 ro_complete_buffered_0/tapered_buf_3/in vdda1 1.13fF +C3005 ro_complete_buffered_0/tapered_buf_3/a_n10_n140# vdda1 0.06fF **FLOATING +C3006 ro_complete_buffered_0/tapered_buf_3/a_210_n610# vdda1 592.97fF **FLOATING +C3007 ro_complete_buffered_0/tapered_buf_3/a_160_230# vdda1 0.15fF **FLOATING +C3008 ro_complete_buffered_0/tapered_buf_3/a_n10_230# vdda1 0.13fF **FLOATING +C3009 ro_complete_buffered_0/tapered_buf_3/a_4670_0# vdda1 252.41fF **FLOATING +C3010 ro_complete_buffered_0/tapered_buf_3/a_1650_0# vdda1 63.61fF **FLOATING +C3011 ro_complete_buffered_0/tapered_buf_3/a_580_0# vdda1 16.76fF **FLOATING +C3012 ro_complete_buffered_0/tapered_buf_3/a_160_n140# vdda1 4.09fF **FLOATING +C3013 ro_complete_buffered_0/tapered_buf_2/in vdda1 1.13fF +C3014 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# vdda1 0.06fF **FLOATING +C3015 ro_complete_buffered_0/tapered_buf_2/a_210_n610# vdda1 592.97fF **FLOATING +C3016 ro_complete_buffered_0/tapered_buf_2/a_160_230# vdda1 0.15fF **FLOATING +C3017 ro_complete_buffered_0/tapered_buf_2/a_n10_230# vdda1 0.13fF **FLOATING +C3018 ro_complete_buffered_0/tapered_buf_2/a_4670_0# vdda1 252.41fF **FLOATING +C3019 ro_complete_buffered_0/tapered_buf_2/a_1650_0# vdda1 63.61fF **FLOATING +C3020 ro_complete_buffered_0/tapered_buf_2/a_580_0# vdda1 16.76fF **FLOATING +C3021 ro_complete_buffered_0/tapered_buf_2/a_160_n140# vdda1 4.09fF **FLOATING +C3022 ro_complete_0/cbank_2/v vdda1 16.43fF +C3023 ro_complete_0/cbank_2/switch_5/vin vdda1 0.78fF +C3024 ro_complete_0/cbank_2/switch_4/vin vdda1 1.50fF +C3025 ro_complete_0/cbank_2/switch_2/vin vdda1 1.30fF +C3026 ro_complete_0/cbank_2/switch_3/vin vdda1 0.56fF +C3027 ro_complete_0/cbank_2/switch_1/vin vdda1 1.14fF +C3028 ro_complete_0/cbank_2/switch_0/vin vdda1 1.02fF +C3029 ro_complete_0/cbank_1/v vdda1 16.43fF +C3030 ro_complete_0/cbank_1/switch_5/vin vdda1 0.78fF +C3031 ro_complete_0/a0 vdda1 5.35fF +C3032 ro_complete_0/cbank_1/switch_4/vin vdda1 1.50fF +C3033 ro_complete_0/a1 vdda1 6.54fF +C3034 ro_complete_0/cbank_1/switch_2/vin vdda1 1.30fF +C3035 ro_complete_0/a3 vdda1 5.96fF +C3036 ro_complete_0/cbank_1/switch_3/vin vdda1 0.56fF +C3037 ro_complete_0/a2 vdda1 5.21fF +C3038 ro_complete_0/cbank_1/switch_1/vin vdda1 1.14fF +C3039 ro_complete_0/a4 vdda1 5.81fF +C3040 ro_complete_0/cbank_1/switch_0/vin vdda1 1.02fF +C3041 ro_complete_0/a5 vdda1 6.74fF +C3042 ro_complete_0/cbank_0/v vdda1 15.12fF +C3043 ro_complete_0/cbank_0/switch_5/vin vdda1 0.78fF +C3044 ro_complete_0/cbank_0/switch_4/vin vdda1 1.50fF +C3045 ro_complete_0/cbank_0/switch_2/vin vdda1 1.30fF +C3046 ro_complete_0/cbank_0/switch_3/vin vdda1 0.56fF +C3047 ro_complete_0/cbank_0/switch_1/vin vdda1 1.14fF +C3048 ro_complete_0/cbank_0/switch_0/vin vdda1 1.02fF +C3049 filter_0/v vdda1 110.47fF +C3050 filter_0/a_4216_n5230# vdda1 418.47fF **FLOATING +C3051 filter_0/a_4216_n2998# vdda1 1.03fF **FLOATING +C3052 cp_buffered_0/cp_0/down vdda1 397.14fF +C3053 cp_buffered_0/tapered_buf_0/in vdda1 1.13fF +C3054 cp_buffered_0/tapered_buf_0/a_n10_n140# vdda1 0.06fF **FLOATING +C3055 cp_buffered_0/tapered_buf_0/a_210_n610# vdda1 592.97fF **FLOATING +C3056 cp_buffered_0/tapered_buf_0/a_160_230# vdda1 0.15fF **FLOATING +C3057 cp_buffered_0/tapered_buf_0/a_n10_230# vdda1 0.13fF **FLOATING +C3058 cp_buffered_0/tapered_buf_0/a_4670_0# vdda1 252.41fF **FLOATING +C3059 cp_buffered_0/tapered_buf_0/a_1650_0# vdda1 63.61fF **FLOATING +C3060 cp_buffered_0/tapered_buf_0/a_580_0# vdda1 16.76fF **FLOATING +C3061 cp_buffered_0/tapered_buf_0/a_160_n140# vdda1 4.09fF **FLOATING +C3062 cp_buffered_0/cp_0/out vdda1 397.36fF +C3063 cp_buffered_0/tapered_buf_1/in vdda1 1.13fF +C3064 cp_buffered_0/tapered_buf_1/a_n10_n140# vdda1 0.06fF **FLOATING +C3065 cp_buffered_0/tapered_buf_1/a_210_n610# vdda1 592.97fF **FLOATING +C3066 cp_buffered_0/tapered_buf_1/a_160_230# vdda1 0.15fF **FLOATING +C3067 cp_buffered_0/tapered_buf_1/a_n10_230# vdda1 0.13fF **FLOATING +C3068 cp_buffered_0/tapered_buf_1/a_4670_0# vdda1 252.41fF **FLOATING +C3069 cp_buffered_0/tapered_buf_1/a_1650_0# vdda1 63.61fF **FLOATING +C3070 cp_buffered_0/tapered_buf_1/a_580_0# vdda1 16.76fF **FLOATING +C3071 cp_buffered_0/tapered_buf_1/a_160_n140# vdda1 4.09fF **FLOATING +C3072 cp_buffered_0/cp_0/upbar vdda1 393.41fF +C3073 cp_buffered_0/cp_0/a_7110_n2840# vdda1 0.17fF **FLOATING +C3074 cp_buffered_0/cp_0/a_3060_n2840# vdda1 1.71fF **FLOATING +C3075 cp_buffered_0/cp_0/a_7110_0# vdda1 0.17fF **FLOATING +C3076 cp_buffered_0/cp_0/a_6370_0# vdda1 0.40fF **FLOATING +C3077 cp_buffered_0/cp_0/a_3060_0# vdda1 1.65fF **FLOATING +C3078 cp_buffered_0/cp_0/a_1710_0# vdda1 5.76fF **FLOATING +C3079 cp_buffered_0/cp_0/a_1710_n2840# vdda1 5.24fF **FLOATING +C3080 cp_buffered_0/cp_0/a_10_n50# vdda1 3.19fF **FLOATING +C3081 cp_buffered_0/tapered_buf_2/in vdda1 1.13fF +C3082 cp_buffered_0/tapered_buf_2/a_n10_n140# vdda1 0.06fF **FLOATING +C3083 cp_buffered_0/tapered_buf_2/a_210_n610# vdda1 592.97fF **FLOATING +C3084 cp_buffered_0/tapered_buf_2/a_160_230# vdda1 0.15fF **FLOATING +C3085 cp_buffered_0/tapered_buf_2/a_n10_230# vdda1 0.13fF **FLOATING +C3086 cp_buffered_0/tapered_buf_2/a_4670_0# vdda1 252.41fF **FLOATING +C3087 cp_buffered_0/tapered_buf_2/a_1650_0# vdda1 63.61fF **FLOATING +C3088 cp_buffered_0/tapered_buf_2/a_580_0# vdda1 16.76fF **FLOATING +C3089 cp_buffered_0/tapered_buf_2/a_160_n140# vdda1 4.09fF **FLOATING .ends