fix
diff --git a/gds/user_analog_project_wrapper.gds b/gds/user_analog_project_wrapper.gds deleted file mode 100644 index 6c84db6..0000000 --- a/gds/user_analog_project_wrapper.gds +++ /dev/null Binary files differ
diff --git a/gds/user_analog_project_wrapper.gds.gz b/gds/user_analog_project_wrapper.gds.gz new file mode 100644 index 0000000..ff65c1c --- /dev/null +++ b/gds/user_analog_project_wrapper.gds.gz Binary files differ
diff --git a/mag/user_analog_project_wrapper.mag b/mag/user_analog_project_wrapper.mag index c6f025f..7531757 100644 --- a/mag/user_analog_project_wrapper.mag +++ b/mag/user_analog_project_wrapper.mag
@@ -1,6 +1,6 @@ magic tech sky130A -timestamp 1647284393 +timestamp 1647316183 << nwell >> rect 26424 264625 26589 264812 rect 23497 264291 23832 264611 @@ -517,38 +517,6 @@ rect 194437 294771 194556 295953 rect 195680 294771 195802 295953 rect 194437 294668 195802 294771 -rect 229162 295959 230527 296069 -rect 229162 294777 229281 295959 -rect 230405 294777 230527 295959 -rect 229162 294674 230527 294777 -rect 236120 295960 237485 296070 -rect 236120 294778 236239 295960 -rect 237363 294778 237485 295960 -rect 236120 294675 237485 294778 -rect 243037 295958 244402 296068 -rect 243037 294776 243156 295958 -rect 244280 294776 244402 295958 -rect 243037 294673 244402 294776 -rect 250002 295959 251367 296069 -rect 250002 294777 250121 295959 -rect 251245 294777 251367 295959 -rect 250002 294674 251367 294777 -rect 256960 295960 258325 296070 -rect 256960 294778 257079 295960 -rect 258203 294778 258325 295960 -rect 256960 294675 258325 294778 -rect 264100 295960 265465 296070 -rect 264100 294778 264219 295960 -rect 265343 294778 265465 295960 -rect 264100 294675 265465 294778 -rect 271058 295961 272423 296071 -rect 271058 294779 271177 295961 -rect 272301 294779 272423 295961 -rect 271058 294676 272423 294779 -rect 278194 295951 279559 296061 -rect 278194 294769 278313 295951 -rect 279437 294769 279559 295951 -rect 278194 294666 279559 294769 rect 20690 288832 22055 288942 rect 20690 287650 20809 288832 rect 21933 287650 22055 288832 @@ -605,38 +573,6 @@ rect 194163 287641 194282 288823 rect 195406 287641 195528 288823 rect 194163 287538 195528 287641 -rect 228888 288829 230253 288939 -rect 228888 287647 229007 288829 -rect 230131 287647 230253 288829 -rect 228888 287544 230253 287647 -rect 235846 288830 237211 288940 -rect 235846 287648 235965 288830 -rect 237089 287648 237211 288830 -rect 235846 287545 237211 287648 -rect 242763 288828 244128 288938 -rect 242763 287646 242882 288828 -rect 244006 287646 244128 288828 -rect 242763 287543 244128 287646 -rect 249728 288829 251093 288939 -rect 249728 287647 249847 288829 -rect 250971 287647 251093 288829 -rect 249728 287544 251093 287647 -rect 256686 288830 258051 288940 -rect 256686 287648 256805 288830 -rect 257929 287648 258051 288830 -rect 256686 287545 258051 287648 -rect 263826 288830 265191 288940 -rect 263826 287648 263945 288830 -rect 265069 287648 265191 288830 -rect 263826 287545 265191 287648 -rect 270784 288831 272149 288941 -rect 270784 287649 270903 288831 -rect 272027 287649 272149 288831 -rect 270784 287546 272149 287649 -rect 277920 288821 279285 288931 -rect 277920 287639 278039 288821 -rect 279163 287639 279285 288821 -rect 277920 287536 279285 287639 rect 20798 282419 22163 282529 rect 20798 281237 20917 282419 rect 22041 281237 22163 282419 @@ -693,38 +629,6 @@ rect 194271 281228 194390 282410 rect 195514 281228 195636 282410 rect 194271 281125 195636 281228 -rect 228996 282416 230361 282526 -rect 228996 281234 229115 282416 -rect 230239 281234 230361 282416 -rect 228996 281131 230361 281234 -rect 235954 282417 237319 282527 -rect 235954 281235 236073 282417 -rect 237197 281235 237319 282417 -rect 235954 281132 237319 281235 -rect 242871 282415 244236 282525 -rect 242871 281233 242990 282415 -rect 244114 281233 244236 282415 -rect 242871 281130 244236 281233 -rect 249836 282416 251201 282526 -rect 249836 281234 249955 282416 -rect 251079 281234 251201 282416 -rect 249836 281131 251201 281234 -rect 256794 282417 258159 282527 -rect 256794 281235 256913 282417 -rect 258037 281235 258159 282417 -rect 256794 281132 258159 281235 -rect 263934 282417 265299 282527 -rect 263934 281235 264053 282417 -rect 265177 281235 265299 282417 -rect 263934 281132 265299 281235 -rect 270892 282418 272257 282528 -rect 270892 281236 271011 282418 -rect 272135 281236 272257 282418 -rect 270892 281133 272257 281236 -rect 278028 282408 279393 282518 -rect 278028 281226 278147 282408 -rect 279271 281226 279393 282408 -rect 278028 281123 279393 281226 rect 69656 273562 71021 273672 rect 69656 272380 69775 273562 rect 70899 272380 71021 273562 @@ -3647,14 +3551,6 @@ rect 166870 294775 167994 295957 rect 187598 294770 188722 295952 rect 194556 294771 195680 295953 -rect 229281 294777 230405 295959 -rect 236239 294778 237363 295960 -rect 243156 294776 244280 295958 -rect 250121 294777 251245 295959 -rect 257079 294778 258203 295960 -rect 264219 294778 265343 295960 -rect 271177 294779 272301 295961 -rect 278313 294769 279437 295951 rect 20809 287650 21933 288832 rect 27767 287651 28891 288833 rect 34687 287650 35811 288832 @@ -3669,14 +3565,6 @@ rect 166596 287645 167720 288827 rect 187324 287640 188448 288822 rect 194282 287641 195406 288823 -rect 229007 287647 230131 288829 -rect 235965 287648 237089 288830 -rect 242882 287646 244006 288828 -rect 249847 287647 250971 288829 -rect 256805 287648 257929 288830 -rect 263945 287648 265069 288830 -rect 270903 287649 272027 288831 -rect 278039 287639 279163 288821 rect 20917 281237 22041 282419 rect 27875 281238 28999 282420 rect 34795 281237 35919 282419 @@ -3691,14 +3579,6 @@ rect 166704 281232 167828 282414 rect 187432 281227 188556 282409 rect 194390 281228 195514 282410 -rect 229115 281234 230239 282416 -rect 236073 281235 237197 282417 -rect 242990 281233 244114 282415 -rect 249955 281234 251079 282416 -rect 256913 281235 258037 282417 -rect 264053 281235 265177 282417 -rect 271011 281236 272135 282418 -rect 278147 281226 279271 282408 rect 69775 272380 70899 273562 rect 76692 272378 77816 273560 rect 83657 272379 84781 273561 @@ -4893,8 +4773,6 @@ rect 100734 296452 102633 296667 rect 141483 296452 143382 296736 rect 190057 296452 191956 296770 -rect 232340 296452 234239 297099 -rect 267192 296452 269091 297099 rect 17997 295963 36598 296452 rect 17997 295962 28041 295963 rect 17997 294780 21083 295962 @@ -4943,37 +4821,11 @@ rect 195680 294771 197760 295953 rect 188722 294770 197760 294771 rect 183225 294345 197760 294770 -rect 225938 296414 279970 296452 -rect 225938 295961 281013 296414 -rect 225938 295960 271177 295961 -rect 225938 295959 236239 295960 -rect 225938 294777 229281 295959 -rect 230405 294778 236239 295959 -rect 237363 295959 257079 295960 -rect 237363 295958 250121 295959 -rect 237363 294778 243156 295958 -rect 230405 294777 243156 294778 -rect 225938 294776 243156 294777 -rect 244280 294777 250121 295958 -rect 251245 294778 257079 295959 -rect 258203 294778 264219 295960 -rect 265343 294779 271177 295960 -rect 272301 295951 281013 295961 -rect 272301 294779 278313 295951 -rect 265343 294778 278313 294779 -rect 251245 294777 278313 294778 -rect 244280 294776 278313 294777 -rect 225938 294769 278313 294776 -rect 279437 294769 281013 295951 -rect 225938 294364 281013 294769 -rect 225938 294345 279970 294364 rect 31012 289322 32911 294345 rect 58858 289322 60757 294345 rect 100734 289322 102633 294345 rect 141483 289322 143382 294345 rect 190057 289322 191956 294345 -rect 232340 289322 234239 294345 -rect 267192 289322 269091 294345 rect 17997 288833 36598 289322 rect 17997 288832 27767 288833 rect 17997 287650 20809 288832 @@ -5022,37 +4874,11 @@ rect 195406 287641 197760 288823 rect 188448 287640 197760 287641 rect 183225 287215 197760 287640 -rect 225938 289284 279696 289322 -rect 225938 288831 280739 289284 -rect 225938 288830 270903 288831 -rect 225938 288829 235965 288830 -rect 225938 287647 229007 288829 -rect 230131 287648 235965 288829 -rect 237089 288829 256805 288830 -rect 237089 288828 249847 288829 -rect 237089 287648 242882 288828 -rect 230131 287647 242882 287648 -rect 225938 287646 242882 287647 -rect 244006 287647 249847 288828 -rect 250971 287648 256805 288829 -rect 257929 287648 263945 288830 -rect 265069 287649 270903 288830 -rect 272027 288821 280739 288831 -rect 272027 287649 278039 288821 -rect 265069 287648 278039 287649 -rect 250971 287647 278039 287648 -rect 244006 287646 278039 287647 -rect 225938 287639 278039 287646 -rect 279163 287639 280739 288821 -rect 225938 287234 280739 287639 -rect 225938 287215 279696 287234 rect 31012 282909 32911 287215 rect 58858 282909 60757 287215 rect 100734 282909 102633 287215 rect 141483 282909 143382 287215 rect 190057 282909 191956 287215 -rect 232340 282909 234239 287215 -rect 267192 282909 269091 287215 rect 17997 282420 36598 282909 rect 17997 282419 27875 282420 rect 17997 281237 20917 282419 @@ -5101,37 +4927,11 @@ rect 195514 281228 197760 282410 rect 188556 281227 197760 281228 rect 183225 280802 197760 281227 -rect 225938 282871 279804 282909 -rect 225938 282418 280847 282871 -rect 225938 282417 271011 282418 -rect 225938 282416 236073 282417 -rect 225938 281234 229115 282416 -rect 230239 281235 236073 282416 -rect 237197 282416 256913 282417 -rect 237197 282415 249955 282416 -rect 237197 281235 242990 282415 -rect 230239 281234 242990 281235 -rect 225938 281233 242990 281234 -rect 244114 281234 249955 282415 -rect 251079 281235 256913 282416 -rect 258037 281235 264053 282417 -rect 265177 281236 271011 282417 -rect 272135 282408 280847 282418 -rect 272135 281236 278147 282408 -rect 265177 281235 278147 281236 -rect 251079 281234 278147 281235 -rect 244114 281233 278147 281234 -rect 225938 281226 278147 281233 -rect 279271 281226 280847 282408 -rect 225938 280821 280847 281226 -rect 225938 280802 279804 280821 rect 30688 280739 32778 280802 rect 58459 280781 60549 280802 rect 100327 274044 102704 280802 rect 141089 274044 143466 280802 rect 189461 274691 191838 280802 -rect 231966 280229 234056 280802 -rect 267079 280229 269169 280802 rect 189461 274044 192007 274691 rect 66323 273562 226094 274044 rect 66323 272380 69775 273562 @@ -7190,9 +6990,6 @@ rect 58830 71323 60994 71584 rect 100767 71323 102870 71584 rect 141638 71323 143728 80396 -rect 189973 72329 192063 79208 -rect 232337 72329 234427 79208 -rect 267450 72329 269540 79208 rect 18234 70841 176227 71323 rect 18234 70840 69795 70841 rect 18234 70839 62837 70840 @@ -7553,7 +7350,6 @@ rect 167638 31038 176227 31039 rect 160673 31037 176227 31038 rect 135410 30608 176227 31037 -rect 100312 23989 102598 29372 rect 141218 23755 143504 30608 rect 155305 21815 176227 22159 rect 155305 21663 164657 21815 @@ -10361,18 +10157,17 @@ rect 166176 80802 166665 81977 rect 164365 80650 166665 80802 rect 164363 75873 166716 80650 -rect 7143 75852 197821 75873 -rect 226525 75852 239480 75873 -rect 7143 75823 263256 75852 -rect 7143 75789 279373 75823 +rect 7143 75802 189636 75873 +rect 272179 75802 279373 75823 +rect 7143 75789 279373 75802 rect 7143 75451 283186 75789 rect 7143 73748 281123 75451 rect 282980 73748 283186 75451 rect 7143 73413 283186 73748 -rect 7143 73379 263256 73413 +rect 7143 73379 274546 73413 rect 278502 73408 283186 73413 rect 164363 71584 166716 73379 -rect 195253 73151 263256 73379 +rect 187580 73310 274546 73379 rect 164231 70727 166716 71584 rect 164231 69552 164892 70727 rect 166158 69552 166716 70727 @@ -10448,7 +10243,10 @@ rect 39396 28000 40707 29869 rect 46028 28000 48233 28003 rect 164365 28000 166665 30313 -rect 11000 26000 176227 28000 +rect 11000 27979 99535 28000 +rect 104181 27979 176227 28000 +rect 11000 26000 176227 27979 +rect 95970 25823 107673 26000 rect 164365 22332 166665 26000 rect 163820 21815 166993 22332 rect 163820 20640 164657 21815
diff --git a/netgen/user_analog_project_wrapper.spice b/netgen/user_analog_project_wrapper.spice index 9a0f52b..ebccc94 100644 --- a/netgen/user_analog_project_wrapper.spice +++ b/netgen/user_analog_project_wrapper.spice
@@ -106,2045 +106,2045 @@ + wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6] + wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3] + wbs_stb_i wbs_we_i -C0 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar1 0.30fF -C1 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.05fF -C2 divbuf_2/IN divbuf_2/a_492_n240# 0.13fF -C3 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/clk 0.06fF -C4 pll_full_1/pd_0/UP pll_full_1/pd_0/tspc_r_1/z5 0.03fF -C5 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z2 0.14fF -C6 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF -C7 divbuf_19/IN divbuf_19/OUT5 0.00fF -C8 divbuf_17/OUT4 divbuf_17/OUT3 5.16fF -C9 divider_1/prescaler_0/Out divider_1/tspc_2/Z2 0.11fF -C10 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/clk 0.01fF -C11 divbuf_22/OUT2 divbuf_22/OUT3 1.37fF -C12 pd_0/DIV pd_0/tspc_r_0/Z3 0.65fF -C13 divider_2/mc2 divider_2/nor_1/B 0.15fF -C14 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/prescaler_0/Out 0.15fF -C15 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z4 0.20fF -C16 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF -C17 divider_0/tspc_0/Z2 divider_0/tspc_1/Q 0.14fF -C18 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF -C19 divbuf_16/a_492_n240# divbuf_16/OUT2 0.42fF -C20 divider_0/tspc_1/Z2 divider_0/nor_0/A 0.15fF -C21 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/D 0.32fF -C22 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF -C23 divbuf_4/OUT divbuf_4/OUT5 43.38fF -C24 io_clamp_low[2] io_analog[6] 0.53fF -C25 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF -C26 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C27 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF -C28 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z2 1.07fF -C29 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z4 0.12fF -C30 divbuf_21/a_492_n240# divbuf_21/OUT2 0.42fF -C31 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.31fF -C32 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/nor_0/A 0.55fF -C33 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF -C34 divbuf_18/OUT2 divbuf_18/OUT3 1.37fF -C35 divider_2/nor_1/Z1 divider_2/nor_0/B 0.18fF -C36 divider_2/prescaler_0/Out divider_2/tspc_2/a_630_n680# 0.01fF -C37 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_2/Q 0.19fF -C38 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/clk 0.01fF -C39 divbuf_8/OUT5 divbuf_8/OUT 43.38fF -C40 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z2 0.71fF -C41 pd_1/DIV pd_1/R 0.51fF -C42 pd_0/DOWN pd_0/tspc_r_1/Qbar 0.02fF -C43 pd_0/R pd_0/tspc_r_1/Qbar1 0.30fF -C44 divider_2/nor_1/B divider_2/nor_0/B 0.47fF -C45 divider_2/tspc_0/Z2 divider_2/tspc_0/Z1 1.07fF -C46 divider_2/tspc_2/Z3 divider_2/tspc_2/Z4 0.65fF -C47 divbuf_24/a_492_n240# divbuf_24/OUT 0.00fF -C48 divbuf_3/OUT ro_complete_0/cbank_2/switch_1/vin 0.13fF -C49 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF -C50 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/Z3 0.33fF -C51 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF -C52 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z4 0.12fF -C53 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.15fF -C54 divbuf_16/a_492_n240# divbuf_16/IN 0.13fF -C55 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF -C56 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C57 divider_1/nor_0/B divider_1/tspc_2/Q 0.22fF -C58 divider_1/tspc_0/a_630_n680# divider_1/nor_1/B 0.35fF -C59 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z4 0.08fF -C60 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z3 0.05fF -C61 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Q 0.51fF -C62 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z4 0.36fF -C63 filter_0/v divbuf_25/OUT2 0.06fF -C64 divbuf_7/IN divbuf_7/OUT5 0.00fF -C65 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/clk 0.06fF -C66 divider_1/tspc_2/a_630_n680# divider_1/nor_0/A 0.35fF -C67 divider_1/prescaler_0/tspc_0/D divider_1/clk 0.29fF -C68 pll_full_1/divider_0/and_0/B pll_full_1/divider_0/nor_0/Z1 0.18fF -C69 divbuf_23/a_492_n240# divbuf_23/IN 0.13fF -C70 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.13fF -C71 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C72 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF -C73 divbuf_15/OUT4 divbuf_15/OUT 1.11fF -C74 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.00fF -C75 divbuf_4/OUT ro_complete_0/cbank_2/v 0.05fF -C76 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF -C77 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z2 0.01fF -C78 divider_0/tspc_2/Q divider_0/tspc_1/Z3 0.45fF -C79 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF -C80 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF -C81 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF -C82 divider_2/tspc_0/Z4 divider_2/tspc_0/Z2 0.36fF -C83 divider_2/Out divider_2/tspc_0/Z3 0.05fF -C84 divbuf_16/a_492_n240# divbuf_16/OUT5 0.01fF -C85 ro_complete_1/a0 ro_complete_1/cbank_2/switch_4/vin 0.13fF -C86 ro_complete_1/cbank_0/v ro_complete_1/cbank_1/v 1.27fF -C87 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_1/a_630_n680# 0.04fF -C88 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/tspc_0/Z4 0.65fF -C89 divider_1/tspc_1/a_630_n680# divider_1/nor_1/B 0.00fF -C90 divider_1/prescaler_0/tspc_1/Z2 divider_1/and_0/OUT 0.06fF -C91 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z3 0.33fF -C92 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Q 0.38fF -C93 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/D 0.11fF -C94 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF -C95 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF -C96 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/A 0.01fF -C97 divbuf_18/IN divbuf_18/OUT5 0.00fF -C98 divider_2/tspc_1/a_630_n680# divider_2/nor_1/B 0.00fF -C99 divider_1/and_0/out1 divider_1/and_0/A 0.01fF -C100 divbuf_9/OUT2 divbuf_9/OUT3 1.37fF -C101 cp_0/a_10_n50# cp_0/a_1710_0# 0.04fF -C102 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/v 0.05fF -C103 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF -C104 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.06fF -C105 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF -C106 divider_1/tspc_0/Z2 divider_1/tspc_0/a_630_n680# 0.01fF -C107 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z4 0.00fF -C108 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/Z3 0.65fF -C109 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_1/Q 0.21fF -C110 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/clk 0.01fF -C111 divider_1/nor_0/B divider_1/and_0/A 0.26fF -C112 divbuf_20/OUT3 divbuf_20/OUT4 5.16fF -C113 divbuf_20/OUT2 divbuf_20/OUT5 0.02fF -C114 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/nor_0/A 0.01fF -C115 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z4 0.12fF -C116 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF -C117 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF -C118 divbuf_8/a_492_n240# divbuf_8/OUT2 0.42fF -C119 pd_0/DOWN pd_0/tspc_r_0/z5 0.03fF -C120 pd_0/tspc_r_0/Z2 pd_0/R 0.21fF -C121 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF -C122 divbuf_13/OUT5 divbuf_13/OUT 43.38fF -C123 pd_1/tspc_r_1/Z4 pd_1/tspc_r_1/z5 0.04fF -C124 ro_complete_0/cbank_1/switch_1/vin divbuf_3/OUT 0.14fF -C125 pll_full_1/ro_complete_0/cbank_2/switch_2/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF -C126 ro_complete_0/cbank_2/switch_3/vin divbuf_6/OUT 0.14fF -C127 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z1 0.08fF -C128 divider_0/mc2 divider_0/nor_1/B 0.15fF -C129 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/cbank_0/v 1.30fF -C130 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF -C131 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C132 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/a_630_n680# 0.12fF -C133 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z3 0.06fF -C134 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF -C135 divider_1/nor_1/B divider_1/and_0/B 0.29fF -C136 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_0/Qbar1 0.01fF -C137 divbuf_12/IN divbuf_12/OUT5 0.00fF -C138 pd_0/DOWN pd_0/and_pd_0/Z1 0.07fF -C139 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF -C140 filter_0/a_4216_n5230# filter_0/v 0.91fF -C141 ro_complete_0/cbank_1/switch_4/vin divbuf_7/OUT 0.13fF -C142 divbuf_2/OUT ro_complete_0/cbank_2/switch_0/vin 0.09fF -C143 divider_0/nor_0/B divider_0/tspc_1/Z4 0.21fF -C144 divider_0/tspc_0/Z3 divider_0/nor_1/B 0.38fF -C145 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/divider_0/prescaler_0/nand_0/z1 0.24fF -C146 divbuf_1/OUT divbuf_1/OUT3 0.26fF -C147 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT4 5.16fF -C148 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C149 divider_0/nor_0/A divider_0/and_0/B 0.08fF -C150 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/nor_1/B 0.22fF -C151 divider_1/tspc_1/Z1 divider_1/tspc_1/Z2 1.07fF -C152 divider_1/nor_0/B divider_1/tspc_1/Z3 0.38fF -C153 divider_1/tspc_1/Q divider_1/nor_1/B 0.22fF -C154 divbuf_6/OUT3 divbuf_6/OUT5 0.01fF -C155 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF -C156 divbuf_18/OUT2 divbuf_18/OUT5 0.02fF -C157 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z1 0.03fF -C158 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF -C159 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/Z3 0.20fF -C160 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.09fF -C161 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/DOWN 0.03fF -C162 divbuf_19/OUT5 divbuf_19/OUT3 0.01fF -C163 divider_2/nor_0/B divider_2/tspc_2/a_630_n680# 0.01fF -C164 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/D 0.03fF -C165 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.19fF -C166 pll_full_1/ro_complete_0/a5 pll_full_1/divider_0/clk 0.15fF -C167 divbuf_6/OUT ro_complete_0/cbank_2/v 0.05fF -C168 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Q 0.20fF -C169 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF -C170 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF -C171 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/divider_0/clk 0.26fF -C172 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/tspc_r_1/Z4 0.14fF -C173 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C174 divider_2/tspc_0/Z4 divider_2/nor_0/B 0.02fF -C175 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/a_630_n680# 0.01fF -C176 divbuf_19/OUT2 divbuf_19/OUT 0.06fF -C177 divider_1/prescaler_0/tspc_2/Z2 divider_1/and_0/OUT 0.05fF -C178 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z3 0.05fF -C179 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Qbar1 0.38fF -C180 divider_2/tspc_0/Z2 divider_2/tspc_0/Z3 0.16fF -C181 divbuf_22/OUT3 divbuf_22/OUT4 5.16fF -C182 divbuf_22/OUT2 divbuf_22/OUT5 0.02fF -C183 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/Out 0.11fF -C184 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF -C185 divbuf_13/a_492_n240# divbuf_13/OUT2 0.42fF -C186 pd_1/REF pd_1/tspc_r_1/Z4 0.02fF -C187 pd_1/UP pd_1/tspc_r_1/Qbar 0.21fF -C188 pll_full_1/pd_0/DIV pll_full_1/divider_0/clk 2.26fF -C189 pll_full_1/ro_complete_0/a1 pll_full_1/ro_complete_0/cbank_2/v 0.05fF -C190 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/R 0.27fF -C191 divider_2/prescaler_0/tspc_1/Q divider_2/nor_0/A 0.03fF -C192 divider_0/tspc_0/Z2 divider_0/tspc_0/Z3 0.16fF -C193 divider_0/tspc_0/a_630_n680# divider_0/tspc_1/Q 0.01fF -C194 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF -C195 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/Out 0.05fF -C196 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF -C197 divbuf_5/OUT divbuf_5/OUT3 0.26fF -C198 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/Qbar1 0.12fF -C199 pll_full_1/pd_0/tspc_r_0/Z1 pll_full_1/pd_0/DIV 0.17fF -C200 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF -C201 divider_1/mc2 divider_1/prescaler_0/tspc_2/a_630_n680# 0.33fF -C202 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF -C203 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/tspc_0/D 0.04fF -C204 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_0/B 0.18fF -C205 divider_1/tspc_0/Z2 divider_1/tspc_1/Q 0.14fF -C206 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z3 0.16fF -C207 divider_2/prescaler_0/Out divider_2/nor_0/A 0.15fF -C208 divider_1/tspc_1/Z2 divider_1/nor_0/A 0.15fF -C209 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_0/D 0.32fF -C210 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/clk 0.01fF -C211 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF -C212 pd_1/DIV pd_1/tspc_r_0/Z4 0.02fF -C213 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF -C214 divbuf_24/IN divbuf_24/OUT5 0.00fF -C215 pll_full_0/pd_0/DOWN pll_full_0/pd_0/R 0.36fF -C216 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/Z4 0.08fF -C217 divider_0/tspc_1/Q divider_0/tspc_1/a_630_n680# 0.04fF -C218 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF -C219 divbuf_1/OUT2 divbuf_1/OUT 0.06fF -C220 divbuf_5/OUT ro_complete_0/cbank_1/v 0.05fF -C221 ro_complete_0/cbank_0/switch_4/vin divbuf_7/OUT 0.13fF -C222 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.05fF -C223 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/clk 0.64fF -C224 pll_full_1/pd_0/REF pll_full_1/pd_0/DOWN 1.48fF -C225 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/R 0.03fF -C226 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF -C227 divider_0/nor_0/A divider_0/tspc_2/Z2 0.23fF -C228 pll_full_1/pd_0/REF pll_full_1/divbuf_1/OUT5 0.00fF -C229 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/DOWN 0.12fF -C230 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF -C231 pll_full_0/ro_complete_0/a5 pll_full_0/divider_0/clk 0.15fF -C232 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z2 1.07fF -C233 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z4 0.12fF -C234 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z2 0.01fF -C235 divbuf_7/OUT3 divbuf_7/OUT5 0.01fF -C236 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/switch_1/vin 0.19fF -C237 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF -C238 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/clk 0.26fF -C239 pd_0/tspc_r_1/Z4 pd_0/tspc_r_1/z5 0.04fF -C240 divider_2/nor_0/Z1 divider_2/and_0/B 0.18fF -C241 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/a0 0.13fF -C242 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C243 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.65fF -C244 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/divider_0/clk 1.46fF -C245 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF -C246 divider_0/tspc_2/Q divider_0/tspc_1/Z4 0.15fF -C247 divider_0/tspc_0/Z4 divider_0/nor_1/B 0.22fF -C248 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF -C249 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF -C250 divbuf_2/OUT2 divbuf_2/OUT3 1.37fF -C251 divbuf_1/OUT5 divbuf_1/OUT4 20.26fF -C252 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.43fF -C253 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/DOWN 0.07fF -C254 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/DIV 0.04fF -C255 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C256 divider_2/Out divider_2/tspc_0/a_630_n680# 0.04fF -C257 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF -C258 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/nor_0/B 0.51fF -C259 divbuf_10/a_492_n240# divbuf_10/OUT5 0.01fF -C260 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF -C261 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_1/Z3 0.05fF -C262 pll_full_0/divbuf_0/IN pll_full_0/divider_0/nor_1/B 0.27fF -C263 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z2 0.01fF -C264 divider_1/tspc_2/Q divider_1/tspc_1/Z3 0.45fF -C265 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z4 0.08fF -C266 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z3 0.05fF -C267 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Q 0.04fF -C268 divider_2/tspc_2/Q divider_2/nor_0/B 0.22fF -C269 divbuf_9/OUT3 divbuf_9/OUT4 5.16fF -C270 divbuf_9/OUT2 divbuf_9/OUT5 0.02fF -C271 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/switch_1/vin 0.19fF -C272 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.00fF -C273 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/divider_0/clk 1.27fF -C274 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/REF 0.19fF -C275 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF -C276 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z4 0.02fF -C277 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF -C278 divbuf_25/a_492_n240# divbuf_25/OUT2 0.42fF -C279 divider_0/tspc_2/Q divider_0/tspc_2/Z3 0.05fF -C280 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF -C281 divbuf_3/OUT divbuf_3/a_492_n240# 0.00fF -C282 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF -C283 pll_full_0/pd_0/DIV pll_full_0/divider_0/clk 2.26fF -C284 divbuf_7/OUT divbuf_7/OUT2 0.06fF -C285 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/a_630_n680# 0.19fF -C286 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_2/a_630_n680# 0.04fF -C287 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Z4 0.65fF -C288 divbuf_20/OUT3 divbuf_20/OUT 0.26fF -C289 divbuf_20/OUT4 divbuf_20/OUT5 20.26fF -C290 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF -C291 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF -C292 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/clk 0.64fF -C293 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/D 0.05fF -C294 pd_0/tspc_r_0/Z2 pd_0/tspc_r_0/Z4 0.14fF -C295 pd_1/UP pd_1/and_pd_0/Z1 0.06fF -C296 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.20fF -C297 divbuf_4/OUT ro_complete_0/cbank_2/switch_1/vin 0.09fF -C298 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF -C299 divider_0/tspc_0/Z2 divider_0/tspc_0/Z4 0.36fF -C300 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z3 0.11fF -C301 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C302 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.06fF -C303 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/switch_5/vin 0.20fF -C304 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF -C305 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C306 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF -C307 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/divider_0/clk 1.46fF -C308 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z2 0.16fF -C309 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z1 0.08fF -C310 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z4 0.00fF -C311 pll_full_0/divider_0/tspc_1/Z4 pll_full_0/divider_0/nor_0/A 0.02fF -C312 divider_2/tspc_2/Q divider_2/tspc_1/a_630_n680# 0.01fF -C313 pd_1/tspc_r_0/Z2 pd_1/R 0.21fF -C314 pd_0/R pd_0/and_pd_0/Out1 0.33fF -C315 pd_0/REF pd_0/tspc_r_1/Z4 0.02fF -C316 pd_0/UP pd_0/tspc_r_1/Qbar 0.21fF -C317 divider_2/mc2 divider_2/nor_0/A 0.04fF -C318 divider_2/nor_0/B divider_2/tspc_1/Z2 0.30fF -C319 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z2 0.01fF -C320 divbuf_12/OUT3 divbuf_12/OUT5 0.01fF -C321 divbuf_12/OUT2 divbuf_12/OUT 0.06fF -C322 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.09fF -C323 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C324 divider_2/and_0/out1 divider_2/and_0/B 0.18fF -C325 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/Out 0.21fF -C326 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF -C327 divider_0/mc2 divider_0/nor_0/A 0.04fF -C328 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF -C329 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF -C330 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/clk 0.45fF -C331 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/v 1.30fF -C332 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_0/Z2 0.14fF -C333 filter_0/v divbuf_25/OUT3 0.26fF -C334 pll_full_1/divbuf_1/a_492_n240# pll_full_1/divbuf_1/OUT 0.00fF -C335 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/DIV 0.65fF -C336 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_0/Z4 0.02fF -C337 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF -C338 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/divider_0/clk 1.27fF -C339 divbuf_17/OUT2 divbuf_17/OUT3 1.37fF -C340 divider_1/nor_0/B divider_1/tspc_1/Z4 0.21fF -C341 divider_1/tspc_0/Z3 divider_1/nor_1/B 0.38fF -C342 divbuf_11/a_492_n240# divbuf_11/OUT5 0.01fF -C343 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF -C344 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z3 0.38fF -C345 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF -C346 divider_1/nor_0/A divider_1/and_0/B 0.08fF -C347 pd_1/DOWN pd_1/UP 0.46fF -C348 pd_1/tspc_r_0/z5 pd_1/tspc_r_0/Qbar1 0.20fF -C349 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z1 0.09fF -C350 divbuf_19/OUT divbuf_19/OUT4 1.11fF -C351 divider_2/and_0/OUT divider_2/prescaler_0/nand_0/z1 0.01fF -C352 divider_2/nor_0/B divider_2/nor_0/A 1.21fF -C353 pll_full_1/pd_0/DIV pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.03fF -C354 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C355 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z2 0.21fF -C356 divbuf_15/OUT5 divbuf_15/IN 0.00fF -C357 divbuf_25/OUT3 divbuf_25/OUT4 5.16fF -C358 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF -C359 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF -C360 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Q 0.04fF -C361 divider_0/prescaler_0/Out divider_0/clk 0.51fF -C362 ro_complete_1/a0 ro_complete_1/cbank_2/switch_5/vin 0.09fF -C363 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/nor_0/B 0.22fF -C364 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF -C365 pll_full_1/divbuf_0/IN pll_full_1/divbuf_0/OUT5 0.00fF -C366 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF -C367 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF -C368 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Q 0.20fF -C369 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/D 0.09fF -C370 divider_1/prescaler_0/tspc_0/Z2 divider_1/clk 0.11fF -C371 divbuf_22/OUT3 divbuf_22/OUT 0.26fF -C372 divbuf_22/OUT4 divbuf_22/OUT5 20.26fF -C373 pd_0/DIV pd_0/tspc_r_0/Z1 0.17fF -C374 pd_0/tspc_r_0/Qbar1 pd_0/DOWN 0.11fF -C375 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z2 0.01fF -C376 divider_2/tspc_2/Q divider_2/tspc_1/Z3 0.45fF -C377 divider_2/tspc_0/Z2 divider_2/tspc_0/a_630_n680# 0.01fF -C378 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/z5 0.11fF -C379 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF -C380 divider_2/and_0/OUT divider_2/clk 0.04fF -C381 io_clamp_low[2] io_clamp_high[2] 0.53fF -C382 divbuf_5/OUT divbuf_3/OUT 3.09fF -C383 divbuf_4/OUT ro_complete_0/cbank_1/switch_1/vin 0.09fF -C384 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Z1 0.06fF -C385 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z3 0.05fF -C386 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.13fF -C387 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/and_0/OUT 0.14fF -C388 divbuf_5/OUT divbuf_5/OUT5 43.38fF -C389 divbuf_1/OUT divbuf_1/a_492_n240# 0.00fF -C390 divbuf_14/OUT divbuf_14/OUT5 43.38fF -C391 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/nand_1/z1 0.01fF -C392 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF -C393 io_clamp_high[1] io_analog[5] 0.53fF -C394 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF -C395 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C396 divider_1/tspc_0/Z2 divider_1/tspc_0/Z3 0.16fF -C397 divider_1/tspc_0/a_630_n680# divider_1/tspc_1/Q 0.01fF -C398 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z4 0.36fF -C399 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/Out 0.05fF -C400 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/Out 0.21fF -C401 divbuf_21/a_492_n240# divbuf_21/OUT 0.00fF -C402 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C403 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/clk 0.45fF -C404 divider_2/prescaler_0/Out divider_2/tspc_2/Z2 0.11fF -C405 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/nand_1/z1 0.22fF -C406 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/tspc_0/D 0.04fF -C407 pd_0/R pd_0/tspc_r_1/Z2 0.21fF -C408 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_1/switch_1/vin 0.09fF -C409 divider_2/nor_0/B divider_2/tspc_1/Z1 0.03fF -C410 divider_2/nor_0/A divider_2/and_0/A 0.01fF -C411 divbuf_24/OUT3 divbuf_24/OUT5 0.01fF -C412 divbuf_24/OUT2 divbuf_24/OUT 0.06fF -C413 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF -C414 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z4 0.36fF -C415 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.11fF -C416 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/clk 0.12fF -C417 ro_complete_1/a4 ro_complete_1/cbank_1/v 0.05fF -C418 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF -C419 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C420 divider_1/tspc_1/Q divider_1/tspc_1/a_630_n680# 0.04fF -C421 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z3 0.16fF -C422 divbuf_6/a_492_n240# divbuf_6/IN 0.13fF -C423 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/nor_1/B 0.03fF -C424 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/pd_0/tspc_r_1/Z3 0.09fF -C425 divider_1/nor_0/A divider_1/tspc_2/Z2 0.23fF -C426 divbuf_23/a_492_n240# divbuf_23/OUT5 0.01fF -C427 pd_1/DOWN pd_1/tspc_r_0/z5 0.03fF -C428 pd_0/UP pd_0/and_pd_0/Z1 0.06fF -C429 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.20fF -C430 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z2 0.19fF -C431 divbuf_19/OUT divbuf_19/a_492_n240# 0.00fF -C432 divider_2/prescaler_0/m1_2700_2190# divider_2/nor_0/A 0.01fF -C433 divider_2/tspc_1/Z2 divider_2/tspc_1/Z3 0.16fF -C434 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/D 0.15fF -C435 divider_2/mc2 divider_2/and_0/B 0.20fF -C436 divbuf_15/OUT4 divbuf_15/OUT3 5.16fF -C437 divbuf_15/OUT5 divbuf_15/OUT2 0.02fF -C438 divbuf_2/OUT2 divbuf_2/OUT5 0.02fF -C439 divbuf_2/OUT ro_complete_0/cbank_2/v 0.08fF -C440 divbuf_7/OUT ro_complete_0/cbank_1/switch_5/vin 0.09fF -C441 pll_full_0/pd_0/DIV pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF -C442 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF -C443 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF -C444 divider_0/mc2 divider_0/and_0/B 0.20fF -C445 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/clk 0.45fF -C446 divbuf_3/OUT3 divbuf_3/OUT5 0.01fF -C447 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/IN 0.00fF -C448 divider_1/tspc_2/Q divider_1/tspc_1/Z4 0.15fF -C449 divider_1/tspc_0/Z4 divider_1/nor_1/B 0.22fF -C450 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z2 1.07fF -C451 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z4 0.12fF -C452 divbuf_10/OUT2 divbuf_10/OUT3 1.37fF -C453 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF -C454 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF -C455 divider_1/and_0/out1 divider_1/and_0/Z1 0.36fF -C456 divbuf_9/OUT3 divbuf_9/OUT 0.26fF -C457 divbuf_9/OUT4 divbuf_9/OUT5 20.26fF -C458 pd_1/tspc_r_0/Z4 pd_1/tspc_r_1/Z4 0.02fF -C459 pd_1/REF pd_1/tspc_r_1/Z3 0.65fF -C460 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/v 0.08fF -C461 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.09fF -C462 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/z5 0.04fF -C463 divider_2/nor_0/B divider_2/and_0/B 0.31fF -C464 divider_0/nor_1/Z1 divider_0/nor_0/B 0.18fF -C465 divbuf_0/OUT3 divbuf_0/OUT4 5.16fF -C466 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF -C467 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF -C468 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.65fF -C469 divbuf_4/OUT divbuf_4/a_492_n240# 0.00fF -C470 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF -C471 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF -C472 divbuf_7/OUT divbuf_7/OUT4 1.11fF -C473 divbuf_4/IN divbuf_4/OUT5 0.00fF -C474 ro_complete_1/cbank_1/v ro_complete_1/cbank_2/v 1.36fF -C475 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/nor_0/A 0.55fF -C476 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/D 0.11fF -C477 divider_1/tspc_2/Q divider_1/tspc_2/Z3 0.05fF -C478 divider_1/prescaler_0/tspc_1/Z2 divider_1/clk 0.11fF -C479 divbuf_20/OUT5 divbuf_20/OUT 43.38fF -C480 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF -C481 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/clk 0.12fF -C482 divbuf_8/a_492_n240# divbuf_8/OUT 0.00fF -C483 pll_full_1/divbuf_1/OUT2 pll_full_1/divbuf_1/OUT5 0.02fF -C484 pll_full_1/divbuf_0/OUT4 pll_full_1/divbuf_0/OUT5 20.26fF -C485 divider_2/tspc_0/Z2 divider_2/tspc_1/Q 0.14fF -C486 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z3 0.06fF -C487 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF -C488 divider_2/nor_0/A divider_2/tspc_2/Z1 0.03fF -C489 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z3 0.05fF -C490 divider_0/tspc_1/Q divider_0/tspc_0/Z3 0.45fF -C491 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z4 0.12fF -C492 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z4 0.28fF -C493 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.00fF -C494 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF -C495 ro_complete_1/a5 ro_complete_1/cbank_1/switch_0/vin 0.09fF -C496 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/v 1.30fF -C497 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF -C498 divider_0/and_0/OUT divider_0/and_0/B 0.01fF -C499 divbuf_5/IN divbuf_5/OUT5 0.00fF -C500 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z2 0.36fF -C501 divider_1/tspc_0/Z2 divider_1/tspc_0/Z4 0.36fF -C502 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z3 0.11fF -C503 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/a_630_n680# 0.19fF -C504 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/divider_0/tspc_2/Z4 0.65fF -C505 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divbuf_0/IN 0.04fF -C506 divbuf_7/a_492_n240# divbuf_7/IN 0.13fF -C507 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/nor_1/Z1 0.06fF -C508 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/clk 0.45fF -C509 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z4 0.14fF -C510 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/z5 0.11fF -C511 divbuf_12/OUT4 divbuf_12/OUT 1.11fF -C512 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/OUT 0.31fF -C513 divider_2/tspc_1/Z1 divider_2/tspc_1/Z3 0.06fF -C514 divider_2/and_0/A divider_2/and_0/B 0.18fF -C515 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Q 0.91fF -C516 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C517 ro_complete_1/a2 ro_complete_1/cbank_0/switch_3/vin 0.09fF -C518 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 pll_full_1/divider_0/clk 0.12fF -C519 ro_complete_1/cbank_1/switch_2/vin ro_complete_1/cbank_1/v 1.30fF -C520 pll_full_1/pd_0/REF pll_full_1/pd_0/R 0.61fF -C521 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF -C522 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF -C523 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/Z1 0.03fF -C524 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z3 0.05fF -C525 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF -C526 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/R 0.33fF -C527 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF -C528 divbuf_11/OUT2 divbuf_11/OUT3 1.37fF -C529 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z4 0.21fF -C530 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF -C531 pd_1/R pd_1/tspc_r_1/Z3 0.29fF -C532 divider_2/prescaler_0/tspc_2/D divider_2/prescaler_0/nand_0/z1 0.24fF -C533 divbuf_0/OUT divbuf_0/OUT3 0.26fF -C534 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z3 0.65fF -C535 divbuf_2/OUT5 divbuf_2/a_492_n240# 0.01fF -C536 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/v 1.30fF -C537 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF -C538 pll_full_1/pd_0/tspc_r_0/Z1 pll_full_1/pd_0/tspc_r_0/Z3 0.09fF -C539 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT4 5.16fF -C540 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C541 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/clk 0.60fF -C542 ro_complete_1/a0 ro_complete_1/cbank_2/v 0.05fF -C543 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/R 0.02fF -C544 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/IN 0.13fF -C545 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C546 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/Z2 0.14fF -C547 divbuf_20/a_492_n240# divbuf_20/OUT2 0.42fF -C548 divider_1/tspc_1/Z3 divider_1/tspc_1/Z4 0.65fF -C549 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Q 0.04fF -C550 divider_1/prescaler_0/Out divider_1/clk 0.51fF -C551 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF -C552 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF -C553 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C554 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z2 0.25fF -C555 divider_2/tspc_2/Q divider_2/tspc_1/Z4 0.15fF -C556 divbuf_22/OUT5 divbuf_22/OUT 43.38fF -C557 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/z5 0.04fF -C558 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF -C559 pd_1/UP pd_1/tspc_r_1/z5 0.03fF -C560 divbuf_13/a_492_n240# divbuf_13/OUT 0.00fF -C561 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/ro_complete_0/cbank_2/v 0.04fF -C562 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/z5 0.20fF -C563 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/Qbar 0.21fF -C564 divider_2/and_0/OUT divider_2/and_0/out1 0.31fF -C565 divider_2/prescaler_0/tspc_2/D divider_2/clk 0.26fF -C566 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF -C567 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF -C568 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF -C569 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_2/D 0.16fF -C570 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.03fF -C571 divbuf_14/a_492_n240# divbuf_14/OUT5 0.01fF -C572 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_1/z1 0.21fF -C573 io_clamp_low[0] io_analog[4] 0.53fF -C574 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/nor_0/B 0.20fF -C575 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z3 0.05fF -C576 divbuf_21/IN divbuf_21/OUT5 0.00fF -C577 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/nand_1/z1 0.01fF -C578 divider_1/prescaler_0/tspc_2/Z2 divider_1/clk 0.11fF -C579 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/clk 0.12fF -C580 pd_1/DIV pd_1/tspc_r_0/Z3 0.65fF -C581 pd_0/REF pd_0/tspc_r_1/Z3 0.65fF -C582 divider_2/tspc_2/Q divider_2/tspc_2/Z3 0.05fF -C583 divider_2/nor_0/B divider_2/tspc_1/Q 0.51fF -C584 divbuf_12/a_492_n240# divbuf_12/IN 0.13fF -C585 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C586 divbuf_24/OUT4 divbuf_24/OUT 1.11fF -C587 divider_0/tspc_1/Q divider_0/tspc_0/Z4 0.15fF -C588 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF -C589 divbuf_3/OUT2 divbuf_3/a_492_n240# 0.42fF -C590 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/tspc_r_1/Z1 0.71fF -C591 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Z3 0.11fF -C592 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z4 0.36fF -C593 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/B 0.18fF -C594 divider_1/tspc_2/Z1 divider_1/tspc_2/Z3 0.06fF -C595 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/nor_1/Z1 0.18fF -C596 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/clk 0.60fF -C597 divider_2/tspc_1/Z2 divider_2/tspc_1/Z4 0.36fF -C598 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/D 0.05fF -C599 divbuf_23/OUT2 divbuf_23/OUT3 1.37fF -C600 divbuf_15/OUT divbuf_15/OUT3 0.26fF -C601 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF -C602 divbuf_2/OUT3 divbuf_2/OUT4 5.16fF -C603 divbuf_7/OUT ro_complete_0/cbank_1/v 0.05fF -C604 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/divider_0/clk 0.12fF -C605 ro_complete_1/a3 ro_complete_1/cbank_2/v 0.05fF -C606 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF -C607 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF -C608 divbuf_10/OUT3 divbuf_10/OUT4 5.16fF -C609 divbuf_10/OUT2 divbuf_10/OUT5 0.02fF -C610 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C611 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF -C612 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF -C613 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF -C614 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z3 0.16fF -C615 divbuf_22/a_492_n240# divbuf_22/OUT2 0.42fF -C616 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Q 0.04fF -C617 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a4 0.12fF -C618 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_1/Z4 0.02fF -C619 pd_1/tspc_r_0/z5 pd_1/tspc_r_1/z5 0.02fF -C620 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Qbar1 0.38fF -C621 divider_2/tspc_1/Z4 divider_2/nor_0/A 0.02fF -C622 divbuf_9/OUT5 divbuf_9/OUT 43.38fF -C623 divbuf_0/OUT3 divbuf_0/OUT5 0.01fF -C624 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/z5 0.03fF -C625 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/Out 0.21fF -C626 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF -C627 divbuf_3/OUT divbuf_3/OUT4 1.11fF -C628 ro_complete_1/a4 ro_complete_1/cbank_1/switch_1/vin 0.09fF -C629 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.45fF -C630 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT3 0.01fF -C631 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT2 0.06fF -C632 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C633 divider_1/nor_1/Z1 divider_1/nor_0/B 0.18fF -C634 divbuf_4/OUT3 divbuf_4/OUT5 0.01fF -C635 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/B 0.29fF -C636 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/z5 0.04fF -C637 pll_full_1/divbuf_0/IN pll_full_1/divbuf_0/a_492_n240# 0.13fF -C638 divbuf_8/IN divbuf_8/OUT5 0.00fF -C639 divider_2/mc2 divider_2/and_0/OUT 0.05fF -C640 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z4 0.00fF -C641 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/D 0.03fF -C642 pll_full_1/divbuf_1/OUT3 pll_full_1/divbuf_1/OUT 0.26fF -C643 pll_full_1/divbuf_1/OUT4 pll_full_1/divbuf_1/OUT5 20.26fF -C644 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Z1 0.02fF -C645 divider_2/tspc_2/Z1 divider_2/tspc_2/Z2 1.07fF -C646 divider_2/nor_0/A divider_2/tspc_2/Z3 0.38fF -C647 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z4 0.12fF -C648 divbuf_24/a_492_n240# divbuf_24/IN 0.13fF -C649 divbuf_4/OUT ro_complete_0/cbank_1/switch_0/vin 0.12fF -C650 pll_full_1/ro_complete_0/cbank_2/switch_0/vin pll_full_1/ro_complete_0/cbank_2/v 1.45fF -C651 divbuf_5/OUT ro_complete_0/cbank_2/switch_2/vin 0.14fF -C652 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF -C653 pll_full_1/pd_0/REF pll_full_1/divbuf_1/a_492_n240# 0.13fF -C654 divider_0/mc2 divider_0/and_0/OUT 0.05fF -C655 divider_0/tspc_0/Z1 divider_0/nor_1/B 0.03fF -C656 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.65fF -C657 pll_full_1/ro_complete_0/cbank_2/v pll_full_1/divider_0/clk 1.36fF -C658 ro_complete_1/a3 ro_complete_1/cbank_1/switch_2/vin 0.09fF -C659 pll_full_1/cp_0/upbar pll_full_1/cp_0/down 0.02fF -C660 divider_1/tspc_1/Q divider_1/tspc_0/Z3 0.45fF -C661 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z4 0.12fF -C662 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z4 0.28fF -C663 divbuf_5/OUT3 divbuf_5/OUT5 0.01fF -C664 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/clk 0.12fF -C665 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/Z2 1.07fF -C666 divider_1/and_0/OUT divider_1/and_0/B 0.01fF -C667 pd_0/UP pd_0/tspc_r_1/z5 0.03fF -C668 divider_2/tspc_1/Z1 divider_2/tspc_1/Z4 0.00fF -C669 divider_2/tspc_1/Q divider_2/tspc_1/Z3 0.05fF -C670 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z3 0.06fF -C671 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.14fF -C672 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C673 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.05fF -C674 ro_complete_1/a2 ro_complete_1/cbank_2/switch_3/vin 0.09fF -C675 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/v 1.30fF -C676 divbuf_3/OUT ro_complete_0/cbank_1/v 0.05fF -C677 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/a_492_n240# 0.00fF -C678 divbuf_15/OUT divbuf_15/a_492_n240# 0.00fF -C679 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF -C680 divbuf_1/OUT4 divbuf_1/OUT3 5.16fF -C681 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/switch_5/vin 0.20fF -C682 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z2 1.07fF -C683 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/Z3 0.38fF -C684 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z4 0.12fF -C685 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/DOWN 0.03fF -C686 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z1 0.08fF -C687 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Q 0.91fF -C688 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/a_630_n680# 0.19fF -C689 divbuf_11/OUT3 divbuf_11/OUT4 5.16fF -C690 divbuf_11/OUT2 divbuf_11/OUT5 0.02fF -C691 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF -C692 divbuf_19/OUT2 divbuf_19/OUT3 1.37fF -C693 divbuf_9/a_492_n240# divbuf_9/OUT2 0.42fF -C694 pd_1/DOWN pd_1/tspc_r_1/Qbar 0.02fF -C695 pd_1/R pd_1/UP 0.45fF -C696 divbuf_18/OUT4 divbuf_18/OUT 1.11fF -C697 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/Q 0.04fF -C698 divider_2/prescaler_0/tspc_1/Z3 divider_2/clk 0.45fF -C699 pll_full_1/divbuf_0/OUT5 pll_full_1/divbuf_0/OUT2 0.02fF -C700 divbuf_0/OUT divbuf_0/OUT4 1.11fF -C701 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF -C702 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF -C703 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.33fF -C704 pll_full_1/ro_complete_0/cbank_1/switch_2/vin pll_full_1/divider_0/clk 1.46fF -C705 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT5 0.01fF -C706 divbuf_14/IN divbuf_14/OUT5 0.00fF -C707 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/clk 0.05fF -C708 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_1/Z1 0.03fF -C709 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Z3 0.05fF -C710 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.45fF -C711 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/Z3 0.38fF -C712 pll_full_1/pd_0/DIV pll_full_1/pd_0/R 0.51fF -C713 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/nor_0/A 0.15fF -C714 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF -C715 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/divider_0/clk 1.36fF -C716 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/Qbar 0.01fF -C717 pd_0/tspc_r_0/Z3 pd_0/R 0.27fF -C718 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a3 0.13fF -C719 divbuf_13/IN divbuf_13/OUT5 0.00fF -C720 cp_0/a_1710_0# cp_0/out 0.84fF -C721 pd_1/tspc_r_1/Z2 pd_1/tspc_r_1/Z4 0.14fF -C722 io_clamp_low[1] io_clamp_high[1] 0.53fF -C723 divbuf_5/OUT divbuf_6/OUT 3.23fF -C724 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF -C725 divider_0/prescaler_0/Out divider_0/prescaler_0/m1_2700_2190# 0.11fF -C726 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/nand_0/z1 0.07fF -C727 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.05fF -C728 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF -C729 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF -C730 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF -C731 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C732 divider_1/mc2 divider_1/nor_1/B 0.15fF -C733 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF -C734 divbuf_5/a_492_n240# divbuf_5/OUT2 0.42fF -C735 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/and_0/B 0.31fF -C736 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_1/Q 0.01fF -C737 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF -C738 divider_1/prescaler_0/tspc_0/D divider_1/prescaler_0/nand_1/z1 0.21fF -C739 divbuf_21/OUT3 divbuf_21/OUT5 0.01fF -C740 divbuf_21/OUT2 divbuf_21/OUT 0.06fF -C741 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Qbar1 0.38fF -C742 divider_2/prescaler_0/m1_2700_2190# divider_2/and_0/OUT 0.14fF -C743 pll_full_1/ro_complete_0/cbank_2/switch_5/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF -C744 divbuf_2/OUT divbuf_2/OUT3 0.26fF -C745 divider_0/nor_0/B divider_0/nor_1/B 0.47fF -C746 divider_0/tspc_0/Z3 divider_0/tspc_0/Z4 0.65fF -C747 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.05fF -C748 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/clk 0.01fF -C749 divbuf_6/OUT divbuf_6/OUT3 0.26fF -C750 ro_complete_1/a5 ro_complete_1/cbank_1/v 0.10fF -C751 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/cbank_0/v 1.30fF -C752 divbuf_14/OUT5 divbuf_14/OUT4 20.26fF -C753 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF -C754 divider_1/tspc_1/Q divider_1/tspc_0/Z4 0.15fF -C755 divbuf_6/a_492_n240# divbuf_6/OUT5 0.01fF -C756 pll_full_1/divider_0/and_0/A pll_full_1/divider_0/and_0/B 0.18fF -C757 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/DOWN 0.03fF -C758 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divbuf_0/IN 0.05fF -C759 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF -C760 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/A 0.80fF -C761 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/divider_0/clk 1.46fF -C762 divbuf_19/IN divbuf_19/a_492_n240# 0.13fF -C763 divider_1/tspc_2/Z1 divider_1/tspc_2/Z4 0.00fF -C764 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF -C765 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/clk 0.05fF -C766 divbuf_23/OUT3 divbuf_23/OUT4 5.16fF -C767 divbuf_23/OUT2 divbuf_23/OUT5 0.02fF -C768 pd_1/DOWN pd_1/tspc_r_0/Qbar1 0.11fF -C769 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Z1 0.02fF -C770 divider_2/prescaler_0/tspc_2/Z4 divider_2/prescaler_0/tspc_2/D 0.11fF -C771 pll_full_1/pd_0/UP pll_full_1/pd_0/tspc_r_1/Qbar 0.21fF -C772 divbuf_2/OUT4 divbuf_2/OUT5 20.26fF -C773 divbuf_14/OUT2 divbuf_14/OUT5 0.02fF -C774 divider_0/nor_0/B divider_0/tspc_2/a_630_n680# 0.01fF -C775 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/tspc_r_1/Z3 0.25fF -C776 divider_1/nor_0/Z1 divider_1/nor_0/B 0.06fF -C777 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z4 0.36fF -C778 divbuf_10/OUT3 divbuf_10/OUT 0.26fF -C779 divbuf_10/OUT4 divbuf_10/OUT5 20.26fF -C780 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/DIV 0.19fF -C781 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF -C782 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF -C783 pd_1/DOWN pd_1/and_pd_0/Z1 0.07fF -C784 pd_1/REF pd_1/tspc_r_1/Z1 0.17fF -C785 pd_1/tspc_r_1/Qbar1 pd_1/UP 0.11fF -C786 divider_2/prescaler_0/tspc_2/Z3 divider_2/clk 0.45fF -C787 divider_0/tspc_0/Z2 divider_0/nor_0/B 0.20fF -C788 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.04fF -C789 divbuf_0/OUT4 divbuf_0/OUT5 20.26fF -C790 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF -C791 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF -C792 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z4 0.14fF -C793 divbuf_4/OUT divbuf_4/OUT2 0.06fF -C794 ro_complete_1/a2 ro_complete_1/cbank_1/v 0.05fF -C795 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT4 1.11fF -C796 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C797 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/Out 0.21fF -C798 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z2 0.01fF -C799 divider_2/nor_1/Z1 divider_2/nor_1/B 0.06fF -C800 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF -C801 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/clk 0.01fF -C802 divbuf_18/OUT3 divbuf_18/OUT4 5.16fF -C803 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Z4 0.65fF -C804 divbuf_8/OUT3 divbuf_8/OUT5 0.01fF -C805 divbuf_8/OUT2 divbuf_8/OUT 0.06fF -C806 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C807 divider_2/nor_0/A divider_2/tspc_2/Z4 0.21fF -C808 divider_2/tspc_2/Z2 divider_2/tspc_2/Z3 0.16fF -C809 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF -C810 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF -C811 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/clk 0.01fF -C812 ro_complete_1/a3 ro_complete_1/cbank_2/switch_1/vin 0.13fF -C813 divider_1/tspc_0/Z1 divider_1/nor_1/B 0.03fF -C814 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/and_0/B 0.08fF -C815 divbuf_7/a_492_n240# divbuf_7/OUT5 0.01fF -C816 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z3 0.25fF -C817 pd_0/tspc_r_1/Z2 pd_0/tspc_r_1/Z4 0.14fF -C818 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z4 0.00fF -C819 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Q 0.21fF -C820 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/switch_5/vin 0.20fF -C821 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 1.07fF -C822 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.12fF -C823 divbuf_19/OUT3 divbuf_19/OUT4 5.16fF -C824 divider_2/and_0/B divider_2/and_0/Z1 0.07fF -C825 ro_complete_1/a2 ro_complete_1/cbank_0/switch_2/vin 0.14fF -C826 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a4 0.09fF -C827 divbuf_0/OUT5 divbuf_0/IN 0.00fF -C828 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF -C829 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF -C830 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.19fF -C831 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/clk 0.01fF -C832 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/v 1.30fF -C833 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/Z4 0.22fF -C834 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/tspc_0/Z3 0.16fF -C835 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF -C836 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z3 0.11fF -C837 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/D 0.09fF -C838 divbuf_11/OUT3 divbuf_11/OUT 0.26fF -C839 divbuf_11/OUT4 divbuf_11/OUT5 20.26fF -C840 cp_0/a_1710_n2840# cp_0/a_1710_0# 0.83fF -C841 divider_2/prescaler_0/tspc_1/Z4 divider_2/clk 0.12fF -C842 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.19fF -C843 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF -C844 divbuf_0/OUT divbuf_0/OUT5 43.38fF -C845 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.08fF -C846 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.05fF -C847 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF -C848 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z1 0.17fF -C849 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/UP 0.11fF -C850 divider_0/tspc_2/Q divider_0/tspc_2/a_630_n680# 0.04fF -C851 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/D 0.03fF -C852 divbuf_1/OUT5 divbuf_1/IN 0.00fF -C853 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/divider_0/clk 0.29fF -C854 pll_full_0/divbuf_0/OUT4 pll_full_0/divbuf_0/OUT5 20.26fF -C855 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C856 divbuf_4/a_492_n240# divbuf_4/IN 0.13fF -C857 ro_complete_1/cbank_2/switch_2/vin ro_complete_1/cbank_2/v 1.30fF -C858 pll_full_1/divbuf_1/a_492_n240# pll_full_1/divbuf_1/OUT2 0.42fF -C859 divider_1/tspc_0/Z1 divider_1/tspc_0/Z2 1.07fF -C860 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z2 1.07fF -C861 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_1/Z3 0.38fF -C862 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Z4 0.12fF -C863 divbuf_20/a_492_n240# divbuf_20/OUT 0.00fF -C864 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_0/Qbar 0.21fF -C865 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z2 0.11fF -C866 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/clk 0.01fF -C867 divbuf_16/OUT2 divbuf_16/OUT 0.06fF -C868 pd_1/DIV pd_1/tspc_r_0/Z2 0.19fF -C869 pd_0/DOWN pd_0/R 0.36fF -C870 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z4 0.20fF -C871 pd_0/DIV pd_0/tspc_r_0/z5 0.04fF -C872 pd_0/tspc_r_0/Z1 pd_0/tspc_r_0/Z2 0.71fF -C873 divider_2/prescaler_0/tspc_0/Z2 divider_2/and_0/OUT 0.06fF -C874 cp_0/a_1710_0# cp_0/down 0.32fF -C875 divider_2/prescaler_0/tspc_1/Q divider_2/clk 0.60fF -C876 divbuf_13/OUT3 divbuf_13/OUT5 0.01fF -C877 divbuf_13/OUT2 divbuf_13/OUT 0.06fF -C878 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF -C879 divider_0/nor_0/B divider_0/tspc_1/Z1 0.03fF -C880 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF -C881 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.33fF -C882 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.38fF -C883 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.11fF -C884 divider_0/prescaler_0/tspc_1/Q divider_0/nor_0/A 0.03fF -C885 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF -C886 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z3 0.06fF -C887 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF -C888 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF -C889 divider_1/prescaler_0/Out divider_1/prescaler_0/m1_2700_2190# 0.11fF -C890 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/tspc_2/Z1 0.03fF -C891 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z3 0.05fF -C892 divbuf_21/OUT4 divbuf_21/OUT 1.11fF -C893 pll_full_1/pd_0/DOWN pll_full_1/cp_0/a_1710_0# 0.04fF -C894 pll_full_1/pd_0/DIV pll_full_1/pd_0/tspc_r_0/Z4 0.02fF -C895 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF -C896 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/clk 0.01fF -C897 divider_2/prescaler_0/Out divider_2/clk 0.51fF -C898 pd_0/tspc_r_0/Z4 pd_0/tspc_r_1/Z4 0.02fF -C899 pd_0/DOWN pd_0/and_pd_0/Out1 0.12fF -C900 pd_0/REF pd_0/tspc_r_1/Z1 0.17fF -C901 pd_0/tspc_r_1/Qbar1 pd_0/UP 0.11fF -C902 divider_2/nor_1/B divider_2/tspc_0/Z1 0.03fF -C903 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_2/D 0.16fF -C904 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/clk 0.01fF -C905 divbuf_12/a_492_n240# divbuf_12/OUT5 0.01fF -C906 pll_full_1/divbuf_0/OUT5 pll_full_1/divbuf_0/a_492_n240# 0.01fF -C907 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_4/vin 0.20fF -C908 divbuf_2/OUT divbuf_2/OUT5 43.38fF -C909 divbuf_4/OUT ro_complete_0/cbank_1/v 0.05fF -C910 divider_0/nor_0/B divider_0/tspc_1/Z2 0.30fF -C911 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/clk 0.01fF -C912 divider_1/mc2 divider_1/nor_0/A 0.04fF -C913 divbuf_14/OUT5 divbuf_14/OUT3 0.01fF -C914 divbuf_6/OUT divbuf_6/OUT5 43.38fF -C915 divbuf_3/IN divbuf_3/OUT5 0.00fF -C916 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF -C917 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C918 divbuf_6/OUT2 divbuf_6/OUT3 1.37fF -C919 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Q 0.22fF -C920 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF -C921 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF -C922 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF -C923 divider_1/nor_0/B divider_1/nor_1/B 0.47fF -C924 divider_1/tspc_0/Z3 divider_1/tspc_0/Z4 0.65fF -C925 divider_1/nor_0/Z1 divider_1/and_0/A 0.80fF -C926 filter_0/v divbuf_25/OUT5 43.38fF -C927 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/A 0.35fF -C928 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/clk 0.29fF -C929 divbuf_16/OUT divbuf_16/OUT5 43.38fF -C930 divider_1/tspc_2/Z3 divider_1/tspc_2/Z4 0.65fF -C931 divbuf_23/OUT3 divbuf_23/OUT 0.26fF -C932 divbuf_23/OUT4 divbuf_23/OUT5 20.26fF -C933 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/z5 0.04fF -C934 divbuf_18/OUT5 divbuf_18/OUT4 20.26fF -C935 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z3 0.29fF -C936 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/divider_0/clk 1.46fF -C937 divbuf_0/a_492_n240# divbuf_0/IN 0.13fF -C938 divbuf_25/OUT4 divbuf_25/OUT5 20.26fF -C939 divider_0/prescaler_0/Out divider_0/tspc_2/Z3 0.45fF -C940 divider_0/nor_0/B divider_0/nor_0/A 1.21fF -C941 divider_2/tspc_0/Z4 divider_2/nor_1/B 0.22fF -C942 ro_complete_1/a1 ro_complete_1/cbank_2/v 0.05fF -C943 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/nor_0/B 0.02fF -C944 divbuf_10/OUT5 divbuf_10/OUT 43.38fF -C945 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.00fF -C946 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF -C947 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF -C948 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF -C949 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF -C950 divbuf_16/OUT3 divbuf_16/OUT 0.26fF -C951 divider_1/nor_0/B divider_1/tspc_2/a_630_n680# 0.01fF -C952 divbuf_22/a_492_n240# divbuf_22/OUT 0.00fF -C953 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a4 0.09fF -C954 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a5 0.09fF -C955 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF -C956 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z2 0.25fF -C957 divider_2/prescaler_0/tspc_2/Z4 divider_2/clk 0.12fF -C958 pll_full_1/divbuf_0/a_492_n240# pll_full_1/divbuf_0/OUT2 0.42fF -C959 divbuf_0/OUT3 divbuf_0/OUT2 1.37fF -C960 divbuf_0/OUT divbuf_0/a_492_n240# 0.00fF -C961 divider_0/tspc_0/Z1 divider_0/tspc_1/Q 0.01fF -C962 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF -C963 divbuf_4/OUT divbuf_4/OUT4 1.11fF -C964 pll_full_1/pd_0/tspc_r_0/Z1 pll_full_1/pd_0/tspc_r_0/Z2 0.71fF -C965 pll_full_0/divbuf_1/a_492_n240# pll_full_0/divbuf_1/OUT2 0.42fF -C966 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF -C967 divider_1/tspc_0/Z2 divider_1/nor_0/B 0.20fF -C968 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/Out 0.04fF -C969 divbuf_21/a_492_n240# divbuf_21/IN 0.13fF -C970 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/nor_0/Z1 0.06fF -C971 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/clk 0.01fF -C972 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/A 0.26fF -C973 divbuf_8/OUT4 divbuf_8/OUT 1.11fF -C974 pd_0/R pd_0/tspc_r_1/Z3 0.29fF -C975 pll_full_1/divbuf_0/OUT4 pll_full_1/divbuf_0/OUT3 5.16fF -C976 divbuf_24/a_492_n240# divbuf_24/OUT5 0.01fF -C977 divider_2/tspc_2/Z2 divider_2/tspc_2/Z4 0.36fF -C978 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a4 0.12fF -C979 divbuf_2/OUT ro_complete_0/cbank_1/switch_0/vin 0.09fF -C980 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF -C981 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/IN 5.26fF -C982 divider_0/tspc_1/Z1 divider_0/tspc_2/Q 0.01fF -C983 divider_0/nor_0/B divider_0/tspc_1/a_630_n680# 0.35fF -C984 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/and_0/OUT 0.05fF -C985 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/clk 0.14fF -C986 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF -C987 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z4 0.00fF -C988 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/divider_0/clk 1.46fF -C989 divbuf_7/OUT2 divbuf_7/OUT3 1.37fF -C990 pll_full_1/divider_0/and_0/A pll_full_1/divider_0/nor_0/Z1 0.80fF -C991 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_1/Z3 0.29fF -C992 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.29fF -C993 pd_1/tspc_r_0/Qbar pd_1/tspc_r_0/Qbar1 0.01fF -C994 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.09fF -C995 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C996 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Z4 0.65fF -C997 pll_full_1/divider_0/and_0/Z1 pll_full_1/divider_0/and_0/OUT 0.04fF -C998 divbuf_15/OUT4 divbuf_15/OUT5 20.26fF -C999 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.16fF -C1000 divbuf_6/OUT ro_complete_0/cbank_1/v 0.05fF -C1001 divbuf_25/OUT3 divbuf_25/OUT2 1.37fF -C1002 divider_0/nor_0/Z1 divider_0/and_0/B 0.18fF -C1003 divider_0/tspc_2/Q divider_0/tspc_1/Z2 0.14fF -C1004 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF -C1005 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.32fF -C1006 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/clk 0.01fF -C1007 ro_complete_1/cbank_1/switch_0/vin ro_complete_1/cbank_1/v 1.43fF -C1008 divider_1/mc2 divider_1/and_0/B 0.20fF -C1009 divider_0/and_0/out1 divider_0/and_0/B 0.18fF -C1010 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/tspc_0/Z4 0.36fF -C1011 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divbuf_0/IN 0.05fF -C1012 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z4 0.28fF -C1013 divbuf_10/a_492_n240# divbuf_10/OUT2 0.42fF -C1014 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/R 0.27fF -C1015 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF -C1016 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z3 0.38fF -C1017 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_1/B 0.22fF -C1018 divbuf_11/OUT5 divbuf_11/OUT 43.38fF -C1019 divbuf_9/a_492_n240# divbuf_9/OUT 0.00fF -C1020 pd_1/R pd_1/tspc_r_1/Qbar 0.03fF -C1021 divbuf_5/OUT ro_complete_0/cbank_1/switch_3/vin 0.09fF -C1022 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF -C1023 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z2 0.25fF -C1024 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 1.07fF -C1025 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.12fF -C1026 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/divider_0/clk 1.46fF -C1027 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF -C1028 pll_full_1/pd_0/UP pll_full_1/pd_0/and_pd_0/Out1 0.33fF -C1029 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT2 1.37fF -C1030 divbuf_14/OUT divbuf_14/a_492_n240# 0.00fF -C1031 divider_0/nor_0/B divider_0/and_0/B 0.31fF -C1032 divider_0/tspc_2/Q divider_0/nor_0/A 0.55fF -C1033 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF -C1034 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/switch_5/vin 0.20fF -C1035 divider_2/tspc_0/Z4 divider_2/tspc_0/Z1 0.00fF -C1036 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_1/Z4 0.21fF -C1037 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z3 0.16fF -C1038 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Q 0.91fF -C1039 divider_1/tspc_2/Q divider_1/tspc_2/a_630_n680# 0.04fF -C1040 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/D 0.03fF -C1041 divbuf_20/IN divbuf_20/OUT5 0.00fF -C1042 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF -C1043 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/z5 0.20fF -C1044 divbuf_8/a_492_n240# divbuf_8/IN 0.13fF -C1045 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_1/switch_3/vin 0.09fF -C1046 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C1047 divider_2/tspc_0/Z3 divider_2/nor_1/B 0.38fF -C1048 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z3 0.33fF -C1049 divbuf_13/OUT4 divbuf_13/OUT 1.11fF -C1050 pd_1/UP pd_1/and_pd_0/Out1 0.33fF -C1051 io_clamp_low[0] io_clamp_high[0] 0.53fF -C1052 divbuf_18/OUT divbuf_18/a_492_n240# 0.00fF -C1053 divider_2/and_0/OUT divider_2/and_0/Z1 0.04fF -C1054 divider_2/prescaler_0/tspc_2/Q divider_2/clk 0.05fF -C1055 divbuf_4/OUT divbuf_3/OUT 2.71fF -C1056 divider_0/nor_0/B divider_0/tspc_1/Q 0.51fF -C1057 divbuf_0/OUT5 divbuf_0/a_492_n240# 0.01fF -C1058 pll_full_1/pd_0/UP pll_full_1/pd_0/and_pd_0/Z1 0.06fF -C1059 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.08fF -C1060 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.05fF -C1061 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.04fF -C1062 divbuf_1/OUT5 divbuf_1/OUT3 0.01fF -C1063 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF -C1064 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C1065 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z4 0.65fF -C1066 divider_0/and_0/OUT divider_0/clk 0.04fF -C1067 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_0/a_630_n680# 0.04fF -C1068 divider_1/nor_0/B divider_1/tspc_1/Z1 0.03fF -C1069 pll_full_1/divbuf_0/IN pll_full_1/pd_0/DIV 5.26fF -C1070 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z2 1.07fF -C1071 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/tspc_2/Z3 0.38fF -C1072 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z4 0.12fF -C1073 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_1/z5 0.02fF -C1074 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF -C1075 divider_1/prescaler_0/tspc_1/Q divider_1/nor_0/A 0.03fF -C1076 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_0/A 0.15fF -C1077 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF -C1078 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/clk 0.01fF -C1079 pd_1/tspc_r_0/Qbar pd_1/DOWN 0.21fF -C1080 pd_0/tspc_r_0/z5 pd_0/tspc_r_1/z5 0.02fF -C1081 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z2 0.25fF -C1082 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/nand_0/z1 0.07fF -C1083 divbuf_12/OUT2 divbuf_12/OUT3 1.37fF -C1084 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 4.58fF -C1085 divbuf_6/OUT divbuf_7/OUT 2.98fF -C1086 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF -C1087 divider_0/tspc_2/Q divider_0/tspc_1/a_630_n680# 0.01fF -C1088 divbuf_3/OUT ro_complete_0/cbank_2/switch_2/vin 0.09fF -C1089 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF -C1090 divider_0/nor_0/A divider_0/and_0/A 0.01fF -C1091 divbuf_6/OUT3 divbuf_6/OUT4 5.16fF -C1092 divbuf_6/OUT2 divbuf_6/OUT5 0.02fF -C1093 divider_1/nor_0/B divider_1/tspc_1/Z2 0.30fF -C1094 pll_full_1/divider_0/and_0/B pll_full_1/divider_0/and_0/Z1 0.07fF -C1095 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/R 0.30fF -C1096 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z2 0.25fF -C1097 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF -C1098 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF -C1099 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/divider_0/clk 1.46fF -C1100 divbuf_17/a_492_n240# divbuf_17/OUT5 0.01fF -C1101 divbuf_16/OUT divbuf_16/OUT4 1.11fF -C1102 divbuf_11/a_492_n240# divbuf_11/OUT2 0.42fF -C1103 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF -C1104 pd_1/R pd_1/tspc_r_0/Qbar1 0.01fF -C1105 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Q 0.05fF -C1106 divider_2/prescaler_0/m1_2700_2190# divider_2/clk 0.01fF -C1107 divbuf_23/OUT5 divbuf_23/OUT 43.38fF -C1108 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.09fF -C1109 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z1 0.08fF -C1110 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF -C1111 divider_0/prescaler_0/m1_2700_2190# divider_0/nor_0/A 0.01fF -C1112 divider_0/prescaler_0/Out divider_0/tspc_2/Z4 0.12fF -C1113 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF -C1114 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.15fF -C1115 divbuf_3/OUT divbuf_3/OUT2 0.06fF -C1116 divbuf_2/OUT2 divbuf_2/a_492_n240# 0.42fF -C1117 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF -C1118 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF -C1119 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF -C1120 ro_complete_1/cbank_1/switch_5/vin ro_complete_1/cbank_1/v 1.30fF -C1121 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z4 0.01fF -C1122 divbuf_19/OUT2 divbuf_19/OUT5 0.02fF -C1123 divider_1/prescaler_0/Out divider_1/tspc_2/Z3 0.45fF -C1124 divider_1/nor_0/B divider_1/nor_0/A 1.21fF -C1125 pll_full_1/pd_0/DOWN pll_full_1/pd_0/R 0.36fF -C1126 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z2 0.01fF -C1127 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z3 0.45fF -C1128 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF -C1129 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF -C1130 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF -C1131 pd_0/DIV pd_0/tspc_r_0/Qbar1 0.12fF -C1132 divider_2/nor_0/Z1 divider_2/nor_0/B 0.06fF -C1133 divbuf_22/IN divbuf_22/OUT5 0.00fF -C1134 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/z5 0.11fF -C1135 pd_1/R pd_1/and_pd_0/Z1 0.02fF -C1136 pd_1/tspc_r_1/Qbar1 pd_1/tspc_r_1/Qbar 0.01fF -C1137 divbuf_13/a_492_n240# divbuf_13/IN 0.13fF -C1138 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF -C1139 divider_0/tspc_0/Z1 divider_0/tspc_0/Z3 0.06fF -C1140 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF -C1141 divbuf_1/OUT2 divbuf_1/OUT5 0.02fF -C1142 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF -C1143 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Out1 0.33fF -C1144 divbuf_25/a_492_n240# divbuf_25/OUT5 0.01fF -C1145 divbuf_5/OUT divbuf_5/OUT2 0.06fF -C1146 io_clamp_high[2] io_analog[6] 0.53fF -C1147 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/a_492_n240# 0.01fF -C1148 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Z4 0.04fF -C1149 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Q 0.15fF -C1150 divider_1/tspc_0/Z1 divider_1/tspc_1/Q 0.01fF -C1151 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z3 0.06fF -C1152 pll_full_1/divider_0/tspc_1/Z4 pll_full_1/divider_0/nor_0/A 0.02fF -C1153 pd_0/R pd_0/UP 0.45fF -C1154 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z3 0.65fF -C1155 divbuf_17/a_492_n240# divbuf_17/OUT 0.00fF -C1156 divider_2/tspc_2/Q divider_2/tspc_2/a_630_n680# 0.04fF -C1157 divider_2/tspc_0/Z3 divider_2/tspc_0/Z1 0.06fF -C1158 pll_full_1/divbuf_0/OUT5 pll_full_1/divbuf_0/OUT3 0.01fF -C1159 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_4/vin 0.20fF -C1160 divbuf_24/OUT2 divbuf_24/OUT3 1.37fF -C1161 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/Out 0.21fF -C1162 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF -C1163 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.20fF -C1164 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.09fF -C1165 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/clk 0.11fF -C1166 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_0/a_630_n680# 0.19fF -C1167 divbuf_25/IN divbuf_25/OUT5 0.00fF -C1168 divider_0/nor_0/A divider_0/tspc_2/Z1 0.03fF -C1169 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF -C1170 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/R 0.21fF -C1171 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF -C1172 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF -C1173 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF -C1174 divider_1/tspc_1/Z1 divider_1/tspc_2/Q 0.01fF -C1175 divider_1/nor_0/B divider_1/tspc_1/a_630_n680# 0.35fF -C1176 divbuf_7/OUT3 divbuf_7/OUT4 5.16fF -C1177 divbuf_7/OUT2 divbuf_7/OUT5 0.02fF -C1178 pll_full_1/divbuf_1/OUT2 pll_full_1/divbuf_1/OUT3 1.37fF -C1179 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/OUT4 1.11fF -C1180 pd_1/DOWN pd_1/R 0.36fF -C1181 pd_0/UP pd_0/and_pd_0/Out1 0.33fF -C1182 divider_2/mc2 divider_2/and_0/out1 0.06fF -C1183 divider_2/nor_0/Z1 divider_2/and_0/A 0.80fF -C1184 divbuf_23/a_492_n240# divbuf_23/OUT2 0.42fF -C1185 divbuf_15/OUT5 divbuf_15/OUT 43.38fF -C1186 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.36fF -C1187 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/Out 0.05fF -C1188 pll_full_1/ro_complete_0/a2 pll_full_1/divider_0/clk 0.11fF -C1189 divider_0/mc2 divider_0/and_0/out1 0.06fF -C1190 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z3 0.05fF -C1191 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.22fF -C1192 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.04fF -C1193 divider_2/tspc_0/Z4 divider_2/tspc_0/Z3 0.65fF -C1194 divider_0/and_0/A divider_0/and_0/B 0.18fF -C1195 divbuf_3/a_492_n240# divbuf_3/OUT5 0.01fF -C1196 ro_complete_1/a0 ro_complete_1/cbank_1/switch_5/vin 0.09fF -C1197 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C1198 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z4 0.21fF -C1199 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/nor_1/B 0.38fF -C1200 divider_1/tspc_2/Q divider_1/tspc_1/Z2 0.14fF -C1201 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z2 0.01fF -C1202 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/B 0.08fF -C1203 divider_2/nor_1/Z1 divider_2/and_0/B 0.78fF -C1204 divider_1/and_0/out1 divider_1/and_0/B 0.18fF -C1205 pll_full_0/pd_0/DIV pll_full_0/pd_0/R 0.51fF -C1206 divbuf_17/OUT5 divbuf_17/OUT 43.38fF -C1207 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_2/Q 0.19fF -C1208 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/clk 0.01fF -C1209 divider_2/nor_1/B divider_2/and_0/B 0.29fF -C1210 divbuf_9/IN divbuf_9/OUT5 0.00fF -C1211 pll_full_1/divbuf_0/OUT3 pll_full_1/divbuf_0/OUT2 1.37fF -C1212 divbuf_0/OUT divbuf_0/OUT2 0.06fF -C1213 ro_complete_0/cbank_0/switch_0/vin divbuf_4/OUT 0.12fF -C1214 divbuf_5/OUT ro_complete_0/cbank_0/switch_3/vin 0.09fF -C1215 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF -C1216 divider_0/mc2 divider_0/nor_0/B 0.06fF -C1217 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.16fF -C1218 pll_full_1/ro_complete_0/cbank_1/switch_0/vin pll_full_1/divider_0/clk 1.58fF -C1219 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_0/z1 0.24fF -C1220 ro_complete_1/a2 ro_complete_1/cbank_2/switch_2/vin 0.14fF -C1221 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF -C1222 divbuf_4/a_492_n240# divbuf_4/OUT5 0.01fF -C1223 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/v 1.30fF -C1224 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z4 0.36fF -C1225 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF -C1226 divbuf_20/OUT3 divbuf_20/OUT5 0.01fF -C1227 divbuf_20/OUT2 divbuf_20/OUT 0.06fF -C1228 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/z5 0.20fF -C1229 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z4 0.20fF -C1230 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF -C1231 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF -C1232 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/clk 0.11fF -C1233 divider_1/nor_0/B divider_1/and_0/B 0.31fF -C1234 divider_1/tspc_2/Q divider_1/nor_0/A 0.55fF -C1235 divider_1/and_0/OUT divider_1/prescaler_0/nand_0/z1 0.01fF -C1236 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_3/vin 0.09fF -C1237 divider_2/tspc_0/Z2 divider_2/nor_0/B 0.20fF -C1238 divider_2/tspc_0/a_630_n680# divider_2/nor_1/B 0.35fF -C1239 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z4 0.08fF -C1240 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z3 0.05fF -C1241 divider_2/tspc_2/a_630_n680# divider_2/nor_0/A 0.35fF -C1242 divider_2/prescaler_0/tspc_0/D divider_2/clk 0.29fF -C1243 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF -C1244 pll_full_0/pd_0/REF pll_full_0/divbuf_1/a_492_n240# 0.13fF -C1245 divider_0/tspc_0/Z1 divider_0/tspc_0/Z4 0.00fF -C1246 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z2 0.19fF -C1247 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 1.07fF -C1248 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.12fF -C1249 divbuf_17/IN divbuf_17/a_492_n240# 0.13fF -C1250 divider_1/mc2 divider_1/and_0/OUT 0.05fF -C1251 divbuf_14/OUT divbuf_14/OUT4 1.11fF -C1252 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF -C1253 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.26fF -C1254 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_0/vin 0.19fF -C1255 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z1 0.06fF -C1256 divider_1/nor_0/B divider_1/tspc_1/Q 0.51fF -C1257 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/tspc_2/Z4 0.21fF -C1258 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z3 0.16fF -C1259 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.01fF -C1260 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF -C1261 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF -C1262 pll_full_0/ro_complete_0/a2 pll_full_0/divider_0/clk 0.11fF -C1263 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF -C1264 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF -C1265 divider_1/and_0/OUT divider_1/clk 0.04fF -C1266 divbuf_12/OUT3 divbuf_12/OUT4 5.16fF -C1267 divbuf_12/OUT2 divbuf_12/OUT5 0.02fF -C1268 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/Qbar 0.01fF -C1269 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C1270 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF -C1271 divider_2/prescaler_0/tspc_1/Z2 divider_2/and_0/OUT 0.06fF -C1272 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z3 0.33fF -C1273 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Q 0.38fF -C1274 divider_2/prescaler_0/tspc_0/Z2 divider_2/clk 0.11fF -C1275 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.03fF -C1276 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT3 0.26fF -C1277 divider_2/and_0/out1 divider_2/and_0/A 0.01fF -C1278 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.33fF -C1279 divbuf_2/OUT ro_complete_0/cbank_1/v 0.10fF -C1280 ro_complete_0/cbank_0/switch_5/vin divbuf_7/OUT 0.09fF -C1281 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT 43.38fF -C1282 divbuf_14/OUT2 divbuf_14/OUT 0.06fF -C1283 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF -C1284 divider_0/tspc_1/Q divider_0/tspc_1/Z3 0.05fF -C1285 divider_0/Out divider_0/nor_1/B 0.22fF -C1286 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/clk 0.11fF -C1287 divbuf_16/a_492_n240# divbuf_16/OUT 0.00fF -C1288 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_0/Z1 0.01fF -C1289 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/nor_1/B 0.35fF -C1290 divider_2/prescaler_0/Out divider_2/prescaler_0/m1_2700_2190# 0.11fF -C1291 divider_1/tspc_1/Z1 divider_1/tspc_1/Z3 0.06fF -C1292 divider_1/tspc_2/Q divider_1/tspc_1/a_630_n680# 0.01fF -C1293 divbuf_6/OUT4 divbuf_6/OUT5 20.26fF -C1294 pll_full_1/divbuf_1/a_492_n240# pll_full_1/divbuf_1/OUT5 0.01fF -C1295 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.04fF -C1296 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF -C1297 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/divider_0/clk 1.58fF -C1298 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z2 0.23fF -C1299 divider_1/nor_0/A divider_1/and_0/A 0.01fF -C1300 pd_1/tspc_r_0/z5 pd_1/tspc_r_0/Z3 0.11fF -C1301 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/a0 0.09fF -C1302 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/DOWN 0.11fF -C1303 divbuf_19/OUT divbuf_19/OUT3 0.26fF -C1304 divbuf_19/OUT5 divbuf_19/OUT4 20.26fF -C1305 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/clk 0.01fF -C1306 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.11fF -C1307 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C1308 divbuf_1/OUT5 divbuf_1/a_492_n240# 0.01fF -C1309 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF -C1310 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF -C1311 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF -C1312 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF -C1313 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.64fF -C1314 divbuf_17/IN divbuf_17/OUT5 0.00fF -C1315 ro_complete_1/cbank_0/v ro_complete_1/cbank_2/v 0.04fF -C1316 divider_1/prescaler_0/m1_2700_2190# divider_1/nor_0/A 0.01fF -C1317 divider_1/prescaler_0/Out divider_1/tspc_2/Z4 0.12fF -C1318 divider_1/tspc_1/Z2 divider_1/tspc_1/Z3 0.16fF -C1319 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/D 0.15fF -C1320 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z4 0.15fF -C1321 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/nor_1/B 0.22fF -C1322 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF -C1323 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF -C1324 pd_0/tspc_r_0/Z3 pd_0/DOWN 0.03fF -C1325 divbuf_22/OUT3 divbuf_22/OUT5 0.01fF -C1326 divbuf_22/OUT2 divbuf_22/OUT 0.06fF -C1327 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/Out 0.45fF -C1328 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF -C1329 divider_2/mc2 divider_2/nor_0/B 0.06fF -C1330 divider_2/tspc_2/Q divider_2/tspc_1/Z2 0.14fF -C1331 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z4 0.20fF -C1332 pd_1/REF pd_1/tspc_r_1/z5 0.04fF -C1333 pd_1/tspc_r_1/Z1 pd_1/tspc_r_1/Z2 0.71fF -C1334 pll_full_0/pd_0/DOWN pll_full_0/cp_0/a_1710_0# 0.04fF -C1335 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/R 0.01fF -C1336 divbuf_18/OUT5 divbuf_18/a_492_n240# 0.01fF -C1337 divbuf_0/OUT5 divbuf_0/OUT2 0.02fF -C1338 ro_complete_0/cbank_0/switch_1/vin divbuf_3/OUT 0.13fF -C1339 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF -C1340 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF -C1341 pll_full_1/ro_complete_0/cbank_1/switch_5/vin pll_full_1/divider_0/clk 1.46fF -C1342 divbuf_5/OUT divbuf_5/OUT4 1.11fF -C1343 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C1344 divider_0/tspc_1/Z4 divider_0/nor_0/A 0.02fF -C1345 io_clamp_low[1] io_analog[5] 0.53fF -C1346 divider_1/tspc_0/Z1 divider_1/tspc_0/Z3 0.06fF -C1347 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z4 0.00fF -C1348 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF -C1349 divbuf_21/a_492_n240# divbuf_21/OUT5 0.01fF -C1350 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/Z3 0.05fF -C1351 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/clk 0.11fF -C1352 pd_1/DIV pd_1/tspc_r_0/z5 0.04fF -C1353 divbuf_18/OUT3 divbuf_18/OUT 0.26fF -C1354 divider_2/tspc_2/Q divider_2/nor_0/A 0.55fF -C1355 divider_2/nor_1/B divider_2/tspc_1/Q 0.22fF -C1356 divbuf_24/OUT3 divbuf_24/OUT4 5.16fF -C1357 divbuf_24/OUT2 divbuf_24/OUT5 0.02fF -C1358 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a5 0.09fF -C1359 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF -C1360 divider_0/nor_0/B divider_0/tspc_0/Z4 0.02fF -C1361 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z4 0.00fF -C1362 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF -C1363 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/clk 0.51fF -C1364 divbuf_6/OUT divbuf_6/a_492_n240# 0.00fF -C1365 ro_complete_1/a4 ro_complete_1/cbank_2/switch_0/vin 0.12fF -C1366 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF -C1367 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF -C1368 divider_0/nor_0/A divider_0/tspc_2/Z3 0.38fF -C1369 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF -C1370 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z3 0.06fF -C1371 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF -C1372 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C1373 divider_1/nor_0/A divider_1/tspc_2/Z1 0.03fF -C1374 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z3 0.05fF -C1375 divbuf_7/OUT4 divbuf_7/OUT5 20.26fF -C1376 pll_full_1/divbuf_1/OUT3 pll_full_1/divbuf_1/OUT4 5.16fF -C1377 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/OUT5 43.38fF -C1378 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z1 0.17fF -C1379 divbuf_19/OUT5 divbuf_19/a_492_n240# 0.01fF -C1380 divider_2/mc2 divider_2/and_0/A 0.16fF -C1381 divider_2/prescaler_0/tspc_2/Z2 divider_2/and_0/OUT 0.05fF -C1382 divbuf_2/IN divbuf_2/OUT5 0.00fF -C1383 divbuf_7/OUT ro_complete_0/cbank_2/switch_4/vin 0.13fF -C1384 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF -C1385 divbuf_14/IN divbuf_14/a_492_n240# 0.13fF -C1386 divider_0/mc2 divider_0/and_0/A 0.16fF -C1387 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF -C1388 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF -C1389 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.01fF -C1390 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/clk 0.11fF -C1391 divbuf_3/OUT3 divbuf_3/OUT4 5.16fF -C1392 ro_complete_1/a0 ro_complete_1/cbank_1/v 0.05fF -C1393 divider_2/tspc_0/Z4 divider_2/tspc_0/a_630_n680# 0.12fF -C1394 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_1/a_630_n680# 0.00fF -C1395 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z3 0.05fF -C1396 divbuf_10/a_492_n240# divbuf_10/OUT 0.00fF -C1397 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C1398 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/divider_0/clk 1.46fF -C1399 divider_2/tspc_2/Q divider_2/tspc_1/Z1 0.01fF -C1400 divider_2/tspc_1/a_630_n680# divider_2/nor_0/B 0.35fF -C1401 divider_1/and_0/A divider_1/and_0/B 0.18fF -C1402 divbuf_9/OUT3 divbuf_9/OUT5 0.01fF -C1403 divbuf_9/OUT2 divbuf_9/OUT 0.06fF -C1404 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.13fF -C1405 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z4 0.02fF -C1406 divider_2/tspc_1/Z2 divider_2/nor_0/A 0.15fF -C1407 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_0/D 0.32fF -C1408 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/clk 0.01fF -C1409 divider_2/nor_0/B divider_2/and_0/A 0.26fF -C1410 divbuf_5/OUT ro_complete_0/cbank_2/switch_3/vin 0.09fF -C1411 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.36fF -C1412 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF -C1413 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/z5 0.04fF -C1414 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z2 0.71fF -C1415 divbuf_1/OUT divbuf_1/OUT4 1.11fF -C1416 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_4/vin 0.20fF -C1417 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/and_pd_0/Out1 0.05fF -C1418 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT2 0.02fF -C1419 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF -C1420 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/Q 0.04fF -C1421 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF -C1422 divbuf_7/OUT divbuf_7/OUT3 0.26fF -C1423 divbuf_4/OUT2 divbuf_4/OUT3 1.37fF -C1424 ro_complete_1/cbank_2/switch_0/vin ro_complete_1/cbank_2/v 1.45fF -C1425 divbuf_20/OUT4 divbuf_20/OUT 1.11fF -C1426 divider_1/prescaler_0/tspc_2/D divider_1/prescaler_0/nand_0/z1 0.24fF -C1427 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF -C1428 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C1429 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/clk 0.51fF -C1430 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF -C1431 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z2 1.07fF -C1432 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z4 0.12fF -C1433 divbuf_8/a_492_n240# divbuf_8/OUT5 0.01fF -C1434 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/OUT2 0.06fF -C1435 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_3/vin 0.09fF -C1436 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C1437 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Out1 0.05fF -C1438 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z2 0.01fF -C1439 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF -C1440 ro_complete_1/a2 ro_complete_1/cbank_1/switch_3/vin 0.09fF -C1441 divbuf_0/OUT2 divbuf_0/a_492_n240# 0.42fF -C1442 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF -C1443 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.16fF -C1444 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/clk 0.14fF -C1445 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/and_pd_0/Z1 0.02fF -C1446 divbuf_14/OUT divbuf_14/OUT3 0.26fF -C1447 divbuf_5/OUT2 divbuf_5/OUT3 1.37fF -C1448 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z3 0.05fF -C1449 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z1 0.00fF -C1450 divider_1/tspc_0/Z1 divider_1/tspc_0/Z4 0.00fF -C1451 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z2 0.19fF -C1452 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z4 0.36fF -C1453 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z2 0.01fF -C1454 divider_1/and_0/OUT divider_1/and_0/out1 0.31fF -C1455 divider_1/prescaler_0/tspc_2/D divider_1/clk 0.26fF -C1456 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF -C1457 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/clk 0.11fF -C1458 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z4 0.20fF -C1459 pd_0/REF pd_0/tspc_r_1/z5 0.04fF -C1460 pd_0/tspc_r_1/Z1 pd_0/tspc_r_1/Z2 0.71fF -C1461 divider_2/tspc_1/Q divider_2/tspc_0/Z1 0.01fF -C1462 divider_2/tspc_1/Z1 divider_2/tspc_1/Z2 1.07fF -C1463 divider_2/nor_0/B divider_2/tspc_1/Z3 0.38fF -C1464 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z4 0.08fF -C1465 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z3 0.05fF -C1466 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Q 0.04fF -C1467 divbuf_12/OUT3 divbuf_12/OUT 0.26fF -C1468 divbuf_12/OUT4 divbuf_12/OUT5 20.26fF -C1469 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.08fF -C1470 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT4 1.11fF -C1471 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar 0.02fF -C1472 divbuf_14/OUT2 divbuf_14/a_492_n240# 0.42fF -C1473 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF -C1474 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF -C1475 divbuf_5/OUT ro_complete_0/cbank_2/v 0.05fF -C1476 ro_complete_1/a3 ro_complete_1/cbank_1/v 0.05fF -C1477 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF -C1478 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z2 0.01fF -C1479 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_0/Z3 0.45fF -C1480 filter_0/v divbuf_25/OUT4 1.11fF -C1481 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF -C1482 divider_1/tspc_1/Z1 divider_1/tspc_1/Z4 0.00fF -C1483 divider_1/tspc_1/Q divider_1/tspc_1/Z3 0.05fF -C1484 divider_1/Out divider_1/nor_1/B 0.22fF -C1485 divbuf_11/a_492_n240# divbuf_11/OUT 0.00fF -C1486 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF -C1487 cp_0/a_1710_n2840# cp_0/upbar 0.29fF -C1488 pd_1/R pd_1/REF 0.61fF -C1489 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z2 0.25fF -C1490 divbuf_18/OUT5 divbuf_18/OUT 43.38fF -C1491 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/v 0.05fF -C1492 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF -C1493 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.28fF -C1494 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar 0.03fF -C1495 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF -C1496 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF -C1497 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_4/vin 0.20fF -C1498 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF -C1499 divider_2/tspc_0/Z4 divider_2/tspc_1/Q 0.15fF -C1500 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/Z1 0.01fF -C1501 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_0/B 0.35fF -C1502 divbuf_20/a_492_n240# divbuf_20/IN 0.13fF -C1503 pll_full_1/cp_0/down pll_full_1/cp_0/a_1710_0# 0.32fF -C1504 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/R 0.21fF -C1505 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C1506 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF -C1507 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/clk 0.14fF -C1508 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.78fF -C1509 divider_1/tspc_1/Z2 divider_1/tspc_1/Z4 0.36fF -C1510 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/D 0.05fF -C1511 divider_1/prescaler_0/tspc_0/Z3 divider_1/clk 0.64fF -C1512 divbuf_22/OUT4 divbuf_22/OUT 1.11fF -C1513 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z1 0.09fF -C1514 pd_0/DIV pd_0/tspc_r_0/Z2 0.19fF -C1515 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z3 0.05fF -C1516 divider_2/tspc_0/Z3 divider_2/tspc_0/a_630_n680# 0.05fF -C1517 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.01fF -C1518 pll_full_1/divider_0/tspc_2/Z4 pll_full_1/divider_0/prescaler_0/Out 0.12fF -C1519 cp_0/upbar cp_0/down 0.02fF -C1520 pd_1/tspc_r_1/Qbar1 pd_1/tspc_r_1/z5 0.20fF -C1521 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/z5 0.11fF -C1522 divbuf_13/a_492_n240# divbuf_13/OUT5 0.01fF -C1523 divbuf_5/OUT ro_complete_0/cbank_1/switch_2/vin 0.14fF -C1524 divider_0/tspc_0/a_630_n680# divider_0/Out 0.04fF -C1525 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.91fF -C1526 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C1527 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF -C1528 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.45fF -C1529 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/a1 0.14fF -C1530 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/a3 0.09fF -C1531 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/a_492_n240# 0.42fF -C1532 ro_complete_1/cbank_2/switch_5/vin ro_complete_1/cbank_2/v 1.30fF -C1533 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF -C1534 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z4 0.65fF -C1535 divbuf_21/OUT2 divbuf_21/OUT3 1.37fF -C1536 pll_full_1/pd_0/DIV pll_full_1/pd_0/tspc_r_0/Qbar1 0.12fF -C1537 divider_2/prescaler_0/Out divider_2/tspc_2/Z3 0.45fF -C1538 divider_1/tspc_1/Z4 divider_1/nor_0/A 0.02fF -C1539 pd_0/R pd_0/tspc_r_1/Qbar 0.03fF -C1540 pd_1/and_pd_0/Out1 pd_1/and_pd_0/Z1 0.18fF -C1541 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/z5 0.03fF -C1542 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/R 0.21fF -C1543 divider_2/nor_0/A divider_2/and_0/B 0.08fF -C1544 divbuf_24/OUT3 divbuf_24/OUT 0.26fF -C1545 divbuf_24/OUT4 divbuf_24/OUT5 20.26fF -C1546 divbuf_2/OUT divbuf_2/OUT2 0.06fF -C1547 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Z4 0.65fF -C1548 divider_0/nor_0/A divider_0/tspc_2/Z4 0.21fF -C1549 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF -C1550 divbuf_3/IN divbuf_3/a_492_n240# 0.13fF -C1551 divbuf_1/a_492_n240# divbuf_1/IN 0.13fF -C1552 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/v 1.30fF -C1553 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C1554 divbuf_6/a_492_n240# divbuf_6/OUT2 0.42fF -C1555 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z3 0.45fF -C1556 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/nor_1/B 0.40fF -C1557 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z4 0.12fF -C1558 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF -C1559 divider_1/nor_0/B divider_1/tspc_0/Z4 0.02fF -C1560 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z4 0.00fF -C1561 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/A 0.01fF -C1562 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF -C1563 divider_1/tspc_2/Z1 divider_1/tspc_2/Z2 1.07fF -C1564 divider_1/nor_0/A divider_1/tspc_2/Z3 0.38fF -C1565 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z4 0.12fF -C1566 divbuf_23/a_492_n240# divbuf_23/OUT 0.00fF -C1567 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Out1 0.05fF -C1568 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Q 0.20fF -C1569 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/D 0.09fF -C1570 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF -C1571 divbuf_15/OUT5 divbuf_15/OUT3 0.01fF -C1572 divbuf_15/OUT divbuf_15/OUT2 0.06fF -C1573 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.01fF -C1574 divider_0/prescaler_0/Out divider_0/tspc_2/a_630_n680# 0.01fF -C1575 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF -C1576 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF -C1577 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/divider_0/prescaler_0/nand_1/z1 0.21fF -C1578 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF -C1579 divider_0/and_0/B divider_0/and_0/Z1 0.07fF -C1580 divbuf_3/OUT4 divbuf_3/OUT5 20.26fF -C1581 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/nor_0/B 0.47fF -C1582 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_1/Z3 0.05fF -C1583 pll_full_1/pd_0/UP pll_full_1/pd_0/tspc_r_1/Z3 0.03fF -C1584 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z4 0.12fF -C1585 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z3 0.06fF -C1586 divbuf_10/IN divbuf_10/OUT5 0.00fF -C1587 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF -C1588 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C1589 divbuf_22/a_492_n240# divbuf_22/IN 0.13fF -C1590 divbuf_9/OUT4 divbuf_9/OUT 1.11fF -C1591 cp_0/a_1710_n2840# cp_0/out 0.61fF -C1592 pd_1/DOWN pd_1/and_pd_0/Out1 0.12fF -C1593 pd_1/REF pd_1/tspc_r_1/Qbar1 0.12fF -C1594 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/nand_1/z1 0.22fF -C1595 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/tspc_0/D 0.04fF -C1596 divbuf_5/OUT ro_complete_0/cbank_0/switch_2/vin 0.14fF -C1597 ro_complete_0/cbank_0/switch_1/vin divbuf_4/OUT 0.09fF -C1598 ro_complete_0/cbank_0/switch_0/vin divbuf_2/OUT 0.09fF -C1599 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF -C1600 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF -C1601 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF -C1602 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z3 0.33fF -C1603 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.15fF -C1604 pll_full_1/ro_complete_0/a0 pll_full_1/divider_0/clk 0.11fF -C1605 divbuf_5/OUT divbuf_5/a_492_n240# 0.00fF -C1606 divbuf_3/OUT divbuf_3/OUT3 0.26fF -C1607 divbuf_1/OUT2 divbuf_1/OUT3 1.37fF -C1608 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF -C1609 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT2 0.02fF -C1610 divbuf_7/OUT divbuf_7/OUT5 43.38fF -C1611 divbuf_4/OUT3 divbuf_4/OUT4 5.16fF -C1612 divbuf_4/OUT2 divbuf_4/OUT5 0.02fF -C1613 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/a_630_n680# 0.01fF -C1614 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/Z4 0.02fF -C1615 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/Q 0.04fF -C1616 divider_1/prescaler_0/tspc_1/Z3 divider_1/clk 0.45fF -C1617 divbuf_8/OUT2 divbuf_8/OUT3 1.37fF -C1618 pll_full_1/divbuf_1/OUT3 pll_full_1/divbuf_1/OUT5 0.01fF -C1619 pll_full_1/divbuf_1/OUT2 pll_full_1/divbuf_1/OUT 0.06fF -C1620 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.14fF -C1621 divbuf_18/OUT3 divbuf_18/OUT5 0.01fF -C1622 divider_2/tspc_0/Z3 divider_2/tspc_1/Q 0.45fF -C1623 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z3 0.16fF -C1624 divider_2/nor_0/A divider_2/tspc_2/Z2 0.23fF -C1625 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF -C1626 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.36fF -C1627 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF -C1628 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF -C1629 divider_1/nor_1/Z1 divider_1/nor_1/B 0.06fF -C1630 divbuf_5/OUT3 divbuf_5/OUT4 5.16fF -C1631 divbuf_5/OUT2 divbuf_5/OUT5 0.02fF -C1632 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF -C1633 divbuf_17/OUT4 divbuf_17/OUT5 20.26fF -C1634 divbuf_7/a_492_n240# divbuf_7/OUT2 0.42fF -C1635 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF -C1636 divbuf_12/OUT5 divbuf_12/OUT 43.38fF -C1637 pd_0/R pd_0/and_pd_0/Z1 0.02fF -C1638 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/z5 0.20fF -C1639 divider_2/nor_0/B divider_2/tspc_1/Z4 0.21fF -C1640 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z2 1.07fF -C1641 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z4 0.12fF -C1642 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT5 43.38fF -C1643 divider_2/and_0/out1 divider_2/and_0/Z1 0.36fF -C1644 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z2 0.01fF -C1645 divbuf_2/OUT divbuf_2/a_492_n240# 0.00fF -C1646 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/a_492_n240# 0.01fF -C1647 divbuf_15/OUT5 divbuf_15/a_492_n240# 0.01fF -C1648 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF -C1649 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_2/D 0.16fF -C1650 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.03fF -C1651 ro_complete_1/a4 ro_complete_1/cbank_2/v 0.05fF -C1652 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_0/vin 0.19fF -C1653 divbuf_25/OUT2 divbuf_25/OUT5 0.02fF -C1654 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_0/Z4 0.15fF -C1655 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/Z2 0.40fF -C1656 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divbuf_0/IN 0.04fF -C1657 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_1/Q 0.13fF -C1658 divider_1/prescaler_0/m1_2700_2190# divider_1/and_0/OUT 0.14fF -C1659 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z4 0.15fF -C1660 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF -C1661 pll_full_0/ro_complete_0/a0 pll_full_0/divider_0/clk 0.11fF -C1662 divbuf_17/OUT3 divbuf_17/OUT5 0.01fF -C1663 divbuf_11/IN divbuf_11/OUT5 0.00fF -C1664 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/a_492_n240# 0.00fF -C1665 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF -C1666 divbuf_9/a_492_n240# divbuf_9/IN 0.13fF -C1667 pd_1/R pd_1/tspc_r_1/Qbar1 0.30fF -C1668 pd_1/tspc_r_0/Z3 pd_1/tspc_r_0/Qbar1 0.38fF -C1669 pd_0/and_pd_0/Out1 pd_0/and_pd_0/Z1 0.18fF -C1670 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/Qbar 0.01fF -C1671 divider_2/prescaler_0/tspc_1/Z2 divider_2/clk 0.11fF -C1672 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Qbar1 0.12fF -C1673 pll_full_1/ro_complete_0/a3 pll_full_1/divider_0/clk 0.11fF -C1674 divbuf_7/OUT ro_complete_0/cbank_2/switch_5/vin 0.09fF -C1675 pll_full_1/pd_0/UP pll_full_1/pd_0/tspc_r_1/Qbar1 0.11fF -C1676 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF -C1677 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF -C1678 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF -C1679 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Z2 0.01fF -C1680 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/Z3 0.45fF -C1681 divider_1/prescaler_0/tspc_2/Z4 divider_1/prescaler_0/tspc_2/D 0.11fF -C1682 divider_1/prescaler_0/tspc_0/Z4 divider_1/clk 0.12fF -C1683 filter_0/v divbuf_25/a_492_n240# 0.00fF -C1684 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF -C1685 pd_0/DIV pd_0/R 0.51fF -C1686 divbuf_17/OUT4 divbuf_17/OUT 1.11fF -C1687 divider_2/mc2 divider_2/prescaler_0/tspc_2/a_630_n680# 0.33fF -C1688 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z4 0.12fF -C1689 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/a_630_n680# 0.19fF -C1690 divbuf_13/OUT2 divbuf_13/OUT3 1.37fF -C1691 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.09fF -C1692 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z2 0.71fF -C1693 divbuf_4/OUT divbuf_2/OUT 1.95fF -C1694 divider_0/mc2 divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF -C1695 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF -C1696 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.09fF -C1697 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/a1 0.14fF -C1698 pll_full_1/pd_0/UP pll_full_1/pd_0/DOWN 4.58fF -C1699 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF -C1700 io_clamp_high[0] io_analog[4] 0.53fF -C1701 divbuf_5/a_492_n240# divbuf_5/IN 0.13fF -C1702 divider_1/tspc_0/a_630_n680# divider_1/Out 0.04fF -C1703 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/nor_0/A 0.35fF -C1704 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/and_0/A 0.26fF -C1705 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z2 0.01fF -C1706 divider_2/prescaler_0/Out divider_2/tspc_2/Z4 0.12fF -C1707 divider_1/prescaler_0/tspc_2/Z3 divider_1/clk 0.45fF -C1708 divbuf_21/OUT3 divbuf_21/OUT4 5.16fF -C1709 divbuf_21/OUT2 divbuf_21/OUT5 0.02fF -C1710 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/tspc_r_0/Z4 0.14fF -C1711 pd_1/DIV pd_1/tspc_r_0/Qbar1 0.12fF -C1712 pd_0/REF pd_0/tspc_r_1/Qbar1 0.12fF -C1713 divbuf_17/OUT3 divbuf_17/OUT 0.26fF -C1714 divbuf_12/a_492_n240# divbuf_12/OUT2 0.42fF -C1715 divbuf_24/OUT5 divbuf_24/OUT 43.38fF -C1716 filter_0/a_4216_n2998# filter_0/v 0.36fF -C1717 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z4 0.14fF -C1718 divbuf_6/OUT divbuf_6/OUT2 0.06fF -C1719 ro_complete_1/a5 ro_complete_1/cbank_2/switch_0/vin 0.09fF -C1720 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/and_pd_0/Out1 0.18fF -C1721 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF -C1722 pll_full_0/ro_complete_0/a3 pll_full_0/divider_0/clk 0.11fF -C1723 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Z4 0.65fF -C1724 divider_1/nor_0/A divider_1/tspc_2/Z4 0.21fF -C1725 divider_1/tspc_2/Z2 divider_1/tspc_2/Z3 0.16fF -C1726 pd_1/DOWN pd_1/tspc_r_0/Z3 0.03fF -C1727 divider_2/tspc_1/Z3 divider_2/tspc_1/Z4 0.65fF -C1728 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Q 0.04fF -C1729 divbuf_23/IN divbuf_23/OUT5 0.00fF -C1730 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.11fF -C1731 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/a_492_n240# 0.00fF -C1732 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/z5 0.04fF -C1733 divider_0/prescaler_0/Out divider_0/nor_0/A 0.15fF -C1734 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF -C1735 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.14fF -C1736 divider_0/nor_1/Z1 divider_0/and_0/B 0.78fF -C1737 divbuf_2/OUT3 divbuf_2/OUT5 0.01fF -C1738 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF -C1739 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/nor_0/B 0.20fF -C1740 divbuf_10/OUT3 divbuf_10/OUT5 0.01fF -C1741 divbuf_10/OUT2 divbuf_10/OUT 0.06fF -C1742 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF -C1743 divider_1/prescaler_0/Out divider_1/tspc_2/a_630_n680# 0.01fF -C1744 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z4 0.00fF -C1745 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Q 0.21fF -C1746 divbuf_19/OUT5 divbuf_19/OUT 43.38fF -C1747 divider_1/and_0/B divider_1/and_0/Z1 0.07fF -C1748 pll_full_1/divider_0/and_0/B pll_full_1/divider_0/nor_1/Z1 0.78fF -C1749 pd_1/tspc_r_1/Z3 pd_1/UP 0.03fF -C1750 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/nand_1/z1 0.01fF -C1751 divider_2/prescaler_0/tspc_2/Z2 divider_2/clk 0.11fF -C1752 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z4 0.08fF -C1753 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF -C1754 divbuf_3/OUT divbuf_3/OUT5 43.38fF -C1755 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF -C1756 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT3 0.26fF -C1757 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT4 20.26fF -C1758 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C1759 divbuf_4/OUT4 divbuf_4/OUT5 20.26fF -C1760 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Qbar1 0.20fF -C1761 pll_full_0/filter_0/a_4216_n5230# pll_full_0/divider_0/clk 1.58fF -C1762 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF -C1763 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z3 0.33fF -C1764 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_2/Z3 0.05fF -C1765 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/nor_0/A 1.21fF -C1766 divbuf_16/OUT2 divbuf_16/OUT5 0.02fF -C1767 divider_1/prescaler_0/tspc_1/Z4 divider_1/clk 0.12fF -C1768 pd_0/DOWN pd_0/UP 0.46fF -C1769 pd_0/tspc_r_0/Z4 pd_0/tspc_r_0/z5 0.04fF -C1770 divbuf_18/IN divbuf_18/a_492_n240# 0.13fF -C1771 divider_2/tspc_0/a_630_n680# divider_2/tspc_1/Q 0.01fF -C1772 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z4 0.36fF -C1773 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_0/D 0.09fF -C1774 divbuf_8/OUT3 divbuf_8/OUT4 5.16fF -C1775 divbuf_8/OUT2 divbuf_8/OUT5 0.02fF -C1776 pll_full_1/divbuf_1/OUT4 pll_full_1/divbuf_1/OUT 1.11fF -C1777 divider_2/tspc_2/Z1 divider_2/tspc_2/Z3 0.06fF -C1778 divbuf_24/a_492_n240# divbuf_24/OUT2 0.42fF -C1779 divider_0/tspc_0/Z2 divider_0/nor_1/B 0.40fF -C1780 divider_0/tspc_0/Z3 divider_0/Out 0.05fF -C1781 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF -C1782 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_0/vin 0.19fF -C1783 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF -C1784 divider_0/prescaler_0/tspc_2/Q divider_0/clk 0.05fF -C1785 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/a0 0.13fF -C1786 divbuf_5/OUT4 divbuf_5/OUT5 20.26fF -C1787 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF -C1788 divbuf_16/OUT3 divbuf_16/OUT2 1.37fF -C1789 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/and_0/A 0.01fF -C1790 divbuf_16/IN divbuf_16/OUT5 0.00fF -C1791 divider_1/prescaler_0/tspc_1/Q divider_1/clk 0.60fF -C1792 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z3 0.09fF -C1793 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF -C1794 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z3 0.16fF -C1795 pll_full_1/divider_0/and_0/B pll_full_1/divider_0/and_0/OUT 0.01fF -C1796 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.19fF -C1797 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/Out 0.04fF -C1798 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF -C1799 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF -C1800 divbuf_1/OUT5 divbuf_1/OUT 43.38fF -C1801 divbuf_1/OUT2 divbuf_1/a_492_n240# 0.42fF -C1802 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF -C1803 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF -C1804 divider_1/mc2 divider_1/and_0/out1 0.06fF -C1805 divbuf_14/OUT4 divbuf_14/OUT3 5.16fF -C1806 ro_complete_1/a1 ro_complete_1/cbank_1/v 0.05fF -C1807 pll_full_1/divider_0/nor_1/B pll_full_1/divbuf_0/IN 0.27fF -C1808 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z3 0.06fF -C1809 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_1/B 0.47fF -C1810 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z4 0.65fF -C1811 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z2 0.19fF -C1812 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_1/Q 0.21fF -C1813 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_2/D 0.16fF -C1814 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/D 0.03fF -C1815 divbuf_11/OUT3 divbuf_11/OUT5 0.01fF -C1816 divbuf_11/OUT2 divbuf_11/OUT 0.06fF -C1817 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF -C1818 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/UP 0.03fF -C1819 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF -C1820 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C1821 divider_1/mc2 divider_1/nor_0/B 0.06fF -C1822 divbuf_14/OUT2 divbuf_14/OUT3 1.37fF -C1823 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Q 0.05fF -C1824 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF -C1825 divbuf_7/OUT ro_complete_0/cbank_2/v 0.05fF -C1826 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/Z4 0.15fF -C1827 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_1/Z2 0.30fF -C1828 divbuf_20/a_492_n240# divbuf_20/OUT5 0.01fF -C1829 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Qbar1 0.38fF -C1830 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF -C1831 divbuf_16/OUT3 divbuf_16/OUT5 0.01fF -C1832 pd_1/DIV pd_1/tspc_r_0/Z1 0.17fF -C1833 pd_0/tspc_r_0/Qbar1 pd_0/R 0.01fF -C1834 pd_0/DIV pd_0/tspc_r_0/Z4 0.02fF -C1835 pd_0/DOWN pd_0/tspc_r_0/Qbar 0.21fF -C1836 divbuf_18/OUT2 divbuf_18/a_492_n240# 0.42fF -C1837 divider_2/and_0/OUT divider_2/and_0/B 0.01fF -C1838 divbuf_13/OUT3 divbuf_13/OUT4 5.16fF -C1839 divbuf_13/OUT2 divbuf_13/OUT5 0.02fF -C1840 ro_complete_0/cbank_1/switch_3/vin divbuf_6/OUT 0.14fF -C1841 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/v 0.05fF -C1842 pll_full_0/pd_0/REF pll_full_0/divbuf_1/OUT5 0.00fF -C1843 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z4 0.01fF -C1844 ro_complete_1/a4 ro_complete_1/cbank_2/switch_1/vin 0.09fF -C1845 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/v 1.30fF -C1846 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF -C1847 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z2 0.01fF -C1848 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_1/Q 0.14fF -C1849 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/Out 0.04fF -C1850 divbuf_21/OUT3 divbuf_21/OUT 0.26fF -C1851 divbuf_21/OUT4 divbuf_21/OUT5 20.26fF -C1852 divider_2/prescaler_0/tspc_0/Z3 divider_2/clk 0.64fF -C1853 divider_1/prescaler_0/tspc_2/Z4 divider_1/clk 0.12fF -C1854 pd_0/tspc_r_1/Z3 pd_0/UP 0.03fF -C1855 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/a_630_n680# 0.19fF -C1856 pll_full_0/pd_0/DOWN pll_full_0/pd_0/REF 1.48fF -C1857 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF -C1858 divbuf_2/OUT divbuf_2/OUT4 1.11fF -C1859 divbuf_4/OUT ro_complete_0/cbank_2/switch_0/vin 0.12fF -C1860 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF -C1861 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.06fF -C1862 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/D 0.03fF -C1863 divbuf_6/OUT divbuf_6/OUT4 1.11fF -C1864 divbuf_3/OUT2 divbuf_3/OUT3 1.37fF -C1865 ro_complete_1/a3 ro_complete_1/cbank_2/switch_2/vin 0.09fF -C1866 divbuf_17/OUT2 divbuf_17/a_492_n240# 0.42fF -C1867 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/Z1 0.36fF -C1868 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.18fF -C1869 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C1870 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/OUT3 0.26fF -C1871 divbuf_19/OUT2 divbuf_19/a_492_n240# 0.42fF -C1872 divider_1/tspc_2/Z2 divider_1/tspc_2/Z4 0.36fF -C1873 divbuf_23/OUT3 divbuf_23/OUT5 0.01fF -C1874 divbuf_23/OUT2 divbuf_23/OUT 0.06fF -C1875 pll_full_1/pd_0/DIV pll_full_1/divider_0/and_0/OUT 0.01fF -C1876 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.12fF -C1877 pll_full_0/pd_0/R pll_full_0/pd_0/REF 0.61fF -C1878 divbuf_15/OUT2 divbuf_15/OUT3 1.37fF -C1879 pll_full_1/ro_complete_0/a4 pll_full_1/divider_0/clk 0.01fF -C1880 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a3 0.13fF -C1881 divbuf_3/OUT ro_complete_0/cbank_2/v 0.05fF -C1882 divbuf_15/IN divbuf_15/a_492_n240# 0.13fF -C1883 divbuf_25/OUT3 divbuf_25/OUT5 0.01fF -C1884 divbuf_25/a_492_n240# divbuf_25/IN 0.13fF -C1885 divider_0/prescaler_0/Out divider_0/tspc_2/Z2 0.11fF -C1886 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF -C1887 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/v 1.30fF -C1888 divider_2/Out divider_2/nor_1/B 0.22fF -C1889 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF -C1890 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C1891 divider_1/prescaler_0/Out divider_1/nor_0/A 0.15fF -C1892 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Z4 0.65fF -C1893 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/clk 0.14fF -C1894 divider_1/nor_1/Z1 divider_1/and_0/B 0.78fF -C1895 divbuf_10/OUT4 divbuf_10/OUT 1.11fF -C1896 divbuf_22/a_492_n240# divbuf_22/OUT5 0.01fF -C1897 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/Out 0.01fF -C1898 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C1899 cp_0/a_10_n50# cp_0/vbias 0.19fF -C1900 pd_1/R pd_1/and_pd_0/Out1 0.33fF -C1901 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z1 0.09fF -C1902 pd_1/REF pd_1/tspc_r_1/Z2 0.19fF -C1903 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/v 0.05fF -C1904 divider_2/prescaler_0/tspc_0/D divider_2/prescaler_0/nand_1/z1 0.21fF -C1905 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF -C1906 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF -C1907 divbuf_4/OUT divbuf_4/OUT3 0.26fF -C1908 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/v 1.30fF -C1909 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/Q 0.19fF -C1910 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.01fF -C1911 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z4 0.08fF -C1912 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z3 0.05fF -C1913 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/nor_0/A 0.15fF -C1914 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF -C1915 divbuf_17/OUT2 divbuf_17/OUT5 0.02fF -C1916 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_0/Qbar1 0.11fF -C1917 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.04fF -C1918 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF -C1919 pd_0/R pd_0/REF 0.61fF -C1920 divbuf_8/OUT3 divbuf_8/OUT 0.26fF -C1921 divbuf_8/OUT4 divbuf_8/OUT5 20.26fF -C1922 divider_2/tspc_2/Z1 divider_2/tspc_2/Z4 0.00fF -C1923 divbuf_3/OUT ro_complete_0/cbank_1/switch_2/vin 0.09fF -C1924 divider_0/nor_0/B divider_0/tspc_2/Q 0.22fF -C1925 divider_0/tspc_0/a_630_n680# divider_0/nor_1/B 0.35fF -C1926 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z4 0.08fF -C1927 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF -C1928 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_4/vin 0.20fF -C1929 pll_full_1/pd_0/UP pll_full_1/pd_0/R 0.46fF -C1930 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF -C1931 divider_0/tspc_2/a_630_n680# divider_0/nor_0/A 0.35fF -C1932 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.29fF -C1933 divider_1/tspc_0/Z2 divider_1/nor_1/B 0.40fF -C1934 divider_1/tspc_0/Z3 divider_1/Out 0.05fF -C1935 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z3 0.33fF -C1936 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z1 0.03fF -C1937 pll_full_0/ro_complete_0/a4 pll_full_0/divider_0/clk 0.01fF -C1938 divider_1/and_0/OUT divider_1/and_0/Z1 0.04fF -C1939 divider_1/prescaler_0/tspc_2/Q divider_1/clk 0.05fF -C1940 pll_full_1/pd_0/tspc_r_0/Qbar pll_full_1/pd_0/tspc_r_0/Qbar1 0.01fF -C1941 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/nor_0/A 0.03fF -C1942 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.09fF -C1943 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z4 0.36fF -C1944 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.06fF -C1945 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT2 0.06fF -C1946 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF -C1947 pll_full_0/pd_0/DIV pll_full_0/divider_0/and_0/OUT 0.01fF -C1948 divbuf_15/OUT2 divbuf_15/a_492_n240# 0.42fF -C1949 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.00fF -C1950 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF -C1951 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF -C1952 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF -C1953 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF -C1954 divider_0/nor_0/Z1 divider_0/and_0/A 0.80fF -C1955 ro_complete_1/a5 ro_complete_1/cbank_2/v 0.08fF -C1956 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/Z1 0.17fF -C1957 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C1958 divider_1/mc2 divider_1/and_0/A 0.16fF -C1959 divider_0/and_0/out1 divider_0/and_0/A 0.01fF -C1960 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z4 0.00fF -C1961 divbuf_10/a_492_n240# divbuf_10/IN 0.13fF -C1962 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/nand_0/z1 0.07fF -C1963 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/D 0.05fF -C1964 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z2 0.30fF -C1965 divbuf_18/OUT2 divbuf_18/OUT 0.06fF -C1966 divbuf_17/OUT2 divbuf_17/OUT 0.06fF -C1967 divbuf_16/OUT5 divbuf_16/OUT4 20.26fF -C1968 divbuf_11/OUT4 divbuf_11/OUT 1.11fF -C1969 pd_1/R pd_1/tspc_r_1/Z2 0.21fF -C1970 divbuf_9/a_492_n240# divbuf_9/OUT5 0.01fF -C1971 pll_full_1/divbuf_1/OUT5 pll_full_1/divbuf_1/OUT 43.38fF -C1972 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.20fF -C1973 divider_0/tspc_0/Z2 divider_0/tspc_0/a_630_n680# 0.01fF -C1974 pll_full_1/ro_complete_0/a1 pll_full_1/divider_0/clk 0.11fF -C1975 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF -C1976 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z2 0.19fF -C1977 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/tspc_r_1/Qbar1 0.01fF -C1978 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF -C1979 divider_0/nor_0/B divider_0/and_0/A 0.26fF -C1980 divbuf_7/OUT divbuf_7/a_492_n240# 0.00fF -C1981 divbuf_4/a_492_n240# divbuf_4/OUT2 0.42fF -C1982 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z3 0.06fF -C1983 divbuf_20/OUT2 divbuf_20/OUT3 1.37fF -C1984 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_1/Q 0.13fF -C1985 divbuf_16/OUT3 divbuf_16/OUT4 5.16fF -C1986 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Q 0.05fF -C1987 divider_1/prescaler_0/m1_2700_2190# divider_1/clk 0.01fF -C1988 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z3 0.45fF -C1989 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_0/A 1.21fF -C1990 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/z5 0.11fF -C1991 divider_2/tspc_0/Z2 divider_2/nor_1/B 0.40fF -C1992 divbuf_13/OUT3 divbuf_13/OUT 0.26fF -C1993 divbuf_13/OUT4 divbuf_13/OUT5 20.26fF -C1994 ro_complete_0/cbank_0/switch_3/vin divbuf_6/OUT 0.14fF -C1995 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF -C1996 ro_complete_0/cbank_0/switch_2/vin divbuf_3/OUT 0.09fF -C1997 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z2 0.01fF -C1998 ro_complete_1/a2 ro_complete_1/cbank_2/v 0.05fF -C1999 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/DOWN 0.02fF -C2000 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF -C2001 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/Out 0.05fF -C2002 divider_0/nor_1/B divider_0/and_0/B 0.29fF -C2003 divbuf_5/a_492_n240# divbuf_5/OUT5 0.01fF -C2004 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z3 0.16fF -C2005 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF -C2006 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/a_630_n680# 0.05fF -C2007 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z4 0.01fF -C2008 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/tspc_2/Z2 0.23fF -C2009 divbuf_21/OUT5 divbuf_21/OUT 43.38fF -C2010 divider_2/prescaler_0/tspc_0/Z4 divider_2/clk 0.12fF -C2011 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z1 0.09fF -C2012 pd_0/REF pd_0/tspc_r_1/Z2 0.19fF -C2013 divbuf_12/a_492_n240# divbuf_12/OUT 0.00fF -C2014 pll_full_1/filter_0/a_4216_n5230# pll_full_1/divider_0/clk 1.58fF -C2015 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF -C2016 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/a3 0.09fF -C2017 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF -C2018 divider_0/nor_0/B divider_0/tspc_1/Z3 0.38fF -C2019 divider_0/tspc_1/Q divider_0/nor_1/B 0.22fF -C2020 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF -C2021 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF -C2022 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/nand_0/z1 0.01fF -C2023 divbuf_3/OUT2 divbuf_3/OUT5 0.02fF -C2024 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/a0 0.09fF -C2025 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT3 1.37fF -C2026 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF -C2027 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_0/a_630_n680# 0.01fF -C2028 divbuf_6/IN divbuf_6/OUT5 0.00fF -C2029 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_2/Q 0.01fF -C2030 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/a_630_n680# 0.35fF -C2031 pll_full_0/ro_complete_0/a1 pll_full_0/divider_0/clk 0.11fF -C2032 divider_1/nor_0/Z1 divider_1/and_0/B 0.18fF -C2033 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Q 0.15fF -C2034 divider_1/prescaler_0/tspc_0/Z2 divider_1/and_0/OUT 0.06fF -C2035 divbuf_11/a_492_n240# divbuf_11/IN 0.13fF -C2036 pd_1/R pd_1/tspc_r_0/Z3 0.27fF -C2037 divbuf_23/OUT4 divbuf_23/OUT 1.11fF -C2038 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C0 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF +C1 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/Out 0.21fF +C2 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/z5 0.03fF +C3 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z4 0.12fF +C4 divbuf_3/OUT divbuf_3/OUT4 1.11fF +C5 ro_complete_1/a4 ro_complete_1/cbank_1/switch_1/vin 0.09fF +C6 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.45fF +C7 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C8 divbuf_4/OUT3 divbuf_4/OUT5 0.01fF +C9 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/a_630_n680# 0.05fF +C10 divider_2/tspc_1/Q divider_2/tspc_0/Z3 0.45fF +C11 divider_1/nor_1/Z1 divider_1/nor_1/B 0.06fF +C12 divider_2/tspc_2/Q divider_2/tspc_1/Z2 0.14fF +C13 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z4 0.00fF +C14 divbuf_8/IN divbuf_8/OUT5 0.00fF +C15 cp_0/upbar cp_0/down 0.02fF +C16 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT2 0.06fF +C17 divider_2/tspc_2/Z2 divider_2/tspc_2/Z4 0.36fF +C18 divbuf_24/a_492_n240# divbuf_24/IN 0.13fF +C19 pll_full_1/ro_complete_0/cbank_2/switch_0/vin pll_full_1/ro_complete_0/cbank_2/v 1.45fF +C20 divbuf_4/OUT ro_complete_0/cbank_1/switch_0/vin 0.12fF +C21 divider_0/mc2 divider_0/and_0/OUT 0.05fF +C22 divider_0/tspc_0/Z3 divider_0/nor_1/B 0.38fF +C23 divbuf_5/OUT ro_complete_0/cbank_2/switch_2/vin 0.14fF +C24 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF +C25 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_2/Z2 0.11fF +C26 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C27 pll_full_1/ro_complete_0/cbank_2/v pll_full_1/divider_0/clk 1.36fF +C28 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Q 0.04fF +C29 ro_complete_1/a3 ro_complete_1/cbank_1/switch_2/vin 0.09fF +C30 divbuf_5/OUT3 divbuf_5/OUT5 0.01fF +C31 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/R 0.21fF +C32 divider_1/tspc_0/Z4 divider_1/tspc_0/a_630_n680# 0.12fF +C33 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/tspc_r_0/Qbar 0.01fF +C34 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/Z1 0.03fF +C35 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/clk 0.12fF +C36 divider_1/and_0/OUT divider_1/and_0/B 0.01fF +C37 pd_0/UP pd_0/tspc_r_1/z5 0.03fF +C38 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/DOWN 0.03fF +C39 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z3 0.06fF +C40 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.14fF +C41 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C42 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/tspc_1/Q 0.45fF +C43 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.05fF +C44 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF +C45 ro_complete_1/a2 ro_complete_1/cbank_2/switch_3/vin 0.09fF +C46 divbuf_3/OUT ro_complete_0/cbank_1/v 0.05fF +C47 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/a_740_n680# 0.19fF +C48 divider_0/and_0/out1 divider_0/and_0/A 0.01fF +C49 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF +C50 divbuf_1/OUT4 divbuf_1/OUT3 5.16fF +C51 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/switch_5/vin 0.20fF +C52 divider_1/tspc_1/Z3 divider_1/tspc_1/Z4 0.65fF +C53 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/a_630_n680# 0.19fF +C54 divbuf_11/OUT2 divbuf_11/OUT5 0.02fF +C55 divbuf_11/OUT3 divbuf_11/OUT4 5.16fF +C56 divbuf_18/OUT2 divbuf_18/OUT3 1.37fF +C57 io_clamp_low[0] io_analog[4] 0.53fF +C58 divbuf_18/OUT3 divbuf_18/OUT5 0.01fF +C59 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/Q 0.04fF +C60 divider_2/prescaler_0/tspc_1/Z3 divider_2/clk 0.45fF +C61 divider_2/nor_0/B divider_2/nor_0/A 1.21fF +C62 divbuf_9/a_492_n240# divbuf_9/OUT2 0.42fF +C63 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF +C64 divider_0/tspc_0/Z3 divider_0/Out 0.05fF +C65 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C66 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/and_0/A 0.80fF +C67 pll_full_1/ro_complete_0/cbank_1/switch_2/vin pll_full_1/divider_0/clk 1.46fF +C68 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/Out 0.11fF +C69 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/Z1 0.04fF +C70 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z2 0.01fF +C71 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/clk 0.05fF +C72 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.45fF +C73 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_0/Qbar1 0.11fF +C74 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z2 0.11fF +C75 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C76 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/divider_0/clk 1.36fF +C77 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z1 0.08fF +C78 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/Qbar 0.01fF +C79 pd_0/tspc_r_0/Z3 pd_0/R 0.27fF +C80 divider_2/prescaler_0/tspc_0/Z2 divider_2/and_0/OUT 0.06fF +C81 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Z4 0.20fF +C82 pd_1/REF pd_1/tspc_r_1/z5 0.04fF +C83 divbuf_13/IN divbuf_13/OUT5 0.00fF +C84 divbuf_5/OUT divbuf_6/OUT 3.23fF +C85 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a4 0.12fF +C86 divbuf_0/OUT2 divbuf_0/a_492_n240# 0.42fF +C87 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT 43.38fF +C88 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF +C89 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF +C90 divider_0/prescaler_0/Out divider_0/prescaler_0/m1_2700_2190# 0.11fF +C91 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_1/B 0.00fF +C92 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/nand_0/z1 0.07fF +C93 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.05fF +C94 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF +C95 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF +C96 divider_0/prescaler_0/tspc_1/Q divider_0/nor_0/A 0.03fF +C97 divider_0/nor_1/B divider_0/tspc_0/Z2 0.40fF +C98 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/B 0.18fF +C99 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF +C100 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C101 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z3 0.05fF +C102 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z4 0.08fF +C103 divbuf_5/a_492_n240# divbuf_5/OUT2 0.42fF +C104 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_1/Q 0.45fF +C105 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF +C106 divbuf_21/OUT2 divbuf_21/OUT 0.06fF +C107 divbuf_21/OUT3 divbuf_21/OUT5 0.01fF +C108 divider_1/prescaler_0/tspc_0/D divider_1/prescaler_0/nand_1/z1 0.21fF +C109 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Qbar1 0.38fF +C110 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z2 0.25fF +C111 divider_2/tspc_2/Q divider_2/tspc_1/Z4 0.15fF +C112 divider_2/tspc_1/Z1 divider_2/nor_0/B 0.03fF +C113 divider_2/prescaler_0/m1_2700_2190# divider_2/and_0/OUT 0.14fF +C114 pll_full_1/ro_complete_0/cbank_2/switch_5/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF +C115 divbuf_2/OUT divbuf_2/OUT3 0.26fF +C116 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/a_492_n240# 0.00fF +C117 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/a_630_n680# 0.01fF +C118 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.05fF +C119 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/clk 0.01fF +C120 divbuf_6/OUT divbuf_6/OUT3 0.26fF +C121 ro_complete_1/a5 ro_complete_1/cbank_1/v 0.10fF +C122 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/cbank_0/v 1.30fF +C123 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z2 0.01fF +C124 divbuf_14/OUT4 divbuf_14/OUT3 5.16fF +C125 divider_2/nor_1/B divider_2/and_0/B 0.29fF +C126 divbuf_6/a_492_n240# divbuf_6/OUT5 0.01fF +C127 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C128 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/A 0.80fF +C129 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/divider_0/clk 1.46fF +C130 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF +C131 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF +C132 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/clk 0.05fF +C133 divbuf_23/OUT2 divbuf_23/OUT5 0.02fF +C134 divbuf_23/OUT3 divbuf_23/OUT4 5.16fF +C135 pd_1/tspc_r_1/Z1 pd_1/tspc_r_1/Z2 0.71fF +C136 pd_1/DOWN pd_1/tspc_r_0/Qbar1 0.11fF +C137 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Z1 0.02fF +C138 pll_full_1/divbuf_0/a_492_n240# pll_full_1/divbuf_0/OUT2 0.42fF +C139 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z4 0.02fF +C140 divbuf_18/OUT4 divbuf_18/OUT3 5.16fF +C141 divider_2/tspc_2/Q divider_2/tspc_2/Z3 0.05fF +C142 divider_2/prescaler_0/tspc_2/Z4 divider_2/prescaler_0/tspc_2/D 0.11fF +C143 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z1 0.09fF +C144 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z3 0.06fF +C145 divbuf_2/OUT4 divbuf_2/OUT5 20.26fF +C146 divider_0/tspc_1/Z2 divider_0/nor_0/A 0.15fF +C147 divider_0/prescaler_0/Out divider_0/tspc_2/Z3 0.45fF +C148 divbuf_16/OUT2 divbuf_16/a_492_n240# 0.42fF +C149 divider_1/tspc_2/Q divider_1/nor_0/A 0.55fF +C150 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z4 0.36fF +C151 divbuf_10/OUT3 divbuf_10/OUT 0.26fF +C152 divbuf_10/OUT4 divbuf_10/OUT5 20.26fF +C153 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.00fF +C154 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF +C155 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF +C156 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF +C157 pd_1/DOWN pd_1/and_pd_0/Z1 0.07fF +C158 pd_1/R pd_1/tspc_r_1/Qbar1 0.30fF +C159 divider_2/prescaler_0/tspc_2/Z3 divider_2/clk 0.45fF +C160 divbuf_0/OUT3 divbuf_0/OUT4 5.16fF +C161 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF +C162 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z4 0.14fF +C163 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.04fF +C164 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF +C165 divbuf_4/OUT divbuf_4/OUT2 0.06fF +C166 ro_complete_1/a2 ro_complete_1/cbank_1/v 0.05fF +C167 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/a_492_n240# 0.42fF +C168 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C169 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF +C170 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF +C171 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/clk 0.01fF +C172 divbuf_8/OUT2 divbuf_8/OUT 0.06fF +C173 divbuf_8/OUT3 divbuf_8/OUT5 0.01fF +C174 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C175 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z3 0.05fF +C176 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Z4 0.65fF +C177 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT3 0.26fF +C178 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF +C179 divider_0/tspc_1/Z2 divider_0/tspc_1/a_630_n680# 0.01fF +C180 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF +C181 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/clk 0.01fF +C182 ro_complete_1/a3 ro_complete_1/cbank_2/switch_1/vin 0.13fF +C183 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/IN 0.00fF +C184 divbuf_15/OUT divbuf_15/OUT3 0.26fF +C185 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF +C186 divider_0/nor_0/A divider_0/tspc_2/Z1 0.03fF +C187 divbuf_16/OUT divbuf_16/OUT2 0.06fF +C188 divider_1/tspc_2/Q divider_1/tspc_1/a_630_n680# 0.01fF +C189 divider_1/tspc_1/Z1 divider_1/tspc_1/Z3 0.06fF +C190 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z2 0.19fF +C191 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF +C192 divbuf_7/a_492_n240# divbuf_7/OUT5 0.01fF +C193 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z3 0.25fF +C194 pd_0/tspc_r_1/Z2 pd_0/tspc_r_1/Z4 0.14fF +C195 pll_full_1/divbuf_1/a_492_n240# pll_full_1/divbuf_1/OUT 0.00fF +C196 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/switch_5/vin 0.20fF +C197 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z4 0.00fF +C198 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Q 0.21fF +C199 filter_0/a_4216_n2998# filter_0/v 0.36fF +C200 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/tspc_0/Z4 0.65fF +C201 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C202 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C203 pll_full_0/pd_0/DOWN pll_full_0/pd_0/REF 1.48fF +C204 divbuf_19/OUT2 divbuf_19/OUT3 1.37fF +C205 divider_2/and_0/B divider_2/and_0/Z1 0.07fF +C206 divbuf_15/OUT2 divbuf_15/OUT3 1.37fF +C207 ro_complete_1/a2 ro_complete_1/cbank_0/switch_2/vin 0.14fF +C208 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a4 0.09fF +C209 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF +C210 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF +C211 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/DIV 0.04fF +C212 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.19fF +C213 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/clk 0.01fF +C214 ro_complete_1/cbank_1/switch_4/vin ro_complete_1/cbank_1/v 1.30fF +C215 filter_0/v divbuf_25/OUT3 0.26fF +C216 io_clamp_low[1] io_clamp_high[1] 0.53fF +C217 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF +C218 divider_1/and_0/out1 divider_1/and_0/A 0.01fF +C219 divider_1/tspc_0/Z3 divider_1/Out 0.05fF +C220 divbuf_11/OUT3 divbuf_11/OUT 0.26fF +C221 divbuf_11/OUT4 divbuf_11/OUT5 20.26fF +C222 pd_1/tspc_r_0/Qbar1 pd_1/R 0.01fF +C223 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.19fF +C224 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF +C225 divider_2/prescaler_0/tspc_1/Z4 divider_2/clk 0.12fF +C226 divider_0/tspc_0/Z3 divider_0/tspc_0/a_630_n680# 0.05fF +C227 divbuf_0/OUT divbuf_0/OUT2 0.06fF +C228 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/a_630_n680# 0.05fF +C229 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/nor_0/B 0.03fF +C230 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/nor_1/B 0.35fF +C231 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.05fF +C232 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.08fF +C233 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF +C234 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF +C235 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z1 0.17fF +C236 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/UP 0.11fF +C237 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/D 0.03fF +C238 divbuf_1/OUT5 divbuf_1/IN 0.00fF +C239 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Qbar1 0.20fF +C240 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT4 5.16fF +C241 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C242 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/tspc_2/Z2 0.23fF +C243 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/divider_0/clk 0.29fF +C244 divbuf_4/a_492_n240# divbuf_4/IN 0.13fF +C245 ro_complete_1/cbank_2/switch_2/vin ro_complete_1/cbank_2/v 1.30fF +C246 divbuf_17/a_492_n240# divbuf_17/OUT5 0.01fF +C247 divider_2/tspc_1/Q divider_2/tspc_1/Z3 0.05fF +C248 divider_2/nor_1/B divider_2/tspc_0/a_630_n680# 0.35fF +C249 divbuf_20/a_492_n240# divbuf_20/OUT 0.00fF +C250 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z3 0.11fF +C251 divider_1/prescaler_0/tspc_0/Z3 divider_1/clk 0.64fF +C252 pll_full_1/pd_0/DOWN pll_full_1/pd_0/UP 4.58fF +C253 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/clk 0.01fF +C254 pd_1/DIV pd_1/tspc_r_0/Z2 0.19fF +C255 pd_0/DOWN pd_0/R 0.36fF +C256 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z4 0.20fF +C257 pd_0/DIV pd_0/tspc_r_0/z5 0.04fF +C258 pd_0/tspc_r_0/Z1 pd_0/tspc_r_0/Z2 0.71fF +C259 pd_1/R pd_1/and_pd_0/Z1 0.02fF +C260 pd_1/tspc_r_1/Qbar1 pd_1/tspc_r_1/z5 0.20fF +C261 divbuf_13/OUT2 divbuf_13/OUT 0.06fF +C262 divbuf_13/OUT3 divbuf_13/OUT5 0.01fF +C263 divider_2/tspc_2/a_630_n680# divider_2/nor_0/A 0.35fF +C264 divider_2/prescaler_0/tspc_1/Q divider_2/clk 0.60fF +C265 divbuf_15/IN divbuf_15/a_492_n240# 0.13fF +C266 divbuf_25/OUT2 divbuf_25/a_492_n240# 0.42fF +C267 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF +C268 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF +C269 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/nor_1/B 0.47fF +C270 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF +C271 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.33fF +C272 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.38fF +C273 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.11fF +C274 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF +C275 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z4 0.65fF +C276 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C277 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C278 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z4 0.12fF +C279 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z2 1.07fF +C280 divbuf_21/OUT4 divbuf_21/OUT 1.11fF +C281 divider_1/prescaler_0/tspc_1/Q divider_1/nor_0/A 0.03fF +C282 pll_full_1/divbuf_1/OUT2 pll_full_1/divbuf_1/OUT5 0.02fF +C283 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF +C284 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/clk 0.01fF +C285 pd_0/tspc_r_0/Z4 pd_0/tspc_r_1/Z4 0.02fF +C286 pd_0/DOWN pd_0/and_pd_0/Out1 0.12fF +C287 pd_0/REF pd_0/tspc_r_1/Z1 0.17fF +C288 pd_0/tspc_r_1/Qbar1 pd_0/UP 0.11fF +C289 divider_2/tspc_1/Z3 divider_2/nor_0/B 0.38fF +C290 divider_2/tspc_0/Z1 divider_2/tspc_0/Z3 0.06fF +C291 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_2/D 0.16fF +C292 divbuf_12/a_492_n240# divbuf_12/OUT5 0.01fF +C293 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_4/vin 0.20fF +C294 divbuf_15/OUT2 divbuf_15/OUT 0.06fF +C295 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF +C296 divbuf_2/OUT divbuf_2/OUT5 43.38fF +C297 divbuf_1/OUT5 divbuf_1/OUT2 0.02fF +C298 divbuf_4/OUT ro_complete_0/cbank_1/v 0.05fF +C299 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_0/Z1 0.01fF +C300 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/clk 0.01fF +C301 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/nor_0/A 1.21fF +C302 divbuf_15/OUT3 divbuf_15/OUT5 0.01fF +C303 divider_0/nor_0/A divider_0/and_0/A 0.01fF +C304 divbuf_6/OUT divbuf_6/OUT5 43.38fF +C305 divbuf_3/IN divbuf_3/OUT5 0.00fF +C306 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/and_pd_0/Z1 0.02fF +C307 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF +C308 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C309 divbuf_6/OUT2 divbuf_6/OUT3 1.37fF +C310 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/a_630_n680# 0.05fF +C311 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/nor_0/B 0.03fF +C312 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF +C313 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF +C314 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF +C315 divider_2/prescaler_0/Out divider_2/clk 0.51fF +C316 divbuf_16/OUT4 divbuf_16/OUT3 5.16fF +C317 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_1/Qbar1 0.30fF +C318 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z2 0.23fF +C319 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/clk 0.29fF +C320 pd_1/DOWN pd_1/R 0.36fF +C321 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/z5 0.11fF +C322 divbuf_23/OUT3 divbuf_23/OUT 0.26fF +C323 divbuf_23/OUT4 divbuf_23/OUT5 20.26fF +C324 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/divider_0/clk 1.46fF +C325 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z3 0.29fF +C326 divbuf_25/OUT2 divbuf_25/OUT5 0.02fF +C327 divbuf_25/OUT3 divbuf_25/OUT4 5.16fF +C328 divider_0/prescaler_0/m1_2700_2190# divider_0/nor_0/A 0.01fF +C329 divider_0/prescaler_0/Out divider_0/tspc_2/Z4 0.12fF +C330 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z2 0.01fF +C331 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/out1 0.31fF +C332 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/B 0.29fF +C333 ro_complete_1/a1 ro_complete_1/cbank_2/v 0.05fF +C334 divbuf_10/OUT5 divbuf_10/OUT 43.38fF +C335 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_1/B 0.47fF +C336 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF +C337 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF +C338 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF +C339 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF +C340 divider_1/mc2 divider_1/and_0/A 0.16fF +C341 divider_1/prescaler_0/Out divider_1/tspc_2/a_630_n680# 0.01fF +C342 divbuf_22/a_492_n240# divbuf_22/OUT 0.00fF +C343 divbuf_18/OUT3 divbuf_18/OUT 0.26fF +C344 divider_2/nor_0/B divider_2/and_0/B 0.31fF +C345 divider_2/tspc_0/Z3 divider_2/Out 0.05fF +C346 divider_2/prescaler_0/tspc_2/Z4 divider_2/clk 0.12fF +C347 divider_0/tspc_0/Z3 divider_0/tspc_1/Q 0.45fF +C348 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF +C349 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF +C350 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z4 0.36fF +C351 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_0/B 0.35fF +C352 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/nor_1/B 0.22fF +C353 divbuf_14/OUT2 divbuf_14/OUT3 1.37fF +C354 divider_0/tspc_1/Z4 divider_0/nor_0/A 0.02fF +C355 divider_0/nor_0/B divider_0/tspc_0/Z2 0.20fF +C356 divbuf_4/OUT divbuf_4/OUT4 1.11fF +C357 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/and_0/B 0.08fF +C358 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF +C359 divbuf_21/a_492_n240# divbuf_21/IN 0.13fF +C360 pll_full_1/divbuf_0/OUT3 pll_full_1/divbuf_0/OUT2 1.37fF +C361 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/R 0.21fF +C362 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z1 0.01fF +C363 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/clk 0.01fF +C364 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/nor_0/A 1.21fF +C365 divbuf_8/OUT4 divbuf_8/OUT 1.11fF +C366 pd_0/R pd_0/tspc_r_1/Z3 0.29fF +C367 cp_0/a_10_n50# cp_0/vbias 0.19fF +C368 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Z4 0.04fF +C369 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT4 1.11fF +C370 divbuf_24/a_492_n240# divbuf_24/OUT5 0.01fF +C371 divbuf_2/OUT2 divbuf_2/a_492_n240# 0.42fF +C372 divbuf_2/OUT ro_complete_0/cbank_1/switch_0/vin 0.09fF +C373 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF +C374 divider_0/tspc_1/Z2 divider_0/nor_0/B 0.30fF +C375 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/and_0/OUT 0.05fF +C376 divbuf_15/OUT divbuf_15/OUT5 43.38fF +C377 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF +C378 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF +C379 divider_0/nor_0/A divider_0/tspc_2/Z3 0.38fF +C380 divider_1/tspc_2/Q divider_1/nor_0/B 0.22fF +C381 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/divider_0/clk 1.46fF +C382 divbuf_7/OUT2 divbuf_7/OUT3 1.37fF +C383 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF +C384 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.29fF +C385 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z3 0.05fF +C386 divider_1/nor_0/A divider_1/tspc_2/Z1 0.03fF +C387 pd_1/tspc_r_0/Qbar pd_1/tspc_r_0/Qbar1 0.01fF +C388 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Z4 0.65fF +C389 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/clk 0.14fF +C390 pll_full_1/divbuf_0/OUT5 pll_full_1/divbuf_0/OUT2 0.02fF +C391 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.09fF +C392 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C393 filter_0/a_4216_n5230# filter_0/v 0.91fF +C394 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C395 divbuf_6/OUT ro_complete_0/cbank_1/v 0.05fF +C396 divbuf_15/OUT2 divbuf_15/OUT5 0.02fF +C397 divbuf_14/OUT divbuf_14/OUT4 1.11fF +C398 divider_0/nor_0/Z1 divider_0/and_0/B 0.18fF +C399 divider_0/tspc_2/Q divider_0/tspc_2/a_630_n680# 0.04fF +C400 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF +C401 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF +C402 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.32fF +C403 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/clk 0.01fF +C404 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF +C405 ro_complete_1/cbank_1/switch_0/vin ro_complete_1/cbank_1/v 1.43fF +C406 divider_1/tspc_1/Z3 divider_1/tspc_1/Q 0.05fF +C407 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_1/Q 0.13fF +C408 divbuf_10/a_492_n240# divbuf_10/OUT2 0.42fF +C409 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF +C410 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_0/B 0.35fF +C411 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_1/B 0.22fF +C412 divbuf_11/OUT5 divbuf_11/OUT 43.38fF +C413 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/B 0.08fF +C414 divider_2/nor_0/Z1 divider_2/and_0/B 0.18fF +C415 divbuf_9/a_492_n240# divbuf_9/OUT 0.00fF +C416 pd_1/tspc_r_1/Z1 pd_1/tspc_r_1/Z3 0.09fF +C417 pd_1/tspc_r_1/Z2 pd_1/REF 0.19fF +C418 pd_1/tspc_r_0/Z3 pd_1/tspc_r_0/z5 0.11fF +C419 divbuf_0/OUT divbuf_0/OUT3 0.26fF +C420 divbuf_5/OUT ro_complete_0/cbank_1/switch_3/vin 0.09fF +C421 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF +C422 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z2 0.25fF +C423 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_1/a_630_n680# 0.04fF +C424 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/nor_0/B 0.38fF +C425 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.12fF +C426 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C427 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/divider_0/clk 1.46fF +C428 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF +C429 divbuf_14/OUT5 divbuf_14/a_492_n240# 0.01fF +C430 divider_0/tspc_1/Q divider_0/tspc_0/Z2 0.14fF +C431 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF +C432 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z3 0.06fF +C433 divider_2/tspc_1/Q divider_2/tspc_0/a_630_n680# 0.01fF +C434 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/switch_5/vin 0.20fF +C435 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z4 0.28fF +C436 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/D 0.03fF +C437 divider_1/prescaler_0/tspc_0/Z4 divider_1/clk 0.12fF +C438 divbuf_20/IN divbuf_20/OUT5 0.00fF +C439 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a4 0.12fF +C440 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF +C441 divbuf_8/a_492_n240# divbuf_8/IN 0.13fF +C442 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/z5 0.20fF +C443 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_1/switch_3/vin 0.09fF +C444 divider_2/tspc_2/Q divider_2/tspc_1/a_630_n680# 0.01fF +C445 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z3 0.33fF +C446 divbuf_13/OUT4 divbuf_13/OUT 1.11fF +C447 cp_0/a_1710_n2840# cp_0/out 0.61fF +C448 divider_2/and_0/OUT divider_2/and_0/Z1 0.04fF +C449 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z2 0.01fF +C450 divider_2/prescaler_0/tspc_2/Q divider_2/clk 0.05fF +C451 divbuf_4/OUT divbuf_3/OUT 2.71fF +C452 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/a5 0.09fF +C453 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.05fF +C454 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.08fF +C455 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.04fF +C456 divbuf_1/OUT5 divbuf_1/OUT3 0.01fF +C457 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/Z2 0.19fF +C458 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF +C459 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C460 divbuf_17/a_492_n240# divbuf_17/OUT2 0.42fF +C461 divider_0/and_0/OUT divider_0/clk 0.04fF +C462 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z3 0.16fF +C463 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/and_pd_0/Out1 0.05fF +C464 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C465 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Q 0.91fF +C466 pll_full_1/divbuf_1/OUT3 pll_full_1/divbuf_1/OUT 0.26fF +C467 pll_full_1/divbuf_1/OUT4 pll_full_1/divbuf_1/OUT5 20.26fF +C468 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF +C469 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/clk 0.01fF +C470 divbuf_12/OUT2 divbuf_12/OUT3 1.37fF +C471 pd_1/DIV pd_1/tspc_r_0/z5 0.04fF +C472 pd_1/tspc_r_0/Qbar pd_1/DOWN 0.21fF +C473 pd_0/tspc_r_0/z5 pd_0/tspc_r_1/z5 0.02fF +C474 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z2 0.25fF +C475 divider_2/tspc_0/Z2 divider_2/tspc_0/Z4 0.36fF +C476 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/nand_0/z1 0.07fF +C477 divider_2/prescaler_0/tspc_0/Z2 divider_2/clk 0.11fF +C478 divbuf_16/OUT5 divbuf_16/IN 0.00fF +C479 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/a_492_n240# 0.00fF +C480 divider_2/and_0/out1 divider_2/and_0/B 0.18fF +C481 divbuf_6/OUT divbuf_7/OUT 2.98fF +C482 divbuf_3/OUT ro_complete_0/cbank_2/switch_2/vin 0.09fF +C483 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF +C484 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z1 0.00fF +C485 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF +C486 divbuf_19/OUT4 divbuf_19/OUT 1.11fF +C487 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z1 0.06fF +C488 divider_1/nor_1/B divider_1/tspc_1/Q 0.22fF +C489 divbuf_6/OUT2 divbuf_6/OUT5 0.02fF +C490 divbuf_6/OUT3 divbuf_6/OUT4 5.16fF +C491 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.04fF +C492 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/nor_0/B 0.38fF +C493 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF +C494 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C495 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/divider_0/clk 1.46fF +C496 divider_1/nor_0/A divider_1/and_0/A 0.01fF +C497 divbuf_11/a_492_n240# divbuf_11/OUT2 0.42fF +C498 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/OUT2 0.06fF +C499 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF +C500 divbuf_23/OUT5 divbuf_23/OUT 43.38fF +C501 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.09fF +C502 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Q 0.05fF +C503 divider_2/prescaler_0/m1_2700_2190# divider_2/clk 0.01fF +C504 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF +C505 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Q 0.05fF +C506 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z1 0.08fF +C507 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/nor_1/B 0.06fF +C508 divbuf_3/OUT divbuf_3/OUT2 0.06fF +C509 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_2/vin 0.20fF +C510 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF +C511 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF +C512 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.15fF +C513 ro_complete_1/cbank_1/switch_5/vin ro_complete_1/cbank_1/v 1.30fF +C514 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/switch_1/vin 0.19fF +C515 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z4 0.65fF +C516 divider_1/prescaler_0/Out divider_1/nor_0/A 0.15fF +C517 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF +C518 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF +C519 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF +C520 pd_0/DIV pd_0/tspc_r_0/Qbar1 0.12fF +C521 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z4 0.01fF +C522 divbuf_22/IN divbuf_22/OUT5 0.00fF +C523 divbuf_13/a_492_n240# divbuf_13/IN 0.13fF +C524 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Out1 0.05fF +C525 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF +C526 divider_0/tspc_2/Q divider_0/tspc_1/Z1 0.01fF +C527 divider_0/tspc_0/Z3 divider_0/tspc_0/Z4 0.65fF +C528 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF +C529 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF +C530 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/nor_1/B 0.22fF +C531 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Out1 0.33fF +C532 divbuf_5/OUT divbuf_5/OUT2 0.06fF +C533 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/Z4 0.02fF +C534 divider_0/nor_0/B divider_0/and_0/A 0.26fF +C535 pll_full_0/filter_0/a_4216_n5230# pll_full_0/divider_0/clk 1.58fF +C536 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/a_630_n680# 0.19fF +C537 divbuf_16/OUT2 divbuf_16/OUT3 1.37fF +C538 divider_1/tspc_1/Z4 divider_1/nor_0/A 0.02fF +C539 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a3 0.13fF +C540 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z1 0.00fF +C541 pd_0/R pd_0/UP 0.45fF +C542 divider_2/tspc_2/Q divider_2/nor_0/B 0.22fF +C543 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Q 0.15fF +C544 divider_2/nor_1/Z1 divider_2/and_0/B 0.78fF +C545 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_4/vin 0.20fF +C546 divbuf_24/OUT2 divbuf_24/OUT3 1.37fF +C547 pll_full_1/filter_0/a_4216_n5230# pll_full_1/divider_0/clk 1.58fF +C548 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divbuf_0/IN 0.05fF +C549 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/DOWN 0.11fF +C550 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF +C551 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.20fF +C552 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.09fF +C553 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/clk 0.11fF +C554 pll_full_1/pd_0/tspc_r_0/Z1 pll_full_1/pd_0/tspc_r_0/Z3 0.09fF +C555 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT2 0.02fF +C556 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF +C557 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF +C558 divider_0/nor_0/A divider_0/tspc_2/Z4 0.21fF +C559 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Q 0.05fF +C560 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF +C561 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF +C562 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z4 0.12fF +C563 divider_1/tspc_2/Z1 divider_1/tspc_2/Z2 1.07fF +C564 divider_1/nor_0/A divider_1/tspc_2/Z3 0.38fF +C565 divbuf_7/OUT2 divbuf_7/OUT5 0.02fF +C566 divbuf_7/OUT3 divbuf_7/OUT4 5.16fF +C567 pll_full_1/divbuf_0/OUT3 pll_full_1/divbuf_0/OUT4 5.16fF +C568 pd_0/UP pd_0/and_pd_0/Out1 0.33fF +C569 divbuf_23/a_492_n240# divbuf_23/OUT2 0.42fF +C570 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/Z2 0.14fF +C571 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_1/Q 0.01fF +C572 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C573 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/Out 0.05fF +C574 pll_full_1/ro_complete_0/a2 pll_full_1/divider_0/clk 0.11fF +C575 divbuf_14/IN divbuf_14/OUT5 0.00fF +C576 divider_0/tspc_2/Q divider_0/nor_0/A 0.55fF +C577 divider_0/nor_0/B divider_0/tspc_1/Z4 0.21fF +C578 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/and_0/B 0.31fF +C579 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.22fF +C580 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.04fF +C581 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/a_492_n240# 0.42fF +C582 divbuf_3/a_492_n240# divbuf_3/OUT5 0.01fF +C583 ro_complete_1/a0 ro_complete_1/cbank_1/switch_5/vin 0.09fF +C584 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C585 divider_0/and_0/A divider_0/and_0/B 0.18fF +C586 io_clamp_low[0] io_clamp_high[0] 0.53fF +C587 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/nor_1/B 0.22fF +C588 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_0/a_740_n680# 0.21fF +C589 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z4 0.12fF +C590 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_1/Q 0.21fF +C591 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z2 0.01fF +C592 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/D 0.03fF +C593 divbuf_18/OUT2 divbuf_18/OUT5 0.02fF +C594 divider_1/and_0/out1 divider_1/and_0/Z1 0.36fF +C595 cp_0/a_1710_0# cp_0/a_10_n50# 0.04fF +C596 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_2/Q 0.19fF +C597 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/clk 0.01fF +C598 divbuf_9/IN divbuf_9/OUT5 0.00fF +C599 pll_full_1/divbuf_0/OUT5 pll_full_1/divbuf_0/OUT4 20.26fF +C600 divbuf_0/OUT divbuf_0/OUT4 1.11fF +C601 ro_complete_0/cbank_0/switch_0/vin divbuf_4/OUT 0.12fF +C602 divbuf_5/OUT ro_complete_0/cbank_0/switch_3/vin 0.09fF +C603 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/nor_0/B 0.51fF +C604 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C605 pll_full_1/ro_complete_0/cbank_1/switch_0/vin pll_full_1/divider_0/clk 1.58fF +C606 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF +C607 divider_0/tspc_0/Z4 divider_0/tspc_0/Z2 0.36fF +C608 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_0/z1 0.24fF +C609 ro_complete_1/a2 ro_complete_1/cbank_2/switch_2/vin 0.14fF +C610 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z4 0.00fF +C611 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF +C612 divbuf_4/a_492_n240# divbuf_4/OUT5 0.01fF +C613 ro_complete_1/cbank_2/switch_4/vin ro_complete_1/cbank_2/v 1.30fF +C614 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divbuf_0/IN 0.05fF +C615 divbuf_20/OUT2 divbuf_20/OUT 0.06fF +C616 divbuf_20/OUT3 divbuf_20/OUT5 0.01fF +C617 pll_full_1/pd_0/DOWN pll_full_1/pd_0/R 0.36fF +C618 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF +C619 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF +C620 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/clk 0.11fF +C621 divider_1/and_0/OUT divider_1/prescaler_0/nand_0/z1 0.01fF +C622 divider_2/mc2 divider_2/and_0/A 0.16fF +C623 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF +C624 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z3 0.05fF +C625 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z4 0.08fF +C626 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_3/vin 0.09fF +C627 divider_2/nor_0/A divider_2/tspc_2/Z2 0.23fF +C628 divider_2/prescaler_0/tspc_0/D divider_2/clk 0.29fF +C629 divbuf_2/IN divbuf_2/OUT5 0.00fF +C630 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF +C631 divbuf_14/OUT divbuf_14/OUT2 0.06fF +C632 divider_0/tspc_2/Q divider_0/tspc_1/a_630_n680# 0.01fF +C633 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z2 0.19fF +C634 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.12fF +C635 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C636 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.26fF +C637 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/switch_0/vin 0.19fF +C638 pll_full_1/cp_0/a_1710_0# pll_full_1/pd_0/DOWN 0.04fF +C639 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z2 0.14fF +C640 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.01fF +C641 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C642 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF +C643 pll_full_0/ro_complete_0/a2 pll_full_0/divider_0/clk 0.11fF +C644 divider_1/mc2 divider_1/prescaler_0/tspc_2/a_630_n680# 0.33fF +C645 divider_1/nor_1/Z1 divider_1/nor_0/B 0.18fF +C646 divider_1/tspc_2/Q divider_1/tspc_1/Z2 0.14fF +C647 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/Z4 0.36fF +C648 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/Out 0.05fF +C649 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.31fF +C650 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF +C651 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF +C652 divider_1/and_0/OUT divider_1/clk 0.04fF +C653 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/Qbar 0.01fF +C654 divider_2/prescaler_0/tspc_1/Z2 divider_2/and_0/OUT 0.06fF +C655 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z3 0.33fF +C656 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Q 0.38fF +C657 divbuf_12/OUT2 divbuf_12/OUT5 0.02fF +C658 divbuf_12/OUT3 divbuf_12/OUT4 5.16fF +C659 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C660 pll_full_0/pd_0/DOWN pll_full_0/pd_0/R 0.36fF +C661 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/a_630_n680# 0.19fF +C662 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.33fF +C663 divbuf_2/OUT ro_complete_0/cbank_1/v 0.10fF +C664 ro_complete_0/cbank_0/switch_5/vin divbuf_7/OUT 0.09fF +C665 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/clk 0.11fF +C666 divbuf_6/OUT4 divbuf_6/OUT5 20.26fF +C667 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_0/B 0.51fF +C668 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C669 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/divider_0/clk 1.58fF +C670 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z1 0.00fF +C671 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF +C672 io_clamp_high[2] io_analog[6] 0.53fF +C673 divbuf_18/OUT4 divbuf_18/OUT5 20.26fF +C674 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/clk 0.01fF +C675 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/a0 0.09fF +C676 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF +C677 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C678 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.11fF +C679 divbuf_1/OUT5 divbuf_1/a_492_n240# 0.01fF +C680 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF +C681 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.64fF +C682 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF +C683 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF +C684 ro_complete_1/cbank_0/v ro_complete_1/cbank_2/v 0.04fF +C685 pll_full_1/pd_0/REF pll_full_1/divbuf_1/OUT5 0.00fF +C686 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF +C687 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C688 divbuf_19/a_492_n240# divbuf_19/IN 0.13fF +C689 divider_2/prescaler_0/Out divider_2/prescaler_0/m1_2700_2190# 0.11fF +C690 divider_1/prescaler_0/Out divider_1/tspc_2/Z2 0.11fF +C691 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/D 0.15fF +C692 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/clk 0.14fF +C693 divider_1/nor_1/Z1 divider_1/and_0/B 0.78fF +C694 divbuf_22/OUT2 divbuf_22/OUT 0.06fF +C695 divbuf_22/OUT3 divbuf_22/OUT5 0.01fF +C696 pd_0/tspc_r_0/Z3 pd_0/DOWN 0.03fF +C697 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/OUT4 1.11fF +C698 pd_1/REF pd_1/tspc_r_1/Z3 0.65fF +C699 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z2 0.71fF +C700 divider_2/and_0/OUT divider_2/and_0/out1 0.31fF +C701 divbuf_0/OUT divbuf_0/a_492_n240# 0.00fF +C702 ro_complete_0/cbank_0/switch_1/vin divbuf_3/OUT 0.13fF +C703 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF +C704 divider_0/tspc_2/Q divider_0/tspc_1/Z3 0.45fF +C705 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF +C706 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF +C707 pll_full_1/ro_complete_0/cbank_1/switch_5/vin pll_full_1/divider_0/clk 1.46fF +C708 divbuf_5/OUT divbuf_5/OUT4 1.11fF +C709 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C710 pll_full_1/pd_0/REF pll_full_1/pd_0/R 0.61fF +C711 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF +C712 divbuf_21/a_492_n240# divbuf_21/OUT5 0.01fF +C713 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/clk 0.11fF +C714 divider_1/tspc_0/a_630_n680# divider_1/Out 0.04fF +C715 divider_1/nor_0/B divider_1/and_0/A 0.26fF +C716 divider_2/tspc_1/Z1 divider_2/tspc_1/Z3 0.06fF +C717 divbuf_24/OUT2 divbuf_24/OUT5 0.02fF +C718 divbuf_24/OUT3 divbuf_24/OUT4 5.16fF +C719 pll_full_0/pd_0/DOWN pll_full_0/cp_0/a_1710_0# 0.04fF +C720 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/R 0.21fF +C721 divider_2/nor_0/A divider_2/and_0/B 0.08fF +C722 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF +C723 pll_full_0/pd_0/DIV pll_full_0/divider_0/and_0/OUT 0.01fF +C724 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT3 0.26fF +C725 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT4 20.26fF +C726 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z4 0.00fF +C727 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF +C728 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/clk 0.51fF +C729 divbuf_6/OUT divbuf_6/a_492_n240# 0.00fF +C730 divbuf_1/OUT2 divbuf_1/OUT3 1.37fF +C731 ro_complete_1/a4 ro_complete_1/cbank_2/switch_0/vin 0.12fF +C732 divbuf_16/OUT5 divbuf_16/OUT4 20.26fF +C733 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF +C734 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/UP 0.03fF +C735 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF +C736 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z3 0.06fF +C737 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/Qbar1 0.12fF +C738 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C739 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF +C740 divbuf_7/OUT4 divbuf_7/OUT5 20.26fF +C741 divider_2/prescaler_0/Out divider_2/tspc_2/Z3 0.45fF +C742 divider_1/tspc_2/Z2 divider_1/tspc_2/Z3 0.16fF +C743 divider_1/nor_0/A divider_1/tspc_2/Z4 0.21fF +C744 divider_2/tspc_2/Q divider_2/tspc_2/a_630_n680# 0.04fF +C745 divider_2/prescaler_0/tspc_2/Z2 divider_2/and_0/OUT 0.05fF +C746 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/nor_0/B 0.18fF +C747 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z4 0.12fF +C748 divbuf_7/OUT ro_complete_0/cbank_2/switch_4/vin 0.13fF +C749 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF +C750 divbuf_14/IN divbuf_14/a_492_n240# 0.13fF +C751 divider_0/mc2 divider_0/and_0/A 0.16fF +C752 divider_0/prescaler_0/Out divider_0/tspc_2/a_630_n680# 0.01fF +C753 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF +C754 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.01fF +C755 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/clk 0.11fF +C756 divbuf_3/OUT3 divbuf_3/OUT4 5.16fF +C757 ro_complete_1/a0 ro_complete_1/cbank_1/v 0.05fF +C758 divider_1/nor_0/Z1 divider_1/and_0/A 0.80fF +C759 divider_1/tspc_0/Z1 divider_1/tspc_1/Q 0.01fF +C760 divider_1/nor_0/B divider_1/tspc_1/Z4 0.21fF +C761 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/D 0.05fF +C762 divbuf_10/a_492_n240# divbuf_10/OUT 0.00fF +C763 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C764 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/divider_0/clk 1.46fF +C765 divider_1/and_0/A divider_1/and_0/B 0.18fF +C766 divbuf_9/OUT2 divbuf_9/OUT 0.06fF +C767 divbuf_9/OUT3 divbuf_9/OUT5 0.01fF +C768 pd_1/tspc_r_1/Qbar pd_1/UP 0.21fF +C769 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.13fF +C770 divider_2/tspc_0/a_630_n680# divider_2/Out 0.04fF +C771 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_0/D 0.32fF +C772 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/clk 0.01fF +C773 divbuf_2/OUT2 divbuf_2/OUT 0.06fF +C774 divbuf_5/OUT ro_complete_0/cbank_2/switch_3/vin 0.09fF +C775 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF +C776 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/z5 0.04fF +C777 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z2 0.71fF +C778 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/nor_0/B 0.02fF +C779 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/Z4 0.15fF +C780 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.36fF +C781 divbuf_1/OUT divbuf_1/OUT4 1.11fF +C782 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/switch_4/vin 0.20fF +C783 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF +C784 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF +C785 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/Q 0.04fF +C786 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF +C787 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/divider_0/tspc_2/Z4 0.65fF +C788 divbuf_7/OUT divbuf_7/OUT3 0.26fF +C789 divbuf_4/OUT2 divbuf_4/OUT3 1.37fF +C790 ro_complete_1/cbank_2/switch_0/vin ro_complete_1/cbank_2/v 1.45fF +C791 divider_1/mc2 divider_1/nor_1/B 0.15fF +C792 divider_1/prescaler_0/tspc_2/D divider_1/prescaler_0/nand_0/z1 0.24fF +C793 filter_0/v divbuf_25/a_492_n240# 0.00fF +C794 divbuf_20/OUT4 divbuf_20/OUT 1.11fF +C795 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a4 0.09fF +C796 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a5 0.09fF +C797 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C798 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/clk 0.51fF +C799 divbuf_8/a_492_n240# divbuf_8/OUT5 0.01fF +C800 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_3/vin 0.09fF +C801 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z4 0.12fF +C802 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z2 1.07fF +C803 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/DOWN 0.21fF +C804 divider_2/tspc_2/Z1 divider_2/tspc_2/Z3 0.06fF +C805 divider_0/tspc_2/Q divider_0/nor_0/B 0.22fF +C806 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF +C807 ro_complete_1/a2 ro_complete_1/cbank_1/switch_3/vin 0.09fF +C808 divbuf_0/IN divbuf_0/a_492_n240# 0.13fF +C809 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_2/Z3 0.05fF +C810 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/tspc_0/Z2 0.16fF +C811 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF +C812 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.16fF +C813 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/clk 0.14fF +C814 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/and_0/B 0.78fF +C815 divbuf_14/OUT5 divbuf_14/OUT3 0.01fF +C816 divbuf_5/OUT2 divbuf_5/OUT3 1.37fF +C817 divider_1/nor_1/B divider_1/tspc_0/Z1 0.03fF +C818 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z4 0.01fF +C819 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/and_pd_0/Out1 0.18fF +C820 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/UP 0.21fF +C821 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_0/B 0.18fF +C822 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z4 0.12fF +C823 divider_1/tspc_1/Q divider_1/tspc_0/Z3 0.45fF +C824 divider_1/prescaler_0/tspc_2/D divider_1/clk 0.26fF +C825 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF +C826 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/clk 0.11fF +C827 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z4 0.20fF +C828 pd_0/REF pd_0/tspc_r_1/z5 0.04fF +C829 pd_0/tspc_r_1/Z1 pd_0/tspc_r_1/Z2 0.71fF +C830 divbuf_12/OUT3 divbuf_12/OUT 0.26fF +C831 divbuf_12/OUT4 divbuf_12/OUT5 20.26fF +C832 pll_full_1/divbuf_0/OUT5 pll_full_1/divbuf_0/a_492_n240# 0.01fF +C833 divider_2/tspc_1/Z2 divider_2/tspc_1/Z4 0.36fF +C834 divider_2/tspc_0/a_630_n680# divider_2/tspc_0/Z3 0.05fF +C835 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z3 0.05fF +C836 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z4 0.08fF +C837 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Q 0.04fF +C838 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C839 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/z5 0.20fF +C840 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF +C841 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF +C842 divbuf_5/OUT ro_complete_0/cbank_2/v 0.05fF +C843 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z2 0.25fF +C844 ro_complete_1/a3 ro_complete_1/cbank_1/v 0.05fF +C845 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF +C846 divbuf_16/OUT divbuf_16/a_492_n240# 0.00fF +C847 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Q 0.15fF +C848 divider_1/prescaler_0/tspc_0/Z2 divider_1/and_0/OUT 0.06fF +C849 pll_full_1/pd_0/DIV pll_full_1/pd_0/tspc_r_0/Z3 0.65fF +C850 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/nor_0/B 0.02fF +C851 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z4 0.15fF +C852 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF +C853 filter_0/v divbuf_25/OUT5 43.38fF +C854 divbuf_11/a_492_n240# divbuf_11/OUT 0.00fF +C855 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF +C856 pd_1/tspc_r_1/Z2 pd_1/R 0.21fF +C857 divbuf_19/OUT divbuf_19/OUT2 0.06fF +C858 io_clamp_low[1] io_analog[5] 0.53fF +C859 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/v 0.05fF +C860 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF +C861 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_0/Z4 0.15fF +C862 pll_full_1/divbuf_0/IN pll_full_1/divider_0/nor_1/B 0.27fF +C863 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.28fF +C864 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar 0.03fF +C865 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF +C866 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF +C867 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/switch_4/vin 0.20fF +C868 pll_full_1/cp_0/a_1710_0# pll_full_1/cp_0/down 0.32fF +C869 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF +C870 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/B 0.01fF +C871 divbuf_20/a_492_n240# divbuf_20/IN 0.13fF +C872 divbuf_19/a_492_n240# divbuf_19/OUT 0.00fF +C873 divider_1/tspc_0/Z2 divider_1/tspc_1/Q 0.14fF +C874 divider_1/nor_1/B divider_1/tspc_0/Z3 0.38fF +C875 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/D 0.05fF +C876 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/clk 0.01fF +C877 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Qbar1 0.38fF +C878 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/Z3 0.05fF +C879 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z2 0.16fF +C880 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C881 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF +C882 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/clk 0.14fF +C883 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.78fF +C884 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z1 0.09fF +C885 pd_0/DIV pd_0/tspc_r_0/Z2 0.19fF +C886 divbuf_18/OUT2 divbuf_18/OUT 0.06fF +C887 divbuf_22/OUT4 divbuf_22/OUT 1.11fF +C888 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/Qbar1 0.38fF +C889 divbuf_18/OUT5 divbuf_18/OUT 43.38fF +C890 divbuf_13/a_492_n240# divbuf_13/OUT5 0.01fF +C891 divbuf_5/OUT ro_complete_0/cbank_1/switch_2/vin 0.14fF +C892 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.91fF +C893 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C894 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF +C895 divider_2/nor_1/B divider_2/mc2 0.15fF +C896 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.45fF +C897 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/a1 0.14fF +C898 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/a3 0.09fF +C899 ro_complete_1/cbank_2/switch_5/vin ro_complete_1/cbank_2/v 1.30fF +C900 pll_full_1/pd_0/tspc_r_1/z5 pll_full_1/pd_0/UP 0.03fF +C901 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C902 divbuf_21/OUT2 divbuf_21/OUT3 1.37fF +C903 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C904 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_0/Qbar 0.21fF +C905 pd_0/R pd_0/tspc_r_1/Qbar 0.03fF +C906 pd_1/and_pd_0/Out1 pd_1/and_pd_0/Z1 0.18fF +C907 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z4 0.14fF +C908 divbuf_24/OUT3 divbuf_24/OUT 0.26fF +C909 divbuf_24/OUT4 divbuf_24/OUT5 20.26fF +C910 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Z4 0.65fF +C911 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z4 0.20fF +C912 divider_2/nor_1/B divider_2/tspc_0/Z2 0.40fF +C913 divider_1/prescaler_0/m1_2700_2190# divider_1/nor_0/A 0.01fF +C914 divbuf_3/IN divbuf_3/a_492_n240# 0.13fF +C915 divbuf_1/a_492_n240# divbuf_1/IN 0.13fF +C916 ro_complete_1/cbank_1/switch_1/vin ro_complete_1/cbank_1/v 1.30fF +C917 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C918 divbuf_6/a_492_n240# divbuf_6/OUT2 0.42fF +C919 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z4 0.15fF +C920 pll_full_0/divbuf_0/IN pll_full_0/divider_0/nor_1/B 0.27fF +C921 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF +C922 divider_2/nor_1/B divider_2/tspc_0/Z4 0.22fF +C923 divider_1/tspc_1/Z3 divider_1/tspc_1/a_630_n680# 0.05fF +C924 divider_1/tspc_1/Z1 divider_1/nor_0/B 0.03fF +C925 divider_1/nor_1/B divider_1/tspc_0/Z2 0.40fF +C926 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z4 0.00fF +C927 divider_2/mc2 divider_2/prescaler_0/tspc_2/a_630_n680# 0.33fF +C928 divider_2/prescaler_0/Out divider_2/tspc_2/Z4 0.12fF +C929 divider_1/tspc_2/Z2 divider_1/tspc_2/Z4 0.36fF +C930 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/a_492_n240# 0.00fF +C931 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF +C932 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Out1 0.05fF +C933 divider_2/tspc_2/Q divider_2/nor_0/A 0.55fF +C934 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Q 0.20fF +C935 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/D 0.09fF +C936 divbuf_23/a_492_n240# divbuf_23/OUT 0.00fF +C937 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.01fF +C938 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z3 0.05fF +C939 divider_0/prescaler_0/Out divider_0/nor_0/A 0.15fF +C940 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF +C941 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF +C942 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/divider_0/prescaler_0/nand_1/z1 0.21fF +C943 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF +C944 divbuf_25/OUT4 divbuf_25/OUT5 20.26fF +C945 divider_0/and_0/B divider_0/and_0/Z1 0.07fF +C946 divbuf_3/OUT4 divbuf_3/OUT5 20.26fF +C947 divbuf_10/IN divbuf_10/OUT5 0.00fF +C948 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF +C949 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C950 divider_1/mc2 divider_1/and_0/out1 0.06fF +C951 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Q 0.04fF +C952 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z3 0.06fF +C953 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/D 0.11fF +C954 divbuf_22/a_492_n240# divbuf_22/IN 0.13fF +C955 pd_1/DOWN pd_1/and_pd_0/Out1 0.12fF +C956 divbuf_18/OUT4 divbuf_18/OUT 1.11fF +C957 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/nand_1/z1 0.22fF +C958 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/tspc_0/D 0.04fF +C959 divbuf_9/OUT4 divbuf_9/OUT 1.11fF +C960 divbuf_5/OUT ro_complete_0/cbank_0/switch_2/vin 0.14fF +C961 ro_complete_0/cbank_0/switch_1/vin divbuf_4/OUT 0.09fF +C962 ro_complete_0/cbank_0/switch_0/vin divbuf_2/OUT 0.09fF +C963 pll_full_0/pd_0/REF pll_full_0/divbuf_1/OUT5 0.00fF +C964 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF +C965 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF +C966 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z3 0.33fF +C967 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.15fF +C968 pll_full_1/ro_complete_0/a0 pll_full_1/divider_0/clk 0.11fF +C969 divbuf_16/OUT5 divbuf_16/OUT2 0.02fF +C970 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF +C971 divbuf_5/OUT divbuf_5/a_492_n240# 0.00fF +C972 divbuf_3/OUT divbuf_3/OUT3 0.26fF +C973 divbuf_1/OUT2 divbuf_1/a_492_n240# 0.42fF +C974 divbuf_7/OUT divbuf_7/OUT5 43.38fF +C975 divbuf_4/OUT2 divbuf_4/OUT5 0.02fF +C976 divbuf_4/OUT3 divbuf_4/OUT4 5.16fF +C977 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/Q 0.04fF +C978 divider_1/prescaler_0/tspc_1/Z3 divider_1/clk 0.45fF +C979 divbuf_8/OUT2 divbuf_8/OUT3 1.37fF +C980 divider_2/tspc_2/Q divider_2/tspc_1/Z1 0.01fF +C981 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z3 0.16fF +C982 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_0/D 0.09fF +C983 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.14fF +C984 divider_2/tspc_2/Z1 divider_2/tspc_2/Z4 0.00fF +C985 pll_full_1/pd_0/tspc_r_0/Z1 pll_full_1/pd_0/DIV 0.17fF +C986 pll_full_0/pd_0/REF pll_full_0/divbuf_1/a_492_n240# 0.13fF +C987 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF +C988 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.36fF +C989 divider_0/tspc_2/a_630_n680# divider_0/nor_0/A 0.35fF +C990 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF +C991 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_2/vin 0.20fF +C992 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_0/Z3 0.20fF +C993 divider_1/nor_1/B divider_1/tspc_1/a_630_n680# 0.00fF +C994 divbuf_5/OUT2 divbuf_5/OUT5 0.02fF +C995 divbuf_5/OUT3 divbuf_5/OUT4 5.16fF +C996 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF +C997 divbuf_7/a_492_n240# divbuf_7/OUT2 0.42fF +C998 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF +C999 divbuf_19/OUT5 divbuf_19/OUT3 0.01fF +C1000 divbuf_12/OUT5 divbuf_12/OUT 43.38fF +C1001 pd_0/R pd_0/and_pd_0/Z1 0.02fF +C1002 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/z5 0.20fF +C1003 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF +C1004 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z4 0.12fF +C1005 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z2 1.07fF +C1006 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z2 0.01fF +C1007 divbuf_2/OUT divbuf_2/a_492_n240# 0.00fF +C1008 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF +C1009 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_2/D 0.16fF +C1010 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.03fF +C1011 ro_complete_1/a4 ro_complete_1/cbank_2/v 0.05fF +C1012 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/switch_0/vin 0.19fF +C1013 divider_1/tspc_1/Z2 divider_1/tspc_1/Z4 0.36fF +C1014 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF +C1015 pll_full_0/ro_complete_0/a0 pll_full_0/divider_0/clk 0.11fF +C1016 divbuf_11/IN divbuf_11/OUT5 0.00fF +C1017 divbuf_9/a_492_n240# divbuf_9/IN 0.13fF +C1018 pd_1/tspc_r_0/Z3 pd_1/tspc_r_0/Qbar1 0.38fF +C1019 pd_0/and_pd_0/Out1 pd_0/and_pd_0/Z1 0.18fF +C1020 divider_2/prescaler_0/tspc_1/Z2 divider_2/clk 0.11fF +C1021 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/IN 5.26fF +C1022 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Qbar1 0.12fF +C1023 pll_full_1/ro_complete_0/a3 pll_full_1/divider_0/clk 0.11fF +C1024 divbuf_7/OUT ro_complete_0/cbank_2/switch_5/vin 0.09fF +C1025 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF +C1026 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF +C1027 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF +C1028 pll_full_1/pd_0/REF pll_full_1/pd_0/DOWN 1.48fF +C1029 divider_1/prescaler_0/tspc_2/Z4 divider_1/prescaler_0/tspc_2/D 0.11fF +C1030 pll_full_1/divbuf_0/OUT3 pll_full_1/divbuf_0/OUT5 0.01fF +C1031 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF +C1032 pd_0/DIV pd_0/R 0.51fF +C1033 divbuf_18/IN divbuf_18/OUT5 0.00fF +C1034 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/a_630_n680# 0.19fF +C1035 divbuf_13/OUT2 divbuf_13/OUT3 1.37fF +C1036 pd_1/R pd_1/and_pd_0/Out1 0.33fF +C1037 pd_1/REF pd_1/tspc_r_1/Z4 0.02fF +C1038 pd_1/tspc_r_1/Qbar1 pd_1/UP 0.11fF +C1039 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.09fF +C1040 divbuf_4/OUT divbuf_2/OUT 1.95fF +C1041 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF +C1042 divider_0/mc2 divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF +C1043 divider_0/nor_1/Z1 divider_0/nor_0/B 0.18fF +C1044 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.09fF +C1045 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/a1 0.14fF +C1046 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/z5 0.04fF +C1047 divider_0/nor_1/B divider_0/tspc_0/Z1 0.03fF +C1048 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF +C1049 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/A 0.01fF +C1050 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z2 1.07fF +C1051 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/tspc_0/Z2 0.01fF +C1052 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/Out 0.21fF +C1053 divbuf_5/a_492_n240# divbuf_5/IN 0.13fF +C1054 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z2 0.01fF +C1055 divider_1/prescaler_0/tspc_2/Z3 divider_1/clk 0.45fF +C1056 divbuf_21/OUT2 divbuf_21/OUT5 0.02fF +C1057 divbuf_21/OUT3 divbuf_21/OUT4 5.16fF +C1058 pd_1/DIV pd_1/tspc_r_0/Qbar1 0.12fF +C1059 pd_0/REF pd_0/tspc_r_1/Qbar1 0.12fF +C1060 divbuf_12/a_492_n240# divbuf_12/OUT2 0.42fF +C1061 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z1 0.09fF +C1062 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z2 0.19fF +C1063 divbuf_24/OUT5 divbuf_24/OUT 43.38fF +C1064 pll_full_1/divbuf_0/IN pll_full_1/divider_0/tspc_0/a_630_n680# 0.04fF +C1065 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/a_492_n240# 0.01fF +C1066 divbuf_14/OUT divbuf_14/OUT5 43.38fF +C1067 divbuf_6/OUT divbuf_6/OUT2 0.06fF +C1068 ro_complete_1/a5 ro_complete_1/cbank_2/switch_0/vin 0.09fF +C1069 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/R 0.29fF +C1070 divider_2/tspc_1/Q divider_2/tspc_0/Z2 0.14fF +C1071 divider_2/tspc_1/Q divider_2/tspc_0/Z4 0.15fF +C1072 divider_1/tspc_1/Z3 divider_1/nor_0/B 0.38fF +C1073 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Z4 0.65fF +C1074 pll_full_0/ro_complete_0/a3 pll_full_0/divider_0/clk 0.11fF +C1075 divider_2/mc2 divider_2/nor_0/B 0.06fF +C1076 pd_1/DOWN pd_1/tspc_r_0/Z3 0.03fF +C1077 divbuf_23/IN divbuf_23/OUT5 0.00fF +C1078 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/R 0.27fF +C1079 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Q 0.04fF +C1080 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z2 1.07fF +C1081 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.11fF +C1082 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/z5 0.04fF +C1083 divbuf_2/OUT3 divbuf_2/OUT5 0.01fF +C1084 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/DOWN 0.03fF +C1085 pll_full_0/pd_0/DIV pll_full_0/divider_0/clk 2.26fF +C1086 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z4 0.12fF +C1087 divider_0/prescaler_0/Out divider_0/tspc_2/Z2 0.11fF +C1088 divider_0/tspc_0/Z3 divider_0/tspc_0/Z2 0.16fF +C1089 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF +C1090 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.14fF +C1091 divider_0/nor_1/Z1 divider_0/and_0/B 0.78fF +C1092 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/nor_0/A 0.03fF +C1093 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/Z2 0.40fF +C1094 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Qbar1 0.38fF +C1095 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF +C1096 divider_1/nor_0/B divider_1/tspc_1/Q 0.51fF +C1097 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z4 0.00fF +C1098 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Q 0.21fF +C1099 divbuf_10/OUT2 divbuf_10/OUT 0.06fF +C1100 divbuf_10/OUT3 divbuf_10/OUT5 0.01fF +C1101 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF +C1102 divider_2/tspc_0/Z2 divider_2/nor_0/B 0.20fF +C1103 divider_1/and_0/B divider_1/and_0/Z1 0.07fF +C1104 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF +C1105 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF +C1106 pd_1/R pd_1/tspc_r_1/Z3 0.29fF +C1107 pll_full_1/divbuf_0/a_492_n240# pll_full_1/divbuf_0/IN 0.13fF +C1108 divbuf_17/OUT5 divbuf_17/OUT 43.38fF +C1109 divider_2/nor_0/B divider_2/tspc_0/Z4 0.02fF +C1110 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/nand_1/z1 0.01fF +C1111 divider_2/prescaler_0/tspc_2/Z2 divider_2/clk 0.11fF +C1112 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF +C1113 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/Z4 0.08fF +C1114 divbuf_3/OUT divbuf_3/OUT5 43.38fF +C1115 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF +C1116 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C1117 divbuf_4/OUT4 divbuf_4/OUT5 20.26fF +C1118 pll_full_1/divbuf_0/OUT3 pll_full_1/pd_0/DIV 0.26fF +C1119 pll_full_0/divbuf_0/IN pll_full_0/divider_0/tspc_0/a_630_n680# 0.04fF +C1120 divider_1/tspc_0/Z1 divider_1/tspc_0/Z3 0.06fF +C1121 divider_1/prescaler_0/tspc_1/Z4 divider_1/clk 0.12fF +C1122 pd_0/DOWN pd_0/UP 0.46fF +C1123 pd_0/tspc_r_0/Z4 pd_0/tspc_r_0/z5 0.04fF +C1124 divbuf_17/OUT4 divbuf_17/OUT 1.11fF +C1125 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z2 0.01fF +C1126 divider_2/tspc_2/Q divider_2/tspc_1/Z3 0.45fF +C1127 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z4 0.36fF +C1128 divbuf_8/OUT2 divbuf_8/OUT5 0.02fF +C1129 divbuf_8/OUT3 divbuf_8/OUT4 5.16fF +C1130 pd_1/UP pd_1/and_pd_0/Z1 0.06fF +C1131 divbuf_24/a_492_n240# divbuf_24/OUT2 0.42fF +C1132 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/nor_0/B 0.06fF +C1133 divider_2/tspc_2/Z3 divider_2/tspc_2/Z4 0.65fF +C1134 divider_0/Out divider_0/nor_1/B 0.22fF +C1135 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF +C1136 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_0/vin 0.19fF +C1137 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/nor_0/A 0.15fF +C1138 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_2/Z3 0.45fF +C1139 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/a0 0.13fF +C1140 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF +C1141 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF +C1142 divider_0/prescaler_0/tspc_2/Q divider_0/clk 0.05fF +C1143 divbuf_5/OUT4 divbuf_5/OUT5 20.26fF +C1144 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/R 0.03fF +C1145 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/UP 0.06fF +C1146 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF +C1147 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF +C1148 divider_1/nor_1/B divider_1/nor_0/B 0.47fF +C1149 divider_1/tspc_1/Z1 divider_1/tspc_1/Z2 1.07fF +C1150 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z1 0.08fF +C1151 divider_1/tspc_2/a_630_n680# divider_1/nor_0/A 0.35fF +C1152 divider_1/prescaler_0/tspc_1/Q divider_1/clk 0.60fF +C1153 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/OUT5 43.38fF +C1154 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/nor_0/A 0.03fF +C1155 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/Z2 0.40fF +C1156 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z3 0.09fF +C1157 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF +C1158 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z3 0.16fF +C1159 pll_full_1/pd_0/DIV pll_full_1/divider_0/and_0/OUT 0.01fF +C1160 pll_full_1/divbuf_1/a_492_n240# pll_full_1/divbuf_1/OUT5 0.01fF +C1161 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.19fF +C1162 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/Out 0.04fF +C1163 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.00fF +C1164 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF +C1165 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF +C1166 divbuf_1/OUT5 divbuf_1/OUT 43.38fF +C1167 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/switch_2/vin 0.20fF +C1168 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF +C1169 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/pd_0/tspc_r_1/Z2 0.71fF +C1170 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT3 1.37fF +C1171 ro_complete_1/a1 ro_complete_1/cbank_1/v 0.05fF +C1172 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/IN 0.13fF +C1173 divider_0/and_0/out1 divider_0/and_0/B 0.18fF +C1174 filter_0/v divbuf_25/OUT2 0.06fF +C1175 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/tspc_r_1/Qbar1 0.01fF +C1176 divider_1/mc2 divider_1/nor_0/A 0.04fF +C1177 divider_1/tspc_0/Z1 divider_1/tspc_0/Z2 1.07fF +C1178 divbuf_11/OUT2 divbuf_11/OUT 0.06fF +C1179 divbuf_11/OUT3 divbuf_11/OUT5 0.01fF +C1180 divbuf_19/a_492_n240# divbuf_19/OUT2 0.42fF +C1181 divbuf_17/OUT3 divbuf_17/OUT 0.26fF +C1182 pd_1/DOWN pd_1/UP 0.46fF +C1183 pd_1/tspc_r_0/Z3 pd_1/R 0.27fF +C1184 io_clamp_high[0] io_analog[4] 0.53fF +C1185 divbuf_0/OUT5 divbuf_0/OUT2 0.02fF +C1186 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/and_0/B 0.18fF +C1187 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/a_630_n680# 0.01fF +C1188 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1189 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/UP 0.03fF +C1190 divider_0/nor_0/B divider_0/tspc_2/a_630_n680# 0.01fF +C1191 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Q 0.05fF +C1192 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF +C1193 divbuf_7/OUT ro_complete_0/cbank_2/v 0.05fF +C1194 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z3 0.05fF +C1195 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/tspc_2/Z1 0.03fF +C1196 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF +C1197 divbuf_20/a_492_n240# divbuf_20/OUT5 0.01fF +C1198 pll_full_1/divbuf_1/OUT2 pll_full_1/divbuf_1/a_492_n240# 0.42fF +C1199 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_0/A 0.15fF +C1200 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z3 0.45fF +C1201 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z2 0.19fF +C1202 divbuf_16/OUT divbuf_16/OUT3 0.26fF +C1203 divider_1/prescaler_0/tspc_0/Z2 divider_1/clk 0.11fF +C1204 divider_1/nor_1/B divider_1/and_0/B 0.29fF +C1205 pd_1/DIV pd_1/tspc_r_0/Z1 0.17fF +C1206 pd_0/DIV pd_0/tspc_r_0/Z4 0.02fF +C1207 pd_0/tspc_r_0/Qbar1 pd_0/R 0.01fF +C1208 pd_0/DOWN pd_0/tspc_r_0/Qbar 0.21fF +C1209 divider_2/mc2 divider_2/and_0/out1 0.06fF +C1210 pd_1/tspc_r_1/Z3 pd_1/tspc_r_1/z5 0.11fF +C1211 divider_2/and_0/OUT divider_2/and_0/B 0.01fF +C1212 divbuf_13/OUT2 divbuf_13/OUT5 0.02fF +C1213 divbuf_13/OUT3 divbuf_13/OUT4 5.16fF +C1214 ro_complete_0/cbank_1/switch_3/vin divbuf_6/OUT 0.14fF +C1215 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/v 0.05fF +C1216 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF +C1217 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z4 0.01fF +C1218 ro_complete_1/a4 ro_complete_1/cbank_2/switch_1/vin 0.09fF +C1219 ro_complete_1/cbank_0/switch_3/vin ro_complete_1/cbank_0/v 1.30fF +C1220 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF +C1221 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/Out 0.04fF +C1222 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/prescaler_0/Out 0.04fF +C1223 divbuf_21/OUT3 divbuf_21/OUT 0.26fF +C1224 divbuf_21/OUT4 divbuf_21/OUT5 20.26fF +C1225 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C1226 divider_1/tspc_0/Z2 divider_1/tspc_0/Z3 0.16fF +C1227 divider_1/prescaler_0/tspc_2/Z4 divider_1/clk 0.12fF +C1228 pd_1/DIV pd_1/R 0.51fF +C1229 pd_0/tspc_r_1/Z3 pd_0/UP 0.03fF +C1230 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z4 0.12fF +C1231 divider_2/tspc_1/Z2 divider_2/nor_0/B 0.30fF +C1232 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/a_630_n680# 0.19fF +C1233 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF +C1234 divbuf_2/OUT divbuf_2/OUT4 1.11fF +C1235 divbuf_4/OUT ro_complete_0/cbank_2/switch_0/vin 0.12fF +C1236 divbuf_14/OUT divbuf_14/a_492_n240# 0.00fF +C1237 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF +C1238 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.06fF +C1239 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/D 0.03fF +C1240 pll_full_0/pd_0/DIV pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF +C1241 divbuf_15/OUT3 divbuf_15/OUT4 5.16fF +C1242 divbuf_6/OUT divbuf_6/OUT4 1.11fF +C1243 divbuf_3/OUT2 divbuf_3/OUT3 1.37fF +C1244 ro_complete_1/a3 ro_complete_1/cbank_2/switch_2/vin 0.09fF +C1245 pll_full_1/pd_0/tspc_r_1/z5 pll_full_1/pd_0/tspc_r_1/Qbar1 0.20fF +C1246 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.18fF +C1247 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF +C1248 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1249 divider_1/tspc_0/Z4 divider_1/tspc_1/Q 0.15fF +C1250 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF +C1251 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z1 0.03fF +C1252 divider_2/prescaler_0/tspc_0/Z3 divider_2/clk 0.64fF +C1253 divbuf_23/OUT2 divbuf_23/OUT 0.06fF +C1254 divbuf_23/OUT3 divbuf_23/OUT5 0.01fF +C1255 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF +C1256 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/z5 0.04fF +C1257 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.12fF +C1258 pll_full_0/pd_0/R pll_full_0/pd_0/REF 0.61fF +C1259 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z3 0.16fF +C1260 pll_full_1/ro_complete_0/a4 pll_full_1/divider_0/clk 0.01fF +C1261 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/a3 0.13fF +C1262 divbuf_3/OUT ro_complete_0/cbank_2/v 0.05fF +C1263 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF +C1264 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT2 0.02fF +C1265 ro_complete_1/cbank_2/switch_1/vin ro_complete_1/cbank_2/v 1.30fF +C1266 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C1267 divbuf_10/OUT4 divbuf_10/OUT 1.11fF +C1268 pll_full_1/pd_0/DIV pll_full_1/pd_0/tspc_r_0/Qbar1 0.12fF +C1269 divider_1/tspc_0/a_630_n680# divider_1/tspc_1/Q 0.01fF +C1270 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Z4 0.65fF +C1271 divbuf_22/a_492_n240# divbuf_22/OUT5 0.01fF +C1272 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF +C1273 pd_1/R pd_1/UP 0.45fF +C1274 divider_2/prescaler_0/tspc_0/D divider_2/prescaler_0/nand_1/z1 0.21fF +C1275 divider_2/nor_0/B divider_2/and_0/A 0.26fF +C1276 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/v 0.05fF +C1277 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF +C1278 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF +C1279 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z4 0.00fF +C1280 divbuf_4/OUT divbuf_4/OUT3 0.26fF +C1281 ro_complete_1/cbank_1/switch_3/vin ro_complete_1/cbank_1/v 1.30fF +C1282 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/Q 0.19fF +C1283 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.01fF +C1284 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/and_0/A 0.01fF +C1285 divider_1/tspc_0/Z4 divider_1/nor_1/B 0.22fF +C1286 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF +C1287 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/UP 0.33fF +C1288 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF +C1289 divbuf_8/OUT3 divbuf_8/OUT 0.26fF +C1290 divbuf_8/OUT4 divbuf_8/OUT5 20.26fF +C1291 pd_0/R pd_0/REF 0.61fF +C1292 divbuf_17/OUT2 divbuf_17/OUT 0.06fF +C1293 divbuf_17/IN divbuf_17/OUT5 0.00fF +C1294 divbuf_2/IN divbuf_2/a_492_n240# 0.13fF +C1295 divbuf_3/OUT ro_complete_0/cbank_1/switch_2/vin 0.09fF +C1296 divider_0/tspc_1/Z3 divider_0/tspc_1/a_630_n680# 0.05fF +C1297 divider_0/tspc_1/Z1 divider_0/nor_0/B 0.03fF +C1298 divider_0/tspc_0/a_630_n680# divider_0/nor_1/B 0.35fF +C1299 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF +C1300 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z4 0.08fF +C1301 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/nor_0/A 0.01fF +C1302 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_2/Z4 0.12fF +C1303 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z2 0.01fF +C1304 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/switch_4/vin 0.20fF +C1305 divbuf_15/OUT divbuf_15/OUT4 1.11fF +C1306 divider_0/nor_0/A divider_0/tspc_2/Z2 0.23fF +C1307 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.29fF +C1308 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF +C1309 divider_1/tspc_1/Z2 divider_1/tspc_1/Z3 0.16fF +C1310 divider_1/nor_1/B divider_1/tspc_0/a_630_n680# 0.35fF +C1311 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z3 0.11fF +C1312 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF +C1313 pll_full_0/ro_complete_0/a4 pll_full_0/divider_0/clk 0.01fF +C1314 divider_2/prescaler_0/Out divider_2/tspc_2/a_630_n680# 0.01fF +C1315 divider_1/and_0/OUT divider_1/and_0/Z1 0.04fF +C1316 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z2 0.01fF +C1317 divider_1/prescaler_0/tspc_2/Q divider_1/clk 0.05fF +C1318 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.09fF +C1319 divider_2/nor_0/B divider_2/tspc_1/Z4 0.21fF +C1320 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z4 0.36fF +C1321 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C1322 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF +C1323 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT4 5.16fF +C1324 divbuf_15/IN divbuf_15/OUT5 0.00fF +C1325 divider_0/mc2 divider_0/and_0/out1 0.06fF +C1326 divider_0/nor_0/B divider_0/nor_1/B 0.47fF +C1327 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF +C1328 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF +C1329 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF +C1330 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF +C1331 divider_0/nor_0/Z1 divider_0/and_0/A 0.80fF +C1332 pll_full_1/divider_0/tspc_1/Z4 pll_full_1/divider_0/nor_0/A 0.02fF +C1333 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_0/Z2 0.20fF +C1334 ro_complete_1/a5 ro_complete_1/cbank_2/v 0.08fF +C1335 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C1336 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF +C1337 divbuf_10/a_492_n240# divbuf_10/IN 0.13fF +C1338 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF +C1339 divider_2/tspc_0/Z2 divider_2/tspc_0/Z1 1.07fF +C1340 divider_2/nor_0/Z1 divider_2/and_0/A 0.80fF +C1341 divider_1/and_0/out1 divider_1/and_0/B 0.18fF +C1342 divbuf_11/OUT4 divbuf_11/OUT 1.11fF +C1343 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/and_0/A 0.01fF +C1344 divbuf_9/a_492_n240# divbuf_9/OUT5 0.01fF +C1345 pd_1/tspc_r_1/Z1 pd_1/REF 0.17fF +C1346 pd_1/tspc_r_0/Z3 pd_1/tspc_r_0/Z4 0.20fF +C1347 pll_full_1/divbuf_1/OUT5 pll_full_1/divbuf_1/OUT 43.38fF +C1348 pll_full_1/divbuf_0/OUT5 pll_full_1/divbuf_0/IN 0.00fF +C1349 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.20fF +C1350 divider_2/tspc_0/Z1 divider_2/tspc_0/Z4 0.00fF +C1351 divider_0/Out divider_0/tspc_0/a_630_n680# 0.04fF +C1352 divbuf_0/OUT5 divbuf_0/OUT3 0.01fF +C1353 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF +C1354 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z2 0.19fF +C1355 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/nor_0/B 0.30fF +C1356 pll_full_1/ro_complete_0/a1 pll_full_1/divider_0/clk 0.11fF +C1357 divbuf_15/a_492_n240# divbuf_15/OUT 0.00fF +C1358 divider_0/tspc_1/Q divider_0/tspc_0/Z1 0.01fF +C1359 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF +C1360 divider_0/nor_0/B divider_0/nor_0/A 1.21fF +C1361 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z4 0.12fF +C1362 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z2 1.07fF +C1363 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/tspc_2/Z3 0.38fF +C1364 divbuf_7/OUT divbuf_7/a_492_n240# 0.00fF +C1365 divbuf_4/a_492_n240# divbuf_4/OUT2 0.42fF +C1366 divider_1/nor_0/B divider_1/tspc_2/a_630_n680# 0.01fF +C1367 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Q 0.05fF +C1368 divider_1/prescaler_0/Out divider_1/clk 0.51fF +C1369 divbuf_20/OUT2 divbuf_20/OUT3 1.37fF +C1370 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/R 0.27fF +C1371 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/nor_0/A 0.01fF +C1372 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/Z4 0.12fF +C1373 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z2 0.01fF +C1374 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/z5 0.11fF +C1375 divbuf_13/OUT3 divbuf_13/OUT 0.26fF +C1376 divbuf_13/OUT4 divbuf_13/OUT5 20.26fF +C1377 pd_1/UP pd_1/tspc_r_1/z5 0.03fF +C1378 divbuf_15/OUT2 divbuf_15/a_492_n240# 0.42fF +C1379 ro_complete_0/cbank_0/switch_3/vin divbuf_6/OUT 0.14fF +C1380 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF +C1381 ro_complete_0/cbank_0/switch_2/vin divbuf_3/OUT 0.09fF +C1382 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_2/a_630_n680# 0.04fF +C1383 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Z4 0.12fF +C1384 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z2 0.01fF +C1385 ro_complete_1/a2 ro_complete_1/cbank_2/v 0.05fF +C1386 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/DIV 0.02fF +C1387 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF +C1388 divider_1/prescaler_0/m1_2700_2190# divider_1/and_0/OUT 0.14fF +C1389 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF +C1390 divider_0/nor_1/B divider_0/and_0/B 0.29fF +C1391 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/Z1 0.36fF +C1392 divbuf_5/a_492_n240# divbuf_5/OUT5 0.01fF +C1393 divider_1/mc2 divider_1/nor_0/B 0.06fF +C1394 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z3 0.06fF +C1395 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C1396 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_1/Q 0.13fF +C1397 divbuf_21/OUT5 divbuf_21/OUT 43.38fF +C1398 pll_full_1/divbuf_1/OUT2 pll_full_1/divbuf_1/OUT 0.06fF +C1399 pll_full_1/divbuf_1/OUT3 pll_full_1/divbuf_1/OUT5 0.01fF +C1400 pll_full_0/divider_0/tspc_1/Z4 pll_full_0/divider_0/nor_0/A 0.02fF +C1401 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_0/Z2 0.20fF +C1402 pd_1/DIV pd_1/tspc_r_0/Z4 0.02fF +C1403 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z1 0.09fF +C1404 pd_0/REF pd_0/tspc_r_1/Z2 0.19fF +C1405 divbuf_12/a_492_n240# divbuf_12/OUT 0.00fF +C1406 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF +C1407 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/a3 0.09fF +C1408 divider_2/and_0/out1 divider_2/and_0/A 0.01fF +C1409 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF +C1410 divider_0/tspc_1/a_630_n680# divider_0/nor_0/B 0.35fF +C1411 divider_0/tspc_1/Q divider_0/nor_1/B 0.22fF +C1412 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF +C1413 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF +C1414 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_0/Z2 0.14fF +C1415 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/nand_0/z1 0.01fF +C1416 divbuf_3/OUT2 divbuf_3/OUT5 0.02fF +C1417 ro_complete_1/cbank_0/switch_5/vin ro_complete_1/a0 0.09fF +C1418 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF +C1419 divbuf_15/OUT4 divbuf_15/OUT5 20.26fF +C1420 divider_0/nor_0/A divider_0/and_0/B 0.08fF +C1421 divbuf_6/IN divbuf_6/OUT5 0.00fF +C1422 divbuf_19/OUT5 divbuf_19/IN 0.00fF +C1423 divider_1/tspc_2/Q divider_1/tspc_1/Z4 0.15fF +C1424 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_0/B 0.30fF +C1425 pll_full_0/ro_complete_0/a1 pll_full_0/divider_0/clk 0.11fF +C1426 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z3 0.65fF +C1427 divider_2/prescaler_0/tspc_0/Z4 divider_2/clk 0.12fF +C1428 divbuf_11/a_492_n240# divbuf_11/IN 0.13fF +C1429 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF +C1430 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF +C1431 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z3 0.38fF +C1432 divbuf_23/OUT4 divbuf_23/OUT 1.11fF +C1433 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C1434 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/switch_1/vin 0.19fF +C1435 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar1 0.30fF +C1436 divbuf_25/OUT3 divbuf_25/OUT5 0.01fF +C1437 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.05fF +C1438 divbuf_1/OUT2 divbuf_1/OUT 0.06fF +C1439 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT3 0.01fF +C1440 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/clk 0.06fF +C1441 pll_full_1/divbuf_1/OUT2 pll_full_1/divbuf_1/OUT3 1.37fF +C1442 divider_2/nor_1/B divider_2/tspc_1/a_630_n680# 0.00fF +C1443 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/Out 0.05fF +C1444 divider_1/tspc_2/Q divider_1/tspc_2/Z3 0.05fF +C1445 divider_1/mc2 divider_1/and_0/B 0.20fF +C1446 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z2 0.25fF +C1447 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.04fF +C1448 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF +C1449 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF +C1450 pd_0/DIV pd_0/tspc_r_0/Z3 0.65fF +C1451 divbuf_18/OUT2 divbuf_18/a_492_n240# 0.42fF +C1452 divider_2/mc2 divider_2/nor_0/A 0.04fF +C1453 divider_2/tspc_0/Z2 divider_2/tspc_0/Z3 0.16fF +C1454 divbuf_22/OUT2 divbuf_22/OUT3 1.37fF +C1455 pll_full_1/pd_0/DIV pll_full_1/divbuf_0/IN 5.26fF +C1456 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF +C1457 divbuf_18/OUT5 divbuf_18/a_492_n240# 0.01fF +C1458 divider_2/prescaler_0/tspc_1/Q divider_2/nor_0/A 0.03fF +C1459 divider_2/tspc_0/Z3 divider_2/tspc_0/Z4 0.65fF +C1460 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF +C1461 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Z4 0.65fF +C1462 divbuf_15/a_492_n240# divbuf_15/OUT5 0.01fF +C1463 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/D 0.32fF +C1464 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF +C1465 divbuf_4/OUT divbuf_4/OUT5 43.38fF +C1466 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF +C1467 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C1468 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF +C1469 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/DOWN 0.02fF +C1470 divbuf_21/a_492_n240# divbuf_21/OUT2 0.42fF +C1471 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_0/Z2 0.14fF +C1472 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF +C1473 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_2/Q 0.19fF +C1474 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/clk 0.01fF +C1475 pd_1/tspc_r_0/Z1 pd_1/tspc_r_0/Z2 0.71fF +C1476 pd_0/DOWN pd_0/tspc_r_1/Qbar 0.02fF +C1477 pd_0/R pd_0/tspc_r_1/Qbar1 0.30fF +C1478 divbuf_8/OUT5 divbuf_8/OUT 43.38fF +C1479 divbuf_24/a_492_n240# divbuf_24/OUT 0.00fF +C1480 divider_0/tspc_1/Q divider_0/tspc_1/a_630_n680# 0.04fF +C1481 divider_0/tspc_1/Z3 divider_0/nor_0/B 0.38fF +C1482 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z4 0.12fF +C1483 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF +C1484 divbuf_3/OUT ro_complete_0/cbank_2/switch_1/vin 0.13fF +C1485 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1486 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.15fF +C1487 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/REF 0.65fF +C1488 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF +C1489 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C1490 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/R 0.02fF +C1491 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z4 0.28fF +C1492 divbuf_7/IN divbuf_7/OUT5 0.00fF +C1493 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/clk 0.06fF +C1494 divider_2/prescaler_0/Out divider_2/nor_0/A 0.15fF +C1495 divider_1/nor_0/A divider_1/tspc_2/Z2 0.23fF +C1496 divider_1/prescaler_0/tspc_0/D divider_1/clk 0.29fF +C1497 pd_1/tspc_r_0/Z2 pd_1/R 0.21fF +C1498 divbuf_23/a_492_n240# divbuf_23/IN 0.13fF +C1499 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.13fF +C1500 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1501 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 4.58fF +C1502 divider_2/nor_1/B divider_2/tspc_1/Q 0.22fF +C1503 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/Z1 0.01fF +C1504 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C1505 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF +C1506 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF +C1507 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF +C1508 divbuf_4/OUT ro_complete_0/cbank_2/v 0.05fF +C1509 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF +C1510 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/and_0/A 0.26fF +C1511 ro_complete_1/a0 ro_complete_1/cbank_2/switch_4/vin 0.13fF +C1512 ro_complete_1/cbank_0/v ro_complete_1/cbank_1/v 1.27fF +C1513 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF +C1514 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/a_740_n680# 0.33fF +C1515 divider_1/nor_0/B divider_1/tspc_0/Z2 0.20fF +C1516 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Q 0.91fF +C1517 divider_1/prescaler_0/tspc_1/Z2 divider_1/and_0/OUT 0.06fF +C1518 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z3 0.33fF +C1519 pd_1/tspc_r_1/Z2 pd_1/tspc_r_1/Z3 0.25fF +C1520 pd_1/tspc_r_0/Qbar1 pd_1/tspc_r_0/z5 0.20fF +C1521 divbuf_9/OUT2 divbuf_9/OUT3 1.37fF +C1522 pll_full_1/pd_0/DIV pll_full_1/divider_0/clk 2.26fF +C1523 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/v 0.05fF +C1524 divbuf_0/OUT5 divbuf_0/OUT4 20.26fF +C1525 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF +C1526 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C1527 divider_0/tspc_0/Z4 divider_0/tspc_0/Z1 0.00fF +C1528 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF +C1529 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z3 0.16fF +C1530 pll_full_1/divider_0/nor_0/A pll_full_1/divider_0/tspc_2/Z4 0.21fF +C1531 divider_2/nor_1/B divider_2/nor_0/B 0.47fF +C1532 divbuf_20/OUT2 divbuf_20/OUT5 0.02fF +C1533 divbuf_20/OUT3 divbuf_20/OUT4 5.16fF +C1534 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF +C1535 divider_1/nor_0/B divider_1/nor_0/A 1.21fF +C1536 divbuf_8/a_492_n240# divbuf_8/OUT2 0.42fF +C1537 pd_0/DOWN pd_0/tspc_r_0/z5 0.03fF +C1538 pd_0/tspc_r_0/Z2 pd_0/R 0.21fF +C1539 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF +C1540 pd_1/tspc_r_1/Z4 pd_1/tspc_r_1/z5 0.04fF +C1541 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT5 43.38fF +C1542 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z3 0.05fF +C1543 divider_2/nor_0/A divider_2/tspc_2/Z1 0.03fF +C1544 divbuf_13/OUT5 divbuf_13/OUT 43.38fF +C1545 ro_complete_0/cbank_1/switch_1/vin divbuf_3/OUT 0.14fF +C1546 pll_full_1/ro_complete_0/cbank_2/switch_2/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF +C1547 divbuf_2/OUT2 divbuf_2/OUT3 1.37fF +C1548 ro_complete_0/cbank_2/switch_3/vin divbuf_6/OUT 0.14fF +C1549 divider_0/tspc_1/Z3 divider_0/tspc_1/Q 0.05fF +C1550 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z1 0.08fF +C1551 divider_0/mc2 divider_0/nor_1/B 0.15fF +C1552 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/nor_0/A 0.55fF +C1553 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_1/Z4 0.21fF +C1554 divbuf_19/OUT4 divbuf_19/OUT5 20.26fF +C1555 divbuf_16/OUT5 divbuf_16/a_492_n240# 0.01fF +C1556 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_2/D 0.16fF +C1557 ro_complete_1/cbank_0/switch_2/vin ro_complete_1/cbank_0/v 1.30fF +C1558 pll_full_1/divider_0/and_0/A pll_full_1/divider_0/and_0/B 0.18fF +C1559 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF +C1560 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1561 divider_1/tspc_2/Q divider_1/tspc_1/Z1 0.01fF +C1562 divider_1/tspc_0/Z4 divider_1/tspc_0/Z1 0.00fF +C1563 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF +C1564 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z4 0.00fF +C1565 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z1 0.01fF +C1566 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C1567 pll_full_1/divbuf_1/OUT4 pll_full_1/divbuf_1/OUT 1.11fF +C1568 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/A 0.26fF +C1569 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_1/Q 0.21fF +C1570 divider_1/and_0/OUT divider_1/and_0/out1 0.31fF +C1571 divbuf_12/IN divbuf_12/OUT5 0.00fF +C1572 pd_0/DOWN pd_0/and_pd_0/Z1 0.07fF +C1573 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF +C1574 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/R 0.01fF +C1575 ro_complete_0/cbank_1/switch_4/vin divbuf_7/OUT 0.13fF +C1576 divbuf_2/OUT ro_complete_0/cbank_2/switch_0/vin 0.09fF +C1577 pll_full_1/pd_0/tspc_r_0/Z1 pll_full_1/pd_0/tspc_r_0/Z2 0.71fF +C1578 divider_0/mc2 divider_0/nor_0/A 0.04fF +C1579 divider_0/tspc_0/Z4 divider_0/nor_1/B 0.22fF +C1580 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z2 0.36fF +C1581 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/divider_0/prescaler_0/nand_0/z1 0.24fF +C1582 divbuf_1/OUT divbuf_1/OUT3 0.26fF +C1583 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C1584 divbuf_19/OUT5 divbuf_19/OUT 43.38fF +C1585 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z2 0.16fF +C1586 divider_1/tspc_1/a_630_n680# divider_1/nor_0/B 0.35fF +C1587 divbuf_6/OUT3 divbuf_6/OUT5 0.01fF +C1588 pll_full_1/pd_0/REF pll_full_1/divbuf_1/a_492_n240# 0.13fF +C1589 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C1590 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF +C1591 pll_full_0/divider_0/nor_0/A pll_full_0/divider_0/tspc_2/Z4 0.21fF +C1592 divbuf_17/OUT4 divbuf_17/OUT5 20.26fF +C1593 divider_1/nor_0/A divider_1/and_0/B 0.08fF +C1594 pd_1/DOWN pd_1/tspc_r_0/z5 0.03fF +C1595 io_clamp_low[2] io_analog[6] 0.53fF +C1596 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.09fF +C1597 divider_2/tspc_1/Z2 divider_2/nor_0/A 0.15fF +C1598 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/D 0.03fF +C1599 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/a_630_n680# 0.01fF +C1600 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.19fF +C1601 pll_full_1/ro_complete_0/a5 pll_full_1/divider_0/clk 0.15fF +C1602 divbuf_6/OUT ro_complete_0/cbank_2/v 0.05fF +C1603 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT4 20.26fF +C1604 divbuf_16/OUT5 divbuf_16/OUT 43.38fF +C1605 divbuf_14/OUT divbuf_14/OUT3 0.26fF +C1606 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Q 0.20fF +C1607 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF +C1608 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF +C1609 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/divider_0/clk 0.26fF +C1610 divider_2/tspc_1/Q divider_2/tspc_1/a_630_n680# 0.04fF +C1611 pll_full_1/divbuf_1/OUT3 pll_full_1/divbuf_1/OUT4 5.16fF +C1612 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C1613 divider_1/tspc_0/Z4 divider_1/tspc_0/Z3 0.65fF +C1614 divider_1/prescaler_0/tspc_2/Z2 divider_1/and_0/OUT 0.05fF +C1615 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/nor_0/A 0.55fF +C1616 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_1/Z4 0.21fF +C1617 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Qbar1 0.38fF +C1618 divbuf_22/OUT2 divbuf_22/OUT5 0.02fF +C1619 divbuf_22/OUT3 divbuf_22/OUT4 5.16fF +C1620 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF +C1621 divbuf_13/a_492_n240# divbuf_13/OUT2 0.42fF +C1622 cp_0/a_1710_0# cp_0/out 0.84fF +C1623 pd_1/tspc_r_0/Z4 pd_1/tspc_r_1/Z4 0.02fF +C1624 pll_full_1/ro_complete_0/a1 pll_full_1/ro_complete_0/cbank_2/v 0.05fF +C1625 divbuf_0/OUT5 divbuf_0/a_492_n240# 0.01fF +C1626 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF +C1627 divider_0/tspc_2/Q divider_0/tspc_1/Z2 0.14fF +C1628 divider_0/tspc_0/a_630_n680# divider_0/tspc_1/Q 0.01fF +C1629 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF +C1630 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/Out 0.05fF +C1631 divbuf_5/OUT divbuf_5/OUT3 0.26fF +C1632 pll_full_1/pd_0/REF pll_full_1/pd_0/tspc_r_1/z5 0.04fF +C1633 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF +C1634 divbuf_14/OUT5 divbuf_14/OUT4 20.26fF +C1635 divider_0/nor_0/B divider_0/and_0/B 0.31fF +C1636 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF +C1637 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/tspc_0/D 0.04fF +C1638 divbuf_17/OUT3 divbuf_17/OUT5 0.01fF +C1639 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z3 0.05fF +C1640 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_0/D 0.32fF +C1641 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/clk 0.01fF +C1642 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/R 0.33fF +C1643 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z2 0.36fF +C1644 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF +C1645 divider_2/tspc_1/a_630_n680# divider_2/nor_0/B 0.35fF +C1646 divider_2/tspc_1/Z1 divider_2/tspc_1/Z2 1.07fF +C1647 divbuf_24/IN divbuf_24/OUT5 0.00fF +C1648 divider_2/nor_0/A divider_2/and_0/A 0.01fF +C1649 divbuf_5/OUT ro_complete_0/cbank_1/v 0.05fF +C1650 ro_complete_0/cbank_0/switch_4/vin divbuf_7/OUT 0.13fF +C1651 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT2 0.06fF +C1652 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT3 0.01fF +C1653 divider_0/tspc_1/Q divider_0/nor_0/B 0.51fF +C1654 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF +C1655 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.05fF +C1656 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/clk 0.64fF +C1657 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF +C1658 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF +C1659 divbuf_17/OUT3 divbuf_17/OUT4 5.16fF +C1660 divider_1/mc2 divider_1/and_0/OUT 0.05fF +C1661 divider_1/tspc_0/Z4 divider_1/tspc_0/Z2 0.36fF +C1662 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z2 1.07fF +C1663 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF +C1664 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF +C1665 pll_full_0/ro_complete_0/a5 pll_full_0/divider_0/clk 0.15fF +C1666 divider_2/prescaler_0/Out divider_2/tspc_2/Z2 0.11fF +C1667 divider_1/tspc_2/Z1 divider_1/tspc_2/Z3 0.06fF +C1668 divbuf_7/OUT3 divbuf_7/OUT5 0.01fF +C1669 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/clk 0.26fF +C1670 pd_1/tspc_r_0/Z2 pd_1/tspc_r_0/Z4 0.14fF +C1671 pd_0/tspc_r_1/Z4 pd_0/tspc_r_1/z5 0.04fF +C1672 pll_full_1/pd_0/DIV pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.03fF +C1673 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/a0 0.13fF +C1674 divider_2/prescaler_0/m1_2700_2190# divider_2/nor_0/A 0.01fF +C1675 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/tspc_1/Z3 0.45fF +C1676 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1677 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C1678 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/divider_0/clk 1.46fF +C1679 divbuf_1/OUT5 divbuf_1/OUT4 20.26fF +C1680 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.43fF +C1681 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF +C1682 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF +C1683 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C1684 divbuf_10/a_492_n240# divbuf_10/OUT5 0.01fF +C1685 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/a_740_n680# 0.08fF +C1686 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z2 0.01fF +C1687 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z3 0.05fF +C1688 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z4 0.08fF +C1689 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/D 0.09fF +C1690 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/DOWN 0.03fF +C1691 pd_1/tspc_r_1/Qbar pd_1/tspc_r_1/Qbar1 0.01fF +C1692 divbuf_9/OUT2 divbuf_9/OUT5 0.02fF +C1693 divbuf_9/OUT3 divbuf_9/OUT4 5.16fF +C1694 divider_2/tspc_1/Z4 divider_2/nor_0/A 0.02fF +C1695 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.00fF +C1696 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/divider_0/clk 1.27fF +C1697 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_1/z5 0.02fF +C1698 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF +C1699 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z4 0.02fF +C1700 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF +C1701 divbuf_3/OUT divbuf_3/a_492_n240# 0.00fF +C1702 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF +C1703 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/a_492_n240# 0.01fF +C1704 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z3 0.33fF +C1705 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF +C1706 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z4 0.36fF +C1707 divbuf_7/OUT divbuf_7/OUT2 0.06fF +C1708 divider_2/tspc_1/Q divider_2/nor_0/B 0.51fF +C1709 divbuf_20/OUT3 divbuf_20/OUT 0.26fF +C1710 divbuf_20/OUT4 divbuf_20/OUT5 20.26fF +C1711 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C1712 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF +C1713 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/clk 0.64fF +C1714 pd_0/tspc_r_0/Z2 pd_0/tspc_r_0/Z4 0.14fF +C1715 divider_2/mc2 divider_2/and_0/B 0.20fF +C1716 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.20fF +C1717 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/tspc_r_0/Qbar1 0.01fF +C1718 divbuf_18/a_492_n240# divbuf_18/OUT 0.00fF +C1719 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z4 0.12fF +C1720 divider_2/tspc_2/Z1 divider_2/tspc_2/Z2 1.07fF +C1721 divider_2/nor_0/A divider_2/tspc_2/Z3 0.38fF +C1722 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C1723 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z3 0.11fF +C1724 divbuf_2/OUT2 divbuf_2/OUT5 0.02fF +C1725 divbuf_4/OUT ro_complete_0/cbank_2/switch_1/vin 0.09fF +C1726 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF +C1727 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_2/a_630_n680# 0.01fF +C1728 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/tspc_0/Z1 0.06fF +C1729 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.06fF +C1730 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/switch_5/vin 0.20fF +C1731 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF +C1732 divider_2/nor_1/B divider_2/nor_1/Z1 0.06fF +C1733 divbuf_16/IN divbuf_16/a_492_n240# 0.13fF +C1734 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/nand_0/z1 0.07fF +C1735 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/tspc_1/Z3 0.45fF +C1736 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1737 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C1738 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/divider_0/clk 1.46fF +C1739 divider_1/tspc_2/Q divider_1/tspc_1/Z3 0.45fF +C1740 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z4 0.65fF +C1741 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/Z2 1.07fF +C1742 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/D 0.05fF +C1743 pd_0/R pd_0/and_pd_0/Out1 0.33fF +C1744 pd_0/REF pd_0/tspc_r_1/Z4 0.02fF +C1745 pd_0/UP pd_0/tspc_r_1/Qbar 0.21fF +C1746 divider_2/tspc_1/Z1 divider_2/tspc_1/Z4 0.00fF +C1747 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z2 0.01fF +C1748 divbuf_12/OUT2 divbuf_12/OUT 0.06fF +C1749 divbuf_12/OUT3 divbuf_12/OUT5 0.01fF +C1750 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.09fF +C1751 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C1752 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/Out 0.21fF +C1753 divider_2/and_0/out1 divider_2/and_0/Z1 0.36fF +C1754 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF +C1755 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1756 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF +C1757 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/clk 0.45fF +C1758 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_1/Z4 0.02fF +C1759 ro_complete_1/cbank_2/switch_3/vin ro_complete_1/cbank_2/v 1.30fF +C1760 divider_1/prescaler_0/m1_2700_2190# divider_1/clk 0.01fF +C1761 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF +C1762 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/divider_0/clk 1.27fF +C1763 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z2 0.36fF +C1764 filter_0/v divbuf_25/OUT4 1.11fF +C1765 divbuf_11/a_492_n240# divbuf_11/OUT5 0.01fF +C1766 divbuf_17/OUT2 divbuf_17/OUT5 0.02fF +C1767 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF +C1768 cp_0/a_1710_0# cp_0/a_1710_n2840# 0.83fF +C1769 divider_2/and_0/OUT divider_2/prescaler_0/nand_0/z1 0.01fF +C1770 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1771 divbuf_0/OUT5 divbuf_0/OUT 43.38fF +C1772 divbuf_25/OUT2 divbuf_25/OUT3 1.37fF +C1773 pll_full_1/divider_0/tspc_2/Q pll_full_1/divider_0/nor_0/B 0.22fF +C1774 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/nor_1/B 0.38fF +C1775 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z2 0.21fF +C1776 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Q 0.04fF +C1777 divider_0/prescaler_0/Out divider_0/clk 0.51fF +C1778 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF +C1779 divider_2/nor_1/B divider_2/tspc_0/Z1 0.03fF +C1780 ro_complete_1/a0 ro_complete_1/cbank_2/switch_5/vin 0.09fF +C1781 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF +C1782 pll_full_1/pd_0/DIV pll_full_1/pd_0/R 0.51fF +C1783 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF +C1784 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z1 0.06fF +C1785 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF +C1786 divider_1/tspc_1/Z2 divider_1/nor_0/A 0.15fF +C1787 divider_1/prescaler_0/Out divider_1/tspc_2/Z3 0.45fF +C1788 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Q 0.20fF +C1789 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/D 0.09fF +C1790 divbuf_22/OUT3 divbuf_22/OUT 0.26fF +C1791 divbuf_22/OUT4 divbuf_22/OUT5 20.26fF +C1792 pd_0/DIV pd_0/tspc_r_0/Z1 0.17fF +C1793 pd_0/tspc_r_0/Qbar1 pd_0/DOWN 0.11fF +C1794 cp_0/a_1710_0# cp_0/down 0.32fF +C1795 pd_1/tspc_r_0/z5 pd_1/tspc_r_1/z5 0.02fF +C1796 pd_1/tspc_r_1/Qbar pd_1/and_pd_0/Z1 0.02fF +C1797 pd_1/REF pd_1/tspc_r_1/Qbar1 0.12fF +C1798 divider_2/and_0/OUT divider_2/clk 0.04fF +C1799 divbuf_5/OUT divbuf_3/OUT 3.09fF +C1800 divbuf_4/OUT ro_complete_0/cbank_1/switch_1/vin 0.09fF +C1801 divider_0/mc2 divider_0/nor_0/B 0.06fF +C1802 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z4 0.12fF +C1803 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.13fF +C1804 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/and_0/OUT 0.14fF +C1805 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Z1 0.06fF +C1806 divider_1/nor_0/Z1 divider_1/nor_0/B 0.06fF +C1807 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/nand_1/z1 0.01fF +C1808 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF +C1809 divbuf_5/OUT divbuf_5/OUT5 43.38fF +C1810 divbuf_1/OUT divbuf_1/a_492_n240# 0.00fF +C1811 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF +C1812 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C1813 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/DOWN 0.07fF +C1814 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/Out 0.21fF +C1815 divbuf_21/a_492_n240# divbuf_21/OUT 0.00fF +C1816 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/R 0.01fF +C1817 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C1818 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/clk 0.45fF +C1819 divider_2/nor_0/Z1 divider_2/nor_0/B 0.06fF +C1820 divider_1/nor_0/B divider_1/and_0/B 0.31fF +C1821 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/nand_1/z1 0.22fF +C1822 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/tspc_0/D 0.04fF +C1823 pd_0/R pd_0/tspc_r_1/Z2 0.21fF +C1824 divider_2/tspc_1/Z2 divider_2/tspc_1/Z3 0.16fF +C1825 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_1/switch_1/vin 0.09fF +C1826 divbuf_24/OUT2 divbuf_24/OUT 0.06fF +C1827 divbuf_24/OUT3 divbuf_24/OUT5 0.01fF +C1828 ro_complete_1/cbank_0/switch_0/vin ro_complete_1/cbank_0/v 1.30fF +C1829 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF +C1830 divider_0/tspc_0/Z4 divider_0/nor_0/B 0.02fF +C1831 divider_0/tspc_2/Q divider_0/tspc_1/Z4 0.15fF +C1832 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z4 0.36fF +C1833 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.11fF +C1834 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/clk 0.12fF +C1835 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/pd_0/REF 0.17fF +C1836 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT4 1.11fF +C1837 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF +C1838 ro_complete_1/a4 ro_complete_1/cbank_1/v 0.05fF +C1839 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1840 divbuf_17/a_492_n240# divbuf_17/OUT 0.00fF +C1841 divbuf_17/OUT3 divbuf_17/OUT2 1.37fF +C1842 divider_2/nor_1/B divider_2/Out 0.22fF +C1843 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/clk 0.01fF +C1844 divider_1/tspc_1/Z2 divider_1/tspc_1/a_630_n680# 0.01fF +C1845 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z3 0.16fF +C1846 divbuf_6/a_492_n240# divbuf_6/IN 0.13fF +C1847 pll_full_0/divider_0/tspc_2/Q pll_full_0/divider_0/nor_0/B 0.22fF +C1848 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/nor_1/B 0.38fF +C1849 divider_1/tspc_2/Z1 divider_1/tspc_2/Z4 0.00fF +C1850 divbuf_23/a_492_n240# divbuf_23/OUT5 0.01fF +C1851 pd_1/DOWN pd_1/tspc_r_1/Qbar 0.02fF +C1852 pd_0/UP pd_0/and_pd_0/Z1 0.06fF +C1853 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/D 0.15fF +C1854 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.20fF +C1855 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar 0.02fF +C1856 divbuf_2/OUT ro_complete_0/cbank_2/v 0.08fF +C1857 divbuf_7/OUT ro_complete_0/cbank_1/switch_5/vin 0.09fF +C1858 divbuf_14/OUT2 divbuf_14/OUT5 0.02fF +C1859 divider_0/tspc_2/Q divider_0/tspc_2/Z3 0.05fF +C1860 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF +C1861 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF +C1862 divider_0/mc2 divider_0/and_0/B 0.20fF +C1863 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/clk 0.45fF +C1864 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Z3 0.11fF +C1865 divider_1/nor_0/Z1 divider_1/and_0/B 0.18fF +C1866 divbuf_3/OUT3 divbuf_3/OUT5 0.01fF +C1867 pll_full_1/cp_0/upbar pll_full_1/cp_0/down 0.02fF +C1868 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z4 0.12fF +C1869 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z2 1.07fF +C1870 divbuf_10/OUT2 divbuf_10/OUT3 1.37fF +C1871 pll_full_1/pd_0/DIV pll_full_1/pd_0/tspc_r_0/Z2 0.19fF +C1872 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF +C1873 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF +C1874 divider_2/tspc_0/Z2 divider_2/tspc_0/a_630_n680# 0.01fF +C1875 divbuf_9/OUT3 divbuf_9/OUT 0.26fF +C1876 divbuf_9/OUT4 divbuf_9/OUT5 20.26fF +C1877 pd_1/tspc_r_1/Z2 pd_1/tspc_r_1/Z4 0.14fF +C1878 pd_1/tspc_r_0/Z4 pd_1/tspc_r_0/z5 0.04fF +C1879 divider_2/tspc_0/a_630_n680# divider_2/tspc_0/Z4 0.12fF +C1880 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/v 0.08fF +C1881 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.09fF +C1882 divbuf_0/OUT2 divbuf_0/OUT3 1.37fF +C1883 divbuf_0/OUT5 divbuf_0/IN 0.00fF +C1884 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF +C1885 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF +C1886 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.65fF +C1887 divbuf_4/OUT divbuf_4/a_492_n240# 0.00fF +C1888 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF +C1889 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z3 0.05fF +C1890 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z4 0.08fF +C1891 divbuf_25/a_492_n240# divbuf_25/IN 0.13fF +C1892 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF +C1893 divider_2/nor_1/B divider_2/tspc_0/Z3 0.38fF +C1894 divbuf_7/OUT divbuf_7/OUT4 1.11fF +C1895 divbuf_4/IN divbuf_4/OUT5 0.00fF +C1896 ro_complete_1/cbank_1/v ro_complete_1/cbank_2/v 1.36fF +C1897 divider_1/prescaler_0/tspc_1/Z2 divider_1/clk 0.11fF +C1898 divbuf_20/OUT5 divbuf_20/OUT 43.38fF +C1899 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF +C1900 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/clk 0.12fF +C1901 divbuf_8/a_492_n240# divbuf_8/OUT 0.00fF +C1902 divbuf_18/IN divbuf_18/a_492_n240# 0.13fF +C1903 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z3 0.06fF +C1904 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/D 0.03fF +C1905 pd_1/UP pd_1/and_pd_0/Out1 0.33fF +C1906 divider_2/tspc_2/Z2 divider_2/tspc_2/Z3 0.16fF +C1907 divider_2/nor_0/A divider_2/tspc_2/Z4 0.21fF +C1908 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF +C1909 divider_0/tspc_1/Q divider_0/tspc_0/Z4 0.15fF +C1910 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z4 0.28fF +C1911 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/nor_0/A 0.15fF +C1912 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.00fF +C1913 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF +C1914 ro_complete_1/a5 ro_complete_1/cbank_1/switch_0/vin 0.09fF +C1915 ro_complete_1/cbank_0/switch_4/vin ro_complete_1/cbank_0/v 1.30fF +C1916 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Q 0.38fF +C1917 divider_0/and_0/OUT divider_0/and_0/B 0.01fF +C1918 pll_full_1/divider_0/and_0/B pll_full_1/divider_0/and_0/Z1 0.07fF +C1919 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/Z2 0.14fF +C1920 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF +C1921 divider_1/tspc_0/Z4 divider_1/nor_0/B 0.02fF +C1922 divbuf_5/IN divbuf_5/OUT5 0.00fF +C1923 divbuf_19/OUT5 divbuf_19/OUT2 0.02fF +C1924 divbuf_19/OUT4 divbuf_19/OUT3 5.16fF +C1925 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/D 0.11fF +C1926 divbuf_7/a_492_n240# divbuf_7/IN 0.13fF +C1927 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/clk 0.45fF +C1928 divbuf_12/OUT4 divbuf_12/OUT 1.11fF +C1929 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/z5 0.11fF +C1930 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF +C1931 divider_2/tspc_1/Z3 divider_2/tspc_1/Z4 0.65fF +C1932 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/z5 0.03fF +C1933 divider_2/and_0/A divider_2/and_0/B 0.18fF +C1934 ro_complete_1/a2 ro_complete_1/cbank_0/switch_3/vin 0.09fF +C1935 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Q 0.91fF +C1936 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C1937 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 pll_full_1/divider_0/clk 0.12fF +C1938 ro_complete_1/cbank_1/switch_2/vin ro_complete_1/cbank_1/v 1.30fF +C1939 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF +C1940 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF +C1941 divbuf_19/OUT5 divbuf_19/a_492_n240# 0.01fF +C1942 divbuf_16/OUT5 divbuf_16/OUT3 0.01fF +C1943 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/clk 0.01fF +C1944 divbuf_25/IN divbuf_25/OUT5 0.00fF +C1945 io_clamp_low[2] io_clamp_high[2] 0.53fF +C1946 divider_1/tspc_1/Z1 divider_1/tspc_1/Z4 0.00fF +C1947 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF +C1948 divider_2/mc2 divider_2/and_0/OUT 0.05fF +C1949 divider_2/nor_1/Z1 divider_2/nor_0/B 0.18fF +C1950 divbuf_11/OUT2 divbuf_11/OUT3 1.37fF +C1951 pd_1/tspc_r_1/Qbar pd_1/R 0.03fF +C1952 io_clamp_high[1] io_analog[5] 0.53fF +C1953 divbuf_19/OUT divbuf_19/OUT3 0.26fF +C1954 divider_2/nor_0/B divider_2/tspc_2/a_630_n680# 0.01fF +C1955 divider_2/prescaler_0/tspc_2/D divider_2/prescaler_0/nand_0/z1 0.24fF +C1956 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF +C1957 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z3 0.65fF +C1958 divbuf_2/OUT5 divbuf_2/a_492_n240# 0.01fF +C1959 ro_complete_1/cbank_0/switch_1/vin ro_complete_1/cbank_0/v 1.30fF +C1960 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF +C1961 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/OUT3 1.37fF +C1962 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C1963 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/nor_0/A 0.35fF +C1964 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/clk 0.60fF +C1965 ro_complete_1/a0 ro_complete_1/cbank_2/v 0.05fF +C1966 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C1967 divider_2/tspc_1/Q divider_2/tspc_0/Z1 0.01fF +C1968 divider_1/prescaler_0/Out divider_1/tspc_2/Z4 0.12fF +C1969 divider_1/nor_1/B divider_1/Out 0.22fF +C1970 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Q 0.04fF +C1971 divbuf_20/a_492_n240# divbuf_20/OUT2 0.42fF +C1972 pll_full_1/pd_0/DOWN pll_full_1/pd_0/and_pd_0/Out1 0.12fF +C1973 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/nor_0/A 0.15fF +C1974 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF +C1975 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C1976 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z2 0.25fF +C1977 divbuf_22/OUT5 divbuf_22/OUT 43.38fF +C1978 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF +C1979 divbuf_13/a_492_n240# divbuf_13/OUT 0.00fF +C1980 pd_1/tspc_r_1/Z3 pd_1/UP 0.03fF +C1981 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/ro_complete_0/cbank_2/v 0.04fF +C1982 divider_2/prescaler_0/tspc_2/D divider_2/clk 0.26fF +C1983 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1984 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF +C1985 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF +C1986 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_2/D 0.16fF +C1987 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.03fF +C1988 divbuf_25/a_492_n240# divbuf_25/OUT5 0.01fF +C1989 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_1/z1 0.21fF +C1990 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z3 0.33fF +C1991 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/nand_1/z1 0.01fF +C1992 divider_1/prescaler_0/tspc_2/Z2 divider_1/clk 0.11fF +C1993 divbuf_21/IN divbuf_21/OUT5 0.00fF +C1994 pll_full_1/pd_0/UP pll_full_1/pd_0/R 0.46fF +C1995 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/clk 0.12fF +C1996 pd_1/DIV pd_1/tspc_r_0/Z3 0.65fF +C1997 pd_0/REF pd_0/tspc_r_1/Z3 0.65fF +C1998 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z1 0.17fF +C1999 divbuf_12/a_492_n240# divbuf_12/IN 0.13fF +C2000 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C2001 divbuf_24/OUT4 divbuf_24/OUT 1.11fF +C2002 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/tspc_0/a_630_n680# 0.05fF +C2003 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/z5 0.11fF +C2004 divbuf_3/OUT2 divbuf_3/a_492_n240# 0.42fF +C2005 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_0/Z2 0.14fF +C2006 divider_1/tspc_1/Z2 divider_1/nor_0/B 0.30fF +C2007 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z4 0.36fF +C2008 divider_1/tspc_2/Z3 divider_1/tspc_2/Z4 0.65fF +C2009 pll_full_1/pd_0/UP pll_full_1/pd_0/tspc_r_1/Qbar1 0.11fF +C2010 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/A 0.35fF +C2011 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/clk 0.60fF +C2012 pll_full_0/pd_0/DIV pll_full_0/pd_0/R 0.51fF +C2013 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/D 0.05fF +C2014 divbuf_23/OUT2 divbuf_23/OUT3 1.37fF +C2015 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/Out 0.04fF +C2016 divbuf_14/OUT2 divbuf_14/a_492_n240# 0.42fF +C2017 divider_0/tspc_0/Z3 divider_0/tspc_0/Z1 0.06fF +C2018 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF +C2019 divbuf_2/OUT3 divbuf_2/OUT4 5.16fF +C2020 divbuf_7/OUT ro_complete_0/cbank_1/v 0.05fF +C2021 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/Z1 0.03fF +C2022 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/divider_0/clk 0.12fF +C2023 ro_complete_1/a3 ro_complete_1/cbank_2/v 0.05fF +C2024 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF +C2025 divbuf_17/a_492_n240# divbuf_17/IN 0.13fF +C2026 divbuf_10/OUT2 divbuf_10/OUT5 0.02fF +C2027 divbuf_10/OUT3 divbuf_10/OUT4 5.16fF +C2028 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C2029 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF +C2030 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF +C2031 divbuf_16/OUT divbuf_16/OUT4 1.11fF +C2032 divider_1/tspc_2/Q divider_1/tspc_2/a_630_n680# 0.04fF +C2033 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF +C2034 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z3 0.16fF +C2035 divbuf_22/a_492_n240# divbuf_22/OUT2 0.42fF +C2036 cp_0/a_1710_n2840# cp_0/upbar 0.29fF +C2037 pd_1/R pd_1/REF 0.61fF +C2038 divbuf_9/OUT5 divbuf_9/OUT 43.38fF Xpd_0 vdda1 vssa1 pd_0/REF pd_0/DIV pd_0/UP pd_0/DOWN pd_0/R pd Xpd_1 vdda1 vssa1 pd_1/REF pd_1/DIV pd_1/UP pd_1/DOWN pd_1/R pd Xcp_0 cp_0/vbias vdda1 gnd cp_0/out cp_0/down cp_0/upbar cp @@ -2872,707 +2872,703 @@ C2698 wb_rst_i vssa1 0.63fF C2699 wb_clk_i vssa1 0.63fF C2700 m2_494098_659718# vssa1 0.80fF **FLOATING -C2701 li_200624_47978# vssa1 61.68fF **FLOATING -C2702 li_534900_144658# vssa1 71.26fF **FLOATING -C2703 li_464674_144658# vssa1 72.10fF **FLOATING -C2704 li_379946_144658# vssa1 71.49fF **FLOATING -C2705 pll_full_1/divider_0/and_0/Z1 vssa1 0.65fF -C2706 pll_full_1/divider_0/and_0/B vssa1 2.45fF -C2707 pll_full_1/divider_0/and_0/A vssa1 2.35fF -C2708 pll_full_1/divider_0/and_0/out1 vssa1 2.99fF -C2709 pll_full_1/divider_0/tspc_2/Z4 vssa1 0.86fF -C2710 pll_full_1/divider_0/tspc_2/Z3 vssa1 2.26fF -C2711 pll_full_1/divider_0/tspc_2/Z2 vssa1 1.46fF -C2712 pll_full_1/divider_0/tspc_2/Z1 vssa1 0.99fF -C2713 pll_full_1/divider_0/nor_0/A vssa1 7.08fF -C2714 pll_full_1/divider_0/tspc_2/a_630_n680# vssa1 1.15fF **FLOATING -C2715 pll_full_1/divider_0/tspc_1/Z4 vssa1 0.86fF -C2716 pll_full_1/divider_0/tspc_1/Z3 vssa1 2.26fF -C2717 pll_full_1/divider_0/tspc_1/Z2 vssa1 1.46fF -C2718 pll_full_1/divider_0/tspc_1/Z1 vssa1 0.99fF -C2719 pll_full_1/divider_0/nor_0/B vssa1 7.12fF -C2720 pll_full_1/divider_0/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING -C2721 pll_full_1/divider_0/tspc_2/Q vssa1 3.14fF -C2722 pll_full_1/divider_0/tspc_0/Z4 vssa1 0.86fF -C2723 pll_full_1/divbuf_0/IN vssa1 9.89fF -C2724 pll_full_1/divider_0/tspc_0/Z3 vssa1 2.26fF -C2725 pll_full_1/divider_0/tspc_0/Z2 vssa1 1.46fF -C2726 pll_full_1/divider_0/tspc_0/Z1 vssa1 0.99fF -C2727 pll_full_1/divider_0/nor_1/B vssa1 6.48fF -C2728 pll_full_1/divider_0/tspc_0/a_630_n680# vssa1 1.14fF **FLOATING -C2729 pll_full_1/divider_0/tspc_1/Q vssa1 3.12fF -C2730 pll_full_1/divider_0/clk vssa1 33.42fF -C2731 pll_full_1/divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF -C2732 pll_full_1/divider_0/prescaler_0/tspc_0/D vssa1 2.64fF -C2733 pll_full_1/divider_0/prescaler_0/tspc_2/Q vssa1 3.72fF -C2734 pll_full_1/divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF -C2735 pll_full_1/divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF -C2736 pll_full_1/divider_0/prescaler_0/tspc_2/D vssa1 3.12fF -C2737 pll_full_1/divider_0/and_0/OUT vssa1 5.67fF -C2738 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF -C2739 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF -C2740 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 vssa1 1.19fF -C2741 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF -C2742 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.47fF **FLOATING -C2743 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING -C2744 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF -C2745 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF -C2746 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF -C2747 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF -C2748 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING -C2749 pll_full_1/divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING -C2750 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF -C2751 pll_full_1/divider_0/prescaler_0/Out vssa1 4.59fF -C2752 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF -C2753 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF -C2754 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF -C2755 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING -C2756 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING -C2757 pll_full_1/divider_0/nor_1/Z1 vssa1 1.34fF -C2758 pll_full_1/divider_0/nor_0/Z1 vssa1 1.34fF -C2759 pll_full_1/divbuf_1/OUT vssa1 363.82fF -C2760 pll_full_1/divbuf_1/OUT5 vssa1 350.37fF -C2761 pll_full_1/divbuf_1/OUT4 vssa1 133.72fF -C2762 pll_full_1/divbuf_1/OUT3 vssa1 34.03fF -C2763 pll_full_1/divbuf_1/OUT2 vssa1 8.71fF -C2764 pll_full_1/divbuf_1/a_492_n240# vssa1 2.46fF **FLOATING -C2765 pll_full_1/divbuf_0/OUT5 vssa1 350.37fF -C2766 pll_full_1/divbuf_0/OUT4 vssa1 133.72fF -C2767 pll_full_1/divbuf_0/OUT3 vssa1 34.03fF -C2768 pll_full_1/divbuf_0/OUT2 vssa1 8.71fF -C2769 pll_full_1/divbuf_0/a_492_n240# vssa1 2.46fF **FLOATING -C2770 pll_full_1/ro_complete_0/cbank_2/v vssa1 16.43fF -C2771 pll_full_1/ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF -C2772 pll_full_1/ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF -C2773 pll_full_1/ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF -C2774 pll_full_1/ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF -C2775 pll_full_1/ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF -C2776 pll_full_1/ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF -C2777 pll_full_1/ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF -C2778 pll_full_1/ro_complete_0/a0 vssa1 5.35fF -C2779 pll_full_1/ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF -C2780 pll_full_1/ro_complete_0/a1 vssa1 6.54fF -C2781 pll_full_1/ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF -C2782 pll_full_1/ro_complete_0/a3 vssa1 5.96fF -C2783 pll_full_1/ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF -C2784 pll_full_1/ro_complete_0/a2 vssa1 5.21fF -C2785 pll_full_1/ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF -C2786 pll_full_1/ro_complete_0/a4 vssa1 5.81fF -C2787 pll_full_1/ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF -C2788 pll_full_1/ro_complete_0/a5 vssa1 6.74fF -C2789 pll_full_1/ro_complete_0/cbank_0/v vssa1 15.12fF -C2790 pll_full_1/ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF -C2791 pll_full_1/ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF -C2792 pll_full_1/ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF -C2793 pll_full_1/ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF -C2794 pll_full_1/ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF -C2795 pll_full_1/ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF -C2796 pll_full_1/ro_complete_0/ro_var_extend_0/vcont vssa1 0.27fF -C2797 pll_full_1/filter_0/a_4216_n5230# vssa1 418.90fF **FLOATING -C2798 pll_full_1/filter_0/a_4216_n2998# vssa1 1.39fF **FLOATING -C2799 pll_full_1/cp_0/down vssa1 1.54fF -C2800 pll_full_1/cp_0/upbar vssa1 1.79fF -C2801 pll_full_1/cp_0/a_7110_n2840# vssa1 0.17fF **FLOATING -C2802 pll_full_1/cp_0/a_3060_n2840# vssa1 1.71fF **FLOATING -C2803 pll_full_1/cp_0/a_7110_0# vssa1 0.17fF **FLOATING -C2804 pll_full_1/cp_0/a_6370_0# vssa1 0.40fF **FLOATING -C2805 pll_full_1/cp_0/a_3060_0# vssa1 2.49fF **FLOATING -C2806 pll_full_1/cp_0/a_1710_0# vssa1 7.47fF **FLOATING -C2807 pll_full_1/pd_0/and_pd_0/Z1 vssa1 0.39fF -C2808 pll_full_1/pd_0/and_pd_0/Out1 vssa1 2.22fF -C2809 pll_full_1/pd_0/tspc_r_1/z5 vssa1 1.10fF -C2810 pll_full_1/pd_0/tspc_r_1/Z4 vssa1 1.07fF -C2811 pll_full_1/pd_0/tspc_r_1/Qbar vssa1 0.88fF -C2812 pll_full_1/pd_0/tspc_r_1/Z2 vssa1 1.22fF -C2813 pll_full_1/pd_0/tspc_r_1/Z1 vssa1 0.67fF -C2814 pll_full_1/pd_0/UP vssa1 6.41fF -C2815 pll_full_1/pd_0/tspc_r_1/Qbar1 vssa1 1.34fF -C2816 pll_full_1/pd_0/tspc_r_1/Z3 vssa1 2.12fF -C2817 pll_full_1/pd_0/REF vssa1 6.48fF -C2818 pll_full_1/pd_0/tspc_r_0/z5 vssa1 1.10fF -C2819 pll_full_1/pd_0/tspc_r_0/Z4 vssa1 1.07fF -C2820 pll_full_1/pd_0/R vssa1 3.05fF -C2821 pll_full_1/pd_0/tspc_r_0/Qbar vssa1 0.79fF -C2822 pll_full_1/pd_0/tspc_r_0/Z2 vssa1 1.22fF -C2823 pll_full_1/pd_0/tspc_r_0/Z1 vssa1 0.67fF -C2824 pll_full_1/pd_0/DOWN vssa1 7.34fF -C2825 pll_full_1/pd_0/tspc_r_0/Qbar1 vssa1 1.34fF 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pll_full_0/divider_0/tspc_0/Z4 vssa1 0.86fF -C2846 pll_full_0/divbuf_0/IN vssa1 9.89fF -C2847 pll_full_0/divider_0/tspc_0/Z3 vssa1 2.26fF -C2848 pll_full_0/divider_0/tspc_0/Z2 vssa1 1.46fF -C2849 pll_full_0/divider_0/tspc_0/Z1 vssa1 0.99fF -C2850 pll_full_0/divider_0/nor_1/B vssa1 6.48fF -C2851 pll_full_0/divider_0/tspc_0/a_630_n680# vssa1 1.14fF **FLOATING -C2852 pll_full_0/divider_0/tspc_1/Q vssa1 3.12fF -C2853 pll_full_0/divider_0/clk vssa1 33.42fF -C2854 pll_full_0/divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF -C2855 pll_full_0/divider_0/prescaler_0/tspc_0/D vssa1 2.64fF -C2856 pll_full_0/divider_0/prescaler_0/tspc_2/Q vssa1 3.72fF -C2857 pll_full_0/divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF -C2858 pll_full_0/divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF -C2859 pll_full_0/divider_0/prescaler_0/tspc_2/D vssa1 3.12fF -C2860 pll_full_0/divider_0/and_0/OUT vssa1 5.67fF -C2861 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF -C2862 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 vssa1 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2.19fF -C2975 divider_2/and_0/out1 vssa1 2.93fF -C2976 divider_2/tspc_2/Z4 vssa1 0.86fF -C2977 divider_2/tspc_2/Z3 vssa1 2.26fF -C2978 divider_2/tspc_2/Z2 vssa1 1.46fF -C2979 divider_2/tspc_2/Z1 vssa1 0.99fF -C2980 divider_2/nor_0/A vssa1 7.04fF -C2981 divider_2/tspc_2/a_630_n680# vssa1 1.15fF **FLOATING -C2982 divider_2/tspc_1/Z4 vssa1 0.86fF -C2983 divider_2/tspc_1/Z3 vssa1 2.26fF -C2984 divider_2/tspc_1/Z2 vssa1 1.46fF -C2985 divider_2/tspc_1/Z1 vssa1 0.99fF -C2986 divider_2/nor_0/B vssa1 7.05fF -C2987 divider_2/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING -C2988 divider_2/tspc_2/Q vssa1 3.14fF -C2989 divider_2/tspc_0/Z4 vssa1 0.86fF -C2990 divider_2/Out vssa1 1.60fF -C2991 divider_2/tspc_0/Z3 vssa1 2.26fF -C2992 divider_2/tspc_0/Z2 vssa1 1.46fF -C2993 divider_2/tspc_0/Z1 vssa1 0.99fF -C2994 divider_2/nor_1/B vssa1 6.44fF -C2995 divider_2/tspc_0/a_630_n680# vssa1 1.14fF **FLOATING -C2996 divider_2/tspc_1/Q vssa1 3.12fF -C2997 divider_2/clk vssa1 5.63fF -C2998 divider_2/prescaler_0/nand_1/z1 vssa1 0.36fF -C2999 divider_2/prescaler_0/tspc_0/D vssa1 2.64fF -C3000 divider_2/prescaler_0/tspc_2/Q vssa1 3.74fF -C3001 divider_2/prescaler_0/tspc_1/Q vssa1 3.61fF -C3002 divider_2/prescaler_0/nand_0/z1 vssa1 0.36fF -C3003 divider_2/prescaler_0/tspc_2/D vssa1 3.12fF -C3004 divider_2/and_0/OUT vssa1 5.62fF -C3005 divider_2/prescaler_0/tspc_2/Z4 vssa1 0.86fF -C3006 divider_2/prescaler_0/tspc_2/Z3 vssa1 2.26fF -C3007 divider_2/prescaler_0/tspc_2/Z2 vssa1 1.46fF -C3008 divider_2/prescaler_0/tspc_2/Z1 vssa1 0.99fF -C3009 divider_2/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING -C3010 divider_2/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING -C3011 divider_2/prescaler_0/tspc_1/Z4 vssa1 0.86fF -C3012 divider_2/prescaler_0/tspc_1/Z3 vssa1 2.26fF -C3013 divider_2/prescaler_0/tspc_1/Z2 vssa1 1.48fF -C3014 divider_2/prescaler_0/tspc_1/Z1 vssa1 0.99fF -C3015 divider_2/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING -C3016 divider_2/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING -C3017 divider_2/prescaler_0/tspc_0/Z4 vssa1 0.86fF -C3018 divider_2/prescaler_0/Out vssa1 4.59fF -C3019 divider_2/prescaler_0/tspc_0/Z3 vssa1 2.26fF -C3020 divider_2/prescaler_0/tspc_0/Z2 vssa1 1.46fF -C3021 divider_2/prescaler_0/tspc_0/Z1 vssa1 0.99fF -C3022 divider_2/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING -C3023 divider_2/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING -C3024 divider_2/nor_1/Z1 vssa1 1.34fF -C3025 divider_2/mc2 vssa1 5.29fF -C3026 divider_2/nor_0/Z1 vssa1 1.34fF -C3027 divbuf_16/OUT vssa1 363.82fF -C3028 divbuf_16/OUT5 vssa1 350.37fF -C3029 divbuf_16/OUT4 vssa1 133.72fF -C3030 divbuf_16/OUT3 vssa1 34.03fF -C3031 divbuf_16/OUT2 vssa1 8.71fF -C3032 divbuf_16/IN vssa1 0.89fF -C3033 divbuf_16/a_492_n240# vssa1 2.46fF **FLOATING -C3034 divider_1/and_0/Z1 vssa1 0.74fF -C3035 divider_1/and_0/B vssa1 2.25fF -C3036 divider_1/and_0/A vssa1 2.19fF -C3037 divider_1/and_0/out1 vssa1 2.93fF -C3038 divider_1/tspc_2/Z4 vssa1 0.86fF -C3039 divider_1/tspc_2/Z3 vssa1 2.26fF -C3040 divider_1/tspc_2/Z2 vssa1 1.46fF -C3041 divider_1/tspc_2/Z1 vssa1 0.99fF -C3042 divider_1/nor_0/A vssa1 7.04fF -C3043 divider_1/tspc_2/a_630_n680# vssa1 1.15fF **FLOATING -C3044 divider_1/tspc_1/Z4 vssa1 0.86fF -C3045 divider_1/tspc_1/Z3 vssa1 2.26fF -C3046 divider_1/tspc_1/Z2 vssa1 1.46fF -C3047 divider_1/tspc_1/Z1 vssa1 0.99fF -C3048 divider_1/nor_0/B vssa1 7.05fF -C3049 divider_1/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING -C3050 divider_1/tspc_2/Q vssa1 3.14fF -C3051 divider_1/tspc_0/Z4 vssa1 0.86fF -C3052 divider_1/Out vssa1 1.60fF -C3053 divider_1/tspc_0/Z3 vssa1 2.26fF -C3054 divider_1/tspc_0/Z2 vssa1 1.46fF -C3055 divider_1/tspc_0/Z1 vssa1 0.99fF -C3056 divider_1/nor_1/B vssa1 6.33fF -C3057 divider_1/tspc_0/a_630_n680# vssa1 1.14fF **FLOATING -C3058 divider_1/tspc_1/Q vssa1 3.12fF -C3059 divider_1/clk vssa1 5.63fF -C3060 divider_1/prescaler_0/nand_1/z1 vssa1 0.36fF -C3061 divider_1/prescaler_0/tspc_0/D vssa1 2.64fF -C3062 divider_1/prescaler_0/tspc_2/Q vssa1 3.74fF -C3063 divider_1/prescaler_0/tspc_1/Q vssa1 3.61fF -C3064 divider_1/prescaler_0/nand_0/z1 vssa1 0.36fF -C3065 divider_1/prescaler_0/tspc_2/D vssa1 3.12fF -C3066 divider_1/and_0/OUT vssa1 5.62fF -C3067 divider_1/prescaler_0/tspc_2/Z4 vssa1 0.86fF -C3068 divider_1/prescaler_0/tspc_2/Z3 vssa1 2.26fF -C3069 divider_1/prescaler_0/tspc_2/Z2 vssa1 1.46fF -C3070 divider_1/prescaler_0/tspc_2/Z1 vssa1 0.99fF -C3071 divider_1/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING -C3072 divider_1/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING -C3073 divider_1/prescaler_0/tspc_1/Z4 vssa1 0.86fF -C3074 divider_1/prescaler_0/tspc_1/Z3 vssa1 2.26fF -C3075 divider_1/prescaler_0/tspc_1/Z2 vssa1 1.48fF -C3076 divider_1/prescaler_0/tspc_1/Z1 vssa1 0.99fF -C3077 divider_1/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING -C3078 divider_1/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING -C3079 divider_1/prescaler_0/tspc_0/Z4 vssa1 0.86fF -C3080 divider_1/prescaler_0/Out vssa1 4.59fF -C3081 divider_1/prescaler_0/tspc_0/Z3 vssa1 2.26fF -C3082 divider_1/prescaler_0/tspc_0/Z2 vssa1 1.46fF -C3083 divider_1/prescaler_0/tspc_0/Z1 vssa1 0.99fF -C3084 divider_1/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING -C3085 divider_1/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING -C3086 divider_1/nor_1/Z1 vssa1 1.34fF -C3087 divider_1/mc2 vssa1 5.29fF -C3088 divider_1/nor_0/Z1 vssa1 1.34fF -C3089 divbuf_15/OUT vssa1 363.82fF -C3090 divbuf_15/OUT5 vssa1 350.37fF -C3091 divbuf_15/OUT4 vssa1 133.72fF -C3092 divbuf_15/OUT3 vssa1 34.03fF -C3093 divbuf_15/OUT2 vssa1 8.71fF -C3094 divbuf_15/IN vssa1 0.89fF -C3095 divbuf_15/a_492_n240# vssa1 2.46fF **FLOATING -C3096 divbuf_25/OUT5 vssa1 350.37fF -C3097 divbuf_25/OUT4 vssa1 133.72fF -C3098 divbuf_25/OUT3 vssa1 34.03fF -C3099 divbuf_25/OUT2 vssa1 8.71fF -C3100 divbuf_25/IN vssa1 0.89fF -C3101 divbuf_25/a_492_n240# vssa1 2.46fF **FLOATING -C3102 divbuf_14/OUT vssa1 363.82fF -C3103 divbuf_14/OUT5 vssa1 350.37fF -C3104 divbuf_14/OUT4 vssa1 133.72fF -C3105 divbuf_14/OUT3 vssa1 34.03fF -C3106 divbuf_14/OUT2 vssa1 8.71fF -C3107 divbuf_14/IN vssa1 0.89fF -C3108 divbuf_14/a_492_n240# vssa1 2.46fF **FLOATING -C3109 divider_0/and_0/Z1 vssa1 0.74fF -C3110 divider_0/and_0/B vssa1 2.25fF -C3111 divider_0/and_0/A vssa1 2.19fF -C3112 divider_0/and_0/out1 vssa1 2.93fF -C3113 divider_0/tspc_2/Z4 vssa1 0.86fF -C3114 divider_0/tspc_2/Z3 vssa1 2.26fF -C3115 divider_0/tspc_2/Z2 vssa1 1.46fF -C3116 divider_0/tspc_2/Z1 vssa1 0.99fF -C3117 divider_0/nor_0/A vssa1 7.04fF -C3118 divider_0/tspc_2/a_630_n680# vssa1 1.15fF **FLOATING -C3119 divider_0/tspc_1/Z4 vssa1 0.86fF -C3120 divider_0/tspc_1/Z3 vssa1 2.26fF -C3121 divider_0/tspc_1/Z2 vssa1 1.46fF -C3122 divider_0/tspc_1/Z1 vssa1 0.99fF -C3123 divider_0/nor_0/B vssa1 7.05fF -C3124 divider_0/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING -C3125 divider_0/tspc_2/Q vssa1 3.14fF -C3126 divider_0/tspc_0/Z4 vssa1 0.86fF -C3127 divider_0/Out vssa1 1.60fF -C3128 divider_0/tspc_0/Z3 vssa1 2.26fF -C3129 divider_0/tspc_0/Z2 vssa1 1.46fF -C3130 divider_0/tspc_0/Z1 vssa1 0.99fF -C3131 divider_0/nor_1/B vssa1 6.33fF -C3132 divider_0/tspc_0/a_630_n680# vssa1 1.14fF **FLOATING -C3133 divider_0/tspc_1/Q vssa1 3.12fF -C3134 divider_0/clk vssa1 5.63fF -C3135 divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF -C3136 divider_0/prescaler_0/tspc_0/D vssa1 2.64fF -C3137 divider_0/prescaler_0/tspc_2/Q vssa1 3.64fF -C3138 divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF -C3139 divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF -C3140 divider_0/prescaler_0/tspc_2/D vssa1 3.12fF -C3141 divider_0/and_0/OUT vssa1 5.62fF -C3142 divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF -C3143 divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF -C3144 divider_0/prescaler_0/tspc_2/Z2 vssa1 1.46fF -C3145 divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF -C3146 divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING -C3147 divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING -C3148 divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF -C3149 divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF -C3150 divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF -C3151 divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF -C3152 divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING -C3153 divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING -C3154 divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF -C3155 divider_0/prescaler_0/Out vssa1 4.59fF -C3156 divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF -C3157 divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF -C3158 divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF -C3159 divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING -C3160 divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING -C3161 divider_0/nor_1/Z1 vssa1 1.34fF -C3162 divider_0/mc2 vssa1 5.29fF -C3163 divider_0/nor_0/Z1 vssa1 1.34fF -C3164 divbuf_24/OUT vssa1 363.82fF -C3165 divbuf_24/OUT5 vssa1 350.37fF -C3166 divbuf_24/OUT4 vssa1 133.72fF -C3167 divbuf_24/OUT3 vssa1 34.03fF -C3168 divbuf_24/OUT2 vssa1 8.71fF -C3169 divbuf_24/IN vssa1 0.89fF -C3170 divbuf_24/a_492_n240# vssa1 2.46fF **FLOATING -C3171 divbuf_13/OUT vssa1 363.82fF -C3172 divbuf_13/OUT5 vssa1 350.37fF -C3173 divbuf_13/OUT4 vssa1 133.72fF -C3174 divbuf_13/OUT3 vssa1 34.03fF -C3175 divbuf_13/OUT2 vssa1 8.71fF -C3176 divbuf_13/IN vssa1 0.89fF -C3177 divbuf_13/a_492_n240# vssa1 2.46fF **FLOATING -C3178 divbuf_9/OUT vssa1 363.82fF -C3179 divbuf_9/OUT5 vssa1 350.37fF -C3180 divbuf_9/OUT4 vssa1 133.72fF -C3181 divbuf_9/OUT3 vssa1 34.03fF -C3182 divbuf_9/OUT2 vssa1 8.71fF -C3183 divbuf_9/IN vssa1 0.89fF -C3184 divbuf_9/a_492_n240# vssa1 2.46fF **FLOATING -C3185 divbuf_23/OUT vssa1 363.82fF -C3186 divbuf_23/OUT5 vssa1 350.37fF -C3187 divbuf_23/OUT4 vssa1 133.72fF -C3188 divbuf_23/OUT3 vssa1 34.03fF -C3189 divbuf_23/OUT2 vssa1 8.71fF -C3190 divbuf_23/IN vssa1 0.89fF -C3191 divbuf_23/a_492_n240# vssa1 2.46fF **FLOATING -C3192 divbuf_12/OUT vssa1 363.82fF -C3193 divbuf_12/OUT5 vssa1 350.37fF -C3194 divbuf_12/OUT4 vssa1 133.72fF -C3195 divbuf_12/OUT3 vssa1 34.03fF -C3196 divbuf_12/OUT2 vssa1 8.71fF -C3197 divbuf_12/IN vssa1 0.89fF -C3198 divbuf_12/a_492_n240# vssa1 2.46fF **FLOATING -C3199 divbuf_8/OUT vssa1 363.82fF -C3200 divbuf_8/OUT5 vssa1 350.37fF -C3201 divbuf_8/OUT4 vssa1 133.72fF -C3202 divbuf_8/OUT3 vssa1 34.03fF -C3203 divbuf_8/OUT2 vssa1 8.71fF -C3204 divbuf_8/IN vssa1 0.89fF -C3205 divbuf_8/a_492_n240# vssa1 2.46fF **FLOATING -C3206 divbuf_22/OUT vssa1 363.82fF -C3207 divbuf_22/OUT5 vssa1 350.37fF -C3208 divbuf_22/OUT4 vssa1 133.72fF -C3209 divbuf_22/OUT3 vssa1 34.03fF -C3210 divbuf_22/OUT2 vssa1 8.71fF -C3211 divbuf_22/IN vssa1 0.89fF -C3212 divbuf_22/a_492_n240# vssa1 2.46fF **FLOATING -C3213 divbuf_11/OUT vssa1 363.82fF -C3214 divbuf_11/OUT5 vssa1 350.37fF -C3215 divbuf_11/OUT4 vssa1 133.72fF -C3216 divbuf_11/OUT3 vssa1 34.03fF -C3217 divbuf_11/OUT2 vssa1 8.71fF -C3218 divbuf_11/IN vssa1 0.89fF -C3219 divbuf_11/a_492_n240# vssa1 2.46fF **FLOATING -C3220 divbuf_7/OUT5 vssa1 350.37fF -C3221 divbuf_7/OUT4 vssa1 133.72fF -C3222 divbuf_7/OUT3 vssa1 34.03fF -C3223 divbuf_7/OUT2 vssa1 8.71fF -C3224 divbuf_7/IN vssa1 0.89fF -C3225 divbuf_7/a_492_n240# vssa1 2.46fF **FLOATING -C3226 divbuf_21/OUT vssa1 363.82fF -C3227 divbuf_21/OUT5 vssa1 350.37fF -C3228 divbuf_21/OUT4 vssa1 133.72fF -C3229 divbuf_21/OUT3 vssa1 34.03fF -C3230 divbuf_21/OUT2 vssa1 8.71fF -C3231 divbuf_21/IN vssa1 0.89fF -C3232 divbuf_21/a_492_n240# vssa1 2.46fF **FLOATING -C3233 divbuf_20/OUT vssa1 363.82fF -C3234 divbuf_20/OUT5 vssa1 350.37fF -C3235 divbuf_20/OUT4 vssa1 133.72fF -C3236 divbuf_20/OUT3 vssa1 34.03fF -C3237 divbuf_20/OUT2 vssa1 8.71fF -C3238 divbuf_20/IN vssa1 0.89fF -C3239 divbuf_20/a_492_n240# vssa1 2.46fF **FLOATING -C3240 divbuf_10/OUT vssa1 363.82fF -C3241 divbuf_10/OUT5 vssa1 350.37fF -C3242 divbuf_10/OUT4 vssa1 133.72fF -C3243 divbuf_10/OUT3 vssa1 34.03fF -C3244 divbuf_10/OUT2 vssa1 8.71fF -C3245 divbuf_10/IN vssa1 0.89fF -C3246 divbuf_10/a_492_n240# vssa1 2.46fF **FLOATING -C3247 divbuf_6/OUT5 vssa1 350.37fF -C3248 divbuf_6/OUT4 vssa1 133.72fF -C3249 divbuf_6/OUT3 vssa1 34.03fF -C3250 divbuf_6/OUT2 vssa1 8.71fF -C3251 divbuf_6/IN vssa1 0.89fF -C3252 divbuf_6/a_492_n240# vssa1 2.46fF **FLOATING -C3253 divbuf_5/OUT5 vssa1 350.37fF -C3254 divbuf_5/OUT4 vssa1 133.72fF -C3255 divbuf_5/OUT3 vssa1 34.03fF -C3256 divbuf_5/OUT2 vssa1 8.71fF -C3257 divbuf_5/IN vssa1 0.89fF -C3258 divbuf_5/a_492_n240# vssa1 2.46fF **FLOATING -C3259 divbuf_4/OUT5 vssa1 350.37fF -C3260 divbuf_4/OUT4 vssa1 133.72fF -C3261 divbuf_4/OUT3 vssa1 34.03fF -C3262 divbuf_4/OUT2 vssa1 8.71fF -C3263 divbuf_4/IN vssa1 0.89fF -C3264 divbuf_4/a_492_n240# vssa1 2.46fF **FLOATING -C3265 divbuf_3/OUT5 vssa1 350.37fF -C3266 divbuf_3/OUT4 vssa1 133.72fF -C3267 divbuf_3/OUT3 vssa1 34.03fF -C3268 divbuf_3/OUT2 vssa1 8.71fF -C3269 divbuf_3/IN vssa1 0.89fF -C3270 divbuf_3/a_492_n240# vssa1 2.46fF **FLOATING -C3271 divbuf_2/OUT5 vssa1 350.37fF -C3272 divbuf_2/OUT4 vssa1 133.72fF -C3273 divbuf_2/OUT3 vssa1 34.03fF -C3274 divbuf_2/OUT2 vssa1 8.71fF -C3275 divbuf_2/IN vssa1 0.89fF -C3276 divbuf_2/a_492_n240# vssa1 2.46fF **FLOATING -C3277 divbuf_1/OUT vssa1 363.82fF -C3278 divbuf_1/OUT5 vssa1 350.37fF -C3279 divbuf_1/OUT4 vssa1 133.72fF -C3280 divbuf_1/OUT3 vssa1 34.03fF -C3281 divbuf_1/OUT2 vssa1 8.71fF -C3282 divbuf_1/IN vssa1 0.89fF -C3283 divbuf_1/a_492_n240# vssa1 2.46fF **FLOATING -C3284 ro_complete_1/cbank_2/v vssa1 16.43fF -C3285 ro_complete_1/cbank_2/switch_5/vin vssa1 0.78fF -C3286 ro_complete_1/cbank_2/switch_4/vin vssa1 1.50fF -C3287 ro_complete_1/cbank_2/switch_2/vin vssa1 1.30fF -C3288 ro_complete_1/cbank_2/switch_3/vin vssa1 0.56fF -C3289 ro_complete_1/cbank_2/switch_1/vin vssa1 1.14fF -C3290 ro_complete_1/cbank_2/switch_0/vin vssa1 1.02fF -C3291 ro_complete_1/cbank_1/v vssa1 16.43fF -C3292 ro_complete_1/cbank_1/switch_5/vin vssa1 0.78fF -C3293 ro_complete_1/a0 vssa1 5.35fF -C3294 ro_complete_1/cbank_1/switch_4/vin vssa1 1.50fF -C3295 ro_complete_1/a1 vssa1 6.54fF -C3296 ro_complete_1/cbank_1/switch_2/vin vssa1 1.30fF -C3297 ro_complete_1/a3 vssa1 5.96fF -C3298 ro_complete_1/cbank_1/switch_3/vin vssa1 0.56fF -C3299 ro_complete_1/a2 vssa1 5.21fF -C3300 ro_complete_1/cbank_1/switch_1/vin vssa1 1.14fF -C3301 ro_complete_1/a4 vssa1 5.81fF -C3302 ro_complete_1/cbank_1/switch_0/vin vssa1 1.02fF -C3303 ro_complete_1/a5 vssa1 6.74fF -C3304 ro_complete_1/cbank_0/v vssa1 15.12fF -C3305 ro_complete_1/cbank_0/switch_5/vin vssa1 0.78fF -C3306 ro_complete_1/cbank_0/switch_4/vin vssa1 1.50fF -C3307 ro_complete_1/cbank_0/switch_2/vin vssa1 1.30fF -C3308 ro_complete_1/cbank_0/switch_3/vin vssa1 0.56fF -C3309 ro_complete_1/cbank_0/switch_1/vin vssa1 1.14fF -C3310 ro_complete_1/cbank_0/switch_0/vin vssa1 1.02fF -C3311 ro_complete_1/ro_var_extend_0/vcont vssa1 0.27fF -C3312 divbuf_0/OUT vssa1 363.82fF -C3313 divbuf_0/OUT5 vssa1 350.37fF -C3314 divbuf_0/OUT4 vssa1 133.72fF -C3315 divbuf_0/OUT3 vssa1 34.03fF -C3316 divbuf_0/OUT2 vssa1 8.71fF -C3317 divbuf_0/IN vssa1 0.89fF -C3318 divbuf_0/a_492_n240# vssa1 2.46fF **FLOATING -C3319 ro_complete_0/cbank_2/v vssa1 16.43fF -C3320 ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF -C3321 ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF -C3322 ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF -C3323 ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF -C3324 ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF -C3325 ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF -C3326 ro_complete_0/cbank_1/v vssa1 16.46fF -C3327 ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF -C3328 divbuf_7/OUT vssa1 405.76fF -C3329 ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF -C3330 divbuf_6/OUT vssa1 402.77fF -C3331 ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF -C3332 divbuf_3/OUT vssa1 394.74fF -C3333 ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF -C3334 divbuf_5/OUT vssa1 397.92fF -C3335 ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF -C3336 divbuf_4/OUT vssa1 391.26fF -C3337 ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF -C3338 divbuf_2/OUT vssa1 387.66fF -C3339 ro_complete_0/cbank_0/v vssa1 15.12fF -C3340 ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF -C3341 ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF -C3342 ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF -C3343 ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF -C3344 ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF -C3345 ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF -C3346 ro_complete_0/ro_var_extend_0/vcont vssa1 0.27fF -C3347 filter_0/v vssa1 477.90fF -C3348 filter_0/a_4216_n5230# vssa1 418.47fF **FLOATING -C3349 filter_0/a_4216_n2998# vssa1 1.03fF **FLOATING -C3350 cp_0/down vssa1 1.54fF -C3351 cp_0/vbias vssa1 2.41fF -C3352 cp_0/out vssa1 5.34fF -C3353 cp_0/upbar vssa1 1.50fF -C3354 cp_0/a_7110_n2840# vssa1 0.17fF **FLOATING -C3355 cp_0/a_3060_n2840# vssa1 1.71fF **FLOATING -C3356 cp_0/a_7110_0# vssa1 0.17fF **FLOATING -C3357 cp_0/a_6370_0# vssa1 0.40fF **FLOATING -C3358 cp_0/a_3060_0# vssa1 1.66fF **FLOATING -C3359 cp_0/a_1710_0# vssa1 5.89fF **FLOATING -C3360 cp_0/a_1710_n2840# vssa1 4.91fF **FLOATING -C3361 cp_0/a_10_n50# vssa1 2.96fF **FLOATING -C3362 pd_1/and_pd_0/Z1 vssa1 0.39fF -C3363 pd_1/and_pd_0/Out1 vssa1 2.22fF -C3364 pd_1/tspc_r_1/z5 vssa1 1.10fF -C3365 pd_1/tspc_r_1/Z4 vssa1 1.07fF -C3366 pd_1/tspc_r_1/Qbar vssa1 0.88fF -C3367 pd_1/tspc_r_1/Z2 vssa1 1.22fF -C3368 pd_1/tspc_r_1/Z1 vssa1 0.67fF -C3369 pd_1/UP vssa1 2.21fF -C3370 pd_1/tspc_r_1/Qbar1 vssa1 1.34fF -C3371 pd_1/tspc_r_1/Z3 vssa1 2.12fF -C3372 pd_1/REF vssa1 1.80fF -C3373 pd_1/tspc_r_0/z5 vssa1 1.10fF -C3374 pd_1/tspc_r_0/Z4 vssa1 1.07fF -C3375 pd_1/R vssa1 3.05fF -C3376 pd_1/tspc_r_0/Qbar vssa1 0.79fF -C3377 pd_1/tspc_r_0/Z2 vssa1 1.22fF -C3378 pd_1/tspc_r_0/Z1 vssa1 0.67fF -C3379 pd_1/DOWN vssa1 3.08fF -C3380 pd_1/tspc_r_0/Qbar1 vssa1 1.34fF -C3381 pd_1/tspc_r_0/Z3 vssa1 2.12fF -C3382 pd_1/DIV vssa1 1.82fF -C3383 pd_0/and_pd_0/Z1 vssa1 0.39fF -C3384 pd_0/and_pd_0/Out1 vssa1 2.22fF -C3385 pd_0/tspc_r_1/z5 vssa1 1.10fF -C3386 pd_0/tspc_r_1/Z4 vssa1 1.07fF -C3387 pd_0/tspc_r_1/Qbar vssa1 0.88fF -C3388 pd_0/tspc_r_1/Z2 vssa1 1.22fF -C3389 pd_0/tspc_r_1/Z1 vssa1 0.67fF -C3390 pd_0/UP vssa1 2.21fF -C3391 pd_0/tspc_r_1/Qbar1 vssa1 1.34fF -C3392 pd_0/tspc_r_1/Z3 vssa1 2.12fF -C3393 pd_0/REF vssa1 1.80fF -C3394 pd_0/tspc_r_0/z5 vssa1 1.10fF -C3395 pd_0/tspc_r_0/Z4 vssa1 1.07fF -C3396 pd_0/R vssa1 3.05fF -C3397 pd_0/tspc_r_0/Qbar vssa1 0.79fF -C3398 pd_0/tspc_r_0/Z2 vssa1 1.22fF -C3399 pd_0/tspc_r_0/Z1 vssa1 0.67fF -C3400 pd_0/DOWN vssa1 3.08fF -C3401 pd_0/tspc_r_0/Qbar1 vssa1 1.34fF -C3402 pd_0/tspc_r_0/Z3 vssa1 2.12fF -C3403 pd_0/DIV vssa1 1.82fF +C2701 pll_full_1/divider_0/and_0/Z1 vssa1 0.65fF +C2702 pll_full_1/divider_0/and_0/B vssa1 2.45fF +C2703 pll_full_1/divider_0/and_0/A vssa1 2.35fF +C2704 pll_full_1/divider_0/and_0/out1 vssa1 2.99fF +C2705 pll_full_1/divider_0/tspc_2/Z4 vssa1 0.86fF +C2706 pll_full_1/divider_0/tspc_2/Z3 vssa1 2.26fF +C2707 pll_full_1/divider_0/tspc_2/Z2 vssa1 1.46fF +C2708 pll_full_1/divider_0/tspc_2/Z1 vssa1 0.99fF +C2709 pll_full_1/divider_0/nor_0/A vssa1 7.08fF +C2710 pll_full_1/divider_0/tspc_2/a_630_n680# vssa1 1.15fF **FLOATING +C2711 pll_full_1/divider_0/tspc_1/Z4 vssa1 0.86fF +C2712 pll_full_1/divider_0/tspc_1/Z3 vssa1 2.26fF +C2713 pll_full_1/divider_0/tspc_1/Z2 vssa1 1.46fF +C2714 pll_full_1/divider_0/tspc_1/Z1 vssa1 0.99fF +C2715 pll_full_1/divider_0/nor_0/B vssa1 7.12fF +C2716 pll_full_1/divider_0/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING +C2717 pll_full_1/divider_0/tspc_2/Q vssa1 3.14fF +C2718 pll_full_1/divider_0/tspc_0/Z4 vssa1 0.86fF +C2719 pll_full_1/divbuf_0/IN vssa1 9.89fF +C2720 pll_full_1/divider_0/tspc_0/Z3 vssa1 2.26fF +C2721 pll_full_1/divider_0/tspc_0/Z2 vssa1 1.46fF +C2722 pll_full_1/divider_0/tspc_0/Z1 vssa1 0.99fF +C2723 pll_full_1/divider_0/nor_1/B vssa1 6.48fF +C2724 pll_full_1/divider_0/tspc_0/a_630_n680# vssa1 1.14fF **FLOATING +C2725 pll_full_1/divider_0/tspc_1/Q vssa1 3.12fF +C2726 pll_full_1/divider_0/clk vssa1 33.42fF +C2727 pll_full_1/divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF +C2728 pll_full_1/divider_0/prescaler_0/tspc_0/D vssa1 2.64fF +C2729 pll_full_1/divider_0/prescaler_0/tspc_2/Q vssa1 3.72fF +C2730 pll_full_1/divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF +C2731 pll_full_1/divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF +C2732 pll_full_1/divider_0/prescaler_0/tspc_2/D vssa1 3.12fF +C2733 pll_full_1/divider_0/and_0/OUT vssa1 5.67fF +C2734 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF +C2735 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF +C2736 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 vssa1 1.19fF +C2737 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF +C2738 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.47fF **FLOATING +C2739 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING +C2740 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF +C2741 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF +C2742 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF +C2743 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF +C2744 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING +C2745 pll_full_1/divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING +C2746 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF +C2747 pll_full_1/divider_0/prescaler_0/Out vssa1 4.59fF +C2748 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF +C2749 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF +C2750 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF +C2751 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING +C2752 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING +C2753 pll_full_1/divider_0/nor_1/Z1 vssa1 1.34fF +C2754 pll_full_1/divider_0/nor_0/Z1 vssa1 1.34fF +C2755 pll_full_1/divbuf_1/OUT vssa1 363.82fF +C2756 pll_full_1/divbuf_1/OUT5 vssa1 350.37fF +C2757 pll_full_1/divbuf_1/OUT4 vssa1 133.72fF +C2758 pll_full_1/divbuf_1/OUT3 vssa1 34.03fF +C2759 pll_full_1/divbuf_1/OUT2 vssa1 8.71fF +C2760 pll_full_1/divbuf_1/a_492_n240# vssa1 2.46fF **FLOATING +C2761 pll_full_1/divbuf_0/OUT5 vssa1 350.37fF +C2762 pll_full_1/divbuf_0/OUT4 vssa1 133.72fF +C2763 pll_full_1/divbuf_0/OUT3 vssa1 34.03fF +C2764 pll_full_1/divbuf_0/OUT2 vssa1 8.71fF +C2765 pll_full_1/divbuf_0/a_492_n240# vssa1 2.46fF **FLOATING +C2766 pll_full_1/ro_complete_0/cbank_2/v vssa1 16.43fF +C2767 pll_full_1/ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF +C2768 pll_full_1/ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF +C2769 pll_full_1/ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF +C2770 pll_full_1/ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF +C2771 pll_full_1/ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF +C2772 pll_full_1/ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF +C2773 pll_full_1/ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF +C2774 pll_full_1/ro_complete_0/a0 vssa1 5.35fF +C2775 pll_full_1/ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF +C2776 pll_full_1/ro_complete_0/a1 vssa1 6.54fF +C2777 pll_full_1/ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF +C2778 pll_full_1/ro_complete_0/a3 vssa1 5.96fF +C2779 pll_full_1/ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF +C2780 pll_full_1/ro_complete_0/a2 vssa1 5.21fF +C2781 pll_full_1/ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF +C2782 pll_full_1/ro_complete_0/a4 vssa1 5.81fF +C2783 pll_full_1/ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF +C2784 pll_full_1/ro_complete_0/a5 vssa1 6.74fF +C2785 pll_full_1/ro_complete_0/cbank_0/v vssa1 15.12fF +C2786 pll_full_1/ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF +C2787 pll_full_1/ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF +C2788 pll_full_1/ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF +C2789 pll_full_1/ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF +C2790 pll_full_1/ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF +C2791 pll_full_1/ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF +C2792 pll_full_1/ro_complete_0/ro_var_extend_0/vcont vssa1 0.27fF +C2793 pll_full_1/filter_0/a_4216_n5230# vssa1 418.90fF **FLOATING +C2794 pll_full_1/filter_0/a_4216_n2998# vssa1 1.39fF **FLOATING +C2795 pll_full_1/cp_0/down vssa1 1.54fF +C2796 pll_full_1/cp_0/upbar vssa1 1.79fF +C2797 pll_full_1/cp_0/a_7110_n2840# vssa1 0.17fF **FLOATING +C2798 pll_full_1/cp_0/a_3060_n2840# vssa1 1.71fF **FLOATING +C2799 pll_full_1/cp_0/a_7110_0# vssa1 0.17fF **FLOATING +C2800 pll_full_1/cp_0/a_6370_0# vssa1 0.40fF **FLOATING +C2801 pll_full_1/cp_0/a_3060_0# vssa1 2.49fF **FLOATING +C2802 pll_full_1/cp_0/a_1710_0# vssa1 7.47fF **FLOATING +C2803 pll_full_1/pd_0/and_pd_0/Z1 vssa1 0.39fF +C2804 pll_full_1/pd_0/and_pd_0/Out1 vssa1 2.22fF +C2805 pll_full_1/pd_0/tspc_r_1/z5 vssa1 1.10fF +C2806 pll_full_1/pd_0/tspc_r_1/Z4 vssa1 1.07fF +C2807 pll_full_1/pd_0/tspc_r_1/Qbar vssa1 0.88fF +C2808 pll_full_1/pd_0/tspc_r_1/Z2 vssa1 1.22fF +C2809 pll_full_1/pd_0/tspc_r_1/Z1 vssa1 0.67fF +C2810 pll_full_1/pd_0/UP vssa1 6.41fF +C2811 pll_full_1/pd_0/tspc_r_1/Qbar1 vssa1 1.34fF +C2812 pll_full_1/pd_0/tspc_r_1/Z3 vssa1 2.12fF +C2813 pll_full_1/pd_0/REF vssa1 6.48fF +C2814 pll_full_1/pd_0/tspc_r_0/z5 vssa1 1.10fF +C2815 pll_full_1/pd_0/tspc_r_0/Z4 vssa1 1.07fF +C2816 pll_full_1/pd_0/R vssa1 3.05fF +C2817 pll_full_1/pd_0/tspc_r_0/Qbar vssa1 0.79fF +C2818 pll_full_1/pd_0/tspc_r_0/Z2 vssa1 1.22fF +C2819 pll_full_1/pd_0/tspc_r_0/Z1 vssa1 0.67fF +C2820 pll_full_1/pd_0/DOWN vssa1 7.34fF +C2821 pll_full_1/pd_0/tspc_r_0/Qbar1 vssa1 1.34fF +C2822 pll_full_1/pd_0/tspc_r_0/Z3 vssa1 2.12fF +C2823 pll_full_1/pd_0/DIV vssa1 372.69fF +C2824 pll_full_0/divider_0/and_0/Z1 vssa1 0.65fF +C2825 pll_full_0/divider_0/and_0/B vssa1 2.45fF +C2826 pll_full_0/divider_0/and_0/A vssa1 2.35fF +C2827 pll_full_0/divider_0/and_0/out1 vssa1 2.99fF +C2828 pll_full_0/divider_0/tspc_2/Z4 vssa1 0.86fF +C2829 pll_full_0/divider_0/tspc_2/Z3 vssa1 2.26fF +C2830 pll_full_0/divider_0/tspc_2/Z2 vssa1 1.46fF +C2831 pll_full_0/divider_0/tspc_2/Z1 vssa1 0.99fF +C2832 pll_full_0/divider_0/nor_0/A vssa1 7.08fF +C2833 pll_full_0/divider_0/tspc_2/a_630_n680# vssa1 1.15fF **FLOATING +C2834 pll_full_0/divider_0/tspc_1/Z4 vssa1 0.86fF +C2835 pll_full_0/divider_0/tspc_1/Z3 vssa1 2.26fF +C2836 pll_full_0/divider_0/tspc_1/Z2 vssa1 1.46fF +C2837 pll_full_0/divider_0/tspc_1/Z1 vssa1 0.99fF +C2838 pll_full_0/divider_0/nor_0/B vssa1 7.12fF +C2839 pll_full_0/divider_0/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING +C2840 pll_full_0/divider_0/tspc_2/Q vssa1 3.14fF +C2841 pll_full_0/divider_0/tspc_0/Z4 vssa1 0.86fF +C2842 pll_full_0/divbuf_0/IN vssa1 9.89fF +C2843 pll_full_0/divider_0/tspc_0/Z3 vssa1 2.26fF +C2844 pll_full_0/divider_0/tspc_0/Z2 vssa1 1.46fF +C2845 pll_full_0/divider_0/tspc_0/Z1 vssa1 0.99fF +C2846 pll_full_0/divider_0/nor_1/B vssa1 6.48fF +C2847 pll_full_0/divider_0/tspc_0/a_630_n680# vssa1 1.14fF **FLOATING +C2848 pll_full_0/divider_0/tspc_1/Q vssa1 3.12fF +C2849 pll_full_0/divider_0/clk vssa1 33.42fF +C2850 pll_full_0/divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF +C2851 pll_full_0/divider_0/prescaler_0/tspc_0/D vssa1 2.64fF +C2852 pll_full_0/divider_0/prescaler_0/tspc_2/Q vssa1 3.72fF +C2853 pll_full_0/divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF +C2854 pll_full_0/divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF +C2855 pll_full_0/divider_0/prescaler_0/tspc_2/D vssa1 3.12fF +C2856 pll_full_0/divider_0/and_0/OUT vssa1 5.67fF +C2857 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF +C2858 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF +C2859 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 vssa1 1.19fF +C2860 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF +C2861 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.47fF **FLOATING +C2862 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING +C2863 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF +C2864 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF +C2865 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF +C2866 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF +C2867 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING +C2868 pll_full_0/divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING +C2869 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF +C2870 pll_full_0/divider_0/prescaler_0/Out vssa1 4.59fF +C2871 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF +C2872 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF +C2873 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF +C2874 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING +C2875 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING +C2876 pll_full_0/divider_0/nor_1/Z1 vssa1 1.34fF +C2877 pll_full_0/divider_0/nor_0/Z1 vssa1 1.34fF +C2878 pll_full_0/divbuf_1/OUT vssa1 363.82fF +C2879 pll_full_0/divbuf_1/OUT5 vssa1 350.37fF +C2880 pll_full_0/divbuf_1/OUT4 vssa1 133.72fF +C2881 pll_full_0/divbuf_1/OUT3 vssa1 34.03fF +C2882 pll_full_0/divbuf_1/OUT2 vssa1 8.71fF +C2883 pll_full_0/divbuf_1/a_492_n240# vssa1 2.46fF **FLOATING +C2884 pll_full_0/divbuf_0/OUT5 vssa1 350.37fF +C2885 pll_full_0/divbuf_0/OUT4 vssa1 133.72fF +C2886 pll_full_0/divbuf_0/OUT3 vssa1 34.03fF +C2887 pll_full_0/divbuf_0/OUT2 vssa1 8.71fF +C2888 pll_full_0/divbuf_0/a_492_n240# vssa1 2.46fF **FLOATING +C2889 pll_full_0/ro_complete_0/cbank_2/v vssa1 16.43fF +C2890 pll_full_0/ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF +C2891 pll_full_0/ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF +C2892 pll_full_0/ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF +C2893 pll_full_0/ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF +C2894 pll_full_0/ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF +C2895 pll_full_0/ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF +C2896 pll_full_0/ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF +C2897 pll_full_0/ro_complete_0/a0 vssa1 5.35fF +C2898 pll_full_0/ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF +C2899 pll_full_0/ro_complete_0/a1 vssa1 6.54fF +C2900 pll_full_0/ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF +C2901 pll_full_0/ro_complete_0/a3 vssa1 5.96fF +C2902 pll_full_0/ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF +C2903 pll_full_0/ro_complete_0/a2 vssa1 5.21fF +C2904 pll_full_0/ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF +C2905 pll_full_0/ro_complete_0/a4 vssa1 5.81fF +C2906 pll_full_0/ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF +C2907 pll_full_0/ro_complete_0/a5 vssa1 6.74fF +C2908 pll_full_0/ro_complete_0/cbank_0/v vssa1 15.12fF +C2909 pll_full_0/ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF +C2910 pll_full_0/ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF +C2911 pll_full_0/ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF +C2912 pll_full_0/ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF +C2913 pll_full_0/ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF +C2914 pll_full_0/ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF +C2915 pll_full_0/ro_complete_0/ro_var_extend_0/vcont vssa1 0.27fF +C2916 pll_full_0/filter_0/a_4216_n5230# vssa1 418.90fF **FLOATING +C2917 pll_full_0/filter_0/a_4216_n2998# vssa1 1.39fF **FLOATING +C2918 pll_full_0/cp_0/down vssa1 1.54fF +C2919 pll_full_0/cp_0/upbar vssa1 1.79fF +C2920 pll_full_0/cp_0/a_7110_n2840# vssa1 0.17fF **FLOATING +C2921 pll_full_0/cp_0/a_3060_n2840# vssa1 1.71fF **FLOATING +C2922 pll_full_0/cp_0/a_7110_0# vssa1 0.17fF **FLOATING +C2923 pll_full_0/cp_0/a_6370_0# vssa1 0.40fF **FLOATING +C2924 pll_full_0/cp_0/a_3060_0# vssa1 2.49fF **FLOATING +C2925 pll_full_0/cp_0/a_1710_0# vssa1 7.47fF **FLOATING +C2926 pll_full_0/pd_0/and_pd_0/Z1 vssa1 0.39fF +C2927 pll_full_0/pd_0/and_pd_0/Out1 vssa1 2.22fF +C2928 pll_full_0/pd_0/tspc_r_1/z5 vssa1 1.10fF +C2929 pll_full_0/pd_0/tspc_r_1/Z4 vssa1 1.07fF +C2930 pll_full_0/pd_0/tspc_r_1/Qbar vssa1 0.88fF +C2931 pll_full_0/pd_0/tspc_r_1/Z2 vssa1 1.22fF +C2932 pll_full_0/pd_0/tspc_r_1/Z1 vssa1 0.67fF +C2933 pll_full_0/pd_0/UP vssa1 6.41fF +C2934 pll_full_0/pd_0/tspc_r_1/Qbar1 vssa1 1.34fF +C2935 pll_full_0/pd_0/tspc_r_1/Z3 vssa1 2.12fF +C2936 pll_full_0/pd_0/REF vssa1 6.48fF +C2937 pll_full_0/pd_0/tspc_r_0/z5 vssa1 1.10fF +C2938 pll_full_0/pd_0/tspc_r_0/Z4 vssa1 1.07fF +C2939 pll_full_0/pd_0/R vssa1 3.05fF +C2940 pll_full_0/pd_0/tspc_r_0/Qbar vssa1 0.79fF +C2941 pll_full_0/pd_0/tspc_r_0/Z2 vssa1 1.22fF +C2942 pll_full_0/pd_0/tspc_r_0/Z1 vssa1 0.67fF +C2943 pll_full_0/pd_0/DOWN vssa1 7.34fF +C2944 pll_full_0/pd_0/tspc_r_0/Qbar1 vssa1 1.34fF +C2945 pll_full_0/pd_0/tspc_r_0/Z3 vssa1 2.12fF +C2946 pll_full_0/pd_0/DIV vssa1 372.69fF +C2947 divbuf_19/OUT vssa1 363.82fF +C2948 divbuf_19/OUT5 vssa1 350.37fF +C2949 divbuf_19/OUT4 vssa1 133.72fF +C2950 divbuf_19/OUT3 vssa1 34.03fF +C2951 divbuf_19/OUT2 vssa1 8.71fF +C2952 divbuf_19/IN vssa1 0.89fF +C2953 divbuf_19/a_492_n240# vssa1 2.46fF **FLOATING +C2954 divbuf_18/OUT vssa1 363.82fF +C2955 divbuf_18/OUT5 vssa1 350.37fF +C2956 divbuf_18/OUT4 vssa1 133.72fF +C2957 divbuf_18/OUT3 vssa1 34.03fF +C2958 divbuf_18/OUT2 vssa1 8.71fF +C2959 divbuf_18/IN vssa1 0.89fF +C2960 divbuf_18/a_492_n240# vssa1 2.46fF **FLOATING +C2961 divbuf_17/OUT vssa1 363.82fF +C2962 divbuf_17/OUT5 vssa1 350.37fF +C2963 divbuf_17/OUT4 vssa1 133.72fF +C2964 divbuf_17/OUT3 vssa1 34.03fF +C2965 divbuf_17/OUT2 vssa1 8.71fF +C2966 divbuf_17/IN vssa1 0.89fF +C2967 divbuf_17/a_492_n240# vssa1 2.46fF **FLOATING +C2968 divider_2/and_0/Z1 vssa1 0.74fF +C2969 divider_2/and_0/B vssa1 2.25fF +C2970 divider_2/and_0/A vssa1 2.19fF +C2971 divider_2/and_0/out1 vssa1 2.93fF +C2972 divider_2/tspc_2/Z4 vssa1 0.86fF +C2973 divider_2/tspc_2/Z3 vssa1 2.26fF +C2974 divider_2/tspc_2/Z2 vssa1 1.46fF +C2975 divider_2/tspc_2/Z1 vssa1 0.99fF +C2976 divider_2/nor_0/A vssa1 7.04fF +C2977 divider_2/tspc_2/a_630_n680# vssa1 1.15fF **FLOATING +C2978 divider_2/tspc_1/Z4 vssa1 0.86fF +C2979 divider_2/tspc_1/Z3 vssa1 2.26fF +C2980 divider_2/tspc_1/Z2 vssa1 1.46fF +C2981 divider_2/tspc_1/Z1 vssa1 0.99fF +C2982 divider_2/nor_0/B vssa1 7.05fF +C2983 divider_2/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING +C2984 divider_2/tspc_2/Q vssa1 3.14fF +C2985 divider_2/tspc_0/Z4 vssa1 0.86fF +C2986 divider_2/Out vssa1 1.60fF +C2987 divider_2/tspc_0/Z3 vssa1 2.26fF +C2988 divider_2/tspc_0/Z2 vssa1 1.46fF +C2989 divider_2/tspc_0/Z1 vssa1 0.99fF +C2990 divider_2/nor_1/B vssa1 6.44fF +C2991 divider_2/tspc_0/a_630_n680# vssa1 1.14fF **FLOATING +C2992 divider_2/tspc_1/Q vssa1 3.12fF +C2993 divider_2/clk vssa1 5.63fF +C2994 divider_2/prescaler_0/nand_1/z1 vssa1 0.36fF +C2995 divider_2/prescaler_0/tspc_0/D vssa1 2.64fF +C2996 divider_2/prescaler_0/tspc_2/Q vssa1 3.74fF +C2997 divider_2/prescaler_0/tspc_1/Q vssa1 3.61fF +C2998 divider_2/prescaler_0/nand_0/z1 vssa1 0.36fF +C2999 divider_2/prescaler_0/tspc_2/D vssa1 3.12fF +C3000 divider_2/and_0/OUT vssa1 5.62fF +C3001 divider_2/prescaler_0/tspc_2/Z4 vssa1 0.86fF +C3002 divider_2/prescaler_0/tspc_2/Z3 vssa1 2.26fF +C3003 divider_2/prescaler_0/tspc_2/Z2 vssa1 1.46fF +C3004 divider_2/prescaler_0/tspc_2/Z1 vssa1 0.99fF +C3005 divider_2/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING +C3006 divider_2/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING +C3007 divider_2/prescaler_0/tspc_1/Z4 vssa1 0.86fF +C3008 divider_2/prescaler_0/tspc_1/Z3 vssa1 2.26fF +C3009 divider_2/prescaler_0/tspc_1/Z2 vssa1 1.48fF +C3010 divider_2/prescaler_0/tspc_1/Z1 vssa1 0.99fF +C3011 divider_2/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING +C3012 divider_2/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING +C3013 divider_2/prescaler_0/tspc_0/Z4 vssa1 0.86fF +C3014 divider_2/prescaler_0/Out vssa1 4.59fF +C3015 divider_2/prescaler_0/tspc_0/Z3 vssa1 2.26fF +C3016 divider_2/prescaler_0/tspc_0/Z2 vssa1 1.46fF +C3017 divider_2/prescaler_0/tspc_0/Z1 vssa1 0.99fF +C3018 divider_2/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING +C3019 divider_2/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING +C3020 divider_2/nor_1/Z1 vssa1 1.34fF +C3021 divider_2/mc2 vssa1 5.29fF +C3022 divider_2/nor_0/Z1 vssa1 1.34fF +C3023 divbuf_16/OUT vssa1 363.82fF +C3024 divbuf_16/OUT5 vssa1 350.37fF +C3025 divbuf_16/OUT4 vssa1 133.72fF +C3026 divbuf_16/OUT3 vssa1 34.03fF +C3027 divbuf_16/OUT2 vssa1 8.71fF +C3028 divbuf_16/IN vssa1 0.89fF +C3029 divbuf_16/a_492_n240# vssa1 2.46fF **FLOATING +C3030 divider_1/and_0/Z1 vssa1 0.74fF +C3031 divider_1/and_0/B vssa1 2.25fF +C3032 divider_1/and_0/A vssa1 2.19fF +C3033 divider_1/and_0/out1 vssa1 2.93fF +C3034 divider_1/tspc_2/Z4 vssa1 0.86fF +C3035 divider_1/tspc_2/Z3 vssa1 2.26fF +C3036 divider_1/tspc_2/Z2 vssa1 1.46fF +C3037 divider_1/tspc_2/Z1 vssa1 0.99fF +C3038 divider_1/nor_0/A vssa1 7.04fF +C3039 divider_1/tspc_2/a_630_n680# vssa1 1.15fF **FLOATING +C3040 divider_1/tspc_1/Z4 vssa1 0.86fF +C3041 divider_1/tspc_1/Z3 vssa1 2.26fF +C3042 divider_1/tspc_1/Z2 vssa1 1.46fF +C3043 divider_1/tspc_1/Z1 vssa1 0.99fF +C3044 divider_1/nor_0/B vssa1 7.05fF +C3045 divider_1/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING +C3046 divider_1/tspc_2/Q vssa1 3.14fF +C3047 divider_1/tspc_0/Z4 vssa1 0.86fF +C3048 divider_1/Out vssa1 1.60fF +C3049 divider_1/tspc_0/Z3 vssa1 2.26fF +C3050 divider_1/tspc_0/Z2 vssa1 1.46fF +C3051 divider_1/tspc_0/Z1 vssa1 0.99fF +C3052 divider_1/nor_1/B vssa1 6.33fF +C3053 divider_1/tspc_0/a_630_n680# vssa1 1.14fF **FLOATING +C3054 divider_1/tspc_1/Q vssa1 3.12fF +C3055 divider_1/clk vssa1 5.63fF +C3056 divider_1/prescaler_0/nand_1/z1 vssa1 0.36fF +C3057 divider_1/prescaler_0/tspc_0/D vssa1 2.64fF +C3058 divider_1/prescaler_0/tspc_2/Q vssa1 3.74fF +C3059 divider_1/prescaler_0/tspc_1/Q vssa1 3.61fF +C3060 divider_1/prescaler_0/nand_0/z1 vssa1 0.36fF +C3061 divider_1/prescaler_0/tspc_2/D vssa1 3.12fF +C3062 divider_1/and_0/OUT vssa1 5.62fF +C3063 divider_1/prescaler_0/tspc_2/Z4 vssa1 0.86fF +C3064 divider_1/prescaler_0/tspc_2/Z3 vssa1 2.26fF +C3065 divider_1/prescaler_0/tspc_2/Z2 vssa1 1.46fF +C3066 divider_1/prescaler_0/tspc_2/Z1 vssa1 0.99fF +C3067 divider_1/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING +C3068 divider_1/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING +C3069 divider_1/prescaler_0/tspc_1/Z4 vssa1 0.86fF +C3070 divider_1/prescaler_0/tspc_1/Z3 vssa1 2.26fF +C3071 divider_1/prescaler_0/tspc_1/Z2 vssa1 1.48fF +C3072 divider_1/prescaler_0/tspc_1/Z1 vssa1 0.99fF +C3073 divider_1/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING +C3074 divider_1/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING +C3075 divider_1/prescaler_0/tspc_0/Z4 vssa1 0.86fF +C3076 divider_1/prescaler_0/Out vssa1 4.59fF +C3077 divider_1/prescaler_0/tspc_0/Z3 vssa1 2.26fF +C3078 divider_1/prescaler_0/tspc_0/Z2 vssa1 1.46fF +C3079 divider_1/prescaler_0/tspc_0/Z1 vssa1 0.99fF +C3080 divider_1/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING +C3081 divider_1/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING +C3082 divider_1/nor_1/Z1 vssa1 1.34fF +C3083 divider_1/mc2 vssa1 5.29fF +C3084 divider_1/nor_0/Z1 vssa1 1.34fF +C3085 divbuf_15/OUT vssa1 363.82fF +C3086 divbuf_15/OUT5 vssa1 350.37fF +C3087 divbuf_15/OUT4 vssa1 133.72fF +C3088 divbuf_15/OUT3 vssa1 34.03fF +C3089 divbuf_15/OUT2 vssa1 8.71fF +C3090 divbuf_15/IN vssa1 0.89fF +C3091 divbuf_15/a_492_n240# vssa1 2.46fF **FLOATING +C3092 divbuf_25/OUT5 vssa1 350.37fF +C3093 divbuf_25/OUT4 vssa1 133.72fF +C3094 divbuf_25/OUT3 vssa1 34.03fF +C3095 divbuf_25/OUT2 vssa1 8.71fF +C3096 divbuf_25/IN vssa1 0.89fF +C3097 divbuf_25/a_492_n240# vssa1 2.46fF **FLOATING +C3098 divbuf_14/OUT vssa1 363.82fF +C3099 divbuf_14/OUT5 vssa1 350.37fF +C3100 divbuf_14/OUT4 vssa1 133.72fF +C3101 divbuf_14/OUT3 vssa1 34.03fF +C3102 divbuf_14/OUT2 vssa1 8.71fF +C3103 divbuf_14/IN vssa1 0.89fF +C3104 divbuf_14/a_492_n240# vssa1 2.46fF **FLOATING +C3105 divider_0/and_0/Z1 vssa1 0.74fF +C3106 divider_0/and_0/B vssa1 2.25fF +C3107 divider_0/and_0/A vssa1 2.19fF +C3108 divider_0/and_0/out1 vssa1 2.93fF +C3109 divider_0/tspc_2/Z4 vssa1 0.86fF +C3110 divider_0/tspc_2/Z3 vssa1 2.26fF +C3111 divider_0/tspc_2/Z2 vssa1 1.46fF +C3112 divider_0/tspc_2/Z1 vssa1 0.99fF +C3113 divider_0/nor_0/A vssa1 7.04fF +C3114 divider_0/tspc_2/a_630_n680# vssa1 1.15fF **FLOATING +C3115 divider_0/tspc_1/Z4 vssa1 0.86fF +C3116 divider_0/tspc_1/Z3 vssa1 2.26fF +C3117 divider_0/tspc_1/Z2 vssa1 1.46fF +C3118 divider_0/tspc_1/Z1 vssa1 0.99fF +C3119 divider_0/nor_0/B vssa1 7.05fF +C3120 divider_0/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING +C3121 divider_0/tspc_2/Q vssa1 3.14fF +C3122 divider_0/tspc_0/Z4 vssa1 0.86fF +C3123 divider_0/Out vssa1 1.60fF +C3124 divider_0/tspc_0/Z3 vssa1 2.26fF +C3125 divider_0/tspc_0/Z2 vssa1 1.46fF +C3126 divider_0/tspc_0/Z1 vssa1 0.99fF +C3127 divider_0/nor_1/B vssa1 6.33fF +C3128 divider_0/tspc_0/a_630_n680# vssa1 1.14fF **FLOATING +C3129 divider_0/tspc_1/Q vssa1 3.12fF +C3130 divider_0/clk vssa1 5.63fF +C3131 divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF +C3132 divider_0/prescaler_0/tspc_0/D vssa1 2.64fF +C3133 divider_0/prescaler_0/tspc_2/Q vssa1 3.64fF +C3134 divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF +C3135 divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF +C3136 divider_0/prescaler_0/tspc_2/D vssa1 3.12fF +C3137 divider_0/and_0/OUT vssa1 5.62fF +C3138 divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF +C3139 divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF +C3140 divider_0/prescaler_0/tspc_2/Z2 vssa1 1.46fF +C3141 divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF +C3142 divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING +C3143 divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING +C3144 divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF +C3145 divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF +C3146 divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF +C3147 divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF +C3148 divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING +C3149 divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING +C3150 divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF +C3151 divider_0/prescaler_0/Out vssa1 4.59fF +C3152 divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF +C3153 divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF +C3154 divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF +C3155 divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING +C3156 divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING +C3157 divider_0/nor_1/Z1 vssa1 1.34fF +C3158 divider_0/mc2 vssa1 5.29fF +C3159 divider_0/nor_0/Z1 vssa1 1.34fF +C3160 divbuf_24/OUT vssa1 363.82fF +C3161 divbuf_24/OUT5 vssa1 350.37fF +C3162 divbuf_24/OUT4 vssa1 133.72fF +C3163 divbuf_24/OUT3 vssa1 34.03fF +C3164 divbuf_24/OUT2 vssa1 8.71fF +C3165 divbuf_24/IN vssa1 0.89fF +C3166 divbuf_24/a_492_n240# vssa1 2.46fF **FLOATING +C3167 divbuf_13/OUT vssa1 363.82fF +C3168 divbuf_13/OUT5 vssa1 350.37fF +C3169 divbuf_13/OUT4 vssa1 133.72fF +C3170 divbuf_13/OUT3 vssa1 34.03fF +C3171 divbuf_13/OUT2 vssa1 8.71fF +C3172 divbuf_13/IN vssa1 0.89fF +C3173 divbuf_13/a_492_n240# vssa1 2.46fF **FLOATING +C3174 divbuf_9/OUT vssa1 363.82fF +C3175 divbuf_9/OUT5 vssa1 350.37fF +C3176 divbuf_9/OUT4 vssa1 133.72fF +C3177 divbuf_9/OUT3 vssa1 34.03fF +C3178 divbuf_9/OUT2 vssa1 8.71fF +C3179 divbuf_9/IN vssa1 0.89fF +C3180 divbuf_9/a_492_n240# vssa1 2.46fF **FLOATING +C3181 divbuf_23/OUT vssa1 363.82fF +C3182 divbuf_23/OUT5 vssa1 350.37fF +C3183 divbuf_23/OUT4 vssa1 133.72fF +C3184 divbuf_23/OUT3 vssa1 34.03fF +C3185 divbuf_23/OUT2 vssa1 8.71fF +C3186 divbuf_23/IN vssa1 0.89fF +C3187 divbuf_23/a_492_n240# vssa1 2.46fF **FLOATING +C3188 divbuf_12/OUT vssa1 363.82fF +C3189 divbuf_12/OUT5 vssa1 350.37fF +C3190 divbuf_12/OUT4 vssa1 133.72fF +C3191 divbuf_12/OUT3 vssa1 34.03fF +C3192 divbuf_12/OUT2 vssa1 8.71fF +C3193 divbuf_12/IN vssa1 0.89fF +C3194 divbuf_12/a_492_n240# vssa1 2.46fF **FLOATING +C3195 divbuf_8/OUT vssa1 363.82fF +C3196 divbuf_8/OUT5 vssa1 350.37fF +C3197 divbuf_8/OUT4 vssa1 133.72fF +C3198 divbuf_8/OUT3 vssa1 34.03fF +C3199 divbuf_8/OUT2 vssa1 8.71fF +C3200 divbuf_8/IN vssa1 0.89fF +C3201 divbuf_8/a_492_n240# vssa1 2.46fF **FLOATING +C3202 divbuf_22/OUT vssa1 363.82fF +C3203 divbuf_22/OUT5 vssa1 350.37fF +C3204 divbuf_22/OUT4 vssa1 133.72fF +C3205 divbuf_22/OUT3 vssa1 34.03fF +C3206 divbuf_22/OUT2 vssa1 8.71fF +C3207 divbuf_22/IN vssa1 0.89fF +C3208 divbuf_22/a_492_n240# vssa1 2.46fF **FLOATING +C3209 divbuf_11/OUT vssa1 363.82fF +C3210 divbuf_11/OUT5 vssa1 350.37fF +C3211 divbuf_11/OUT4 vssa1 133.72fF +C3212 divbuf_11/OUT3 vssa1 34.03fF +C3213 divbuf_11/OUT2 vssa1 8.71fF +C3214 divbuf_11/IN vssa1 0.89fF +C3215 divbuf_11/a_492_n240# vssa1 2.46fF **FLOATING +C3216 divbuf_7/OUT5 vssa1 350.37fF +C3217 divbuf_7/OUT4 vssa1 133.72fF +C3218 divbuf_7/OUT3 vssa1 34.03fF +C3219 divbuf_7/OUT2 vssa1 8.71fF +C3220 divbuf_7/IN vssa1 0.89fF +C3221 divbuf_7/a_492_n240# vssa1 2.46fF **FLOATING +C3222 divbuf_21/OUT vssa1 363.82fF +C3223 divbuf_21/OUT5 vssa1 350.37fF +C3224 divbuf_21/OUT4 vssa1 133.72fF +C3225 divbuf_21/OUT3 vssa1 34.03fF +C3226 divbuf_21/OUT2 vssa1 8.71fF +C3227 divbuf_21/IN vssa1 0.89fF +C3228 divbuf_21/a_492_n240# vssa1 2.46fF **FLOATING +C3229 divbuf_20/OUT vssa1 363.82fF +C3230 divbuf_20/OUT5 vssa1 350.37fF +C3231 divbuf_20/OUT4 vssa1 133.72fF +C3232 divbuf_20/OUT3 vssa1 34.03fF +C3233 divbuf_20/OUT2 vssa1 8.71fF +C3234 divbuf_20/IN vssa1 0.89fF +C3235 divbuf_20/a_492_n240# vssa1 2.46fF **FLOATING +C3236 divbuf_10/OUT vssa1 363.82fF +C3237 divbuf_10/OUT5 vssa1 350.37fF +C3238 divbuf_10/OUT4 vssa1 133.72fF +C3239 divbuf_10/OUT3 vssa1 34.03fF +C3240 divbuf_10/OUT2 vssa1 8.71fF +C3241 divbuf_10/IN vssa1 0.89fF +C3242 divbuf_10/a_492_n240# vssa1 2.46fF **FLOATING +C3243 divbuf_6/OUT5 vssa1 350.37fF +C3244 divbuf_6/OUT4 vssa1 133.72fF +C3245 divbuf_6/OUT3 vssa1 34.03fF +C3246 divbuf_6/OUT2 vssa1 8.71fF +C3247 divbuf_6/IN vssa1 0.89fF +C3248 divbuf_6/a_492_n240# vssa1 2.46fF **FLOATING +C3249 divbuf_5/OUT5 vssa1 350.37fF +C3250 divbuf_5/OUT4 vssa1 133.72fF +C3251 divbuf_5/OUT3 vssa1 34.03fF +C3252 divbuf_5/OUT2 vssa1 8.71fF +C3253 divbuf_5/IN vssa1 0.89fF +C3254 divbuf_5/a_492_n240# vssa1 2.46fF **FLOATING +C3255 divbuf_4/OUT5 vssa1 350.37fF +C3256 divbuf_4/OUT4 vssa1 133.72fF +C3257 divbuf_4/OUT3 vssa1 34.03fF +C3258 divbuf_4/OUT2 vssa1 8.71fF +C3259 divbuf_4/IN vssa1 0.89fF +C3260 divbuf_4/a_492_n240# vssa1 2.46fF **FLOATING +C3261 divbuf_3/OUT5 vssa1 350.37fF +C3262 divbuf_3/OUT4 vssa1 133.72fF +C3263 divbuf_3/OUT3 vssa1 34.03fF +C3264 divbuf_3/OUT2 vssa1 8.71fF +C3265 divbuf_3/IN vssa1 0.89fF +C3266 divbuf_3/a_492_n240# vssa1 2.46fF **FLOATING +C3267 divbuf_2/OUT5 vssa1 350.37fF +C3268 divbuf_2/OUT4 vssa1 133.72fF +C3269 divbuf_2/OUT3 vssa1 34.03fF +C3270 divbuf_2/OUT2 vssa1 8.71fF +C3271 divbuf_2/IN vssa1 0.89fF +C3272 divbuf_2/a_492_n240# vssa1 2.46fF **FLOATING +C3273 divbuf_1/OUT vssa1 363.82fF +C3274 divbuf_1/OUT5 vssa1 350.37fF +C3275 divbuf_1/OUT4 vssa1 133.72fF +C3276 divbuf_1/OUT3 vssa1 34.03fF +C3277 divbuf_1/OUT2 vssa1 8.71fF +C3278 divbuf_1/IN vssa1 0.89fF +C3279 divbuf_1/a_492_n240# vssa1 2.46fF **FLOATING +C3280 ro_complete_1/cbank_2/v vssa1 16.43fF +C3281 ro_complete_1/cbank_2/switch_5/vin vssa1 0.78fF +C3282 ro_complete_1/cbank_2/switch_4/vin vssa1 1.50fF +C3283 ro_complete_1/cbank_2/switch_2/vin vssa1 1.30fF +C3284 ro_complete_1/cbank_2/switch_3/vin vssa1 0.56fF +C3285 ro_complete_1/cbank_2/switch_1/vin vssa1 1.14fF +C3286 ro_complete_1/cbank_2/switch_0/vin vssa1 1.02fF +C3287 ro_complete_1/cbank_1/v vssa1 16.43fF +C3288 ro_complete_1/cbank_1/switch_5/vin vssa1 0.78fF +C3289 ro_complete_1/a0 vssa1 5.35fF +C3290 ro_complete_1/cbank_1/switch_4/vin vssa1 1.50fF +C3291 ro_complete_1/a1 vssa1 6.54fF +C3292 ro_complete_1/cbank_1/switch_2/vin vssa1 1.30fF +C3293 ro_complete_1/a3 vssa1 5.96fF +C3294 ro_complete_1/cbank_1/switch_3/vin vssa1 0.56fF +C3295 ro_complete_1/a2 vssa1 5.21fF +C3296 ro_complete_1/cbank_1/switch_1/vin vssa1 1.14fF +C3297 ro_complete_1/a4 vssa1 5.81fF +C3298 ro_complete_1/cbank_1/switch_0/vin vssa1 1.02fF +C3299 ro_complete_1/a5 vssa1 6.74fF +C3300 ro_complete_1/cbank_0/v vssa1 15.12fF +C3301 ro_complete_1/cbank_0/switch_5/vin vssa1 0.78fF +C3302 ro_complete_1/cbank_0/switch_4/vin vssa1 1.50fF +C3303 ro_complete_1/cbank_0/switch_2/vin vssa1 1.30fF +C3304 ro_complete_1/cbank_0/switch_3/vin vssa1 0.56fF +C3305 ro_complete_1/cbank_0/switch_1/vin vssa1 1.14fF +C3306 ro_complete_1/cbank_0/switch_0/vin vssa1 1.02fF +C3307 ro_complete_1/ro_var_extend_0/vcont vssa1 0.27fF +C3308 divbuf_0/OUT vssa1 363.82fF +C3309 divbuf_0/OUT5 vssa1 350.37fF +C3310 divbuf_0/OUT4 vssa1 133.72fF +C3311 divbuf_0/OUT3 vssa1 34.03fF +C3312 divbuf_0/OUT2 vssa1 8.71fF +C3313 divbuf_0/IN vssa1 0.89fF +C3314 divbuf_0/a_492_n240# vssa1 2.46fF **FLOATING +C3315 ro_complete_0/cbank_2/v vssa1 16.43fF +C3316 ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF +C3317 ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF +C3318 ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF +C3319 ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF +C3320 ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF +C3321 ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF +C3322 ro_complete_0/cbank_1/v vssa1 16.46fF +C3323 ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF +C3324 divbuf_7/OUT vssa1 405.76fF +C3325 ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF +C3326 divbuf_6/OUT vssa1 402.77fF +C3327 ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF +C3328 divbuf_3/OUT vssa1 394.74fF +C3329 ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF +C3330 divbuf_5/OUT vssa1 397.92fF +C3331 ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF +C3332 divbuf_4/OUT vssa1 391.26fF +C3333 ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF +C3334 divbuf_2/OUT vssa1 387.66fF +C3335 ro_complete_0/cbank_0/v vssa1 15.12fF +C3336 ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF +C3337 ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF +C3338 ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF +C3339 ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF +C3340 ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF +C3341 ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF +C3342 ro_complete_0/ro_var_extend_0/vcont vssa1 0.27fF +C3343 filter_0/v vssa1 477.90fF +C3344 filter_0/a_4216_n5230# vssa1 418.47fF **FLOATING +C3345 filter_0/a_4216_n2998# vssa1 1.03fF **FLOATING +C3346 cp_0/down vssa1 1.54fF +C3347 cp_0/vbias vssa1 2.41fF +C3348 cp_0/out vssa1 5.34fF +C3349 cp_0/upbar vssa1 1.50fF +C3350 cp_0/a_7110_n2840# vssa1 0.17fF **FLOATING +C3351 cp_0/a_3060_n2840# vssa1 1.71fF **FLOATING +C3352 cp_0/a_7110_0# vssa1 0.17fF **FLOATING +C3353 cp_0/a_6370_0# vssa1 0.40fF **FLOATING +C3354 cp_0/a_3060_0# vssa1 1.66fF **FLOATING +C3355 cp_0/a_1710_0# vssa1 5.89fF **FLOATING +C3356 cp_0/a_1710_n2840# vssa1 4.91fF **FLOATING +C3357 cp_0/a_10_n50# vssa1 2.96fF **FLOATING +C3358 pd_1/and_pd_0/Z1 vssa1 0.39fF +C3359 pd_1/and_pd_0/Out1 vssa1 2.22fF +C3360 pd_1/tspc_r_1/z5 vssa1 1.10fF +C3361 pd_1/tspc_r_1/Z4 vssa1 1.07fF +C3362 pd_1/tspc_r_1/Qbar vssa1 0.88fF +C3363 pd_1/tspc_r_1/Z2 vssa1 1.22fF +C3364 pd_1/tspc_r_1/Z1 vssa1 0.67fF +C3365 pd_1/UP vssa1 2.21fF +C3366 pd_1/tspc_r_1/Qbar1 vssa1 1.34fF +C3367 pd_1/tspc_r_1/Z3 vssa1 2.12fF +C3368 pd_1/REF vssa1 1.80fF +C3369 pd_1/tspc_r_0/z5 vssa1 1.10fF +C3370 pd_1/tspc_r_0/Z4 vssa1 1.07fF +C3371 pd_1/R vssa1 3.05fF +C3372 pd_1/tspc_r_0/Qbar vssa1 0.79fF +C3373 pd_1/tspc_r_0/Z2 vssa1 1.22fF +C3374 pd_1/tspc_r_0/Z1 vssa1 0.67fF +C3375 pd_1/DOWN vssa1 3.08fF +C3376 pd_1/tspc_r_0/Qbar1 vssa1 1.34fF +C3377 pd_1/tspc_r_0/Z3 vssa1 2.12fF +C3378 pd_1/DIV vssa1 1.82fF +C3379 pd_0/and_pd_0/Z1 vssa1 0.39fF +C3380 pd_0/and_pd_0/Out1 vssa1 2.22fF +C3381 pd_0/tspc_r_1/z5 vssa1 1.10fF +C3382 pd_0/tspc_r_1/Z4 vssa1 1.07fF +C3383 pd_0/tspc_r_1/Qbar vssa1 0.88fF +C3384 pd_0/tspc_r_1/Z2 vssa1 1.22fF +C3385 pd_0/tspc_r_1/Z1 vssa1 0.67fF +C3386 pd_0/UP vssa1 2.21fF +C3387 pd_0/tspc_r_1/Qbar1 vssa1 1.34fF +C3388 pd_0/tspc_r_1/Z3 vssa1 2.12fF +C3389 pd_0/REF vssa1 1.80fF +C3390 pd_0/tspc_r_0/z5 vssa1 1.10fF +C3391 pd_0/tspc_r_0/Z4 vssa1 1.07fF +C3392 pd_0/R vssa1 3.05fF +C3393 pd_0/tspc_r_0/Qbar vssa1 0.79fF +C3394 pd_0/tspc_r_0/Z2 vssa1 1.22fF +C3395 pd_0/tspc_r_0/Z1 vssa1 0.67fF +C3396 pd_0/DOWN vssa1 3.08fF +C3397 pd_0/tspc_r_0/Qbar1 vssa1 1.34fF +C3398 pd_0/tspc_r_0/Z3 vssa1 2.12fF +C3399 pd_0/DIV vssa1 1.82fF .ends