cp buffered
diff --git a/gds/user_analog_project_wrapper.gds.gz b/gds/user_analog_project_wrapper.gds.gz index 1fd4ca0..813ee3d 100644 --- a/gds/user_analog_project_wrapper.gds.gz +++ b/gds/user_analog_project_wrapper.gds.gz Binary files differ
diff --git a/mag/div_pd_buffered.mag b/mag/div_pd_buffered.mag new file mode 100644 index 0000000..532fc65 --- /dev/null +++ b/mag/div_pd_buffered.mag
@@ -0,0 +1,243 @@ +magic +tech sky130A +timestamp 1647810727 +<< locali >> +rect 5076 1340 5818 1489 +rect 4847 790 4958 799 +rect -384 575 55 722 +rect 4847 698 4859 790 +rect 4949 698 4958 790 +rect 4847 689 4958 698 +rect 5109 81 5851 230 +<< viali >> +rect 4859 698 4949 790 +<< metal1 >> +rect 7867 1139 7942 1144 +rect 7476 1114 7942 1139 +rect 7519 996 7545 997 +rect 7466 977 7545 996 +rect 4847 793 4958 799 +rect 4847 791 5351 793 +rect 4847 790 5493 791 +rect -480 730 -295 750 +rect -480 568 -467 730 +rect -308 568 -295 730 +rect 4847 698 4859 790 +rect 4949 702 5493 790 +rect 4949 698 5497 702 +rect 4847 689 4958 698 +rect 5316 697 5497 698 +rect 5425 583 5497 697 +rect 7519 653 7545 977 +rect -480 552 -295 568 +rect 5424 566 5497 583 +rect 5389 550 5534 566 +rect 5389 454 5403 550 +rect 5518 454 5534 550 +rect 5389 438 5534 454 +rect 7488 59 7560 653 +rect 2050 -94 4971 -84 +rect -520 -96 4971 -94 +rect 7485 -96 7565 59 +rect 7867 5 7942 1114 +rect -520 -100 7565 -96 +rect -525 -171 7565 -100 +rect 7865 -163 7945 5 +rect -525 -172 7557 -171 +rect -525 -188 32 -172 +rect 2050 -174 7557 -172 +rect 2050 -175 4971 -174 +rect -525 -2102 -380 -188 +rect -60 -316 29 -314 +rect -60 -318 4956 -316 +rect 7862 -318 7951 -163 +rect -60 -399 7951 -318 +rect -60 -402 7940 -399 +rect -60 -707 29 -402 +rect 2035 -404 7940 -402 +rect 2035 -407 4956 -404 +rect -143 -742 50 -707 +rect -143 -873 -108 -742 +rect 13 -873 50 -742 +rect -143 -897 50 -873 +rect -542 -2128 -354 -2102 +rect -542 -2252 -518 -2128 +rect -384 -2252 -354 -2128 +rect -542 -2273 -354 -2252 +<< via1 >> +rect -467 568 -308 730 +rect 5403 454 5518 550 +rect -108 -873 13 -742 +rect -518 -2252 -384 -2128 +<< metal2 >> +rect -590 6498 -406 6516 +rect -590 6365 -571 6498 +rect -425 6365 -406 6498 +rect -590 6349 -406 6365 +rect -552 1658 -444 6349 +rect -275 5109 -121 5121 +rect -275 4994 -259 5109 +rect -133 4994 -121 5109 +rect -275 4980 -121 4994 +rect -244 3039 -161 4980 +rect -42 3574 90 3586 +rect -42 3473 -30 3574 +rect 77 3473 90 3574 +rect -42 3463 90 3473 +rect 3 3188 48 3463 +rect 2229 3189 3802 3191 +rect 213 3188 5364 3189 +rect 3 3187 5364 3188 +rect 5594 3187 5648 3188 +rect 3 3138 5648 3187 +rect 3 3136 5364 3138 +rect 3 3134 259 3136 +rect 3791 3134 5364 3136 +rect -244 3037 252 3039 +rect -244 2978 361 3037 +rect -135 2976 361 2978 +rect 300 2099 358 2976 +rect -552 1568 7 1658 +rect -86 794 4 1568 +rect 5594 1220 5648 3138 +rect 5594 1145 5915 1220 +rect -86 791 258 794 +rect -480 730 -295 750 +rect -480 568 -467 730 +rect -308 568 -295 730 +rect -86 736 312 791 +rect -86 725 258 736 +rect -86 724 4 725 +rect -480 552 -295 568 +rect 5389 550 5534 566 +rect 5389 454 5403 550 +rect 5518 454 5534 550 +rect 5389 438 5534 454 +rect 5432 378 5502 438 +rect 5432 375 5616 378 +rect 5432 301 5918 375 +rect -143 -742 50 -707 +rect -143 -873 -108 -742 +rect 13 -873 50 -742 +rect -143 -897 50 -873 +rect -542 -2128 -354 -2102 +rect -542 -2252 -518 -2128 +rect -384 -2150 -354 -2128 +rect -384 -2244 56 -2150 +rect -384 -2252 -354 -2244 +rect -542 -2273 -354 -2252 +<< via2 >> +rect -571 6365 -425 6498 +rect -259 4994 -133 5109 +rect -30 3473 77 3574 +rect -467 568 -308 730 +<< metal3 >> +rect -590 6498 -406 6516 +rect -590 6365 -571 6498 +rect -425 6365 -406 6498 +rect -590 6349 -406 6365 +rect -275 5109 -121 5121 +rect -275 4994 -259 5109 +rect -133 4994 -121 5109 +rect -275 4980 -121 4994 +rect -42 3574 90 3586 +rect -42 3473 -30 3574 +rect 77 3473 90 3574 +rect -42 3463 90 3473 +rect -480 730 -295 750 +rect -480 568 -467 730 +rect -308 568 -295 730 +rect -480 552 -295 568 +<< via3 >> +rect -571 6365 -425 6498 +rect -259 4994 -133 5109 +rect -30 3473 77 3574 +rect -467 568 -308 730 +<< metal4 >> +rect -926 6659 308 6794 +rect -924 6016 -768 6659 +rect -590 6498 61 6532 +rect -590 6365 -571 6498 +rect -425 6365 61 6498 +rect -590 6349 61 6365 +rect -929 5424 -768 6016 +rect -929 5415 308 5424 +rect -926 5289 308 5415 +rect -924 4075 -768 5289 +rect -275 5109 63 5137 +rect -275 4994 -259 5109 +rect -133 4994 63 5109 +rect -275 4980 63 4994 +rect -570 4075 67 4078 +rect -924 3936 354 4075 +rect -924 3931 -287 3936 +rect -105 3931 354 3936 +rect -924 713 -768 3931 +rect -37 3586 86 3777 +rect -42 3574 90 3586 +rect -42 3473 -30 3574 +rect 77 3473 90 3574 +rect -42 3463 90 3473 +rect 4174 1459 5867 1465 +rect 4174 1414 5983 1459 +rect 8466 1421 8575 3429 +rect 4174 1403 5867 1414 +rect 7463 1369 8575 1421 +rect -480 730 -295 750 +rect -480 714 -467 730 +rect -559 713 -467 714 +rect -924 577 -467 713 +rect -924 -959 -768 577 +rect -559 573 -467 577 +rect -480 568 -467 573 +rect -308 568 -295 730 +rect -480 552 -295 568 +rect 8466 -612 8575 1369 +rect -924 -1134 329 -959 +rect -924 -2333 -768 -1134 +rect -947 -2508 293 -2333 +<< metal5 >> +rect 186 6072 404 6077 +rect 179 5655 414 6072 +rect 186 4503 404 4707 +rect 145 -1871 363 -1667 +use tapered_buf tapered_buf_4 +timestamp 1647784636 +transform 1 0 473 0 1 6893 +box -470 -910 43675 400 +use pd pd_1 +timestamp 1647810585 +transform 1 0 6015 0 1 779 +box -215 -855 1685 810 +use divider divider_0 +timestamp 1647769399 +transform 1 0 489 0 1 316 +box -490 -235 4690 2150 +use tapered_buf tapered_buf_1 +timestamp 1647784636 +transform 1 0 473 0 1 5523 +box -470 -910 43675 400 +use tapered_buf tapered_buf_0 +timestamp 1647784636 +transform 1 0 468 0 1 4170 +box -470 -910 43675 400 +use tapered_buf tapered_buf_3 +timestamp 1647784636 +transform 1 0 429 0 1 -2234 +box -470 -910 43675 400 +use tapered_buf tapered_buf_2 +timestamp 1647784636 +transform 1 0 434 0 1 -881 +box -470 -910 43675 400 +<< labels >> +rlabel space 40 -1345 40 -1345 1 up +rlabel space -14 -2692 -14 -2692 1 down +rlabel space 48 4207 48 4207 1 ref +rlabel space 64 5553 64 5553 1 div +rlabel space 64 6923 64 6923 1 div +rlabel space 18 6944 18 6944 1 clk +rlabel space 32 5564 32 5564 1 mc2 +rlabel space 13 4217 13 4217 1 ref +rlabel metal4 8501 2091 8501 2091 1 vdd! +rlabel metal4 -877 1968 -877 1968 1 gnd! +<< end >>
diff --git a/mag/divider_buffered.mag b/mag/divider_buffered.mag new file mode 100644 index 0000000..8aeefea --- /dev/null +++ b/mag/divider_buffered.mag
@@ -0,0 +1,122 @@ +magic +tech sky130A +timestamp 1647807579 +<< locali >> +rect 4852 699 4944 707 +rect 4852 625 4863 699 +rect 4938 625 4944 699 +rect 4852 616 4944 625 +<< viali >> +rect 4863 625 4938 699 +<< metal1 >> +rect 4852 706 4944 707 +rect 5296 706 5397 710 +rect 4852 699 5397 706 +rect 4852 625 4863 699 +rect 4938 625 5397 699 +rect 4852 619 5397 625 +rect 4852 616 4944 619 +rect 5296 -143 5397 619 +rect 2594 -145 5398 -143 +rect 778 -147 5398 -145 +rect -36 -251 5398 -147 +rect -36 -252 2709 -251 +rect -36 -314 40 -252 +rect -76 -336 79 -314 +rect -76 -455 -57 -336 +rect 60 -455 79 -336 +rect -76 -474 79 -455 +<< via1 >> +rect -57 -455 60 -336 +<< metal2 >> +rect -450 4267 -293 4290 +rect -450 4163 -430 4267 +rect -318 4163 -293 4267 +rect -450 4146 -293 4163 +rect -413 752 -333 4146 +rect -191 2951 -32 2961 +rect -191 2832 -174 2951 +rect -50 2832 -32 2951 +rect -191 2822 -32 2832 +rect -144 2063 -69 2822 +rect -144 2009 479 2063 +rect -413 733 -320 752 +rect -413 650 320 733 +rect -413 648 235 650 +rect -76 -336 79 -314 +rect -76 -455 -57 -336 +rect 60 -455 79 -336 +rect -76 -474 79 -455 +rect -38 -653 38 -474 +<< via2 >> +rect -430 4163 -318 4267 +rect -174 2832 -50 2951 +<< metal3 >> +rect -450 4267 -293 4290 +rect -450 4163 -430 4267 +rect -318 4163 -293 4267 +rect -450 4146 -293 4163 +rect -191 2951 -32 2961 +rect -191 2832 -174 2951 +rect -50 2832 -32 2951 +rect -191 2822 -32 2832 +<< via3 >> +rect -430 4163 -318 4267 +rect -174 2832 -50 2951 +<< metal4 >> +rect -746 4424 342 4590 +rect -736 3260 -610 4424 +rect -450 4275 -293 4290 +rect -453 4267 63 4275 +rect -453 4163 -430 4267 +rect -318 4163 63 4267 +rect -453 4151 63 4163 +rect -450 4146 -293 4151 +rect -736 3094 377 3260 +rect -736 -729 -610 3094 +rect -191 2959 -32 2961 +rect -198 2951 57 2959 +rect -198 2832 -174 2951 +rect -50 2832 57 2951 +rect -198 2813 57 2832 +rect 563 1476 707 1486 +rect 563 1355 566 1476 +rect 700 1355 707 1476 +rect 563 1332 707 1355 +rect -736 -895 367 -729 +<< via4 >> +rect 566 1355 700 1476 +<< metal5 >> +rect 185 3695 402 3856 +rect 68 2350 404 2569 +rect 69 1504 230 2350 +rect 69 1476 732 1504 +rect 69 1355 566 1476 +rect 700 1355 732 1476 +rect 69 1327 732 1355 +rect 69 389 230 1327 +rect 69 225 380 389 +rect 163 -293 380 225 +use tapered_buf tapered_buf_3 +timestamp 1647784636 +transform 1 0 447 0 1 -658 +box -470 -910 43675 400 +use tapered_buf tapered_buf_1 +timestamp 1647784636 +transform 1 0 472 0 1 4669 +box -470 -910 43675 400 +use tapered_buf tapered_buf_0 +timestamp 1647784636 +transform 1 0 473 0 1 3342 +box -470 -910 43675 400 +use divider divider_0 +timestamp 1647769399 +transform 1 0 489 0 1 235 +box -490 -235 4690 2150 +<< labels >> +rlabel space 44 3384 44 3384 1 mc2 +rlabel space 24 4702 24 4702 1 clk +rlabel space 30 -1142 30 -1142 1 out +rlabel metal4 -691 1606 -691 1606 1 gnd! +rlabel metal5 195 2465 195 2465 1 vdd! +<< end >>
diff --git a/mag/user_analog_project_wrapper.mag b/mag/user_analog_project_wrapper.mag index 46acff1..70dbcd0 100644 --- a/mag/user_analog_project_wrapper.mag +++ b/mag/user_analog_project_wrapper.mag
@@ -1,6 +1,6 @@ magic tech sky130A -timestamp 1647806646 +timestamp 1647810892 << psubdiff >> rect 69510 340048 70875 340158 rect 69510 338866 69629 340048 @@ -1854,18 +1854,6 @@ rect 278241 178480 278360 179662 rect 279484 178480 279606 179662 rect 278241 178377 279606 178480 -rect 48527 173761 49892 173871 -rect 48527 172579 48646 173761 -rect 49770 172579 49892 173761 -rect 48527 172476 49892 172579 -rect 55444 173765 56809 173875 -rect 55444 172583 55563 173765 -rect 56687 172583 56809 173765 -rect 55444 172480 56809 172583 -rect 62409 173766 63774 173876 -rect 62409 172584 62528 173766 -rect 63652 172584 63774 173766 -rect 62409 172481 63774 172584 rect 69367 173767 70732 173877 rect 69367 172585 69486 173767 rect 70610 172585 70732 173767 @@ -1990,18 +1978,6 @@ rect 277956 172566 278075 173748 rect 279199 172566 279321 173748 rect 277956 172463 279321 172566 -rect 48635 167348 50000 167458 -rect 48635 166166 48754 167348 -rect 49878 166166 50000 167348 -rect 48635 166063 50000 166166 -rect 55552 167352 56917 167462 -rect 55552 166170 55671 167352 -rect 56795 166170 56917 167352 -rect 55552 166067 56917 166170 -rect 62517 167353 63882 167463 -rect 62517 166171 62636 167353 -rect 63760 166171 63882 167353 -rect 62517 166068 63882 166171 rect 69475 167354 70840 167464 rect 69475 166172 69594 167354 rect 70718 166172 70840 167354 @@ -3814,9 +3790,6 @@ rect 264266 178489 265390 179671 rect 271224 178490 272348 179672 rect 278360 178480 279484 179662 -rect 48646 172579 49770 173761 -rect 55563 172583 56687 173765 -rect 62528 172584 63652 173766 rect 69486 172585 70610 173767 rect 76403 172583 77527 173765 rect 83368 172584 84492 173766 @@ -3848,9 +3821,6 @@ rect 263981 172575 265105 173757 rect 270939 172576 272063 173758 rect 278075 172566 279199 173748 -rect 48754 166166 49878 167348 -rect 55671 166170 56795 167352 -rect 62636 166171 63760 167353 rect 69594 166172 70718 167354 rect 76511 166170 77635 167352 rect 83476 166171 84600 167353 @@ -5742,22 +5712,13 @@ rect 267266 175011 269360 176358 rect 232171 174249 234275 175011 rect 267228 174249 269360 175011 -rect 47149 174187 58627 174249 -rect 61148 174211 279732 174249 -rect 61148 174187 280775 174211 -rect 47149 173767 280775 174187 -rect 47149 173766 69486 173767 -rect 47149 173765 62528 173766 -rect 47149 173761 55563 173765 -rect 47149 172579 48646 173761 -rect 49770 172583 55563 173761 -rect 56687 172584 62528 173765 -rect 63652 172585 69486 173766 +rect 65177 174211 279732 174249 +rect 65177 173767 280775 174211 +rect 65177 172585 69486 173767 rect 70610 173766 90326 173767 rect 70610 173765 83368 173766 rect 70610 172585 76403 173765 -rect 63652 172584 76403 172585 -rect 56687 172583 76403 172584 +rect 65177 172583 76403 172585 rect 77527 172584 83368 173765 rect 84492 172585 90326 173766 rect 91450 173758 280775 173767 @@ -5773,8 +5734,7 @@ rect 91450 172585 97144 173746 rect 84492 172584 97144 172585 rect 77527 172583 97144 172584 -rect 49770 172579 97144 172583 -rect 47149 172564 97144 172579 +rect 65177 172564 97144 172583 rect 98268 172565 104109 173746 rect 105233 172566 111067 173747 rect 112191 173747 124952 173748 @@ -5796,7 +5756,7 @@ rect 126076 172566 164612 172567 rect 119111 172565 164612 172566 rect 98268 172564 164612 172565 -rect 47149 172537 164612 172564 +rect 65177 172537 164612 172564 rect 165878 172572 166632 173712 rect 167756 172573 173590 173754 rect 174714 173751 222078 173755 @@ -5836,38 +5796,20 @@ rect 181519 172566 278075 172567 rect 279199 172566 280775 173748 rect 165878 172537 280775 172566 -rect 47149 172161 280775 172537 -rect 47149 172142 279732 172161 -rect 36481 170918 38491 171031 -rect 36995 170522 37134 170918 -rect 37814 170522 37953 170918 -rect 36507 170409 38517 170522 -rect 36995 170126 37134 170409 -rect 37814 170126 37953 170409 -rect 36509 170013 38519 170126 -rect 36995 169779 37134 170013 -rect 37814 169779 37953 170013 -rect 36514 169666 38524 169779 -rect 58894 167836 60793 172142 +rect 65177 172161 280775 172537 +rect 65177 172142 279732 172161 rect 100674 167836 102830 172142 rect 141462 167836 143618 172142 rect 189886 167836 192042 172142 rect 232171 167836 234275 172142 rect 267228 167836 269360 172142 -rect 47149 167798 279840 167836 -rect 47149 167354 280883 167798 -rect 47149 167353 69594 167354 -rect 47149 167352 62636 167353 -rect 47149 167348 55671 167352 -rect 47149 166166 48754 167348 -rect 49878 166170 55671 167348 -rect 56795 166171 62636 167352 -rect 63760 166172 69594 167353 +rect 65177 167798 279840 167836 +rect 65177 167354 280883 167798 +rect 65177 166172 69594 167354 rect 70718 167353 90434 167354 rect 70718 167352 83476 167353 rect 70718 166172 76511 167352 -rect 63760 166171 76511 166172 -rect 56795 166170 76511 166171 +rect 65177 166170 76511 166172 rect 77635 166171 83476 167352 rect 84600 166172 90434 167353 rect 91558 167345 280883 167354 @@ -5883,8 +5825,7 @@ rect 91558 166172 97252 167333 rect 84600 166171 97252 166172 rect 77635 166170 97252 166171 -rect 49878 166166 97252 166170 -rect 47149 166151 97252 166166 +rect 65177 166151 97252 166170 rect 98376 166152 104217 167333 rect 105341 166153 111175 167334 rect 112299 167334 125060 167335 @@ -5906,7 +5847,7 @@ rect 126184 166153 164575 166154 rect 119219 166152 164575 166153 rect 98376 166151 164575 166152 -rect 47149 166135 164575 166151 +rect 65177 166135 164575 166151 rect 165841 166159 166740 167310 rect 167864 166160 173698 167341 rect 174822 167338 222186 167342 @@ -5946,9 +5887,8 @@ rect 181627 166153 278183 166154 rect 279307 166153 280883 167335 rect 165841 166135 280883 166153 -rect 47149 165748 280883 166135 -rect 47149 165729 279840 165748 -rect 58495 165708 60585 165729 +rect 65177 165748 280883 166135 +rect 65177 165729 279840 165748 rect 100432 164985 102830 165729 rect 141303 164985 143618 165729 rect 189638 164985 192042 165729 @@ -8743,19 +8683,6 @@ rect 164099 184723 166665 184864 rect 164097 183816 166665 184723 rect 164207 179637 166665 183816 -rect 35548 171266 35763 171272 -rect 35547 171142 38630 171266 -rect 27897 170817 32147 170839 -rect 35548 170825 35763 171142 -rect 27897 170816 28218 170817 -rect 27897 170624 27924 170816 -rect 28106 170625 28218 170816 -rect 28400 170625 32147 170817 -rect 28106 170624 32147 170625 -rect 27897 170608 32147 170624 -rect 32734 169146 33021 169470 -rect 32579 165000 33270 169146 -rect 62513 165000 64054 178904 rect 164207 178462 164752 179637 rect 166018 178462 166665 179637 rect 164207 178310 166665 178462 @@ -8767,12 +8694,18 @@ rect 165878 172537 166665 173712 rect 163922 172396 166665 172537 rect 163920 171489 166665 172396 +rect 10534 165067 10981 168538 rect 164030 167310 166665 171489 rect 164030 166135 164575 167310 rect 165841 166135 166665 167310 rect 164030 165983 166665 166135 +rect 10534 165029 11651 165067 +rect 9697 165000 12075 165029 +rect 32579 165000 33270 165217 +rect 62513 165000 64054 165233 rect 164028 165000 166665 165983 -rect 11000 163000 276000 165000 +rect 9697 163000 276000 165000 +rect 9697 162893 12075 163000 rect 164365 160826 166665 163000 rect 164148 160049 167097 160826 rect 164148 158874 164841 160049 @@ -8930,8 +8863,6 @@ rect 242652 242153 242787 242271 rect 242654 241983 242789 242101 rect 242651 241821 242786 241939 -rect 27924 170624 28106 170816 -rect 28218 170625 28400 170817 rect 244789 130459 244953 130625 rect 244999 130457 245163 130623 << metal5 >> @@ -9066,23 +8997,18 @@ rect 156786 185212 159452 187145 rect 156727 184950 159452 185212 rect 156727 183816 159393 184950 -rect 27342 177000 28458 178904 +rect 53308 181650 61449 181788 +rect 9572 179580 61449 181650 +rect 11699 178165 12054 179580 +rect 59103 176959 61380 179580 rect 156894 178799 159393 183816 rect 156835 177000 159393 178799 -rect 12000 175016 277000 177000 -rect 12000 175000 58627 175016 -rect 61148 175000 277000 175016 -rect 27364 171169 28450 175000 +rect 65177 176959 277000 177000 +rect 59103 175000 277000 176959 +rect 59103 174889 70417 175000 rect 156688 174818 159393 175000 rect 156609 172885 159393 174818 rect 156550 171489 159393 172885 -rect 27362 170817 28452 171169 -rect 27362 170816 28218 170817 -rect 27362 170624 27924 170816 -rect 28106 170625 28218 170816 -rect 28400 170625 28452 170817 -rect 28106 170624 28452 170625 -rect 27362 170528 28452 170624 rect 156717 166472 159393 171489 rect 156658 164985 159393 166472 rect 157052 160826 159393 164985 @@ -9172,18 +9098,18 @@ timestamp 1640983258 transform 1 0 38025 0 1 41313 box -1800 -11005 6240 390 -use pd pd_5 -timestamp 1647806551 -transform 1 0 38673 0 1 170517 -box -215 -855 1685 810 -use divider divider_3 -timestamp 1647769399 -transform 1 0 31863 0 1 169542 -box -490 -235 4690 2150 use divider divider_0 timestamp 1647769399 transform 1 0 246803 0 1 129340 box -490 -235 4690 2150 +use pd_buffered pd_buffered_0 +timestamp 1647806646 +transform 1 0 16753 0 1 228360 +box -947 -3144 44148 4358 +use cp_buffered cp_buffered_0 +timestamp 1647806434 +transform 1 0 13561 0 1 262981 +box -1398 -3598 44144 5451 use ro_complete ro_complete_0 timestamp 1647806551 transform 1 0 242309 0 1 239846 @@ -9200,14 +9126,10 @@ timestamp 1647806646 transform 1 0 237047 0 1 315756 box -2962 -10858 43775 10271 -use pd_buffered pd_buffered_0 -timestamp 1647806646 -transform 1 0 16753 0 1 228360 -box -947 -3144 44148 4358 -use cp_buffered cp_buffered_0 -timestamp 1647806434 -transform 1 0 13561 0 1 262981 -box -1398 -3598 44144 5451 +use div_pd_buffered div_pd_buffered_0 +timestamp 1647810892 +transform 1 0 11556 0 1 170913 +box -947 -3144 44148 7293 << labels >> flabel metal3 s 291760 134615 292400 134671 0 FreeSans 560 0 0 0 gpio_analog[0] port 0 nsew signal bidirectional
diff --git a/netgen/user_analog_project_wrapper.spice b/netgen/user_analog_project_wrapper.spice index dea611d..f8116a2 100644 --- a/netgen/user_analog_project_wrapper.spice +++ b/netgen/user_analog_project_wrapper.spice
@@ -106,1872 +106,1955 @@ + wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6] + wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3] + wbs_stb_i wbs_we_i -C0 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Qbar1 0.38fF -C1 pll_full_0/ref pll_full_0/pd_0/R 0.61fF -C2 divider_2/nor_1/B divider_2/and_0/B 0.31fF -C3 divider_0/and_0/out1 divider_0/and_0/A 0.01fF -C4 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF -C5 ro_complete_0/a2 ro_complete_0/cbank_2/v 0.05fF -C6 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF -C7 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/Z3 0.20fF -C8 divider_1/and_0/OUT divider_1/clk 0.04fF -C9 divider_2/prescaler_0/tspc_2/Z4 divider_2/prescaler_0/tspc_2/D 0.11fF -C10 divider_2/prescaler_0/m1_2700_2190# divider_2/clk 0.01fF -C11 ro_complete_buffered_0/tapered_buf_5/a_4670_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 29.21fF -C12 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.09fF -C13 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Q 0.04fF -C14 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.33fF -C15 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/vco 1.27fF -C16 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF -C17 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/clk 0.01fF -C18 divider_2/nor_1/B divider_2/nor_1/Z1 0.06fF -C19 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin ro_complete_buffered_0/tapered_buf_6/in 1.43fF -C20 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/tapered_buf_0/a_580_0# 0.35fF -C21 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/nor_1/A 0.15fF -C22 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF -C23 divider_2/nor_1/B divider_2/tspc_0/a_630_n680# 0.01fF -C24 divider_2/mc2 divider_2/prescaler_0/tspc_2/a_630_n680# 0.33fF -C25 divider_0/nor_1/A divider_0/prescaler_0/tspc_1/Q 0.03fF -C26 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.01fF -C27 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF -C28 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C29 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF -C30 pd_0/and_pd_0/Out1 pd_0/UP 0.33fF -C31 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF -C32 divider_1/tspc_1/Z2 divider_1/tspc_1/Z3 0.16fF -C33 divider_1/prescaler_0/m1_2700_2190# divider_1/and_0/OUT 0.14fF -C34 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF -C35 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z3 0.16fF -C36 divider_2/prescaler_0/tspc_0/Z4 divider_2/clk 0.12fF -C37 divider_2/prescaler_0/tspc_2/Z3 divider_2/clk 0.45fF -C38 divider_1/nor_1/B divider_1/nor_0/Z1 0.18fF -C39 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_1650_0# 1.27fF -C40 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/nor_0/B 0.47fF -C41 divider_1/nor_1/B divider_1/tspc_1/Q 0.51fF -C42 divider_0/mc2 divider_0/and_0/A 0.16fF -C43 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z3 0.11fF -C44 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.05fF -C45 gnd ro_complete_buffered_0/tapered_buf_1/a_4670_0# 82.48fF -C46 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF -C47 cp_buffered_0/cp_0/down cp_buffered_0/cp_0/a_1710_0# 0.32fF -C48 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/div 0.19fF -C49 divider_0/nor_1/A divider_0/tspc_0/Z2 0.23fF -C50 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z3 0.06fF -C51 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/vco 0.12fF -C52 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF -C53 divider_1/nor_1/A divider_1/prescaler_0/tspc_1/Q 0.03fF -C54 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/D 0.15fF -C55 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF -C56 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 0.84fF -C57 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_n10_n140# 0.05fF -C58 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Z4 0.65fF -C59 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z4 0.12fF -C60 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/out1 0.31fF -C61 pll_full_1/divider_0/tspc_1/Z4 pll_full_1/divider_0/tspc_0/Q 0.15fF -C62 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/cp_0/down 26.29fF -C63 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/tspc_r_1/z5 0.03fF -C64 pd_buffered_0/pd_0/tspc_r_1/Z2 pd_buffered_0/pd_0/R 0.21fF -C65 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/UP 0.03fF -C66 io_clamp_low[2] io_clamp_high[2] 0.53fF -C67 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF -C68 divider_1/nor_1/B divider_1/tspc_2/Z2 0.20fF -C69 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF -C70 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C71 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Q 0.04fF -C72 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF -C73 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF -C74 divider_0/nor_1/B divider_0/nor_1/A 1.21fF -C75 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF -C76 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF -C77 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF -C78 io_clamp_high[1] io_analog[5] 0.53fF -C79 pd_0/tspc_r_1/Qbar1 pd_0/R 0.01fF -C80 pd_0/DIV pd_0/tspc_r_1/Z4 0.02fF -C81 pd_0/DOWN pd_0/tspc_r_1/Qbar 0.21fF -C82 pll_full_1/ref pll_full_1/pd_0/tspc_r_0/Z1 0.17fF -C83 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/B 0.35fF -C84 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/vco 0.60fF -C85 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_1650_0# 2.89fF -C86 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_580_0# 0.02fF -C87 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF -C88 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.19fF -C89 divider_1/tspc_1/Q divider_1/tspc_2/Z3 0.45fF -C90 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_1/B 0.35fF -C91 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/vco 0.11fF -C92 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Q 0.04fF -C93 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z4 0.00fF -C94 divider_2/prescaler_0/tspc_1/Z3 divider_2/prescaler_0/tspc_1/Q 0.21fF -C95 divider_2/prescaler_0/tspc_1/Z2 divider_2/clk 0.11fF -C96 pd_buffered_0/tapered_buf_3/a_n10_n140# pd_buffered_0/tapered_buf_3/in 0.04fF -C97 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z2 0.71fF -C98 divider_2/and_0/B divider_2/and_0/Z1 0.07fF -C99 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z3 0.65fF -C100 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/and_0/B 0.29fF -C101 pd_buffered_0/tapered_buf_0/a_210_n610# pd_buffered_0/tapered_buf_0/a_160_n140# 0.22fF -C102 pd_buffered_0/tapered_buf_0/a_160_230# pd_buffered_0/tapered_buf_0/a_580_0# 0.02fF -C103 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C104 divider_0/nor_1/B divider_0/nor_0/B 0.47fF -C105 cp_buffered_0/tapered_buf_1/a_n10_n140# cp_buffered_0/tapered_buf_1/in 0.04fF -C106 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF -C107 pll_full_0/ro_complete_0/a1 pll_full_0/vco 0.11fF -C108 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/UP 0.03fF -C109 divider_1/mc2 divider_1/and_0/out1 0.06fF -C110 divider_1/tspc_0/Z2 divider_1/tspc_0/Z3 0.16fF -C111 divider_1/prescaler_0/tspc_1/Z2 divider_1/and_0/OUT 0.06fF -C112 pll_full_1/pd_0/UP pll_full_1/pd_0/R 0.46fF -C113 ro_complete_0/a0 ro_complete_0/cbank_1/v 0.05fF -C114 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/nor_1/B 0.06fF -C115 divider_1/tspc_2/Z2 divider_1/tspc_2/Z3 0.16fF -C116 divider_1/nor_0/B divider_1/tspc_2/Z4 0.22fF -C117 divider_0/tspc_0/Q divider_0/tspc_0/a_630_n680# 0.04fF -C118 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/and_0/OUT 0.05fF -C119 divider_2/prescaler_0/tspc_1/Z4 divider_2/clk 0.12fF -C120 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/tspc_r_0/Qbar 0.01fF -C121 divider_1/nor_1/B divider_1/tspc_1/Z3 0.38fF -C122 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z2 0.36fF -C123 pd_0/REF pd_0/tspc_r_0/Z4 0.02fF -C124 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF -C125 pll_full_0/pd_0/tspc_r_1/z5 pll_full_0/div 0.04fF -C126 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z2 0.01fF -C127 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin ro_complete_buffered_0/tapered_buf_6/in 1.30fF -C128 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/z5 0.11fF -C129 divider_2/nor_1/B divider_2/nor_1/A 1.21fF -C130 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z3 0.11fF -C131 cp_buffered_0/tapered_buf_0/a_4670_0# cp_buffered_0/tapered_buf_0/a_210_n610# 29.21fF -C132 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/a_160_230# 0.09fF -C133 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_0/Q 0.45fF -C134 divider_1/tspc_1/Z3 divider_1/tspc_1/Z4 0.65fF -C135 ro_complete_0/a2 ro_complete_0/cbank_0/switch_2/vin 0.14fF -C136 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a4 0.09fF -C137 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a5 0.09fF -C138 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.45fF -C139 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/v 0.05fF -C140 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_0/Qbar1 0.20fF -C141 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z4 0.08fF -C142 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/D 0.05fF -C143 divider_1/and_0/A divider_1/and_0/B 0.18fF -C144 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z2 0.14fF -C145 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z3 0.05fF -C146 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.32fF -C147 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/vco 0.01fF -C148 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 4.58fF -C149 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z2 0.21fF -C150 divider_2/tspc_2/a_630_n680# divider_2/nor_0/B 0.35fF -C151 divider_2/prescaler_0/tspc_1/Q divider_2/clk 0.60fF -C152 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.38fF -C153 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF -C154 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF -C155 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a3 3.17fF -C156 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF -C157 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF -C158 divider_0/nor_1/B divider_0/tspc_1/Z3 0.38fF -C159 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/a_630_n680# 0.12fF -C160 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF -C161 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF -C162 divider_0/nor_0/B divider_0/tspc_2/Z1 0.03fF -C163 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z3 0.16fF -C164 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/vco 0.12fF -C165 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_0/a_740_n680# 0.21fF -C166 divider_1/prescaler_0/tspc_2/D divider_1/prescaler_0/nand_0/z1 0.24fF -C167 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/clk 0.01fF -C168 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF -C169 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF -C170 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/and_0/B 0.18fF -C171 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.00fF -C172 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/z5 0.20fF -C173 divider_2/tspc_1/Z3 divider_2/tspc_1/a_630_n680# 0.05fF -C174 divider_2/tspc_0/Z3 divider_2/tspc_0/Z4 0.65fF -C175 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Q 0.38fF -C176 cp_buffered_0/tapered_buf_2/a_4670_0# cp_buffered_0/tapered_buf_2/a_210_n610# 29.21fF -C177 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z3 0.06fF -C178 pll_full_1/divider_0/nor_0/B pll_full_1/div 0.27fF -C179 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/UP 0.33fF -C180 pd_0/REF pd_0/tspc_r_0/Qbar1 0.12fF -C181 pd_buffered_0/tapered_buf_0/a_n10_230# pd_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF -C182 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF -C183 divider_1/nor_1/B divider_1/and_0/B 0.31fF -C184 divider_0/prescaler_0/Out divider_0/clk 0.51fF -C185 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF -C186 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/tspc_r_0/Qbar 0.05fF -C187 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF -C188 divider_0/prescaler_0/m1_2700_2190# divider_0/nor_1/A 0.01fF -C189 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF -C190 pd_0/DOWN pd_0/and_pd_0/Z1 0.07fF -C191 divider_1/prescaler_0/Out divider_1/clk 0.51fF -C192 divider_2/prescaler_0/Out divider_2/tspc_0/a_630_n680# 0.01fF -C193 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_1/Q 0.21fF -C194 divider_1/prescaler_0/tspc_2/D divider_1/clk 0.26fF -C195 ro_complete_0/a3 ro_complete_0/cbank_1/v 0.05fF -C196 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.12fF -C197 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/a_n10_n140# 0.01fF -C198 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_1/Q 0.51fF -C199 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z2 0.01fF -C200 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.05fF -C201 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.08fF -C202 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/in 0.02fF -C203 pll_full_0/pd_0/and_pd_0/Z1 pll_full_0/pd_0/UP 0.06fF -C204 cp_buffered_0/tapered_buf_2/a_160_n140# cp_buffered_0/tapered_buf_2/a_580_0# 0.35fF -C205 pd_buffered_0/tapered_buf_0/a_580_0# pd_buffered_0/tapered_buf_0/a_1650_0# 1.27fF -C206 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF -C207 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C208 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.08fF -C209 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF -C210 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF -C211 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/vco 0.14fF -C212 divider_1/prescaler_0/Out divider_1/prescaler_0/m1_2700_2190# 0.11fF -C213 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/clk 0.14fF -C214 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/D 0.03fF -C215 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF -C216 ro_complete_buffered_0/tapered_buf_2/a_4670_0# ro_complete_buffered_0/tapered_buf_2/a_1650_0# 4.78fF -C217 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/z5 0.04fF -C218 divider_1/tspc_1/Z2 divider_1/nor_1/A 0.15fF -C219 divider_1/tspc_0/Z2 divider_1/tspc_0/Z4 0.36fF -C220 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_2/D 0.16fF -C221 divider_2/tspc_0/Q divider_2/tspc_1/Z2 0.14fF -C222 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Z4 0.36fF -C223 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.11fF -C224 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/v 0.05fF -C225 ro_complete_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_6/a_4670_0# 4.78fF -C226 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.17fF -C227 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_2/Z2 0.20fF -C228 divider_2/prescaler_0/tspc_2/Z4 divider_2/clk 0.12fF -C229 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.03fF -C230 ro_complete_buffered_0/tapered_buf_1/in ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.19fF -C231 gnd ro_complete_buffered_0/ro_complete_0/a4 87.74fF -C232 ro_complete_buffered_0/tapered_buf_1/a_580_0# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 1.27fF -C233 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C234 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF -C235 pd_0/REF pd_0/R 0.61fF -C236 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/a_1710_0# 0.83fF -C237 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/tspc_r_0/Qbar 0.02fF -C238 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z2 0.15fF -C239 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF -C240 divider_0/nor_1/Z1 divider_0/and_0/B 0.18fF -C241 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C242 pd_0/tspc_r_0/Qbar1 pd_0/UP 0.11fF -C243 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF -C244 divider_0/nor_1/A divider_0/and_0/A 0.01fF -C245 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF -C246 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/D 0.05fF -C247 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF -C248 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF -C249 ro_complete_buffered_0/tapered_buf_4/a_4670_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 29.21fF -C250 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.09fF -C251 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF -C252 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF -C253 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/nor_1/B 1.21fF -C254 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/nor_0/B 0.06fF -C255 cp_buffered_0/tapered_buf_2/a_n10_230# cp_buffered_0/tapered_buf_2/a_160_230# 0.09fF -C256 pd_buffered_0/tapered_buf_1/a_580_0# pd_buffered_0/tapered_buf_1/a_160_n140# 0.35fF -C257 pd_buffered_0/pd_0/tspc_r_1/Z2 pd_buffered_0/pd_0/tspc_r_1/Z4 0.14fF -C258 pd_0/tspc_r_0/Z1 pd_0/tspc_r_0/Z2 0.71fF -C259 cp_buffered_0/cp_0/down cp_buffered_0/cp_0/out 0.79fF -C260 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_1/B 0.30fF -C261 divider_0/nor_1/B divider_0/tspc_1/Q 0.51fF -C262 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF -C263 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF -C264 pd_0/tspc_r_0/Qbar pd_0/and_pd_0/Z1 0.02fF -C265 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/z5 0.11fF -C266 io_clamp_low[0] io_analog[4] 0.53fF -C267 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF -C268 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF -C269 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/vco 0.05fF -C270 divider_1/tspc_1/Q divider_1/tspc_2/Z4 0.15fF -C271 divider_1/nor_1/A divider_1/and_0/A 0.01fF -C272 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.09fF -C273 pll_full_0/pd_0/DOWN pll_full_0/pd_0/R 0.36fF -C274 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Z4 0.65fF -C275 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_0/D 0.09fF -C276 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/and_0/OUT 0.14fF -C277 pll_full_1/divider_0/prescaler_0/Out pll_full_1/vco 0.51fF -C278 pd_buffered_0/tapered_buf_0/a_210_n610# pd_buffered_0/tapered_buf_0/a_1650_0# 2.89fF -C279 pd_buffered_0/tapered_buf_0/a_n10_230# pd_buffered_0/pd_0/UP 0.02fF -C280 cp_buffered_0/tapered_buf_1/a_210_n610# cp_buffered_0/cp_0/out 26.29fF -C281 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z2 0.19fF -C282 divider_0/nor_1/A divider_0/tspc_1/Z4 0.02fF -C283 divider_0/nor_1/B divider_0/tspc_2/Z2 0.20fF -C284 pd_0/R pd_0/UP 0.45fF -C285 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF -C286 divider_1/nor_1/Z1 divider_1/and_0/A 0.80fF -C287 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.35fF -C288 pll_full_1/cp_0/upbar pll_full_1/cp_0/down 0.02fF -C289 divider_2/prescaler_0/Out divider_2/nor_1/A 0.15fF -C290 divider_1/tspc_2/Z2 divider_1/tspc_2/Z4 0.36fF -C291 divider_1/tspc_2/Z3 divider_1/Out 0.05fF -C292 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.20fF -C293 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF -C294 divider_2/tspc_1/Q divider_2/tspc_2/a_630_n680# 0.01fF -C295 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/and_0/B 0.08fF -C296 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.20fF -C297 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.09fF -C298 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/vco 0.12fF -C299 cp_buffered_0/tapered_buf_2/a_4670_0# cp_buffered_0/tapered_buf_2/a_1650_0# 4.78fF -C300 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z4 0.20fF -C301 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF -C302 pd_buffered_0/pd_0/tspc_r_0/Z1 pd_buffered_0/pd_0/tspc_r_0/Z2 0.71fF -C303 divider_1/nor_1/B divider_1/nor_1/A 1.21fF -C304 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.84fF -C305 divider_1/tspc_0/Z1 divider_1/tspc_0/Z3 0.06fF -C306 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF -C307 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z3 0.05fF -C308 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.04fF -C309 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF -C310 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z4 0.28fF -C311 divider_0/tspc_1/Q divider_0/tspc_2/Z1 0.01fF -C312 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF -C313 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_0/B 0.00fF -C314 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF -C315 divider_1/nor_1/A divider_1/tspc_1/Z4 0.02fF -C316 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z3 0.06fF -C317 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_580_0# 0.35fF -C318 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/tspc_r_0/Qbar1 0.01fF -C319 divider_2/tspc_0/Q divider_2/tspc_1/Z4 0.15fF -C320 divider_2/tspc_0/Z1 divider_2/tspc_0/Z3 0.06fF -C321 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z3 0.05fF -C322 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z2 1.07fF -C323 pd_buffered_0/tapered_buf_2/a_n10_230# pd_buffered_0/tapered_buf_2/in 0.02fF -C324 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF -C325 divider_2/and_0/OUT divider_2/and_0/Z1 0.04fF -C326 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z2 0.01fF -C327 divider_2/prescaler_0/tspc_2/Q divider_2/clk 0.05fF -C328 divider_1/nor_1/B divider_1/nor_1/Z1 0.06fF -C329 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/B 0.31fF -C330 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.22fF -C331 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.04fF -C332 pd_buffered_0/pd_0/tspc_r_0/Z4 pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF -C333 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z1 0.17fF -C334 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/DOWN 0.11fF -C335 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Q 0.91fF -C336 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C337 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF -C338 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF -C339 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF -C340 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z4 0.01fF -C341 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/R 0.21fF -C342 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z1 0.03fF -C343 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF -C344 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C345 divider_2/mc2 divider_2/and_0/out1 0.06fF -C346 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Q 0.91fF -C347 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF -C348 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF -C349 divider_0/nor_0/B divider_0/tspc_2/Z3 0.38fF -C350 pd_0/DIV pd_0/tspc_r_1/Z3 0.65fF -C351 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF -C352 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF -C353 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C354 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/a3 0.09fF -C355 divider_1/tspc_1/a_630_n680# divider_1/nor_0/B 0.00fF -C356 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/Q 0.04fF -C357 divider_1/prescaler_0/tspc_1/Z3 divider_1/clk 0.45fF -C358 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF -C359 cp_buffered_0/tapered_buf_2/a_n10_230# cp_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF -C360 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_210_n610# 0.22fF -C361 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_160_230# 0.02fF -C362 divider_2/and_0/out1 divider_2/and_0/B 0.18fF -C363 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/in 0.02fF -C364 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z4 0.00fF -C365 divider_0/prescaler_0/Out divider_0/tspc_0/Z2 0.11fF -C366 ro_complete_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/a_1650_0# 2.89fF -C367 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.09fF -C368 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF -C369 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Q 0.15fF -C370 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/clk 0.01fF -C371 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF -C372 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Q 0.20fF -C373 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF -C374 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_210_n610# 0.22fF -C375 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_160_230# 0.02fF -C376 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF -C377 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF -C378 pll_full_0/ro_complete_0/a5 pll_full_0/vco 0.15fF -C379 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z3 0.65fF -C380 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z3 0.33fF -C381 divider_1/mc2 divider_1/nor_0/B 0.15fF -C382 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF -C383 pd_0/R pd_0/and_pd_0/Out1 0.33fF -C384 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF -C385 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C386 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/z5 0.11fF -C387 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z1 0.06fF -C388 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/Q 0.05fF -C389 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/clk 0.01fF -C390 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.12fF -C391 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 1.07fF -C392 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/vco 0.01fF -C393 pd_buffered_0/tapered_buf_0/a_1650_0# pd_buffered_0/tapered_buf_0/a_4670_0# 4.78fF -C394 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/m1_2700_2190# 0.19fF -C395 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/tapered_buf_6/in 0.05fF -C396 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF -C397 divider_0/nor_1/B divider_0/and_0/B 0.31fF -C398 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF -C399 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/tspc_r_0/Z1 0.71fF -C400 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z3 0.38fF -C401 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/nand_0/z1 0.07fF -C402 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF -C403 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.28fF -C404 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/a_630_n680# 0.19fF -C405 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 0.84fF -C406 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_n10_n140# 0.05fF -C407 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_580_0# 0.35fF -C408 pll_full_1/ro_complete_0/cbank_2/v pll_full_1/vco 1.36fF -C409 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/R 0.29fF -C410 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/R 0.01fF -C411 divider_0/tspc_0/Q divider_0/tspc_1/Z1 0.01fF -C412 gnd ro_complete_buffered_0/tapered_buf_1/a_160_n140# 1.34fF -C413 divider_1/tspc_0/Z1 divider_1/tspc_0/Z4 0.00fF -C414 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.45fF -C415 pll_full_1/pd_0/DOWN pll_full_1/ref 1.48fF -C416 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.01fF -C417 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF -C418 divider_0/and_0/OUT divider_0/clk 0.04fF -C419 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_0/B 0.22fF -C420 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF -C421 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/vco 0.01fF -C422 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/Out 0.05fF -C423 divider_1/prescaler_0/tspc_2/Z4 divider_1/prescaler_0/tspc_2/D 0.11fF -C424 divider_1/prescaler_0/m1_2700_2190# divider_1/clk 0.01fF -C425 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/a_n10_n140# 0.01fF -C426 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/a_630_n680# 0.35fF -C427 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.91fF -C428 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C429 divider_2/tspc_0/Z1 divider_2/tspc_0/Z4 0.00fF -C430 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_580_0# 0.35fF -C431 io_clamp_low[1] io_clamp_high[1] 0.53fF -C432 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C433 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.12fF -C434 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF -C435 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C436 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/out 0.61fF -C437 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z2 0.23fF -C438 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF -C439 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/vco 1.46fF -C440 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF -C441 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF -C442 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z3 0.16fF -C443 pd_0/DOWN pd_0/tspc_r_1/z5 0.03fF -C444 pd_0/tspc_r_1/Z2 pd_0/R 0.21fF -C445 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/div 0.02fF -C446 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/div 0.04fF -C447 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z2 0.40fF -C448 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/vco 0.29fF -C449 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF -C450 divider_1/prescaler_0/tspc_2/Z3 divider_1/clk 0.45fF -C451 ro_complete_buffered_0/tapered_buf_3/a_160_230# ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.17fF -C452 ro_complete_buffered_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_3/a_n10_230# 0.02fF -C453 ro_complete_0/a4 ro_complete_0/cbank_1/v 0.05fF -C454 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.13fF -C455 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C456 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/a_630_n680# 0.01fF -C457 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF -C458 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_2/D 0.16fF -C459 pll_full_1/ro_complete_0/cbank_1/switch_2/vin pll_full_1/vco 1.46fF -C460 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/a_160_230# 0.09fF -C461 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF -C462 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF -C463 divider_0/tspc_0/Z3 divider_0/tspc_0/Z2 0.16fF -C464 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.14fF -C465 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/tapered_buf_6/in 0.05fF -C466 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/z5 0.11fF -C467 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z4 0.20fF -C468 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.04fF -C469 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF -C470 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/vco 1.27fF -C471 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Z4 0.65fF -C472 divider_2/prescaler_0/tspc_1/Z2 divider_2/prescaler_0/tspc_1/a_630_n680# 0.01fF -C473 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/nor_1/B 0.18fF -C474 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/v 0.05fF -C475 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF -C476 divider_2/tspc_1/Q divider_2/nor_0/B 0.22fF -C477 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_2/Q 0.19fF -C478 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/clk 0.01fF -C479 divider_0/prescaler_0/Out divider_0/prescaler_0/m1_2700_2190# 0.11fF -C480 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 2.89fF -C481 ro_complete_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.17fF -C482 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/tspc_r_0/z5 0.20fF -C483 pll_full_1/pd_0/tspc_r_1/Qbar pll_full_1/pd_0/DOWN 0.21fF -C484 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z3 0.05fF -C485 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z4 0.12fF -C486 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/nor_0/B 0.47fF -C487 divider_0/tspc_1/Q divider_0/tspc_2/Z3 0.45fF -C488 divider_0/tspc_0/Z4 divider_0/tspc_0/Z2 0.36fF -C489 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Q 0.04fF -C490 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z4 0.00fF -C491 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Q 0.21fF -C492 divider_1/prescaler_0/tspc_1/Z2 divider_1/clk 0.11fF -C493 divider_2/tspc_0/a_630_n680# divider_2/tspc_0/Z3 0.05fF -C494 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Z4 0.12fF -C495 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/Z2 1.07fF -C496 divider_1/and_0/B divider_1/and_0/Z1 0.07fF -C497 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_1650_0# 1.27fF -C498 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z3 0.16fF -C499 pll_full_1/ro_complete_0/cbank_2/switch_2/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF -C500 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.01fF -C501 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/vco 0.11fF -C502 divider_2/tspc_2/a_630_n680# divider_2/Out 0.04fF -C503 divider_2/nor_0/B divider_2/tspc_2/Z2 0.40fF -C504 divider_2/prescaler_0/tspc_0/D divider_2/clk 0.29fF -C505 divider_0/tspc_0/Q divider_0/nor_1/A 0.55fF -C506 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF -C507 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF -C508 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a1 3.18fF -C509 pd_buffered_0/tapered_buf_1/a_160_230# pd_buffered_0/tapered_buf_1/a_160_n140# 0.17fF -C510 pd_buffered_0/pd_0/tspc_r_0/z5 pd_buffered_0/pd_0/tspc_r_1/z5 0.02fF -C511 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z2 0.25fF -C512 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/tspc_r_1/Z1 0.71fF -C513 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Q 0.04fF -C514 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z2 0.36fF -C515 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C516 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Qbar1 0.38fF -C517 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF -C518 pll_full_0/divider_0/tspc_1/Z4 pll_full_0/divider_0/tspc_0/Q 0.15fF -C519 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF -C520 divider_0/nor_0/B divider_0/tspc_2/Z4 0.22fF -C521 divider_1/prescaler_0/tspc_1/Z4 divider_1/clk 0.12fF -C522 ro_complete_0/a5 ro_complete_0/cbank_1/switch_0/vin 0.09fF -C523 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF -C524 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF -C525 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z3 0.33fF -C526 divider_2/prescaler_0/tspc_1/a_630_n680# divider_2/prescaler_0/tspc_1/Q 0.04fF -C527 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF -C528 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/Out 0.05fF -C529 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/and_0/B 0.78fF -C530 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/in 0.19fF -C531 pd_buffered_0/tapered_buf_3/a_1650_0# pd_buffered_0/tapered_buf_3/a_210_n610# 2.89fF -C532 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/divider_0/tspc_2/Z4 0.65fF -C533 pd_0/REF pd_0/tspc_r_0/Z1 0.17fF -C534 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/UP 1.06fF -C535 pll_full_1/pd_0/DOWN pll_full_1/pd_0/and_pd_0/Out1 0.12fF -C536 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF -C537 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/in 0.19fF -C538 cp_buffered_0/tapered_buf_1/a_1650_0# cp_buffered_0/tapered_buf_1/a_210_n610# 2.89fF -C539 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/ref 0.04fF -C540 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF -C541 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/vco 0.11fF -C542 divider_2/nor_1/B divider_2/tspc_0/Q 0.22fF -C543 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Q 0.04fF -C544 filter_0/a_4216_n2998# filter_0/v 0.36fF -C545 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.29fF -C546 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z2 0.25fF -C547 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF -C548 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z4 0.08fF -C549 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/D 0.03fF -C550 divider_0/and_0/A divider_0/and_0/B 0.18fF -C551 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/D 0.11fF -C552 divider_1/tspc_2/a_630_n680# divider_1/nor_0/B 0.35fF -C553 divider_1/prescaler_0/tspc_1/Q divider_1/clk 0.60fF -C554 ro_complete_0/a1 ro_complete_0/cbank_1/v 0.05fF -C555 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF -C556 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.09fF -C557 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/Z2 0.14fF -C558 ro_complete_buffered_0/tapered_buf_5/a_n10_n140# ro_complete_buffered_0/tapered_buf_5/in 0.04fF -C559 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.16fF -C560 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.12fF -C561 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_580_0# 0.35fF -C562 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF -C563 pd_0/tspc_r_0/Qbar1 pd_0/R 0.30fF -C564 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF -C565 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/z5 0.04fF -C566 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_0/z1 0.24fF -C567 divider_1/tspc_1/Z3 divider_1/tspc_1/a_630_n680# 0.05fF -C568 divider_1/tspc_0/Z3 divider_1/tspc_0/Z4 0.65fF -C569 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Q 0.38fF -C570 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.08fF -C571 pll_full_1/ro_complete_0/a1 pll_full_1/ro_complete_0/cbank_2/v 0.05fF -C572 pd_buffered_0/tapered_buf_2/a_580_0# pd_buffered_0/tapered_buf_2/a_1650_0# 1.27fF -C573 divider_2/and_0/OUT divider_2/and_0/out1 0.31fF -C574 ro_complete_buffered_0/tapered_buf_6/a_4670_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 29.21fF -C575 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.09fF -C576 divider_0/tspc_0/Q divider_0/tspc_1/Z3 0.45fF -C577 ro_complete_buffered_0/tapered_buf_1/a_1650_0# ro_complete_buffered_0/tapered_buf_1/a_4670_0# 4.78fF -C578 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C579 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/DOWN 0.07fF -C580 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z4 0.12fF -C581 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C582 ro_complete_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_2/in 0.19fF -C583 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z2 0.14fF -C584 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z3 0.05fF -C585 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF -C586 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/vco 0.01fF -C587 divider_2/mc2 divider_2/nor_0/B 0.15fF -C588 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.26fF -C589 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF -C590 divider_2/tspc_1/Z1 divider_2/tspc_1/Z3 0.06fF -C591 divider_2/tspc_0/a_630_n680# divider_2/tspc_0/Z4 0.12fF -C592 divider_2/tspc_0/Z3 divider_2/nor_1/A 0.38fF -C593 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.33fF -C594 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.09fF -C595 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/R 0.27fF -C596 divider_2/nor_0/B divider_2/and_0/B 0.29fF -C597 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_1650_0# 1.27fF -C598 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/B 0.01fF -C599 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF -C600 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF -C601 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/and_pd_0/Out1 0.12fF -C602 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/UP 0.21fF -C603 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z4 0.02fF -C604 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.18fF -C605 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF -C606 pd_0/tspc_r_1/Z2 pd_0/tspc_r_1/Z4 0.14fF -C607 pll_full_1/filter_0/a_4216_n5230# pll_full_1/vco 1.58fF -C608 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF -C609 pll_full_0/divider_0/nor_0/B pll_full_0/div 0.27fF -C610 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF -C611 divider_1/tspc_0/Q divider_1/tspc_1/Z2 0.14fF -C612 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z4 0.36fF -C613 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.84fF -C614 ro_complete_buffered_0/tapered_buf_3/a_n10_n140# ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.05fF -C615 ro_complete_0/a3 ro_complete_0/cbank_2/switch_2/vin 0.09fF -C616 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/a0 0.13fF -C617 divider_1/prescaler_0/tspc_2/Z4 divider_1/clk 0.12fF -C618 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF -C619 divider_2/prescaler_0/tspc_2/Z2 divider_2/and_0/OUT 0.05fF -C620 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/nand_0/z1 0.07fF -C621 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C622 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/in 0.04fF -C623 pd_buffered_0/tapered_buf_3/a_210_n610# pd_buffered_0/pd_0/REF 26.29fF -C624 pd_buffered_0/tapered_buf_2/a_210_n610# pd_buffered_0/pd_0/DIV 26.29fF -C625 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF -C626 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C627 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF -C628 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF -C629 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/UP 0.33fF -C630 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Q 0.51fF -C631 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z2 0.01fF -C632 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF -C633 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF -C634 divider_1/tspc_0/Z2 divider_1/nor_1/A 0.23fF -C635 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF -C636 divider_1/mc2 divider_1/and_0/B 0.20fF -C637 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF -C638 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z4 0.12fF -C639 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF -C640 divider_2/tspc_1/Q divider_2/tspc_2/Z2 0.14fF -C641 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/tspc_0/D 0.32fF -C642 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/clk 0.01fF -C643 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_0/Q 0.14fF -C644 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/vco 0.01fF -C645 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/DIV 0.51fF -C646 pd_buffered_0/tapered_buf_1/a_160_230# pd_buffered_0/tapered_buf_1/a_580_0# 0.02fF -C647 divider_0/mc2 divider_0/and_0/out1 0.06fF -C648 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_4670_0# 29.21fF -C649 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF -C650 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C651 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/DOWN 0.03fF -C652 divider_0/tspc_1/Q divider_0/tspc_2/Z4 0.15fF -C653 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF -C654 ro_complete_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_2/a_210_n610# 0.22fF -C655 cp_buffered_0/tapered_buf_0/a_n10_n140# cp_buffered_0/tapered_buf_0/in 0.04fF -C656 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z2 0.20fF -C657 divider_2/tspc_0/Z2 divider_2/prescaler_0/Out 0.11fF -C658 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Z4 0.65fF -C659 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_4670_0# 4.78fF -C660 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.20fF -C661 divider_2/tspc_2/Z1 divider_2/tspc_2/Z3 0.06fF -C662 divider_2/nor_0/B divider_2/Out 0.22fF -C663 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF -C664 pll_full_1/divider_0/and_0/OUT pll_full_1/div 0.01fF -C665 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/divider_0/prescaler_0/nand_1/z1 0.21fF -C666 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_580_0# 0.84fF -C667 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/and_pd_0/Out1 0.05fF -C668 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/tspc_r_1/Qbar 0.01fF -C669 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/R 0.27fF -C670 divider_0/tspc_0/a_630_n680# divider_0/nor_1/A 0.35fF -C671 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF -C672 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/UP 0.06fF -C673 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C674 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/nor_1/B 1.21fF -C675 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF -C676 divider_0/tspc_2/Z3 divider_0/Out 0.05fF -C677 pd_0/tspc_r_0/Z4 pd_0/tspc_r_1/Z4 0.02fF -C678 pd_0/DIV pd_0/tspc_r_1/Z1 0.17fF -C679 pd_0/tspc_r_1/Qbar1 pd_0/DOWN 0.11fF -C680 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.06fF -C681 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.09fF -C682 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C683 divider_1/tspc_1/Q divider_1/tspc_2/a_630_n680# 0.01fF -C684 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/vco 1.46fF -C685 divider_2/tspc_1/Z2 divider_2/tspc_1/Z4 0.36fF -C686 divider_2/tspc_1/Z3 divider_2/tspc_1/Q 0.05fF -C687 divider_2/nor_1/A divider_2/tspc_0/Z4 0.21fF -C688 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z3 0.05fF -C689 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Z4 0.08fF -C690 divider_1/nor_1/B divider_1/tspc_0/Q 0.22fF -C691 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF -C692 ro_complete_buffered_0/tapered_buf_0/a_160_230# ro_complete_buffered_0/tapered_buf_0/a_160_n140# 0.17fF -C693 ro_complete_buffered_0/tapered_buf_0/in ro_complete_buffered_0/tapered_buf_0/a_n10_230# 0.02fF -C694 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/tapered_buf_6/in 0.05fF -C695 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF -C696 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF -C697 pll_full_0/divider_0/prescaler_0/Out pll_full_0/vco 0.51fF -C698 divider_1/tspc_0/Q divider_1/tspc_1/Z4 0.15fF -C699 ro_complete_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_2/a_580_0# 1.27fF -C700 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C701 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z3 0.11fF -C702 divider_1/and_0/OUT divider_1/and_0/Z1 0.04fF -C703 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z2 0.01fF -C704 divider_1/prescaler_0/tspc_2/Q divider_1/clk 0.05fF -C705 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.36fF -C706 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/tspc_r_1/Qbar1 0.01fF -C707 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF -C708 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/Q 0.04fF -C709 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/B 0.08fF -C710 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF -C711 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF -C712 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/vco 0.12fF -C713 ro_complete_0/a2 ro_complete_0/cbank_1/switch_3/vin 0.09fF -C714 divider_2/tspc_0/Q divider_2/tspc_1/a_630_n680# 0.01fF -C715 divider_1/and_0/out1 divider_1/and_0/B 0.18fF -C716 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/a_n10_n140# 0.01fF -C717 pd_buffered_0/tapered_buf_2/a_1650_0# pd_buffered_0/tapered_buf_2/a_4670_0# 4.78fF -C718 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_160_230# 0.17fF -C719 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z2 0.71fF -C720 ro_complete_buffered_0/tapered_buf_1/a_580_0# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.35fF -C721 cp_buffered_0/cp_0/down cp_buffered_0/cp_0/upbar 0.02fF -C722 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_0/Qbar 0.02fF -C723 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF -C724 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Qbar1 0.38fF -C725 divider_1/mc2 divider_1/nor_1/A 0.04fF -C726 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/R 0.30fF -C727 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.31fF -C728 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF -C729 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF -C730 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z1 0.00fF -C731 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Q 0.05fF -C732 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF -C733 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_1/switch_1/vin 0.09fF -C734 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/a_630_n680# 0.05fF -C735 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/nor_1/B 0.03fF -C736 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.05fF -C737 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.08fF -C738 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z1 0.09fF -C739 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF -C740 divider_2/prescaler_0/Out divider_2/clk 0.51fF -C741 ro_complete_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_7/a_4670_0# 4.78fF -C742 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.17fF -C743 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF -C744 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C745 pd_buffered_0/pd_0/DOWN pd_buffered_0/tapered_buf_1/a_160_n140# 0.19fF -C746 io_clamp_low[0] io_clamp_high[0] 0.53fF -C747 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF -C748 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C749 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF -C750 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z1 0.06fF -C751 divider_1/prescaler_0/tspc_0/Z2 divider_1/and_0/OUT 0.06fF -C752 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF -C753 divider_2/prescaler_0/Out divider_2/prescaler_0/m1_2700_2190# 0.11fF -C754 ro_complete_0/a5 ro_complete_0/cbank_1/v 0.10fF -C755 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/a0 0.09fF -C756 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.20fF -C757 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF -C758 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 0.22fF -C759 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.02fF -C760 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/ro_complete_0/a2 26.29fF -C761 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF -C762 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.38fF -C763 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.11fF -C764 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/vco 1.46fF -C765 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/Q 0.20fF -C766 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/D 0.09fF -C767 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/Out 0.04fF -C768 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/A 0.01fF -C769 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/tspc_0/Q 0.05fF -C770 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/tapered_buf_6/in 0.05fF -C771 cp_buffered_0/tapered_buf_2/a_1650_0# cp_buffered_0/tapered_buf_2/a_580_0# 1.27fF -C772 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C773 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF -C774 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF -C775 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/vco 0.01fF -C776 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z2 1.07fF -C777 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF -C778 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF -C779 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z1 0.08fF -C780 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/v 0.08fF -C781 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.09fF -C782 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/vco 0.01fF -C783 divider_2/prescaler_0/tspc_1/Q divider_2/prescaler_0/nand_1/z1 0.22fF -C784 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/tspc_0/D 0.04fF -C785 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/ro_complete_0/a4 26.29fF -C786 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF -C787 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_1650_0# 2.89fF -C788 divider_1/tspc_0/Z1 divider_1/nor_1/A 0.03fF -C789 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF -C790 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/vco 1.36fF -C791 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.45fF -C792 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C793 divider_2/tspc_0/Z1 divider_2/nor_1/A 0.03fF -C794 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF -C795 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF -C796 divider_2/tspc_2/Z1 divider_2/tspc_2/Z4 0.00fF -C797 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a3 2.04fF -C798 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/R 0.36fF -C799 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z4 0.20fF -C800 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF -C801 pd_buffered_0/pd_0/tspc_r_1/Z1 pd_buffered_0/pd_0/tspc_r_1/Z2 0.71fF -C802 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z2 0.25fF -C803 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/ref 0.02fF -C804 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/a_630_n680# 0.35fF -C805 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF -C806 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C807 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF -C808 pd_0/tspc_r_0/z5 pd_0/tspc_r_1/z5 0.02fF -C809 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z2 0.25fF -C810 io_clamp_high[2] io_analog[6] 0.53fF -C811 pll_full_1/pd_0/tspc_r_0/Qbar pll_full_1/pd_0/UP 0.21fF -C812 divider_2/mc2 divider_2/and_0/B 0.20fF -C813 divider_1/mc2 divider_1/and_0/OUT 0.05fF -C814 divider_1/nor_0/Z1 divider_1/nor_0/B 0.06fF -C815 ro_complete_0/a2 ro_complete_0/cbank_1/v 0.05fF -C816 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z2 0.19fF -C817 divider_1/tspc_1/Q divider_1/nor_0/B 0.22fF -C818 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_2/Q 0.19fF -C819 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/clk 0.01fF -C820 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/Qbar 0.01fF -C821 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z4 0.12fF -C822 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z2 1.07fF -C823 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z4 0.36fF -C824 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Q 0.05fF -C825 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/tapered_buf_3/in 0.02fF -C826 divider_0/mc2 divider_0/nor_1/A 0.04fF -C827 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/a0 3.46fF -C828 ro_complete_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/a_580_0# 0.84fF -C829 ro_complete_buffered_0/tapered_buf_0/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/a_160_n140# 0.05fF -C830 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF -C831 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF -C832 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C833 divider_2/nor_1/B divider_2/nor_0/Z1 0.18fF -C834 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_2/D 0.16fF -C835 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/in 0.02fF -C836 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF -C837 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF -C838 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF -C839 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/vco 1.46fF -C840 ro_complete_buffered_0/tapered_buf_2/a_4670_0# ro_complete_buffered_0/tapered_buf_2/a_210_n610# 29.21fF -C841 pd_0/DOWN pd_0/UP 0.46fF -C842 divider_0/and_0/B divider_0/and_0/Z1 0.07fF -C843 ro_complete_buffered_0/tapered_buf_3/a_1650_0# ro_complete_buffered_0/tapered_buf_3/a_580_0# 1.27fF -C844 ro_complete_0/a0 ro_complete_0/cbank_2/switch_4/vin 0.13fF -C845 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF -C846 divider_2/nor_1/Z1 divider_2/and_0/B 0.18fF -C847 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z4 0.28fF -C848 divider_1/tspc_2/a_630_n680# divider_1/Out 0.04fF -C849 divider_1/nor_0/B divider_1/tspc_2/Z2 0.40fF -C850 divider_1/prescaler_0/tspc_0/D divider_1/clk 0.29fF -C851 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.36fF -C852 divider_0/tspc_0/Z3 divider_0/tspc_0/Q 0.05fF -C853 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z1 0.09fF -C854 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z2 0.19fF -C855 divider_0/mc2 divider_0/nor_0/B 0.15fF -C856 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/in 0.04fF -C857 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C858 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C859 divider_2/nor_1/B divider_2/tspc_1/Z2 0.30fF -C860 divider_1/prescaler_0/Out divider_1/tspc_0/Z2 0.11fF -C861 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/a_630_n680# 0.05fF -C862 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_210_n610# 0.22fF -C863 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_160_230# 0.02fF -C864 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C865 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z3 0.33fF -C866 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Q 0.91fF -C867 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/ro_complete_0/cbank_2/v 0.04fF -C868 pd_buffered_0/tapered_buf_2/a_580_0# pd_buffered_0/tapered_buf_2/a_210_n610# 0.84fF -C869 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_n10_n140# 0.05fF -C870 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF -C871 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_0/Q 0.01fF -C872 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_160_n140# 0.22fF -C873 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/R 0.03fF -C874 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF -C875 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/Out 0.05fF -C876 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z2 0.01fF -C877 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/upbar 0.29fF -C878 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF -C879 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C880 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/a_630_n680# 0.01fF -C881 divider_0/tspc_2/a_630_n680# divider_0/nor_0/B 0.35fF -C882 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF -C883 filter_0/a_4216_n5230# filter_0/v 0.91fF -C884 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF -C885 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/vco 0.11fF -C886 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C887 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/nor_1/B 0.38fF -C888 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z1 0.00fF -C889 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.12fF -C890 pll_full_1/ro_complete_0/a2 pll_full_1/vco 0.11fF -C891 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_580_0# 0.35fF -C892 divider_0/nor_0/Z1 divider_0/and_0/B 0.78fF -C893 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 0.84fF -C894 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_n10_n140# 0.05fF -C895 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z3 0.05fF -C896 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z1 0.03fF -C897 pd_buffered_0/pd_0/tspc_r_0/z5 pd_buffered_0/pd_0/UP 0.03fF -C898 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF -C899 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z3 0.33fF -C900 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF -C901 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_580_0# 0.35fF -C902 divider_2/nor_1/B divider_2/and_0/A 0.26fF -C903 pd_0/DOWN pd_0/and_pd_0/Out1 0.12fF -C904 pd_0/tspc_r_0/Qbar pd_0/UP 0.21fF -C905 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF -C906 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF -C907 divider_2/tspc_0/Z2 divider_2/tspc_0/Z3 0.16fF -C908 divider_1/and_0/OUT divider_1/and_0/out1 0.31fF -C909 divider_0/prescaler_0/Out divider_0/tspc_0/a_630_n680# 0.01fF -C910 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/a_740_n680# 0.08fF -C911 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/in 0.19fF -C912 ro_complete_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 2.89fF -C913 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar1 0.11fF -C914 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Q 0.04fF -C915 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.04fF -C916 pll_full_1/ro_complete_0/cbank_1/switch_0/vin pll_full_1/vco 1.58fF -C917 pd_buffered_0/tapered_buf_0/a_210_n610# pd_buffered_0/tapered_buf_0/out 26.29fF -C918 pd_buffered_0/tapered_buf_1/a_160_n140# pd_buffered_0/tapered_buf_1/a_n10_n140# 0.05fF -C919 pd_buffered_0/pd_0/and_pd_0/Z1 pd_buffered_0/pd_0/UP 0.06fF -C920 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF -C921 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF -C922 divider_2/mc2 divider_2/nor_1/A 0.04fF -C923 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF -C924 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/R 0.29fF -C925 divider_1/tspc_1/Z1 divider_1/tspc_1/Z3 0.06fF -C926 divider_1/tspc_0/Z3 divider_1/nor_1/A 0.38fF -C927 ro_complete_buffered_0/tapered_buf_2/a_n10_230# ro_complete_buffered_0/tapered_buf_2/in 0.02fF -C928 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/DOWN 0.02fF -C929 divider_2/tspc_0/Q divider_2/tspc_0/Z3 0.05fF -C930 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z3 0.06fF -C931 divider_1/nor_0/B divider_1/and_0/B 0.29fF -C932 divider_2/nor_1/A divider_2/and_0/B 0.08fF -C933 divider_2/prescaler_0/tspc_2/Q divider_2/prescaler_0/nand_1/z1 0.01fF -C934 divider_2/prescaler_0/tspc_2/Z2 divider_2/clk 0.11fF -C935 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z3 0.65fF -C936 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/D 0.03fF -C937 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z2 0.19fF -C938 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.22fF -C939 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a4 0.12fF -C940 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF -C941 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF -C942 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF -C943 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/div 0.17fF -C944 divider_1/tspc_0/a_630_n680# divider_1/nor_1/A 0.35fF -C945 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.35fF -C946 divider_2/nor_1/B divider_2/tspc_1/Z4 0.21fF -C947 divider_0/nor_1/A divider_0/tspc_0/Z1 0.03fF -C948 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF -C949 divider_1/prescaler_0/tspc_2/Z2 divider_1/and_0/OUT 0.05fF -C950 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF -C951 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF -C952 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 0.22fF -C953 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.02fF -C954 pll_full_1/ro_complete_0/cbank_2/switch_0/vin pll_full_1/ro_complete_0/cbank_2/v 1.45fF -C955 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF -C956 divider_2/tspc_0/a_630_n680# divider_2/nor_1/A 0.35fF -C957 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF -C958 divider_2/tspc_2/Z3 divider_2/tspc_2/Z4 0.65fF -C959 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/tspc_r_1/z5 0.20fF -C960 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF -C961 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C962 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF -C963 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF -C964 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF -C965 io_clamp_low[1] io_analog[5] 0.53fF -C966 pd_0/tspc_r_0/Qbar pd_0/and_pd_0/Out1 0.05fF -C967 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/Qbar 0.01fF -C968 pd_0/tspc_r_1/Z3 pd_0/R 0.27fF -C969 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF -C970 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/R 0.21fF -C971 divider_1/tspc_1/Q divider_1/tspc_2/Z2 0.14fF -C972 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_0/D 0.32fF -C973 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/clk 0.01fF -C974 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.14fF -C975 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C976 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.03fF -C977 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z2 0.36fF -C978 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF -C979 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z3 0.16fF -C980 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/Z2 0.14fF -C981 pll_full_1/div pll_full_1/vco 2.26fF -C982 pd_buffered_0/tapered_buf_0/a_160_230# pd_buffered_0/tapered_buf_0/a_160_n140# 0.17fF -C983 pd_buffered_0/pd_0/and_pd_0/Out1 pd_buffered_0/pd_0/and_pd_0/Z1 0.18fF -C984 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF -C985 pll_full_0/pd_0/R pll_full_0/div 0.51fF -C986 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_6/in 0.10fF -C987 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/a0 0.09fF -C988 cp_buffered_0/cp_0/upbar cp_buffered_0/tapered_buf_0/a_210_n610# 26.29fF -C989 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF -C990 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C991 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF -C992 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF -C993 divider_2/tspc_0/Z2 divider_2/tspc_0/Z4 0.36fF -C994 divider_1/tspc_2/Z1 divider_1/tspc_2/Z3 0.06fF -C995 divider_1/nor_0/B divider_1/Out 0.22fF -C996 divider_0/tspc_0/Z3 divider_0/tspc_0/a_630_n680# 0.05fF -C997 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Q 0.55fF -C998 pll_full_1/ro_complete_0/cbank_1/switch_5/vin pll_full_1/vco 1.46fF -C999 divider_1/nor_1/B divider_1/tspc_1/Z2 0.30fF -C1000 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z1 0.00fF -C1001 pd_buffered_0/tapered_buf_3/in pd_buffered_0/pd_0/DIV 0.02fF -C1002 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_1/B 0.18fF -C1003 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z4 0.12fF -C1004 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF -C1005 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/in 0.19fF -C1006 cp_buffered_0/tapered_buf_0/a_1650_0# cp_buffered_0/tapered_buf_0/a_210_n610# 2.89fF -C1007 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_0/Q 0.14fF -C1008 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/vco 0.01fF -C1009 divider_2/mc2 divider_2/and_0/OUT 0.05fF -C1010 divider_0/tspc_1/Q divider_0/tspc_2/a_630_n680# 0.01fF -C1011 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF -C1012 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF -C1013 divider_1/tspc_1/Z2 divider_1/tspc_1/Z4 0.36fF -C1014 divider_1/tspc_1/Z3 divider_1/tspc_1/Q 0.05fF -C1015 divider_1/nor_1/A divider_1/tspc_0/Z4 0.21fF -C1016 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z3 0.05fF -C1017 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z4 0.08fF -C1018 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF -C1019 pd_buffered_0/tapered_buf_2/a_4670_0# pd_buffered_0/tapered_buf_2/a_210_n610# 29.21fF -C1020 pd_buffered_0/tapered_buf_2/a_n10_230# pd_buffered_0/tapered_buf_2/a_160_230# 0.09fF -C1021 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z1 0.01fF -C1022 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/Q 0.22fF -C1023 divider_2/and_0/OUT divider_2/and_0/B 0.01fF -C1024 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z4 0.12fF -C1025 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF -C1026 cp_buffered_0/tapered_buf_2/in cp_buffered_0/tapered_buf_2/a_160_n140# 0.19fF -C1027 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.12fF -C1028 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF -C1029 divider_0/nor_1/B divider_0/tspc_1/Z2 0.30fF -C1030 pll_full_0/divider_0/and_0/OUT pll_full_0/div 0.01fF -C1031 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF -C1032 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF -C1033 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF -C1034 divider_0/prescaler_0/tspc_2/Q divider_0/clk 0.05fF -C1035 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/a_740_n680# 0.33fF -C1036 ro_complete_buffered_0/tapered_buf_3/a_n10_n140# ro_complete_buffered_0/tapered_buf_3/in 0.04fF -C1037 divider_2/tspc_1/Z2 divider_2/tspc_1/a_630_n680# 0.01fF -C1038 divider_2/prescaler_0/tspc_2/a_740_n680# divider_2/prescaler_0/tspc_2/a_630_n680# 0.19fF -C1039 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.16fF -C1040 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/and_0/A 0.80fF -C1041 pll_full_1/ro_complete_0/cbank_2/switch_5/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF -C1042 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_1650_0# 1.27fF -C1043 ro_complete_buffered_0/tapered_buf_7/a_4670_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 29.21fF -C1044 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.09fF -C1045 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z4 0.12fF -C1046 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z2 1.07fF -C1047 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z3 0.38fF -C1048 divider_1/nor_1/B divider_1/and_0/A 0.26fF -C1049 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.64fF -C1050 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/tapered_buf_6/in 1.30fF -C1051 pd_0/REF pd_0/tspc_r_0/Z3 0.65fF -C1052 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF -C1053 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF -C1054 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C1055 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_1650_0# 1.27fF -C1056 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.78fF -C1057 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/vco 1.46fF -C1058 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF -C1059 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/div 0.19fF -C1060 divider_1/tspc_0/Q divider_1/tspc_1/a_630_n680# 0.01fF -C1061 divider_1/prescaler_0/tspc_0/Z3 divider_1/clk 0.64fF -C1062 divider_1/nor_0/Z1 divider_1/and_0/B 0.78fF -C1063 divider_0/and_0/out1 divider_0/and_0/B 0.18fF -C1064 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z2 1.07fF -C1065 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF -C1066 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Z4 0.12fF -C1067 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z2 0.01fF -C1068 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z4 0.28fF -C1069 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/Z1 0.36fF -C1070 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_580_0# 1.27fF -C1071 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF -C1072 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/tapered_buf_6/in 1.27fF -C1073 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_0/Z2 0.14fF -C1074 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C1075 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/ref 0.12fF -C1076 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF -C1077 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Q 0.05fF -C1078 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF -C1079 divider_1/prescaler_0/tspc_0/Z2 divider_1/clk 0.11fF -C1080 divider_2/tspc_0/Q divider_2/tspc_1/Z1 0.01fF -C1081 divider_2/prescaler_0/tspc_1/Z1 divider_2/prescaler_0/tspc_1/Z4 0.00fF -C1082 ro_complete_0/a0 ro_complete_0/cbank_2/switch_5/vin 0.09fF -C1083 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.12fF -C1084 divider_2/prescaler_0/tspc_0/D divider_2/prescaler_0/nand_1/z1 0.21fF -C1085 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/nand_0/z1 0.01fF -C1086 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/vco 0.11fF -C1087 pd_buffered_0/tapered_buf_1/a_4670_0# pd_buffered_0/tapered_buf_1/a_1650_0# 4.78fF -C1088 pd_buffered_0/pd_0/tspc_r_0/Z4 pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF -C1089 divider_1/nor_1/B divider_1/tspc_1/Z4 0.21fF -C1090 divider_0/mc2 divider_0/and_0/B 0.20fF -C1091 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF -C1092 ro_complete_buffered_0/tapered_buf_6/a_n10_n140# ro_complete_buffered_0/tapered_buf_6/in 0.04fF -C1093 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_0/Z4 0.02fF -C1094 divider_0/nor_1/Z1 divider_0/and_0/A 0.80fF -C1095 cp_buffered_0/cp_0/a_10_n50# cp_buffered_0/cp_0/a_1710_0# 0.04fF -C1096 pd_0/tspc_r_0/Z3 pd_0/UP 0.03fF -C1097 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF -C1098 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C1099 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Q 0.20fF -C1100 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/D 0.09fF -C1101 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/in 0.19fF -C1102 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 2.89fF -C1103 divider_0/mc2 divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF -C1104 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/div 0.03fF -C1105 pll_full_1/divider_0/and_0/OUT pll_full_1/vco 0.06fF -C1106 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/UP 0.11fF -C1107 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/a_630_n680# 0.12fF -C1108 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF -C1109 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z3 0.09fF -C1110 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF -C1111 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF -C1112 pll_full_1/pd_0/DOWN pll_full_1/pd_0/UP 4.58fF -C1113 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/div 0.12fF -C1114 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/a_630_n680# 0.05fF -C1115 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/nor_1/B 0.03fF -C1116 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF -C1117 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF -C1118 pd_0/DOWN pd_0/R 0.36fF -C1119 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z4 0.20fF -C1120 pd_0/DIV pd_0/tspc_r_1/z5 0.04fF -C1121 pd_0/tspc_r_1/Z1 pd_0/tspc_r_1/Z2 0.71fF -C1122 pll_full_0/ref pll_full_0/pd_0/DOWN 1.48fF -C1123 divider_2/nor_1/B divider_2/tspc_2/Z4 0.02fF -C1124 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_4670_0# 29.21fF -C1125 ro_complete_buffered_0/tapered_buf_3/a_160_230# ro_complete_buffered_0/tapered_buf_3/a_n10_230# 0.09fF -C1126 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/switch_5/vin 0.20fF -C1127 divider_2/tspc_0/Z2 divider_2/tspc_0/Z1 1.07fF -C1128 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/nand_1/z1 0.22fF -C1129 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/tspc_0/D 0.04fF -C1130 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF -C1131 divider_2/tspc_1/a_630_n680# divider_2/tspc_1/Z4 0.12fF -C1132 divider_2/prescaler_0/tspc_2/Z2 divider_2/prescaler_0/tspc_2/Z4 0.36fF -C1133 divider_2/prescaler_0/tspc_0/Z1 divider_2/prescaler_0/tspc_0/D 0.03fF -C1134 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/vco 0.64fF -C1135 pd_buffered_0/tapered_buf_0/a_210_n610# pd_buffered_0/tapered_buf_0/a_580_0# 0.84fF -C1136 pd_buffered_0/tapered_buf_0/a_n10_n140# pd_buffered_0/tapered_buf_0/a_160_n140# 0.05fF -C1137 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C1138 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF -C1139 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z1 0.08fF -C1140 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF -C1141 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF -C1142 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/Qbar 0.01fF -C1143 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF -C1144 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF -C1145 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF -C1146 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/vco 1.46fF -C1147 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF -C1148 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Q 0.05fF -C1149 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.19fF -C1150 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF -C1151 divider_1/tspc_2/Z1 divider_1/tspc_2/Z4 0.00fF -C1152 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/a_740_n680# 0.08fF -C1153 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.15fF -C1154 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/and_0/A 0.01fF -C1155 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z4 0.02fF -C1156 ro_complete_buffered_0/tapered_buf_1/in gnd 0.04fF -C1157 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF -C1158 pd_0/REF pd_0/tspc_r_0/z5 0.04fF -C1159 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF -C1160 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF -C1161 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF -C1162 divider_1/prescaler_0/Out divider_1/tspc_0/Z3 0.45fF -C1163 divider_0/tspc_1/Q divider_0/nor_0/B 0.22fF -C1164 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/Q 0.19fF -C1165 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF -C1166 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/vco 0.01fF -C1167 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_2/in 0.04fF -C1168 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a1 0.14fF -C1169 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z4 0.12fF -C1170 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z2 1.07fF -C1171 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF -C1172 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z4 0.21fF -C1173 ro_complete_buffered_0/tapered_buf_6/a_210_n610# ro_complete_buffered_0/tapered_buf_6/out 26.29fF -C1174 pd_buffered_0/tapered_buf_2/a_n10_230# pd_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF -C1175 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z3 0.45fF -C1176 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Q 0.04fF -C1177 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/A 0.26fF -C1178 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/DOWN 0.03fF -C1179 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C1180 divider_1/tspc_0/a_630_n680# divider_1/prescaler_0/Out 0.01fF -C1181 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF -C1182 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF -C1183 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.22fF -C1184 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C1185 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_1/Q 0.13fF -C1186 divider_0/tspc_2/a_630_n680# divider_0/Out 0.04fF -C1187 divider_0/nor_0/B divider_0/tspc_2/Z2 0.40fF -C1188 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.29fF -C1189 pd_0/tspc_r_0/Qbar pd_0/R 0.03fF -C1190 ro_complete_0/a2 ro_complete_0/cbank_2/switch_2/vin 0.14fF -C1191 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_0/vin 0.19fF -C1192 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_4/vin 0.20fF -C1193 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_1/Z4 0.02fF -C1194 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.36fF -C1195 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/a_n10_n140# 0.01fF -C1196 pd_buffered_0/tapered_buf_3/a_1650_0# pd_buffered_0/tapered_buf_3/a_4670_0# 4.78fF -C1197 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_160_230# 0.17fF -C1198 divider_2/and_0/out1 divider_2/and_0/A 0.01fF -C1199 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z3 0.16fF -C1200 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z4 0.22fF -C1201 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF -C1202 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF -C1203 cp_buffered_0/tapered_buf_1/a_1650_0# cp_buffered_0/tapered_buf_1/a_4670_0# 4.78fF -C1204 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_160_230# 0.17fF -C1205 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF -C1206 divider_0/tspc_1/Z3 divider_0/tspc_1/Q 0.05fF -C1207 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.15fF -C1208 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF -C1209 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF -C1210 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Q 0.05fF -C1211 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF -C1212 pd_0/tspc_r_0/z5 pd_0/UP 0.03fF -C1213 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF -C1214 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z4 0.20fF -C1215 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/in 0.02fF -C1216 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_1/Z4 0.21fF -C1217 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF -C1218 pll_full_1/ro_complete_0/a0 pll_full_1/vco 0.11fF -C1219 pll_full_1/divider_0/and_0/A pll_full_1/divider_0/and_0/B 0.18fF -C1220 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/pd_0/UP 0.19fF -C1221 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF -C1222 divider_0/nor_1/B divider_0/and_0/A 0.26fF -C1223 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/UP 0.03fF -C1224 pd_0/and_pd_0/Z1 pd_0/UP 0.06fF -C1225 ro_complete_0/a0 ro_complete_0/cbank_2/v 0.05fF -C1226 divider_2/tspc_0/Q divider_2/tspc_1/Z3 0.45fF -C1227 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 0.22fF -C1228 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.02fF -C1229 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/divider_0/prescaler_0/nand_0/z1 0.24fF -C1230 divider_0/prescaler_0/Out divider_0/nor_1/A 0.15fF -C1231 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF -C1232 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a4 0.09fF -C1233 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a5 0.09fF -C1234 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/R 0.61fF -C1235 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF -C1236 divider_1/prescaler_0/Out divider_1/tspc_0/Z4 0.12fF -C1237 divider_0/nor_1/A divider_0/and_0/B 0.08fF -C1238 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF -C1239 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_0/Q 0.01fF -C1240 pll_full_0/cp_0/a_1710_0# pll_full_0/pd_0/DOWN 0.04fF -C1241 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Q 0.04fF -C1242 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF -C1243 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.13fF -C1244 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/vco 0.26fF -C1245 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/UP 0.03fF -C1246 divider_1/nor_1/B divider_1/tspc_2/Z4 0.02fF -C1247 ro_complete_buffered_0/tapered_buf_0/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/in 0.04fF -C1248 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C1249 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/nor_1/B 0.38fF -C1250 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z1 0.00fF -C1251 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF -C1252 pll_full_0/ro_complete_0/a2 pll_full_0/vco 0.11fF -C1253 divider_0/nor_1/B divider_0/tspc_1/Z4 0.21fF -C1254 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/z5 0.20fF -C1255 io_clamp_high[0] io_analog[4] 0.53fF -C1256 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/ref 0.65fF -C1257 divider_1/tspc_0/Q divider_1/tspc_0/Z3 0.05fF -C1258 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z3 0.06fF -C1259 divider_0/nor_0/B divider_0/and_0/B 0.29fF -C1260 pll_full_1/ref pll_full_1/pd_0/R 0.61fF -C1261 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF -C1262 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z1 0.03fF -C1263 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z3 0.25fF -C1264 divider_2/tspc_0/Z2 divider_2/tspc_0/a_630_n680# 0.01fF -C1265 divider_1/nor_1/A divider_1/and_0/B 0.08fF -C1266 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/nand_1/z1 0.01fF -C1267 divider_1/prescaler_0/tspc_2/Z2 divider_1/clk 0.11fF -C1268 ro_complete_buffered_0/tapered_buf_3/a_n10_n140# ro_complete_buffered_0/tapered_buf_3/a_n10_230# 0.01fF -C1269 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_580_0# 0.84fF -C1270 ro_complete_0/a4 ro_complete_0/cbank_2/switch_0/vin 0.12fF -C1271 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.09fF -C1272 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C1273 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_580_0# 0.35fF -C1274 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z3 0.45fF -C1275 pll_full_1/ro_complete_0/a3 pll_full_1/vco 0.11fF -C1276 divider_0/mc2 divider_0/and_0/OUT 0.05fF -C1277 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Q 0.04fF -C1278 divider_0/tspc_0/Z3 divider_0/tspc_0/Z1 0.06fF -C1279 pd_buffered_0/tapered_buf_0/a_210_n610# pd_buffered_0/tapered_buf_0/a_4670_0# 29.21fF -C1280 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/div 0.65fF -C1281 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF -C1282 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z4 0.20fF -C1283 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF -C1284 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/vco 1.58fF -C1285 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.05fF -C1286 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF -C1287 pd_0/and_pd_0/Out1 pd_0/and_pd_0/Z1 0.18fF -C1288 divider_1/nor_1/Z1 divider_1/and_0/B 0.18fF -C1289 divider_2/tspc_0/Q divider_2/tspc_0/a_630_n680# 0.04fF -C1290 divider_1/tspc_2/Z3 divider_1/tspc_2/Z4 0.65fF -C1291 ro_complete_0/a3 ro_complete_0/cbank_2/v 0.05fF -C1292 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.11fF -C1293 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/z5 0.03fF -C1294 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.05fF -C1295 divider_0/tspc_0/Q divider_0/tspc_1/a_630_n680# 0.01fF -C1296 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z4 0.01fF -C1297 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_4670_0# 29.21fF -C1298 pd_buffered_0/tapered_buf_1/a_160_230# pd_buffered_0/tapered_buf_1/a_n10_230# 0.09fF -C1299 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/z5 0.11fF -C1300 divider_1/prescaler_0/tspc_0/Z4 divider_1/clk 0.12fF -C1301 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF -C1302 ro_complete_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_2/a_160_230# 0.17fF -C1303 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/in 0.02fF -C1304 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z3 0.65fF -C1305 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF -C1306 divider_2/nor_1/B divider_2/tspc_1/a_630_n680# 0.35fF -C1307 divider_0/tspc_1/Q divider_0/tspc_2/Z2 0.14fF -C1308 divider_0/tspc_0/Z4 divider_0/tspc_0/Z1 0.00fF -C1309 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/D 0.32fF -C1310 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a1 0.14fF -C1311 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z3 0.16fF -C1312 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_1/switch_3/vin 0.09fF -C1313 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/div 0.65fF -C1314 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z3 0.06fF -C1315 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z2 0.11fF -C1316 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C1317 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z3 0.05fF -C1318 divider_2/nor_0/B divider_2/tspc_2/Z1 0.03fF -C1319 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z4 0.15fF -C1320 divider_0/tspc_0/Z3 divider_0/nor_1/A 0.38fF -C1321 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF -C1322 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a5 2.39fF -C1323 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C1324 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z1 0.09fF -C1325 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z2 0.19fF -C1326 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/div 0.02fF -C1327 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z1 0.00fF -C1328 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Qbar1 0.38fF -C1329 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.45fF -C1330 pd_0/DIV pd_0/tspc_r_1/Qbar1 0.12fF -C1331 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF -C1332 divider_0/nor_0/B divider_0/Out 0.22fF -C1333 ro_complete_0/a3 ro_complete_0/cbank_1/switch_2/vin 0.09fF -C1334 divider_2/prescaler_0/tspc_0/Z2 divider_2/and_0/OUT 0.06fF -C1335 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/clk 0.14fF -C1336 divider_2/nor_0/Z1 divider_2/nor_0/B 0.06fF -C1337 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/a_630_n680# 0.12fF -C1338 cp_buffered_0/tapered_buf_2/a_n10_230# cp_buffered_0/tapered_buf_2/in 0.02fF -C1339 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_210_n610# 0.84fF -C1340 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_n10_n140# 0.05fF -C1341 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/z5 0.04fF -C1342 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z4 0.36fF -C1343 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/div 0.05fF -C1344 ro_complete_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/a_4670_0# 29.21fF -C1345 ro_complete_buffered_0/tapered_buf_0/a_160_230# ro_complete_buffered_0/tapered_buf_0/a_n10_230# 0.09fF -C1346 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF -C1347 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C1348 divider_0/tspc_0/Z4 divider_0/nor_1/A 0.21fF -C1349 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF -C1350 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_210_n610# 0.84fF -C1351 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_n10_n140# 0.05fF -C1352 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF -C1353 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z2 0.36fF -C1354 pll_full_0/div pll_full_0/vco 2.26fF -C1355 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF -C1356 ro_complete_buffered_0/tapered_buf_3/a_1650_0# ro_complete_buffered_0/tapered_buf_3/a_4670_0# 4.78fF -C1357 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF -C1358 divider_2/tspc_0/Z2 divider_2/nor_1/A 0.23fF -C1359 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_0/Z2 0.16fF -C1360 divider_1/and_0/OUT divider_1/and_0/B 0.01fF -C1361 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF -C1362 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.09fF -C1363 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/DOWN 0.11fF -C1364 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF -C1365 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Z3 0.29fF -C1366 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/D 0.03fF -C1367 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.06fF -C1368 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z3 0.65fF -C1369 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/a_740_n680# 0.19fF -C1370 pd_0/tspc_r_0/Z3 pd_0/R 0.29fF -C1371 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_580_0# 0.35fF -C1372 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/R 0.33fF -C1373 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/tspc_r_0/Qbar 0.01fF -C1374 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Q 0.55fF -C1375 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/vco 1.46fF -C1376 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/a_740_n680# 0.08fF -C1377 divider_1/tspc_1/Z2 divider_1/tspc_1/a_630_n680# 0.01fF -C1378 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/a_630_n680# 0.19fF -C1379 divider_2/tspc_0/Q divider_2/nor_1/A 0.55fF -C1380 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF -C1381 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF -C1382 ro_complete_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 2.89fF -C1383 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_2/Z4 0.02fF -C1384 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF -C1385 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/vco 0.45fF -C1386 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_1650_0# 2.89fF -C1387 pd_buffered_0/tapered_buf_1/a_580_0# pd_buffered_0/tapered_buf_1/a_1650_0# 1.27fF -C1388 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/DOWN 0.02fF -C1389 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/R 0.30fF -C1390 divider_0/tspc_0/Q divider_0/tspc_1/Z2 0.14fF -C1391 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF -C1392 ro_complete_buffered_0/tapered_buf_6/in ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.36fF -C1393 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/R 0.27fF -C1394 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z2 1.07fF -C1395 ro_complete_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_2/a_n10_n140# 0.05fF -C1396 pd_0/tspc_r_0/Z4 pd_0/tspc_r_0/z5 0.04fF -C1397 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z1 0.01fF -C1398 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/Q 0.22fF -C1399 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF -C1400 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a3 0.09fF -C1401 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_4/vin 0.20fF -C1402 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/in 0.02fF -C1403 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.03fF -C1404 divider_2/tspc_1/Z1 divider_2/tspc_1/Z2 1.07fF -C1405 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF -C1406 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/UP 0.11fF -C1407 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF -C1408 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF -C1409 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C1410 cp_buffered_0/cp_0/a_1710_0# cp_buffered_0/cp_0/out 0.84fF -C1411 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/R 0.02fF -C1412 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF -C1413 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/A 0.80fF -C1414 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C1415 divider_1/tspc_0/Q divider_1/tspc_1/Z1 0.01fF -C1416 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z4 0.00fF -C1417 pll_full_1/pd_0/tspc_r_1/z5 pll_full_1/div 0.04fF -C1418 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF -C1419 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF -C1420 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z3 0.38fF -C1421 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.22fF -C1422 ro_complete_buffered_0/tapered_buf_3/a_160_230# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.02fF -C1423 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF -C1424 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF -C1425 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z2 0.01fF -C1426 divider_1/prescaler_0/tspc_0/D divider_1/prescaler_0/nand_1/z1 0.21fF -C1427 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_1650_0# 1.27fF -C1428 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/ro_complete_0/a3 26.29fF -C1429 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/UP 0.03fF -C1430 pd_buffered_0/tapered_buf_0/a_n10_n140# pd_buffered_0/pd_0/UP 0.04fF -C1431 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF -C1432 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_1/Q 0.21fF -C1433 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin ro_complete_buffered_0/tapered_buf_6/in 1.30fF -C1434 divider_0/nor_1/B divider_0/tspc_2/Z4 0.02fF -C1435 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF -C1436 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/z5 0.20fF -C1437 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF -C1438 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF -C1439 divider_1/mc2 divider_1/and_0/A 0.16fF -C1440 ro_complete_buffered_0/tapered_buf_2/a_160_n140# ro_complete_buffered_0/tapered_buf_2/a_580_0# 0.35fF -C1441 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a2 0.09fF -C1442 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF -C1443 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Z4 0.01fF -C1444 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_0/Q 0.01fF -C1445 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.11fF -C1446 divider_2/tspc_1/Q divider_2/tspc_2/Z1 0.01fF -C1447 divider_1/nor_1/B divider_1/tspc_1/a_630_n680# 0.35fF -C1448 divider_0/tspc_0/Q divider_0/nor_1/B 0.22fF -C1449 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/in 0.19fF -C1450 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF -C1451 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C1452 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF -C1453 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/tspc_0/D 0.04fF -C1454 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF -C1455 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF -C1456 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/vco 0.11fF -C1457 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z4 0.12fF -C1458 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z4 0.36fF -C1459 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF -C1460 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a4 0.12fF -C1461 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_3/vin 0.09fF -C1462 divider_2/prescaler_0/m1_2700_2190# divider_2/nor_1/A 0.01fF -C1463 divider_2/prescaler_0/tspc_0/a_740_n680# divider_2/prescaler_0/tspc_1/Q 0.15fF -C1464 divider_1/nor_1/B divider_1/mc2 0.06fF -C1465 pd_buffered_0/tapered_buf_2/a_n10_n140# pd_buffered_0/tapered_buf_2/in 0.04fF -C1466 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/vco 0.45fF -C1467 divider_2/tspc_2/a_630_n680# divider_2/tspc_2/Z4 0.12fF -C1468 divider_2/tspc_2/Z1 divider_2/tspc_2/Z2 1.07fF -C1469 divider_2/nor_0/B divider_2/tspc_2/Z3 0.38fF -C1470 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_160_n140# 0.22fF -C1471 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/R 0.51fF -C1472 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF -C1473 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF -C1474 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF -C1475 pll_full_1/pd_0/DOWN pll_full_1/cp_0/a_1710_0# 0.04fF -C1476 pll_full_0/filter_0/a_4216_n5230# pll_full_0/vco 1.58fF -C1477 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z3 0.65fF -C1478 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z4 0.14fF -C1479 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/D 0.05fF -C1480 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF -C1481 pd_0/tspc_r_1/Z3 pd_0/DOWN 0.03fF -C1482 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/div 0.03fF -C1483 pll_full_0/divider_0/and_0/OUT pll_full_0/vco 0.06fF -C1484 ro_complete_0/a3 ro_complete_0/cbank_2/switch_1/vin 0.13fF -C1485 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 1.07fF -C1486 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C1487 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF -C1488 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.65fF -C1489 pll_full_1/ro_complete_0/a4 pll_full_1/vco 0.01fF -C1490 divider_2/tspc_1/Z1 divider_2/tspc_1/Z4 0.00fF -C1491 divider_2/prescaler_0/tspc_2/a_630_n680# divider_2/prescaler_0/tspc_2/Z2 0.01fF -C1492 ro_complete_buffered_0/tapered_buf_7/a_n10_n140# ro_complete_buffered_0/tapered_buf_7/in 0.04fF -C1493 pd_buffered_0/tapered_buf_3/a_4670_0# pd_buffered_0/tapered_buf_3/a_210_n610# 29.21fF -C1494 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/tapered_buf_3/a_160_230# 0.09fF -C1495 divider_2/and_0/out1 divider_2/and_0/Z1 0.36fF -C1496 pd_0/REF pd_0/tspc_r_0/Z2 0.19fF -C1497 pd_buffered_0/pd_0/DOWN pd_buffered_0/tapered_buf_1/a_n10_n140# 0.04fF -C1498 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF -C1499 ro_complete_buffered_0/tapered_buf_0/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/a_n10_230# 0.01fF -C1500 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF -C1501 cp_buffered_0/tapered_buf_1/a_4670_0# cp_buffered_0/tapered_buf_1/a_210_n610# 29.21fF -C1502 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/a_160_230# 0.09fF -C1503 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/vco 0.64fF -C1504 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/D 0.09fF -C1505 pd_0/R pd_0/and_pd_0/Z1 0.02fF -C1506 ro_complete_0/a4 ro_complete_0/cbank_2/v 0.05fF -C1507 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF -C1508 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/nor_1/A 0.15fF -C1509 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/a0 0.09fF -C1510 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.00fF -C1511 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF -C1512 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Qbar1 0.30fF -C1513 divider_2/and_0/OUT divider_2/prescaler_0/nand_0/z1 0.01fF -C1514 pd_buffered_0/tapered_buf_1/out pd_buffered_0/tapered_buf_1/a_210_n610# 26.29fF -C1515 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.38fF -C1516 pll_full_1/divider_0/and_0/B pll_full_1/divider_0/and_0/Z1 0.07fF -C1517 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_0/z5 0.04fF -C1518 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF -C1519 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C1520 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C1521 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_1650_0# 1.27fF -C1522 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/R 0.21fF -C1523 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z2 0.25fF -C1524 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF -C1525 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/A 0.01fF -C1526 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/DOWN 0.03fF -C1527 divider_1/and_0/out1 divider_1/and_0/A 0.01fF -C1528 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF -C1529 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z3 0.06fF -C1530 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 pll_full_1/vco 0.12fF -C1531 divider_2/and_0/OUT divider_2/clk 0.04fF -C1532 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.06fF -C1533 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_580_0# 0.02fF -C1534 pd_buffered_0/tapered_buf_1/a_n10_230# pd_buffered_0/pd_0/DOWN 0.02fF -C1535 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z4 0.21fF -C1536 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z3 0.45fF -C1537 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Q 0.04fF -C1538 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/A 0.26fF -C1539 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF -C1540 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a3 0.13fF -C1541 divider_2/tspc_1/Z2 divider_2/tspc_1/Z3 0.16fF -C1542 divider_2/prescaler_0/m1_2700_2190# divider_2/and_0/OUT 0.14fF -C1543 divider_2/prescaler_0/tspc_0/Z3 divider_2/clk 0.64fF -C1544 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/a_630_n680# 0.01fF -C1545 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 1.07fF -C1546 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.05fF -C1547 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/nor_0/B 0.35fF -C1548 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/vco 0.60fF -C1549 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.21fF -C1550 pd_buffered_0/pd_0/tspc_r_1/Z4 pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF -C1551 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF -C1552 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z4 0.02fF -C1553 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF -C1554 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF -C1555 pll_full_1/pd_0/tspc_r_0/Qbar pll_full_1/pd_0/R 0.03fF -C1556 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF -C1557 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z4 0.22fF -C1558 divider_1/tspc_0/Q divider_1/tspc_1/Z3 0.45fF -C1559 ro_complete_buffered_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.19fF -C1560 ro_complete_0/a5 ro_complete_0/cbank_2/switch_0/vin 0.09fF -C1561 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/UP 0.21fF -C1562 divider_2/nor_1/A divider_2/prescaler_0/tspc_1/Q 0.03fF -C1563 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/D 0.15fF -C1564 divider_2/nor_0/Z1 divider_2/and_0/B 0.78fF -C1565 divider_0/nor_0/Z1 divider_0/nor_1/B 0.18fF -C1566 divider_0/prescaler_0/Out divider_0/tspc_0/Z3 0.45fF -C1567 ro_complete_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_5/a_4670_0# 4.78fF -C1568 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.17fF -C1569 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z2 1.07fF -C1570 pll_full_1/ro_complete_0/a1 pll_full_1/vco 0.11fF -C1571 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z3 0.05fF -C1572 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z2 0.01fF -C1573 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_4670_0# 4.78fF -C1574 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF -C1575 pd_buffered_0/pd_0/and_pd_0/Out1 pd_buffered_0/pd_0/UP 0.33fF -C1576 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/div 0.12fF -C1577 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z4 0.21fF -C1578 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF -C1579 pll_full_0/ro_complete_0/a0 pll_full_0/vco 0.11fF -C1580 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF -C1581 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF -C1582 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a2 0.09fF -C1583 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z1 0.09fF -C1584 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF -C1585 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z3 0.65fF -C1586 ro_complete_0/a1 ro_complete_0/cbank_2/v 0.05fF -C1587 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.13fF -C1588 divider_2/tspc_1/Q divider_2/tspc_2/Z3 0.45fF -C1589 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_0/Q 0.45fF -C1590 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_580_0# 0.84fF -C1591 pd_buffered_0/pd_0/tspc_r_0/Z2 pd_buffered_0/pd_0/tspc_r_0/Z4 0.14fF -C1592 divider_0/tspc_0/a_630_n680# divider_0/nor_1/B 0.01fF -C1593 divider_0/prescaler_0/Out divider_0/tspc_0/Z4 0.12fF -C1594 gnd ro_complete_buffered_0/tapered_buf_1/a_580_0# 5.71fF -C1595 pll_full_1/cp_0/down pll_full_1/cp_0/a_1710_0# 0.32fF -C1596 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF -C1597 divider_1/prescaler_0/Out divider_1/nor_1/A 0.15fF -C1598 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/nand_1/z1 0.01fF -C1599 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF -C1600 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_3/vin 0.09fF -C1601 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF -C1602 divider_2/prescaler_0/tspc_1/Z2 divider_2/and_0/OUT 0.06fF -C1603 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF -C1604 pll_full_1/pd_0/R pll_full_1/div 0.51fF -C1605 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/ref 0.17fF -C1606 divider_2/tspc_2/Z2 divider_2/tspc_2/Z3 0.16fF -C1607 divider_2/nor_0/B divider_2/tspc_2/Z4 0.22fF -C1608 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/tspc_0/Z3 0.16fF -C1609 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/vco 0.12fF -C1610 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/R 0.01fF -C1611 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF -C1612 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/tspc_r_1/Qbar 0.21fF -C1613 divider_0/tspc_0/Q divider_0/tspc_1/Z4 0.15fF -C1614 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF -C1615 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF -C1616 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C1617 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/a3 0.09fF -C1618 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z1 0.09fF -C1619 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF -C1620 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z1 0.09fF -C1621 pd_0/DIV pd_0/tspc_r_1/Z2 0.19fF -C1622 io_clamp_low[2] io_analog[6] 0.53fF -C1623 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/vco 0.26fF -C1624 divider_2/mc2 divider_2/and_0/A 0.16fF -C1625 divider_2/nor_1/B divider_2/nor_0/B 0.47fF -C1626 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF -C1627 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/a0 0.13fF -C1628 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.16fF -C1629 divider_2/prescaler_0/Out divider_2/prescaler_0/tspc_1/Z1 0.08fF -C1630 divider_2/tspc_1/Z3 divider_2/tspc_1/Z4 0.65fF -C1631 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z4 0.00fF -C1632 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF -C1633 divider_2/and_0/A divider_2/and_0/B 0.18fF -C1634 ro_complete_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/a_160_n140# 0.22fF -C1635 ro_complete_buffered_0/tapered_buf_0/a_160_230# ro_complete_buffered_0/tapered_buf_0/a_580_0# 0.02fF -C1636 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/tapered_buf_6/in 1.30fF -C1637 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF -C1638 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF -C1639 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF -C1640 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF -C1641 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF -C1642 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z3 0.45fF -C1643 pll_full_0/ro_complete_0/a3 pll_full_0/vco 0.11fF -C1644 ro_complete_buffered_0/tapered_buf_2/a_n10_230# ro_complete_buffered_0/tapered_buf_2/a_160_230# 0.09fF -C1645 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.43fF -C1646 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.00fF -C1647 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/v 0.05fF -C1648 divider_2/prescaler_0/Out divider_2/tspc_0/Z3 0.45fF -C1649 divider_2/nor_1/Z1 divider_2/and_0/A 0.80fF -C1650 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z3 0.05fF -C1651 divider_1/nor_0/B divider_1/tspc_2/Z1 0.03fF -C1652 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar1 0.01fF -C1653 divider_2/prescaler_0/tspc_2/D divider_2/prescaler_0/nand_0/z1 0.24fF -C1654 divider_2/prescaler_0/tspc_0/Z2 divider_2/clk 0.11fF -C1655 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.65fF -C1656 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/vco 0.14fF -C1657 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z1 0.17fF -C1658 pll_full_1/pd_0/tspc_r_1/z5 pll_full_1/pd_0/DOWN 0.03fF -C1659 ro_complete_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.02fF -C1660 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF -C1661 divider_2/nor_1/B divider_2/tspc_1/Z1 0.03fF -C1662 cp_buffered_0/tapered_buf_0/a_1650_0# cp_buffered_0/tapered_buf_0/a_4670_0# 4.78fF -C1663 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_160_230# 0.17fF -C1664 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF -C1665 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_1650_0# 2.89fF -C1666 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a4 0.12fF -C1667 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/switch_1/vin 0.19fF -C1668 divider_1/nor_1/B divider_1/tspc_0/a_630_n680# 0.01fF -C1669 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF -C1670 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_1/Z2 0.15fF -C1671 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/a_630_n680# 0.01fF -C1672 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/R 0.03fF -C1673 divider_2/prescaler_0/tspc_0/Z3 divider_2/prescaler_0/tspc_1/Q 0.13fF -C1674 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_210_n610# 0.22fF -C1675 pd_buffered_0/tapered_buf_2/a_580_0# pd_buffered_0/tapered_buf_2/a_160_230# 0.02fF -C1676 divider_2/prescaler_0/tspc_2/D divider_2/clk 0.26fF -C1677 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/a_630_n680# 0.01fF -C1678 pd_buffered_0/pd_0/tspc_r_0/Z2 pd_buffered_0/pd_0/R 0.21fF -C1679 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF -C1680 divider_2/prescaler_0/tspc_0/a_630_n680# divider_2/prescaler_0/tspc_0/Z2 0.01fF -C1681 divider_0/tspc_0/Z3 divider_0/tspc_0/Z4 0.65fF -C1682 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF -C1683 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z2 0.11fF -C1684 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF -C1685 divider_1/mc2 divider_1/prescaler_0/tspc_2/a_630_n680# 0.33fF -C1686 divider_0/and_0/OUT divider_0/and_0/B 0.01fF -C1687 pd_0/tspc_r_0/Qbar pd_0/DOWN 0.02fF -C1688 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z4 0.15fF -C1689 divider_2/prescaler_0/tspc_0/Z4 divider_2/prescaler_0/tspc_0/Z2 0.36fF -C1690 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/D 0.03fF -C1691 ro_complete_0/a4 ro_complete_0/cbank_2/switch_1/vin 0.09fF -C1692 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/nor_1/B 0.30fF -C1693 divider_2/tspc_1/Z2 divider_2/nor_1/A 0.15fF -C1694 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_2/D 0.16fF -C1695 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 0.22fF -C1696 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.02fF -C1697 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/Z1 0.04fF -C1698 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z2 0.01fF -C1699 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/vco 0.05fF -C1700 pd_buffered_0/tapered_buf_1/a_n10_230# pd_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF -C1701 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/and_pd_0/Z1 0.07fF -C1702 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF -C1703 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF -C1704 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z2 0.16fF -C1705 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/a_630_n680# 0.12fF -C1706 divider_1/tspc_0/Q divider_1/nor_1/A 0.55fF -C1707 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF -C1708 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/div 0.05fF -C1709 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF -C1710 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF -C1711 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 0.84fF -C1712 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_n10_n140# 0.05fF -C1713 divider_2/prescaler_0/tspc_2/Z3 divider_2/prescaler_0/tspc_2/D 0.05fF -C1714 ro_complete_buffered_0/tapered_buf_5/a_210_n610# ro_complete_buffered_0/ro_complete_0/a0 26.29fF -C1715 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/B 0.18fF -C1716 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF -C1717 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF -C1718 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/D 0.11fF -C1719 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C1720 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/tapered_buf_6/in 1.30fF -C1721 pd_0/tspc_r_0/Z2 pd_0/tspc_r_0/Z4 0.14fF -C1722 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF -C1723 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF -C1724 divider_1/tspc_1/Z1 divider_1/tspc_1/Z2 1.07fF -C1725 ro_complete_buffered_0/tapered_buf_2/a_n10_230# ro_complete_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF -C1726 divider_2/prescaler_0/Out divider_2/tspc_0/Z4 0.12fF -C1727 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF -C1728 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.19fF -C1729 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_580_0# 0.35fF -C1730 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_0/B 0.00fF -C1731 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.05fF -C1732 divider_2/tspc_1/Q divider_2/tspc_2/Z4 0.15fF -C1733 divider_2/nor_1/A divider_2/and_0/A 0.01fF -C1734 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z1 0.08fF -C1735 gnd ro_complete_buffered_0/tapered_buf_1/a_1650_0# 20.70fF -C1736 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/in 0.02fF -C1737 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_160_n140# 0.17fF -C1738 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF -C1739 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF -C1740 divider_2/nor_1/B divider_2/tspc_1/Q 0.51fF -C1741 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_1/z1 0.21fF -C1742 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/UP 0.11fF -C1743 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z4 0.02fF -C1744 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF -C1745 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/vco 0.45fF -C1746 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a3 0.13fF -C1747 ro_complete_0/a4 ro_complete_0/cbank_1/switch_1/vin 0.09fF -C1748 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.14fF -C1749 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a4 0.09fF -C1750 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a5 0.09fF -C1751 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/div 0.17fF -C1752 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.04fF -C1753 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.17fF -C1754 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z1 0.03fF -C1755 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.01fF -C1756 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF -C1757 divider_0/mc2 divider_0/nor_1/B 0.06fF -C1758 divider_2/tspc_2/Z2 divider_2/tspc_2/Z4 0.36fF -C1759 divider_2/tspc_2/Z3 divider_2/Out 0.05fF -C1760 divider_1/nor_1/B divider_1/nor_0/B 0.47fF -C1761 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF -C1762 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_0/a_210_n610# 26.29fF -C1763 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF -C1764 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF -C1765 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/z5 0.11fF -C1766 pll_full_1/pd_0/tspc_r_1/z5 pll_full_1/pd_0/tspc_r_0/z5 0.02fF -C1767 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF -C1768 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Qbar1 0.20fF -C1769 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF -C1770 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z2 0.19fF -C1771 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF -C1772 pd_0/DIV pd_0/R 0.51fF -C1773 divider_2/nor_1/B divider_2/tspc_2/Z2 0.20fF -C1774 divider_1/tspc_1/Q divider_1/tspc_2/Z1 0.01fF -C1775 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF -C1776 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/Out 0.05fF -C1777 divider_2/nor_1/A divider_2/tspc_1/Z4 0.02fF -C1778 divider_2/prescaler_0/tspc_0/Z2 divider_2/prescaler_0/tspc_1/Q 0.06fF -C1779 divider_2/prescaler_0/tspc_2/Z1 divider_2/prescaler_0/tspc_2/Z3 0.06fF -C1780 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Z4 0.65fF -C1781 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.15fF -C1782 pll_full_1/ro_complete_0/a5 pll_full_1/vco 0.15fF -C1783 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF -C1784 ro_complete_buffered_0/tapered_buf_0/in ro_complete_buffered_0/tapered_buf_0/a_160_n140# 0.19fF -C1785 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF -C1786 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/UP 0.45fF -C1787 divider_0/tspc_1/a_630_n680# divider_0/nor_0/B 0.00fF -C1788 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF -C1789 divider_1/prescaler_0/m1_2700_2190# divider_1/nor_1/A 0.01fF -C1790 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z2 0.25fF -C1791 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z4 0.12fF -C1792 divider_1/tspc_2/Z1 divider_1/tspc_2/Z2 1.07fF -C1793 divider_1/nor_0/B divider_1/tspc_2/Z3 0.38fF -C1794 ro_complete_0/a5 ro_complete_0/cbank_2/v 0.08fF -C1795 ro_complete_0/a0 ro_complete_0/cbank_1/switch_5/vin 0.09fF -C1796 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.65fF -C1797 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF -C1798 divider_2/tspc_1/a_630_n680# divider_2/nor_0/B 0.00fF -C1799 divider_2/and_0/OUT divider_2/prescaler_0/tspc_2/Q 0.04fF -C1800 divider_2/prescaler_0/tspc_1/Z3 divider_2/clk 0.45fF -C1801 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z3 0.38fF -C1802 divider_1/nor_1/B divider_1/tspc_1/Z1 0.03fF -C1803 ro_complete_buffered_0/tapered_buf_1/a_210_n610# gnd 212.43fF -C1804 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z2 0.25fF -C1805 divider_1/tspc_0/Z1 divider_1/tspc_0/Z2 1.07fF -C1806 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF -C1807 pd_0/tspc_r_0/Z2 pd_0/R 0.21fF -C1808 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_210_n610# 0.84fF -C1809 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF -C1810 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_0/Q 0.01fF -C1811 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF -C1812 divider_2/nor_1/B divider_2/tspc_1/Z3 0.38fF -C1813 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_0/a_630_n680# 0.04fF -C1814 divider_1/tspc_1/Z1 divider_1/tspc_1/Z4 0.00fF -C1815 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z2 0.01fF -C1816 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_0/Z3 0.11fF -C1817 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/tspc_1/Z3 0.33fF -C1818 divider_1/and_0/out1 divider_1/and_0/Z1 0.36fF -C1819 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF -C1820 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.01fF -C1821 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.09fF -C1822 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/in 0.19fF -C1823 pd_buffered_0/tapered_buf_2/a_1650_0# pd_buffered_0/tapered_buf_2/a_210_n610# 2.89fF -C1824 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/nor_0/B 0.22fF -C1825 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.19fF -C1826 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/vco 0.01fF -C1827 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/a_160_n140# 0.05fF -C1828 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z3 0.65fF -C1829 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF -C1830 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF -C1831 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/a_630_n680# 0.19fF -C1832 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z3 0.05fF -C1833 divider_0/nor_1/B divider_0/tspc_1/Z1 0.03fF -C1834 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/m1_2700_2190# 0.08fF -C1835 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/vco 0.45fF -C1836 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF -C1837 divider_1/and_0/OUT divider_1/prescaler_0/nand_0/z1 0.01fF -C1838 divider_2/prescaler_0/m1_2700_2190# divider_2/prescaler_0/nand_0/z1 0.07fF -C1839 ro_complete_buffered_0/tapered_buf_4/a_n10_n140# ro_complete_buffered_0/tapered_buf_4/in 0.04fF -C1840 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z2 0.23fF -C1841 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.06fF -C1842 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/vco 1.46fF -C1843 divider_2/mc2 divider_2/nor_1/B 0.06fF -C1844 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/in 0.19fF -C1845 ro_complete_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 2.89fF -C1846 ro_complete_buffered_0/tapered_buf_4/a_210_n610# ro_complete_buffered_0/ro_complete_0/a1 26.29fF -C1847 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/div 0.04fF -C1848 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z2 0.40fF -C1849 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/vco 0.29fF -C1850 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/Out 0.21fF -C1851 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF -C1852 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/tapered_buf_6/in 0.05fF -C1853 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF -C1854 pd_buffered_0/tapered_buf_0/a_n10_230# pd_buffered_0/tapered_buf_0/a_160_230# 0.09fF -C1855 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/and_pd_0/Out1 0.33fF -C1856 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/and_pd_0/Out1 0.18fF -C1857 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF -C1858 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF -C1859 divider_0/tspc_1/Z2 divider_0/nor_1/A 0.15fF -C1860 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF -C1861 pll_full_1/pd_0/DOWN pll_full_1/pd_0/R 0.36fF -C1862 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/ref 0.19fF -C1863 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF -C1864 pll_full_0/ro_complete_0/a4 pll_full_0/vco 0.01fF -C1865 pd_0/tspc_r_1/Z4 pd_0/tspc_r_1/z5 0.04fF +C0 divider_1/and_0/OUT divider_1/and_0/Z1 0.04fF +C1 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z2 0.01fF +C2 divider_1/prescaler_0/tspc_2/Q divider_1/clk 0.05fF +C3 ro_complete_buffered_0/tapered_buf_2/a_580_0# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.35fF +C4 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF +C5 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/DOWN 0.02fF +C6 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/R 0.30fF +C7 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.19fF +C8 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/nor_1/A 0.15fF +C9 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/and_0/A 0.80fF +C10 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/R 0.36fF +C11 pd_buffered_0/pd_0/tspc_r_1/Z1 pd_buffered_0/pd_0/tspc_r_1/Z2 0.71fF +C12 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z4 0.20fF +C13 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF +C14 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_0/B 0.00fF +C15 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.05fF +C16 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/Q 0.04fF +C17 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a4 0.12fF +C18 ro_complete_0/a2 ro_complete_0/cbank_0/switch_3/vin 0.09fF +C19 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C20 div_pd_buffered_0/tapered_buf_2/a_160_230# div_pd_buffered_0/tapered_buf_2/a_160_n140# 0.17fF +C21 div_pd_buffered_0/tapered_buf_2/a_210_n610# div_pd_buffered_0/tapered_buf_2/a_1650_0# 2.89fF +C22 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/z5 0.04fF +C23 divider_1/nor_1/B divider_1/tspc_0/a_630_n680# 0.01fF +C24 divider_1/and_0/out1 divider_1/and_0/B 0.18fF +C25 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z4 0.02fF +C26 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C27 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/vco 0.45fF +C28 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/a_n10_n140# 0.01fF +C29 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.14fF +C30 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a4 0.09fF +C31 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a5 0.09fF +C32 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/tapered_buf_3/in 0.02fF +C33 ro_complete_buffered_0/tapered_buf_1/a_580_0# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.35fF +C34 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z1 0.03fF +C35 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.01fF +C36 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C37 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/A 0.01fF +C38 div_pd_buffered_0/divider_0/tspc_0/Z3 div_pd_buffered_0/divider_0/tspc_0/Q 0.05fF +C39 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/in 0.02fF +C40 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/UP 0.33fF +C41 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF +C42 divider_1/mc2 divider_1/nor_1/A 0.04fF +C43 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF +C44 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/tspc_r_0/Qbar1 0.20fF +C45 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF +C46 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Q 0.05fF +C47 io_clamp_low[0] io_analog[4] 0.53fF +C48 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.17fF +C49 ro_complete_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_7/a_4670_0# 4.78fF +C50 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/Out 0.05fF +C51 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z1 0.09fF +C52 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z2 0.19fF +C53 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF +C54 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C55 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Z4 0.65fF +C56 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.15fF +C57 pll_full_1/ro_complete_0/a5 pll_full_1/vco 0.15fF +C58 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_0/Q 0.01fF +C59 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z1 0.06fF +C60 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_160_230# 0.02fF +C61 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_210_n610# 0.22fF +C62 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/ref 0.65fF +C63 divider_1/prescaler_0/tspc_0/Z2 divider_1/and_0/OUT 0.06fF +C64 ro_complete_0/a5 ro_complete_0/cbank_1/v 0.10fF +C65 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/a0 0.09fF +C66 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF +C67 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.02fF +C68 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 0.22fF +C69 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/ro_complete_0/a2 26.29fF +C70 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_n10_n140# 0.05fF +C71 pd_buffered_0/tapered_buf_2/a_580_0# pd_buffered_0/tapered_buf_2/a_210_n610# 0.84fF +C72 pll_full_0/pd_0/R pll_full_0/pd_0/DOWN 0.36fF +C73 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z1 0.71fF +C74 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z2 1.07fF +C75 divider_0/nor_0/Z1 divider_0/and_0/B 0.78fF +C76 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C77 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_160_n140# 0.22fF +C78 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/R 0.03fF +C79 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/tapered_buf_6/in 0.05fF +C80 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z3 0.38fF +C81 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/Z2 1.07fF +C82 divider_0/prescaler_0/tspc_2/Z4 divider_0/prescaler_0/tspc_2/D 0.11fF +C83 divider_0/prescaler_0/tspc_1/Z3 divider_0/prescaler_0/tspc_1/Q 0.21fF +C84 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/upbar 0.29fF +C85 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_0/Q 0.01fF +C86 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF +C87 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z3 0.25fF +C88 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/R 0.51fF +C89 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_580_0# 0.35fF +C90 div_pd_buffered_0/tapered_buf_0/a_580_0# div_pd_buffered_0/tapered_buf_0/a_1650_0# 1.27fF +C91 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/a_580_0# 0.35fF +C92 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/ro_complete_0/a4 26.29fF +C93 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF +C94 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.01fF +C95 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.09fF +C96 pd_buffered_0/pd_0/tspc_r_0/z5 pd_buffered_0/pd_0/UP 0.03fF +C97 divider_1/tspc_0/Z1 divider_1/nor_1/A 0.03fF +C98 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/nor_0/B 0.22fF +C99 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.19fF +C100 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/vco 0.01fF +C101 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/and_pd_0/Z1 0.18fF +C102 divider_0/prescaler_0/tspc_2/Z3 divider_0/clk 0.45fF +C103 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_580_0# 0.35fF +C104 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF +C105 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF +C106 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a3 0.13fF +C107 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z3 0.05fF +C108 pll_full_1/pd_0/tspc_r_0/Qbar pll_full_1/pd_0/UP 0.21fF +C109 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/vco 0.45fF +C110 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/in 0.19fF +C111 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C112 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/UP 0.03fF +C113 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/clk 0.14fF +C114 divider_1/nor_1/B divider_1/nor_0/B 0.47fF +C115 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a3 2.04fF +C116 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z2 0.23fF +C117 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C118 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/vco 1.46fF +C119 pd_buffered_0/tapered_buf_0/a_210_n610# pd_buffered_0/tapered_buf_0/out 26.29fF +C120 pd_buffered_0/tapered_buf_1/a_160_n140# pd_buffered_0/tapered_buf_1/a_n10_n140# 0.05fF +C121 pd_buffered_0/pd_0/and_pd_0/Z1 pd_buffered_0/pd_0/UP 0.06fF +C122 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/div 0.04fF +C123 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z2 0.40fF +C124 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/vco 0.29fF +C125 pll_full_0/ref pll_full_0/pd_0/R 0.61fF +C126 divider_1/mc2 divider_1/and_0/OUT 0.05fF +C127 divider_1/nor_0/Z1 divider_1/nor_0/B 0.06fF +C128 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C129 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C130 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/v 1.30fF +C131 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/ref 0.19fF +C132 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF +C133 pll_full_0/ro_complete_0/a4 pll_full_0/vco 0.01fF +C134 divider_1/tspc_1/Q divider_1/nor_0/B 0.22fF +C135 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_2/Q 0.19fF +C136 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/clk 0.01fF +C137 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.38fF +C138 div_pd_buffered_0/tapered_buf_2/a_4670_0# div_pd_buffered_0/tapered_buf_2/a_210_n610# 29.21fF +C139 divider_0/mc2 divider_0/nor_1/A 0.04fF +C140 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/nor_1/A 0.03fF +C141 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C142 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF +C143 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Q 0.01fF +C144 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/and_0/A 0.01fF +C145 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/a0 3.46fF +C146 ro_complete_buffered_0/tapered_buf_0/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/a_160_n140# 0.05fF +C147 ro_complete_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/a_580_0# 0.84fF +C148 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF +C149 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Q 0.04fF +C150 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.33fF +C151 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/vco 1.27fF +C152 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_2/D 0.16fF +C153 divider_0/and_0/B divider_0/and_0/Z1 0.07fF +C154 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/nor_1/A 0.15fF +C155 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF +C156 ro_complete_buffered_0/tapered_buf_3/a_1650_0# ro_complete_buffered_0/tapered_buf_3/a_580_0# 1.27fF +C157 ro_complete_0/a0 ro_complete_0/cbank_2/switch_4/vin 0.13fF +C158 ro_complete_0/cbank_0/v ro_complete_0/cbank_1/v 1.27fF +C159 pll_full_0/ref pll_full_0/pd_0/DOWN 1.48fF +C160 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF +C161 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C162 divider_1/tspc_2/a_630_n680# divider_1/Out 0.04fF +C163 divider_1/nor_0/B divider_1/tspc_2/Z2 0.40fF +C164 divider_1/prescaler_0/tspc_0/D divider_1/clk 0.29fF +C165 divider_0/tspc_0/Z3 divider_0/tspc_0/Q 0.05fF +C166 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF +C167 divider_1/nor_1/B divider_1/tspc_1/Z1 0.03fF +C168 divider_0/mc2 divider_0/nor_0/B 0.15fF +C169 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/in 0.04fF +C170 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/nor_1/A 0.01fF +C171 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# 0.01fF +C172 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C173 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/tspc_r_1/z5 0.20fF +C174 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z1 0.03fF +C175 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z3 0.05fF +C176 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C177 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/nor_0/B 0.47fF +C178 divider_1/prescaler_0/Out divider_1/tspc_0/Z2 0.11fF +C179 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/a_630_n680# 0.05fF +C180 div_pd_buffered_0/tapered_buf_2/a_160_230# div_pd_buffered_0/tapered_buf_2/a_580_0# 0.02fF +C181 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z3 0.33fF +C182 ro_complete_0/a2 ro_complete_0/cbank_2/switch_3/vin 0.09fF +C183 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/tspc_r_0/Qbar 0.02fF +C184 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z3 0.06fF +C185 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/vco 0.12fF +C186 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/UP 0.21fF +C187 div_pd_buffered_0/pd_0/tspc_r_1/Z4 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF +C188 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF +C189 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z2 0.71fF +C190 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_1/Z4 0.02fF +C191 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z3 0.06fF +C192 pd_buffered_0/tapered_buf_0/a_160_230# pd_buffered_0/tapered_buf_0/a_160_n140# 0.17fF +C193 pd_buffered_0/pd_0/and_pd_0/Out1 pd_buffered_0/pd_0/and_pd_0/Z1 0.18fF +C194 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/Out 0.05fF +C195 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z2 0.01fF +C196 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/out1 0.31fF +C197 pll_full_1/divider_0/tspc_1/Z4 pll_full_1/divider_0/tspc_0/Q 0.15fF +C198 cp_buffered_0/cp_0/upbar cp_buffered_0/tapered_buf_0/a_210_n610# 26.29fF +C199 io_clamp_low[1] io_clamp_high[1] 0.53fF +C200 div_pd_buffered_0/tapered_buf_3/a_n10_230# div_pd_buffered_0/pd_0/DOWN 0.02fF +C201 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/a_630_n680# 0.01fF +C202 divider_0/tspc_2/a_630_n680# divider_0/nor_0/B 0.35fF +C203 divider_0/prescaler_0/tspc_1/Q divider_0/clk 0.60fF +C204 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF +C205 pll_full_1/pd_0/DOWN pll_full_1/pd_0/R 0.36fF +C206 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/a_630_n680# 0.01fF +C207 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C208 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF +C209 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/z5 0.20fF +C210 pll_full_1/ref pll_full_1/pd_0/tspc_r_0/Z1 0.17fF +C211 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/B 0.35fF +C212 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/vco 0.60fF +C213 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_n10_n140# 0.05fF +C214 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 0.84fF +C215 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.19fF +C216 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C217 div_pd_buffered_0/pd_0/and_pd_0/Out1 div_pd_buffered_0/pd_0/UP 0.33fF +C218 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/Z3 0.33fF +C219 pd_buffered_0/tapered_buf_3/in pd_buffered_0/pd_0/DIV 0.02fF +C220 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_0/Q 0.45fF +C221 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.03fF +C222 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/nor_1/B 0.35fF +C223 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/vco 0.11fF +C224 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Z3 0.33fF +C225 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/and_0/B 0.29fF +C226 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_580_0# 0.02fF +C227 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/in 0.19fF +C228 cp_buffered_0/tapered_buf_0/a_1650_0# cp_buffered_0/tapered_buf_0/a_210_n610# 2.89fF +C229 div_pd_buffered_0/tapered_buf_4/a_1650_0# div_pd_buffered_0/tapered_buf_4/a_4670_0# 4.78fF +C230 divider_1/and_0/OUT divider_1/and_0/out1 0.31fF +C231 ro_complete_0/a2 ro_complete_0/cbank_2/v 0.05fF +C232 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z2 1.07fF +C233 pll_full_0/ro_complete_0/a1 pll_full_0/vco 0.11fF +C234 div_pd_buffered_0/pd_0/tspc_r_0/Z2 div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.14fF +C235 divider_0/prescaler_0/Out divider_0/tspc_0/a_630_n680# 0.01fF +C236 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/a_740_n680# 0.08fF +C237 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/in 0.19fF +C238 ro_complete_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 2.89fF +C239 pd_buffered_0/tapered_buf_2/a_n10_230# pd_buffered_0/tapered_buf_2/a_160_230# 0.09fF +C240 pd_buffered_0/tapered_buf_2/a_4670_0# pd_buffered_0/tapered_buf_2/a_210_n610# 29.21fF +C241 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/nor_1/B 0.06fF +C242 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF +C243 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/Z3 0.16fF +C244 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z2 1.07fF +C245 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF +C246 cp_buffered_0/tapered_buf_2/in cp_buffered_0/tapered_buf_2/a_160_n140# 0.19fF +C247 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.12fF +C248 div_pd_buffered_0/tapered_buf_0/a_210_n610# div_pd_buffered_0/divider_0/clk 26.29fF +C249 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/and_0/OUT 0.05fF +C250 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/switch_1/vin 0.19fF +C251 divider_1/tspc_1/Z1 divider_1/tspc_1/Z3 0.06fF +C252 divider_1/tspc_0/Z3 divider_1/nor_1/A 0.38fF +C253 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF +C254 div_pd_buffered_0/tapered_buf_4/a_1650_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 2.89fF +C255 divider_1/nor_0/B divider_1/and_0/B 0.29fF +C256 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_0/Q 0.45fF +C257 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF +C258 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/tspc_r_1/Qbar1 0.01fF +C259 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z3 0.27fF +C260 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/R 0.01fF +C261 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF +C262 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/tspc_r_1/Qbar 0.21fF +C263 divider_1/nor_1/B divider_1/nor_0/Z1 0.18fF +C264 divider_1/nor_1/B divider_1/tspc_1/Q 0.51fF +C265 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z2 0.19fF +C266 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.22fF +C267 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a4 0.12fF +C268 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF +C269 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_1650_0# 1.27fF +C270 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/v 0.05fF +C271 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z4 0.00fF +C272 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.15fF +C273 divider_1/tspc_0/a_630_n680# divider_1/nor_1/A 0.35fF +C274 divider_0/tspc_1/a_630_n680# divider_0/nor_1/B 0.35fF +C275 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z2 0.14fF +C276 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z3 0.05fF +C277 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.32fF +C278 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/vco 0.01fF +C279 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_1650_0# 1.27fF +C280 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF +C281 divider_0/nor_1/A divider_0/tspc_0/Z1 0.03fF +C282 divider_0/prescaler_0/tspc_2/Z4 divider_0/clk 0.12fF +C283 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/tspc_r_0/Qbar1 0.01fF +C284 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/R 0.29fF +C285 divider_1/prescaler_0/tspc_2/Z2 divider_1/and_0/OUT 0.05fF +C286 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF +C287 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z4 0.12fF +C288 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z2 1.07fF +C289 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.02fF +C290 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 0.22fF +C291 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z3 0.16fF +C292 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/vco 0.12fF +C293 div_pd_buffered_0/divider_0/tspc_0/Z1 div_pd_buffered_0/divider_0/tspc_0/Z4 0.00fF +C294 divider_1/nor_1/B divider_1/tspc_2/Z2 0.20fF +C295 divider_0/nor_1/Z1 divider_0/nor_1/B 0.06fF +C296 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C297 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/and_0/B 0.18fF +C298 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.00fF +C299 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/DOWN 0.03fF +C300 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/in 0.19fF +C301 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF +C302 divider_0/tspc_1/Z1 divider_0/tspc_1/Z3 0.06fF +C303 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z3 0.06fF +C304 pll_full_1/divider_0/nor_0/B pll_full_1/div 0.27fF +C305 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/DOWN 0.03fF +C306 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C307 divider_1/tspc_1/Q divider_1/tspc_2/Z2 0.14fF +C308 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/tspc_0/D 0.32fF +C309 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/clk 0.01fF +C310 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF +C311 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z1 0.17fF +C312 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF +C313 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C314 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.12fF +C315 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_6/in 0.10fF +C316 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/a0 0.09fF +C317 pd_buffered_0/tapered_buf_1/a_4670_0# pd_buffered_0/tapered_buf_1/a_1650_0# 4.78fF +C318 pd_buffered_0/pd_0/tspc_r_0/Z4 pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF +C319 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_1/Q 0.51fF +C320 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Z2 0.01fF +C321 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.08fF +C322 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.05fF +C323 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z1 0.01fF +C324 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_0/Q 0.22fF +C325 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/nand_0/z1 0.07fF +C326 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Z4 0.65fF +C327 cp_buffered_0/cp_0/a_10_n50# cp_buffered_0/cp_0/a_1710_0# 0.04fF +C328 pll_full_0/pd_0/and_pd_0/Z1 pll_full_0/pd_0/UP 0.06fF +C329 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/DOWN 0.11fF +C330 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C331 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C332 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C333 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/vco 0.14fF +C334 divider_1/tspc_2/Z1 divider_1/tspc_2/Z3 0.06fF +C335 divider_1/nor_0/B divider_1/Out 0.22fF +C336 div_pd_buffered_0/pd_0/tspc_r_0/Z2 div_pd_buffered_0/pd_0/R 0.21fF +C337 divider_0/tspc_0/Z3 divider_0/tspc_0/a_630_n680# 0.05fF +C338 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/nor_1/B 0.30fF +C339 divider_1/nor_1/B divider_1/tspc_1/Z3 0.38fF +C340 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z1 0.00fF +C341 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.11fF +C342 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/v 0.05fF +C343 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/UP 0.11fF +C344 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_2/Z2 0.20fF +C345 pll_full_0/pd_0/tspc_r_1/z5 pll_full_0/pd_0/DOWN 0.03fF +C346 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z3 0.38fF +C347 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z4 0.12fF +C348 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z2 1.07fF +C349 divider_0/tspc_1/Q divider_0/tspc_2/a_630_n680# 0.01fF +C350 divider_0/prescaler_0/m1_2700_2190# divider_0/clk 0.01fF +C351 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z2 0.25fF +C352 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF +C353 ro_complete_0/a2 ro_complete_0/cbank_0/switch_2/vin 0.14fF +C354 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a4 0.09fF +C355 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/a5 0.09fF +C356 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z2 0.15fF +C357 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF +C358 divider_1/tspc_1/Z2 divider_1/tspc_1/Z4 0.36fF +C359 divider_1/tspc_1/Z3 divider_1/tspc_1/Q 0.05fF +C360 divider_1/nor_1/A divider_1/tspc_0/Z4 0.21fF +C361 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Z4 0.08fF +C362 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z3 0.05fF +C363 pll_full_1/pd_0/R pll_full_1/pd_0/UP 0.46fF +C364 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF +C365 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/and_pd_0/Z1 0.07fF +C366 pll_full_1/pd_0/tspc_r_1/z5 pll_full_1/div 0.04fF +C367 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Z4 0.12fF +C368 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF +C369 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/clk 0.64fF +C370 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z4 0.12fF +C371 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF +C372 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF +C373 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/nor_1/B 1.21fF +C374 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/nor_0/B 0.06fF +C375 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z3 0.65fF +C376 divider_0/nor_1/B divider_0/tspc_1/Z2 0.30fF +C377 pd_buffered_0/tapered_buf_0/a_n10_n140# pd_buffered_0/tapered_buf_0/a_160_n140# 0.05fF +C378 pd_buffered_0/tapered_buf_0/a_210_n610# pd_buffered_0/tapered_buf_0/a_580_0# 0.84fF +C379 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/Z1 0.36fF +C380 divider_0/and_0/OUT divider_0/and_0/Z1 0.04fF +C381 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z2 0.01fF +C382 divider_0/prescaler_0/tspc_2/Q divider_0/clk 0.05fF +C383 ro_complete_buffered_0/tapered_buf_3/a_n10_n140# ro_complete_buffered_0/tapered_buf_3/in 0.04fF +C384 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_1/B 0.30fF +C385 div_pd_buffered_0/tapered_buf_3/a_n10_n140# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.05fF +C386 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF +C387 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF +C388 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/vco 0.05fF +C389 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C390 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.09fF +C391 ro_complete_buffered_0/tapered_buf_7/a_4670_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 29.21fF +C392 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.09fF +C393 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z4 0.02fF +C394 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Q 0.04fF +C395 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.01fF +C396 divider_1/nor_1/B divider_1/and_0/B 0.31fF +C397 divider_0/prescaler_0/tspc_0/Z3 divider_0/clk 0.64fF +C398 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/tapered_buf_6/in 1.30fF +C399 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/and_0/OUT 0.14fF +C400 pll_full_1/divider_0/prescaler_0/Out pll_full_1/vco 0.51fF +C401 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z3 0.05fF +C402 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF +C403 divider_1/tspc_0/Q divider_1/tspc_1/a_630_n680# 0.01fF +C404 divider_1/prescaler_0/tspc_0/Z3 divider_1/clk 0.64fF +C405 divider_1/nor_0/Z1 divider_1/and_0/B 0.78fF +C406 divider_0/and_0/out1 divider_0/and_0/B 0.18fF +C407 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF +C408 pd_buffered_0/tapered_buf_2/a_n10_230# pd_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF +C409 pll_full_0/cp_0/a_1710_0# pll_full_0/pd_0/DOWN 0.04fF +C410 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z4 0.28fF +C411 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.20fF +C412 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/DOWN 0.03fF +C413 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/clk 0.04fF +C414 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_580_0# 1.27fF +C415 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF +C416 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/tapered_buf_6/in 1.27fF +C417 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/and_0/B 0.08fF +C418 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.20fF +C419 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.09fF +C420 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/vco 0.12fF +C421 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/Q 0.05fF +C422 divider_1/prescaler_0/tspc_0/Z2 divider_1/clk 0.11fF +C423 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/R 0.02fF +C424 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z1 0.09fF +C425 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.19fF +C426 ro_complete_0/a0 ro_complete_0/cbank_2/switch_5/vin 0.09fF +C427 pll_full_1/pd_0/R pll_full_1/ref 0.61fF +C428 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_0/B 0.00fF +C429 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.05fF +C430 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF +C431 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.11fF +C432 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_160_230# 0.17fF +C433 pd_buffered_0/tapered_buf_3/a_1650_0# pd_buffered_0/tapered_buf_3/a_4670_0# 4.78fF +C434 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/Z4 0.65fF +C435 divider_0/mc2 divider_0/and_0/B 0.20fF +C436 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF +C437 ro_complete_buffered_0/tapered_buf_6/a_n10_n140# ro_complete_buffered_0/tapered_buf_6/in 0.04fF +C438 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z2 1.07fF +C439 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF +C440 divider_0/nor_1/Z1 divider_0/and_0/A 0.80fF +C441 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/B 0.31fF +C442 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.22fF +C443 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/tspc_0/D 0.04fF +C444 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_160_230# 0.17fF +C445 cp_buffered_0/tapered_buf_1/a_1650_0# cp_buffered_0/tapered_buf_1/a_4670_0# 4.78fF +C446 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/tspc_r_0/Qbar 0.05fF +C447 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF +C448 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF +C449 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF +C450 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/Q 0.20fF +C451 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/D 0.09fF +C452 ro_complete_0/cbank_0/switch_0/vin ro_complete_0/cbank_0/v 1.30fF +C453 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/Qbar 0.01fF +C454 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z1 0.03fF +C455 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.01fF +C456 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C457 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/in 0.19fF +C458 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 2.89fF +C459 divider_0/mc2 divider_0/prescaler_0/tspc_2/a_630_n680# 0.33fF +C460 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF +C461 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C462 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/a3 0.09fF +C463 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/UP 0.45fF +C464 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF +C465 div_pd_buffered_0/tapered_buf_1/a_n10_n140# div_pd_buffered_0/tapered_buf_1/in 0.04fF +C466 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.15fF +C467 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/a_630_n680# 0.12fF +C468 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/pd_0/UP 0.19fF +C469 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z4 0.12fF +C470 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z2 0.01fF +C471 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z4 0.00fF +C472 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF +C473 divider_1/prescaler_0/tspc_1/Q divider_1/prescaler_0/nand_1/z1 0.22fF +C474 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/tspc_0/D 0.04fF +C475 ro_complete_buffered_0/tapered_buf_3/a_160_230# ro_complete_buffered_0/tapered_buf_3/a_n10_230# 0.09fF +C476 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_4670_0# 29.21fF +C477 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF +C478 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF +C479 pll_full_0/ro_complete_0/a5 pll_full_0/vco 0.15fF +C480 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/tapered_buf_0/a_160_230# 0.09fF +C481 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.25fF +C482 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C483 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/nor_1/A 0.15fF +C484 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/R 0.61fF +C485 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z3 0.45fF +C486 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/and_0/A 0.26fF +C487 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C488 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.12fF +C489 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C490 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/vco 0.01fF +C491 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z1 0.08fF +C492 divider_0/prescaler_0/tspc_1/Z2 divider_0/and_0/OUT 0.06fF +C493 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/Q 0.38fF +C494 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF +C495 div_pd_buffered_0/tapered_buf_3/a_160_n140# div_pd_buffered_0/tapered_buf_3/a_210_n610# 0.22fF +C496 divider_1/tspc_2/Z1 divider_1/tspc_2/Z4 0.00fF +C497 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/tspc_r_0/Z1 0.71fF +C498 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z3 0.38fF +C499 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/a_740_n680# 0.08fF +C500 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/Z2 0.14fF +C501 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z3 0.65fF +C502 divider_1/nor_1/B divider_1/nor_1/A 1.21fF +C503 ro_complete_buffered_0/tapered_buf_1/in gnd 0.04fF +C504 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF +C505 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.28fF +C506 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/tapered_buf_1/a_1650_0# 2.89fF +C507 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/tspc_2/Z3 0.05fF +C508 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.13fF +C509 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C510 div_pd_buffered_0/divider_0/tspc_2/Z2 div_pd_buffered_0/divider_0/tspc_2/Z3 0.16fF +C511 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z4 0.22fF +C512 pll_full_1/ro_complete_0/cbank_2/v pll_full_1/vco 1.36fF +C513 divider_1/prescaler_0/Out divider_1/tspc_0/Z3 0.45fF +C514 divider_0/tspc_1/Q divider_0/nor_0/B 0.22fF +C515 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_2/Q 0.19fF +C516 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/clk 0.01fF +C517 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z4 0.12fF +C518 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z2 1.07fF +C519 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.01fF +C520 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF +C521 ro_complete_0/cbank_1/v ro_complete_0/cbank_2/v 1.36fF +C522 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_0/B 0.22fF +C523 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.19fF +C524 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/vco 0.01fF +C525 divider_1/nor_1/B divider_1/nor_1/Z1 0.06fF +C526 ro_complete_buffered_0/tapered_buf_6/a_210_n610# ro_complete_buffered_0/tapered_buf_6/out 26.29fF +C527 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/and_pd_0/Out1 0.33fF +C528 divider_1/tspc_0/a_630_n680# divider_1/prescaler_0/Out 0.01fF +C529 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_1/Q 0.13fF +C530 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF +C531 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.22fF +C532 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/a_630_n680# 0.35fF +C533 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.91fF +C534 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C535 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF +C536 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/out1 0.06fF +C537 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Z4 0.21fF +C538 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z3 0.45fF +C539 pd_buffered_0/tapered_buf_0/a_210_n610# pd_buffered_0/tapered_buf_0/a_4670_0# 29.21fF +C540 div_pd_buffered_0/divider_0/and_0/A div_pd_buffered_0/divider_0/and_0/B 0.18fF +C541 io_clamp_low[0] io_clamp_high[0] 0.53fF +C542 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C543 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_1/Q 0.13fF +C544 divider_0/tspc_2/a_630_n680# divider_0/Out 0.04fF +C545 divider_0/nor_0/B divider_0/tspc_2/Z2 0.40fF +C546 divider_0/prescaler_0/tspc_0/D divider_0/clk 0.29fF +C547 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_0/vin 0.19fF +C548 div_pd_buffered_0/tapered_buf_2/a_210_n610# div_pd_buffered_0/pd_0/REF 26.29fF +C549 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z2 0.23fF +C550 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF +C551 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/vco 1.46fF +C552 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/div 0.04fF +C553 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z2 0.40fF +C554 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/vco 0.29fF +C555 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/a_n10_n140# 0.01fF +C556 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.13fF +C557 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C558 divider_0/prescaler_0/tspc_0/Z4 divider_0/clk 0.12fF +C559 pd_buffered_0/tapered_buf_1/a_160_230# pd_buffered_0/tapered_buf_1/a_n10_230# 0.09fF +C560 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_4670_0# 29.21fF +C561 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/z5 0.11fF +C562 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/a_630_n680# 0.01fF +C563 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF +C564 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_2/D 0.16fF +C565 pll_full_1/ro_complete_0/cbank_1/switch_2/vin pll_full_1/vco 1.46fF +C566 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.24fF +C567 divider_0/tspc_1/Z2 divider_0/tspc_1/Z4 0.36fF +C568 divider_0/tspc_1/Z3 divider_0/tspc_1/Q 0.05fF +C569 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/D 0.15fF +C570 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z2 1.07fF +C571 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/in 0.02fF +C572 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF +C573 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF +C574 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/v 1.30fF +C575 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/pd_0/UP 0.03fF +C576 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.04fF +C577 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF +C578 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/vco 1.27fF +C579 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/in 0.02fF +C580 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/nor_1/B 0.18fF +C581 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/v 0.05fF +C582 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z2 0.11fF +C583 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z1 0.09fF +C584 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z2 0.19fF +C585 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF +C586 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D div_pd_buffered_0/divider_0/clk 0.26fF +C587 div_pd_buffered_0/tapered_buf_3/a_n10_230# div_pd_buffered_0/tapered_buf_3/a_160_230# 0.09fF +C588 div_pd_buffered_0/tapered_buf_3/a_4670_0# div_pd_buffered_0/tapered_buf_3/a_210_n610# 29.21fF +C589 divider_0/nor_1/B divider_0/and_0/A 0.26fF +C590 ro_complete_0/a0 ro_complete_0/cbank_2/v 0.05fF +C591 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/nor_0/B 0.47fF +C592 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF +C593 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/tspc_r_1/z5 0.03fF +C594 div_pd_buffered_0/pd_0/tspc_r_1/Z2 div_pd_buffered_0/pd_0/R 0.21fF +C595 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/UP 0.03fF +C596 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.02fF +C597 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 0.22fF +C598 cp_buffered_0/tapered_buf_2/a_n10_230# cp_buffered_0/tapered_buf_2/in 0.02fF +C599 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_n10_n140# 0.05fF +C600 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_210_n610# 0.84fF +C601 divider_0/prescaler_0/Out divider_0/nor_1/A 0.15fF +C602 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF +C603 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/a4 0.09fF +C604 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/a5 0.09fF +C605 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z3 0.16fF +C606 pll_full_1/ro_complete_0/cbank_2/switch_2/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF +C607 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/divider_0/prescaler_0/nand_1/z1 0.01fF +C608 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/vco 0.11fF +C609 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_n10_n140# 0.05fF +C610 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_210_n610# 0.84fF +C611 divider_1/prescaler_0/Out divider_1/tspc_0/Z4 0.12fF +C612 divider_0/nor_1/A divider_0/and_0/B 0.08fF +C613 divider_0/and_0/OUT divider_0/and_0/out1 0.31fF +C614 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_160_n140# 0.35fF +C615 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Q 0.04fF +C616 io_clamp_high[2] io_analog[6] 0.53fF +C617 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF +C618 pll_full_0/divider_0/tspc_1/Z4 pll_full_0/divider_0/tspc_0/Q 0.15fF +C619 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/Z4 0.12fF +C620 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/a1 0.14fF +C621 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z3 0.65fF +C622 ro_complete_buffered_0/tapered_buf_0/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/in 0.04fF +C623 pll_full_1/divider_0/nor_0/Z1 pll_full_1/divider_0/and_0/B 0.78fF +C624 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.05fF +C625 divider_0/nor_1/B divider_0/tspc_1/Z4 0.21fF +C626 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/divider_0/tspc_2/Z4 0.65fF +C627 divider_1/tspc_0/Q divider_1/tspc_0/Z3 0.05fF +C628 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z3 0.06fF +C629 divider_0/nor_0/B divider_0/and_0/B 0.29fF +C630 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_1650_0# 2.89fF +C631 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_580_0# 0.35fF +C632 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/z5 0.11fF +C633 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/R 0.29fF +C634 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF +C635 ro_complete_buffered_0/tapered_buf_3/a_n10_n140# ro_complete_buffered_0/tapered_buf_3/a_n10_230# 0.01fF +C636 ro_complete_buffered_0/tapered_buf_2/in ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.19fF +C637 ro_complete_0/a4 ro_complete_0/cbank_2/switch_0/vin 0.12fF +C638 pll_full_1/pd_0/tspc_r_0/z5 pll_full_1/ref 0.04fF +C639 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF +C640 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/vco 0.11fF +C641 divider_1/nor_1/A divider_1/and_0/B 0.08fF +C642 divider_1/prescaler_0/tspc_2/Q divider_1/prescaler_0/nand_1/z1 0.01fF +C643 divider_1/prescaler_0/tspc_2/Z2 divider_1/clk 0.11fF +C644 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_580_0# 0.35fF +C645 div_pd_buffered_0/tapered_buf_1/a_n10_230# div_pd_buffered_0/tapered_buf_1/a_160_230# 0.09fF +C646 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/tspc_r_0/Qbar 0.01fF +C647 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.29fF +C648 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_1/A 0.04fF +C649 divider_0/mc2 divider_0/and_0/OUT 0.05fF +C650 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF +C651 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.09fF +C652 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_1650_0# 2.89fF +C653 pd_buffered_0/tapered_buf_1/a_580_0# pd_buffered_0/tapered_buf_1/a_1650_0# 1.27fF +C654 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/DOWN 0.02fF +C655 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/R 0.30fF +C656 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Q 0.04fF +C657 divider_0/tspc_0/Z3 divider_0/tspc_0/Z1 0.06fF +C658 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.16fF +C659 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z4 0.15fF +C660 divider_0/prescaler_0/tspc_2/Z2 divider_0/and_0/OUT 0.05fF +C661 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Q 0.04fF +C662 divider_1/nor_1/Z1 divider_1/and_0/B 0.18fF +C663 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_2/in 0.04fF +C664 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/tspc_r_1/z5 0.20fF +C665 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF +C666 ro_complete_0/a3 ro_complete_0/cbank_2/v 0.05fF +C667 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF +C668 div_pd_buffered_0/tapered_buf_4/a_1650_0# div_pd_buffered_0/tapered_buf_4/a_580_0# 1.27fF +C669 divider_1/tspc_2/Z3 divider_1/tspc_2/Z4 0.65fF +C670 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/divider_0/mc2 0.34fF +C671 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.38fF +C672 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF +C673 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.03fF +C674 divider_0/tspc_0/Q divider_0/tspc_1/a_630_n680# 0.01fF +C675 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Z4 0.01fF +C676 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C677 pll_full_1/ro_complete_0/a1 pll_full_1/ro_complete_0/cbank_2/v 0.05fF +C678 divider_1/prescaler_0/tspc_0/Z4 divider_1/clk 0.12fF +C679 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF +C680 div_pd_buffered_0/divider_0/tspc_2/Z2 div_pd_buffered_0/divider_0/tspc_2/Z4 0.36fF +C681 divider_0/tspc_1/Q divider_0/tspc_2/Z2 0.14fF +C682 divider_0/tspc_0/Z4 divider_0/tspc_0/Z1 0.00fF +C683 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/tspc_0/D 0.32fF +C684 cp_buffered_0/cp_0/a_1710_0# cp_buffered_0/cp_0/out 0.84fF +C685 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/R 0.33fF +C686 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z3 0.16fF +C687 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C688 div_pd_buffered_0/tapered_buf_3/a_1650_0# div_pd_buffered_0/tapered_buf_3/a_4670_0# 4.78fF +C689 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z2 0.14fF +C690 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z3 0.05fF +C691 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.32fF +C692 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/vco 0.01fF +C693 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.02fF +C694 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_210_n610# 0.22fF +C695 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/tapered_buf_0/in 0.02fF +C696 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/tapered_buf_1/a_160_n140# 0.22fF +C697 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C698 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF +C699 divider_0/tspc_0/Z3 divider_0/nor_1/A 0.38fF +C700 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_1/Q 0.21fF +C701 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/a5 2.39fF +C702 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C703 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C704 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.09fF +C705 pd_buffered_0/tapered_buf_0/a_n10_n140# pd_buffered_0/pd_0/UP 0.04fF +C706 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z1 0.00fF +C707 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/B 0.01fF +C708 divider_0/tspc_2/Z1 divider_0/tspc_2/Z3 0.06fF +C709 divider_0/nor_0/B divider_0/Out 0.22fF +C710 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/R 0.03fF +C711 ro_complete_0/a3 ro_complete_0/cbank_1/switch_2/vin 0.09fF +C712 pll_full_1/pd_0/tspc_r_0/Z2 pll_full_1/pd_0/R 0.21fF +C713 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.18fF +C714 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF +C715 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF +C716 pll_full_0/divider_0/nor_0/B pll_full_0/div 0.27fF +C717 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/tapered_buf_1/a_4670_0# 29.21fF +C718 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/a0 0.13fF +C719 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_2/Z4 0.02fF +C720 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C721 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/clk 0.45fF +C722 ro_complete_buffered_0/tapered_buf_0/a_160_230# ro_complete_buffered_0/tapered_buf_0/a_n10_230# 0.09fF +C723 ro_complete_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/a_4670_0# 29.21fF +C724 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/nand_0/z1 0.07fF +C725 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C726 divider_0/tspc_0/Z4 divider_0/nor_1/A 0.21fF +C727 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Z3 0.16fF +C728 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/z5 0.04fF +C729 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF +C730 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/div 0.02fF +C731 divider_1/and_0/OUT divider_1/and_0/B 0.01fF +C732 ro_complete_buffered_0/tapered_buf_3/a_1650_0# ro_complete_buffered_0/tapered_buf_3/a_4670_0# 4.78fF +C733 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF +C734 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Q 0.51fF +C735 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Z2 0.01fF +C736 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF +C737 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF +C738 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/DOWN 0.02fF +C739 pd_buffered_0/tapered_buf_2/a_n10_n140# pd_buffered_0/tapered_buf_2/in 0.04fF +C740 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z4 0.12fF +C741 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF +C742 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_160_n140# 0.22fF +C743 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/R 0.51fF +C744 div_pd_buffered_0/tapered_buf_0/a_210_n610# div_pd_buffered_0/tapered_buf_0/a_1650_0# 2.89fF +C745 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_0/Q 0.14fF +C746 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/vco 0.01fF +C747 divider_1/tspc_1/Z2 divider_1/tspc_1/a_630_n680# 0.01fF +C748 divider_1/prescaler_0/tspc_2/a_740_n680# divider_1/prescaler_0/tspc_2/a_630_n680# 0.19fF +C749 ro_complete_buffered_0/tapered_buf_2/in ro_complete_buffered_0/tapered_buf_2/a_n10_230# 0.02fF +C750 pll_full_1/pd_0/tspc_r_1/z5 pll_full_1/pd_0/tspc_r_0/z5 0.02fF +C751 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF +C752 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C753 pll_full_1/pd_0/R pll_full_1/pd_0/tspc_r_0/Qbar 0.03fF +C754 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z2 0.20fF +C755 ro_complete_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 2.89fF +C756 div_pd_buffered_0/pd_0/tspc_r_1/Z2 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.14fF +C757 divider_0/tspc_0/Q divider_0/tspc_1/Z2 0.14fF +C758 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/tapered_buf_3/a_160_230# 0.09fF +C759 pd_buffered_0/tapered_buf_3/a_4670_0# pd_buffered_0/tapered_buf_3/a_210_n610# 29.21fF +C760 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/and_0/OUT 0.14fF +C761 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_0/B 0.15fF +C762 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/switch_5/vin 0.20fF +C763 pd_buffered_0/pd_0/DOWN pd_buffered_0/tapered_buf_1/a_n10_n140# 0.04fF +C764 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C765 ro_complete_buffered_0/tapered_buf_6/in ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.36fF +C766 pll_full_1/divider_0/and_0/OUT pll_full_1/div 0.01fF +C767 pll_full_1/divider_0/prescaler_0/tspc_0/D pll_full_1/divider_0/prescaler_0/nand_1/z1 0.21fF +C768 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/a_160_230# 0.09fF +C769 cp_buffered_0/tapered_buf_1/a_4670_0# cp_buffered_0/tapered_buf_1/a_210_n610# 29.21fF +C770 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z2 1.07fF +C771 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a1 0.14fF +C772 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF +C773 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a3 0.09fF +C774 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C775 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/nor_1/B 1.21fF +C776 io_clamp_low[1] io_analog[5] 0.53fF +C777 div_pd_buffered_0/tapered_buf_2/in div_pd_buffered_0/divider_0/mc2 0.02fF +C778 div_pd_buffered_0/tapered_buf_4/a_210_n610# div_pd_buffered_0/tapered_buf_4/out 26.29fF +C779 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/in 0.02fF +C780 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C781 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_2/switch_1/vin 0.09fF +C782 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C783 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF +C784 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF +C785 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF +C786 pd_buffered_0/tapered_buf_1/out pd_buffered_0/tapered_buf_1/a_210_n610# 26.29fF +C787 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.38fF +C788 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.11fF +C789 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/clk 0.12fF +C790 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/vco 1.46fF +C791 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z3 0.06fF +C792 divider_0/prescaler_0/m1_2700_2190# divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C793 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_4670_0# 29.21fF +C794 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_1650_0# 1.27fF +C795 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF +C796 divider_1/tspc_0/Q divider_1/tspc_1/Z1 0.01fF +C797 divider_1/prescaler_0/tspc_1/Z1 divider_1/prescaler_0/tspc_1/Z4 0.00fF +C798 div_pd_buffered_0/tapered_buf_2/a_580_0# div_pd_buffered_0/tapered_buf_2/a_1650_0# 1.27fF +C799 divider_1/prescaler_0/tspc_0/D divider_1/prescaler_0/nand_1/z1 0.21fF +C800 ro_complete_buffered_0/tapered_buf_3/a_160_230# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.02fF +C801 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.22fF +C802 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/v 1.30fF +C803 ro_complete_0/cbank_0/switch_5/vin ro_complete_0/cbank_0/v 1.30fF +C804 pll_full_1/pd_0/DOWN pll_full_1/cp_0/a_1710_0# 0.04fF +C805 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF +C806 pll_full_0/divider_0/prescaler_0/Out pll_full_0/vco 0.51fF +C807 div_pd_buffered_0/pd_0/tspc_r_0/Z1 div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.71fF +C808 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.20fF +C809 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF +C810 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/pd_0/UP 0.02fF +C811 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_1650_0# 1.27fF +C812 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C813 pll_full_1/pd_0/R pll_full_1/div 0.51fF +C814 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_1/Q 0.21fF +C815 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin ro_complete_buffered_0/tapered_buf_6/in 1.30fF +C816 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_580_0# 0.02fF +C817 pd_buffered_0/tapered_buf_1/a_n10_230# pd_buffered_0/pd_0/DOWN 0.02fF +C818 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/clk 0.45fF +C819 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.36fF +C820 divider_0/nor_1/B divider_0/tspc_2/Z4 0.02fF +C821 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/D 0.09fF +C822 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF +C823 div_pd_buffered_0/tapered_buf_2/a_210_n610# div_pd_buffered_0/tapered_buf_2/a_160_n140# 0.22fF +C824 divider_1/mc2 divider_1/and_0/A 0.16fF +C825 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/B 0.08fF +C826 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.20fF +C827 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF +C828 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/vco 0.12fF +C829 div_pd_buffered_0/pd_0/tspc_r_0/Z4 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF +C830 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/DOWN 0.11fF +C831 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z1 0.17fF +C832 div_pd_buffered_0/tapered_buf_4/a_n10_n140# div_pd_buffered_0/pd_0/UP 0.04fF +C833 divider_0/nor_0/Z1 divider_0/nor_1/B 0.18fF +C834 divider_0/tspc_0/Q divider_0/nor_1/B 0.22fF +C835 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/in 0.19fF +C836 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF +C837 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF +C838 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.05fF +C839 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C840 pd_buffered_0/pd_0/tspc_r_1/Z4 pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF +C841 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/z5 0.11fF +C842 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/div 0.12fF +C843 divider_0/prescaler_0/tspc_1/Q divider_0/prescaler_0/nand_1/z1 0.22fF +C844 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/tspc_0/D 0.04fF +C845 divider_0/prescaler_0/tspc_1/Z2 divider_0/clk 0.11fF +C846 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.22fF +C847 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF +C848 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Z4 0.12fF +C849 divider_1/prescaler_0/tspc_2/Z2 divider_1/prescaler_0/tspc_2/Z4 0.36fF +C850 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.31fF +C851 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF +C852 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/tspc_0/D 0.04fF +C853 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C854 pll_full_1/ro_complete_0/a4 pll_full_1/ro_complete_0/cbank_1/switch_1/vin 0.09fF +C855 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/D 0.05fF +C856 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF +C857 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/nor_1/B 0.03fF +C858 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/a_630_n680# 0.05fF +C859 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.08fF +C860 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.05fF +C861 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF +C862 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C863 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z3 0.65fF +C864 pd_buffered_0/pd_0/and_pd_0/Out1 pd_buffered_0/pd_0/UP 0.33fF +C865 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF +C866 div_pd_buffered_0/tapered_buf_0/a_1650_0# div_pd_buffered_0/tapered_buf_0/a_4670_0# 4.78fF +C867 div_pd_buffered_0/divider_0/and_0/B div_pd_buffered_0/divider_0/and_0/Z1 0.07fF +C868 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF +C869 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C870 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF +C871 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/D 0.05fF +C872 divider_0/tspc_2/Z1 divider_0/tspc_2/Z4 0.00fF +C873 ro_complete_0/a3 ro_complete_0/cbank_2/switch_1/vin 0.13fF +C874 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF +C875 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/z5 0.11fF +C876 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/tspc_0/Z4 0.65fF +C877 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF +C878 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.01fF +C879 divider_1/nor_1/B divider_1/tspc_0/Q 0.22fF +C880 ro_complete_buffered_0/tapered_buf_7/a_n10_n140# ro_complete_buffered_0/tapered_buf_7/in 0.04fF +C881 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.20fF +C882 ro_complete_buffered_0/tapered_buf_0/a_n10_n140# ro_complete_buffered_0/tapered_buf_0/a_n10_230# 0.01fF +C883 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF +C884 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_580_0# 0.84fF +C885 pd_buffered_0/pd_0/tspc_r_0/Z2 pd_buffered_0/pd_0/tspc_r_0/Z4 0.14fF +C886 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF +C887 pll_full_1/divider_0/prescaler_0/m1_2700_2190# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.38fF +C888 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.11fF +C889 pll_full_1/ro_complete_0/cbank_1/switch_4/vin pll_full_1/vco 1.46fF +C890 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF +C891 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Z3 0.38fF +C892 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 div_pd_buffered_0/divider_0/clk 0.12fF +C893 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/A 0.01fF +C894 pll_full_1/divider_0/tspc_0/Z3 pll_full_1/divider_0/tspc_0/Q 0.05fF +C895 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C896 divider_1/prescaler_0/tspc_0/Z2 divider_1/prescaler_0/tspc_0/D 0.09fF +C897 ro_complete_0/a4 ro_complete_0/cbank_2/v 0.05fF +C898 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/v 1.30fF +C899 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF +C900 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C901 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/vco 0.01fF +C902 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/R 0.29fF +C903 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/div 0.65fF +C904 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF +C905 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.06fF +C906 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_1/Z1 0.08fF +C907 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_2/v 0.08fF +C908 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_1/switch_5/vin 0.09fF +C909 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C910 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/R 0.01fF +C911 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF +C912 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/tspc_r_1/Qbar 0.21fF +C913 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/vco 0.01fF +C914 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/nor_0/B 0.35fF +C915 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/clk 0.60fF +C916 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF +C917 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF +C918 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/vco 1.36fF +C919 div_pd_buffered_0/tapered_buf_3/out div_pd_buffered_0/tapered_buf_3/a_210_n610# 26.29fF +C920 divider_1/and_0/out1 divider_1/and_0/A 0.01fF +C921 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C922 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/div 0.12fF +C923 pd_buffered_0/tapered_buf_3/a_n10_230# pd_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF +C924 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF +C925 div_pd_buffered_0/tapered_buf_0/in div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.04fF +C926 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Z2 0.23fF +C927 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C928 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.16fF +C929 divider_0/prescaler_0/tspc_0/Z2 divider_0/and_0/OUT 0.06fF +C930 pll_full_1/ro_complete_0/cbank_2/switch_4/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF +C931 pll_full_1/pd_0/tspc_r_1/Z1 pll_full_1/div 0.17fF +C932 div_pd_buffered_0/tapered_buf_2/a_n10_230# div_pd_buffered_0/tapered_buf_2/in 0.02fF +C933 cp_buffered_0/tapered_buf_1/a_n10_230# cp_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF +C934 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a1 0.14fF +C935 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/ref 0.02fF +C936 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/a_630_n680# 0.35fF +C937 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.91fF +C938 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C939 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF +C940 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF +C941 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Z1 0.17fF +C942 div_pd_buffered_0/tapered_buf_3/a_1650_0# div_pd_buffered_0/tapered_buf_3/a_210_n610# 2.89fF +C943 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.21fF +C944 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/Z4 0.36fF +C945 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_1/Q 0.05fF +C946 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z4 0.00fF +C947 divider_1/tspc_0/Q divider_1/tspc_1/Z3 0.45fF +C948 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_160_230# 0.17fF +C949 cp_buffered_0/tapered_buf_0/a_1650_0# cp_buffered_0/tapered_buf_0/a_4670_0# 4.78fF +C950 pll_full_1/cp_0/down pll_full_1/cp_0/upbar 0.02fF +C951 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF +C952 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C953 ro_complete_buffered_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.19fF +C954 ro_complete_0/a5 ro_complete_0/cbank_2/switch_0/vin 0.09fF +C955 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF +C956 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF +C957 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_2/D 0.16fF +C958 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/vco 1.46fF +C959 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_210_n610# 0.84fF +C960 divider_0/prescaler_0/Out divider_0/tspc_0/Z3 0.45fF +C961 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.17fF +C962 ro_complete_buffered_0/tapered_buf_5/a_1650_0# ro_complete_buffered_0/tapered_buf_5/a_4670_0# 4.78fF +C963 div_pd_buffered_0/tapered_buf_0/a_160_230# div_pd_buffered_0/tapered_buf_0/a_580_0# 0.02fF +C964 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.20fF +C965 pd_buffered_0/tapered_buf_2/a_580_0# pd_buffered_0/tapered_buf_2/a_160_230# 0.02fF +C966 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_210_n610# 0.22fF +C967 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/DOWN 0.21fF +C968 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/nor_1/B 0.06fF +C969 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/nor_1/A 0.21fF +C970 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C971 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C972 pd_buffered_0/pd_0/tspc_r_0/Z2 pd_buffered_0/pd_0/R 0.21fF +C973 div_pd_buffered_0/divider_0/tspc_0/Z2 div_pd_buffered_0/divider_0/tspc_0/Z3 0.16fF +C974 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 div_pd_buffered_0/divider_0/clk 0.12fF +C975 divider_0/tspc_0/a_630_n680# divider_0/tspc_0/Z2 0.01fF +C976 ro_complete_buffered_0/tapered_buf_0/a_1650_0# ro_complete_buffered_0/tapered_buf_0/a_4670_0# 4.78fF +C977 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF +C978 divider_0/prescaler_0/tspc_1/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF +C979 divider_0/prescaler_0/tspc_1/Z4 divider_0/clk 0.12fF +C980 div_pd_buffered_0/tapered_buf_2/a_210_n610# div_pd_buffered_0/tapered_buf_2/a_580_0# 0.84fF +C981 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/z5 0.04fF +C982 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C983 ro_complete_0/a1 ro_complete_0/cbank_2/v 0.05fF +C984 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C985 div_pd_buffered_0/tapered_buf_1/a_n10_230# div_pd_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF +C986 div_pd_buffered_0/pd_0/tspc_r_0/z5 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.02fF +C987 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.25fF +C988 divider_0/tspc_0/a_630_n680# divider_0/nor_1/B 0.01fF +C989 divider_0/prescaler_0/Out divider_0/tspc_0/Z4 0.12fF +C990 gnd ro_complete_buffered_0/tapered_buf_1/a_580_0# 5.71fF +C991 pll_full_1/ro_complete_0/cbank_0/v pll_full_1/ro_complete_0/cbank_2/v 0.04fF +C992 pd_buffered_0/tapered_buf_1/a_n10_230# pd_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF +C993 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/and_pd_0/Z1 0.07fF +C994 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_0/Q 0.01fF +C995 divider_1/prescaler_0/Out divider_1/nor_1/A 0.15fF +C996 divider_0/prescaler_0/tspc_2/Q divider_0/prescaler_0/nand_1/z1 0.01fF +C997 divider_0/prescaler_0/tspc_2/Z2 divider_0/clk 0.11fF +C998 pll_full_0/filter_0/a_4216_n5230# pll_full_0/vco 1.58fF +C999 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF +C1000 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C1001 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/Z2 0.01fF +C1002 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/ro_complete_0/a3 26.29fF +C1003 pll_full_0/divider_0/prescaler_0/tspc_2/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF +C1004 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/vco 0.11fF +C1005 div_pd_buffered_0/tapered_buf_3/a_160_n140# div_pd_buffered_0/pd_0/DOWN 0.19fF +C1006 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C1007 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/Out 0.05fF +C1008 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.06fF +C1009 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/UP 2.89fF +C1010 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/Z3 0.65fF +C1011 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C1012 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/B 0.20fF +C1013 divider_0/tspc_0/Q divider_0/tspc_1/Z4 0.15fF +C1014 divider_0/prescaler_0/tspc_0/Z4 divider_0/prescaler_0/tspc_0/D 0.11fF +C1015 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF +C1016 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C1017 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/a3 0.09fF +C1018 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/nor_1/B 0.38fF +C1019 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z1 0.00fF +C1020 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.12fF +C1021 pll_full_1/ro_complete_0/a2 pll_full_1/vco 0.11fF +C1022 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z1 0.03fF +C1023 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z3 0.05fF +C1024 divider_0/tspc_2/Z3 divider_0/tspc_2/Z4 0.65fF +C1025 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF +C1026 ro_complete_0/a2 ro_complete_0/cbank_1/v 0.05fF +C1027 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/a0 0.13fF +C1028 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF +C1029 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.12fF +C1030 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF +C1031 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/div 0.19fF +C1032 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z4 0.14fF +C1033 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF +C1034 div_pd_buffered_0/tapered_buf_0/a_580_0# div_pd_buffered_0/tapered_buf_0/a_210_n610# 0.84fF +C1035 cp_buffered_0/tapered_buf_2/a_160_230# cp_buffered_0/tapered_buf_2/a_160_n140# 0.17fF +C1036 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/a_630_n680# 0.01fF +C1037 ro_complete_buffered_0/tapered_buf_0/a_160_230# ro_complete_buffered_0/tapered_buf_0/a_580_0# 0.02fF +C1038 ro_complete_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/a_160_n140# 0.22fF +C1039 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/tapered_buf_6/in 1.30fF +C1040 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C1041 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.04fF +C1042 pll_full_1/ro_complete_0/cbank_1/switch_0/vin pll_full_1/vco 1.58fF +C1043 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/UP 0.33fF +C1044 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z3 0.16fF +C1045 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF +C1046 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF +C1047 divider_1/nor_0/B divider_1/tspc_2/Z1 0.03fF +C1048 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z3 0.05fF +C1049 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/v 1.43fF +C1050 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF +C1051 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/pd_0/UP 0.19fF +C1052 div_pd_buffered_0/tapered_buf_3/a_1650_0# div_pd_buffered_0/tapered_buf_3/a_580_0# 1.27fF +C1053 ro_complete_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.02fF +C1054 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/UP 0.11fF +C1055 div_pd_buffered_0/divider_0/nor_1/Z1 div_pd_buffered_0/divider_0/and_0/B 0.18fF +C1056 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/tspc_2/a_630_n680# 0.04fF +C1057 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/Z2 0.36fF +C1058 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C1059 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/nor_0/B 0.06fF +C1060 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF +C1061 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/z5 0.11fF +C1062 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/Z1 0.04fF +C1063 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/tspc_2/Z2 0.01fF +C1064 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/clk 0.05fF +C1065 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z3 0.65fF +C1066 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/D 0.03fF +C1067 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/R 0.27fF +C1068 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF +C1069 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF +C1070 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_580_0# 0.35fF +C1071 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF +C1072 div_pd_buffered_0/tapered_buf_1/a_160_230# div_pd_buffered_0/tapered_buf_1/a_160_n140# 0.17fF +C1073 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/and_pd_0/Out1 0.12fF +C1074 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/UP 0.21fF +C1075 divider_0/tspc_0/Z3 divider_0/tspc_0/Z4 0.65fF +C1076 pll_full_1/ro_complete_0/cbank_2/switch_0/vin pll_full_1/ro_complete_0/cbank_2/v 1.45fF +C1077 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 0.07fF +C1078 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/UP 0.45fF +C1079 div_pd_buffered_0/divider_0/and_0/out1 div_pd_buffered_0/divider_0/and_0/B 0.18fF +C1080 divider_1/mc2 divider_1/prescaler_0/tspc_2/a_630_n680# 0.33fF +C1081 divider_0/and_0/OUT divider_0/and_0/B 0.01fF +C1082 ro_complete_0/a4 ro_complete_0/cbank_2/switch_1/vin 0.09fF +C1083 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF +C1084 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/D 0.03fF +C1085 pll_full_1/pd_0/tspc_r_1/Qbar1 pll_full_1/pd_0/R 0.01fF +C1086 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF +C1087 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF +C1088 io_clamp_high[0] io_analog[4] 0.53fF +C1089 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF +C1090 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_160_230# 0.02fF +C1091 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 0.22fF +C1092 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.14fF +C1093 pll_full_1/ro_complete_0/cbank_0/switch_2/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C1094 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_0/Z2 0.21fF +C1095 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF +C1096 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1097 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z2 0.25fF +C1098 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.03fF +C1099 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/Z2 0.36fF +C1100 div_pd_buffered_0/tapered_buf_1/a_4670_0# div_pd_buffered_0/tapered_buf_1/a_1650_0# 4.78fF +C1101 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/nor_0/B 0.00fF +C1102 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_0/Q 0.14fF +C1103 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.05fF +C1104 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/clk 0.01fF +C1105 divider_1/prescaler_0/tspc_0/Z3 divider_1/prescaler_0/tspc_0/Z2 0.16fF +C1106 pll_full_1/div pll_full_1/vco 2.26fF +C1107 cp_buffered_0/tapered_buf_0/a_160_n140# cp_buffered_0/tapered_buf_0/a_n10_n140# 0.05fF +C1108 cp_buffered_0/tapered_buf_0/a_580_0# cp_buffered_0/tapered_buf_0/a_210_n610# 0.84fF +C1109 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF +C1110 divider_1/tspc_0/Q divider_1/nor_1/A 0.55fF +C1111 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1112 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF +C1113 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C1114 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_0/a_740_n680# 0.21fF +C1115 ro_complete_buffered_0/tapered_buf_5/a_160_n140# ro_complete_buffered_0/tapered_buf_5/a_n10_n140# 0.05fF +C1116 ro_complete_buffered_0/tapered_buf_5/a_580_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 0.84fF +C1117 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/in 0.19fF +C1118 pd_buffered_0/tapered_buf_2/a_1650_0# pd_buffered_0/tapered_buf_2/a_210_n610# 2.89fF +C1119 ro_complete_buffered_0/tapered_buf_5/a_210_n610# ro_complete_buffered_0/ro_complete_0/a0 26.29fF +C1120 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/tspc_1/Z3 0.06fF +C1121 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/D 0.11fF +C1122 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C1123 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/tapered_buf_6/in 1.30fF +C1124 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/a_160_n140# 0.05fF +C1125 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z3 0.65fF +C1126 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Q 0.55fF +C1127 pll_full_1/ro_complete_0/cbank_1/switch_5/vin pll_full_1/vco 1.46fF +C1128 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Z4 0.20fF +C1129 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_1/B 0.18fF +C1130 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z4 0.12fF +C1131 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF +C1132 divider_1/tspc_1/Z1 divider_1/tspc_1/Z2 1.07fF +C1133 ro_complete_0/cbank_1/switch_5/vin ro_complete_0/cbank_1/v 1.30fF +C1134 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/UP 0.11fF +C1135 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_0/Q 0.14fF +C1136 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/vco 0.01fF +C1137 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/and_pd_0/Out1 0.05fF +C1138 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/tspc_r_1/Qbar 0.01fF +C1139 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/R 0.27fF +C1140 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_580_0# 0.35fF +C1141 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z1 0.08fF +C1142 gnd ro_complete_buffered_0/tapered_buf_1/a_1650_0# 20.70fF +C1143 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/in 0.02fF +C1144 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/nor_1/B 1.21fF +C1145 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C1146 pd_buffered_0/tapered_buf_0/a_n10_230# pd_buffered_0/tapered_buf_0/a_160_230# 0.09fF +C1147 pd_buffered_0/pd_0/R pd_buffered_0/pd_0/and_pd_0/Out1 0.33fF +C1148 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z1 0.01fF +C1149 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_0/Q 0.22fF +C1150 divider_0/prescaler_0/tspc_0/D divider_0/prescaler_0/nand_1/z1 0.21fF +C1151 filter_0/v filter_0/a_4216_n5230# 0.91fF +C1152 ro_complete_0/a4 ro_complete_0/cbank_1/switch_1/vin 0.09fF +C1153 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF +C1154 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z1 0.17fF +C1155 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/Out 0.04fF +C1156 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.17fF +C1157 pll_full_0/divider_0/and_0/OUT pll_full_0/div 0.01fF +C1158 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF +C1159 divider_0/mc2 divider_0/nor_1/B 0.06fF +C1160 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin ro_complete_buffered_0/ro_complete_0/a3 0.13fF +C1161 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/tapered_buf_0/a_210_n610# 26.29fF +C1162 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/a1 0.14fF +C1163 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C1164 pll_full_1/divider_0/nor_1/Z1 pll_full_1/divider_0/and_0/A 0.80fF +C1165 pll_full_1/ro_complete_0/cbank_2/switch_5/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF +C1166 divider_0/tspc_1/Z1 divider_0/tspc_1/Z2 1.07fF +C1167 pd_buffered_0/tapered_buf_0/a_160_n140# pd_buffered_0/tapered_buf_0/a_580_0# 0.35fF +C1168 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z3 0.38fF +C1169 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z4 0.12fF +C1170 pll_full_1/divider_0/tspc_2/Z1 pll_full_1/divider_0/tspc_2/Z2 1.07fF +C1171 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Qbar1 0.38fF +C1172 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C1173 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF +C1174 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C1175 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF +C1176 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z1 0.09fF +C1177 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.78fF +C1178 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/vco 1.46fF +C1179 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z2 0.19fF +C1180 divider_1/tspc_1/Q divider_1/tspc_2/Z1 0.01fF +C1181 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF +C1182 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF +C1183 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF +C1184 ro_complete_buffered_0/tapered_buf_0/in ro_complete_buffered_0/tapered_buf_0/a_160_n140# 0.19fF +C1185 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF +C1186 pll_full_1/divider_0/tspc_1/a_630_n680# pll_full_1/divider_0/tspc_1/Z4 0.12fF +C1187 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_2/Z2 0.01fF +C1188 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/and_0/B 0.08fF +C1189 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/nor_0/B 0.22fF +C1190 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.19fF +C1191 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/clk 0.01fF +C1192 divider_0/tspc_1/a_630_n680# divider_0/nor_0/B 0.00fF +C1193 divider_0/prescaler_0/tspc_2/Z2 divider_0/prescaler_0/tspc_2/Z4 0.36fF +C1194 cp_buffered_0/cp_0/down cp_buffered_0/cp_0/a_1710_0# 0.32fF +C1195 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/Z1 0.36fF +C1196 divider_1/prescaler_0/m1_2700_2190# divider_1/nor_1/A 0.01fF +C1197 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_0/Z2 0.14fF +C1198 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1199 ro_complete_0/a5 ro_complete_0/cbank_2/v 0.08fF +C1200 ro_complete_0/a0 ro_complete_0/cbank_1/switch_5/vin 0.09fF +C1201 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/R 0.21fF +C1202 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/ref 0.12fF +C1203 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF +C1204 divider_1/nor_0/B divider_1/tspc_2/Z3 0.38fF +C1205 divider_1/tspc_2/a_630_n680# divider_1/tspc_2/Z4 0.12fF +C1206 divider_1/tspc_2/Z1 divider_1/tspc_2/Z2 1.07fF +C1207 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/OUT 0.05fF +C1208 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/divider_0/nor_0/B 0.42fF +C1209 div_pd_buffered_0/divider_0/tspc_1/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.03fF +C1210 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# 0.05fF +C1211 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/nor_1/A 0.35fF +C1212 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF +C1213 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF +C1214 divider_1/nor_1/B divider_1/tspc_1/Z2 0.30fF +C1215 ro_complete_buffered_0/tapered_buf_1/a_210_n610# gnd 212.43fF +C1216 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C1217 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/cp_0/down 26.29fF +C1218 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/tspc_r_1/z5 0.03fF +C1219 pd_buffered_0/pd_0/tspc_r_1/Z2 pd_buffered_0/pd_0/R 0.21fF +C1220 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/UP 0.03fF +C1221 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/tspc_2/Z2 0.40fF +C1222 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D div_pd_buffered_0/divider_0/clk 0.29fF +C1223 divider_1/tspc_0/Z1 divider_1/tspc_0/Z2 1.07fF +C1224 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.05fF +C1225 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/nand_0/z1 0.01fF +C1226 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/vco 0.11fF +C1227 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_0/a_630_n680# 0.04fF +C1228 divider_1/tspc_1/Z1 divider_1/tspc_1/Z4 0.00fF +C1229 divider_1/prescaler_0/tspc_2/a_630_n680# divider_1/prescaler_0/tspc_2/Z2 0.01fF +C1230 ro_complete_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_2/a_4670_0# 4.78fF +C1231 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF +C1232 pll_full_1/cp_0/down pll_full_1/cp_0/a_1710_0# 0.32fF +C1233 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF +C1234 div_pd_buffered_0/tapered_buf_3/a_n10_n140# div_pd_buffered_0/pd_0/DOWN 0.04fF +C1235 divider_1/and_0/out1 divider_1/and_0/Z1 0.36fF +C1236 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/divider_0/mc2 26.29fF +C1237 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C1238 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/div 0.02fF +C1239 pd_buffered_0/tapered_buf_3/a_n10_n140# pd_buffered_0/tapered_buf_3/in 0.04fF +C1240 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/tspc_1/Q 0.04fF +C1241 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.06fF +C1242 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF +C1243 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.38fF +C1244 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/clk 0.11fF +C1245 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.11fF +C1246 pd_buffered_0/tapered_buf_0/a_160_230# pd_buffered_0/tapered_buf_0/a_580_0# 0.02fF +C1247 pd_buffered_0/tapered_buf_0/a_210_n610# pd_buffered_0/tapered_buf_0/a_160_n140# 0.22fF +C1248 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_0/a_630_n680# 0.19fF +C1249 divider_0/nor_1/B divider_0/tspc_1/Z1 0.03fF +C1250 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Z3 0.05fF +C1251 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/m1_2700_2190# 0.08fF +C1252 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/div 0.03fF +C1253 pll_full_1/divider_0/and_0/OUT pll_full_1/vco 0.06fF +C1254 cp_buffered_0/tapered_buf_1/a_n10_n140# cp_buffered_0/tapered_buf_1/in 0.04fF +C1255 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF +C1256 div_pd_buffered_0/tapered_buf_2/in div_pd_buffered_0/tapered_buf_2/a_160_n140# 0.19fF +C1257 divider_1/and_0/OUT divider_1/prescaler_0/nand_0/z1 0.01fF +C1258 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/nor_1/B 0.03fF +C1259 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/a_630_n680# 0.05fF +C1260 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF +C1261 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF +C1262 ro_complete_buffered_0/tapered_buf_4/a_n10_n140# ro_complete_buffered_0/tapered_buf_4/in 0.04fF +C1263 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/in 0.19fF +C1264 ro_complete_buffered_0/tapered_buf_7/a_1650_0# ro_complete_buffered_0/tapered_buf_7/a_210_n610# 2.89fF +C1265 ro_complete_buffered_0/tapered_buf_4/a_210_n610# ro_complete_buffered_0/ro_complete_0/a1 26.29fF +C1266 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/nor_1/B 0.18fF +C1267 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C1268 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/switch_5/vin 0.20fF +C1269 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/tspc_r_0/Qbar 0.01fF +C1270 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/nor_0/B 0.47fF +C1271 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Z3 0.05fF +C1272 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF +C1273 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/Out 0.21fF +C1274 divider_1/nor_1/B divider_1/and_0/A 0.26fF +C1275 divider_0/prescaler_0/tspc_0/Z2 divider_0/clk 0.11fF +C1276 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/tapered_buf_6/in 0.05fF +C1277 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/a0 0.13fF +C1278 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/vco 0.64fF +C1279 div_pd_buffered_0/tapered_buf_2/a_n10_230# div_pd_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF +C1280 divider_0/tspc_1/Z2 divider_0/nor_1/A 0.15fF +C1281 divider_0/prescaler_0/tspc_1/a_630_n680# divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1282 divider_0/and_0/out1 divider_0/and_0/A 0.01fF +C1283 divider_0/tspc_0/Z1 divider_0/tspc_0/Z2 1.07fF +C1284 ro_complete_buffered_0/tapered_buf_2/a_210_n610# ro_complete_buffered_0/tapered_buf_2/a_580_0# 0.84fF +C1285 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/a_160_230# 0.09fF +C1286 cp_buffered_0/tapered_buf_0/a_4670_0# cp_buffered_0/tapered_buf_0/a_210_n610# 29.21fF +C1287 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF +C1288 divider_1/and_0/OUT divider_1/clk 0.04fF +C1289 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF +C1290 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF +C1291 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF +C1292 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/vco 1.46fF +C1293 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/a_160_230# 0.09fF +C1294 ro_complete_buffered_0/tapered_buf_5/a_4670_0# ro_complete_buffered_0/tapered_buf_5/a_210_n610# 29.21fF +C1295 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF +C1296 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Q 0.05fF +C1297 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_580_0# 0.35fF +C1298 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/a_n10_n140# 0.01fF +C1299 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/switch_0/vin 0.19fF +C1300 pll_full_1/ro_complete_0/cbank_2/switch_3/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF +C1301 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.38fF +C1302 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/out1 0.31fF +C1303 div_pd_buffered_0/divider_0/tspc_1/Z4 div_pd_buffered_0/divider_0/tspc_0/Q 0.15fF +C1304 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin ro_complete_buffered_0/tapered_buf_6/in 1.43fF +C1305 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.15fF +C1306 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/and_0/A 0.01fF +C1307 divider_0/nor_1/A divider_0/prescaler_0/tspc_1/Q 0.03fF +C1308 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/clk 0.01fF +C1309 divider_1/tspc_1/Z2 divider_1/tspc_1/Z3 0.16fF +C1310 divider_1/prescaler_0/m1_2700_2190# divider_1/and_0/OUT 0.14fF +C1311 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z2 0.25fF +C1312 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_1/Z1 0.08fF +C1313 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF +C1314 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF +C1315 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z1 0.09fF +C1316 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.09fF +C1317 div_pd_buffered_0/tapered_buf_4/a_4670_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 29.21fF +C1318 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF +C1319 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/vco 0.01fF +C1320 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_1650_0# 1.27fF +C1321 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar1 0.01fF +C1322 div_pd_buffered_0/pd_0/DOWN div_pd_buffered_0/pd_0/R 0.36fF +C1323 div_pd_buffered_0/pd_0/tspc_r_1/Z1 div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.71fF +C1324 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z4 0.20fF +C1325 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/z5 0.04fF +C1326 divider_1/nor_1/B divider_1/tspc_1/Z4 0.21fF +C1327 divider_0/mc2 divider_0/and_0/A 0.16fF +C1328 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Z3 0.11fF +C1329 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.05fF +C1330 gnd ro_complete_buffered_0/tapered_buf_1/a_4670_0# 82.48fF +C1331 cp_buffered_0/tapered_buf_2/a_4670_0# cp_buffered_0/tapered_buf_2/a_210_n610# 29.21fF +C1332 div_pd_buffered_0/divider_0/tspc_1/Z2 div_pd_buffered_0/divider_0/tspc_1/Z4 0.36fF +C1333 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/nor_1/B 0.35fF +C1334 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/tspc_1/Q 0.05fF +C1335 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/tspc_0/Z2 0.01fF +C1336 div_pd_buffered_0/divider_0/nor_0/Z1 div_pd_buffered_0/divider_0/and_0/B 0.78fF +C1337 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_0/Z4 0.21fF +C1338 pd_buffered_0/tapered_buf_0/a_n10_230# pd_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF +C1339 div_pd_buffered_0/divider_0/nor_0/B div_pd_buffered_0/divider_0/and_0/B 0.29fF +C1340 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF +C1341 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z3 0.45fF +C1342 pll_full_1/divider_0/tspc_0/a_630_n680# pll_full_1/divider_0/tspc_0/Q 0.04fF +C1343 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/and_0/A 0.26fF +C1344 filter_0/v filter_0/a_4216_n2998# 0.36fF +C1345 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C1346 divider_0/nor_1/A divider_0/tspc_0/Z2 0.23fF +C1347 divider_1/nor_1/A divider_1/prescaler_0/tspc_1/Q 0.03fF +C1348 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/D 0.15fF +C1349 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF +C1350 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C1351 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z2 0.25fF +C1352 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z3 0.06fF +C1353 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_n10_n140# 0.05fF +C1354 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 0.84fF +C1355 pll_full_1/pd_0/tspc_r_1/Z2 pll_full_1/pd_0/tspc_r_1/Z1 0.71fF +C1356 pll_full_1/ro_complete_0/cbank_1/switch_3/vin pll_full_1/ro_complete_0/cbank_1/switch_4/vin 0.20fF +C1357 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF +C1358 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C1359 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_1/Z4 0.02fF +C1360 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.36fF +C1361 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/DOWN 0.11fF +C1362 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/and_0/OUT 0.05fF +C1363 cp_buffered_0/tapered_buf_2/a_160_n140# cp_buffered_0/tapered_buf_2/a_580_0# 0.35fF +C1364 pd_buffered_0/tapered_buf_0/a_580_0# pd_buffered_0/tapered_buf_0/a_1650_0# 1.27fF +C1365 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/div 0.19fF +C1366 divider_0/tspc_1/a_630_n680# divider_0/tspc_1/Q 0.04fF +C1367 divider_0/tspc_1/Z2 divider_0/tspc_1/Z3 0.16fF +C1368 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z3 0.33fF +C1369 divider_0/nor_1/B divider_0/nor_1/A 1.21fF +C1370 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z3 0.16fF +C1371 pll_full_1/divider_0/nor_0/B pll_full_1/divider_0/tspc_2/Z4 0.22fF +C1372 divider_1/tspc_1/Q divider_1/tspc_2/Z3 0.45fF +C1373 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_1650_0# 2.89fF +C1374 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF +C1375 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Q 0.05fF +C1376 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/Z1 0.09fF +C1377 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z2 0.19fF +C1378 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z3 0.65fF +C1379 div_pd_buffered_0/divider_0/tspc_0/Z4 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# 0.12fF +C1380 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.11fF +C1381 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF +C1382 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_1/Z4 0.21fF +C1383 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.06fF +C1384 pll_full_1/ro_complete_0/a0 pll_full_1/vco 0.11fF +C1385 div_pd_buffered_0/divider_0/tspc_1/Q div_pd_buffered_0/divider_0/tspc_2/Z2 0.14fF +C1386 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.32fF +C1387 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/clk 0.01fF +C1388 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/a_1710_0# 0.83fF +C1389 divider_0/nor_1/B divider_0/nor_0/B 0.47fF +C1390 pll_full_1/divider_0/and_0/A pll_full_1/divider_0/and_0/B 0.18fF +C1391 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF +C1392 divider_1/mc2 divider_1/and_0/out1 0.06fF +C1393 divider_1/tspc_0/Z2 divider_1/tspc_0/Z3 0.16fF +C1394 divider_1/prescaler_0/tspc_1/Z2 divider_1/and_0/OUT 0.06fF +C1395 div_pd_buffered_0/tapered_buf_3/a_160_n140# div_pd_buffered_0/tapered_buf_3/a_160_230# 0.17fF +C1396 divider_1/tspc_2/Z2 divider_1/tspc_2/Z3 0.16fF +C1397 divider_1/nor_0/B divider_1/tspc_2/Z4 0.22fF +C1398 ro_complete_0/a0 ro_complete_0/cbank_1/v 0.05fF +C1399 div_pd_buffered_0/pd_0/tspc_r_0/Qbar div_pd_buffered_0/pd_0/R 0.03fF +C1400 divider_0/tspc_0/Q divider_0/tspc_0/a_630_n680# 0.04fF +C1401 cp_buffered_0/tapered_buf_2/a_n10_230# cp_buffered_0/tapered_buf_2/a_160_230# 0.09fF +C1402 divider_1/prescaler_0/tspc_0/Z4 divider_1/prescaler_0/tspc_0/Z2 0.36fF +C1403 div_pd_buffered_0/divider_0/tspc_1/Z3 div_pd_buffered_0/divider_0/nor_1/B 0.38fF +C1404 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C1405 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF +C1406 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C1407 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z2 0.01fF +C1408 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin ro_complete_buffered_0/tapered_buf_6/in 1.30fF +C1409 pd_buffered_0/tapered_buf_1/a_580_0# pd_buffered_0/tapered_buf_1/a_160_n140# 0.35fF +C1410 pd_buffered_0/pd_0/tspc_r_1/Z2 pd_buffered_0/pd_0/tspc_r_1/Z4 0.14fF +C1411 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/divider_0/prescaler_0/nand_0/z1 0.24fF +C1412 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z3 0.06fF +C1413 cp_buffered_0/cp_0/down cp_buffered_0/cp_0/out 0.79fF +C1414 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z3 0.11fF +C1415 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF +C1416 divider_1/tspc_1/Z3 divider_1/tspc_1/Z4 0.65fF +C1417 divider_1/and_0/A divider_1/and_0/B 0.18fF +C1418 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.45fF +C1419 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_0/Q 0.01fF +C1420 div_pd_buffered_0/pd_0/tspc_r_0/z5 div_pd_buffered_0/pd_0/UP 0.03fF +C1421 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_1/Q 0.06fF +C1422 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a3 3.17fF +C1423 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF +C1424 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.13fF +C1425 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF +C1426 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_1/Q 0.51fF +C1427 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF +C1428 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF +C1429 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.04fF +C1430 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/clk 0.51fF +C1431 divider_0/nor_1/B divider_0/tspc_1/Z3 0.38fF +C1432 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/a_630_n680# 0.12fF +C1433 pd_buffered_0/tapered_buf_0/a_n10_230# pd_buffered_0/pd_0/UP 0.02fF +C1434 pd_buffered_0/tapered_buf_0/a_210_n610# pd_buffered_0/tapered_buf_0/a_1650_0# 2.89fF +C1435 pll_full_1/divider_0/prescaler_0/tspc_2/D pll_full_1/vco 0.26fF +C1436 cp_buffered_0/tapered_buf_1/a_210_n610# cp_buffered_0/cp_0/out 26.29fF +C1437 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/tspc_r_0/Qbar1 0.38fF +C1438 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C1439 divider_0/nor_0/B divider_0/tspc_2/Z1 0.03fF +C1440 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z3 0.05fF +C1441 ro_complete_0/a2 ro_complete_0/cbank_2/switch_2/vin 0.14fF +C1442 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/cbank_0/v 1.30fF +C1443 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/nor_1/B 0.38fF +C1444 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z1 0.00fF +C1445 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF +C1446 pll_full_0/ro_complete_0/a2 pll_full_0/vco 0.11fF +C1447 divider_1/prescaler_0/tspc_2/D divider_1/prescaler_0/nand_0/z1 0.24fF +C1448 divider_1/prescaler_0/tspc_0/a_630_n680# divider_1/clk 0.01fF +C1449 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/prescaler_0/tspc_0/a_740_n680# 0.19fF +C1450 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z1 0.03fF +C1451 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF +C1452 div_pd_buffered_0/tapered_buf_1/a_160_n140# div_pd_buffered_0/tapered_buf_1/a_n10_n140# 0.05fF +C1453 div_pd_buffered_0/pd_0/and_pd_0/Z1 div_pd_buffered_0/pd_0/UP 0.06fF +C1454 pll_full_1/ro_complete_0/a5 pll_full_1/ro_complete_0/cbank_1/switch_0/vin 0.09fF +C1455 pll_full_1/ro_complete_0/cbank_0/switch_4/vin pll_full_1/ro_complete_0/cbank_0/v 1.30fF +C1456 cp_buffered_0/tapered_buf_2/a_4670_0# cp_buffered_0/tapered_buf_2/a_1650_0# 4.78fF +C1457 pd_buffered_0/pd_0/tspc_r_0/Z1 pd_buffered_0/pd_0/tspc_r_0/Z2 0.71fF +C1458 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/tspc_r_0/Z4 0.20fF +C1459 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF +C1460 divider_0/prescaler_0/Out divider_0/clk 0.51fF +C1461 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF +C1462 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z3 0.45fF +C1463 pll_full_1/ro_complete_0/a3 pll_full_1/vco 0.11fF +C1464 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/tspc_2/Z2 0.20fF +C1465 divider_0/prescaler_0/m1_2700_2190# divider_0/nor_1/A 0.01fF +C1466 divider_0/tspc_1/Z1 divider_0/tspc_1/Z4 0.00fF +C1467 cp_buffered_0/tapered_buf_0/a_n10_230# cp_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF +C1468 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.01fF +C1469 div_pd_buffered_0/tapered_buf_2/a_n10_n140# div_pd_buffered_0/tapered_buf_2/in 0.04fF +C1470 divider_1/prescaler_0/Out divider_1/clk 0.51fF +C1471 ro_complete_0/a3 ro_complete_0/cbank_1/v 0.05fF +C1472 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF +C1473 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/vco 1.58fF +C1474 divider_1/prescaler_0/tspc_2/D divider_1/clk 0.26fF +C1475 ro_complete_buffered_0/tapered_buf_5/a_n10_230# ro_complete_buffered_0/tapered_buf_5/a_n10_n140# 0.01fF +C1476 pd_buffered_0/tapered_buf_2/a_n10_230# pd_buffered_0/tapered_buf_2/in 0.02fF +C1477 div_pd_buffered_0/tapered_buf_1/a_210_n610# div_pd_buffered_0/tapered_buf_1/a_580_0# 0.84fF +C1478 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/in 0.02fF +C1479 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/prescaler_0/m1_2700_2190# 0.11fF +C1480 pd_buffered_0/pd_0/tspc_r_0/Z4 pd_buffered_0/pd_0/tspc_r_1/Z4 0.02fF +C1481 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/DOWN 0.11fF +C1482 pd_buffered_0/pd_0/DIV pd_buffered_0/pd_0/tspc_r_1/Z1 0.17fF +C1483 ro_complete_buffered_0/ro_complete_0/a5 ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.08fF +C1484 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF +C1485 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.05fF +C1486 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF +C1487 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Z4 0.02fF +C1488 divider_1/prescaler_0/Out divider_1/prescaler_0/m1_2700_2190# 0.11fF +C1489 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/clk 0.14fF +C1490 divider_0/and_0/OUT divider_0/prescaler_0/tspc_2/D 0.03fF +C1491 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/clk 0.01fF +C1492 divider_1/tspc_1/Z2 divider_1/nor_1/A 0.15fF +C1493 divider_1/tspc_0/Z2 divider_1/tspc_0/Z4 0.36fF +C1494 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_2/D 0.16fF +C1495 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z3 0.65fF +C1496 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF +C1497 div_pd_buffered_0/tapered_buf_4/a_n10_230# div_pd_buffered_0/tapered_buf_4/a_n10_n140# 0.01fF +C1498 pll_full_0/pd_0/tspc_r_0/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF +C1499 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 div_pd_buffered_0/pd_0/tspc_r_1/z5 0.20fF +C1500 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.17fF +C1501 ro_complete_buffered_0/tapered_buf_6/a_1650_0# ro_complete_buffered_0/tapered_buf_6/a_4670_0# 4.78fF +C1502 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_1/switch_3/vin 0.09fF +C1503 cp_buffered_0/tapered_buf_2/a_n10_230# cp_buffered_0/tapered_buf_2/a_n10_n140# 0.01fF +C1504 pd_buffered_0/tapered_buf_3/a_580_0# pd_buffered_0/tapered_buf_3/a_160_230# 0.02fF +C1505 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/a_210_n610# 0.22fF +C1506 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF +C1507 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/D 0.03fF +C1508 gnd ro_complete_buffered_0/ro_complete_0/a4 87.74fF +C1509 ro_complete_buffered_0/tapered_buf_1/a_580_0# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 1.27fF +C1510 ro_complete_buffered_0/tapered_buf_1/in ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.19fF +C1511 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C1512 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z3 0.06fF +C1513 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/Z2 0.11fF +C1514 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1515 divider_0/nor_1/Z1 divider_0/and_0/B 0.18fF +C1516 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C1517 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/Z4 0.15fF +C1518 divider_0/nor_1/A divider_0/and_0/A 0.01fF +C1519 cp_buffered_0/tapered_buf_1/a_580_0# cp_buffered_0/tapered_buf_1/a_160_230# 0.02fF +C1520 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/a_210_n610# 0.22fF +C1521 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_1/Qbar 0.21fF +C1522 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.45fF +C1523 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/D 0.05fF +C1524 divider_0/prescaler_0/tspc_0/Z1 divider_0/prescaler_0/tspc_0/Z4 0.00fF +C1525 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/a_160_230# 0.09fF +C1526 ro_complete_buffered_0/tapered_buf_4/a_4670_0# ro_complete_buffered_0/tapered_buf_4/a_210_n610# 29.21fF +C1527 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF +C1528 io_clamp_low[2] io_analog[6] 0.53fF +C1529 div_pd_buffered_0/pd_0/and_pd_0/Out1 div_pd_buffered_0/pd_0/and_pd_0/Z1 0.18fF +C1530 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.20fF +C1531 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D 0.09fF +C1532 divider_1/nor_1/B divider_1/tspc_2/Z4 0.02fF +C1533 pll_full_1/divider_0/tspc_0/Z4 pll_full_1/divider_0/tspc_0/a_630_n680# 0.12fF +C1534 pd_buffered_0/tapered_buf_0/a_1650_0# pd_buffered_0/tapered_buf_0/a_4670_0# 4.78fF +C1535 div_pd_buffered_0/tapered_buf_3/a_n10_230# div_pd_buffered_0/tapered_buf_3/a_n10_n140# 0.01fF +C1536 divider_0/nor_1/B divider_0/tspc_1/Q 0.51fF +C1537 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Z4 0.08fF +C1538 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z3 0.05fF +C1539 pll_full_1/divider_0/tspc_2/Z2 pll_full_1/divider_0/tspc_2/Z4 0.36fF +C1540 pll_full_1/divider_0/tspc_2/Z3 pll_full_1/div 0.05fF +C1541 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 4.58fF +C1542 pll_full_0/pd_0/R pll_full_0/div 0.51fF +C1543 pll_full_1/pd_0/tspc_r_1/Z3 pll_full_1/pd_0/tspc_r_1/Z4 0.20fF +C1544 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF +C1545 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C1546 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.05fF +C1547 pll_full_1/pd_0/DOWN pll_full_1/pd_0/UP 4.58fF +C1548 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF +C1549 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/Z2 0.36fF +C1550 divider_1/tspc_1/Q divider_1/tspc_2/Z4 0.15fF +C1551 divider_1/nor_1/A divider_1/and_0/A 0.01fF +C1552 pll_full_1/filter_0/a_4216_n5230# pll_full_1/vco 1.58fF +C1553 pll_full_0/div pll_full_0/vco 2.26fF +C1554 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_580_0# 0.35fF +C1555 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF +C1556 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.28fF +C1557 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF +C1558 pll_full_1/ro_complete_0/a3 pll_full_1/ro_complete_0/cbank_2/switch_2/vin 0.09fF +C1559 pd_buffered_0/pd_0/tspc_r_0/Z3 pd_buffered_0/pd_0/R 0.29fF +C1560 div_pd_buffered_0/divider_0/nor_1/B div_pd_buffered_0/divider_0/and_0/B 0.31fF +C1561 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.22fF +C1562 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.04fF +C1563 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 0.06fF +C1564 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z2 0.19fF +C1565 divider_0/nor_1/A divider_0/tspc_1/Z4 0.02fF +C1566 divider_0/nor_1/B divider_0/tspc_2/Z2 0.20fF +C1567 divider_1/nor_1/Z1 divider_1/and_0/A 0.80fF +C1568 ro_complete_buffered_0/tapered_buf_3/a_160_n140# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.35fF +C1569 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/tspc_r_0/Qbar 0.01fF +C1570 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Q 0.55fF +C1571 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/vco 1.46fF +C1572 divider_1/tspc_2/Z2 divider_1/tspc_2/Z4 0.36fF +C1573 divider_1/tspc_2/Z3 divider_1/Out 0.05fF +C1574 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 0.12fF +C1575 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_580_0# 0.84fF +C1576 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF +C1577 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# div_pd_buffered_0/divider_0/nor_1/B 0.01fF +C1578 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.91fF +C1579 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C1580 pll_full_1/ro_complete_0/cbank_2/switch_1/vin pll_full_1/ro_complete_0/cbank_2/v 1.30fF +C1581 div_pd_buffered_0/divider_0/tspc_2/Z1 div_pd_buffered_0/divider_0/tspc_2/Z4 0.00fF +C1582 divider_1/tspc_0/Z1 divider_1/tspc_0/Z3 0.06fF +C1583 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF +C1584 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z3 0.05fF +C1585 ro_complete_buffered_0/ro_complete_0/cbank_0/v ro_complete_buffered_0/ro_complete_0/cbank_2/v 0.04fF +C1586 pll_full_1/divider_0/nor_1/B pll_full_1/divider_0/tspc_2/Z4 0.02fF +C1587 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/prescaler_0/tspc_2/Q 0.04fF +C1588 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/vco 0.45fF +C1589 cp_buffered_0/cp_0/a_1710_n2840# cp_buffered_0/cp_0/out 0.61fF +C1590 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Z4 0.28fF +C1591 divider_0/tspc_1/Q divider_0/tspc_2/Z1 0.01fF +C1592 divider_1/nor_1/A divider_1/tspc_1/Z4 0.02fF +C1593 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z3 0.06fF +C1594 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF +C1595 ro_complete_buffered_0/tapered_buf_4/a_160_n140# ro_complete_buffered_0/tapered_buf_4/a_580_0# 0.35fF +C1596 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z1 0.01fF +C1597 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/Q 0.22fF +C1598 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/R 0.30fF +C1599 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_160_230# 0.17fF +C1600 pll_full_1/ro_complete_0/cbank_0/switch_3/vin pll_full_1/ro_complete_0/cbank_0/switch_4/vin 0.20fF +C1601 divider_0/prescaler_0/Out divider_0/prescaler_0/tspc_1/Q 0.91fF +C1602 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C1603 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF +C1604 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/clk 0.04fF +C1605 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF +C1606 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF +C1607 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.03fF +C1608 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF +C1609 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Z4 0.01fF +C1610 divider_1/prescaler_0/Out divider_1/prescaler_0/tspc_1/Q 0.91fF +C1611 divider_0/nor_0/B divider_0/tspc_2/Z3 0.38fF +C1612 divider_0/tspc_2/a_630_n680# divider_0/tspc_2/Z4 0.12fF +C1613 divider_0/tspc_2/Z1 divider_0/tspc_2/Z2 1.07fF +C1614 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/DOWN 0.07fF +C1615 div_pd_buffered_0/tapered_buf_2/a_160_n140# div_pd_buffered_0/tapered_buf_2/a_580_0# 0.35fF +C1616 divider_1/tspc_1/a_630_n680# divider_1/nor_0/B 0.00fF +C1617 divider_1/and_0/OUT divider_1/prescaler_0/tspc_2/Q 0.04fF +C1618 divider_1/prescaler_0/tspc_1/Z3 divider_1/clk 0.45fF +C1619 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/switch_5/vin 0.20fF +C1620 pll_full_1/pd_0/DOWN pll_full_1/ref 1.48fF +C1621 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF +C1622 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/A 0.80fF +C1623 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C1624 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z3 0.16fF +C1625 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z3 0.38fF +C1626 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF +C1627 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF +C1628 ro_complete_buffered_0/tapered_buf_7/a_n10_230# ro_complete_buffered_0/tapered_buf_7/in 0.02fF +C1629 div_pd_buffered_0/tapered_buf_0/a_n10_230# div_pd_buffered_0/tapered_buf_0/a_n10_n140# 0.01fF +C1630 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF +C1631 divider_0/prescaler_0/Out divider_0/tspc_0/Z2 0.11fF +C1632 ro_complete_buffered_0/tapered_buf_0/a_210_n610# ro_complete_buffered_0/tapered_buf_0/a_1650_0# 2.89fF +C1633 ro_complete_buffered_0/ro_complete_0/a1 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.09fF +C1634 pd_buffered_0/pd_0/tspc_r_0/Qbar1 pd_buffered_0/pd_0/tspc_r_0/z5 0.20fF +C1635 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/clk 0.11fF +C1636 divider_1/prescaler_0/tspc_0/a_740_n680# divider_1/prescaler_0/tspc_1/Q 0.15fF +C1637 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/clk 0.01fF +C1638 divider_0/tspc_1/Z3 divider_0/tspc_1/Z4 0.65fF +C1639 divider_0/prescaler_0/tspc_2/a_740_n680# divider_0/prescaler_0/tspc_2/Q 0.20fF +C1640 divider_0/prescaler_0/tspc_1/Z1 divider_0/prescaler_0/tspc_1/Z3 0.06fF +C1641 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF +C1642 div_pd_buffered_0/tapered_buf_2/a_n10_n140# div_pd_buffered_0/tapered_buf_2/a_160_n140# 0.05fF +C1643 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z3 0.33fF +C1644 divider_1/mc2 divider_1/nor_0/B 0.15fF +C1645 divider_0/and_0/out1 divider_0/and_0/Z1 0.36fF +C1646 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.04fF +C1647 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF +C1648 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF +C1649 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF +C1650 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF +C1651 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF +C1652 div_pd_buffered_0/pd_0/tspc_r_0/Z4 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.04fF +C1653 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF +C1654 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/m1_2700_2190# 0.19fF +C1655 ro_complete_buffered_0/ro_complete_0/a0 ro_complete_buffered_0/tapered_buf_6/in 0.05fF +C1656 pd_buffered_0/tapered_buf_1/a_160_230# pd_buffered_0/tapered_buf_1/a_160_n140# 0.17fF +C1657 pd_buffered_0/pd_0/tspc_r_0/z5 pd_buffered_0/pd_0/tspc_r_1/z5 0.02fF +C1658 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/tspc_r_1/Z2 0.25fF +C1659 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_0/Q 0.01fF +C1660 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/divider_0/prescaler_0/tspc_2/D 0.11fF +C1661 div_pd_buffered_0/tapered_buf_2/a_n10_230# div_pd_buffered_0/tapered_buf_2/a_160_230# 0.09fF +C1662 divider_0/nor_1/B divider_0/and_0/B 0.31fF +C1663 divider_0/and_0/OUT divider_0/prescaler_0/nand_0/z1 0.01fF +C1664 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# ro_complete_buffered_0/tapered_buf_2/a_n10_230# 0.01fF +C1665 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/nand_0/z1 0.07fF +C1666 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF +C1667 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF +C1668 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/vco 0.11fF +C1669 ro_complete_buffered_0/tapered_buf_6/a_160_n140# ro_complete_buffered_0/tapered_buf_6/a_n10_n140# 0.05fF +C1670 ro_complete_buffered_0/tapered_buf_6/a_580_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 0.84fF +C1671 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/a4 0.12fF +C1672 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_0/switch_3/vin 0.09fF +C1673 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 div_pd_buffered_0/pd_0/UP 0.11fF +C1674 divider_0/tspc_0/Q divider_0/tspc_1/Z1 0.01fF +C1675 gnd ro_complete_buffered_0/tapered_buf_1/a_160_n140# 1.34fF +C1676 pd_buffered_0/tapered_buf_3/a_160_n140# pd_buffered_0/tapered_buf_3/in 0.19fF +C1677 pd_buffered_0/tapered_buf_3/a_1650_0# pd_buffered_0/tapered_buf_3/a_210_n610# 2.89fF +C1678 divider_1/tspc_0/Z1 divider_1/tspc_0/Z4 0.00fF +C1679 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.45fF +C1680 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/UP 1.06fF +C1681 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/vco 0.45fF +C1682 cp_buffered_0/tapered_buf_1/a_160_n140# cp_buffered_0/tapered_buf_1/in 0.19fF +C1683 cp_buffered_0/tapered_buf_1/a_1650_0# cp_buffered_0/tapered_buf_1/a_210_n610# 2.89fF +C1684 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C1685 pll_full_0/ref pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF +C1686 divider_0/and_0/OUT divider_0/clk 0.04fF +C1687 ro_complete_0/cbank_1/switch_3/vin ro_complete_0/cbank_1/switch_4/vin 0.20fF +C1688 divider_1/prescaler_0/tspc_2/Z4 divider_1/prescaler_0/tspc_2/D 0.11fF +C1689 divider_1/prescaler_0/m1_2700_2190# divider_1/clk 0.01fF +C1690 pll_full_1/pd_0/tspc_r_1/Z4 pll_full_1/pd_0/tspc_r_1/Z2 0.14fF +C1691 ro_complete_buffered_0/tapered_buf_4/a_n10_230# ro_complete_buffered_0/tapered_buf_4/a_n10_n140# 0.01fF +C1692 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/div 0.03fF +C1693 pll_full_0/divider_0/and_0/OUT pll_full_0/vco 0.06fF +C1694 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF +C1695 ro_complete_buffered_0/tapered_buf_7/a_160_n140# ro_complete_buffered_0/tapered_buf_7/a_580_0# 0.35fF +C1696 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 1.07fF +C1697 pll_full_1/ro_complete_0/cbank_1/switch_1/vin pll_full_1/ro_complete_0/cbank_1/switch_2/vin 0.20fF +C1698 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin 0.12fF +C1699 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF +C1700 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin ro_complete_buffered_0/ro_complete_0/cbank_0/v 1.30fF +C1701 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/tspc_r_0/Qbar1 0.12fF +C1702 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 0.65fF +C1703 pll_full_1/ro_complete_0/a4 pll_full_1/vco 0.01fF +C1704 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q 0.04fF +C1705 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Z4 0.12fF +C1706 divider_0/prescaler_0/tspc_2/Z1 divider_0/prescaler_0/tspc_2/Z2 1.07fF +C1707 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF +C1708 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z3 0.16fF +C1709 ro_complete_buffered_0/tapered_buf_3/a_160_230# ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.17fF +C1710 ro_complete_buffered_0/tapered_buf_3/in ro_complete_buffered_0/tapered_buf_3/a_n10_230# 0.02fF +C1711 ro_complete_0/a4 ro_complete_0/cbank_1/v 0.05fF +C1712 divider_1/prescaler_0/tspc_2/Z3 divider_1/clk 0.45fF +C1713 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/vco 0.64fF +C1714 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z4 0.02fF +C1715 pd_buffered_0/tapered_buf_2/a_580_0# pd_buffered_0/tapered_buf_2/a_1650_0# 1.27fF +C1716 ro_complete_buffered_0/tapered_buf_1/a_n10_230# ro_complete_buffered_0/tapered_buf_1/a_160_230# 0.09fF +C1717 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/nor_1/A 0.15fF +C1718 pll_full_1/ro_complete_0/cbank_0/switch_5/vin pll_full_1/ro_complete_0/a0 0.09fF +C1719 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z2 0.01fF +C1720 divider_0/tspc_0/Z3 divider_0/tspc_0/Z2 0.16fF +C1721 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/clk 0.14fF +C1722 ro_complete_buffered_0/ro_complete_0/a3 ro_complete_buffered_0/tapered_buf_6/in 0.05fF +C1723 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.00fF +C1724 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 pll_full_1/divider_0/prescaler_0/tspc_1/Q 0.21fF +C1725 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.01fF +C1726 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/clk 0.11fF +C1727 pll_full_1/divider_0/and_0/B pll_full_1/divider_0/and_0/Z1 0.07fF +C1728 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_1/z5 0.03fF +C1729 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_0/z5 0.04fF +C1730 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF +C1731 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF +C1732 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/div 0.17fF +C1733 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Z4 0.65fF +C1734 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.15fF +C1735 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/A 0.01fF +C1736 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/UP 0.03fF +C1737 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/DOWN 0.03fF +C1738 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF +C1739 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D 0.09fF +C1740 divider_1/nor_1/B divider_1/tspc_1/a_630_n680# 0.35fF +C1741 divider_0/prescaler_0/Out divider_0/prescaler_0/m1_2700_2190# 0.11fF +C1742 ro_complete_buffered_0/tapered_buf_1/a_160_230# ro_complete_buffered_0/tapered_buf_1/a_160_n140# 0.17fF +C1743 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_1650_0# 2.89fF +C1744 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z3 0.05fF +C1745 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Z4 0.12fF +C1746 pd_buffered_0/pd_0/DOWN pd_buffered_0/pd_0/and_pd_0/Out1 0.12fF +C1747 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/UP 0.21fF +C1748 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z3 0.06fF +C1749 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 pll_full_1/vco 0.12fF +C1750 div_pd_buffered_0/divider_0/tspc_2/Z3 div_pd_buffered_0/divider_0/tspc_2/Z4 0.65fF +C1751 divider_0/tspc_1/Q divider_0/tspc_2/Z3 0.45fF +C1752 divider_0/tspc_0/Z4 divider_0/tspc_0/Z2 0.36fF +C1753 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/div 0.65fF +C1754 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_160_n140# 0.17fF +C1755 ro_complete_buffered_0/tapered_buf_2/a_1650_0# ro_complete_buffered_0/tapered_buf_2/a_580_0# 1.27fF +C1756 pll_full_1/pd_0/and_pd_0/Z1 pll_full_1/pd_0/UP 0.06fF +C1757 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_0/Z4 0.21fF +C1758 divider_1/tspc_1/a_630_n680# divider_1/tspc_1/Q 0.04fF +C1759 divider_1/prescaler_0/tspc_2/Z1 divider_1/prescaler_0/tspc_2/Z4 0.00fF +C1760 divider_1/prescaler_0/tspc_1/Z3 divider_1/prescaler_0/tspc_1/Q 0.21fF +C1761 divider_1/prescaler_0/tspc_1/Z2 divider_1/clk 0.11fF +C1762 ro_complete_buffered_0/tapered_buf_4/a_580_0# ro_complete_buffered_0/tapered_buf_4/a_1650_0# 1.27fF +C1763 div_pd_buffered_0/tapered_buf_4/a_160_n140# div_pd_buffered_0/tapered_buf_4/a_n10_n140# 0.05fF +C1764 div_pd_buffered_0/tapered_buf_4/a_580_0# div_pd_buffered_0/tapered_buf_4/a_210_n610# 0.84fF +C1765 divider_1/and_0/B divider_1/and_0/Z1 0.07fF +C1766 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z3 0.45fF +C1767 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/tspc_0/Q 0.04fF +C1768 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/A 0.26fF +C1769 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF +C1770 div_pd_buffered_0/pd_0/R div_pd_buffered_0/pd_0/and_pd_0/Z1 0.02fF +C1771 divider_1/nor_1/B divider_1/mc2 0.06fF +C1772 pll_full_1/ro_complete_0/cbank_0/switch_1/vin pll_full_1/ro_complete_0/a3 0.13fF +C1773 cp_buffered_0/tapered_buf_2/a_n10_n140# cp_buffered_0/tapered_buf_2/in 0.04fF +C1774 pd_buffered_0/tapered_buf_3/a_210_n610# pd_buffered_0/pd_0/REF 26.29fF +C1775 pd_buffered_0/tapered_buf_2/a_210_n610# pd_buffered_0/pd_0/DIV 26.29fF +C1776 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C1777 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF +C1778 divider_0/tspc_0/Q divider_0/nor_1/A 0.55fF +C1779 divider_0/prescaler_0/tspc_0/a_630_n680# divider_0/clk 0.01fF +C1780 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/D 0.09fF +C1781 ro_complete_buffered_0/ro_complete_0/a2 ro_complete_buffered_0/ro_complete_0/a1 3.18fF +C1782 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/tspc_1/a_630_n680# 0.01fF +C1783 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 1.07fF +C1784 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 pll_full_1/divider_0/prescaler_0/tspc_0/D 0.05fF +C1785 divider_1/prescaler_0/tspc_1/a_630_n680# divider_1/prescaler_0/tspc_1/Q 0.04fF +C1786 divider_0/prescaler_0/tspc_1/Z4 divider_0/prescaler_0/tspc_1/Z2 0.36fF +C1787 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C1788 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/nor_0/B 0.35fF +C1789 pll_full_1/divider_0/prescaler_0/tspc_1/Q pll_full_1/vco 0.60fF +C1790 divider_0/tspc_2/Z2 divider_0/tspc_2/Z3 0.16fF +C1791 divider_0/nor_0/B divider_0/tspc_2/Z4 0.22fF +C1792 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF +C1793 ro_complete_0/a5 ro_complete_0/cbank_1/switch_0/vin 0.09fF +C1794 ro_complete_0/cbank_0/switch_4/vin ro_complete_0/cbank_0/v 1.30fF +C1795 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z4 0.02fF +C1796 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF +C1797 divider_1/prescaler_0/tspc_1/Z4 divider_1/clk 0.12fF +C1798 divider_0/prescaler_0/tspc_0/Z2 divider_0/prescaler_0/tspc_0/Z4 0.36fF +C1799 divider_0/prescaler_0/tspc_0/Z3 divider_0/prescaler_0/Out 0.05fF +C1800 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF +C1801 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z4 0.22fF +C1802 div_pd_buffered_0/divider_0/prescaler_0/Out div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF +C1803 divider_0/nor_0/Z1 divider_0/nor_0/B 0.06fF +C1804 pd_buffered_0/pd_0/REF pd_buffered_0/pd_0/DIV 0.51fF +C1805 pd_buffered_0/tapered_buf_1/a_160_230# pd_buffered_0/tapered_buf_1/a_580_0# 0.02fF +C1806 pll_full_1/divider_0/tspc_0/Z1 pll_full_1/divider_0/tspc_0/Z2 1.07fF +C1807 pll_full_1/ro_complete_0/a1 pll_full_1/vco 0.11fF +C1808 divider_0/prescaler_0/tspc_2/a_630_n680# divider_0/prescaler_0/tspc_2/Q 0.04fF +C1809 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Z4 0.08fF +C1810 divider_1/prescaler_0/tspc_0/Z1 divider_1/prescaler_0/tspc_0/D 0.03fF +C1811 divider_0/and_0/A divider_0/and_0/B 0.18fF +C1812 cp_buffered_0/tapered_buf_0/a_n10_n140# cp_buffered_0/tapered_buf_0/in 0.04fF +C1813 pll_full_0/pd_0/tspc_r_1/z5 pll_full_0/div 0.04fF +C1814 ro_complete_0/a1 ro_complete_0/cbank_1/v 0.05fF +C1815 pll_full_1/pd_0/tspc_r_0/Qbar1 pll_full_1/pd_0/R 0.30fF +C1816 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z4 0.21fF +C1817 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF +C1818 pll_full_0/ro_complete_0/a0 pll_full_0/vco 0.11fF +C1819 divider_1/tspc_2/a_630_n680# divider_1/nor_0/B 0.35fF +C1820 divider_1/prescaler_0/tspc_1/Q divider_1/clk 0.60fF +C1821 ro_complete_buffered_0/tapered_buf_5/a_n10_n140# ro_complete_buffered_0/tapered_buf_5/in 0.04fF +C1822 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/R 0.61fF +C1823 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF +C1824 div_pd_buffered_0/tapered_buf_1/a_n10_230# div_pd_buffered_0/tapered_buf_1/in 0.02fF +C1825 pll_full_1/ro_complete_0/a0 pll_full_1/ro_complete_0/cbank_2/switch_4/vin 0.13fF +C1826 cp_buffered_0/tapered_buf_2/a_210_n610# cp_buffered_0/tapered_buf_2/a_580_0# 0.84fF +C1827 pd_buffered_0/pd_0/tspc_r_0/Qbar pd_buffered_0/pd_0/and_pd_0/Out1 0.05fF +C1828 pd_buffered_0/pd_0/tspc_r_1/Qbar1 pd_buffered_0/pd_0/tspc_r_1/Qbar 0.01fF +C1829 pd_buffered_0/pd_0/tspc_r_1/Z3 pd_buffered_0/pd_0/R 0.27fF +C1830 div_pd_buffered_0/tapered_buf_0/a_210_n610# div_pd_buffered_0/tapered_buf_0/a_4670_0# 29.21fF +C1831 div_pd_buffered_0/divider_0/and_0/OUT div_pd_buffered_0/divider_0/and_0/B 0.01fF +C1832 ro_complete_buffered_0/tapered_buf_0/a_160_n140# ro_complete_buffered_0/tapered_buf_0/a_580_0# 0.35fF +C1833 pll_full_1/divider_0/tspc_1/Z3 pll_full_1/divider_0/tspc_0/Q 0.45fF +C1834 divider_0/prescaler_0/tspc_2/D divider_0/prescaler_0/nand_0/z1 0.24fF +C1835 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF +C1836 divider_1/tspc_1/Z3 divider_1/tspc_1/a_630_n680# 0.05fF +C1837 divider_1/tspc_0/Z3 divider_1/tspc_0/Z4 0.65fF +C1838 divider_1/prescaler_0/m1_2700_2190# divider_1/prescaler_0/tspc_1/Q 0.38fF +C1839 ro_complete_0/a2 ro_complete_0/cbank_1/switch_3/vin 0.09fF +C1840 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF +C1841 ro_complete_buffered_0/tapered_buf_6/a_n10_230# ro_complete_buffered_0/tapered_buf_6/a_160_230# 0.09fF +C1842 ro_complete_buffered_0/tapered_buf_6/a_4670_0# ro_complete_buffered_0/tapered_buf_6/a_210_n610# 29.21fF +C1843 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/switch_3/vin 0.09fF +C1844 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF +C1845 divider_0/tspc_0/Q divider_0/tspc_1/Z3 0.45fF +C1846 ro_complete_buffered_0/tapered_buf_1/a_1650_0# ro_complete_buffered_0/tapered_buf_1/a_4670_0# 4.78fF +C1847 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF +C1848 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/and_0/OUT 0.06fF +C1849 divider_1/tspc_0/a_630_n680# divider_1/tspc_0/Z4 0.12fF +C1850 pll_full_1/divider_0/tspc_0/Z2 pll_full_1/divider_0/tspc_0/Z3 0.16fF +C1851 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 pll_full_1/vco 0.12fF +C1852 io_clamp_low[2] io_clamp_high[2] 0.53fF +C1853 divider_0/prescaler_0/tspc_2/D divider_0/clk 0.26fF +C1854 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF +C1855 io_clamp_high[1] io_analog[5] 0.53fF +C1856 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/vco 0.26fF +C1857 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/R 0.21fF +C1858 ro_complete_buffered_0/tapered_buf_7/a_580_0# ro_complete_buffered_0/tapered_buf_7/a_1650_0# 1.27fF +C1859 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 0.16fF +C1860 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.05fF +C1861 divider_0/prescaler_0/tspc_0/a_740_n680# divider_0/prescaler_0/tspc_1/Q 0.15fF +C1862 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF +C1863 pll_full_1/divider_0/tspc_1/Z1 pll_full_1/divider_0/tspc_1/Z4 0.00fF +C1864 pll_full_1/pd_0/and_pd_0/Out1 pll_full_1/pd_0/DOWN 0.12fF +C1865 divider_1/tspc_0/Q divider_1/tspc_1/Z2 0.14fF +C1866 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Z4 0.36fF +C1867 ro_complete_buffered_0/tapered_buf_2/a_160_230# ro_complete_buffered_0/tapered_buf_2/a_n10_230# 0.09fF +C1868 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF +C1869 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF +C1870 div_pd_buffered_0/tapered_buf_3/a_580_0# div_pd_buffered_0/tapered_buf_3/a_160_230# 0.02fF +C1871 divider_1/prescaler_0/tspc_2/Z4 divider_1/clk 0.12fF +C1872 ro_complete_buffered_0/tapered_buf_3/a_n10_n140# ro_complete_buffered_0/tapered_buf_3/a_160_n140# 0.05fF +C1873 ro_complete_buffered_0/tapered_buf_3/a_210_n610# ro_complete_buffered_0/tapered_buf_3/a_580_0# 0.84fF +C1874 ro_complete_0/a3 ro_complete_0/cbank_2/switch_2/vin 0.09fF +C1875 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z3 0.45fF +C1876 pll_full_0/ro_complete_0/a3 pll_full_0/vco 0.11fF +C1877 div_pd_buffered_0/tapered_buf_0/a_160_230# div_pd_buffered_0/tapered_buf_0/a_160_n140# 0.17fF +C1878 div_pd_buffered_0/pd_0/tspc_r_0/Z3 div_pd_buffered_0/pd_0/tspc_r_0/z5 0.11fF +C1879 pd_buffered_0/tapered_buf_2/a_160_n140# pd_buffered_0/tapered_buf_2/a_160_230# 0.17fF +C1880 pd_buffered_0/tapered_buf_2/a_1650_0# pd_buffered_0/tapered_buf_2/a_4670_0# 4.78fF +C1881 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 0.00fF +C1882 pll_full_1/ro_complete_0/a2 pll_full_1/ro_complete_0/cbank_2/v 0.05fF +C1883 div_pd_buffered_0/tapered_buf_1/a_160_230# div_pd_buffered_0/tapered_buf_1/a_580_0# 0.02fF +C1884 div_pd_buffered_0/tapered_buf_1/a_580_0# div_pd_buffered_0/tapered_buf_1/a_1650_0# 1.27fF +C1885 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 0.21fF +C1886 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF +C1887 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_2/v 1.30fF +C1888 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 0.65fF +C1889 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_1/vco 0.14fF +C1890 cp_buffered_0/cp_0/down cp_buffered_0/cp_0/upbar 0.02fF +C1891 divider_0/prescaler_0/tspc_2/Z3 divider_0/prescaler_0/tspc_2/D 0.05fF +C1892 divider_1/tspc_0/Z2 divider_1/nor_1/A 0.23fF +C1893 divider_1/prescaler_0/tspc_1/Z2 divider_1/prescaler_0/tspc_1/Q 0.06fF +C1894 divider_1/mc2 divider_1/and_0/B 0.20fF +C1895 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/prescaler_0/m1_2700_2190# 0.11fF +C1896 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF +C1897 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF +C1898 pll_full_1/ro_complete_0/cbank_0/switch_0/vin pll_full_1/ro_complete_0/cbank_0/switch_1/vin 0.19fF +C1899 div_pd_buffered_0/pd_0/tspc_r_1/Z3 div_pd_buffered_0/pd_0/tspc_r_1/Z1 0.09fF +C1900 div_pd_buffered_0/pd_0/DIV div_pd_buffered_0/pd_0/tspc_r_1/Z2 0.19fF +C1901 divider_0/mc2 divider_0/and_0/out1 0.06fF +C1902 ro_complete_buffered_0/tapered_buf_1/a_210_n610# ro_complete_buffered_0/tapered_buf_1/a_4670_0# 29.21fF +C1903 pll_full_1/divider_0/nor_1/A pll_full_1/divider_0/tspc_1/Z2 0.15fF +C1904 pll_full_1/divider_0/prescaler_0/Out pll_full_1/divider_0/tspc_0/a_630_n680# 0.01fF +C1905 pd_buffered_0/pd_0/DOWN pd_buffered_0/tapered_buf_1/a_160_n140# 0.19fF +C1906 pll_full_1/divider_0/tspc_1/Q pll_full_1/divider_0/tspc_2/a_630_n680# 0.01fF +C1907 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF +C1908 divider_0/tspc_1/Q divider_0/tspc_2/Z4 0.15fF +C1909 divider_0/prescaler_0/tspc_1/Z3 divider_0/clk 0.45fF +C1910 divider_1/prescaler_0/tspc_2/Z3 divider_1/prescaler_0/tspc_2/Z4 0.65fF +C1911 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_4/vin 0.20fF +C1912 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF +C1913 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/tspc_0/Z2 0.11fF +C1914 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF +C1915 ro_complete_buffered_0/tapered_buf_4/a_1650_0# ro_complete_buffered_0/tapered_buf_4/a_4670_0# 4.78fF +C1916 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z4 0.15fF +C1917 div_pd_buffered_0/tapered_buf_2/a_4670_0# div_pd_buffered_0/tapered_buf_2/a_1650_0# 4.78fF +C1918 divider_0/tspc_0/a_630_n680# divider_0/nor_1/A 0.35fF +C1919 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF +C1920 pll_full_1/divider_0/tspc_1/Z2 pll_full_1/divider_0/nor_1/B 0.30fF +C1921 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q 0.03fF +C1922 div_pd_buffered_0/divider_0/mc2 div_pd_buffered_0/divider_0/and_0/A 0.16fF +C1923 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF +C1924 cp_buffered_0/tapered_buf_2/a_1650_0# cp_buffered_0/tapered_buf_2/a_580_0# 1.27fF +C1925 pll_full_1/divider_0/and_0/OUT pll_full_1/divider_0/and_0/Z1 0.04fF +C1926 pll_full_1/divider_0/tspc_2/a_630_n680# pll_full_1/divider_0/tspc_2/Z2 0.01fF +C1927 pll_full_1/divider_0/prescaler_0/tspc_2/Q pll_full_1/vco 0.05fF +C1928 divider_0/tspc_2/Z2 divider_0/tspc_2/Z4 0.36fF +C1929 divider_0/tspc_2/Z3 divider_0/Out 0.05fF +C1930 divider_1/tspc_1/Q divider_1/tspc_2/a_630_n680# 0.01fF +C1931 pll_full_1/pd_0/DOWN pll_full_1/pd_0/tspc_r_0/Qbar 0.02fF +C1932 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/a_630_n680# 0.12fF +C1933 div_pd_buffered_0/pd_0/REF div_pd_buffered_0/pd_0/tspc_r_0/Z3 0.65fF +C1934 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF +C1935 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/div 0.05fF +C1936 div_pd_buffered_0/tapered_buf_0/a_160_n140# div_pd_buffered_0/tapered_buf_0/a_210_n610# 0.22fF +C1937 ro_complete_buffered_0/tapered_buf_0/a_160_230# ro_complete_buffered_0/tapered_buf_0/a_160_n140# 0.17fF +C1938 ro_complete_buffered_0/tapered_buf_0/in ro_complete_buffered_0/tapered_buf_0/a_n10_230# 0.02fF +C1939 ro_complete_buffered_0/ro_complete_0/a4 ro_complete_buffered_0/tapered_buf_6/in 0.05fF +C1940 pd_buffered_0/tapered_buf_1/a_210_n610# pd_buffered_0/tapered_buf_1/a_1650_0# 2.89fF +C1941 div_pd_buffered_0/divider_0/nor_1/A div_pd_buffered_0/divider_0/tspc_0/Q 0.55fF +C1942 divider_0/prescaler_0/m1_2700_2190# divider_0/and_0/OUT 0.14fF +C1943 pll_full_1/divider_0/and_0/out1 pll_full_1/divider_0/and_0/B 0.18fF +C1944 pll_full_1/pd_0/tspc_r_0/Z4 pll_full_1/pd_0/tspc_r_1/Z4 0.02fF +C1945 pll_full_1/pd_0/tspc_r_0/Z3 pll_full_1/pd_0/UP 0.03fF +C1946 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.33fF +C1947 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF +C1948 divider_1/tspc_0/Q divider_1/tspc_1/Z4 0.15fF Xpd_buffered_0/tapered_buf_2 pd_buffered_0/pd_0/DIV pd_buffered_0/tapered_buf_2/in + vdda1 vssa1 tapered_buf Xpd_buffered_0/tapered_buf_3 pd_buffered_0/pd_0/REF pd_buffered_0/tapered_buf_3/in @@ -1983,1306 +2066,1349 @@ Xpd_buffered_0/tapered_buf_0 pd_buffered_0/tapered_buf_0/out pd_buffered_0/pd_0/UP + vdd vssa1 tapered_buf Xcp_buffered_0 vdda1 vdda1 cp_buffered -Xpd_0 vssa1 pd_0/REF pd_0/DIV pd_0/UP pd_0/DOWN pd_0/R vssa1 vdda1 pd Xfilter_0 vssa1 filter_0/v filter Xro_complete_0 ro_complete_0/a0 ro_complete_0/a1 ro_complete_0/a5 ro_complete_0/a4 + ro_complete_0/a3 ro_complete_0/a2 ro_complete Xro_complete_buffered_0 vdda1 ro_complete_buffered Xdivider_0 vdda1 vdd divider_0/Out divider_0/clk divider_0/mc2 vdda1 vdd divider Xdivider_1 vssa1 vdda1 divider_1/Out divider_1/clk divider_1/mc2 vssa1 vdda1 divider -Xdivider_2 vssa1 vdda1 divider_2/Out divider_2/clk divider_2/mc2 vssa1 vdda1 divider +Xdiv_pd_buffered_0 vdda1 vssa1 div_pd_buffered Xpll_full_0 vdd pll_full_0/ref pll_full_0/div pll_full_0/vco pll_full Xpll_full_1 vdd pll_full_1/ref pll_full_1/div pll_full_1/vco pll_full -C1866 io_analog[4] vssa1 43.96fF -C1867 io_analog[5] vssa1 44.13fF -C1868 io_analog[6] vssa1 43.46fF -C1869 io_in_3v3[0] vssa1 0.61fF -C1870 io_oeb[26] vssa1 0.61fF -C1871 io_in[0] vssa1 0.61fF -C1872 io_out[26] vssa1 0.61fF -C1873 io_out[0] vssa1 0.61fF -C1874 io_in[26] vssa1 0.61fF -C1875 io_oeb[0] vssa1 0.61fF -C1876 io_in_3v3[26] vssa1 0.61fF -C1877 io_in_3v3[1] vssa1 0.61fF -C1878 io_oeb[25] vssa1 0.61fF -C1879 io_in[1] vssa1 0.61fF -C1880 io_out[25] vssa1 0.61fF -C1881 io_out[1] vssa1 0.61fF -C1882 io_in[25] vssa1 0.61fF -C1883 io_oeb[1] vssa1 0.61fF -C1884 io_in_3v3[25] vssa1 0.61fF -C1885 io_in_3v3[2] vssa1 0.61fF -C1886 io_oeb[24] vssa1 0.61fF -C1887 io_in[2] vssa1 0.61fF -C1888 io_out[24] vssa1 0.61fF -C1889 io_out[2] vssa1 0.61fF -C1890 io_in[24] vssa1 0.61fF -C1891 io_oeb[2] vssa1 0.61fF -C1892 io_in_3v3[24] vssa1 0.61fF -C1893 io_in_3v3[3] vssa1 0.61fF -C1894 gpio_noesd[17] vssa1 2.32fF -C1895 io_in[3] vssa1 0.61fF -C1896 gpio_analog[17] vssa1 2.30fF -C1897 io_out[3] vssa1 0.61fF -C1898 io_oeb[3] vssa1 0.61fF -C1899 io_in_3v3[4] vssa1 0.61fF -C1900 io_in[4] vssa1 0.61fF -C1901 io_out[4] vssa1 0.61fF -C1902 io_oeb[4] vssa1 0.61fF -C1903 io_oeb[23] vssa1 0.61fF -C1904 io_out[23] vssa1 0.61fF -C1905 io_in[23] vssa1 0.61fF -C1906 io_in_3v3[23] vssa1 0.61fF -C1907 gpio_noesd[16] vssa1 2.30fF -C1908 gpio_analog[16] vssa1 2.30fF -C1909 io_in_3v3[5] vssa1 0.61fF -C1910 io_in[5] vssa1 0.61fF -C1911 io_out[5] vssa1 0.61fF -C1912 io_oeb[5] vssa1 0.61fF -C1913 io_oeb[22] vssa1 0.61fF -C1914 io_out[22] vssa1 0.61fF -C1915 io_in[22] vssa1 0.61fF -C1916 io_in_3v3[22] vssa1 0.61fF -C1917 gpio_noesd[15] vssa1 2.31fF -C1918 gpio_analog[15] vssa1 2.30fF -C1919 io_in_3v3[6] vssa1 0.61fF -C1920 io_in[6] vssa1 0.61fF -C1921 io_out[6] vssa1 0.61fF -C1922 io_oeb[6] vssa1 0.61fF -C1923 io_oeb[21] vssa1 0.61fF -C1924 io_out[21] vssa1 0.61fF -C1925 io_in[21] vssa1 0.61fF -C1926 io_in_3v3[21] vssa1 0.61fF -C1927 gpio_noesd[14] vssa1 2.30fF -C1928 gpio_analog[14] vssa1 2.29fF -C1929 vssd2 vssa1 38.54fF -C1930 vssd1 vssa1 13.04fF -C1931 vdda2 vssa1 38.30fF -C1932 io_oeb[20] vssa1 0.61fF -C1933 io_out[20] vssa1 0.61fF -C1934 io_in[20] vssa1 0.61fF -C1935 io_in_3v3[20] vssa1 0.61fF -C1936 gpio_noesd[13] vssa1 2.31fF -C1937 gpio_analog[13] vssa1 2.30fF -C1938 gpio_analog[0] vssa1 0.61fF -C1939 gpio_noesd[0] vssa1 0.61fF -C1940 io_in_3v3[7] vssa1 0.61fF -C1941 io_in[7] vssa1 0.61fF -C1942 io_out[7] vssa1 0.61fF -C1943 io_oeb[7] vssa1 0.61fF -C1944 io_oeb[19] vssa1 0.61fF -C1945 io_out[19] vssa1 0.61fF -C1946 io_in[19] vssa1 0.61fF -C1947 io_in_3v3[19] vssa1 0.61fF -C1948 gpio_noesd[12] vssa1 2.32fF -C1949 gpio_analog[12] vssa1 2.30fF -C1950 gpio_analog[1] vssa1 0.61fF -C1951 gpio_noesd[1] vssa1 0.61fF -C1952 io_in_3v3[8] vssa1 0.61fF -C1953 io_in[8] vssa1 0.61fF -C1954 io_out[8] vssa1 0.61fF -C1955 io_oeb[8] vssa1 0.61fF -C1956 io_oeb[18] vssa1 0.61fF -C1957 io_out[18] vssa1 0.61fF -C1958 io_in[18] vssa1 0.61fF -C1959 io_in_3v3[18] vssa1 0.61fF -C1960 gpio_noesd[11] vssa1 2.30fF -C1961 gpio_analog[11] vssa1 2.29fF -C1962 gpio_analog[2] vssa1 0.61fF -C1963 gpio_noesd[2] vssa1 0.61fF -C1964 io_in_3v3[9] vssa1 0.61fF -C1965 io_in[9] vssa1 0.61fF -C1966 io_out[9] vssa1 0.61fF -C1967 io_oeb[9] vssa1 0.61fF -C1968 io_oeb[17] vssa1 0.61fF -C1969 io_out[17] vssa1 0.61fF -C1970 io_in[17] vssa1 0.61fF -C1971 io_in_3v3[17] vssa1 0.61fF -C1972 gpio_noesd[10] vssa1 2.31fF -C1973 gpio_analog[10] vssa1 2.29fF -C1974 gpio_analog[3] vssa1 0.61fF -C1975 gpio_noesd[3] vssa1 0.61fF -C1976 io_in_3v3[10] vssa1 0.61fF -C1977 io_in[10] vssa1 0.61fF -C1978 io_out[10] vssa1 0.61fF -C1979 io_oeb[10] vssa1 0.61fF -C1980 io_oeb[16] vssa1 0.61fF -C1981 io_out[16] vssa1 0.61fF -C1982 io_in[16] vssa1 0.61fF -C1983 io_in_3v3[16] vssa1 0.61fF -C1984 gpio_noesd[9] vssa1 2.28fF -C1985 gpio_analog[9] vssa1 2.28fF -C1986 gpio_analog[4] vssa1 0.61fF -C1987 gpio_noesd[4] vssa1 0.61fF -C1988 io_in_3v3[11] vssa1 0.61fF -C1989 io_in[11] vssa1 0.61fF -C1990 io_out[11] vssa1 0.61fF -C1991 io_oeb[11] vssa1 0.61fF -C1992 io_oeb[15] vssa1 0.61fF -C1993 io_out[15] vssa1 0.61fF -C1994 io_in[15] vssa1 0.61fF -C1995 io_in_3v3[15] vssa1 0.61fF -C1996 gpio_noesd[8] vssa1 2.28fF -C1997 gpio_analog[8] vssa1 2.26fF -C1998 gpio_analog[5] vssa1 0.61fF -C1999 gpio_noesd[5] vssa1 0.61fF -C2000 io_in_3v3[12] vssa1 0.61fF -C2001 io_in[12] vssa1 0.61fF -C2002 io_out[12] vssa1 0.61fF -C2003 io_oeb[12] vssa1 0.61fF -C2004 io_oeb[14] vssa1 0.61fF -C2005 io_out[14] vssa1 0.61fF -C2006 io_in[14] vssa1 0.61fF -C2007 io_in_3v3[14] vssa1 0.61fF -C2008 gpio_noesd[7] vssa1 2.30fF -C2009 gpio_analog[7] vssa1 2.28fF -C2010 vssa2 vssa1 38.35fF -C2011 gpio_analog[6] vssa1 5.71fF -C2012 gpio_noesd[6] vssa1 5.70fF -C2013 io_in_3v3[13] vssa1 0.61fF -C2014 io_in[13] vssa1 0.61fF -C2015 io_out[13] vssa1 0.61fF -C2016 io_oeb[13] vssa1 0.61fF -C2017 vccd1 vssa1 39.84fF -C2018 vccd2 vssa1 38.46fF -C2019 io_analog[0] vssa1 19.99fF -C2020 io_analog[10] vssa1 19.36fF -C2021 io_analog[1] vssa1 13.17fF -C2022 io_analog[2] vssa1 12.57fF -C2023 io_analog[3] vssa1 12.83fF -C2024 io_clamp_high[0] vssa1 3.58fF -C2025 io_clamp_low[0] vssa1 3.58fF -C2026 io_clamp_high[1] vssa1 3.58fF -C2027 io_clamp_low[1] vssa1 3.58fF -C2028 io_clamp_high[2] vssa1 3.58fF -C2029 io_clamp_low[2] vssa1 3.58fF -C2030 io_analog[7] vssa1 12.74fF -C2031 io_analog[8] vssa1 13.08fF -C2032 io_analog[9] vssa1 13.08fF -C2033 user_irq[2] vssa1 0.63fF -C2034 user_irq[1] vssa1 0.63fF -C2035 user_irq[0] vssa1 0.63fF -C2036 user_clock2 vssa1 0.63fF -C2037 la_oenb[127] vssa1 0.63fF -C2038 la_data_out[127] vssa1 0.63fF -C2039 la_data_in[127] vssa1 0.63fF -C2040 la_oenb[126] vssa1 0.63fF -C2041 la_data_out[126] vssa1 0.63fF -C2042 la_data_in[126] vssa1 0.63fF -C2043 la_oenb[125] vssa1 0.63fF -C2044 la_data_out[125] vssa1 0.63fF -C2045 la_data_in[125] vssa1 0.63fF -C2046 la_oenb[124] vssa1 0.63fF -C2047 la_data_out[124] vssa1 0.63fF -C2048 la_data_in[124] vssa1 0.63fF -C2049 la_oenb[123] vssa1 0.63fF -C2050 la_data_out[123] vssa1 0.63fF -C2051 la_data_in[123] vssa1 0.63fF -C2052 la_oenb[122] vssa1 0.63fF -C2053 la_data_out[122] vssa1 0.63fF -C2054 la_data_in[122] vssa1 0.63fF -C2055 la_oenb[121] vssa1 0.63fF -C2056 la_data_out[121] vssa1 0.63fF -C2057 la_data_in[121] vssa1 0.63fF -C2058 la_oenb[120] vssa1 0.63fF -C2059 la_data_out[120] vssa1 0.63fF -C2060 la_data_in[120] vssa1 0.63fF -C2061 la_oenb[119] vssa1 0.63fF -C2062 la_data_out[119] vssa1 0.63fF -C2063 la_data_in[119] vssa1 0.63fF -C2064 la_oenb[118] vssa1 0.63fF -C2065 la_data_out[118] vssa1 0.63fF -C2066 la_data_in[118] vssa1 0.63fF -C2067 la_oenb[117] vssa1 0.63fF -C2068 la_data_out[117] vssa1 0.63fF -C2069 la_data_in[117] vssa1 0.63fF -C2070 la_oenb[116] vssa1 0.63fF -C2071 la_data_out[116] vssa1 0.63fF -C2072 la_data_in[116] vssa1 0.63fF -C2073 la_oenb[115] vssa1 0.63fF -C2074 la_data_out[115] vssa1 0.63fF -C2075 la_data_in[115] vssa1 0.63fF -C2076 la_oenb[114] vssa1 0.63fF -C2077 la_data_out[114] vssa1 0.63fF -C2078 la_data_in[114] vssa1 0.63fF -C2079 la_oenb[113] vssa1 0.63fF -C2080 la_data_out[113] vssa1 0.63fF -C2081 la_data_in[113] vssa1 0.63fF -C2082 la_oenb[112] vssa1 0.63fF -C2083 la_data_out[112] vssa1 0.63fF -C2084 la_data_in[112] vssa1 0.63fF -C2085 la_oenb[111] vssa1 0.63fF -C2086 la_data_out[111] vssa1 0.63fF -C2087 la_data_in[111] vssa1 0.63fF -C2088 la_oenb[110] vssa1 0.63fF -C2089 la_data_out[110] vssa1 0.63fF -C2090 la_data_in[110] vssa1 0.63fF -C2091 la_oenb[109] vssa1 0.63fF -C2092 la_data_out[109] vssa1 0.63fF -C2093 la_data_in[109] vssa1 0.63fF -C2094 la_oenb[108] vssa1 0.63fF -C2095 la_data_out[108] vssa1 0.63fF -C2096 la_data_in[108] vssa1 0.63fF -C2097 la_oenb[107] vssa1 0.63fF -C2098 la_data_out[107] vssa1 0.63fF -C2099 la_data_in[107] vssa1 0.63fF -C2100 la_oenb[106] vssa1 0.63fF -C2101 la_data_out[106] vssa1 0.63fF -C2102 la_data_in[106] vssa1 0.63fF -C2103 la_oenb[105] vssa1 0.63fF -C2104 la_data_out[105] vssa1 0.63fF -C2105 la_data_in[105] vssa1 0.63fF -C2106 la_oenb[104] vssa1 0.63fF -C2107 la_data_out[104] vssa1 0.63fF -C2108 la_data_in[104] vssa1 0.63fF -C2109 la_oenb[103] vssa1 0.63fF -C2110 la_data_out[103] vssa1 0.63fF -C2111 la_data_in[103] vssa1 0.63fF -C2112 la_oenb[102] vssa1 0.63fF -C2113 la_data_out[102] vssa1 0.63fF -C2114 la_data_in[102] vssa1 0.63fF -C2115 la_oenb[101] vssa1 0.63fF -C2116 la_data_out[101] vssa1 0.63fF -C2117 la_data_in[101] vssa1 0.63fF -C2118 la_oenb[100] vssa1 0.63fF -C2119 la_data_out[100] vssa1 0.63fF -C2120 la_data_in[100] vssa1 0.63fF -C2121 la_oenb[99] vssa1 0.63fF -C2122 la_data_out[99] vssa1 0.63fF -C2123 la_data_in[99] vssa1 0.63fF -C2124 la_oenb[98] vssa1 0.63fF -C2125 la_data_out[98] vssa1 0.63fF -C2126 la_data_in[98] vssa1 0.63fF -C2127 la_oenb[97] vssa1 0.63fF -C2128 la_data_out[97] vssa1 0.63fF -C2129 la_data_in[97] vssa1 0.63fF -C2130 la_oenb[96] vssa1 0.63fF -C2131 la_data_out[96] vssa1 0.63fF -C2132 la_data_in[96] vssa1 0.63fF -C2133 la_oenb[95] vssa1 0.63fF -C2134 la_data_out[95] vssa1 0.63fF -C2135 la_data_in[95] vssa1 0.63fF -C2136 la_oenb[94] vssa1 0.63fF -C2137 la_data_out[94] vssa1 0.63fF -C2138 la_data_in[94] vssa1 0.63fF -C2139 la_oenb[93] vssa1 0.63fF -C2140 la_data_out[93] vssa1 0.63fF -C2141 la_data_in[93] vssa1 0.63fF -C2142 la_oenb[92] vssa1 0.63fF -C2143 la_data_out[92] vssa1 0.63fF -C2144 la_data_in[92] vssa1 0.63fF -C2145 la_oenb[91] vssa1 0.63fF -C2146 la_data_out[91] vssa1 0.63fF -C2147 la_data_in[91] vssa1 0.63fF -C2148 la_oenb[90] vssa1 0.63fF -C2149 la_data_out[90] vssa1 0.63fF -C2150 la_data_in[90] vssa1 0.63fF -C2151 la_oenb[89] vssa1 0.63fF -C2152 la_data_out[89] vssa1 0.63fF -C2153 la_data_in[89] vssa1 0.63fF -C2154 la_oenb[88] vssa1 0.63fF -C2155 la_data_out[88] vssa1 0.63fF -C2156 la_data_in[88] vssa1 0.63fF -C2157 la_oenb[87] vssa1 0.63fF -C2158 la_data_out[87] vssa1 0.63fF -C2159 la_data_in[87] vssa1 0.63fF -C2160 la_oenb[86] vssa1 0.63fF -C2161 la_data_out[86] vssa1 0.63fF -C2162 la_data_in[86] vssa1 0.63fF -C2163 la_oenb[85] vssa1 0.63fF -C2164 la_data_out[85] vssa1 0.63fF -C2165 la_data_in[85] vssa1 0.63fF -C2166 la_oenb[84] vssa1 0.63fF -C2167 la_data_out[84] vssa1 0.63fF -C2168 la_data_in[84] vssa1 0.63fF -C2169 la_oenb[83] vssa1 0.63fF -C2170 la_data_out[83] vssa1 0.63fF -C2171 la_data_in[83] vssa1 0.63fF -C2172 la_oenb[82] vssa1 0.63fF -C2173 la_data_out[82] vssa1 0.63fF -C2174 la_data_in[82] vssa1 0.63fF -C2175 la_oenb[81] vssa1 0.63fF -C2176 la_data_out[81] vssa1 0.63fF -C2177 la_data_in[81] vssa1 0.63fF -C2178 la_oenb[80] vssa1 0.63fF -C2179 la_data_out[80] vssa1 0.63fF -C2180 la_data_in[80] vssa1 0.63fF -C2181 la_oenb[79] vssa1 0.63fF -C2182 la_data_out[79] vssa1 0.63fF -C2183 la_data_in[79] vssa1 0.63fF -C2184 la_oenb[78] vssa1 0.63fF -C2185 la_data_out[78] vssa1 0.63fF -C2186 la_data_in[78] vssa1 0.63fF -C2187 la_oenb[77] vssa1 0.63fF -C2188 la_data_out[77] vssa1 0.63fF -C2189 la_data_in[77] vssa1 0.63fF -C2190 la_oenb[76] vssa1 0.63fF -C2191 la_data_out[76] vssa1 0.63fF -C2192 la_data_in[76] vssa1 0.63fF -C2193 la_oenb[75] vssa1 0.63fF -C2194 la_data_out[75] vssa1 0.63fF -C2195 la_data_in[75] vssa1 0.63fF -C2196 la_oenb[74] vssa1 0.63fF -C2197 la_data_out[74] vssa1 0.63fF -C2198 la_data_in[74] vssa1 0.63fF -C2199 la_oenb[73] vssa1 0.63fF -C2200 la_data_out[73] vssa1 0.63fF -C2201 la_data_in[73] vssa1 0.63fF -C2202 la_oenb[72] vssa1 0.63fF -C2203 la_data_out[72] vssa1 0.63fF -C2204 la_data_in[72] vssa1 0.63fF -C2205 la_oenb[71] vssa1 0.63fF -C2206 la_data_out[71] vssa1 0.63fF -C2207 la_data_in[71] vssa1 0.63fF -C2208 la_oenb[70] vssa1 0.63fF -C2209 la_data_out[70] vssa1 0.63fF -C2210 la_data_in[70] vssa1 0.63fF -C2211 la_oenb[69] vssa1 0.63fF -C2212 la_data_out[69] vssa1 0.63fF -C2213 la_data_in[69] vssa1 0.63fF -C2214 la_oenb[68] vssa1 0.63fF -C2215 la_data_out[68] vssa1 0.63fF -C2216 la_data_in[68] vssa1 0.63fF -C2217 la_oenb[67] vssa1 0.63fF -C2218 la_data_out[67] vssa1 0.63fF -C2219 la_data_in[67] vssa1 0.63fF -C2220 la_oenb[66] vssa1 0.63fF -C2221 la_data_out[66] vssa1 0.63fF -C2222 la_data_in[66] vssa1 0.63fF -C2223 la_oenb[65] vssa1 0.63fF -C2224 la_data_out[65] vssa1 0.63fF -C2225 la_data_in[65] vssa1 0.63fF -C2226 la_oenb[64] vssa1 0.63fF -C2227 la_data_out[64] vssa1 0.63fF -C2228 la_data_in[64] vssa1 0.63fF -C2229 la_oenb[63] vssa1 0.63fF -C2230 la_data_out[63] vssa1 0.63fF -C2231 la_data_in[63] vssa1 0.63fF -C2232 la_oenb[62] vssa1 0.63fF -C2233 la_data_out[62] vssa1 0.63fF -C2234 la_data_in[62] vssa1 0.63fF -C2235 la_oenb[61] vssa1 0.63fF -C2236 la_data_out[61] vssa1 0.63fF -C2237 la_data_in[61] vssa1 0.63fF -C2238 la_oenb[60] vssa1 0.63fF -C2239 la_data_out[60] vssa1 0.63fF -C2240 la_data_in[60] vssa1 0.63fF -C2241 la_oenb[59] vssa1 0.63fF -C2242 la_data_out[59] vssa1 0.63fF -C2243 la_data_in[59] vssa1 0.63fF -C2244 la_oenb[58] vssa1 0.63fF -C2245 la_data_out[58] vssa1 0.63fF -C2246 la_data_in[58] vssa1 0.63fF -C2247 la_oenb[57] vssa1 0.63fF -C2248 la_data_out[57] vssa1 0.63fF -C2249 la_data_in[57] vssa1 0.63fF -C2250 la_oenb[56] vssa1 0.63fF -C2251 la_data_out[56] vssa1 0.63fF -C2252 la_data_in[56] vssa1 0.63fF -C2253 la_oenb[55] vssa1 0.63fF -C2254 la_data_out[55] vssa1 0.63fF -C2255 la_data_in[55] vssa1 0.63fF -C2256 la_oenb[54] vssa1 0.63fF -C2257 la_data_out[54] vssa1 0.63fF -C2258 la_data_in[54] vssa1 0.63fF -C2259 la_oenb[53] vssa1 0.63fF -C2260 la_data_out[53] vssa1 0.63fF -C2261 la_data_in[53] vssa1 0.63fF -C2262 la_oenb[52] vssa1 0.63fF -C2263 la_data_out[52] vssa1 0.63fF -C2264 la_data_in[52] vssa1 0.63fF -C2265 la_oenb[51] vssa1 0.63fF -C2266 la_data_out[51] vssa1 0.63fF -C2267 la_data_in[51] vssa1 0.63fF -C2268 la_oenb[50] vssa1 0.63fF -C2269 la_data_out[50] vssa1 0.63fF -C2270 la_data_in[50] vssa1 0.63fF -C2271 la_oenb[49] vssa1 0.63fF -C2272 la_data_out[49] vssa1 0.63fF -C2273 la_data_in[49] vssa1 0.63fF -C2274 la_oenb[48] vssa1 0.63fF -C2275 la_data_out[48] vssa1 0.63fF -C2276 la_data_in[48] vssa1 0.63fF -C2277 la_oenb[47] vssa1 0.63fF -C2278 la_data_out[47] vssa1 0.63fF -C2279 la_data_in[47] vssa1 0.63fF -C2280 la_oenb[46] vssa1 0.63fF -C2281 la_data_out[46] vssa1 0.63fF -C2282 la_data_in[46] vssa1 0.63fF -C2283 la_oenb[45] vssa1 0.63fF -C2284 la_data_out[45] vssa1 0.63fF -C2285 la_data_in[45] vssa1 0.63fF -C2286 la_oenb[44] vssa1 0.63fF -C2287 la_data_out[44] vssa1 0.63fF -C2288 la_data_in[44] vssa1 0.63fF -C2289 la_oenb[43] vssa1 0.63fF -C2290 la_data_out[43] vssa1 0.63fF -C2291 la_data_in[43] vssa1 0.63fF -C2292 la_oenb[42] vssa1 0.63fF -C2293 la_data_out[42] vssa1 0.63fF -C2294 la_data_in[42] vssa1 0.63fF -C2295 la_oenb[41] vssa1 0.63fF -C2296 la_data_out[41] vssa1 0.63fF -C2297 la_data_in[41] vssa1 0.63fF -C2298 la_oenb[40] vssa1 0.63fF -C2299 la_data_out[40] vssa1 0.63fF -C2300 la_data_in[40] vssa1 0.63fF -C2301 la_oenb[39] vssa1 0.63fF -C2302 la_data_out[39] vssa1 0.63fF -C2303 la_data_in[39] vssa1 0.63fF -C2304 la_oenb[38] vssa1 0.63fF -C2305 la_data_out[38] vssa1 0.63fF -C2306 la_data_in[38] vssa1 0.63fF -C2307 la_oenb[37] vssa1 0.63fF -C2308 la_data_out[37] vssa1 0.63fF -C2309 la_data_in[37] vssa1 0.63fF -C2310 la_oenb[36] vssa1 0.63fF -C2311 la_data_out[36] vssa1 0.63fF -C2312 la_data_in[36] vssa1 0.63fF -C2313 la_oenb[35] vssa1 0.63fF -C2314 la_data_out[35] vssa1 0.63fF -C2315 la_data_in[35] vssa1 0.63fF -C2316 la_oenb[34] vssa1 0.63fF -C2317 la_data_out[34] vssa1 0.63fF -C2318 la_data_in[34] vssa1 0.63fF -C2319 la_oenb[33] vssa1 0.63fF -C2320 la_data_out[33] vssa1 0.63fF -C2321 la_data_in[33] vssa1 0.63fF -C2322 la_oenb[32] vssa1 0.63fF -C2323 la_data_out[32] vssa1 0.63fF -C2324 la_data_in[32] vssa1 0.63fF -C2325 la_oenb[31] vssa1 0.63fF -C2326 la_data_out[31] vssa1 0.63fF -C2327 la_data_in[31] vssa1 0.63fF -C2328 la_oenb[30] vssa1 0.63fF -C2329 la_data_out[30] vssa1 0.63fF -C2330 la_data_in[30] vssa1 0.63fF -C2331 la_oenb[29] vssa1 0.63fF -C2332 la_data_out[29] vssa1 0.63fF -C2333 la_data_in[29] vssa1 0.63fF -C2334 la_oenb[28] vssa1 0.63fF -C2335 la_data_out[28] vssa1 0.63fF -C2336 la_data_in[28] vssa1 0.63fF -C2337 la_oenb[27] vssa1 0.63fF -C2338 la_data_out[27] vssa1 0.63fF -C2339 la_data_in[27] vssa1 0.63fF -C2340 la_oenb[26] vssa1 0.63fF -C2341 la_data_out[26] vssa1 0.63fF -C2342 la_data_in[26] vssa1 0.63fF -C2343 la_oenb[25] vssa1 0.63fF -C2344 la_data_out[25] vssa1 0.63fF -C2345 la_data_in[25] vssa1 0.63fF -C2346 la_oenb[24] vssa1 0.63fF -C2347 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divider_2/prescaler_0/tspc_1/Q vssa1 3.61fF -C2777 divider_2/prescaler_0/nand_0/z1 vssa1 0.36fF -C2778 divider_2/prescaler_0/tspc_2/D vssa1 3.12fF -C2779 divider_2/and_0/OUT vssa1 5.62fF -C2780 divider_2/prescaler_0/tspc_2/Z4 vssa1 0.86fF -C2781 divider_2/prescaler_0/tspc_2/Z3 vssa1 2.26fF -C2782 divider_2/prescaler_0/tspc_2/Z2 vssa1 1.46fF -C2783 divider_2/prescaler_0/tspc_2/Z1 vssa1 0.99fF -C2784 divider_2/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING -C2785 divider_2/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING -C2786 divider_2/prescaler_0/tspc_1/Z4 vssa1 0.86fF -C2787 divider_2/prescaler_0/tspc_1/Z3 vssa1 2.26fF -C2788 divider_2/prescaler_0/tspc_1/Z2 vssa1 1.48fF -C2789 divider_2/prescaler_0/tspc_1/Z1 vssa1 0.99fF -C2790 divider_2/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING -C2791 divider_2/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING -C2792 divider_2/prescaler_0/tspc_0/Z4 vssa1 0.86fF -C2793 divider_2/prescaler_0/Out vssa1 4.59fF -C2794 divider_2/prescaler_0/tspc_0/Z3 vssa1 2.26fF -C2795 divider_2/prescaler_0/tspc_0/Z2 vssa1 1.46fF -C2796 divider_2/prescaler_0/tspc_0/Z1 vssa1 0.99fF -C2797 divider_2/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING -C2798 divider_2/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING -C2799 divider_2/nor_1/Z1 vssa1 1.34fF -C2800 divider_2/nor_0/Z1 vssa1 1.34fF -C2801 divider_2/mc2 vssa1 5.29fF -C2802 divider_1/and_0/Z1 vssa1 0.74fF -C2803 divider_1/and_0/B vssa1 2.25fF -C2804 divider_1/and_0/A vssa1 2.19fF -C2805 divider_1/and_0/out1 vssa1 2.93fF -C2806 divider_1/tspc_2/Z4 vssa1 0.86fF -C2807 divider_1/Out vssa1 1.60fF -C2808 divider_1/tspc_2/Z3 vssa1 2.26fF -C2809 divider_1/tspc_2/Z2 vssa1 1.46fF -C2810 divider_1/tspc_2/Z1 vssa1 0.99fF -C2811 divider_1/nor_0/B vssa1 6.33fF -C2812 divider_1/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING -C2813 divider_1/tspc_1/Z4 vssa1 0.86fF -C2814 divider_1/tspc_1/Q vssa1 3.12fF -C2815 divider_1/tspc_1/Z3 vssa1 2.26fF -C2816 divider_1/tspc_1/Z2 vssa1 1.46fF -C2817 divider_1/tspc_1/Z1 vssa1 0.99fF -C2818 divider_1/nor_1/B vssa1 7.05fF -C2819 divider_1/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING -C2820 divider_1/tspc_0/Z4 vssa1 0.86fF -C2821 divider_1/tspc_0/Q vssa1 3.14fF -C2822 divider_1/tspc_0/Z3 vssa1 2.26fF -C2823 divider_1/tspc_0/Z2 vssa1 1.46fF -C2824 divider_1/tspc_0/Z1 vssa1 0.99fF -C2825 divider_1/nor_1/A vssa1 7.04fF -C2826 divider_1/tspc_0/a_630_n680# vssa1 1.15fF **FLOATING -C2827 divider_1/clk vssa1 5.63fF -C2828 divider_1/prescaler_0/nand_1/z1 vssa1 0.36fF -C2829 divider_1/prescaler_0/tspc_0/D vssa1 2.64fF -C2830 divider_1/prescaler_0/tspc_2/Q vssa1 3.74fF -C2831 divider_1/prescaler_0/tspc_1/Q vssa1 3.61fF -C2832 divider_1/prescaler_0/nand_0/z1 vssa1 0.36fF -C2833 divider_1/prescaler_0/tspc_2/D vssa1 3.12fF -C2834 divider_1/and_0/OUT vssa1 5.62fF -C2835 divider_1/prescaler_0/tspc_2/Z4 vssa1 0.86fF -C2836 divider_1/prescaler_0/tspc_2/Z3 vssa1 2.26fF -C2837 divider_1/prescaler_0/tspc_2/Z2 vssa1 1.46fF -C2838 divider_1/prescaler_0/tspc_2/Z1 vssa1 0.99fF -C2839 divider_1/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING -C2840 divider_1/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING -C2841 divider_1/prescaler_0/tspc_1/Z4 vssa1 0.86fF -C2842 divider_1/prescaler_0/tspc_1/Z3 vssa1 2.26fF -C2843 divider_1/prescaler_0/tspc_1/Z2 vssa1 1.48fF -C2844 divider_1/prescaler_0/tspc_1/Z1 vssa1 0.99fF -C2845 divider_1/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING -C2846 divider_1/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING -C2847 divider_1/prescaler_0/tspc_0/Z4 vssa1 0.86fF -C2848 divider_1/prescaler_0/Out vssa1 4.59fF -C2849 divider_1/prescaler_0/tspc_0/Z3 vssa1 2.26fF -C2850 divider_1/prescaler_0/tspc_0/Z2 vssa1 1.46fF -C2851 divider_1/prescaler_0/tspc_0/Z1 vssa1 0.99fF -C2852 divider_1/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING -C2853 divider_1/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING -C2854 divider_1/nor_1/Z1 vssa1 1.34fF -C2855 divider_1/nor_0/Z1 vssa1 1.34fF -C2856 divider_1/mc2 vssa1 5.29fF -C2857 divider_0/and_0/Z1 vssa1 0.74fF -C2858 divider_0/and_0/B vssa1 2.25fF -C2859 divider_0/and_0/A vssa1 2.19fF -C2860 divider_0/and_0/out1 vssa1 2.93fF -C2861 divider_0/tspc_2/Z4 vssa1 0.86fF -C2862 divider_0/Out vssa1 1.60fF -C2863 divider_0/tspc_2/Z3 vssa1 2.26fF -C2864 divider_0/tspc_2/Z2 vssa1 1.46fF -C2865 divider_0/tspc_2/Z1 vssa1 0.99fF -C2866 divider_0/nor_0/B vssa1 6.33fF -C2867 divider_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING -C2868 divider_0/tspc_1/Z4 vssa1 0.86fF -C2869 divider_0/tspc_1/Q vssa1 3.12fF -C2870 divider_0/tspc_1/Z3 vssa1 2.26fF -C2871 divider_0/tspc_1/Z2 vssa1 1.46fF -C2872 divider_0/tspc_1/Z1 vssa1 0.99fF -C2873 divider_0/nor_1/B vssa1 7.05fF -C2874 divider_0/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING -C2875 divider_0/tspc_0/Z4 vssa1 0.86fF -C2876 divider_0/tspc_0/Q vssa1 3.14fF -C2877 divider_0/tspc_0/Z3 vssa1 2.26fF -C2878 divider_0/tspc_0/Z2 vssa1 1.46fF -C2879 divider_0/tspc_0/Z1 vssa1 0.99fF -C2880 divider_0/nor_1/A vssa1 7.04fF -C2881 divider_0/tspc_0/a_630_n680# vssa1 1.15fF **FLOATING -C2882 divider_0/clk vssa1 5.63fF -C2883 divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF -C2884 divider_0/prescaler_0/tspc_0/D vssa1 2.64fF -C2885 divider_0/prescaler_0/tspc_2/Q vssa1 3.64fF -C2886 divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF -C2887 divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF -C2888 divider_0/prescaler_0/tspc_2/D vssa1 3.12fF -C2889 divider_0/and_0/OUT vssa1 5.62fF -C2890 divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF -C2891 divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF -C2892 divider_0/prescaler_0/tspc_2/Z2 vssa1 1.46fF -C2893 divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF -C2894 divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING -C2895 divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING -C2896 divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF -C2897 divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF -C2898 divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF -C2899 divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF -C2900 divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING -C2901 divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING -C2902 divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF -C2903 divider_0/prescaler_0/Out vssa1 4.59fF -C2904 divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF -C2905 divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF -C2906 divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF -C2907 divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING -C2908 divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING -C2909 divider_0/nor_1/Z1 vssa1 1.34fF -C2910 divider_0/nor_0/Z1 vssa1 1.34fF -C2911 divider_0/mc2 vssa1 5.29fF -C2912 ro_complete_buffered_0/tapered_buf_0/in vssa1 1.13fF -C2913 ro_complete_buffered_0/tapered_buf_0/a_n10_n140# vssa1 0.06fF **FLOATING -C2914 ro_complete_buffered_0/tapered_buf_0/a_210_n610# vssa1 588.54fF **FLOATING -C2915 ro_complete_buffered_0/tapered_buf_0/a_160_230# vssa1 0.15fF **FLOATING -C2916 ro_complete_buffered_0/tapered_buf_0/a_n10_230# vssa1 0.13fF **FLOATING -C2917 ro_complete_buffered_0/tapered_buf_0/a_4670_0# vssa1 250.63fF **FLOATING -C2918 ro_complete_buffered_0/tapered_buf_0/a_1650_0# vssa1 63.04fF **FLOATING -C2919 ro_complete_buffered_0/tapered_buf_0/a_580_0# vssa1 16.64fF **FLOATING -C2920 ro_complete_buffered_0/tapered_buf_0/a_160_n140# vssa1 4.00fF **FLOATING -C2921 gnd vssa1 96.41fF -C2922 ro_complete_buffered_0/tapered_buf_1/in vssa1 1.09fF -C2923 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# vssa1 0.06fF **FLOATING -C2924 ro_complete_buffered_0/tapered_buf_1/a_210_n610# vssa1 376.11fF **FLOATING -C2925 ro_complete_buffered_0/tapered_buf_1/a_160_230# vssa1 0.15fF **FLOATING -C2926 ro_complete_buffered_0/tapered_buf_1/a_n10_230# vssa1 0.13fF **FLOATING -C2927 ro_complete_buffered_0/tapered_buf_1/a_4670_0# vssa1 168.15fF **FLOATING -C2928 ro_complete_buffered_0/tapered_buf_1/a_1650_0# vssa1 42.34fF **FLOATING -C2929 ro_complete_buffered_0/tapered_buf_1/a_580_0# vssa1 10.93fF **FLOATING -C2930 ro_complete_buffered_0/tapered_buf_1/a_160_n140# vssa1 2.66fF **FLOATING -C2931 ro_complete_buffered_0/ro_complete_0/cbank_2/v vssa1 16.53fF -C2932 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF -C2933 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF -C2934 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF -C2935 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF -C2936 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF -C2937 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF -C2938 ro_complete_buffered_0/tapered_buf_6/in vssa1 23.85fF -C2939 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF -C2940 ro_complete_buffered_0/ro_complete_0/a0 vssa1 415.68fF -C2941 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF -C2942 ro_complete_buffered_0/ro_complete_0/a1 vssa1 411.44fF -C2943 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF -C2944 ro_complete_buffered_0/ro_complete_0/a3 vssa1 403.90fF -C2945 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF -C2946 ro_complete_buffered_0/ro_complete_0/a2 vssa1 407.33fF -C2947 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF -C2948 ro_complete_buffered_0/ro_complete_0/a4 vssa1 313.18fF -C2949 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF -C2950 ro_complete_buffered_0/ro_complete_0/a5 vssa1 400.20fF -C2951 ro_complete_buffered_0/ro_complete_0/cbank_0/v vssa1 15.13fF -C2952 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF -C2953 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF -C2954 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF -C2955 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF -C2956 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF -C2957 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF -C2958 ro_complete_buffered_0/tapered_buf_7/in vssa1 1.13fF -C2959 ro_complete_buffered_0/tapered_buf_7/a_n10_n140# vssa1 0.06fF **FLOATING -C2960 ro_complete_buffered_0/tapered_buf_7/a_210_n610# vssa1 614.83fF **FLOATING -C2961 ro_complete_buffered_0/tapered_buf_7/a_160_230# vssa1 0.15fF **FLOATING -C2962 ro_complete_buffered_0/tapered_buf_7/a_n10_230# vssa1 0.13fF **FLOATING -C2963 ro_complete_buffered_0/tapered_buf_7/a_4670_0# vssa1 250.63fF **FLOATING -C2964 ro_complete_buffered_0/tapered_buf_7/a_1650_0# vssa1 63.04fF **FLOATING -C2965 ro_complete_buffered_0/tapered_buf_7/a_580_0# vssa1 16.64fF **FLOATING -C2966 ro_complete_buffered_0/tapered_buf_7/a_160_n140# vssa1 4.00fF **FLOATING -C2967 ro_complete_buffered_0/tapered_buf_6/out vssa1 385.11fF -C2968 ro_complete_buffered_0/tapered_buf_6/a_n10_n140# vssa1 0.06fF **FLOATING -C2969 ro_complete_buffered_0/tapered_buf_6/a_210_n610# vssa1 588.54fF **FLOATING -C2970 ro_complete_buffered_0/tapered_buf_6/a_160_230# vssa1 0.15fF **FLOATING -C2971 ro_complete_buffered_0/tapered_buf_6/a_n10_230# vssa1 0.13fF **FLOATING -C2972 ro_complete_buffered_0/tapered_buf_6/a_4670_0# vssa1 250.63fF **FLOATING -C2973 ro_complete_buffered_0/tapered_buf_6/a_1650_0# vssa1 63.04fF **FLOATING -C2974 ro_complete_buffered_0/tapered_buf_6/a_580_0# vssa1 16.64fF **FLOATING -C2975 ro_complete_buffered_0/tapered_buf_6/a_160_n140# vssa1 4.00fF **FLOATING -C2976 ro_complete_buffered_0/tapered_buf_5/in vssa1 1.13fF -C2977 ro_complete_buffered_0/tapered_buf_5/a_n10_n140# vssa1 0.06fF **FLOATING -C2978 ro_complete_buffered_0/tapered_buf_5/a_210_n610# vssa1 588.54fF **FLOATING -C2979 ro_complete_buffered_0/tapered_buf_5/a_160_230# vssa1 0.15fF **FLOATING -C2980 ro_complete_buffered_0/tapered_buf_5/a_n10_230# vssa1 0.13fF **FLOATING -C2981 ro_complete_buffered_0/tapered_buf_5/a_4670_0# vssa1 250.63fF **FLOATING -C2982 ro_complete_buffered_0/tapered_buf_5/a_1650_0# vssa1 63.04fF **FLOATING -C2983 ro_complete_buffered_0/tapered_buf_5/a_580_0# vssa1 16.64fF **FLOATING -C2984 ro_complete_buffered_0/tapered_buf_5/a_160_n140# vssa1 4.00fF **FLOATING -C2985 ro_complete_buffered_0/tapered_buf_4/in vssa1 1.13fF -C2986 ro_complete_buffered_0/tapered_buf_4/a_n10_n140# vssa1 0.06fF **FLOATING -C2987 ro_complete_buffered_0/tapered_buf_4/a_210_n610# vssa1 588.54fF **FLOATING -C2988 ro_complete_buffered_0/tapered_buf_4/a_160_230# vssa1 0.15fF **FLOATING -C2989 ro_complete_buffered_0/tapered_buf_4/a_n10_230# vssa1 0.13fF **FLOATING -C2990 ro_complete_buffered_0/tapered_buf_4/a_4670_0# vssa1 250.63fF **FLOATING -C2991 ro_complete_buffered_0/tapered_buf_4/a_1650_0# vssa1 63.04fF **FLOATING -C2992 ro_complete_buffered_0/tapered_buf_4/a_580_0# vssa1 16.64fF **FLOATING -C2993 ro_complete_buffered_0/tapered_buf_4/a_160_n140# vssa1 4.00fF **FLOATING -C2994 ro_complete_buffered_0/tapered_buf_3/in vssa1 1.13fF -C2995 ro_complete_buffered_0/tapered_buf_3/a_n10_n140# vssa1 0.06fF **FLOATING -C2996 ro_complete_buffered_0/tapered_buf_3/a_210_n610# vssa1 588.54fF **FLOATING -C2997 ro_complete_buffered_0/tapered_buf_3/a_160_230# vssa1 0.15fF **FLOATING -C2998 ro_complete_buffered_0/tapered_buf_3/a_n10_230# vssa1 0.13fF **FLOATING -C2999 ro_complete_buffered_0/tapered_buf_3/a_4670_0# vssa1 250.63fF **FLOATING -C3000 ro_complete_buffered_0/tapered_buf_3/a_1650_0# vssa1 63.04fF **FLOATING -C3001 ro_complete_buffered_0/tapered_buf_3/a_580_0# vssa1 16.64fF **FLOATING -C3002 ro_complete_buffered_0/tapered_buf_3/a_160_n140# vssa1 4.00fF **FLOATING -C3003 ro_complete_buffered_0/tapered_buf_2/in vssa1 1.13fF -C3004 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# vssa1 0.06fF **FLOATING -C3005 ro_complete_buffered_0/tapered_buf_2/a_210_n610# vssa1 588.54fF **FLOATING -C3006 ro_complete_buffered_0/tapered_buf_2/a_160_230# vssa1 0.15fF **FLOATING -C3007 ro_complete_buffered_0/tapered_buf_2/a_n10_230# vssa1 0.13fF **FLOATING -C3008 ro_complete_buffered_0/tapered_buf_2/a_4670_0# vssa1 250.63fF **FLOATING -C3009 ro_complete_buffered_0/tapered_buf_2/a_1650_0# vssa1 63.04fF **FLOATING -C3010 ro_complete_buffered_0/tapered_buf_2/a_580_0# vssa1 16.64fF **FLOATING -C3011 ro_complete_buffered_0/tapered_buf_2/a_160_n140# vssa1 4.00fF **FLOATING -C3012 ro_complete_0/cbank_2/v vssa1 16.43fF -C3013 ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF -C3014 ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF -C3015 ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF -C3016 ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF -C3017 ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF -C3018 ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF -C3019 ro_complete_0/cbank_1/v vssa1 16.43fF -C3020 ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF -C3021 ro_complete_0/a0 vssa1 5.35fF -C3022 ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF -C3023 ro_complete_0/a1 vssa1 6.54fF -C3024 ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF -C3025 ro_complete_0/a3 vssa1 5.96fF -C3026 ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF -C3027 ro_complete_0/a2 vssa1 5.21fF -C3028 ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF -C3029 ro_complete_0/a4 vssa1 5.81fF -C3030 ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF -C3031 ro_complete_0/a5 vssa1 6.74fF -C3032 ro_complete_0/cbank_0/v vssa1 15.12fF -C3033 ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF -C3034 ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF -C3035 ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF -C3036 ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF -C3037 ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF -C3038 ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF -C3039 filter_0/v vssa1 110.47fF -C3040 filter_0/a_4216_n5230# vssa1 418.47fF **FLOATING -C3041 filter_0/a_4216_n2998# vssa1 1.03fF **FLOATING -C3042 pd_0/UP vssa1 2.21fF -C3043 pd_0/and_pd_0/Z1 vssa1 0.39fF -C3044 pd_0/and_pd_0/Out1 vssa1 2.22fF -C3045 pd_0/tspc_r_1/z5 vssa1 1.10fF -C3046 pd_0/tspc_r_1/Z4 vssa1 1.07fF -C3047 pd_0/R vssa1 3.05fF -C3048 pd_0/tspc_r_1/Qbar vssa1 0.79fF -C3049 pd_0/tspc_r_1/Z2 vssa1 1.22fF -C3050 pd_0/tspc_r_1/Z1 vssa1 0.67fF -C3051 pd_0/DOWN vssa1 3.08fF -C3052 pd_0/tspc_r_1/Qbar1 vssa1 1.34fF -C3053 pd_0/tspc_r_1/Z3 vssa1 2.12fF -C3054 pd_0/DIV vssa1 1.82fF -C3055 pd_0/tspc_r_0/z5 vssa1 1.10fF -C3056 pd_0/tspc_r_0/Z4 vssa1 1.07fF -C3057 pd_0/tspc_r_0/Qbar vssa1 0.88fF -C3058 pd_0/tspc_r_0/Z2 vssa1 1.22fF -C3059 pd_0/tspc_r_0/Z1 vssa1 0.67fF -C3060 pd_0/tspc_r_0/Qbar1 vssa1 1.34fF -C3061 pd_0/tspc_r_0/Z3 vssa1 2.12fF -C3062 pd_0/REF vssa1 1.80fF -C3063 cp_buffered_0/tapered_buf_0/in vssa1 1.13fF -C3064 cp_buffered_0/tapered_buf_0/a_n10_n140# vssa1 0.06fF **FLOATING -C3065 cp_buffered_0/tapered_buf_0/a_210_n610# vssa1 588.54fF **FLOATING -C3066 cp_buffered_0/tapered_buf_0/a_160_230# vssa1 0.15fF **FLOATING -C3067 cp_buffered_0/tapered_buf_0/a_n10_230# vssa1 0.13fF **FLOATING -C3068 cp_buffered_0/tapered_buf_0/a_4670_0# vssa1 250.63fF **FLOATING -C3069 cp_buffered_0/tapered_buf_0/a_1650_0# vssa1 63.04fF **FLOATING -C3070 cp_buffered_0/tapered_buf_0/a_580_0# vssa1 16.64fF **FLOATING -C3071 cp_buffered_0/tapered_buf_0/a_160_n140# vssa1 4.00fF **FLOATING -C3072 cp_buffered_0/cp_0/out vssa1 396.39fF -C3073 cp_buffered_0/tapered_buf_1/in vssa1 1.13fF -C3074 cp_buffered_0/tapered_buf_1/a_n10_n140# vssa1 0.06fF **FLOATING -C3075 cp_buffered_0/tapered_buf_1/a_210_n610# vssa1 588.54fF **FLOATING -C3076 cp_buffered_0/tapered_buf_1/a_160_230# vssa1 0.15fF **FLOATING -C3077 cp_buffered_0/tapered_buf_1/a_n10_230# vssa1 0.13fF **FLOATING -C3078 cp_buffered_0/tapered_buf_1/a_4670_0# vssa1 250.63fF **FLOATING -C3079 cp_buffered_0/tapered_buf_1/a_1650_0# vssa1 63.04fF **FLOATING -C3080 cp_buffered_0/tapered_buf_1/a_580_0# vssa1 16.64fF **FLOATING -C3081 cp_buffered_0/tapered_buf_1/a_160_n140# vssa1 4.00fF **FLOATING -C3082 cp_buffered_0/cp_0/upbar vssa1 392.61fF -C3083 cp_buffered_0/cp_0/a_7110_n2840# vssa1 0.17fF **FLOATING -C3084 cp_buffered_0/cp_0/a_3060_n2840# vssa1 1.71fF **FLOATING -C3085 cp_buffered_0/cp_0/a_7110_0# vssa1 0.17fF **FLOATING -C3086 cp_buffered_0/cp_0/a_6370_0# vssa1 0.40fF **FLOATING -C3087 cp_buffered_0/cp_0/a_3060_0# vssa1 1.65fF **FLOATING -C3088 cp_buffered_0/cp_0/a_1710_0# vssa1 5.76fF **FLOATING -C3089 cp_buffered_0/cp_0/a_1710_n2840# vssa1 4.89fF **FLOATING -C3090 cp_buffered_0/cp_0/a_10_n50# vssa1 3.19fF **FLOATING -C3091 cp_buffered_0/cp_0/down vssa1 396.37fF -C3092 cp_buffered_0/tapered_buf_2/in vssa1 1.13fF -C3093 cp_buffered_0/tapered_buf_2/a_n10_n140# vssa1 0.06fF **FLOATING -C3094 cp_buffered_0/tapered_buf_2/a_210_n610# vssa1 588.54fF **FLOATING -C3095 cp_buffered_0/tapered_buf_2/a_160_230# vssa1 0.15fF **FLOATING -C3096 cp_buffered_0/tapered_buf_2/a_n10_230# vssa1 0.13fF **FLOATING -C3097 cp_buffered_0/tapered_buf_2/a_4670_0# vssa1 250.63fF **FLOATING -C3098 cp_buffered_0/tapered_buf_2/a_1650_0# vssa1 63.04fF **FLOATING -C3099 cp_buffered_0/tapered_buf_2/a_580_0# vssa1 16.64fF **FLOATING -C3100 cp_buffered_0/tapered_buf_2/a_160_n140# vssa1 4.00fF **FLOATING -C3101 pd_buffered_0/tapered_buf_0/out vssa1 385.14fF -C3102 pd_buffered_0/tapered_buf_0/a_n10_n140# vssa1 0.06fF **FLOATING -C3103 pd_buffered_0/tapered_buf_0/a_210_n610# vssa1 588.54fF **FLOATING -C3104 pd_buffered_0/tapered_buf_0/a_160_230# vssa1 0.15fF **FLOATING -C3105 pd_buffered_0/tapered_buf_0/a_n10_230# vssa1 0.13fF **FLOATING -C3106 pd_buffered_0/tapered_buf_0/a_4670_0# vssa1 250.63fF **FLOATING -C3107 pd_buffered_0/tapered_buf_0/a_1650_0# vssa1 63.04fF **FLOATING -C3108 pd_buffered_0/tapered_buf_0/a_580_0# vssa1 16.64fF **FLOATING -C3109 pd_buffered_0/tapered_buf_0/a_160_n140# vssa1 4.00fF **FLOATING -C3110 pd_buffered_0/tapered_buf_1/out vssa1 385.17fF -C3111 pd_buffered_0/tapered_buf_1/a_n10_n140# vssa1 0.06fF **FLOATING -C3112 pd_buffered_0/tapered_buf_1/a_210_n610# vssa1 588.54fF **FLOATING -C3113 pd_buffered_0/tapered_buf_1/a_160_230# vssa1 0.15fF **FLOATING -C3114 pd_buffered_0/tapered_buf_1/a_n10_230# vssa1 0.13fF **FLOATING -C3115 pd_buffered_0/tapered_buf_1/a_4670_0# vssa1 250.63fF **FLOATING -C3116 pd_buffered_0/tapered_buf_1/a_1650_0# vssa1 63.04fF **FLOATING -C3117 pd_buffered_0/tapered_buf_1/a_580_0# vssa1 16.64fF **FLOATING -C3118 pd_buffered_0/tapered_buf_1/a_160_n140# vssa1 4.00fF **FLOATING -C3119 pd_buffered_0/pd_0/UP vssa1 5.46fF -C3120 pd_buffered_0/pd_0/and_pd_0/Z1 vssa1 0.39fF -C3121 pd_buffered_0/pd_0/and_pd_0/Out1 vssa1 2.22fF -C3122 pd_buffered_0/pd_0/tspc_r_1/z5 vssa1 1.10fF -C3123 pd_buffered_0/pd_0/tspc_r_1/Z4 vssa1 1.07fF -C3124 pd_buffered_0/pd_0/R vssa1 3.05fF -C3125 pd_buffered_0/pd_0/tspc_r_1/Qbar vssa1 0.79fF -C3126 pd_buffered_0/pd_0/tspc_r_1/Z2 vssa1 1.22fF -C3127 pd_buffered_0/pd_0/tspc_r_1/Z1 vssa1 0.67fF -C3128 pd_buffered_0/pd_0/DOWN vssa1 9.89fF -C3129 pd_buffered_0/pd_0/tspc_r_1/Qbar1 vssa1 1.34fF -C3130 pd_buffered_0/pd_0/tspc_r_1/Z3 vssa1 2.12fF -C3131 pd_buffered_0/pd_0/DIV vssa1 389.98fF -C3132 pd_buffered_0/pd_0/tspc_r_0/z5 vssa1 1.10fF -C3133 pd_buffered_0/pd_0/tspc_r_0/Z4 vssa1 1.07fF -C3134 pd_buffered_0/pd_0/tspc_r_0/Qbar vssa1 0.88fF -C3135 pd_buffered_0/pd_0/tspc_r_0/Z2 vssa1 1.22fF -C3136 pd_buffered_0/pd_0/tspc_r_0/Z1 vssa1 0.67fF -C3137 pd_buffered_0/pd_0/tspc_r_0/Qbar1 vssa1 1.34fF -C3138 pd_buffered_0/pd_0/tspc_r_0/Z3 vssa1 2.12fF -C3139 pd_buffered_0/pd_0/REF vssa1 388.35fF -C3140 pd_buffered_0/tapered_buf_3/in vssa1 1.13fF -C3141 pd_buffered_0/tapered_buf_3/a_n10_n140# vssa1 0.06fF **FLOATING -C3142 pd_buffered_0/tapered_buf_3/a_210_n610# vssa1 588.54fF **FLOATING -C3143 pd_buffered_0/tapered_buf_3/a_160_230# vssa1 0.15fF **FLOATING -C3144 pd_buffered_0/tapered_buf_3/a_n10_230# vssa1 0.13fF **FLOATING -C3145 pd_buffered_0/tapered_buf_3/a_4670_0# vssa1 250.63fF **FLOATING -C3146 pd_buffered_0/tapered_buf_3/a_1650_0# vssa1 63.04fF **FLOATING -C3147 pd_buffered_0/tapered_buf_3/a_580_0# vssa1 16.64fF **FLOATING -C3148 pd_buffered_0/tapered_buf_3/a_160_n140# vssa1 4.00fF **FLOATING -C3149 pd_buffered_0/tapered_buf_2/in vssa1 1.13fF -C3150 pd_buffered_0/tapered_buf_2/a_n10_n140# vssa1 0.06fF **FLOATING -C3151 pd_buffered_0/tapered_buf_2/a_210_n610# vssa1 588.54fF **FLOATING -C3152 pd_buffered_0/tapered_buf_2/a_160_230# vssa1 0.15fF **FLOATING -C3153 pd_buffered_0/tapered_buf_2/a_n10_230# vssa1 0.13fF **FLOATING -C3154 pd_buffered_0/tapered_buf_2/a_4670_0# vssa1 250.63fF **FLOATING -C3155 pd_buffered_0/tapered_buf_2/a_1650_0# vssa1 63.04fF **FLOATING -C3156 pd_buffered_0/tapered_buf_2/a_580_0# vssa1 16.64fF **FLOATING -C3157 pd_buffered_0/tapered_buf_2/a_160_n140# vssa1 4.00fF **FLOATING +C1949 io_analog[4] vssa1 43.96fF +C1950 io_analog[5] vssa1 44.13fF +C1951 io_analog[6] vssa1 43.46fF +C1952 io_in_3v3[0] vssa1 0.61fF +C1953 io_oeb[26] vssa1 0.61fF +C1954 io_in[0] vssa1 0.61fF +C1955 io_out[26] vssa1 0.61fF +C1956 io_out[0] vssa1 0.61fF +C1957 io_in[26] vssa1 0.61fF +C1958 io_oeb[0] vssa1 0.61fF +C1959 io_in_3v3[26] vssa1 0.61fF +C1960 io_in_3v3[1] vssa1 0.61fF +C1961 io_oeb[25] vssa1 0.61fF +C1962 io_in[1] vssa1 0.61fF +C1963 io_out[25] vssa1 0.61fF +C1964 io_out[1] vssa1 0.61fF +C1965 io_in[25] vssa1 0.61fF +C1966 io_oeb[1] vssa1 0.61fF +C1967 io_in_3v3[25] vssa1 0.61fF +C1968 io_in_3v3[2] vssa1 0.61fF +C1969 io_oeb[24] vssa1 0.61fF +C1970 io_in[2] vssa1 0.61fF +C1971 io_out[24] vssa1 0.61fF +C1972 io_out[2] vssa1 0.61fF +C1973 io_in[24] vssa1 0.61fF +C1974 io_oeb[2] vssa1 0.61fF +C1975 io_in_3v3[24] vssa1 0.61fF +C1976 io_in_3v3[3] vssa1 0.61fF +C1977 gpio_noesd[17] vssa1 2.32fF +C1978 io_in[3] vssa1 0.61fF +C1979 gpio_analog[17] vssa1 2.30fF +C1980 io_out[3] vssa1 0.61fF +C1981 io_oeb[3] vssa1 0.61fF +C1982 io_in_3v3[4] vssa1 0.61fF +C1983 io_in[4] vssa1 0.61fF +C1984 io_out[4] vssa1 0.61fF +C1985 io_oeb[4] vssa1 0.61fF +C1986 io_oeb[23] vssa1 0.61fF +C1987 io_out[23] vssa1 0.61fF +C1988 io_in[23] vssa1 0.61fF +C1989 io_in_3v3[23] vssa1 0.61fF +C1990 gpio_noesd[16] vssa1 2.30fF +C1991 gpio_analog[16] vssa1 2.30fF +C1992 io_in_3v3[5] vssa1 0.61fF +C1993 io_in[5] vssa1 0.61fF +C1994 io_out[5] vssa1 0.61fF +C1995 io_oeb[5] vssa1 0.61fF +C1996 io_oeb[22] vssa1 0.61fF +C1997 io_out[22] vssa1 0.61fF +C1998 io_in[22] vssa1 0.61fF +C1999 io_in_3v3[22] vssa1 0.61fF +C2000 gpio_noesd[15] vssa1 2.31fF +C2001 gpio_analog[15] vssa1 2.30fF +C2002 io_in_3v3[6] vssa1 0.61fF +C2003 io_in[6] vssa1 0.61fF +C2004 io_out[6] vssa1 0.61fF +C2005 io_oeb[6] vssa1 0.61fF +C2006 io_oeb[21] vssa1 0.61fF +C2007 io_out[21] vssa1 0.61fF +C2008 io_in[21] vssa1 0.61fF +C2009 io_in_3v3[21] vssa1 0.61fF +C2010 gpio_noesd[14] vssa1 2.30fF +C2011 gpio_analog[14] vssa1 2.29fF +C2012 vssd2 vssa1 38.54fF +C2013 vssd1 vssa1 13.04fF +C2014 vdda2 vssa1 38.30fF +C2015 io_oeb[20] vssa1 0.61fF +C2016 io_out[20] vssa1 0.61fF +C2017 io_in[20] vssa1 0.61fF +C2018 io_in_3v3[20] vssa1 0.61fF +C2019 gpio_noesd[13] vssa1 2.31fF +C2020 gpio_analog[13] vssa1 2.30fF +C2021 gpio_analog[0] vssa1 0.61fF +C2022 gpio_noesd[0] vssa1 0.61fF +C2023 io_in_3v3[7] vssa1 0.61fF +C2024 io_in[7] vssa1 0.61fF +C2025 io_out[7] vssa1 0.61fF +C2026 io_oeb[7] vssa1 0.61fF +C2027 io_oeb[19] vssa1 0.61fF +C2028 io_out[19] vssa1 0.61fF +C2029 io_in[19] vssa1 0.61fF +C2030 io_in_3v3[19] vssa1 0.61fF +C2031 gpio_noesd[12] vssa1 2.32fF +C2032 gpio_analog[12] vssa1 2.30fF +C2033 gpio_analog[1] vssa1 0.61fF +C2034 gpio_noesd[1] vssa1 0.61fF +C2035 io_in_3v3[8] vssa1 0.61fF +C2036 io_in[8] vssa1 0.61fF +C2037 io_out[8] vssa1 0.61fF +C2038 io_oeb[8] vssa1 0.61fF +C2039 io_oeb[18] vssa1 0.61fF +C2040 io_out[18] vssa1 0.61fF +C2041 io_in[18] vssa1 0.61fF +C2042 io_in_3v3[18] vssa1 0.61fF +C2043 gpio_noesd[11] vssa1 2.30fF +C2044 gpio_analog[11] vssa1 2.29fF +C2045 gpio_analog[2] vssa1 0.61fF +C2046 gpio_noesd[2] vssa1 0.61fF +C2047 io_in_3v3[9] vssa1 0.61fF +C2048 io_in[9] vssa1 0.61fF +C2049 io_out[9] vssa1 0.61fF +C2050 io_oeb[9] vssa1 0.61fF +C2051 io_oeb[17] vssa1 0.61fF +C2052 io_out[17] vssa1 0.61fF +C2053 io_in[17] vssa1 0.61fF +C2054 io_in_3v3[17] vssa1 0.61fF +C2055 gpio_noesd[10] vssa1 2.31fF +C2056 gpio_analog[10] vssa1 2.29fF +C2057 gpio_analog[3] vssa1 0.61fF +C2058 gpio_noesd[3] vssa1 0.61fF +C2059 io_in_3v3[10] vssa1 0.61fF +C2060 io_in[10] vssa1 0.61fF +C2061 io_out[10] vssa1 0.61fF +C2062 io_oeb[10] vssa1 0.61fF +C2063 io_oeb[16] vssa1 0.61fF +C2064 io_out[16] vssa1 0.61fF +C2065 io_in[16] vssa1 0.61fF +C2066 io_in_3v3[16] vssa1 0.61fF +C2067 gpio_noesd[9] vssa1 2.28fF +C2068 gpio_analog[9] vssa1 2.28fF +C2069 gpio_analog[4] vssa1 0.61fF +C2070 gpio_noesd[4] vssa1 0.61fF +C2071 io_in_3v3[11] vssa1 0.61fF +C2072 io_in[11] vssa1 0.61fF +C2073 io_out[11] vssa1 0.61fF +C2074 io_oeb[11] vssa1 0.61fF +C2075 io_oeb[15] vssa1 0.61fF +C2076 io_out[15] vssa1 0.61fF +C2077 io_in[15] vssa1 0.61fF +C2078 io_in_3v3[15] vssa1 0.61fF +C2079 gpio_noesd[8] vssa1 2.28fF +C2080 gpio_analog[8] vssa1 2.26fF +C2081 gpio_analog[5] vssa1 0.61fF +C2082 gpio_noesd[5] vssa1 0.61fF +C2083 io_in_3v3[12] vssa1 0.61fF +C2084 io_in[12] vssa1 0.61fF +C2085 io_out[12] vssa1 0.61fF +C2086 io_oeb[12] vssa1 0.61fF +C2087 io_oeb[14] vssa1 0.61fF +C2088 io_out[14] vssa1 0.61fF +C2089 io_in[14] vssa1 0.61fF +C2090 io_in_3v3[14] vssa1 0.61fF +C2091 gpio_noesd[7] vssa1 2.30fF +C2092 gpio_analog[7] vssa1 2.28fF +C2093 vssa2 vssa1 38.35fF +C2094 gpio_analog[6] vssa1 5.71fF +C2095 gpio_noesd[6] vssa1 5.70fF +C2096 io_in_3v3[13] vssa1 0.61fF +C2097 io_in[13] vssa1 0.61fF +C2098 io_out[13] vssa1 0.61fF +C2099 io_oeb[13] vssa1 0.61fF +C2100 vccd1 vssa1 39.84fF +C2101 vccd2 vssa1 38.46fF +C2102 io_analog[0] vssa1 19.99fF +C2103 io_analog[10] vssa1 19.36fF +C2104 io_analog[1] vssa1 13.17fF +C2105 io_analog[2] vssa1 12.57fF +C2106 io_analog[3] vssa1 12.83fF +C2107 io_clamp_high[0] vssa1 3.58fF +C2108 io_clamp_low[0] vssa1 3.58fF +C2109 io_clamp_high[1] vssa1 3.58fF +C2110 io_clamp_low[1] vssa1 3.58fF +C2111 io_clamp_high[2] vssa1 3.58fF +C2112 io_clamp_low[2] vssa1 3.58fF +C2113 io_analog[7] vssa1 12.74fF +C2114 io_analog[8] vssa1 13.08fF +C2115 io_analog[9] vssa1 13.08fF +C2116 user_irq[2] vssa1 0.63fF +C2117 user_irq[1] vssa1 0.63fF +C2118 user_irq[0] vssa1 0.63fF +C2119 user_clock2 vssa1 0.63fF +C2120 la_oenb[127] vssa1 0.63fF +C2121 la_data_out[127] vssa1 0.63fF +C2122 la_data_in[127] vssa1 0.63fF +C2123 la_oenb[126] vssa1 0.63fF +C2124 la_data_out[126] vssa1 0.63fF +C2125 la_data_in[126] vssa1 0.63fF +C2126 la_oenb[125] vssa1 0.63fF +C2127 la_data_out[125] vssa1 0.63fF +C2128 la_data_in[125] vssa1 0.63fF +C2129 la_oenb[124] vssa1 0.63fF +C2130 la_data_out[124] vssa1 0.63fF +C2131 la_data_in[124] vssa1 0.63fF +C2132 la_oenb[123] vssa1 0.63fF +C2133 la_data_out[123] vssa1 0.63fF +C2134 la_data_in[123] vssa1 0.63fF +C2135 la_oenb[122] vssa1 0.63fF +C2136 la_data_out[122] vssa1 0.63fF +C2137 la_data_in[122] vssa1 0.63fF +C2138 la_oenb[121] vssa1 0.63fF +C2139 la_data_out[121] vssa1 0.63fF +C2140 la_data_in[121] vssa1 0.63fF +C2141 la_oenb[120] vssa1 0.63fF +C2142 la_data_out[120] vssa1 0.63fF +C2143 la_data_in[120] vssa1 0.63fF +C2144 la_oenb[119] vssa1 0.63fF +C2145 la_data_out[119] vssa1 0.63fF +C2146 la_data_in[119] vssa1 0.63fF +C2147 la_oenb[118] vssa1 0.63fF +C2148 la_data_out[118] vssa1 0.63fF +C2149 la_data_in[118] vssa1 0.63fF +C2150 la_oenb[117] vssa1 0.63fF +C2151 la_data_out[117] vssa1 0.63fF +C2152 la_data_in[117] vssa1 0.63fF +C2153 la_oenb[116] vssa1 0.63fF +C2154 la_data_out[116] vssa1 0.63fF +C2155 la_data_in[116] vssa1 0.63fF +C2156 la_oenb[115] vssa1 0.63fF +C2157 la_data_out[115] vssa1 0.63fF +C2158 la_data_in[115] vssa1 0.63fF +C2159 la_oenb[114] vssa1 0.63fF +C2160 la_data_out[114] vssa1 0.63fF +C2161 la_data_in[114] vssa1 0.63fF +C2162 la_oenb[113] vssa1 0.63fF +C2163 la_data_out[113] vssa1 0.63fF +C2164 la_data_in[113] vssa1 0.63fF +C2165 la_oenb[112] vssa1 0.63fF +C2166 la_data_out[112] vssa1 0.63fF +C2167 la_data_in[112] vssa1 0.63fF +C2168 la_oenb[111] vssa1 0.63fF +C2169 la_data_out[111] vssa1 0.63fF +C2170 la_data_in[111] vssa1 0.63fF +C2171 la_oenb[110] vssa1 0.63fF +C2172 la_data_out[110] vssa1 0.63fF +C2173 la_data_in[110] vssa1 0.63fF +C2174 la_oenb[109] vssa1 0.63fF +C2175 la_data_out[109] vssa1 0.63fF +C2176 la_data_in[109] vssa1 0.63fF +C2177 la_oenb[108] vssa1 0.63fF +C2178 la_data_out[108] vssa1 0.63fF +C2179 la_data_in[108] vssa1 0.63fF +C2180 la_oenb[107] vssa1 0.63fF +C2181 la_data_out[107] vssa1 0.63fF +C2182 la_data_in[107] vssa1 0.63fF +C2183 la_oenb[106] vssa1 0.63fF +C2184 la_data_out[106] vssa1 0.63fF +C2185 la_data_in[106] vssa1 0.63fF +C2186 la_oenb[105] vssa1 0.63fF +C2187 la_data_out[105] vssa1 0.63fF +C2188 la_data_in[105] vssa1 0.63fF +C2189 la_oenb[104] vssa1 0.63fF +C2190 la_data_out[104] vssa1 0.63fF +C2191 la_data_in[104] vssa1 0.63fF +C2192 la_oenb[103] vssa1 0.63fF +C2193 la_data_out[103] vssa1 0.63fF +C2194 la_data_in[103] vssa1 0.63fF +C2195 la_oenb[102] vssa1 0.63fF +C2196 la_data_out[102] vssa1 0.63fF +C2197 la_data_in[102] vssa1 0.63fF +C2198 la_oenb[101] vssa1 0.63fF +C2199 la_data_out[101] vssa1 0.63fF +C2200 la_data_in[101] vssa1 0.63fF +C2201 la_oenb[100] vssa1 0.63fF +C2202 la_data_out[100] vssa1 0.63fF +C2203 la_data_in[100] vssa1 0.63fF +C2204 la_oenb[99] vssa1 0.63fF +C2205 la_data_out[99] vssa1 0.63fF +C2206 la_data_in[99] vssa1 0.63fF +C2207 la_oenb[98] vssa1 0.63fF +C2208 la_data_out[98] vssa1 0.63fF +C2209 la_data_in[98] vssa1 0.63fF +C2210 la_oenb[97] vssa1 0.63fF +C2211 la_data_out[97] vssa1 0.63fF +C2212 la_data_in[97] vssa1 0.63fF +C2213 la_oenb[96] vssa1 0.63fF +C2214 la_data_out[96] vssa1 0.63fF +C2215 la_data_in[96] vssa1 0.63fF +C2216 la_oenb[95] vssa1 0.63fF +C2217 la_data_out[95] vssa1 0.63fF +C2218 la_data_in[95] vssa1 0.63fF +C2219 la_oenb[94] vssa1 0.63fF +C2220 la_data_out[94] vssa1 0.63fF +C2221 la_data_in[94] vssa1 0.63fF +C2222 la_oenb[93] vssa1 0.63fF +C2223 la_data_out[93] vssa1 0.63fF +C2224 la_data_in[93] vssa1 0.63fF +C2225 la_oenb[92] vssa1 0.63fF +C2226 la_data_out[92] vssa1 0.63fF +C2227 la_data_in[92] vssa1 0.63fF +C2228 la_oenb[91] vssa1 0.63fF +C2229 la_data_out[91] vssa1 0.63fF +C2230 la_data_in[91] vssa1 0.63fF +C2231 la_oenb[90] vssa1 0.63fF +C2232 la_data_out[90] vssa1 0.63fF +C2233 la_data_in[90] vssa1 0.63fF +C2234 la_oenb[89] vssa1 0.63fF +C2235 la_data_out[89] vssa1 0.63fF +C2236 la_data_in[89] vssa1 0.63fF +C2237 la_oenb[88] vssa1 0.63fF +C2238 la_data_out[88] vssa1 0.63fF +C2239 la_data_in[88] vssa1 0.63fF +C2240 la_oenb[87] vssa1 0.63fF +C2241 la_data_out[87] vssa1 0.63fF +C2242 la_data_in[87] vssa1 0.63fF +C2243 la_oenb[86] vssa1 0.63fF +C2244 la_data_out[86] vssa1 0.63fF +C2245 la_data_in[86] vssa1 0.63fF +C2246 la_oenb[85] vssa1 0.63fF +C2247 la_data_out[85] vssa1 0.63fF +C2248 la_data_in[85] vssa1 0.63fF +C2249 la_oenb[84] vssa1 0.63fF +C2250 la_data_out[84] vssa1 0.63fF +C2251 la_data_in[84] vssa1 0.63fF +C2252 la_oenb[83] vssa1 0.63fF +C2253 la_data_out[83] vssa1 0.63fF +C2254 la_data_in[83] vssa1 0.63fF +C2255 la_oenb[82] vssa1 0.63fF +C2256 la_data_out[82] vssa1 0.63fF +C2257 la_data_in[82] vssa1 0.63fF +C2258 la_oenb[81] vssa1 0.63fF +C2259 la_data_out[81] vssa1 0.63fF +C2260 la_data_in[81] vssa1 0.63fF +C2261 la_oenb[80] vssa1 0.63fF +C2262 la_data_out[80] vssa1 0.63fF +C2263 la_data_in[80] vssa1 0.63fF +C2264 la_oenb[79] vssa1 0.63fF +C2265 la_data_out[79] vssa1 0.63fF +C2266 la_data_in[79] vssa1 0.63fF +C2267 la_oenb[78] vssa1 0.63fF +C2268 la_data_out[78] vssa1 0.63fF +C2269 la_data_in[78] vssa1 0.63fF +C2270 la_oenb[77] vssa1 0.63fF +C2271 la_data_out[77] vssa1 0.63fF +C2272 la_data_in[77] vssa1 0.63fF +C2273 la_oenb[76] vssa1 0.63fF +C2274 la_data_out[76] vssa1 0.63fF +C2275 la_data_in[76] vssa1 0.63fF +C2276 la_oenb[75] vssa1 0.63fF +C2277 la_data_out[75] vssa1 0.63fF +C2278 la_data_in[75] vssa1 0.63fF +C2279 la_oenb[74] vssa1 0.63fF +C2280 la_data_out[74] vssa1 0.63fF +C2281 la_data_in[74] vssa1 0.63fF +C2282 la_oenb[73] vssa1 0.63fF +C2283 la_data_out[73] vssa1 0.63fF +C2284 la_data_in[73] vssa1 0.63fF +C2285 la_oenb[72] vssa1 0.63fF +C2286 la_data_out[72] vssa1 0.63fF +C2287 la_data_in[72] vssa1 0.63fF +C2288 la_oenb[71] vssa1 0.63fF +C2289 la_data_out[71] vssa1 0.63fF +C2290 la_data_in[71] vssa1 0.63fF +C2291 la_oenb[70] vssa1 0.63fF +C2292 la_data_out[70] vssa1 0.63fF +C2293 la_data_in[70] vssa1 0.63fF +C2294 la_oenb[69] vssa1 0.63fF +C2295 la_data_out[69] vssa1 0.63fF +C2296 la_data_in[69] vssa1 0.63fF +C2297 la_oenb[68] vssa1 0.63fF +C2298 la_data_out[68] vssa1 0.63fF +C2299 la_data_in[68] vssa1 0.63fF +C2300 la_oenb[67] vssa1 0.63fF +C2301 la_data_out[67] vssa1 0.63fF +C2302 la_data_in[67] vssa1 0.63fF +C2303 la_oenb[66] vssa1 0.63fF +C2304 la_data_out[66] vssa1 0.63fF +C2305 la_data_in[66] vssa1 0.63fF +C2306 la_oenb[65] vssa1 0.63fF +C2307 la_data_out[65] vssa1 0.63fF +C2308 la_data_in[65] vssa1 0.63fF +C2309 la_oenb[64] vssa1 0.63fF +C2310 la_data_out[64] vssa1 0.63fF +C2311 la_data_in[64] vssa1 0.63fF +C2312 la_oenb[63] vssa1 0.63fF +C2313 la_data_out[63] vssa1 0.63fF +C2314 la_data_in[63] vssa1 0.63fF +C2315 la_oenb[62] vssa1 0.63fF +C2316 la_data_out[62] vssa1 0.63fF +C2317 la_data_in[62] vssa1 0.63fF +C2318 la_oenb[61] vssa1 0.63fF +C2319 la_data_out[61] vssa1 0.63fF +C2320 la_data_in[61] vssa1 0.63fF +C2321 la_oenb[60] vssa1 0.63fF +C2322 la_data_out[60] vssa1 0.63fF +C2323 la_data_in[60] vssa1 0.63fF +C2324 la_oenb[59] vssa1 0.63fF +C2325 la_data_out[59] vssa1 0.63fF +C2326 la_data_in[59] vssa1 0.63fF +C2327 la_oenb[58] vssa1 0.63fF +C2328 la_data_out[58] vssa1 0.63fF +C2329 la_data_in[58] vssa1 0.63fF +C2330 la_oenb[57] vssa1 0.63fF +C2331 la_data_out[57] vssa1 0.63fF +C2332 la_data_in[57] vssa1 0.63fF +C2333 la_oenb[56] vssa1 0.63fF +C2334 la_data_out[56] vssa1 0.63fF +C2335 la_data_in[56] vssa1 0.63fF +C2336 la_oenb[55] vssa1 0.63fF +C2337 la_data_out[55] vssa1 0.63fF +C2338 la_data_in[55] vssa1 0.63fF +C2339 la_oenb[54] vssa1 0.63fF +C2340 la_data_out[54] vssa1 0.63fF +C2341 la_data_in[54] vssa1 0.63fF +C2342 la_oenb[53] vssa1 0.63fF +C2343 la_data_out[53] vssa1 0.63fF +C2344 la_data_in[53] vssa1 0.63fF +C2345 la_oenb[52] vssa1 0.63fF +C2346 la_data_out[52] vssa1 0.63fF +C2347 la_data_in[52] vssa1 0.63fF +C2348 la_oenb[51] vssa1 0.63fF +C2349 la_data_out[51] vssa1 0.63fF +C2350 la_data_in[51] vssa1 0.63fF +C2351 la_oenb[50] vssa1 0.63fF +C2352 la_data_out[50] vssa1 0.63fF +C2353 la_data_in[50] vssa1 0.63fF +C2354 la_oenb[49] vssa1 0.63fF +C2355 la_data_out[49] vssa1 0.63fF +C2356 la_data_in[49] vssa1 0.63fF +C2357 la_oenb[48] vssa1 0.63fF +C2358 la_data_out[48] vssa1 0.63fF +C2359 la_data_in[48] vssa1 0.63fF +C2360 la_oenb[47] vssa1 0.63fF +C2361 la_data_out[47] vssa1 0.63fF +C2362 la_data_in[47] vssa1 0.63fF +C2363 la_oenb[46] vssa1 0.63fF +C2364 la_data_out[46] vssa1 0.63fF +C2365 la_data_in[46] vssa1 0.63fF +C2366 la_oenb[45] vssa1 0.63fF +C2367 la_data_out[45] vssa1 0.63fF +C2368 la_data_in[45] vssa1 0.63fF +C2369 la_oenb[44] vssa1 0.63fF +C2370 la_data_out[44] vssa1 0.63fF +C2371 la_data_in[44] vssa1 0.63fF +C2372 la_oenb[43] vssa1 0.63fF +C2373 la_data_out[43] vssa1 0.63fF +C2374 la_data_in[43] vssa1 0.63fF +C2375 la_oenb[42] vssa1 0.63fF +C2376 la_data_out[42] vssa1 0.63fF +C2377 la_data_in[42] vssa1 0.63fF +C2378 la_oenb[41] vssa1 0.63fF +C2379 la_data_out[41] vssa1 0.63fF +C2380 la_data_in[41] vssa1 0.63fF +C2381 la_oenb[40] vssa1 0.63fF +C2382 la_data_out[40] vssa1 0.63fF +C2383 la_data_in[40] vssa1 0.63fF +C2384 la_oenb[39] vssa1 0.63fF +C2385 la_data_out[39] vssa1 0.63fF +C2386 la_data_in[39] vssa1 0.63fF +C2387 la_oenb[38] vssa1 0.63fF +C2388 la_data_out[38] vssa1 0.63fF +C2389 la_data_in[38] vssa1 0.63fF +C2390 la_oenb[37] vssa1 0.63fF +C2391 la_data_out[37] vssa1 0.63fF +C2392 la_data_in[37] vssa1 0.63fF +C2393 la_oenb[36] vssa1 0.63fF +C2394 la_data_out[36] vssa1 0.63fF +C2395 la_data_in[36] vssa1 0.63fF +C2396 la_oenb[35] vssa1 0.63fF +C2397 la_data_out[35] vssa1 0.63fF +C2398 la_data_in[35] vssa1 0.63fF +C2399 la_oenb[34] vssa1 0.63fF +C2400 la_data_out[34] vssa1 0.63fF +C2401 la_data_in[34] vssa1 0.63fF +C2402 la_oenb[33] vssa1 0.63fF +C2403 la_data_out[33] vssa1 0.63fF +C2404 la_data_in[33] vssa1 0.63fF +C2405 la_oenb[32] vssa1 0.63fF +C2406 la_data_out[32] vssa1 0.63fF +C2407 la_data_in[32] vssa1 0.63fF +C2408 la_oenb[31] vssa1 0.63fF +C2409 la_data_out[31] vssa1 0.63fF +C2410 la_data_in[31] vssa1 0.63fF +C2411 la_oenb[30] vssa1 0.63fF +C2412 la_data_out[30] vssa1 0.63fF +C2413 la_data_in[30] vssa1 0.63fF +C2414 la_oenb[29] vssa1 0.63fF +C2415 la_data_out[29] vssa1 0.63fF +C2416 la_data_in[29] vssa1 0.63fF +C2417 la_oenb[28] vssa1 0.63fF +C2418 la_data_out[28] vssa1 0.63fF +C2419 la_data_in[28] vssa1 0.63fF +C2420 la_oenb[27] vssa1 0.63fF +C2421 la_data_out[27] vssa1 0.63fF +C2422 la_data_in[27] vssa1 0.63fF +C2423 la_oenb[26] vssa1 0.63fF +C2424 la_data_out[26] vssa1 0.63fF +C2425 la_data_in[26] vssa1 0.63fF +C2426 la_oenb[25] vssa1 0.63fF +C2427 la_data_out[25] vssa1 0.63fF +C2428 la_data_in[25] vssa1 0.63fF +C2429 la_oenb[24] vssa1 0.63fF +C2430 la_data_out[24] vssa1 0.63fF +C2431 la_data_in[24] vssa1 0.63fF +C2432 la_oenb[23] vssa1 0.63fF +C2433 la_data_out[23] vssa1 0.63fF +C2434 la_data_in[23] vssa1 0.63fF +C2435 la_oenb[22] vssa1 0.63fF +C2436 la_data_out[22] vssa1 0.63fF +C2437 la_data_in[22] vssa1 0.63fF +C2438 la_oenb[21] vssa1 0.63fF +C2439 la_data_out[21] vssa1 0.63fF +C2440 la_data_in[21] vssa1 0.63fF +C2441 la_oenb[20] vssa1 0.63fF +C2442 la_data_out[20] vssa1 0.63fF +C2443 la_data_in[20] vssa1 0.63fF +C2444 la_oenb[19] vssa1 0.63fF +C2445 la_data_out[19] vssa1 0.63fF +C2446 la_data_in[19] vssa1 0.63fF +C2447 la_oenb[18] vssa1 0.63fF +C2448 la_data_out[18] vssa1 0.63fF +C2449 la_data_in[18] vssa1 0.63fF +C2450 la_oenb[17] vssa1 0.63fF +C2451 la_data_out[17] vssa1 0.63fF +C2452 la_data_in[17] vssa1 0.63fF +C2453 la_oenb[16] vssa1 0.63fF +C2454 la_data_out[16] vssa1 0.63fF +C2455 la_data_in[16] vssa1 0.63fF +C2456 la_oenb[15] vssa1 0.63fF +C2457 la_data_out[15] vssa1 0.63fF +C2458 la_data_in[15] vssa1 0.63fF +C2459 la_oenb[14] vssa1 0.63fF +C2460 la_data_out[14] vssa1 0.63fF +C2461 la_data_in[14] vssa1 0.63fF +C2462 la_oenb[13] vssa1 0.63fF +C2463 la_data_out[13] vssa1 0.63fF +C2464 la_data_in[13] vssa1 0.63fF +C2465 la_oenb[12] vssa1 0.63fF +C2466 la_data_out[12] vssa1 0.63fF +C2467 la_data_in[12] vssa1 0.63fF +C2468 la_oenb[11] vssa1 0.63fF +C2469 la_data_out[11] vssa1 0.63fF +C2470 la_data_in[11] vssa1 0.63fF +C2471 la_oenb[10] vssa1 0.63fF +C2472 la_data_out[10] vssa1 0.63fF +C2473 la_data_in[10] vssa1 0.63fF +C2474 la_oenb[9] vssa1 0.63fF +C2475 la_data_out[9] vssa1 0.63fF +C2476 la_data_in[9] vssa1 0.63fF +C2477 la_oenb[8] vssa1 0.63fF +C2478 la_data_out[8] vssa1 0.63fF +C2479 la_data_in[8] vssa1 0.63fF +C2480 la_oenb[7] vssa1 0.63fF +C2481 la_data_out[7] vssa1 0.63fF +C2482 la_data_in[7] vssa1 0.63fF +C2483 la_oenb[6] vssa1 0.63fF +C2484 la_data_out[6] vssa1 0.63fF +C2485 la_data_in[6] vssa1 0.63fF +C2486 la_oenb[5] vssa1 0.63fF +C2487 la_data_out[5] vssa1 0.63fF +C2488 la_data_in[5] vssa1 0.63fF +C2489 la_oenb[4] vssa1 0.63fF +C2490 la_data_out[4] vssa1 0.63fF +C2491 la_data_in[4] vssa1 0.63fF +C2492 la_oenb[3] vssa1 0.63fF +C2493 la_data_out[3] vssa1 0.63fF +C2494 la_data_in[3] vssa1 0.63fF +C2495 la_oenb[2] vssa1 0.63fF +C2496 la_data_out[2] vssa1 0.63fF +C2497 la_data_in[2] vssa1 0.63fF +C2498 la_oenb[1] vssa1 0.63fF +C2499 la_data_out[1] vssa1 0.63fF +C2500 la_data_in[1] vssa1 0.63fF +C2501 la_oenb[0] vssa1 0.63fF +C2502 la_data_out[0] vssa1 0.63fF +C2503 la_data_in[0] vssa1 0.63fF +C2504 wbs_dat_o[31] vssa1 0.63fF +C2505 wbs_dat_i[31] vssa1 0.63fF +C2506 wbs_adr_i[31] vssa1 0.63fF +C2507 wbs_dat_o[30] vssa1 0.63fF +C2508 wbs_dat_i[30] vssa1 0.63fF +C2509 wbs_adr_i[30] vssa1 0.63fF +C2510 wbs_dat_o[29] vssa1 0.63fF +C2511 wbs_dat_i[29] vssa1 0.63fF +C2512 wbs_adr_i[29] vssa1 0.63fF +C2513 wbs_dat_o[28] vssa1 0.63fF +C2514 wbs_dat_i[28] vssa1 0.63fF +C2515 wbs_adr_i[28] vssa1 0.63fF +C2516 wbs_dat_o[27] vssa1 0.63fF +C2517 wbs_dat_i[27] vssa1 0.63fF +C2518 wbs_adr_i[27] vssa1 0.63fF +C2519 wbs_dat_o[26] vssa1 0.63fF +C2520 wbs_dat_i[26] vssa1 0.63fF +C2521 wbs_adr_i[26] vssa1 0.63fF +C2522 wbs_dat_o[25] vssa1 0.63fF +C2523 wbs_dat_i[25] vssa1 0.63fF +C2524 wbs_adr_i[25] vssa1 0.63fF +C2525 wbs_dat_o[24] vssa1 0.63fF +C2526 wbs_dat_i[24] vssa1 0.63fF +C2527 wbs_adr_i[24] vssa1 0.63fF +C2528 wbs_dat_o[23] vssa1 0.63fF +C2529 wbs_dat_i[23] vssa1 0.63fF +C2530 wbs_adr_i[23] vssa1 0.63fF +C2531 wbs_dat_o[22] vssa1 0.63fF +C2532 wbs_dat_i[22] vssa1 0.63fF +C2533 wbs_adr_i[22] vssa1 0.63fF +C2534 wbs_dat_o[21] vssa1 0.63fF +C2535 wbs_dat_i[21] vssa1 0.63fF +C2536 wbs_adr_i[21] vssa1 0.63fF +C2537 wbs_dat_o[20] vssa1 0.63fF +C2538 wbs_dat_i[20] vssa1 0.63fF +C2539 wbs_adr_i[20] vssa1 0.63fF +C2540 wbs_dat_o[19] vssa1 0.63fF +C2541 wbs_dat_i[19] vssa1 0.63fF +C2542 wbs_adr_i[19] vssa1 0.63fF +C2543 wbs_dat_o[18] vssa1 0.63fF +C2544 wbs_dat_i[18] vssa1 0.63fF +C2545 wbs_adr_i[18] vssa1 0.63fF +C2546 wbs_dat_o[17] vssa1 0.63fF +C2547 wbs_dat_i[17] vssa1 0.63fF +C2548 wbs_adr_i[17] vssa1 0.63fF +C2549 wbs_dat_o[16] vssa1 0.63fF +C2550 wbs_dat_i[16] vssa1 0.63fF +C2551 wbs_adr_i[16] vssa1 0.63fF +C2552 wbs_dat_o[15] vssa1 0.63fF +C2553 wbs_dat_i[15] vssa1 0.63fF +C2554 wbs_adr_i[15] vssa1 0.63fF +C2555 wbs_dat_o[14] vssa1 0.63fF +C2556 wbs_dat_i[14] vssa1 0.63fF +C2557 wbs_adr_i[14] vssa1 0.63fF +C2558 wbs_dat_o[13] vssa1 0.63fF +C2559 wbs_dat_i[13] vssa1 0.63fF +C2560 wbs_adr_i[13] vssa1 0.63fF +C2561 wbs_dat_o[12] vssa1 0.63fF +C2562 wbs_dat_i[12] vssa1 0.63fF +C2563 wbs_adr_i[12] vssa1 0.63fF +C2564 wbs_dat_o[11] vssa1 0.63fF +C2565 wbs_dat_i[11] vssa1 0.63fF +C2566 wbs_adr_i[11] vssa1 0.63fF +C2567 wbs_dat_o[10] vssa1 0.63fF +C2568 wbs_dat_i[10] vssa1 0.63fF +C2569 wbs_adr_i[10] vssa1 0.63fF +C2570 wbs_dat_o[9] vssa1 0.63fF +C2571 wbs_dat_i[9] vssa1 0.63fF +C2572 wbs_adr_i[9] vssa1 0.63fF +C2573 wbs_dat_o[8] vssa1 0.63fF +C2574 wbs_dat_i[8] vssa1 0.63fF +C2575 wbs_adr_i[8] vssa1 0.63fF +C2576 wbs_dat_o[7] vssa1 0.63fF +C2577 wbs_dat_i[7] vssa1 0.63fF +C2578 wbs_adr_i[7] vssa1 0.63fF +C2579 wbs_dat_o[6] vssa1 0.63fF +C2580 wbs_dat_i[6] vssa1 0.63fF +C2581 wbs_adr_i[6] vssa1 0.63fF +C2582 wbs_dat_o[5] vssa1 0.63fF +C2583 wbs_dat_i[5] vssa1 0.63fF +C2584 wbs_adr_i[5] vssa1 0.63fF +C2585 wbs_dat_o[4] vssa1 0.63fF +C2586 wbs_dat_i[4] vssa1 0.63fF +C2587 wbs_adr_i[4] vssa1 0.63fF +C2588 wbs_sel_i[3] vssa1 0.63fF +C2589 wbs_dat_o[3] vssa1 0.63fF +C2590 wbs_dat_i[3] vssa1 0.63fF +C2591 wbs_adr_i[3] vssa1 0.63fF +C2592 wbs_sel_i[2] vssa1 0.63fF +C2593 wbs_dat_o[2] vssa1 0.63fF +C2594 wbs_dat_i[2] vssa1 0.63fF +C2595 wbs_adr_i[2] vssa1 0.63fF +C2596 wbs_sel_i[1] vssa1 0.63fF +C2597 wbs_dat_o[1] vssa1 0.63fF +C2598 wbs_dat_i[1] vssa1 0.63fF +C2599 wbs_adr_i[1] vssa1 0.63fF +C2600 wbs_sel_i[0] vssa1 0.63fF +C2601 wbs_dat_o[0] vssa1 0.63fF +C2602 wbs_dat_i[0] vssa1 0.63fF +C2603 wbs_adr_i[0] vssa1 0.63fF +C2604 wbs_we_i vssa1 0.63fF +C2605 wbs_stb_i vssa1 0.63fF +C2606 wbs_cyc_i vssa1 0.63fF +C2607 wbs_ack_o vssa1 0.63fF +C2608 wb_rst_i vssa1 0.63fF +C2609 wb_clk_i vssa1 0.63fF +C2610 pll_full_1/divider_0/and_0/Z1 vssa1 0.65fF +C2611 pll_full_1/divider_0/and_0/B vssa1 2.45fF +C2612 pll_full_1/divider_0/and_0/A vssa1 2.35fF +C2613 pll_full_1/divider_0/and_0/out1 vssa1 2.99fF +C2614 pll_full_1/divider_0/tspc_2/Z4 vssa1 0.86fF +C2615 pll_full_1/div vssa1 14.90fF +C2616 pll_full_1/divider_0/tspc_2/Z3 vssa1 2.26fF +C2617 pll_full_1/divider_0/tspc_2/Z2 vssa1 1.46fF +C2618 pll_full_1/divider_0/tspc_2/Z1 vssa1 0.99fF +C2619 pll_full_1/divider_0/nor_0/B vssa1 6.48fF +C2620 pll_full_1/divider_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING +C2621 pll_full_1/divider_0/tspc_1/Z4 vssa1 0.86fF +C2622 pll_full_1/divider_0/tspc_1/Q vssa1 3.12fF +C2623 pll_full_1/divider_0/tspc_1/Z3 vssa1 2.26fF +C2624 pll_full_1/divider_0/tspc_1/Z2 vssa1 1.46fF +C2625 pll_full_1/divider_0/tspc_1/Z1 vssa1 0.99fF +C2626 pll_full_1/divider_0/nor_1/B vssa1 7.12fF +C2627 pll_full_1/divider_0/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING +C2628 pll_full_1/divider_0/tspc_0/Z4 vssa1 0.86fF +C2629 pll_full_1/divider_0/tspc_0/Q vssa1 3.14fF +C2630 pll_full_1/divider_0/tspc_0/Z3 vssa1 2.26fF +C2631 pll_full_1/divider_0/tspc_0/Z2 vssa1 1.46fF +C2632 pll_full_1/divider_0/tspc_0/Z1 vssa1 0.99fF +C2633 pll_full_1/divider_0/nor_1/A vssa1 7.08fF +C2634 pll_full_1/divider_0/tspc_0/a_630_n680# vssa1 1.15fF **FLOATING +C2635 pll_full_1/vco vssa1 35.22fF +C2636 pll_full_1/divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF +C2637 pll_full_1/divider_0/prescaler_0/tspc_0/D vssa1 2.64fF +C2638 pll_full_1/divider_0/prescaler_0/tspc_2/Q vssa1 3.72fF +C2639 pll_full_1/divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF +C2640 pll_full_1/divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF +C2641 pll_full_1/divider_0/prescaler_0/tspc_2/D vssa1 3.12fF +C2642 pll_full_1/divider_0/and_0/OUT vssa1 5.67fF +C2643 pll_full_1/divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF +C2644 pll_full_1/divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF +C2645 pll_full_1/divider_0/prescaler_0/tspc_2/Z2 vssa1 1.19fF +C2646 pll_full_1/divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF +C2647 pll_full_1/divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.47fF **FLOATING +C2648 pll_full_1/divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING +C2649 pll_full_1/divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF +C2650 pll_full_1/divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF +C2651 pll_full_1/divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF +C2652 pll_full_1/divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF +C2653 pll_full_1/divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING +C2654 pll_full_1/divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING +C2655 pll_full_1/divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF +C2656 pll_full_1/divider_0/prescaler_0/Out vssa1 4.59fF +C2657 pll_full_1/divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF +C2658 pll_full_1/divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF +C2659 pll_full_1/divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF +C2660 pll_full_1/divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING +C2661 pll_full_1/divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING +C2662 pll_full_1/divider_0/nor_1/Z1 vssa1 1.34fF +C2663 pll_full_1/divider_0/nor_0/Z1 vssa1 1.34fF +C2664 pll_full_1/ro_complete_0/cbank_2/v vssa1 16.43fF +C2665 pll_full_1/ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF +C2666 pll_full_1/ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF +C2667 pll_full_1/ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF +C2668 pll_full_1/ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF +C2669 pll_full_1/ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF +C2670 pll_full_1/ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF +C2671 pll_full_1/ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF +C2672 pll_full_1/ro_complete_0/a0 vssa1 5.35fF +C2673 pll_full_1/ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF +C2674 pll_full_1/ro_complete_0/a1 vssa1 6.54fF +C2675 pll_full_1/ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF +C2676 pll_full_1/ro_complete_0/a3 vssa1 5.96fF +C2677 pll_full_1/ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF +C2678 pll_full_1/ro_complete_0/a2 vssa1 5.21fF +C2679 pll_full_1/ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF +C2680 pll_full_1/ro_complete_0/a4 vssa1 5.81fF +C2681 pll_full_1/ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF +C2682 pll_full_1/ro_complete_0/a5 vssa1 6.74fF +C2683 pll_full_1/ro_complete_0/cbank_0/v vssa1 15.12fF +C2684 pll_full_1/ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF +C2685 pll_full_1/ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF +C2686 pll_full_1/ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF +C2687 pll_full_1/ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF +C2688 pll_full_1/ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF +C2689 pll_full_1/ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF +C2690 pll_full_1/filter_0/a_4216_n5230# vssa1 418.90fF **FLOATING +C2691 pll_full_1/filter_0/a_4216_n2998# vssa1 1.39fF **FLOATING +C2692 pll_full_1/cp_0/down vssa1 1.54fF +C2693 pll_full_1/cp_0/upbar vssa1 1.79fF +C2694 pll_full_1/cp_0/a_7110_n2840# vssa1 0.17fF **FLOATING +C2695 pll_full_1/cp_0/a_3060_n2840# vssa1 1.71fF **FLOATING +C2696 pll_full_1/cp_0/a_7110_0# vssa1 0.17fF **FLOATING +C2697 pll_full_1/cp_0/a_6370_0# vssa1 0.40fF **FLOATING +C2698 pll_full_1/cp_0/a_3060_0# vssa1 2.50fF **FLOATING +C2699 pll_full_1/cp_0/a_1710_0# vssa1 7.47fF **FLOATING +C2700 pll_full_1/pd_0/UP vssa1 5.89fF +C2701 pll_full_1/pd_0/and_pd_0/Z1 vssa1 0.39fF +C2702 pll_full_1/pd_0/and_pd_0/Out1 vssa1 2.22fF +C2703 pll_full_1/pd_0/tspc_r_1/z5 vssa1 1.10fF +C2704 pll_full_1/pd_0/tspc_r_1/Z4 vssa1 1.07fF +C2705 pll_full_1/pd_0/R vssa1 3.05fF +C2706 pll_full_1/pd_0/tspc_r_1/Qbar vssa1 0.79fF +C2707 pll_full_1/pd_0/tspc_r_1/Z2 vssa1 1.22fF +C2708 pll_full_1/pd_0/tspc_r_1/Z1 vssa1 0.67fF +C2709 pll_full_1/pd_0/DOWN vssa1 7.38fF +C2710 pll_full_1/pd_0/tspc_r_1/Qbar1 vssa1 1.34fF +C2711 pll_full_1/pd_0/tspc_r_1/Z3 vssa1 2.12fF +C2712 pll_full_1/pd_0/tspc_r_0/z5 vssa1 1.10fF +C2713 pll_full_1/pd_0/tspc_r_0/Z4 vssa1 1.07fF +C2714 pll_full_1/pd_0/tspc_r_0/Qbar vssa1 0.88fF +C2715 pll_full_1/pd_0/tspc_r_0/Z2 vssa1 1.22fF +C2716 pll_full_1/pd_0/tspc_r_0/Z1 vssa1 0.67fF +C2717 pll_full_1/pd_0/tspc_r_0/Qbar1 vssa1 1.34fF +C2718 pll_full_1/pd_0/tspc_r_0/Z3 vssa1 2.12fF +C2719 pll_full_1/ref vssa1 4.34fF +C2720 pll_full_0/divider_0/and_0/Z1 vssa1 0.65fF +C2721 pll_full_0/divider_0/and_0/B vssa1 2.45fF +C2722 pll_full_0/divider_0/and_0/A vssa1 2.35fF +C2723 pll_full_0/divider_0/and_0/out1 vssa1 2.99fF +C2724 pll_full_0/divider_0/tspc_2/Z4 vssa1 0.86fF +C2725 pll_full_0/div vssa1 14.90fF +C2726 pll_full_0/divider_0/tspc_2/Z3 vssa1 2.26fF +C2727 pll_full_0/divider_0/tspc_2/Z2 vssa1 1.46fF +C2728 pll_full_0/divider_0/tspc_2/Z1 vssa1 0.99fF +C2729 pll_full_0/divider_0/nor_0/B vssa1 6.48fF +C2730 pll_full_0/divider_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING +C2731 pll_full_0/divider_0/tspc_1/Z4 vssa1 0.86fF +C2732 pll_full_0/divider_0/tspc_1/Q vssa1 3.12fF +C2733 pll_full_0/divider_0/tspc_1/Z3 vssa1 2.26fF +C2734 pll_full_0/divider_0/tspc_1/Z2 vssa1 1.46fF +C2735 pll_full_0/divider_0/tspc_1/Z1 vssa1 0.99fF +C2736 pll_full_0/divider_0/nor_1/B vssa1 7.12fF +C2737 pll_full_0/divider_0/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING +C2738 pll_full_0/divider_0/tspc_0/Z4 vssa1 0.86fF +C2739 pll_full_0/divider_0/tspc_0/Q vssa1 3.14fF +C2740 pll_full_0/divider_0/tspc_0/Z3 vssa1 2.26fF +C2741 pll_full_0/divider_0/tspc_0/Z2 vssa1 1.46fF +C2742 pll_full_0/divider_0/tspc_0/Z1 vssa1 0.99fF +C2743 pll_full_0/divider_0/nor_1/A vssa1 7.08fF +C2744 pll_full_0/divider_0/tspc_0/a_630_n680# vssa1 1.15fF **FLOATING +C2745 pll_full_0/vco vssa1 35.22fF +C2746 pll_full_0/divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF +C2747 pll_full_0/divider_0/prescaler_0/tspc_0/D vssa1 2.64fF +C2748 pll_full_0/divider_0/prescaler_0/tspc_2/Q vssa1 3.72fF +C2749 pll_full_0/divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF +C2750 pll_full_0/divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF +C2751 pll_full_0/divider_0/prescaler_0/tspc_2/D vssa1 3.12fF +C2752 pll_full_0/divider_0/and_0/OUT vssa1 5.67fF +C2753 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF +C2754 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF +C2755 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 vssa1 1.19fF +C2756 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF +C2757 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.47fF **FLOATING +C2758 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING +C2759 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF +C2760 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF +C2761 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF +C2762 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF +C2763 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING +C2764 pll_full_0/divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING +C2765 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF +C2766 pll_full_0/divider_0/prescaler_0/Out vssa1 4.59fF +C2767 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF +C2768 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF +C2769 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF +C2770 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING +C2771 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING +C2772 pll_full_0/divider_0/nor_1/Z1 vssa1 1.34fF +C2773 pll_full_0/divider_0/nor_0/Z1 vssa1 1.34fF +C2774 pll_full_0/ro_complete_0/cbank_2/v vssa1 16.43fF +C2775 pll_full_0/ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF +C2776 pll_full_0/ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF +C2777 pll_full_0/ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF +C2778 pll_full_0/ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF +C2779 pll_full_0/ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF +C2780 pll_full_0/ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF +C2781 pll_full_0/ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF +C2782 pll_full_0/ro_complete_0/a0 vssa1 5.35fF +C2783 pll_full_0/ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF +C2784 pll_full_0/ro_complete_0/a1 vssa1 6.54fF +C2785 pll_full_0/ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF +C2786 pll_full_0/ro_complete_0/a3 vssa1 5.96fF +C2787 pll_full_0/ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF +C2788 pll_full_0/ro_complete_0/a2 vssa1 5.21fF +C2789 pll_full_0/ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF +C2790 pll_full_0/ro_complete_0/a4 vssa1 5.81fF +C2791 pll_full_0/ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF +C2792 pll_full_0/ro_complete_0/a5 vssa1 6.74fF +C2793 pll_full_0/ro_complete_0/cbank_0/v vssa1 15.12fF +C2794 pll_full_0/ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF +C2795 pll_full_0/ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF +C2796 pll_full_0/ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF +C2797 pll_full_0/ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF +C2798 pll_full_0/ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF +C2799 pll_full_0/ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF +C2800 pll_full_0/filter_0/a_4216_n5230# vssa1 418.90fF **FLOATING +C2801 pll_full_0/filter_0/a_4216_n2998# vssa1 1.39fF **FLOATING +C2802 pll_full_0/cp_0/down vssa1 1.54fF +C2803 pll_full_0/cp_0/upbar vssa1 1.79fF +C2804 pll_full_0/cp_0/a_7110_n2840# vssa1 0.17fF **FLOATING +C2805 pll_full_0/cp_0/a_3060_n2840# vssa1 1.71fF **FLOATING +C2806 pll_full_0/cp_0/a_7110_0# vssa1 0.17fF **FLOATING +C2807 pll_full_0/cp_0/a_6370_0# vssa1 0.40fF **FLOATING +C2808 pll_full_0/cp_0/a_3060_0# vssa1 2.50fF **FLOATING +C2809 pll_full_0/cp_0/a_1710_0# vssa1 7.47fF **FLOATING +C2810 pll_full_0/pd_0/UP vssa1 5.89fF +C2811 pll_full_0/pd_0/and_pd_0/Z1 vssa1 0.39fF +C2812 pll_full_0/pd_0/and_pd_0/Out1 vssa1 2.22fF +C2813 pll_full_0/pd_0/tspc_r_1/z5 vssa1 1.10fF +C2814 pll_full_0/pd_0/tspc_r_1/Z4 vssa1 1.07fF +C2815 pll_full_0/pd_0/R vssa1 3.05fF +C2816 pll_full_0/pd_0/tspc_r_1/Qbar vssa1 0.79fF +C2817 pll_full_0/pd_0/tspc_r_1/Z2 vssa1 1.22fF +C2818 pll_full_0/pd_0/tspc_r_1/Z1 vssa1 0.67fF +C2819 pll_full_0/pd_0/DOWN vssa1 7.38fF +C2820 pll_full_0/pd_0/tspc_r_1/Qbar1 vssa1 1.34fF +C2821 pll_full_0/pd_0/tspc_r_1/Z3 vssa1 2.12fF +C2822 pll_full_0/pd_0/tspc_r_0/z5 vssa1 1.10fF +C2823 pll_full_0/pd_0/tspc_r_0/Z4 vssa1 1.07fF +C2824 pll_full_0/pd_0/tspc_r_0/Qbar vssa1 0.88fF +C2825 pll_full_0/pd_0/tspc_r_0/Z2 vssa1 1.22fF +C2826 pll_full_0/pd_0/tspc_r_0/Z1 vssa1 0.67fF +C2827 pll_full_0/pd_0/tspc_r_0/Qbar1 vssa1 1.34fF +C2828 pll_full_0/pd_0/tspc_r_0/Z3 vssa1 2.12fF +C2829 pll_full_0/ref vssa1 4.34fF +C2830 div_pd_buffered_0/tapered_buf_0/in vssa1 1.13fF +C2831 div_pd_buffered_0/tapered_buf_0/a_n10_n140# vssa1 0.06fF **FLOATING +C2832 div_pd_buffered_0/tapered_buf_0/a_210_n610# vssa1 588.54fF **FLOATING +C2833 div_pd_buffered_0/tapered_buf_0/a_160_230# vssa1 0.15fF **FLOATING +C2834 div_pd_buffered_0/tapered_buf_0/a_n10_230# vssa1 0.13fF **FLOATING +C2835 div_pd_buffered_0/tapered_buf_0/a_4670_0# vssa1 250.63fF **FLOATING +C2836 div_pd_buffered_0/tapered_buf_0/a_1650_0# vssa1 63.04fF **FLOATING +C2837 div_pd_buffered_0/tapered_buf_0/a_580_0# vssa1 16.64fF **FLOATING +C2838 div_pd_buffered_0/tapered_buf_0/a_160_n140# vssa1 4.00fF **FLOATING +C2839 div_pd_buffered_0/tapered_buf_1/in vssa1 1.13fF +C2840 div_pd_buffered_0/tapered_buf_1/a_n10_n140# vssa1 0.06fF **FLOATING +C2841 div_pd_buffered_0/tapered_buf_1/a_210_n610# vssa1 588.54fF **FLOATING +C2842 div_pd_buffered_0/tapered_buf_1/a_160_230# vssa1 0.15fF **FLOATING +C2843 div_pd_buffered_0/tapered_buf_1/a_n10_230# vssa1 0.13fF **FLOATING +C2844 div_pd_buffered_0/tapered_buf_1/a_4670_0# vssa1 250.63fF **FLOATING +C2845 div_pd_buffered_0/tapered_buf_1/a_1650_0# vssa1 63.04fF **FLOATING +C2846 div_pd_buffered_0/tapered_buf_1/a_580_0# vssa1 16.64fF **FLOATING +C2847 div_pd_buffered_0/tapered_buf_1/a_160_n140# vssa1 4.00fF **FLOATING +C2848 div_pd_buffered_0/divider_0/and_0/Z1 vssa1 0.74fF +C2849 div_pd_buffered_0/divider_0/and_0/B vssa1 2.25fF +C2850 div_pd_buffered_0/divider_0/and_0/A vssa1 2.19fF +C2851 div_pd_buffered_0/divider_0/and_0/out1 vssa1 2.93fF +C2852 div_pd_buffered_0/divider_0/tspc_2/Z4 vssa1 0.86fF +C2853 div_pd_buffered_0/divider_0/tspc_2/Z3 vssa1 2.26fF +C2854 div_pd_buffered_0/divider_0/tspc_2/Z2 vssa1 1.46fF +C2855 div_pd_buffered_0/divider_0/tspc_2/Z1 vssa1 0.99fF +C2856 div_pd_buffered_0/divider_0/nor_0/B vssa1 6.37fF +C2857 div_pd_buffered_0/divider_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING +C2858 div_pd_buffered_0/divider_0/tspc_1/Z4 vssa1 0.86fF +C2859 div_pd_buffered_0/divider_0/tspc_1/Q vssa1 3.12fF +C2860 div_pd_buffered_0/divider_0/tspc_1/Z3 vssa1 2.26fF +C2861 div_pd_buffered_0/divider_0/tspc_1/Z2 vssa1 1.46fF +C2862 div_pd_buffered_0/divider_0/tspc_1/Z1 vssa1 0.99fF +C2863 div_pd_buffered_0/divider_0/nor_1/B vssa1 7.05fF +C2864 div_pd_buffered_0/divider_0/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING +C2865 div_pd_buffered_0/divider_0/tspc_0/Z4 vssa1 0.86fF +C2866 div_pd_buffered_0/divider_0/tspc_0/Q vssa1 3.14fF +C2867 div_pd_buffered_0/divider_0/tspc_0/Z3 vssa1 2.26fF +C2868 div_pd_buffered_0/divider_0/tspc_0/Z2 vssa1 1.46fF +C2869 div_pd_buffered_0/divider_0/tspc_0/Z1 vssa1 0.99fF +C2870 div_pd_buffered_0/divider_0/nor_1/A vssa1 7.04fF +C2871 div_pd_buffered_0/divider_0/tspc_0/a_630_n680# vssa1 1.15fF **FLOATING +C2872 div_pd_buffered_0/divider_0/clk vssa1 398.71fF +C2873 div_pd_buffered_0/divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF +C2874 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/D vssa1 2.64fF +C2875 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Q vssa1 3.64fF +C2876 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF +C2877 div_pd_buffered_0/divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF +C2878 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/D vssa1 3.12fF +C2879 div_pd_buffered_0/divider_0/and_0/OUT vssa1 5.62fF +C2880 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF +C2881 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF +C2882 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z2 vssa1 1.46fF +C2883 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF +C2884 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING +C2885 div_pd_buffered_0/divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING +C2886 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF +C2887 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF +C2888 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF +C2889 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF +C2890 div_pd_buffered_0/divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING +C2891 div_pd_buffered_0/divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING +C2892 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF +C2893 div_pd_buffered_0/divider_0/prescaler_0/Out vssa1 4.59fF +C2894 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF +C2895 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF +C2896 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF +C2897 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING +C2898 div_pd_buffered_0/divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING +C2899 div_pd_buffered_0/divider_0/nor_1/Z1 vssa1 1.34fF +C2900 div_pd_buffered_0/divider_0/nor_0/Z1 vssa1 1.34fF +C2901 div_pd_buffered_0/divider_0/mc2 vssa1 392.35fF +C2902 div_pd_buffered_0/pd_0/UP vssa1 5.76fF +C2903 div_pd_buffered_0/pd_0/and_pd_0/Z1 vssa1 0.39fF +C2904 div_pd_buffered_0/pd_0/and_pd_0/Out1 vssa1 2.22fF +C2905 div_pd_buffered_0/pd_0/tspc_r_1/z5 vssa1 1.10fF +C2906 div_pd_buffered_0/pd_0/tspc_r_1/Z4 vssa1 1.07fF +C2907 div_pd_buffered_0/pd_0/R vssa1 3.05fF +C2908 div_pd_buffered_0/pd_0/tspc_r_1/Qbar vssa1 0.79fF +C2909 div_pd_buffered_0/pd_0/tspc_r_1/Z2 vssa1 1.22fF +C2910 div_pd_buffered_0/pd_0/tspc_r_1/Z1 vssa1 0.67fF +C2911 div_pd_buffered_0/pd_0/DOWN vssa1 9.94fF +C2912 div_pd_buffered_0/pd_0/tspc_r_1/Qbar1 vssa1 1.34fF +C2913 div_pd_buffered_0/pd_0/tspc_r_1/Z3 vssa1 2.12fF +C2914 div_pd_buffered_0/pd_0/DIV vssa1 5.85fF +C2915 div_pd_buffered_0/pd_0/tspc_r_0/z5 vssa1 1.10fF +C2916 div_pd_buffered_0/pd_0/tspc_r_0/Z4 vssa1 1.07fF +C2917 div_pd_buffered_0/pd_0/tspc_r_0/Qbar vssa1 0.88fF +C2918 div_pd_buffered_0/pd_0/tspc_r_0/Z2 vssa1 1.22fF +C2919 div_pd_buffered_0/pd_0/tspc_r_0/Z1 vssa1 0.67fF +C2920 div_pd_buffered_0/pd_0/tspc_r_0/Qbar1 vssa1 1.34fF +C2921 div_pd_buffered_0/pd_0/tspc_r_0/Z3 vssa1 2.12fF +C2922 div_pd_buffered_0/pd_0/REF vssa1 394.19fF +C2923 div_pd_buffered_0/tapered_buf_4/out vssa1 385.14fF +C2924 div_pd_buffered_0/tapered_buf_4/a_n10_n140# vssa1 0.06fF **FLOATING +C2925 div_pd_buffered_0/tapered_buf_4/a_210_n610# vssa1 588.54fF **FLOATING +C2926 div_pd_buffered_0/tapered_buf_4/a_160_230# vssa1 0.15fF **FLOATING +C2927 div_pd_buffered_0/tapered_buf_4/a_n10_230# vssa1 0.13fF **FLOATING +C2928 div_pd_buffered_0/tapered_buf_4/a_4670_0# vssa1 250.63fF **FLOATING +C2929 div_pd_buffered_0/tapered_buf_4/a_1650_0# vssa1 63.04fF **FLOATING +C2930 div_pd_buffered_0/tapered_buf_4/a_580_0# vssa1 16.64fF **FLOATING +C2931 div_pd_buffered_0/tapered_buf_4/a_160_n140# vssa1 4.00fF **FLOATING +C2932 div_pd_buffered_0/tapered_buf_3/out vssa1 385.17fF +C2933 div_pd_buffered_0/tapered_buf_3/a_n10_n140# vssa1 0.06fF **FLOATING +C2934 div_pd_buffered_0/tapered_buf_3/a_210_n610# vssa1 588.54fF **FLOATING +C2935 div_pd_buffered_0/tapered_buf_3/a_160_230# vssa1 0.15fF **FLOATING +C2936 div_pd_buffered_0/tapered_buf_3/a_n10_230# vssa1 0.13fF **FLOATING +C2937 div_pd_buffered_0/tapered_buf_3/a_4670_0# vssa1 250.63fF **FLOATING +C2938 div_pd_buffered_0/tapered_buf_3/a_1650_0# vssa1 63.04fF **FLOATING +C2939 div_pd_buffered_0/tapered_buf_3/a_580_0# vssa1 16.64fF **FLOATING +C2940 div_pd_buffered_0/tapered_buf_3/a_160_n140# vssa1 4.00fF **FLOATING +C2941 div_pd_buffered_0/tapered_buf_2/in vssa1 1.13fF +C2942 div_pd_buffered_0/tapered_buf_2/a_n10_n140# vssa1 0.06fF **FLOATING +C2943 div_pd_buffered_0/tapered_buf_2/a_210_n610# vssa1 588.54fF **FLOATING +C2944 div_pd_buffered_0/tapered_buf_2/a_160_230# vssa1 0.15fF **FLOATING +C2945 div_pd_buffered_0/tapered_buf_2/a_n10_230# vssa1 0.13fF **FLOATING +C2946 div_pd_buffered_0/tapered_buf_2/a_4670_0# vssa1 250.63fF **FLOATING +C2947 div_pd_buffered_0/tapered_buf_2/a_1650_0# vssa1 63.04fF **FLOATING +C2948 div_pd_buffered_0/tapered_buf_2/a_580_0# vssa1 16.64fF **FLOATING +C2949 div_pd_buffered_0/tapered_buf_2/a_160_n140# vssa1 4.00fF **FLOATING +C2950 divider_1/and_0/Z1 vssa1 0.74fF +C2951 divider_1/and_0/B vssa1 2.25fF +C2952 divider_1/and_0/A vssa1 2.19fF +C2953 divider_1/and_0/out1 vssa1 2.93fF +C2954 divider_1/tspc_2/Z4 vssa1 0.86fF +C2955 divider_1/Out vssa1 1.60fF +C2956 divider_1/tspc_2/Z3 vssa1 2.26fF +C2957 divider_1/tspc_2/Z2 vssa1 1.46fF +C2958 divider_1/tspc_2/Z1 vssa1 0.99fF +C2959 divider_1/nor_0/B vssa1 6.33fF +C2960 divider_1/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING +C2961 divider_1/tspc_1/Z4 vssa1 0.86fF +C2962 divider_1/tspc_1/Q vssa1 3.12fF +C2963 divider_1/tspc_1/Z3 vssa1 2.26fF +C2964 divider_1/tspc_1/Z2 vssa1 1.46fF +C2965 divider_1/tspc_1/Z1 vssa1 0.99fF +C2966 divider_1/nor_1/B vssa1 7.05fF +C2967 divider_1/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING +C2968 divider_1/tspc_0/Z4 vssa1 0.86fF +C2969 divider_1/tspc_0/Q vssa1 3.14fF +C2970 divider_1/tspc_0/Z3 vssa1 2.26fF +C2971 divider_1/tspc_0/Z2 vssa1 1.46fF +C2972 divider_1/tspc_0/Z1 vssa1 0.99fF +C2973 divider_1/nor_1/A vssa1 7.04fF +C2974 divider_1/tspc_0/a_630_n680# vssa1 1.15fF **FLOATING +C2975 divider_1/clk vssa1 5.63fF +C2976 divider_1/prescaler_0/nand_1/z1 vssa1 0.36fF +C2977 divider_1/prescaler_0/tspc_0/D vssa1 2.64fF +C2978 divider_1/prescaler_0/tspc_2/Q vssa1 3.74fF +C2979 divider_1/prescaler_0/tspc_1/Q vssa1 3.61fF +C2980 divider_1/prescaler_0/nand_0/z1 vssa1 0.36fF +C2981 divider_1/prescaler_0/tspc_2/D vssa1 3.12fF +C2982 divider_1/and_0/OUT vssa1 5.62fF +C2983 divider_1/prescaler_0/tspc_2/Z4 vssa1 0.86fF +C2984 divider_1/prescaler_0/tspc_2/Z3 vssa1 2.26fF +C2985 divider_1/prescaler_0/tspc_2/Z2 vssa1 1.46fF +C2986 divider_1/prescaler_0/tspc_2/Z1 vssa1 0.99fF +C2987 divider_1/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING +C2988 divider_1/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING +C2989 divider_1/prescaler_0/tspc_1/Z4 vssa1 0.86fF +C2990 divider_1/prescaler_0/tspc_1/Z3 vssa1 2.26fF +C2991 divider_1/prescaler_0/tspc_1/Z2 vssa1 1.48fF +C2992 divider_1/prescaler_0/tspc_1/Z1 vssa1 0.99fF +C2993 divider_1/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING +C2994 divider_1/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING +C2995 divider_1/prescaler_0/tspc_0/Z4 vssa1 0.86fF +C2996 divider_1/prescaler_0/Out vssa1 4.59fF +C2997 divider_1/prescaler_0/tspc_0/Z3 vssa1 2.26fF +C2998 divider_1/prescaler_0/tspc_0/Z2 vssa1 1.46fF +C2999 divider_1/prescaler_0/tspc_0/Z1 vssa1 0.99fF +C3000 divider_1/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING +C3001 divider_1/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING +C3002 divider_1/nor_1/Z1 vssa1 1.34fF +C3003 divider_1/nor_0/Z1 vssa1 1.34fF +C3004 divider_1/mc2 vssa1 5.29fF +C3005 divider_0/and_0/Z1 vssa1 0.74fF +C3006 divider_0/and_0/B vssa1 2.25fF +C3007 divider_0/and_0/A vssa1 2.19fF +C3008 divider_0/and_0/out1 vssa1 2.93fF +C3009 divider_0/tspc_2/Z4 vssa1 0.86fF +C3010 divider_0/Out vssa1 1.60fF +C3011 divider_0/tspc_2/Z3 vssa1 2.26fF +C3012 divider_0/tspc_2/Z2 vssa1 1.46fF +C3013 divider_0/tspc_2/Z1 vssa1 0.99fF +C3014 divider_0/nor_0/B vssa1 6.33fF +C3015 divider_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING +C3016 divider_0/tspc_1/Z4 vssa1 0.86fF +C3017 divider_0/tspc_1/Q vssa1 3.12fF +C3018 divider_0/tspc_1/Z3 vssa1 2.26fF +C3019 divider_0/tspc_1/Z2 vssa1 1.46fF +C3020 divider_0/tspc_1/Z1 vssa1 0.99fF +C3021 divider_0/nor_1/B vssa1 7.05fF +C3022 divider_0/tspc_1/a_630_n680# vssa1 1.15fF **FLOATING +C3023 divider_0/tspc_0/Z4 vssa1 0.86fF +C3024 divider_0/tspc_0/Q vssa1 3.14fF +C3025 divider_0/tspc_0/Z3 vssa1 2.26fF +C3026 divider_0/tspc_0/Z2 vssa1 1.46fF +C3027 divider_0/tspc_0/Z1 vssa1 0.99fF +C3028 divider_0/nor_1/A vssa1 7.04fF +C3029 divider_0/tspc_0/a_630_n680# vssa1 1.15fF **FLOATING +C3030 divider_0/clk vssa1 5.63fF +C3031 divider_0/prescaler_0/nand_1/z1 vssa1 0.36fF +C3032 divider_0/prescaler_0/tspc_0/D vssa1 2.64fF +C3033 divider_0/prescaler_0/tspc_2/Q vssa1 3.64fF +C3034 divider_0/prescaler_0/tspc_1/Q vssa1 3.61fF +C3035 divider_0/prescaler_0/nand_0/z1 vssa1 0.36fF +C3036 divider_0/prescaler_0/tspc_2/D vssa1 3.12fF +C3037 divider_0/and_0/OUT vssa1 5.62fF +C3038 divider_0/prescaler_0/tspc_2/Z4 vssa1 0.86fF +C3039 divider_0/prescaler_0/tspc_2/Z3 vssa1 2.26fF +C3040 divider_0/prescaler_0/tspc_2/Z2 vssa1 1.46fF +C3041 divider_0/prescaler_0/tspc_2/Z1 vssa1 0.99fF +C3042 divider_0/prescaler_0/tspc_2/a_630_n680# vssa1 1.14fF **FLOATING +C3043 divider_0/prescaler_0/tspc_2/a_740_n680# vssa1 2.11fF **FLOATING +C3044 divider_0/prescaler_0/tspc_1/Z4 vssa1 0.86fF +C3045 divider_0/prescaler_0/tspc_1/Z3 vssa1 2.26fF +C3046 divider_0/prescaler_0/tspc_1/Z2 vssa1 1.48fF +C3047 divider_0/prescaler_0/tspc_1/Z1 vssa1 0.99fF +C3048 divider_0/prescaler_0/tspc_1/a_630_n680# vssa1 1.14fF **FLOATING +C3049 divider_0/prescaler_0/m1_2700_2190# vssa1 4.22fF **FLOATING +C3050 divider_0/prescaler_0/tspc_0/Z4 vssa1 0.86fF +C3051 divider_0/prescaler_0/Out vssa1 4.59fF +C3052 divider_0/prescaler_0/tspc_0/Z3 vssa1 2.26fF +C3053 divider_0/prescaler_0/tspc_0/Z2 vssa1 1.46fF +C3054 divider_0/prescaler_0/tspc_0/Z1 vssa1 0.99fF +C3055 divider_0/prescaler_0/tspc_0/a_630_n680# vssa1 1.16fF **FLOATING +C3056 divider_0/prescaler_0/tspc_0/a_740_n680# vssa1 2.11fF **FLOATING +C3057 divider_0/nor_1/Z1 vssa1 1.34fF +C3058 divider_0/nor_0/Z1 vssa1 1.34fF +C3059 divider_0/mc2 vssa1 5.29fF +C3060 ro_complete_buffered_0/tapered_buf_0/in vssa1 1.13fF +C3061 ro_complete_buffered_0/tapered_buf_0/a_n10_n140# vssa1 0.06fF **FLOATING +C3062 ro_complete_buffered_0/tapered_buf_0/a_210_n610# vssa1 588.54fF **FLOATING +C3063 ro_complete_buffered_0/tapered_buf_0/a_160_230# vssa1 0.15fF **FLOATING +C3064 ro_complete_buffered_0/tapered_buf_0/a_n10_230# vssa1 0.13fF **FLOATING +C3065 ro_complete_buffered_0/tapered_buf_0/a_4670_0# vssa1 250.63fF **FLOATING +C3066 ro_complete_buffered_0/tapered_buf_0/a_1650_0# vssa1 63.04fF **FLOATING +C3067 ro_complete_buffered_0/tapered_buf_0/a_580_0# vssa1 16.64fF **FLOATING +C3068 ro_complete_buffered_0/tapered_buf_0/a_160_n140# vssa1 4.00fF **FLOATING +C3069 gnd vssa1 96.41fF +C3070 ro_complete_buffered_0/tapered_buf_1/in vssa1 1.09fF +C3071 ro_complete_buffered_0/tapered_buf_1/a_n10_n140# vssa1 0.06fF **FLOATING +C3072 ro_complete_buffered_0/tapered_buf_1/a_210_n610# vssa1 376.11fF **FLOATING +C3073 ro_complete_buffered_0/tapered_buf_1/a_160_230# vssa1 0.15fF **FLOATING +C3074 ro_complete_buffered_0/tapered_buf_1/a_n10_230# vssa1 0.13fF **FLOATING +C3075 ro_complete_buffered_0/tapered_buf_1/a_4670_0# vssa1 168.15fF **FLOATING +C3076 ro_complete_buffered_0/tapered_buf_1/a_1650_0# vssa1 42.34fF **FLOATING +C3077 ro_complete_buffered_0/tapered_buf_1/a_580_0# vssa1 10.93fF **FLOATING +C3078 ro_complete_buffered_0/tapered_buf_1/a_160_n140# vssa1 2.66fF **FLOATING +C3079 ro_complete_buffered_0/ro_complete_0/cbank_2/v vssa1 16.53fF +C3080 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF +C3081 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF +C3082 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF +C3083 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF +C3084 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF +C3085 ro_complete_buffered_0/ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF +C3086 ro_complete_buffered_0/tapered_buf_6/in vssa1 23.85fF +C3087 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF +C3088 ro_complete_buffered_0/ro_complete_0/a0 vssa1 415.68fF +C3089 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF +C3090 ro_complete_buffered_0/ro_complete_0/a1 vssa1 411.44fF +C3091 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF +C3092 ro_complete_buffered_0/ro_complete_0/a3 vssa1 403.90fF +C3093 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF +C3094 ro_complete_buffered_0/ro_complete_0/a2 vssa1 407.33fF +C3095 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF +C3096 ro_complete_buffered_0/ro_complete_0/a4 vssa1 313.18fF +C3097 ro_complete_buffered_0/ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF +C3098 ro_complete_buffered_0/ro_complete_0/a5 vssa1 400.20fF +C3099 ro_complete_buffered_0/ro_complete_0/cbank_0/v vssa1 15.13fF +C3100 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF +C3101 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF +C3102 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF +C3103 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF +C3104 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF +C3105 ro_complete_buffered_0/ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF +C3106 ro_complete_buffered_0/tapered_buf_7/in vssa1 1.13fF +C3107 ro_complete_buffered_0/tapered_buf_7/a_n10_n140# vssa1 0.06fF **FLOATING +C3108 ro_complete_buffered_0/tapered_buf_7/a_210_n610# vssa1 614.83fF **FLOATING +C3109 ro_complete_buffered_0/tapered_buf_7/a_160_230# vssa1 0.15fF **FLOATING +C3110 ro_complete_buffered_0/tapered_buf_7/a_n10_230# vssa1 0.13fF **FLOATING +C3111 ro_complete_buffered_0/tapered_buf_7/a_4670_0# vssa1 250.63fF **FLOATING +C3112 ro_complete_buffered_0/tapered_buf_7/a_1650_0# vssa1 63.04fF **FLOATING +C3113 ro_complete_buffered_0/tapered_buf_7/a_580_0# vssa1 16.64fF **FLOATING +C3114 ro_complete_buffered_0/tapered_buf_7/a_160_n140# vssa1 4.00fF **FLOATING +C3115 ro_complete_buffered_0/tapered_buf_6/out vssa1 385.11fF +C3116 ro_complete_buffered_0/tapered_buf_6/a_n10_n140# vssa1 0.06fF **FLOATING +C3117 ro_complete_buffered_0/tapered_buf_6/a_210_n610# vssa1 588.54fF **FLOATING +C3118 ro_complete_buffered_0/tapered_buf_6/a_160_230# vssa1 0.15fF **FLOATING +C3119 ro_complete_buffered_0/tapered_buf_6/a_n10_230# vssa1 0.13fF **FLOATING +C3120 ro_complete_buffered_0/tapered_buf_6/a_4670_0# vssa1 250.63fF **FLOATING +C3121 ro_complete_buffered_0/tapered_buf_6/a_1650_0# vssa1 63.04fF **FLOATING +C3122 ro_complete_buffered_0/tapered_buf_6/a_580_0# vssa1 16.64fF **FLOATING +C3123 ro_complete_buffered_0/tapered_buf_6/a_160_n140# vssa1 4.00fF **FLOATING +C3124 ro_complete_buffered_0/tapered_buf_5/in vssa1 1.13fF +C3125 ro_complete_buffered_0/tapered_buf_5/a_n10_n140# vssa1 0.06fF **FLOATING +C3126 ro_complete_buffered_0/tapered_buf_5/a_210_n610# vssa1 588.54fF **FLOATING +C3127 ro_complete_buffered_0/tapered_buf_5/a_160_230# vssa1 0.15fF **FLOATING +C3128 ro_complete_buffered_0/tapered_buf_5/a_n10_230# vssa1 0.13fF **FLOATING +C3129 ro_complete_buffered_0/tapered_buf_5/a_4670_0# vssa1 250.63fF **FLOATING +C3130 ro_complete_buffered_0/tapered_buf_5/a_1650_0# vssa1 63.04fF **FLOATING +C3131 ro_complete_buffered_0/tapered_buf_5/a_580_0# vssa1 16.64fF **FLOATING +C3132 ro_complete_buffered_0/tapered_buf_5/a_160_n140# vssa1 4.00fF **FLOATING +C3133 ro_complete_buffered_0/tapered_buf_4/in vssa1 1.13fF +C3134 ro_complete_buffered_0/tapered_buf_4/a_n10_n140# vssa1 0.06fF **FLOATING +C3135 ro_complete_buffered_0/tapered_buf_4/a_210_n610# vssa1 588.54fF **FLOATING +C3136 ro_complete_buffered_0/tapered_buf_4/a_160_230# vssa1 0.15fF **FLOATING +C3137 ro_complete_buffered_0/tapered_buf_4/a_n10_230# vssa1 0.13fF **FLOATING +C3138 ro_complete_buffered_0/tapered_buf_4/a_4670_0# vssa1 250.63fF **FLOATING +C3139 ro_complete_buffered_0/tapered_buf_4/a_1650_0# vssa1 63.04fF **FLOATING +C3140 ro_complete_buffered_0/tapered_buf_4/a_580_0# vssa1 16.64fF **FLOATING +C3141 ro_complete_buffered_0/tapered_buf_4/a_160_n140# vssa1 4.00fF **FLOATING +C3142 ro_complete_buffered_0/tapered_buf_3/in vssa1 1.13fF +C3143 ro_complete_buffered_0/tapered_buf_3/a_n10_n140# vssa1 0.06fF **FLOATING +C3144 ro_complete_buffered_0/tapered_buf_3/a_210_n610# vssa1 588.54fF **FLOATING +C3145 ro_complete_buffered_0/tapered_buf_3/a_160_230# vssa1 0.15fF **FLOATING +C3146 ro_complete_buffered_0/tapered_buf_3/a_n10_230# vssa1 0.13fF **FLOATING +C3147 ro_complete_buffered_0/tapered_buf_3/a_4670_0# vssa1 250.63fF **FLOATING +C3148 ro_complete_buffered_0/tapered_buf_3/a_1650_0# vssa1 63.04fF **FLOATING +C3149 ro_complete_buffered_0/tapered_buf_3/a_580_0# vssa1 16.64fF **FLOATING +C3150 ro_complete_buffered_0/tapered_buf_3/a_160_n140# vssa1 4.00fF **FLOATING +C3151 ro_complete_buffered_0/tapered_buf_2/in vssa1 1.13fF +C3152 ro_complete_buffered_0/tapered_buf_2/a_n10_n140# vssa1 0.06fF **FLOATING +C3153 ro_complete_buffered_0/tapered_buf_2/a_210_n610# vssa1 588.54fF **FLOATING +C3154 ro_complete_buffered_0/tapered_buf_2/a_160_230# vssa1 0.15fF **FLOATING +C3155 ro_complete_buffered_0/tapered_buf_2/a_n10_230# vssa1 0.13fF **FLOATING +C3156 ro_complete_buffered_0/tapered_buf_2/a_4670_0# vssa1 250.63fF **FLOATING +C3157 ro_complete_buffered_0/tapered_buf_2/a_1650_0# vssa1 63.04fF **FLOATING +C3158 ro_complete_buffered_0/tapered_buf_2/a_580_0# vssa1 16.64fF **FLOATING +C3159 ro_complete_buffered_0/tapered_buf_2/a_160_n140# vssa1 4.00fF **FLOATING +C3160 ro_complete_0/cbank_2/v vssa1 16.43fF +C3161 ro_complete_0/cbank_2/switch_5/vin vssa1 0.78fF +C3162 ro_complete_0/cbank_2/switch_4/vin vssa1 1.50fF +C3163 ro_complete_0/cbank_2/switch_2/vin vssa1 1.30fF +C3164 ro_complete_0/cbank_2/switch_3/vin vssa1 0.56fF +C3165 ro_complete_0/cbank_2/switch_1/vin vssa1 1.14fF +C3166 ro_complete_0/cbank_2/switch_0/vin vssa1 1.02fF +C3167 ro_complete_0/cbank_1/v vssa1 16.43fF +C3168 ro_complete_0/cbank_1/switch_5/vin vssa1 0.78fF +C3169 ro_complete_0/a0 vssa1 5.35fF +C3170 ro_complete_0/cbank_1/switch_4/vin vssa1 1.50fF +C3171 ro_complete_0/a1 vssa1 6.54fF +C3172 ro_complete_0/cbank_1/switch_2/vin vssa1 1.30fF +C3173 ro_complete_0/a3 vssa1 5.96fF +C3174 ro_complete_0/cbank_1/switch_3/vin vssa1 0.56fF +C3175 ro_complete_0/a2 vssa1 5.21fF +C3176 ro_complete_0/cbank_1/switch_1/vin vssa1 1.14fF +C3177 ro_complete_0/a4 vssa1 5.81fF +C3178 ro_complete_0/cbank_1/switch_0/vin vssa1 1.02fF +C3179 ro_complete_0/a5 vssa1 6.74fF +C3180 ro_complete_0/cbank_0/v vssa1 15.12fF +C3181 ro_complete_0/cbank_0/switch_5/vin vssa1 0.78fF +C3182 ro_complete_0/cbank_0/switch_4/vin vssa1 1.50fF +C3183 ro_complete_0/cbank_0/switch_2/vin vssa1 1.30fF +C3184 ro_complete_0/cbank_0/switch_3/vin vssa1 0.56fF +C3185 ro_complete_0/cbank_0/switch_1/vin vssa1 1.14fF +C3186 ro_complete_0/cbank_0/switch_0/vin vssa1 1.02fF +C3187 filter_0/v vssa1 110.47fF +C3188 filter_0/a_4216_n5230# vssa1 418.47fF **FLOATING +C3189 filter_0/a_4216_n2998# vssa1 1.03fF **FLOATING +C3190 cp_buffered_0/tapered_buf_0/in vssa1 1.13fF +C3191 cp_buffered_0/tapered_buf_0/a_n10_n140# vssa1 0.06fF **FLOATING +C3192 cp_buffered_0/tapered_buf_0/a_210_n610# vssa1 588.54fF **FLOATING +C3193 cp_buffered_0/tapered_buf_0/a_160_230# vssa1 0.15fF **FLOATING +C3194 cp_buffered_0/tapered_buf_0/a_n10_230# vssa1 0.13fF **FLOATING +C3195 cp_buffered_0/tapered_buf_0/a_4670_0# vssa1 250.63fF **FLOATING +C3196 cp_buffered_0/tapered_buf_0/a_1650_0# vssa1 63.04fF **FLOATING +C3197 cp_buffered_0/tapered_buf_0/a_580_0# vssa1 16.64fF **FLOATING +C3198 cp_buffered_0/tapered_buf_0/a_160_n140# vssa1 4.00fF **FLOATING +C3199 cp_buffered_0/cp_0/out vssa1 396.39fF +C3200 cp_buffered_0/tapered_buf_1/in vssa1 1.13fF +C3201 cp_buffered_0/tapered_buf_1/a_n10_n140# vssa1 0.06fF **FLOATING +C3202 cp_buffered_0/tapered_buf_1/a_210_n610# vssa1 588.54fF **FLOATING +C3203 cp_buffered_0/tapered_buf_1/a_160_230# vssa1 0.15fF **FLOATING +C3204 cp_buffered_0/tapered_buf_1/a_n10_230# vssa1 0.13fF **FLOATING +C3205 cp_buffered_0/tapered_buf_1/a_4670_0# vssa1 250.63fF **FLOATING +C3206 cp_buffered_0/tapered_buf_1/a_1650_0# vssa1 63.04fF **FLOATING +C3207 cp_buffered_0/tapered_buf_1/a_580_0# vssa1 16.64fF **FLOATING +C3208 cp_buffered_0/tapered_buf_1/a_160_n140# vssa1 4.00fF **FLOATING +C3209 cp_buffered_0/cp_0/upbar vssa1 392.61fF +C3210 cp_buffered_0/cp_0/a_7110_n2840# vssa1 0.17fF **FLOATING +C3211 cp_buffered_0/cp_0/a_3060_n2840# vssa1 1.71fF **FLOATING +C3212 cp_buffered_0/cp_0/a_7110_0# vssa1 0.17fF **FLOATING +C3213 cp_buffered_0/cp_0/a_6370_0# vssa1 0.40fF **FLOATING +C3214 cp_buffered_0/cp_0/a_3060_0# vssa1 1.65fF **FLOATING +C3215 cp_buffered_0/cp_0/a_1710_0# vssa1 5.76fF **FLOATING +C3216 cp_buffered_0/cp_0/a_1710_n2840# vssa1 4.89fF **FLOATING +C3217 cp_buffered_0/cp_0/a_10_n50# vssa1 3.19fF **FLOATING +C3218 cp_buffered_0/cp_0/down vssa1 396.37fF +C3219 cp_buffered_0/tapered_buf_2/in vssa1 1.13fF +C3220 cp_buffered_0/tapered_buf_2/a_n10_n140# vssa1 0.06fF **FLOATING +C3221 cp_buffered_0/tapered_buf_2/a_210_n610# vssa1 588.54fF **FLOATING +C3222 cp_buffered_0/tapered_buf_2/a_160_230# vssa1 0.15fF **FLOATING +C3223 cp_buffered_0/tapered_buf_2/a_n10_230# vssa1 0.13fF **FLOATING +C3224 cp_buffered_0/tapered_buf_2/a_4670_0# vssa1 250.63fF **FLOATING +C3225 cp_buffered_0/tapered_buf_2/a_1650_0# vssa1 63.04fF **FLOATING +C3226 cp_buffered_0/tapered_buf_2/a_580_0# vssa1 16.64fF **FLOATING +C3227 cp_buffered_0/tapered_buf_2/a_160_n140# vssa1 4.00fF **FLOATING +C3228 pd_buffered_0/tapered_buf_0/out vssa1 385.14fF +C3229 pd_buffered_0/tapered_buf_0/a_n10_n140# vssa1 0.06fF **FLOATING +C3230 pd_buffered_0/tapered_buf_0/a_210_n610# vssa1 588.54fF **FLOATING +C3231 pd_buffered_0/tapered_buf_0/a_160_230# vssa1 0.15fF **FLOATING +C3232 pd_buffered_0/tapered_buf_0/a_n10_230# vssa1 0.13fF **FLOATING +C3233 pd_buffered_0/tapered_buf_0/a_4670_0# vssa1 250.63fF **FLOATING +C3234 pd_buffered_0/tapered_buf_0/a_1650_0# vssa1 63.04fF **FLOATING +C3235 pd_buffered_0/tapered_buf_0/a_580_0# vssa1 16.64fF **FLOATING +C3236 pd_buffered_0/tapered_buf_0/a_160_n140# vssa1 4.00fF **FLOATING +C3237 pd_buffered_0/tapered_buf_1/out vssa1 385.17fF +C3238 pd_buffered_0/tapered_buf_1/a_n10_n140# vssa1 0.06fF **FLOATING +C3239 pd_buffered_0/tapered_buf_1/a_210_n610# vssa1 588.54fF **FLOATING +C3240 pd_buffered_0/tapered_buf_1/a_160_230# vssa1 0.15fF **FLOATING +C3241 pd_buffered_0/tapered_buf_1/a_n10_230# vssa1 0.13fF **FLOATING +C3242 pd_buffered_0/tapered_buf_1/a_4670_0# vssa1 250.63fF **FLOATING +C3243 pd_buffered_0/tapered_buf_1/a_1650_0# vssa1 63.04fF **FLOATING +C3244 pd_buffered_0/tapered_buf_1/a_580_0# vssa1 16.64fF **FLOATING +C3245 pd_buffered_0/tapered_buf_1/a_160_n140# vssa1 4.00fF **FLOATING +C3246 pd_buffered_0/pd_0/UP vssa1 5.46fF +C3247 pd_buffered_0/pd_0/and_pd_0/Z1 vssa1 0.39fF +C3248 pd_buffered_0/pd_0/and_pd_0/Out1 vssa1 2.22fF +C3249 pd_buffered_0/pd_0/tspc_r_1/z5 vssa1 1.10fF +C3250 pd_buffered_0/pd_0/tspc_r_1/Z4 vssa1 1.07fF +C3251 pd_buffered_0/pd_0/R vssa1 3.05fF +C3252 pd_buffered_0/pd_0/tspc_r_1/Qbar vssa1 0.79fF +C3253 pd_buffered_0/pd_0/tspc_r_1/Z2 vssa1 1.22fF +C3254 pd_buffered_0/pd_0/tspc_r_1/Z1 vssa1 0.67fF +C3255 pd_buffered_0/pd_0/DOWN vssa1 9.89fF +C3256 pd_buffered_0/pd_0/tspc_r_1/Qbar1 vssa1 1.34fF +C3257 pd_buffered_0/pd_0/tspc_r_1/Z3 vssa1 2.12fF +C3258 pd_buffered_0/pd_0/DIV vssa1 389.98fF +C3259 pd_buffered_0/pd_0/tspc_r_0/z5 vssa1 1.10fF +C3260 pd_buffered_0/pd_0/tspc_r_0/Z4 vssa1 1.07fF +C3261 pd_buffered_0/pd_0/tspc_r_0/Qbar vssa1 0.88fF +C3262 pd_buffered_0/pd_0/tspc_r_0/Z2 vssa1 1.22fF +C3263 pd_buffered_0/pd_0/tspc_r_0/Z1 vssa1 0.67fF +C3264 pd_buffered_0/pd_0/tspc_r_0/Qbar1 vssa1 1.34fF +C3265 pd_buffered_0/pd_0/tspc_r_0/Z3 vssa1 2.12fF +C3266 pd_buffered_0/pd_0/REF vssa1 388.35fF +C3267 pd_buffered_0/tapered_buf_3/in vssa1 1.13fF +C3268 pd_buffered_0/tapered_buf_3/a_n10_n140# vssa1 0.06fF **FLOATING +C3269 pd_buffered_0/tapered_buf_3/a_210_n610# vssa1 588.54fF **FLOATING +C3270 pd_buffered_0/tapered_buf_3/a_160_230# vssa1 0.15fF **FLOATING +C3271 pd_buffered_0/tapered_buf_3/a_n10_230# vssa1 0.13fF **FLOATING +C3272 pd_buffered_0/tapered_buf_3/a_4670_0# vssa1 250.63fF **FLOATING +C3273 pd_buffered_0/tapered_buf_3/a_1650_0# vssa1 63.04fF **FLOATING +C3274 pd_buffered_0/tapered_buf_3/a_580_0# vssa1 16.64fF **FLOATING +C3275 pd_buffered_0/tapered_buf_3/a_160_n140# vssa1 4.00fF **FLOATING +C3276 pd_buffered_0/tapered_buf_2/in vssa1 1.13fF +C3277 pd_buffered_0/tapered_buf_2/a_n10_n140# vssa1 0.06fF **FLOATING +C3278 pd_buffered_0/tapered_buf_2/a_210_n610# vssa1 588.54fF **FLOATING +C3279 pd_buffered_0/tapered_buf_2/a_160_230# vssa1 0.15fF **FLOATING +C3280 pd_buffered_0/tapered_buf_2/a_n10_230# vssa1 0.13fF **FLOATING +C3281 pd_buffered_0/tapered_buf_2/a_4670_0# vssa1 250.63fF **FLOATING +C3282 pd_buffered_0/tapered_buf_2/a_1650_0# vssa1 63.04fF **FLOATING +C3283 pd_buffered_0/tapered_buf_2/a_580_0# vssa1 16.64fF **FLOATING +C3284 pd_buffered_0/tapered_buf_2/a_160_n140# vssa1 4.00fF **FLOATING .ends