blob: d2f5af28871504d7cfe554250c6c137c6d4e292c [file] [log] [blame]
Project Chip ID is: 371270
Setting Project Chip ID to: 0005aa46
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!