blob: cb613dfdcd4bb2b730e6d716fc453739d8edeaf3 [file] [log] [blame]
{
"foundry": "SW",
"foundry-name": "SkyWater",
"node": "sky130B",
"feature-size": "130nm",
"status": "active",
"commit": "7519dfb04400f224f140749cda44ee7de6f5e095",
"description": "Skywater 0.13um CMOS, local interconntect + high-resistance poly + 5 metal layer backend stack + MiM caps + redistribution layer + ReRAM",
"options": [
"METAL5",
"MIM",
"RERAM",
"REDISTRIBUTION"
],
"stdcells": {
"sky130_fd_sc_hd": "@:libraries/sky130_fd_sc_hd/latest",
"sky130_fd_sc_hdll": "unknown",
"sky130_fd_sc_hs": "unknown",
"sky130_fd_sc_hvl": "@:libraries/sky130_fd_sc_hvl/latest",
"sky130_fd_sc_lp": "unknown",
"sky130_fd_sc_ls": "unknown",
"sky130_fd_sc_ms": "unknown",
"sky130_osu_sc_t12": "unknown",
"sky130_osu_sc_t15": "unknown",
"sky130_osu_sc_t18": "unknown"
},
"iocells": {
"sky130_fd_io": "@:libraries/sky130_fd_io/latest"
},
"primitive": {
"sky130_fd_pr": "@:libraries/sky130_fd_pr/latest"
},
"memory": {
"sky130_sram_macros": "c2333394e0b0b9d9d71185678a8d8087715d5e3b"
},
"other": {
"sky130_ml_xx_hd": "6eb3b0718552b034f1bf1870285ff135e3fb2dcb"
},
"build": {
"magic": "8.3.269",
"open_pdks": "1.0.283"
}
}
],
"stdcells": {
"sky130_fd_sc_hd": "@:libraries/sky130_fd_sc_hd/latest",
"sky130_fd_sc_hdll": "unknown",
"sky130_fd_sc_hs": "unknown",
"sky130_fd_sc_hvl": "@:libraries/sky130_fd_sc_hvl/latest",
"sky130_fd_sc_lp": "unknown",
"sky130_fd_sc_ls": "unknown",
"sky130_fd_sc_ms": "unknown",
"sky130_osu_sc_t12": "unknown",
"sky130_osu_sc_t15": "unknown",
"sky130_osu_sc_t18": "unknown"
},
"iocells": {
"sky130_fd_io": "@:libraries/sky130_fd_io/latest"
},
"primitive": {
"sky130_fd_pr": "@:libraries/sky130_fd_pr/latest"
},
"memory": {
"sky130_sram_macros": "c2333394e0b0b9d9d71185678a8d8087715d5e3b"
},
"other": {
"sky130_ml_xx_hd": "6eb3b0718552b034f1bf1870285ff135e3fb2dcb"
},
"build": {
"magic": "8.3.269",
"open_pdks": "1.0.283"
}
}