blob: 948b8159444f9c04f77f4d120b495e3eafa0c6d6 [file] [log] [blame]
Project Chip ID is: 389571
Setting Project Chip ID to: 0005f1c3
Step 1: Modify Layout of the user_id_programming subcell
Done!
Step 2: Add user project ID parameter to source verilog.
Done!
Step 3: Add user project ID parameter to gate-level verilog.
Done!
Step 4: Add user project ID text to top level layout.
Done!