This ASIC was designed by members of the Zero to ASIC course.
This submission was configured and built by the multi project tools at commit e936b9cae8ef3f98a938902fd391758a5c1a6736.
# clone all repos, and include support for shared OpenRAM ./multi_tool.py --clone-repos --clone-shared-repos --create-openlane-config --copy-gds --copy-project --openram # run all the tests ./multi_tool.py --test-all --force-delete # build user project wrapper submission cd $CARAVEL_ROOT; make user_project_wrapper # create docs ./multi_tool.py --generate-doc --annotate-image