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6bb2165
Added layout for the user_analog_project_wrapper example.
by Tim Edwards
· 3 years, 7 months ago
5ea70cb
Changed the schematics so that the resistor does not set a W
by Tim Edwards
· 3 years, 7 months ago
796099e
Corrected the schematic for the proper orientation of the topmost
by Tim Edwards
· 3 years, 7 months ago
dfc24ad
Added xschem schematic of the POR and testbench simulations and results.
by Tim Edwards
· 3 years, 7 months ago
fb13001
Simple layout, unwired (needs modifications to the project wrapper)
by Tim Edwards
· 3 years, 7 months ago
a44a60b
Preliminary work on the analog user project example. Added verilog RTL and
by Tim Edwards
· 3 years, 7 months ago
6af7408
Initial commit
by manarabdelaty
· 3 years, 7 months ago