verilog/rtl/syntacore/scr1/src/wb_top.files

top/scr1_dmem_router.sv
top/scr1_imem_router.sv
top/scr1_dp_memory.sv
top/scr1_tcm.sv
top/scr1_timer.sv
top/scr1_dmem_wb.sv
top/scr1_imem_wb.sv
top/scr1_top_wb.sv
../../lib/sync_fifo.sv