| * SPICE3 file created from user_analog_project_wrapper.ext - technology: sky130A |
| |
| .subckt user_analog_project_wrapper gpio_analog[0] gpio_analog[10] gpio_analog[11] |
| + gpio_analog[12] gpio_analog[13] gpio_analog[14] gpio_analog[15] gpio_analog[16] |
| + gpio_analog[17] gpio_analog[1] gpio_analog[2] gpio_analog[3] gpio_analog[4] gpio_analog[5] |
| + gpio_analog[6] gpio_analog[7] gpio_analog[8] gpio_analog[9] gpio_noesd[0] gpio_noesd[10] |
| + gpio_noesd[11] gpio_noesd[12] gpio_noesd[13] gpio_noesd[14] gpio_noesd[15] gpio_noesd[16] |
| + gpio_noesd[17] gpio_noesd[1] gpio_noesd[2] gpio_noesd[3] gpio_noesd[4] gpio_noesd[5] |
| + gpio_noesd[6] gpio_noesd[7] gpio_noesd[8] gpio_noesd[9] io_analog[0] io_analog[10] |
| + io_analog[1] io_analog[2] io_analog[3] io_analog[4] io_analog[5] io_analog[6] io_analog[7] |
| + io_analog[8] io_analog[9] io_clamp_high[0] io_clamp_high[1] io_clamp_high[2] io_clamp_low[0] |
| + io_clamp_low[1] io_clamp_low[2] io_in[0] io_in[10] io_in[11] io_in[12] io_in[13] |
| + io_in[14] io_in[15] io_in[16] io_in[17] io_in[18] io_in[19] io_in[1] io_in[20] io_in[21] |
| + io_in[22] io_in[23] io_in[24] io_in[25] io_in[26] io_in[2] io_in[3] io_in[4] io_in[5] |
| + io_in[6] io_in[7] io_in[8] io_in[9] io_in_3v3[0] io_in_3v3[10] io_in_3v3[11] io_in_3v3[12] |
| + io_in_3v3[13] io_in_3v3[14] io_in_3v3[15] io_in_3v3[16] io_in_3v3[17] io_in_3v3[18] |
| + io_in_3v3[19] io_in_3v3[1] io_in_3v3[20] io_in_3v3[21] io_in_3v3[22] io_in_3v3[23] |
| + io_in_3v3[24] io_in_3v3[25] io_in_3v3[26] io_in_3v3[2] io_in_3v3[3] io_in_3v3[4] |
| + io_in_3v3[5] io_in_3v3[6] io_in_3v3[7] io_in_3v3[8] io_in_3v3[9] io_oeb[0] io_oeb[10] |
| + io_oeb[11] io_oeb[12] io_oeb[13] io_oeb[14] io_oeb[15] io_oeb[16] io_oeb[17] io_oeb[18] |
| + io_oeb[19] io_oeb[1] io_oeb[20] io_oeb[21] io_oeb[22] io_oeb[23] io_oeb[24] io_oeb[25] |
| + io_oeb[26] io_oeb[2] io_oeb[3] io_oeb[4] io_oeb[5] io_oeb[6] io_oeb[7] io_oeb[8] |
| + io_oeb[9] io_out[0] io_out[10] io_out[11] io_out[12] io_out[13] io_out[14] io_out[15] |
| + io_out[16] io_out[17] io_out[18] io_out[19] io_out[1] io_out[20] io_out[21] io_out[22] |
| + io_out[23] io_out[24] io_out[25] io_out[26] io_out[2] io_out[3] io_out[4] io_out[5] |
| + io_out[6] io_out[7] io_out[8] io_out[9] la_data_in[0] la_data_in[100] la_data_in[101] |
| + la_data_in[102] la_data_in[103] la_data_in[104] la_data_in[105] la_data_in[106] |
| + la_data_in[107] la_data_in[108] la_data_in[109] la_data_in[10] la_data_in[110] la_data_in[111] |
| + la_data_in[112] la_data_in[113] la_data_in[114] la_data_in[115] la_data_in[116] |
| + la_data_in[117] la_data_in[118] la_data_in[119] la_data_in[11] la_data_in[120] la_data_in[121] |
| + la_data_in[122] la_data_in[123] la_data_in[124] la_data_in[125] la_data_in[126] |
| + la_data_in[127] la_data_in[12] la_data_in[13] la_data_in[14] la_data_in[15] la_data_in[16] |
| + la_data_in[17] la_data_in[18] la_data_in[19] la_data_in[1] la_data_in[20] la_data_in[21] |
| + la_data_in[22] la_data_in[23] la_data_in[24] la_data_in[25] la_data_in[26] la_data_in[27] |
| + la_data_in[28] la_data_in[29] la_data_in[2] la_data_in[30] la_data_in[31] la_data_in[32] |
| + la_data_in[33] la_data_in[34] la_data_in[35] la_data_in[36] la_data_in[37] la_data_in[38] |
| + la_data_in[39] la_data_in[3] la_data_in[40] la_data_in[41] la_data_in[42] la_data_in[43] |
| + la_data_in[44] la_data_in[45] la_data_in[46] la_data_in[47] la_data_in[48] la_data_in[49] |
| + la_data_in[4] la_data_in[50] la_data_in[51] la_data_in[52] la_data_in[53] la_data_in[54] |
| + la_data_in[55] la_data_in[56] la_data_in[57] la_data_in[58] la_data_in[59] la_data_in[5] |
| + la_data_in[60] la_data_in[61] la_data_in[62] la_data_in[63] la_data_in[64] la_data_in[65] |
| + la_data_in[66] la_data_in[67] la_data_in[68] la_data_in[69] la_data_in[6] la_data_in[70] |
| + la_data_in[71] la_data_in[72] la_data_in[73] la_data_in[74] la_data_in[75] la_data_in[76] |
| + la_data_in[77] la_data_in[78] la_data_in[79] la_data_in[7] la_data_in[80] la_data_in[81] |
| + la_data_in[82] la_data_in[83] la_data_in[84] la_data_in[85] la_data_in[86] la_data_in[87] |
| + la_data_in[88] la_data_in[89] la_data_in[8] la_data_in[90] la_data_in[91] la_data_in[92] |
| + la_data_in[93] la_data_in[94] la_data_in[95] la_data_in[96] la_data_in[97] la_data_in[98] |
| + la_data_in[99] la_data_in[9] la_data_out[0] la_data_out[100] la_data_out[101] la_data_out[102] |
| + la_data_out[103] la_data_out[104] la_data_out[105] la_data_out[106] la_data_out[107] |
| + la_data_out[108] la_data_out[109] la_data_out[10] la_data_out[110] la_data_out[111] |
| + la_data_out[112] la_data_out[113] la_data_out[114] la_data_out[115] la_data_out[116] |
| + la_data_out[117] la_data_out[118] la_data_out[119] la_data_out[11] la_data_out[120] |
| + la_data_out[121] la_data_out[122] la_data_out[123] la_data_out[124] la_data_out[125] |
| + la_data_out[126] la_data_out[127] la_data_out[12] la_data_out[13] la_data_out[14] |
| + la_data_out[15] la_data_out[16] la_data_out[17] la_data_out[18] la_data_out[19] |
| + la_data_out[1] la_data_out[20] la_data_out[21] la_data_out[22] la_data_out[23] la_data_out[24] |
| + la_data_out[25] la_data_out[26] la_data_out[27] la_data_out[28] la_data_out[29] |
| + la_data_out[2] la_data_out[30] la_data_out[31] la_data_out[32] la_data_out[33] la_data_out[34] |
| + la_data_out[35] la_data_out[36] la_data_out[37] la_data_out[38] la_data_out[39] |
| + la_data_out[3] la_data_out[40] la_data_out[41] la_data_out[42] la_data_out[43] la_data_out[44] |
| + la_data_out[45] la_data_out[46] la_data_out[47] la_data_out[48] la_data_out[49] |
| + la_data_out[4] la_data_out[50] la_data_out[51] la_data_out[52] la_data_out[53] la_data_out[54] |
| + la_data_out[55] la_data_out[56] la_data_out[57] la_data_out[58] la_data_out[59] |
| + la_data_out[5] la_data_out[60] la_data_out[61] la_data_out[62] la_data_out[63] la_data_out[64] |
| + la_data_out[65] la_data_out[66] la_data_out[67] la_data_out[68] la_data_out[69] |
| + la_data_out[6] la_data_out[70] la_data_out[71] la_data_out[72] la_data_out[73] la_data_out[74] |
| + la_data_out[75] la_data_out[76] la_data_out[77] la_data_out[78] la_data_out[79] |
| + la_data_out[7] la_data_out[80] la_data_out[81] la_data_out[82] la_data_out[83] la_data_out[84] |
| + la_data_out[85] la_data_out[86] la_data_out[87] la_data_out[88] la_data_out[89] |
| + la_data_out[8] la_data_out[90] la_data_out[91] la_data_out[92] la_data_out[93] la_data_out[94] |
| + la_data_out[95] la_data_out[96] la_data_out[97] la_data_out[98] la_data_out[99] |
| + la_data_out[9] la_oenb[0] la_oenb[100] la_oenb[101] la_oenb[102] la_oenb[103] la_oenb[104] |
| + la_oenb[105] la_oenb[106] la_oenb[107] la_oenb[108] la_oenb[109] la_oenb[10] la_oenb[110] |
| + la_oenb[111] la_oenb[112] la_oenb[113] la_oenb[114] la_oenb[115] la_oenb[116] la_oenb[117] |
| + la_oenb[118] la_oenb[119] la_oenb[11] la_oenb[120] la_oenb[121] la_oenb[122] la_oenb[123] |
| + la_oenb[124] la_oenb[125] la_oenb[126] la_oenb[127] la_oenb[12] la_oenb[13] la_oenb[14] |
| + la_oenb[15] la_oenb[16] la_oenb[17] la_oenb[18] la_oenb[19] la_oenb[1] la_oenb[20] |
| + la_oenb[21] la_oenb[22] la_oenb[23] la_oenb[24] la_oenb[25] la_oenb[26] la_oenb[27] |
| + la_oenb[28] la_oenb[29] la_oenb[2] la_oenb[30] la_oenb[31] la_oenb[32] la_oenb[33] |
| + la_oenb[34] la_oenb[35] la_oenb[36] la_oenb[37] la_oenb[38] la_oenb[39] la_oenb[3] |
| + la_oenb[40] la_oenb[41] la_oenb[42] la_oenb[43] la_oenb[44] la_oenb[45] la_oenb[46] |
| + la_oenb[47] la_oenb[48] la_oenb[49] la_oenb[4] la_oenb[50] la_oenb[51] la_oenb[52] |
| + la_oenb[53] la_oenb[54] la_oenb[55] la_oenb[56] la_oenb[57] la_oenb[58] la_oenb[59] |
| + la_oenb[5] la_oenb[60] la_oenb[61] la_oenb[62] la_oenb[63] la_oenb[64] la_oenb[65] |
| + la_oenb[66] la_oenb[67] la_oenb[68] la_oenb[69] la_oenb[6] la_oenb[70] la_oenb[71] |
| + la_oenb[72] la_oenb[73] la_oenb[74] la_oenb[75] la_oenb[76] la_oenb[77] la_oenb[78] |
| + la_oenb[79] la_oenb[7] la_oenb[80] la_oenb[81] la_oenb[82] la_oenb[83] la_oenb[84] |
| + la_oenb[85] la_oenb[86] la_oenb[87] la_oenb[88] la_oenb[89] la_oenb[8] la_oenb[90] |
| + la_oenb[91] la_oenb[92] la_oenb[93] la_oenb[94] la_oenb[95] la_oenb[96] la_oenb[97] |
| + la_oenb[98] la_oenb[99] la_oenb[9] user_clock2 user_irq[0] user_irq[1] user_irq[2] |
| + vccd1 vccd2 vdda1 vdda2 vssa2 vssd1 vssd2 wb_clk_i wb_rst_i wbs_ack_o wbs_adr_i[0] |
| + wbs_adr_i[10] wbs_adr_i[11] wbs_adr_i[12] wbs_adr_i[13] wbs_adr_i[14] wbs_adr_i[15] |
| + wbs_adr_i[16] wbs_adr_i[17] wbs_adr_i[18] wbs_adr_i[19] wbs_adr_i[1] wbs_adr_i[20] |
| + wbs_adr_i[21] wbs_adr_i[22] wbs_adr_i[23] wbs_adr_i[24] wbs_adr_i[25] wbs_adr_i[26] |
| + wbs_adr_i[27] wbs_adr_i[28] wbs_adr_i[29] wbs_adr_i[2] wbs_adr_i[30] wbs_adr_i[31] |
| + wbs_adr_i[3] wbs_adr_i[4] wbs_adr_i[5] wbs_adr_i[6] wbs_adr_i[7] wbs_adr_i[8] wbs_adr_i[9] |
| + wbs_cyc_i wbs_dat_i[0] wbs_dat_i[10] wbs_dat_i[11] wbs_dat_i[12] wbs_dat_i[13] wbs_dat_i[14] |
| + wbs_dat_i[15] wbs_dat_i[16] wbs_dat_i[17] wbs_dat_i[18] wbs_dat_i[19] wbs_dat_i[1] |
| + wbs_dat_i[20] wbs_dat_i[21] wbs_dat_i[22] wbs_dat_i[23] wbs_dat_i[24] wbs_dat_i[25] |
| + wbs_dat_i[26] wbs_dat_i[27] wbs_dat_i[28] wbs_dat_i[29] wbs_dat_i[2] wbs_dat_i[30] |
| + wbs_dat_i[31] wbs_dat_i[3] wbs_dat_i[4] wbs_dat_i[5] wbs_dat_i[6] wbs_dat_i[7] wbs_dat_i[8] |
| + wbs_dat_i[9] wbs_dat_o[0] wbs_dat_o[10] wbs_dat_o[11] wbs_dat_o[12] wbs_dat_o[13] |
| + wbs_dat_o[14] wbs_dat_o[15] wbs_dat_o[16] wbs_dat_o[17] wbs_dat_o[18] wbs_dat_o[19] |
| + wbs_dat_o[1] wbs_dat_o[20] wbs_dat_o[21] wbs_dat_o[22] wbs_dat_o[23] wbs_dat_o[24] |
| + wbs_dat_o[25] wbs_dat_o[26] wbs_dat_o[27] wbs_dat_o[28] wbs_dat_o[29] wbs_dat_o[2] |
| + wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6] |
| + wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3] |
| + wbs_stb_i wbs_we_i |
| C0 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.11fF |
| C1 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/Out 0.08fF |
| C2 gnd pd_div_0/divider_0/prescaler_0/Out 0.46fF |
| C3 divbuf_5/OUT5 io_analog[5] 43.38fF |
| C4 ro_div_0/ro_complete_0/cbank_1/switch_3/vin ro_div_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF |
| C5 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/v 1.30fF |
| C6 ro_div_0/divider_0/tspc_1/Q ro_div_0/divider_0/tspc_2/Z4 0.15fF |
| C7 ro_div_0/divider_0/tspc_0/Z2 ro_div_0/divider_0/prescaler_0/Out 0.11fF |
| C8 ro_div_0/divider_0/prescaler_0/tspc_2/D gnd 0.05fF |
| C9 ro_div_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_0/divider_0/clk 0.64fF |
| C10 ro_complete_0/a2 gpio_analog[17] 0.69fF |
| C11 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF |
| C12 pd_div_0/pd_0/tspc_r_1/Z3 pd_div_0/pd_0/UP 0.03fF |
| C13 ashish_0/a_150_n710# ashish_0/Gnd 2.30fF |
| C14 io_analog[7] io_analog[6] 13.31fF |
| C15 pd_div_0/divbuf_0/a_492_n240# pd_div_0/bufin 0.13fF |
| C16 pd_div_0/divider_0/prescaler_0/tspc_0/Q pd_div_0/divider_0/prescaler_0/nand_1/z1 0.01fF |
| C17 pd_div_0/divider_0/prescaler_0/tspc_2/Z2 pd_div_0/divider_0/clk 0.11fF |
| C18 pd_div_0/divider_0/prescaler_0/tspc_2/Z3 pd_div_0/divider_0/prescaler_0/Out 0.05fF |
| C19 gpio_analog[14] vssd1 0.25fF |
| C20 ro_div_0/divider_0/nor_1/Z1 ro_div_0/divider_0/and_0/B 0.18fF |
| C21 ro_div_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF |
| C22 ro_div_0/ro_complete_0/cbank_1/switch_2/vin ro_div_0/divider_0/clk 1.30fF |
| C23 ro_div_0/divider_0/tspc_2/Z2 ro_div_0/divider_0/tspc_2/Z4 0.36fF |
| C24 ro_div_0/divider_0/tspc_2/Z3 ro_div_0/divbuf_0/IN 0.05fF |
| C25 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF |
| C26 gnd pd_div_0/divider_0/prescaler_0/tspc_2/Z2 0.16fF |
| C27 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF |
| C28 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/nor_1/A 0.55fF |
| C29 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.04fF |
| C30 cp_0/a_1710_0# cp_0/a_10_n50# 0.04fF |
| C31 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/z5 0.20fF |
| C32 pd_div_0/divider_0/tspc_0/Q pd_div_0/divider_0/tspc_1/Z2 0.14fF |
| C33 pd_div_0/divider_0/prescaler_0/tspc_1/Z2 pd_div_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF |
| C34 pd_div_0/divider_0/tspc_2/Z1 pd_div_0/divider_0/tspc_2/Z4 0.00fF |
| C35 pd_div_0/pd_0/tspc_r_0/Qbar pd_div_0/pd_0/tspc_r_0/Qbar1 0.01fF |
| C36 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/Qbar 0.01fF |
| C37 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF |
| C38 ro_div_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF |
| C39 ro_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# gnd 0.61fF |
| C40 ro_div_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_0/divider_0/prescaler_0/tspc_1/Q 0.21fF |
| C41 ro_complete_0/a2 ro_complete_0/cbank_1/switch_3/vin 0.21fF |
| C42 ro_div_0/divider_0/and_0/B ro_div_0/divider_0/and_0/Z1 0.07fF |
| C43 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z3 0.16fF |
| C44 divbuf_4/OUT3 divbuf_4/OUT5 0.01fF |
| C45 divbuf_4/OUT2 divbuf_4/OUT 0.06fF |
| C46 pd_div_0/divider_0/mc2 pd_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.33fF |
| C47 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Z4 0.65fF |
| C48 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/clk 0.11fF |
| C49 pd_0/tspc_r_0/z5 pd_0/tspc_r_1/z5 0.02fF |
| C50 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z2 0.25fF |
| C51 io_clamp_low[0] io_clamp_high[0] 0.53fF |
| C52 pd_div_0/divider_0/tspc_0/Z2 pd_div_0/divider_0/prescaler_0/Out 0.11fF |
| C53 pd_div_0/divider_0/prescaler_0/tspc_1/Z2 pd_div_0/divider_0/prescaler_0/tspc_1/Q 0.06fF |
| C54 pd_div_0/divider_0/prescaler_0/tspc_2/Z2 pd_div_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF |
| C55 ro_div_0/divbuf_0/OUT3 ro_div_0/divbuf_0/OUT2 1.37fF |
| C56 ro_div_0/divbuf_0/OUT ro_div_0/divbuf_0/a_492_n240# 0.00fF |
| C57 ro_complete_0/a4 ro_complete_0/a3 0.53fF |
| C58 ro_div_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF |
| C59 pll_full_0/pd_0/REF pll_full_0/divbuf_1/a_492_n240# 0.13fF |
| C60 ro_div_0/divider_0/prescaler_0/tspc_1/Z4 ro_div_0/divider_0/clk 0.12fF |
| C61 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF |
| C62 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/nor_1/B 0.06fF |
| C63 pll_full_0/ro_complete_0/a2 pll_full_0/divider_0/clk 0.11fF |
| C64 pd_div_0/divider_0/nor_0/Z1 pd_div_0/divider_0/nor_1/B 0.18fF |
| C65 pd_div_0/divider_0/tspc_0/Z2 pd_div_0/divider_0/tspc_0/Z1 1.07fF |
| C66 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z2 0.14fF |
| C67 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.22fF |
| C68 pll_full_0/divider_0/prescaler_0/tspc_0/Q pll_full_0/divider_0/prescaler_0/tspc_2/D 0.04fF |
| C69 pd_div_0/divider_0/prescaler_0/tspc_1/Z4 pd_div_0/divider_0/prescaler_0/Out 0.28fF |
| C70 pd_div_0/pd_0/tspc_r_0/Z2 pd_div_0/pd_0/tspc_r_0/Z3 0.25fF |
| C71 ro_div_0/ro_complete_0/a5 ro_div_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF |
| C72 ro_div_0/ro_complete_0/cbank_0/switch_4/vin ro_div_0/ro_complete_0/cbank_0/v 1.30fF |
| C73 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/DOWN 0.03fF |
| C74 pd_div_0/pd_0/tspc_r_0/Z2 pd_div_0/pd_0/R 0.21fF |
| C75 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_5/vin 0.20fF |
| C76 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT 43.38fF |
| C77 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/IN 5.26fF |
| C78 pd_0/UP divbuf_1/OUT5 0.00fF |
| C79 gnd ro_div_0/divbuf_0/IN 0.29fF |
| C80 ro_div_0/divider_0/prescaler_0/tspc_1/Q ro_div_0/divider_0/clk 0.60fF |
| C81 pd_div_0/pd_0/UP pd_div_0/pd_0/tspc_r_1/z5 0.03fF |
| C82 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/nor_1/B 0.22fF |
| C83 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF |
| C84 pll_full_0/ro_complete_0/cbank_1/switch_0/vin pll_full_0/divider_0/clk 1.61fF |
| C85 pd_0/DIV pd_0/tspc_r_0/Qbar1 0.12fF |
| C86 pll_full_0/divider_0/nor_0/B pll_full_0/divbuf_0/IN 0.29fF |
| C87 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z3 0.06fF |
| C88 pd_div_0/divider_0/and_0/OUT pd_div_0/divider_0/and_0/B 0.01fF |
| C89 pd_div_0/divider_0/prescaler_0/tspc_1/Q pd_div_0/divider_0/prescaler_0/Out 0.91fF |
| C90 ro_div_0/divider_0/tspc_0/Z1 ro_div_0/divider_0/tspc_0/Z2 1.07fF |
| C91 ro_div_0/divider_0/prescaler_0/m1_2700_2190# ro_div_0/divider_0/prescaler_0/tspc_0/D 0.16fF |
| C92 ro_div_0/divider_0/prescaler_0/tspc_0/Z3 gnd 0.27fF |
| C93 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a4 0.12fF |
| C94 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF |
| C95 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z4 0.36fF |
| C96 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/Out 0.45fF |
| C97 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF |
| C98 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF |
| C99 pd_div_0/divider_0/tspc_0/Q pd_div_0/divider_0/tspc_1/Z4 0.15fF |
| C100 pd_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# pd_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF |
| C101 pd_0/R pd_0/UP 0.46fF |
| C102 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/Z1 0.36fF |
| C103 ro_div_0/ro_complete_0/a2 ro_div_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF |
| C104 ro_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF |
| C105 pd_div_0/div pd_div_0/divbuf_0/a_492_n240# 0.00fF |
| C106 ro_div_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_0/divider_0/prescaler_0/tspc_1/Q 0.13fF |
| C107 ro_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# gnd 0.63fF |
| C108 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF |
| C109 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z1 0.06fF |
| C110 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF |
| C111 pd_div_0/divbuf_0/a_492_n240# pd_div_0/divbuf_0/OUT5 0.01fF |
| C112 pd_div_0/pd_0/DOWN pd_div_0/pd_0/tspc_r_1/Qbar 0.02fF |
| C113 pd_div_0/pd_0/tspc_r_0/Z4 pd_div_0/pd_0/tspc_r_0/z5 0.04fF |
| C114 ro_complete_0/a2 divbuf_5/IN 0.05fF |
| C115 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z4 0.02fF |
| C116 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/Out 0.11fF |
| C117 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/clk 0.11fF |
| C118 pd_div_0/divider_0/prescaler_0/tspc_2/Z2 pd_div_0/divider_0/prescaler_0/tspc_1/Q 0.06fF |
| C119 pd_0/UP pd_0/and_pd_0/Out1 0.33fF |
| C120 ro_div_0/divbuf_0/OUT5 ro_div_0/divbuf_0/a_492_n240# 0.01fF |
| C121 ro_complete_0/cbank_1/switch_4/vin ro_complete_0/cbank_1/switch_3/vin 0.20fF |
| C122 ro_div_0/divider_0/nor_1/Z1 gnd 0.01fF |
| C123 gnd ro_div_0/divider_0/prescaler_0/nand_1/z1 0.16fF |
| C124 ro_div_0/divider_0/prescaler_0/tspc_2/Z4 ro_div_0/divider_0/clk 0.12fF |
| C125 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/a0 0.09fF |
| C126 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF |
| C127 pd_div_0/pd_0/tspc_r_0/z5 pd_div_0/pd_0/tspc_r_1/z5 0.02fF |
| C128 pd_div_0/pd_0/tspc_r_1/Z3 pd_div_0/pd_0/tspc_r_1/Z1 0.09fF |
| C129 pd_div_0/pd_0/REF pd_div_0/pd_0/tspc_r_1/Z2 0.19fF |
| C130 io_analog[6] ashish_0/Gnd 0.33fF |
| C131 pd_div_0/divider_0/prescaler_0/tspc_2/D pd_div_0/divider_0/prescaler_0/nand_1/z1 0.21fF |
| C132 ro_div_0/ro_complete_0/a3 ro_div_0/ro_complete_0/cbank_2/switch_2/vin 0.09fF |
| C133 ro_div_0/divider_0/tspc_0/Z4 ro_div_0/divider_0/nor_1/A 0.21fF |
| C134 ro_div_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_0/divider_0/prescaler_0/tspc_0/D 0.15fF |
| C135 gnd ro_div_0/divider_0/and_0/Z1 0.32fF |
| C136 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z3 0.45fF |
| C137 pll_full_0/ro_complete_0/cbank_1/switch_5/vin pll_full_0/divider_0/clk 1.46fF |
| C138 gnd pd_div_0/divider_0/nor_1/A 1.02fF |
| C139 pd_div_0/pd_0/tspc_r_1/Qbar pd_div_0/pd_0/and_pd_0/Z1 0.02fF |
| C140 divbuf_5/IN io_analog[5] 0.34fF |
| C141 pd_div_0/divider_0/tspc_0/Q pd_div_0/divider_0/tspc_0/a_630_n680# 0.04fF |
| C142 pll_full_0/divider_0/prescaler_0/Out pll_full_0/divider_0/clk 0.51fF |
| C143 pd_div_0/divider_0/tspc_2/Z3 pd_div_0/divider_0/tspc_2/Z4 0.65fF |
| C144 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z4 0.20fF |
| C145 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/z5 0.04fF |
| C146 pll_full_0/pd_0/tspc_r_1/Z1 pll_full_0/pd_0/tspc_r_1/Z2 0.71fF |
| C147 pd_div_0/pd_0/tspc_r_0/Z1 pd_div_0/pd_0/tspc_r_0/Z3 0.09fF |
| C148 ro_div_0/ro_complete_0/cbank_2/switch_1/vin ro_div_0/ro_complete_0/cbank_2/v 1.30fF |
| C149 ro_div_0/divider_0/tspc_0/Z4 gnd 0.44fF |
| C150 ro_div_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF |
| C151 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/OUT2 0.02fF |
| C152 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a3 0.13fF |
| C153 divbuf_4/OUT4 divbuf_4/OUT 1.11fF |
| C154 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/Qbar 0.01fF |
| C155 pd_div_0/divider_0/prescaler_0/tspc_2/Z2 pd_div_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF |
| C156 pd_div_0/divider_0/nor_1/Z1 pd_div_0/divider_0/and_0/A 0.80fF |
| C157 ro_div_0/ro_complete_0/cbank_0/switch_3/vin ro_div_0/ro_complete_0/cbank_0/switch_4/vin 0.20fF |
| C158 ro_div_0/divider_0/nor_0/Z1 ro_div_0/divider_0/nor_1/B 0.18fF |
| C159 ro_div_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF |
| C160 gnd pd_div_0/divider_0/tspc_0/Z3 0.27fF |
| C161 pd_div_0/pd_0/R pd_div_0/pd_0/tspc_r_1/Qbar 0.03fF |
| C162 pd_div_0/pd_0/DOWN pd_div_0/pd_0/and_pd_0/Out1 0.12fF |
| C163 pll_full_0/divider_0/prescaler_0/tspc_0/Q pll_full_0/divider_0/prescaler_0/nand_1/z1 0.01fF |
| C164 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/clk 0.11fF |
| C165 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/Out 0.05fF |
| C166 pd_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# pd_div_0/divider_0/prescaler_0/tspc_0/Z2 0.01fF |
| C167 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z1 0.09fF |
| C168 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z2 0.19fF |
| C169 pd_div_0/pd_0/tspc_r_0/Z2 pd_div_0/pd_0/tspc_r_0/Z4 0.14fF |
| C170 ro_complete_0/cbank_1/switch_4/vin divbuf_5/IN 1.30fF |
| C171 ro_div_0/divider_0/prescaler_0/m1_2700_2190# ro_div_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF |
| C172 ro_div_0/ro_complete_0/cbank_1/switch_1/vin ro_div_0/divider_0/clk 1.30fF |
| C173 gpio_analog[14] ro_complete_0/cbank_2/v 0.08fF |
| C174 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_0/vin 0.19fF |
| C175 ro_div_0/divider_0/and_0/OUT ro_div_0/divider_0/and_0/Z1 0.04fF |
| C176 ro_div_0/divider_0/tspc_2/a_630_n680# ro_div_0/divider_0/nor_0/B 0.35fF |
| C177 ro_div_0/divider_0/prescaler_0/tspc_0/Q ro_div_0/divider_0/clk 0.05fF |
| C178 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF |
| C179 gnd pd_div_0/divider_0/nor_1/B 1.10fF |
| C180 pd_div_0/pd_0/tspc_r_1/Z2 pd_div_0/pd_0/tspc_r_1/Z4 0.14fF |
| C181 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z2 0.14fF |
| C182 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF |
| C183 pd_0/tspc_r_0/Z3 pd_0/DOWN 0.03fF |
| C184 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z4 0.00fF |
| C185 pd_div_0/divider_0/tspc_0/Z2 pd_div_0/divider_0/nor_1/A 0.23fF |
| C186 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar 0.03fF |
| C187 io_analog[5] m4_115800_678290# 1.01fF |
| C188 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF |
| C189 pd_div_0/divbuf_0/OUT2 pd_div_0/divbuf_0/OUT3 1.37fF |
| C190 ro_div_0/divider_0/prescaler_0/m1_2700_2190# ro_div_0/divider_0/prescaler_0/nand_0/z1 0.07fF |
| C191 ro_div_0/divider_0/prescaler_0/tspc_0/Z4 gnd 0.44fF |
| C192 ro_complete_0/cbank_0/switch_2/vin ro_complete_0/a2 0.14fF |
| C193 pd_div_0/divbuf_0/OUT3 pd_div_0/divbuf_0/OUT4 5.16fF |
| C194 pd_div_0/pd_0/and_pd_0/Out1 pd_div_0/pd_0/and_pd_0/Z1 0.18fF |
| C195 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/B 0.18fF |
| C196 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF |
| C197 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF |
| C198 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/clk 0.01fF |
| C199 m4_28900_141410# vssd1 1.12fF |
| C200 pd_div_0/divider_0/nor_0/Z1 pd_div_0/divider_0/and_0/B 0.78fF |
| C201 ro_div_0/divbuf_0/OUT ro_div_0/divbuf_0/OUT2 0.06fF |
| C202 ro_div_0/ro_complete_0/cbank_0/switch_0/vin ro_div_0/ro_complete_0/a4 0.12fF |
| C203 ro_div_0/ro_complete_0/a2 ro_div_0/ro_complete_0/cbank_0/switch_3/vin 0.09fF |
| C204 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Out1 0.05fF |
| C205 pll_full_0/divbuf_0/OUT2 pll_full_0/divbuf_0/a_492_n240# 0.42fF |
| C206 ro_div_0/divider_0/prescaler_0/tspc_2/Z4 ro_div_0/divider_0/prescaler_0/tspc_1/Q 0.21fF |
| C207 ro_div_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_0/divider_0/prescaler_0/tspc_2/D 0.03fF |
| C208 ro_div_0/divider_0/prescaler_0/m1_2700_2190# ro_div_0/divider_0/clk 0.01fF |
| C209 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF |
| C210 pd_div_0/divider_0/tspc_0/Z2 pd_div_0/divider_0/tspc_0/Z3 0.16fF |
| C211 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/prescaler_0/Out 0.28fF |
| C212 pd_div_0/divider_0/nor_1/A pd_div_0/divider_0/prescaler_0/tspc_1/Q 0.03fF |
| C213 pd_div_0/divider_0/prescaler_0/m1_2700_2190# pd_div_0/divider_0/prescaler_0/Out 0.11fF |
| C214 ro_complete_0/a4 ro_complete_0/cbank_2/switch_0/vin 0.12fF |
| C215 ro_div_0/ro_complete_0/cbank_1/switch_1/vin ro_div_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF |
| C216 ro_div_0/divider_0/tspc_0/Z3 ro_div_0/divider_0/tspc_0/Z4 0.65fF |
| C217 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/v 0.05fF |
| C218 pd_div_0/div pd_div_0/bufin 0.26fF |
| C219 pd_div_0/pd_0/R pd_div_0/pd_0/and_pd_0/Out1 0.33fF |
| C220 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/nor_1/A 0.38fF |
| C221 pd_div_0/divbuf_0/OUT5 pd_div_0/bufin 0.00fF |
| C222 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/B 0.01fF |
| C223 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/Out 0.91fF |
| C224 ro_div_0/ro_complete_0/cbank_0/switch_5/vin ro_div_0/ro_complete_0/a0 0.09fF |
| C225 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF |
| C226 ro_div_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_0/divider_0/prescaler_0/tspc_0/D 0.05fF |
| C227 ro_div_0/ro_complete_0/cbank_1/switch_4/vin ro_div_0/divider_0/clk 1.30fF |
| C228 ro_complete_0/a3 ro_complete_0/a2 0.49fF |
| C229 divbuf_4/a_492_n240# divbuf_4/OUT2 0.42fF |
| C230 gnd pd_div_0/divider_0/tspc_1/Z3 0.27fF |
| C231 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z4 0.15fF |
| C232 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF |
| C233 pd_div_0/divider_0/prescaler_0/tspc_1/Z2 pd_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF |
| C234 pll_full_0/cp_0/upbar pll_full_0/cp_0/down 0.02fF |
| C235 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Z1 0.02fF |
| C236 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/tspc_r_1/z5 0.20fF |
| C237 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT2 0.02fF |
| C238 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/a2 0.09fF |
| C239 ro_div_0/divider_0/tspc_1/a_630_n680# ro_div_0/divider_0/nor_0/B 0.00fF |
| C240 ro_div_0/divider_0/prescaler_0/tspc_1/Z2 gnd 0.17fF |
| C241 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.06fF |
| C242 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z4 0.20fF |
| C243 pd_0/tspc_r_1/Z1 pd_0/tspc_r_1/Z2 0.71fF |
| C244 ro_div_0/divbuf_0/OUT5 ro_div_0/divbuf_0/OUT2 0.02fF |
| C245 ro_div_0/ro_complete_0/cbank_0/switch_1/vin ro_div_0/ro_complete_0/a3 0.13fF |
| C246 pd_0/DIV divbuf_2/OUT5 43.38fF |
| C247 pll_full_0/pd_0/and_pd_0/Out1 pll_full_0/pd_0/and_pd_0/Z1 0.18fF |
| C248 pd_div_0/pd_0/tspc_r_0/Qbar1 pd_div_0/pd_0/DOWN 0.11fF |
| C249 ro_div_0/divider_0/tspc_1/Q ro_div_0/divider_0/tspc_2/a_630_n680# 0.01fF |
| C250 ro_div_0/divider_0/nor_1/A ro_div_0/divider_0/prescaler_0/Out 0.15fF |
| C251 ro_div_0/divider_0/prescaler_0/tspc_1/Q ro_div_0/divider_0/prescaler_0/tspc_0/Q 0.19fF |
| C252 ro_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_0/divider_0/clk 0.14fF |
| C253 divbuf_3/OUT5 divbuf_3/OUT3 0.01fF |
| C254 divbuf_1/a_492_n240# divbuf_1/OUT2 0.42fF |
| C255 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/prescaler_0/nand_1/z1 0.21fF |
| C256 pd_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# pd_div_0/divider_0/prescaler_0/Out 0.21fF |
| C257 pll_full_0/pd_0/DIV pll_full_0/pd_0/R 0.51fF |
| C258 ro_div_0/divider_0/prescaler_0/m1_2700_2190# ro_div_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF |
| C259 ro_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF |
| C260 gpio_analog[14] gpio_analog[16] 0.57fF |
| C261 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/a_492_n240# 0.01fF |
| C262 ro_div_0/divider_0/tspc_2/a_630_n680# ro_div_0/divider_0/tspc_2/Z2 0.01fF |
| C263 ro_div_0/divider_0/prescaler_0/tspc_2/D ro_div_0/divider_0/clk 0.29fF |
| C264 gnd ro_div_0/divider_0/prescaler_0/Out 0.46fF |
| C265 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_0/a_630_n680# 0.04fF |
| C266 pll_full_0/ro_complete_0/a0 pll_full_0/divider_0/clk 0.01fF |
| C267 gnd pd_div_0/divider_0/tspc_1/Z2 0.16fF |
| C268 pd_div_0/divider_0/tspc_1/a_630_n680# pd_div_0/divider_0/nor_1/B 0.35fF |
| C269 pd_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# pd_div_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF |
| C270 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z1 0.09fF |
| C271 pd_0/DIV pd_0/tspc_r_0/Z2 0.19fF |
| C272 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divider_0/tspc_2/Z4 0.65fF |
| C273 divbuf_0/OUT5 divbuf_0/OUT3 0.01fF |
| C274 ro_div_0/ro_complete_0/a0 ro_div_0/ro_complete_0/cbank_2/switch_4/vin 0.13fF |
| C275 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Qbar1 0.12fF |
| C276 ro_div_0/divider_0/nor_1/B ro_div_0/divider_0/tspc_1/Z3 0.38fF |
| C277 ro_div_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_0/divider_0/and_0/OUT 0.06fF |
| C278 ro_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF |
| C279 ro_div_0/divider_0/prescaler_0/m1_2700_2190# ro_div_0/divider_0/prescaler_0/tspc_1/Q 0.38fF |
| C280 ro_div_0/divider_0/nor_0/Z1 ro_div_0/divider_0/and_0/B 0.78fF |
| C281 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF |
| C282 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/a4 0.09fF |
| C283 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/a5 0.09fF |
| C284 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_1/B 0.18fF |
| C285 ro_complete_0/cbank_0/v divbuf_5/IN 1.27fF |
| C286 ro_div_0/divider_0/and_0/out1 ro_div_0/divider_0/and_0/A 0.01fF |
| C287 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF |
| C288 pd_0/R pd_0/tspc_r_1/Qbar 0.03fF |
| C289 ro_div_0/ro_complete_0/a2 ro_div_0/ro_complete_0/cbank_2/switch_3/vin 0.09fF |
| C290 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT3 0.26fF |
| C291 pd_div_0/div pd_div_0/divbuf_0/OUT5 43.38fF |
| C292 gpio_analog[14] ro_complete_0/cbank_0/switch_0/vin 0.09fF |
| C293 ro_div_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_0/divider_0/prescaler_0/tspc_2/D 0.05fF |
| C294 ro_div_0/divider_0/prescaler_0/tspc_2/Z2 gnd 0.16fF |
| C295 ro_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_0/divider_0/clk 0.01fF |
| C296 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z2 0.01fF |
| C297 gnd pd_div_0/divider_0/and_0/B 0.45fF |
| C298 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Out1 0.05fF |
| C299 pd_div_0/divider_0/nor_1/B pd_div_0/divider_0/nor_0/B 0.47fF |
| C300 pd_div_0/divider_0/and_0/OUT pd_div_0/divider_0/prescaler_0/tspc_0/D 0.03fF |
| C301 pd_div_0/divider_0/prescaler_0/tspc_2/Z2 pd_div_0/divider_0/prescaler_0/tspc_2/D 0.09fF |
| C302 ro_div_0/divbuf_0/OUT2 ro_div_0/divbuf_0/a_492_n240# 0.42fF |
| C303 pd_div_0/pd_0/tspc_r_0/Z3 pd_div_0/pd_0/tspc_r_0/Qbar1 0.38fF |
| C304 ro_complete_0/cbank_1/switch_0/vin gpio_analog[14] 0.09fF |
| C305 ro_div_0/ro_complete_0/a2 ro_div_0/divider_0/clk 0.05fF |
| C306 pd_div_0/pd_0/tspc_r_0/Qbar1 pd_div_0/pd_0/R 0.01fF |
| C307 pll_full_0/ro_complete_0/a3 pll_full_0/divider_0/clk 0.11fF |
| C308 pd_div_0/pd_0/UP pd_div_0/pd_0/tspc_r_1/Qbar 0.21fF |
| C309 divbuf_5/IN ro_complete_0/cbank_2/v 1.36fF |
| C310 pd_div_0/divider_0/nor_1/A pd_div_0/divider_0/and_0/A 0.01fF |
| C311 ro_complete_0/a4 gpio_analog[15] 0.92fF |
| C312 pll_full_0/pd_0/DOWN pll_full_0/pd_0/UP 4.58fF |
| C313 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_0/z5 0.04fF |
| C314 ro_div_0/ro_complete_0/a2 ro_div_0/ro_complete_0/cbank_2/v 0.05fF |
| C315 ro_div_0/divider_0/tspc_1/a_630_n680# ro_div_0/divider_0/tspc_1/Q 0.04fF |
| C316 ro_div_0/divider_0/nor_1/B ro_div_0/divider_0/tspc_1/Z2 0.30fF |
| C317 ro_div_0/divider_0/tspc_0/Z1 ro_div_0/divider_0/nor_1/A 0.03fF |
| C318 ro_div_0/divider_0/prescaler_0/tspc_1/Z4 ro_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF |
| C319 ro_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# gnd 0.22fF |
| C320 ro_div_0/divider_0/prescaler_0/tspc_0/Z4 ro_div_0/divider_0/prescaler_0/tspc_0/D 0.11fF |
| C321 ro_div_0/ro_complete_0/cbank_1/switch_0/vin ro_div_0/divider_0/clk 1.45fF |
| C322 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/cbank_1/switch_3/vin 0.20fF |
| C323 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF |
| C324 gnd pd_div_0/divider_0/tspc_1/Z4 0.44fF |
| C325 divbuf_3/OUT5 divbuf_3/OUT2 0.02fF |
| C326 pd_div_0/divider_0/prescaler_0/m1_2700_2190# pd_div_0/divider_0/nor_1/A 0.01fF |
| C327 pd_div_0/divider_0/nor_1/B pd_div_0/divider_0/tspc_1/Z1 0.03fF |
| C328 pd_div_0/divider_0/tspc_1/a_630_n680# pd_div_0/divider_0/tspc_1/Z3 0.05fF |
| C329 pd_div_0/divider_0/prescaler_0/tspc_0/Z1 pd_div_0/divider_0/prescaler_0/tspc_0/D 0.15fF |
| C330 ro_div_0/ro_complete_0/cbank_0/switch_0/vin ro_div_0/ro_complete_0/cbank_0/switch_1/vin 0.19fF |
| C331 divbuf_0/OUT3 divbuf_0/OUT4 5.16fF |
| C332 ro_div_0/divider_0/tspc_0/Z3 ro_div_0/divider_0/prescaler_0/Out 0.45fF |
| C333 ro_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_0/divider_0/prescaler_0/tspc_1/Q 0.15fF |
| C334 ro_div_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_0/divider_0/and_0/OUT 0.06fF |
| C335 ro_div_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_0/divider_0/clk 0.45fF |
| C336 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT4 20.26fF |
| C337 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT3 0.26fF |
| C338 pll_full_0/ro_complete_0/cbank_0/switch_0/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF |
| C339 ro_complete_0/a2 ro_complete_0/cbank_2/switch_2/vin 0.14fF |
| C340 pll_full_0/filter_0/a_4216_n5230# pll_full_0/divider_0/clk 1.58fF |
| C341 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF |
| C342 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/Out 0.11fF |
| C343 gnd pd_div_0/divider_0/tspc_2/Z3 0.27fF |
| C344 cp_0/upbar io_analog[1] 0.02fF |
| C345 pd_0/R pd_0/and_pd_0/Z1 0.02fF |
| C346 pd_0/tspc_r_1/Qbar1 pd_0/tspc_r_1/z5 0.20fF |
| C347 ro_div_0/divider_0/nor_1/B ro_div_0/divider_0/and_0/B 0.31fF |
| C348 ro_div_0/divider_0/tspc_1/Q ro_div_0/divider_0/nor_0/B 0.22fF |
| C349 ro_div_0/divider_0/prescaler_0/tspc_1/Q ro_div_0/divider_0/prescaler_0/tspc_2/D 0.32fF |
| C350 ro_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_0/divider_0/clk 0.01fF |
| C351 pd_div_0/divider_0/prescaler_0/tspc_0/Z1 pd_div_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF |
| C352 pd_0/and_pd_0/Out1 pd_0/and_pd_0/Z1 0.18fF |
| C353 divbuf_3/OUT3 divbuf_3/OUT2 1.37fF |
| C354 pd_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# pd_div_0/divider_0/prescaler_0/Out 0.04fF |
| C355 pd_div_0/divider_0/nor_1/B pd_div_0/divider_0/and_0/A 0.26fF |
| C356 gpio_noesd[15] gpio_analog[15] 11.27fF |
| C357 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/R 0.01fF |
| C358 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z4 0.02fF |
| C359 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/Qbar 0.21fF |
| C360 pd_0/DIV divbuf_2/OUT4 1.11fF |
| C361 ro_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF |
| C362 ro_div_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF |
| C363 ro_div_0/divider_0/nor_0/Z1 gnd 0.01fF |
| C364 ro_complete_0/cbank_0/v ro_complete_0/cbank_0/switch_2/vin 1.30fF |
| C365 ro_div_0/divider_0/tspc_2/a_630_n680# ro_div_0/divbuf_0/IN 0.04fF |
| C366 ro_div_0/divider_0/nor_0/B ro_div_0/divider_0/tspc_2/Z2 0.40fF |
| C367 gnd pd_div_0/divider_0/tspc_0/a_630_n680# 0.62fF |
| C368 pd_div_0/pd_0/UP pd_div_0/pd_0/and_pd_0/Out1 0.33fF |
| C369 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF |
| C370 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.20fF |
| C371 pd_div_0/divider_0/tspc_1/a_630_n680# pd_div_0/divider_0/tspc_1/Z2 0.01fF |
| C372 pd_0/DIV pd_0/R 0.51fF |
| C373 pd_div_0/divider_0/nor_0/B pd_div_0/divider_0/tspc_2/Z1 0.03fF |
| C374 pd_div_0/divider_0/tspc_2/a_630_n680# pd_div_0/divider_0/tspc_2/Z3 0.05fF |
| C375 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/UP 0.03fF |
| C376 ro_div_0/divider_0/nor_1/B ro_div_0/divider_0/tspc_1/Z4 0.21fF |
| C377 ro_div_0/divider_0/tspc_1/Z2 ro_div_0/divider_0/tspc_1/Z3 0.16fF |
| C378 ro_div_0/divider_0/nor_1/A ro_div_0/divider_0/tspc_0/Z2 0.23fF |
| C379 ro_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF |
| C380 ro_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF |
| C381 ro_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_0/divider_0/prescaler_0/tspc_1/Q 0.04fF |
| C382 ro_div_0/ro_complete_0/cbank_1/switch_5/vin ro_div_0/divider_0/clk 1.30fF |
| C383 ro_complete_0/cbank_1/switch_2/vin divbuf_5/IN 1.30fF |
| C384 divbuf_4/a_492_n240# divbuf_4/IN 0.13fF |
| C385 pd_div_0/divider_0/nor_1/B pd_div_0/divider_0/tspc_1/Q 0.51fF |
| C386 pd_div_0/divider_0/tspc_1/Z1 pd_div_0/divider_0/tspc_1/Z3 0.06fF |
| C387 pd_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# pd_div_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF |
| C388 ro_div_0/ro_complete_0/a2 ro_div_0/ro_complete_0/cbank_0/switch_2/vin 0.14fF |
| C389 ro_div_0/ro_complete_0/cbank_0/switch_1/vin ro_div_0/ro_complete_0/a4 0.09fF |
| C390 ro_div_0/ro_complete_0/cbank_0/switch_0/vin ro_div_0/ro_complete_0/a5 0.09fF |
| C391 pd_div_0/divider_0/and_0/out1 pd_div_0/divider_0/and_0/B 0.18fF |
| C392 gpio_analog[13] ro_complete_0/cbank_2/switch_3/vin 0.14fF |
| C393 ro_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_0/divider_0/prescaler_0/tspc_0/Z2 0.01fF |
| C394 pll_full_0/pd_0/REF pll_full_0/divbuf_1/OUT5 0.00fF |
| C395 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT4 1.11fF |
| C396 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF |
| C397 ro_div_0/divider_0/tspc_0/Z2 gnd 0.16fF |
| C398 ro_div_0/divider_0/prescaler_0/tspc_2/Z4 ro_div_0/divider_0/prescaler_0/tspc_2/D 0.11fF |
| C399 ro_div_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_0/divider_0/prescaler_0/Out 0.08fF |
| C400 pd_div_0/pd_0/R pd_div_0/pd_0/REF 0.61fF |
| C401 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/Out 0.21fF |
| C402 io_analog[0] io_analog[1] 5.63fF |
| C403 pd_div_0/divider_0/nor_1/B pd_div_0/divider_0/tspc_2/Z2 0.20fF |
| C404 pd_div_0/divider_0/tspc_0/Z4 pd_div_0/divider_0/prescaler_0/Out 0.12fF |
| C405 pd_div_0/divider_0/and_0/OUT pd_div_0/divider_0/prescaler_0/nand_0/z1 0.01fF |
| C406 pd_div_0/pd_0/tspc_r_0/Z2 pd_div_0/pd_0/tspc_r_0/Z1 0.71fF |
| C407 ro_complete_0/a4 ro_complete_0/a2 0.49fF |
| C408 gpio_analog[13] ro_complete_0/cbank_0/v 0.16fF |
| C409 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/a3 0.13fF |
| C410 ro_div_0/divider_0/tspc_0/Z3 ro_div_0/divider_0/tspc_0/Z1 0.06fF |
| C411 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/cbank_1/switch_2/vin 0.20fF |
| C412 gnd pd_div_0/divider_0/tspc_0/Q 0.33fF |
| C413 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_1/B 0.35fF |
| C414 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF |
| C415 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/and_0/B 0.78fF |
| C416 pd_div_0/divider_0/tspc_0/Z1 pd_div_0/divider_0/tspc_0/Z4 0.00fF |
| C417 pd_div_0/divider_0/tspc_0/Z2 pd_div_0/divider_0/tspc_0/a_630_n680# 0.01fF |
| C418 pd_div_0/divider_0/and_0/OUT pd_div_0/divider_0/clk 0.04fF |
| C419 pll_full_0/pd_0/R pll_full_0/pd_0/REF 0.61fF |
| C420 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/v 1.30fF |
| C421 ro_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# gnd 0.94fF |
| C422 ro_div_0/divider_0/nor_1/B ro_div_0/divider_0/nor_1/A 1.21fF |
| C423 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_2/v 0.05fF |
| C424 divbuf_4/a_492_n240# divbuf_4/OUT 0.00fF |
| C425 gnd pd_div_0/divider_0/and_0/OUT 0.28fF |
| C426 pd_div_0/divider_0/tspc_1/a_630_n680# pd_div_0/divider_0/tspc_1/Z4 0.12fF |
| C427 pd_div_0/divider_0/tspc_1/Z1 pd_div_0/divider_0/tspc_1/Z2 1.07fF |
| C428 pd_div_0/divider_0/prescaler_0/tspc_0/Z3 pd_div_0/divider_0/prescaler_0/tspc_0/D 0.05fF |
| C429 pd_0/DOWN pd_0/UP 2.16fF |
| C430 pd_0/tspc_r_0/Z4 pd_0/tspc_r_0/z5 0.04fF |
| C431 pd_div_0/divider_0/nor_0/B pd_div_0/divider_0/and_0/B 0.29fF |
| C432 ro_div_0/ro_complete_0/a0 ro_div_0/ro_complete_0/cbank_2/switch_5/vin 0.09fF |
| C433 pd_0/DIV divbuf_2/OUT3 0.26fF |
| C434 gpio_analog[13] ro_complete_0/cbank_2/v 0.05fF |
| C435 ro_div_0/divider_0/tspc_1/Z3 ro_div_0/divider_0/tspc_1/Z4 0.65fF |
| C436 ro_div_0/divider_0/prescaler_0/tspc_0/Z4 ro_div_0/divider_0/clk 0.12fF |
| C437 ro_div_0/divider_0/nor_1/B gnd 1.17fF |
| C438 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF |
| C439 ro_complete_0/a3 ro_complete_0/cbank_2/v 0.05fF |
| C440 gnd pd_div_0/divider_0/tspc_2/Z4 0.44fF |
| C441 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/nor_0/B 0.47fF |
| C442 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_0/D 0.03fF |
| C443 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.09fF |
| C444 divbuf_5/a_492_n240# divbuf_5/OUT5 0.01fF |
| C445 pd_div_0/divider_0/tspc_1/Z3 pd_div_0/divider_0/tspc_1/Q 0.05fF |
| C446 divbuf_5/OUT3 divbuf_5/OUT5 0.01fF |
| C447 ro_div_0/ro_complete_0/cbank_0/switch_0/vin ro_div_0/ro_complete_0/cbank_0/v 1.30fF |
| C448 ro_div_0/divider_0/tspc_0/a_630_n680# ro_div_0/divider_0/tspc_0/Z4 0.12fF |
| C449 pd_0/DIV divbuf_2/a_492_n240# 0.00fF |
| C450 ro_complete_0/cbank_1/switch_0/vin divbuf_5/IN 1.45fF |
| C451 ro_div_0/divider_0/tspc_1/Q ro_div_0/divider_0/tspc_2/Z2 0.14fF |
| C452 ro_div_0/divider_0/prescaler_0/tspc_1/Q ro_div_0/divider_0/prescaler_0/nand_1/z1 0.22fF |
| C453 ro_div_0/divider_0/prescaler_0/tspc_0/Q ro_div_0/divider_0/prescaler_0/tspc_2/D 0.04fF |
| C454 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF |
| C455 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/a_630_n680# 0.05fF |
| C456 pll_full_0/ro_complete_0/a4 pll_full_0/divider_0/clk 0.11fF |
| C457 pd_div_0/pd_0/REF pd_div_0/pd_0/tspc_r_1/Z3 0.65fF |
| C458 ashish_0/a_150_0# io_analog[7] 9.14fF |
| C459 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/A 0.01fF |
| C460 pd_div_0/divider_0/mc2 pd_div_0/divider_0/nor_1/A 0.04fF |
| C461 pd_div_0/divider_0/prescaler_0/tspc_0/Z1 pd_div_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF |
| C462 pd_div_0/divider_0/tspc_1/Q pd_div_0/divider_0/tspc_2/Z1 0.01fF |
| C463 filter_0/a_4216_n2998# gpio_noesd[15] 0.37fF |
| C464 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/z5 0.11fF |
| C465 ro_div_0/divider_0/tspc_0/Q ro_div_0/divider_0/nor_1/B 0.22fF |
| C466 ro_div_0/divider_0/tspc_0/Z3 ro_div_0/divider_0/tspc_0/Z2 0.16fF |
| C467 ro_div_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF |
| C468 ro_div_0/divider_0/nor_0/B ro_div_0/divbuf_0/IN 0.30fF |
| C469 ro_div_0/divider_0/tspc_2/Z1 ro_div_0/divider_0/tspc_2/Z3 0.06fF |
| C470 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/v 0.05fF |
| C471 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/nor_1/A 0.01fF |
| C472 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z1 0.03fF |
| C473 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z3 0.05fF |
| C474 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.15fF |
| C475 pd_0/tspc_r_0/Qbar1 pd_0/R 0.01fF |
| C476 pd_0/DIV pd_0/tspc_r_0/Z4 0.02fF |
| C477 pd_0/DOWN pd_0/tspc_r_0/Qbar 0.21fF |
| C478 io_analog[6] io_clamp_high[2] 0.53fF |
| C479 divbuf_1/a_492_n240# divbuf_1/OUT5 0.01fF |
| C480 pd_div_0/divider_0/prescaler_0/tspc_1/Z1 pd_div_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF |
| C481 pd_div_0/divider_0/tspc_2/a_630_n680# pd_div_0/divider_0/tspc_2/Z4 0.12fF |
| C482 pd_div_0/divider_0/tspc_2/Z1 pd_div_0/divider_0/tspc_2/Z2 1.07fF |
| C483 pd_div_0/divider_0/nor_0/B pd_div_0/divider_0/tspc_2/Z3 0.38fF |
| C484 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z1 0.09fF |
| C485 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z2 0.19fF |
| C486 ro_complete_0/cbank_1/switch_0/vin ro_complete_0/cbank_1/switch_1/vin 0.19fF |
| C487 ro_div_0/divider_0/tspc_1/Z2 ro_div_0/divider_0/tspc_1/Z4 0.36fF |
| C488 ro_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF |
| C489 ro_div_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF |
| C490 ro_div_0/divider_0/and_0/out1 ro_div_0/divider_0/and_0/Z1 0.36fF |
| C491 divbuf_4/OUT2 divbuf_4/OUT3 1.37fF |
| C492 pd_0/tspc_r_1/Z3 pd_0/UP 0.03fF |
| C493 divbuf_1/OUT3 divbuf_1/OUT2 1.37fF |
| C494 pd_div_0/divider_0/tspc_1/Z1 pd_div_0/divider_0/tspc_1/Z4 0.00fF |
| C495 pd_div_0/divider_0/and_0/A pd_div_0/divider_0/and_0/B 0.18fF |
| C496 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT5 43.38fF |
| C497 ro_div_0/divider_0/nor_1/B ro_div_0/divider_0/tspc_2/Z4 0.02fF |
| C498 ro_div_0/divider_0/tspc_1/Z3 gnd 0.27fF |
| C499 ro_div_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_0/divider_0/prescaler_0/Out 0.11fF |
| C500 ro_div_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_0/divider_0/clk 0.11fF |
| C501 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF |
| C502 pd_div_0/pd_0/R pd_div_0/pd_0/tspc_r_1/Qbar1 0.30fF |
| C503 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z4 0.36fF |
| C504 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Q 0.05fF |
| C505 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF |
| C506 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/Out 0.04fF |
| C507 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/A 0.26fF |
| C508 pd_div_0/divider_0/mc2 pd_div_0/divider_0/nor_1/B 0.06fF |
| C509 pd_div_0/divider_0/prescaler_0/tspc_0/D pd_div_0/divider_0/prescaler_0/nand_0/z1 0.24fF |
| C510 pd_div_0/divider_0/prescaler_0/tspc_1/Z2 pd_div_0/divider_0/prescaler_0/Out 0.19fF |
| C511 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z3 0.65fF |
| C512 ro_div_0/ro_complete_0/cbank_1/switch_1/vin ro_div_0/ro_complete_0/cbank_1/switch_0/vin 0.19fF |
| C513 ro_div_0/divider_0/prescaler_0/m1_2700_2190# ro_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF |
| C514 pd_div_0/div pd_div_0/divbuf_0/OUT3 0.26fF |
| C515 pd_div_0/pd_0/tspc_r_0/Qbar1 pd_div_0/pd_0/tspc_r_0/z5 0.20fF |
| C516 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF |
| C517 ro_complete_0/a3 ro_complete_0/cbank_1/switch_2/vin 0.09fF |
| C518 pll_full_0/divbuf_1/OUT2 pll_full_0/divbuf_1/OUT3 1.37fF |
| C519 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF |
| C520 pd_div_0/divbuf_0/OUT5 pd_div_0/divbuf_0/OUT3 0.01fF |
| C521 pd_div_0/pd_0/tspc_r_1/Z3 pd_div_0/pd_0/tspc_r_1/Z4 0.20fF |
| C522 pd_div_0/pd_0/REF pd_div_0/pd_0/tspc_r_1/z5 0.04fF |
| C523 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z2 0.01fF |
| C524 pll_full_0/ro_complete_0/a1 pll_full_0/divider_0/clk 0.11fF |
| C525 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z1 0.03fF |
| C526 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z3 0.05fF |
| C527 divbuf_2/OUT5 divbuf_2/IN 0.00fF |
| C528 pd_div_0/divider_0/tspc_1/a_630_n680# pd_div_0/divider_0/tspc_0/Q 0.01fF |
| C529 divbuf_1/OUT2 divbuf_1/OUT5 0.02fF |
| C530 pd_div_0/divider_0/and_0/OUT pd_div_0/divider_0/and_0/out1 0.31fF |
| C531 pd_div_0/divider_0/prescaler_0/tspc_0/D pd_div_0/divider_0/clk 0.26fF |
| C532 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_1/Qbar 0.02fF |
| C533 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Qbar1 0.30fF |
| C534 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_2/vin 0.20fF |
| C535 ro_div_0/divider_0/tspc_1/Z2 ro_div_0/divider_0/nor_1/A 0.15fF |
| C536 ro_div_0/divider_0/tspc_0/Q ro_div_0/divider_0/tspc_1/Z3 0.45fF |
| C537 ro_div_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_0/divider_0/prescaler_0/tspc_0/Q 0.05fF |
| C538 ro_div_0/ro_complete_0/a0 ro_div_0/divider_0/clk 0.05fF |
| C539 divbuf_1/OUT4 divbuf_1/OUT3 5.16fF |
| C540 ro_div_0/divider_0/prescaler_0/Out ro_div_0/divider_0/clk 0.51fF |
| C541 gnd pd_div_0/divider_0/prescaler_0/tspc_0/D 0.05fF |
| C542 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Q 0.51fF |
| C543 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z3 0.06fF |
| C544 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF |
| C545 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/B 0.18fF |
| C546 pd_div_0/divider_0/tspc_0/Z4 pd_div_0/divider_0/nor_1/A 0.21fF |
| C547 pd_div_0/divider_0/prescaler_0/tspc_0/Z4 pd_div_0/divider_0/prescaler_0/tspc_0/D 0.11fF |
| C548 ro_div_0/ro_complete_0/a0 ro_div_0/ro_complete_0/cbank_2/v 0.05fF |
| C549 io_clamp_low[0] io_analog[4] 0.53fF |
| C550 ro_complete_0/a3 gpio_analog[16] 0.77fF |
| C551 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF |
| C552 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF |
| C553 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/a3 0.09fF |
| C554 ro_div_0/divider_0/tspc_1/Z2 gnd 0.16fF |
| C555 gnd pd_div_0/divider_0/nor_0/Z1 0.01fF |
| C556 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_2/Z2 0.20fF |
| C557 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/Out 0.12fF |
| C558 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/nand_0/z1 0.01fF |
| C559 pd_div_0/divider_0/prescaler_0/tspc_0/Z3 pd_div_0/divider_0/clk 0.45fF |
| C560 divbuf_5/OUT4 io_analog[5] 1.11fF |
| C561 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/a_492_n240# 0.00fF |
| C562 pll_full_0/ro_complete_0/cbank_0/switch_5/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF |
| C563 ro_div_0/divider_0/nor_1/A ro_div_0/divider_0/and_0/B 0.08fF |
| C564 ro_div_0/divider_0/prescaler_0/tspc_0/Q ro_div_0/divider_0/prescaler_0/nand_1/z1 0.01fF |
| C565 ro_div_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_0/divider_0/clk 0.11fF |
| C566 ro_div_0/divider_0/prescaler_0/tspc_2/Z3 ro_div_0/divider_0/prescaler_0/Out 0.05fF |
| C567 divbuf_1/OUT4 divbuf_1/OUT5 20.26fF |
| C568 gnd pd_div_0/divider_0/prescaler_0/tspc_0/Z3 0.27fF |
| C569 pd_div_0/pd_0/tspc_r_0/Z4 pd_div_0/pd_0/tspc_r_1/Z4 0.02fF |
| C570 pd_div_0/pd_0/tspc_r_1/Z3 pd_div_0/pd_0/tspc_r_1/Qbar1 0.38fF |
| C571 ro_complete_0/cbank_2/switch_2/vin ro_complete_0/cbank_2/v 1.30fF |
| C572 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/tspc_0/Z4 0.00fF |
| C573 pd_div_0/divider_0/tspc_0/Z3 pd_div_0/divider_0/tspc_0/Z4 0.65fF |
| C574 pd_div_0/divider_0/prescaler_0/tspc_0/Z3 pd_div_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF |
| C575 ashish_0/a_150_n710# io_analog[6] 9.14fF |
| C576 ashish_0/a_150_0# ashish_0/Gnd 2.09fF |
| C577 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/clk 0.05fF |
| C578 pd_div_0/divider_0/tspc_1/Q pd_div_0/divider_0/tspc_2/Z3 0.45fF |
| C579 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/switch_0/vin 0.19fF |
| C580 ro_div_0/ro_complete_0/a4 ro_div_0/ro_complete_0/cbank_2/switch_0/vin 0.12fF |
| C581 pll_full_0/pd_0/DOWN pll_full_0/pd_0/tspc_r_0/z5 0.03fF |
| C582 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/R 0.21fF |
| C583 gpio_analog[14] gpio_analog[17] 0.51fF |
| C584 pd_0/DIV divbuf_2/OUT2 0.06fF |
| C585 ro_div_0/divider_0/tspc_0/Q ro_div_0/divider_0/tspc_1/Z2 0.14fF |
| C586 ro_div_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_0/divider_0/prescaler_0/tspc_1/Z4 0.36fF |
| C587 ro_div_0/divider_0/nor_1/Z1 ro_div_0/divider_0/and_0/A 0.80fF |
| C588 ro_div_0/ro_complete_0/a3 ro_div_0/divider_0/clk 0.05fF |
| C589 io_analog[5] io_clamp_high[1] 0.53fF |
| C590 ro_div_0/divider_0/tspc_2/Z1 ro_div_0/divider_0/tspc_2/Z4 0.00fF |
| C591 gnd ro_div_0/divider_0/and_0/B 0.66fF |
| C592 divbuf_5/IN divbuf_5/a_492_n240# 0.13fF |
| C593 pd_div_0/pd_0/tspc_r_1/Qbar pd_div_0/pd_0/and_pd_0/Out1 0.05fF |
| C594 pd_div_0/pd_0/tspc_r_1/Z4 pd_div_0/pd_0/tspc_r_1/z5 0.04fF |
| C595 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Z4 0.12fF |
| C596 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z2 1.07fF |
| C597 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.05fF |
| C598 pd_div_0/divider_0/tspc_0/Q pd_div_0/divider_0/tspc_1/Z1 0.01fF |
| C599 pd_div_0/divider_0/prescaler_0/tspc_1/Z1 pd_div_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF |
| C600 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/z5 0.11fF |
| C601 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/and_0/B 0.29fF |
| C602 pd_div_0/divider_0/nor_0/B pd_div_0/divider_0/tspc_2/Z4 0.22fF |
| C603 pd_div_0/divider_0/tspc_2/Z2 pd_div_0/divider_0/tspc_2/Z3 0.16fF |
| C604 divbuf_0/OUT5 divbuf_0/OUT4 20.26fF |
| C605 ro_div_0/ro_complete_0/a3 ro_div_0/ro_complete_0/cbank_2/v 0.05fF |
| C606 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Z1 0.07fF |
| C607 ro_div_0/divider_0/nor_1/A ro_div_0/divider_0/tspc_1/Z4 0.02fF |
| C608 ro_div_0/divider_0/tspc_0/a_630_n680# ro_div_0/divider_0/prescaler_0/Out 0.01fF |
| C609 ro_div_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_0/divider_0/prescaler_0/tspc_1/Q 0.06fF |
| C610 ro_div_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_0/divider_0/prescaler_0/tspc_2/Z3 0.16fF |
| C611 ro_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_0/divider_0/clk 0.01fF |
| C612 divbuf_4/OUT2 divbuf_4/OUT5 0.02fF |
| C613 divbuf_4/OUT3 divbuf_4/OUT4 5.16fF |
| C614 pll_full_0/divider_0/tspc_1/Z3 pll_full_0/divider_0/tspc_1/Q 0.05fF |
| C615 pd_div_0/divider_0/prescaler_0/tspc_2/Z1 pd_div_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF |
| C616 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Z1 0.09fF |
| C617 ro_complete_0/a4 ro_complete_0/cbank_2/switch_1/vin 0.09fF |
| C618 ro_div_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_0/divider_0/prescaler_0/tspc_0/Z3 0.06fF |
| C619 pll_full_0/ro_complete_0/a3 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF |
| C620 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF |
| C621 ro_complete_0/cbank_2/switch_0/vin ro_complete_0/cbank_2/v 1.44fF |
| C622 ro_div_0/divider_0/tspc_1/Z4 gnd 0.44fF |
| C623 ro_div_0/divider_0/prescaler_0/tspc_1/Z4 ro_div_0/divider_0/prescaler_0/Out 0.28fF |
| C624 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF |
| C625 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z1 0.01fF |
| C626 pd_div_0/divider_0/and_0/OUT pd_div_0/divider_0/prescaler_0/tspc_0/Q 0.04fF |
| C627 pd_div_0/divider_0/prescaler_0/tspc_1/Z3 pd_div_0/divider_0/clk 0.45fF |
| C628 ro_div_0/ro_complete_0/a3 ro_div_0/ro_complete_0/cbank_1/switch_2/vin 0.09fF |
| C629 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Qbar1 0.38fF |
| C630 pll_full_0/divbuf_1/OUT3 pll_full_0/divbuf_1/OUT4 5.16fF |
| C631 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/v 0.05fF |
| C632 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF |
| C633 ro_div_0/divider_0/and_0/OUT ro_div_0/divider_0/and_0/B 0.01fF |
| C634 gnd ro_div_0/divider_0/tspc_2/Z3 0.27fF |
| C635 ro_div_0/divider_0/prescaler_0/tspc_1/Q ro_div_0/divider_0/prescaler_0/Out 0.91fF |
| C636 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF |
| C637 gnd pd_div_0/divider_0/prescaler_0/tspc_1/Z3 0.27fF |
| C638 pd_div_0/pd_0/tspc_r_1/Qbar1 pd_div_0/pd_0/tspc_r_1/z5 0.20fF |
| C639 pd_0/DIV pd_0/tspc_r_0/Z3 0.65fF |
| C640 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z4 0.12fF |
| C641 pll_full_0/divider_0/tspc_2/Z1 pll_full_0/divider_0/tspc_2/Z2 1.07fF |
| C642 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z3 0.38fF |
| C643 ro_div_0/ro_complete_0/cbank_1/switch_4/vin ro_div_0/ro_complete_0/cbank_1/switch_5/vin 0.20fF |
| C644 ro_complete_0/a4 ro_complete_0/cbank_2/v 0.05fF |
| C645 ro_div_0/divider_0/tspc_0/Q ro_div_0/divider_0/tspc_1/Z4 0.15fF |
| C646 ro_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.19fF |
| C647 pll_full_0/ro_complete_0/cbank_2/switch_2/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF |
| C648 pll_full_0/divider_0/tspc_1/Z1 pll_full_0/divider_0/tspc_1/Z4 0.00fF |
| C649 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/Out 0.11fF |
| C650 gnd pd_div_0/divider_0/prescaler_0/nand_0/z1 0.16fF |
| C651 pd_0/DOWN pd_0/tspc_r_1/Qbar 0.02fF |
| C652 pd_0/R pd_0/tspc_r_1/Qbar1 0.30fF |
| C653 pd_div_0/divider_0/prescaler_0/m1_2700_2190# pd_div_0/divider_0/and_0/OUT 0.14fF |
| C654 pd_div_0/divider_0/mc2 pd_div_0/divider_0/and_0/B 0.20fF |
| C655 pll_full_0/divider_0/and_0/A pll_full_0/divider_0/and_0/B 0.18fF |
| C656 divbuf_5/OUT2 io_analog[5] 0.06fF |
| C657 pd_div_0/pd_0/tspc_r_0/Z3 pd_div_0/div 0.65fF |
| C658 pll_full_0/pd_0/tspc_r_1/Z4 pll_full_0/pd_0/tspc_r_1/z5 0.04fF |
| C659 pd_div_0/div pd_div_0/pd_0/R 0.51fF |
| C660 ro_div_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_0/divider_0/prescaler_0/tspc_1/Q 0.06fF |
| C661 ro_div_0/divider_0/nor_1/A gnd 1.05fF |
| C662 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/a1 0.14fF |
| C663 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/Z1 1.07fF |
| C664 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/prescaler_0/nand_0/z1 0.24fF |
| C665 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/prescaler_0/Out 0.19fF |
| C666 divbuf_2/OUT5 divbuf_2/OUT4 20.26fF |
| C667 gnd pd_div_0/divider_0/clk 0.07fF |
| C668 pd_div_0/divider_0/prescaler_0/tspc_0/Z4 pd_div_0/divider_0/clk 0.12fF |
| C669 ro_div_0/ro_complete_0/cbank_0/switch_3/vin ro_div_0/ro_complete_0/a1 0.14fF |
| C670 ro_div_0/ro_complete_0/cbank_0/switch_1/vin ro_div_0/ro_complete_0/cbank_0/v 1.30fF |
| C671 ro_div_0/ro_complete_0/cbank_0/switch_2/vin ro_div_0/ro_complete_0/a3 0.09fF |
| C672 pd_div_0/pd_0/tspc_r_0/Qbar pd_div_0/pd_0/DOWN 0.21fF |
| C673 gpio_analog[14] divbuf_5/IN 0.10fF |
| C674 ro_complete_0/cbank_0/switch_1/vin ro_complete_0/a3 0.13fF |
| C675 ro_div_0/divider_0/prescaler_0/tspc_2/D ro_div_0/divider_0/prescaler_0/nand_1/z1 0.21fF |
| C676 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF |
| C677 gnd pd_div_0/divider_0/prescaler_0/tspc_0/Z4 0.44fF |
| C678 pd_div_0/pd_0/REF pd_div_0/pd_0/tspc_r_1/Z1 0.17fF |
| C679 pd_div_0/pd_0/tspc_r_1/Qbar1 pd_div_0/pd_0/UP 0.11fF |
| C680 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/switch_5/vin 0.20fF |
| C681 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_0/Q 0.01fF |
| C682 pll_full_0/ro_complete_0/a5 pll_full_0/divider_0/clk 0.15fF |
| C683 io_analog[7] ashish_0/Gnd 7.21fF |
| C684 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/out1 0.31fF |
| C685 pll_full_0/divider_0/prescaler_0/tspc_0/D pll_full_0/divider_0/clk 0.26fF |
| C686 pd_div_0/divider_0/nor_1/Z1 pd_div_0/divider_0/nor_1/B 0.06fF |
| C687 pd_div_0/divider_0/tspc_1/Q pd_div_0/divider_0/tspc_2/Z4 0.15fF |
| C688 pd_div_0/divider_0/nor_1/A pd_div_0/divider_0/prescaler_0/Out 0.15fF |
| C689 pd_div_0/divider_0/prescaler_0/tspc_2/Z3 pd_div_0/divider_0/clk 0.64fF |
| C690 pll_full_0/pd_0/tspc_r_0/Z2 pll_full_0/pd_0/tspc_r_0/Z4 0.14fF |
| C691 ro_div_0/ro_complete_0/cbank_0/switch_5/vin ro_div_0/ro_complete_0/cbank_0/v 1.30fF |
| C692 ro_div_0/divider_0/tspc_0/Q ro_div_0/divider_0/nor_1/A 0.55fF |
| C693 ro_div_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_0/divider_0/and_0/OUT 0.05fF |
| C694 ro_div_0/divider_0/tspc_2/Z3 ro_div_0/divider_0/tspc_2/Z4 0.65fF |
| C695 pll_full_0/ro_complete_0/a1 pll_full_0/ro_complete_0/cbank_2/v 0.05fF |
| C696 gnd pd_div_0/divider_0/prescaler_0/tspc_2/Z3 0.27fF |
| C697 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/nor_1/A 0.21fF |
| C698 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.11fF |
| C699 pd_0/DOWN pd_0/tspc_r_0/z5 0.03fF |
| C700 pd_0/tspc_r_0/Z2 pd_0/R 0.21fF |
| C701 divbuf_5/IN divbuf_5/OUT5 0.00fF |
| C702 pd_div_0/divider_0/tspc_0/Z1 pd_div_0/divider_0/nor_1/A 0.03fF |
| C703 pd_div_0/divider_0/prescaler_0/tspc_1/Z3 pd_div_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF |
| C704 pd_div_0/divider_0/nor_0/Z1 pd_div_0/divider_0/nor_0/B 0.06fF |
| C705 pd_div_0/divider_0/tspc_2/Z2 pd_div_0/divider_0/tspc_2/Z4 0.36fF |
| C706 pd_div_0/divider_0/tspc_2/Z3 pd_div_0/bufin 0.05fF |
| C707 pll_full_0/pd_0/R pll_full_0/pd_0/and_pd_0/Out1 0.33fF |
| C708 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z4 0.02fF |
| C709 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/Qbar 0.21fF |
| C710 divbuf_0/OUT5 divbuf_0/a_492_n240# 0.01fF |
| C711 ro_div_0/divider_0/tspc_0/Q gnd 0.33fF |
| C712 ro_div_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_0/divider_0/prescaler_0/tspc_2/Z4 0.36fF |
| C713 ro_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_0/divider_0/clk 0.01fF |
| C714 divbuf_4/OUT4 divbuf_4/OUT5 20.26fF |
| C715 divbuf_4/OUT3 divbuf_4/OUT 0.26fF |
| C716 gnd pd_div_0/divider_0/tspc_2/a_630_n680# 0.61fF |
| C717 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/clk 0.45fF |
| C718 pd_0/DOWN pd_0/and_pd_0/Z1 0.07fF |
| C719 pd_div_0/divider_0/tspc_0/Z3 pd_div_0/divider_0/prescaler_0/Out 0.45fF |
| C720 pd_div_0/divider_0/prescaler_0/tspc_2/Z1 pd_div_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF |
| C721 pd_div_0/divider_0/prescaler_0/tspc_1/Z3 pd_div_0/divider_0/prescaler_0/tspc_1/Q 0.21fF |
| C722 pd_div_0/divider_0/and_0/B pd_div_0/divider_0/and_0/Z1 0.07fF |
| C723 pll_full_0/pd_0/DIV pll_full_0/divbuf_0/OUT2 0.06fF |
| C724 ro_div_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_0/divider_0/prescaler_0/tspc_0/Z4 0.00fF |
| C725 ro_div_0/divider_0/and_0/OUT gnd 0.32fF |
| C726 pll_full_0/pd_0/DIV pll_full_0/divider_0/and_0/OUT 0.01fF |
| C727 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/a0 0.13fF |
| C728 gnd pd_div_0/divider_0/tspc_0/Z2 0.16fF |
| C729 pd_div_0/pd_0/R pd_div_0/pd_0/tspc_r_1/Z2 0.21fF |
| C730 ro_complete_0/cbank_1/switch_5/vin divbuf_5/IN 1.30fF |
| C731 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF |
| C732 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/IN 0.00fF |
| C733 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/divider_0/clk 1.32fF |
| C734 pd_div_0/divider_0/tspc_0/Z3 pd_div_0/divider_0/tspc_0/Z1 0.06fF |
| C735 pd_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# pd_div_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF |
| C736 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z3 0.45fF |
| C737 divbuf_1/OUT3 divbuf_1/OUT5 0.01fF |
| C738 pd_div_0/divider_0/prescaler_0/tspc_1/Z4 pd_div_0/divider_0/clk 0.12fF |
| C739 ro_div_0/ro_complete_0/a3 ro_div_0/ro_complete_0/cbank_2/switch_1/vin 0.13fF |
| C740 ro_div_0/ro_complete_0/cbank_2/switch_3/vin ro_div_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF |
| C741 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Z1 0.17fF |
| C742 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/DOWN 0.11fF |
| C743 ro_div_0/divider_0/tspc_0/Z3 ro_div_0/divider_0/nor_1/A 0.38fF |
| C744 ro_div_0/divider_0/tspc_0/a_630_n680# ro_div_0/divider_0/tspc_0/Z2 0.01fF |
| C745 ro_div_0/ro_complete_0/a4 ro_div_0/divider_0/clk 0.05fF |
| C746 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/switch_4/vin 0.20fF |
| C747 gnd ro_div_0/divider_0/tspc_2/Z4 0.44fF |
| C748 gnd pd_div_0/divider_0/prescaler_0/tspc_1/Z4 0.44fF |
| C749 pll_full_0/divider_0/tspc_0/Q pll_full_0/divider_0/tspc_1/Z1 0.01fF |
| C750 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF |
| C751 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/divider_0/clk 1.27fF |
| C752 divbuf_2/OUT5 divbuf_2/OUT3 0.01fF |
| C753 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Qbar1 0.38fF |
| C754 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z4 0.22fF |
| C755 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z3 0.16fF |
| C756 divbuf_2/IN divbuf_2/a_492_n240# 0.13fF |
| C757 pd_div_0/divider_0/prescaler_0/tspc_1/Q pd_div_0/divider_0/clk 0.60fF |
| C758 ro_div_0/ro_complete_0/a4 ro_div_0/ro_complete_0/cbank_2/v 0.05fF |
| C759 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z2 0.21fF |
| C760 ro_div_0/divider_0/tspc_0/Z3 gnd 0.27fF |
| C761 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF |
| C762 gnd pd_div_0/divider_0/prescaler_0/tspc_1/Q 0.83fF |
| C763 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF |
| C764 pll_full_0/divider_0/nor_1/Z1 pll_full_0/divider_0/and_0/A 0.80fF |
| C765 divbuf_2/OUT5 divbuf_2/a_492_n240# 0.01fF |
| C766 pd_div_0/divider_0/prescaler_0/m1_2700_2190# pd_div_0/divider_0/prescaler_0/tspc_0/D 0.16fF |
| C767 pd_div_0/divider_0/prescaler_0/tspc_0/Z3 pd_div_0/divider_0/prescaler_0/tspc_0/Q 0.05fF |
| C768 ro_div_0/ro_complete_0/cbank_2/switch_2/vin ro_div_0/ro_complete_0/cbank_2/v 1.30fF |
| C769 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Z1 0.06fF |
| C770 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF |
| C771 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF |
| C772 pd_div_0/div pd_div_0/pd_0/tspc_r_0/Z4 0.02fF |
| C773 ro_div_0/divider_0/prescaler_0/m1_2700_2190# ro_div_0/divider_0/prescaler_0/Out 0.11fF |
| C774 ro_complete_0/cbank_1/switch_3/vin divbuf_5/IN 1.30fF |
| C775 divbuf_4/OUT5 divbuf_4/IN 0.00fF |
| C776 gnd pd_div_0/divider_0/and_0/out1 0.23fF |
| C777 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.04fF |
| C778 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/clk 0.45fF |
| C779 pd_div_0/divider_0/prescaler_0/tspc_2/Z3 pd_div_0/divider_0/prescaler_0/tspc_1/Q 0.13fF |
| C780 pd_0/tspc_r_1/Z4 pd_0/tspc_r_1/z5 0.04fF |
| C781 ro_div_0/ro_complete_0/cbank_2/switch_3/vin ro_div_0/ro_complete_0/a1 0.14fF |
| C782 divbuf_0/OUT3 divbuf_0/OUT2 1.37fF |
| C783 ro_complete_0/a4 ro_complete_0/cbank_0/switch_0/vin 0.12fF |
| C784 ro_div_0/divider_0/tspc_0/a_630_n680# ro_div_0/divider_0/nor_1/B 0.01fF |
| C785 ro_div_0/divider_0/tspc_0/Z3 ro_div_0/divider_0/tspc_0/Q 0.05fF |
| C786 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF |
| C787 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/a2 0.09fF |
| C788 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/nor_1/A 0.23fF |
| C789 pll_full_0/divbuf_0/a_492_n240# pll_full_0/divbuf_0/IN 0.13fF |
| C790 gnd pd_div_0/divider_0/tspc_1/a_630_n680# 0.62fF |
| C791 pd_div_0/pd_0/tspc_r_1/Z3 pd_div_0/pd_0/tspc_r_1/Z2 0.25fF |
| C792 ro_complete_0/cbank_2/switch_4/vin ro_complete_0/cbank_2/v 1.30fF |
| C793 pd_div_0/divider_0/mc2 pd_div_0/divider_0/and_0/OUT 0.05fF |
| C794 pd_div_0/divider_0/prescaler_0/tspc_2/Z4 pd_div_0/divider_0/clk 0.12fF |
| C795 filter_0/a_4216_n5230# gpio_noesd[15] 0.19fF |
| C796 ro_complete_0/a4 ro_complete_0/cbank_1/switch_0/vin 0.15fF |
| C797 ro_div_0/ro_complete_0/a5 ro_div_0/ro_complete_0/cbank_2/switch_0/vin 0.09fF |
| C798 gpio_noesd[15] gpio_analog[16] 9.28fF |
| C799 pll_full_0/pd_0/DOWN pll_full_0/pd_0/REF 1.48fF |
| C800 ro_div_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF |
| C801 ro_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_0/divider_0/prescaler_0/tspc_0/Q 0.20fF |
| C802 ro_div_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_0/divider_0/prescaler_0/tspc_0/D 0.09fF |
| C803 ro_div_0/divider_0/nor_0/Z1 ro_div_0/divider_0/nor_0/B 0.06fF |
| C804 ro_div_0/ro_complete_0/a1 ro_div_0/divider_0/clk 0.05fF |
| C805 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/and_0/OUT 0.14fF |
| C806 gnd pd_div_0/divider_0/prescaler_0/tspc_2/Z4 0.44fF |
| C807 pd_div_0/divider_0/tspc_0/Z4 pd_div_0/divider_0/tspc_0/a_630_n680# 0.12fF |
| C808 pd_0/tspc_r_0/Z2 pd_0/tspc_r_0/Z4 0.14fF |
| C809 ro_div_0/ro_complete_0/a1 ro_div_0/ro_complete_0/cbank_2/v 0.05fF |
| C810 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/z5 0.11fF |
| C811 gpio_analog[14] ro_complete_0/a3 0.63fF |
| C812 pll_full_0/ro_complete_0/a4 pll_full_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF |
| C813 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 pll_full_0/divider_0/clk 0.12fF |
| C814 divbuf_4/OUT5 divbuf_4/OUT 43.38fF |
| C815 gnd pd_div_0/divider_0/nor_0/B 1.08fF |
| C816 pd_div_0/divider_0/nor_1/Z1 pd_div_0/divider_0/and_0/B 0.18fF |
| C817 pd_div_0/divider_0/prescaler_0/tspc_2/Z3 pd_div_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF |
| C818 pd_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# pd_div_0/divider_0/clk 0.01fF |
| C819 pd_0/R pd_0/and_pd_0/Out1 0.33fF |
| C820 pd_0/UP pd_0/tspc_r_1/Qbar 0.21fF |
| C821 ro_div_0/divider_0/prescaler_0/tspc_0/Z3 ro_div_0/divider_0/prescaler_0/tspc_0/Z4 0.65fF |
| C822 ro_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# ro_div_0/divider_0/prescaler_0/Out 0.21fF |
| C823 ro_div_0/divider_0/prescaler_0/tspc_0/D gnd 0.05fF |
| C824 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF |
| C825 gnd pd_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# 0.22fF |
| C826 ro_complete_0/a2 ro_complete_0/cbank_2/v 0.05fF |
| C827 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/Z4 0.15fF |
| C828 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/prescaler_0/Out 0.15fF |
| C829 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/clk 0.64fF |
| C830 pd_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# pd_div_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF |
| C831 pd_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# pd_div_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF |
| C832 pll_full_0/pd_0/DOWN pll_full_0/cp_0/a_1710_0# 0.04fF |
| C833 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z2 0.25fF |
| C834 ro_div_0/ro_complete_0/cbank_0/switch_4/vin ro_div_0/ro_complete_0/a0 0.13fF |
| C835 ro_div_0/divider_0/tspc_1/a_630_n680# ro_div_0/divider_0/nor_1/B 0.35fF |
| C836 ro_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# ro_div_0/divider_0/prescaler_0/tspc_1/Z2 0.01fF |
| C837 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_2/v 0.08fF |
| C838 pll_full_0/ro_complete_0/a0 pll_full_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF |
| C839 pll_full_0/divider_0/tspc_0/Z1 pll_full_0/divider_0/nor_1/A 0.03fF |
| C840 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.65fF |
| C841 pd_0/DIV pd_0/tspc_r_0/Z1 0.17fF |
| C842 pd_0/tspc_r_0/Qbar1 pd_0/DOWN 0.11fF |
| C843 pll_full_0/divider_0/tspc_2/Z2 pll_full_0/divider_0/tspc_2/Z4 0.36fF |
| C844 pll_full_0/divider_0/tspc_2/Z3 pll_full_0/divbuf_0/IN 0.05fF |
| C845 pd_div_0/divider_0/tspc_0/Z3 pd_div_0/divider_0/nor_1/A 0.38fF |
| C846 pd_div_0/divider_0/prescaler_0/m1_2700_2190# pd_div_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF |
| C847 pd_div_0/divider_0/and_0/OUT pd_div_0/divider_0/and_0/Z1 0.04fF |
| C848 pd_div_0/divider_0/tspc_2/a_630_n680# pd_div_0/divider_0/nor_0/B 0.35fF |
| C849 pd_div_0/divider_0/prescaler_0/tspc_0/Q pd_div_0/divider_0/clk 0.05fF |
| C850 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z3 0.65fF |
| C851 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT4 5.16fF |
| C852 pll_full_0/ro_complete_0/cbank_0/switch_1/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF |
| C853 ro_complete_0/cbank_1/switch_1/vin divbuf_5/IN 1.30fF |
| C854 pll_full_0/ro_complete_0/cbank_2/switch_4/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF |
| C855 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.00fF |
| C856 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF |
| C857 gnd pd_div_0/divider_0/prescaler_0/tspc_0/Q 0.35fF |
| C858 pd_0/R pd_0/tspc_r_1/Z2 0.21fF |
| C859 pll_full_0/divider_0/and_0/B pll_full_0/divider_0/and_0/Z1 0.07fF |
| C860 divbuf_2/OUT4 divbuf_2/OUT3 5.16fF |
| C861 pd_div_0/divider_0/prescaler_0/m1_2700_2190# pd_div_0/divider_0/prescaler_0/nand_0/z1 0.07fF |
| C862 pd_div_0/divider_0/nor_1/B pd_div_0/divider_0/nor_1/A 1.21fF |
| C863 io_clamp_low[2] io_clamp_high[2] 0.53fF |
| C864 ro_complete_0/a4 ro_complete_0/cbank_0/switch_1/vin 0.09fF |
| C865 ro_div_0/ro_complete_0/cbank_2/switch_4/vin ro_div_0/ro_complete_0/cbank_2/switch_5/vin 0.20fF |
| C866 pd_div_0/div pd_div_0/pd_0/tspc_r_0/z5 0.04fF |
| C867 ro_div_0/divider_0/nor_1/B ro_div_0/divider_0/nor_0/B 0.47fF |
| C868 ro_div_0/divider_0/and_0/OUT ro_div_0/divider_0/prescaler_0/tspc_0/D 0.03fF |
| C869 ro_div_0/divider_0/prescaler_0/tspc_2/Z2 ro_div_0/divider_0/prescaler_0/tspc_2/D 0.09fF |
| C870 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/clk 0.12fF |
| C871 divbuf_2/OUT5 divbuf_2/OUT2 0.02fF |
| C872 gnd pd_div_0/divider_0/and_0/A 0.53fF |
| C873 pd_0/UP pd_0/and_pd_0/Z1 0.06fF |
| C874 pd_div_0/divider_0/prescaler_0/tspc_2/Z4 pd_div_0/divider_0/prescaler_0/tspc_1/Q 0.21fF |
| C875 pd_div_0/divider_0/prescaler_0/tspc_2/Z1 pd_div_0/divider_0/prescaler_0/tspc_2/D 0.03fF |
| C876 pd_div_0/divider_0/prescaler_0/m1_2700_2190# pd_div_0/divider_0/clk 0.01fF |
| C877 ro_div_0/ro_complete_0/a4 ro_div_0/ro_complete_0/cbank_2/switch_1/vin 0.09fF |
| C878 ro_div_0/ro_complete_0/cbank_0/switch_3/vin ro_div_0/ro_complete_0/cbank_0/v 1.30fF |
| C879 gnd pd_div_0/divider_0/prescaler_0/m1_2700_2190# 0.22fF |
| C880 pd_div_0/pd_0/tspc_r_1/Qbar1 pd_div_0/pd_0/tspc_r_1/Qbar 0.01fF |
| C881 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/clk 0.60fF |
| C882 ro_div_0/ro_complete_0/cbank_2/switch_1/vin ro_div_0/ro_complete_0/cbank_2/switch_2/vin 0.20fF |
| C883 ro_div_0/divider_0/nor_1/B ro_div_0/divider_0/tspc_1/Z1 0.03fF |
| C884 ro_div_0/divider_0/tspc_1/a_630_n680# ro_div_0/divider_0/tspc_1/Z3 0.05fF |
| C885 ro_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_0/divider_0/prescaler_0/tspc_0/Q 0.04fF |
| C886 ro_complete_0/cbank_1/switch_2/vin ro_complete_0/a2 0.12fF |
| C887 pll_full_0/ro_complete_0/cbank_0/v pll_full_0/ro_complete_0/cbank_2/v 0.04fF |
| C888 gnd pd_div_0/divider_0/tspc_1/Q 0.33fF |
| C889 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_0/D 0.16fF |
| C890 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.05fF |
| C891 pd_div_0/divider_0/prescaler_0/tspc_0/Z2 pd_div_0/divider_0/and_0/OUT 0.05fF |
| C892 pll_full_0/pd_0/UP pll_full_0/pd_0/tspc_r_1/z5 0.03fF |
| C893 pll_full_0/divbuf_1/OUT5 pll_full_0/divbuf_1/OUT3 0.01fF |
| C894 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT2 0.06fF |
| C895 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF |
| C896 ro_div_0/divider_0/prescaler_0/tspc_1/Z3 gnd 0.27fF |
| C897 ro_div_0/divider_0/prescaler_0/tspc_0/Z2 ro_div_0/divider_0/clk 0.11fF |
| C898 gnd pd_div_0/divider_0/tspc_2/Z2 0.16fF |
| C899 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.13fF |
| C900 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/z5 0.11fF |
| C901 pd_div_0/divider_0/tspc_1/a_630_n680# pd_div_0/divider_0/nor_0/B 0.00fF |
| C902 pd_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# pd_div_0/divider_0/clk 0.01fF |
| C903 ro_div_0/ro_complete_0/a4 ro_div_0/ro_complete_0/cbank_1/switch_1/vin 0.09fF |
| C904 ro_div_0/divider_0/prescaler_0/nand_0/z1 gnd 0.16fF |
| C905 ro_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_0/divider_0/prescaler_0/Out 0.04fF |
| C906 ro_div_0/divider_0/nor_1/B ro_div_0/divider_0/and_0/A 0.26fF |
| C907 gnd pd_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.61fF |
| C908 pd_div_0/pd_0/DOWN pd_div_0/pd_0/and_pd_0/Z1 0.07fF |
| C909 pll_full_0/divider_0/nor_0/Z1 pll_full_0/divider_0/nor_0/B 0.06fF |
| C910 divbuf_3/OUT5 divbuf_3/OUT4 20.26fF |
| C911 pd_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# pd_div_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF |
| C912 pd_div_0/divider_0/prescaler_0/tspc_0/Z1 pd_div_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF |
| C913 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/clk 0.12fF |
| C914 pd_div_0/divider_0/tspc_1/Q pd_div_0/divider_0/tspc_2/a_630_n680# 0.01fF |
| C915 pd_div_0/divider_0/tspc_0/a_630_n680# pd_div_0/divider_0/prescaler_0/Out 0.01fF |
| C916 pd_div_0/divider_0/prescaler_0/tspc_1/Q pd_div_0/divider_0/prescaler_0/tspc_0/Q 0.19fF |
| C917 pd_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# pd_div_0/divider_0/clk 0.14fF |
| C918 pd_div_0/pd_0/tspc_r_0/Z2 pd_div_0/div 0.19fF |
| C919 ro_div_0/ro_complete_0/cbank_2/switch_3/vin ro_div_0/ro_complete_0/cbank_2/switch_4/vin 0.20fF |
| C920 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/Qbar 0.01fF |
| C921 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/R 0.27fF |
| C922 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/a_492_n240# 0.00fF |
| C923 ro_div_0/divider_0/tspc_1/a_630_n680# ro_div_0/divider_0/tspc_1/Z2 0.01fF |
| C924 ro_div_0/ro_complete_0/a5 ro_div_0/divider_0/clk 0.10fF |
| C925 pll_full_0/pd_0/DIV pll_full_0/divider_0/clk 2.26fF |
| C926 ro_div_0/divider_0/nor_0/B ro_div_0/divider_0/tspc_2/Z1 0.03fF |
| C927 ro_div_0/divider_0/tspc_2/a_630_n680# ro_div_0/divider_0/tspc_2/Z3 0.05fF |
| C928 gnd ro_div_0/divider_0/clk 0.07fF |
| C929 gnd pd_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.22fF |
| C930 ro_complete_0/cbank_2/switch_5/vin ro_complete_0/cbank_2/v 1.30fF |
| C931 pll_full_0/divider_0/tspc_0/Z4 pll_full_0/divider_0/tspc_0/a_630_n680# 0.12fF |
| C932 pd_div_0/divider_0/prescaler_0/m1_2700_2190# pd_div_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF |
| C933 pd_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# pd_div_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF |
| C934 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z2 0.25fF |
| C935 pd_div_0/divider_0/tspc_2/a_630_n680# pd_div_0/divider_0/tspc_2/Z2 0.01fF |
| C936 pd_div_0/divider_0/prescaler_0/tspc_2/D pd_div_0/divider_0/clk 0.29fF |
| C937 ro_div_0/ro_complete_0/a5 ro_div_0/ro_complete_0/cbank_2/v 0.08fF |
| C938 ro_div_0/ro_complete_0/a0 ro_div_0/ro_complete_0/cbank_1/switch_5/vin 0.09fF |
| C939 pll_full_0/cp_0/a_1710_0# pll_full_0/cp_0/down 0.32fF |
| C940 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Qbar1 0.38fF |
| C941 pd_div_0/pd_0/tspc_r_0/Z3 pd_div_0/pd_0/DOWN 0.03fF |
| C942 gpio_analog[13] divbuf_5/IN 0.05fF |
| C943 ro_div_0/divider_0/nor_1/B ro_div_0/divider_0/tspc_1/Q 0.51fF |
| C944 ro_div_0/divider_0/tspc_1/Z1 ro_div_0/divider_0/tspc_1/Z3 0.06fF |
| C945 ro_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# ro_div_0/divider_0/prescaler_0/tspc_2/Z2 0.01fF |
| C946 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT5 0.01fF |
| C947 pll_full_0/ro_complete_0/cbank_2/switch_0/vin pll_full_0/ro_complete_0/cbank_2/v 1.44fF |
| C948 pd_div_0/pd_0/DOWN pd_div_0/pd_0/R 0.36fF |
| C949 ro_complete_0/a3 divbuf_5/IN 0.05fF |
| C950 ro_div_0/divider_0/and_0/out1 ro_div_0/divider_0/and_0/B 0.18fF |
| C951 gnd pd_div_0/divider_0/prescaler_0/tspc_2/D 0.05fF |
| C952 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.65fF |
| C953 pll_full_0/ro_complete_0/cbank_2/v pll_full_0/divider_0/clk 1.36fF |
| C954 divbuf_3/OUT3 divbuf_3/OUT4 5.16fF |
| C955 pd_div_0/divider_0/tspc_1/Z2 pd_div_0/divider_0/nor_1/A 0.15fF |
| C956 pd_div_0/divider_0/nor_1/B pd_div_0/divider_0/tspc_1/Z3 0.38fF |
| C957 pd_div_0/divider_0/prescaler_0/tspc_1/Z2 pd_div_0/divider_0/and_0/OUT 0.06fF |
| C958 pd_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# pd_div_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF |
| C959 pd_div_0/divider_0/prescaler_0/m1_2700_2190# pd_div_0/divider_0/prescaler_0/tspc_1/Q 0.38fF |
| C960 cp_0/a_1710_0# io_analog[0] 0.84fF |
| C961 ro_div_0/divbuf_0/OUT3 ro_div_0/divbuf_0/OUT4 5.16fF |
| C962 ro_div_0/ro_complete_0/cbank_0/switch_1/vin ro_div_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF |
| C963 pd_div_0/divider_0/and_0/out1 pd_div_0/divider_0/and_0/A 0.01fF |
| C964 ro_complete_0/cbank_2/switch_0/vin gpio_analog[14] 0.09fF |
| C965 ro_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_0/divider_0/prescaler_0/tspc_0/Z3 0.33fF |
| C966 ro_div_0/ro_complete_0/cbank_2/switch_4/vin ro_div_0/ro_complete_0/cbank_2/v 1.30fF |
| C967 pll_full_0/pd_0/tspc_r_1/Qbar pll_full_0/pd_0/and_pd_0/Z1 0.02fF |
| C968 ro_div_0/divider_0/nor_1/B ro_div_0/divider_0/tspc_2/Z2 0.20fF |
| C969 ro_div_0/divider_0/tspc_0/Z4 ro_div_0/divider_0/prescaler_0/Out 0.12fF |
| C970 ro_div_0/divider_0/and_0/OUT ro_div_0/divider_0/prescaler_0/nand_0/z1 0.01fF |
| C971 ro_div_0/divider_0/prescaler_0/tspc_2/Z3 gnd 0.27fF |
| C972 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF |
| C973 pll_full_0/ro_complete_0/cbank_0/switch_2/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF |
| C974 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF |
| C975 pd_div_0/divider_0/prescaler_0/tspc_2/Z3 pd_div_0/divider_0/prescaler_0/tspc_2/D 0.05fF |
| C976 pd_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# pd_div_0/divider_0/clk 0.01fF |
| C977 pd_div_0/divbuf_0/OUT2 pd_div_0/divbuf_0/a_492_n240# 0.42fF |
| C978 ro_div_0/divider_0/tspc_0/a_630_n680# ro_div_0/divider_0/nor_1/A 0.35fF |
| C979 ro_div_0/divbuf_0/OUT5 ro_div_0/divbuf_0/IN 0.00fF |
| C980 ro_div_0/ro_complete_0/cbank_1/switch_3/vin ro_div_0/divider_0/clk 1.30fF |
| C981 ro_complete_0/cbank_1/switch_1/vin ro_complete_0/a3 0.15fF |
| C982 gnd ro_div_0/divider_0/tspc_2/a_630_n680# 0.61fF |
| C983 ro_div_0/divider_0/and_0/OUT ro_div_0/divider_0/clk 0.04fF |
| C984 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.33fF |
| C985 pll_full_0/ro_complete_0/cbank_1/switch_2/vin pll_full_0/divider_0/clk 1.46fF |
| C986 gnd pd_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.61fF |
| C987 pd_div_0/pd_0/R pd_div_0/pd_0/and_pd_0/Z1 0.02fF |
| C988 pd_div_0/pd_0/tspc_r_1/Z1 pd_div_0/pd_0/tspc_r_1/Z2 0.71fF |
| C989 pll_full_0/divider_0/and_0/OUT pll_full_0/divider_0/and_0/Z1 0.04fF |
| C990 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/nor_0/B 0.35fF |
| C991 pll_full_0/divider_0/prescaler_0/tspc_0/Q pll_full_0/divider_0/clk 0.05fF |
| C992 pd_div_0/divider_0/nor_1/A pd_div_0/divider_0/and_0/B 0.08fF |
| C993 ro_complete_0/a4 gpio_analog[14] 3.13fF |
| C994 ro_div_0/divider_0/tspc_1/a_630_n680# ro_div_0/divider_0/tspc_1/Z4 0.12fF |
| C995 ro_div_0/divider_0/tspc_1/Z1 ro_div_0/divider_0/tspc_1/Z2 1.07fF |
| C996 ro_div_0/divider_0/tspc_0/a_630_n680# gnd 0.62fF |
| C997 ro_div_0/ro_complete_0/cbank_0/v ro_div_0/divider_0/clk 1.27fF |
| C998 ro_complete_0/cbank_2/switch_3/vin ro_complete_0/cbank_2/v 1.30fF |
| C999 ro_div_0/divider_0/nor_0/B ro_div_0/divider_0/and_0/B 0.29fF |
| C1000 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/nand_0/z1 0.07fF |
| C1001 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/nor_1/A 1.21fF |
| C1002 divbuf_4/a_492_n240# divbuf_4/OUT5 0.01fF |
| C1003 pd_div_0/divider_0/tspc_1/a_630_n680# pd_div_0/divider_0/tspc_1/Q 0.04fF |
| C1004 pd_div_0/divider_0/nor_1/B pd_div_0/divider_0/tspc_1/Z2 0.30fF |
| C1005 pd_div_0/divider_0/prescaler_0/tspc_1/Z4 pd_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF |
| C1006 pd_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# pd_div_0/divider_0/prescaler_0/tspc_0/Q 0.20fF |
| C1007 pd_div_0/divider_0/prescaler_0/tspc_0/Z2 pd_div_0/divider_0/prescaler_0/tspc_0/D 0.09fF |
| C1008 ro_div_0/divbuf_0/OUT ro_div_0/divbuf_0/OUT3 0.26fF |
| C1009 pd_div_0/pd_0/tspc_r_0/Z1 pd_div_0/div 0.17fF |
| C1010 ro_div_0/ro_complete_0/cbank_0/v ro_div_0/ro_complete_0/cbank_2/v 0.04fF |
| C1011 pll_full_0/pd_0/tspc_r_1/Z2 pll_full_0/pd_0/tspc_r_1/Z4 0.14fF |
| C1012 pd_div_0/pd_0/tspc_r_0/Z3 pd_div_0/pd_0/R 0.27fF |
| C1013 ro_complete_0/cbank_2/switch_1/vin ro_complete_0/cbank_2/v 1.30fF |
| C1014 ro_div_0/divider_0/nor_1/A ro_div_0/divider_0/prescaler_0/tspc_1/Q 0.03fF |
| C1015 ro_div_0/divider_0/tspc_1/Z3 ro_div_0/divider_0/tspc_1/Q 0.05fF |
| C1016 ro_div_0/divider_0/prescaler_0/tspc_1/Z4 gnd 0.44fF |
| C1017 pll_full_0/divbuf_1/OUT pll_full_0/divbuf_1/OUT4 1.11fF |
| C1018 gnd pd_div_0/divider_0/mc2 1.36fF |
| C1019 ro_complete_0/cbank_0/v ro_complete_0/cbank_2/v 0.04fF |
| C1020 pll_full_0/ro_complete_0/cbank_2/switch_5/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF |
| C1021 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.21fF |
| C1022 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.03fF |
| C1023 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/clk 0.01fF |
| C1024 gnd pd_div_0/bufin 0.29fF |
| C1025 pd_0/DOWN divbuf_0/OUT5 0.00fF |
| C1026 pd_0/UP pd_0/tspc_r_1/z5 0.03fF |
| C1027 pd_div_0/divider_0/nor_1/A pd_div_0/divider_0/tspc_1/Z4 0.02fF |
| C1028 pd_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# pd_div_0/divider_0/prescaler_0/tspc_1/Q 0.15fF |
| C1029 pd_div_0/divider_0/prescaler_0/tspc_2/Z2 pd_div_0/divider_0/and_0/OUT 0.06fF |
| C1030 divbuf_5/OUT3 divbuf_5/OUT4 5.16fF |
| C1031 ro_div_0/ro_complete_0/cbank_1/switch_3/vin ro_div_0/ro_complete_0/cbank_1/switch_2/vin 0.20fF |
| C1032 pd_0/UP divbuf_1/a_492_n240# 0.13fF |
| C1033 divbuf_0/OUT5 divbuf_0/OUT2 0.02fF |
| C1034 ro_div_0/divider_0/tspc_0/a_630_n680# ro_div_0/divider_0/tspc_0/Q 0.04fF |
| C1035 ro_div_0/divider_0/tspc_1/Q ro_div_0/divider_0/tspc_2/Z1 0.01fF |
| C1036 ro_div_0/divider_0/prescaler_0/tspc_1/Q gnd 0.83fF |
| C1037 pll_full_0/pd_0/DIV pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.03fF |
| C1038 pll_full_0/divider_0/tspc_0/Z2 pll_full_0/divider_0/tspc_0/a_630_n680# 0.01fF |
| C1039 ashish_0/a_150_0# ashish_0/a_150_n710# 6.31fF |
| C1040 pd_div_0/divider_0/prescaler_0/tspc_0/Z2 pd_div_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF |
| C1041 pd_div_0/divider_0/nor_1/B pd_div_0/divider_0/and_0/B 0.31fF |
| C1042 pd_div_0/divider_0/tspc_1/Q pd_div_0/divider_0/nor_0/B 0.22fF |
| C1043 pd_div_0/divider_0/prescaler_0/tspc_1/Q pd_div_0/divider_0/prescaler_0/tspc_2/D 0.32fF |
| C1044 pd_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# pd_div_0/divider_0/clk 0.01fF |
| C1045 pll_full_0/pd_0/DOWN pll_full_0/pd_0/R 0.36fF |
| C1046 pll_full_0/pd_0/tspc_r_0/Z3 pll_full_0/pd_0/tspc_r_0/Z4 0.20fF |
| C1047 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/z5 0.04fF |
| C1048 pll_full_0/pd_0/tspc_r_0/Z1 pll_full_0/pd_0/tspc_r_0/Z2 0.71fF |
| C1049 ro_div_0/divider_0/tspc_0/Z4 ro_div_0/divider_0/tspc_0/Z1 0.00fF |
| C1050 ro_div_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_0/divider_0/prescaler_0/tspc_1/Z3 0.06fF |
| C1051 ro_div_0/divbuf_0/a_492_n240# ro_div_0/divbuf_0/IN 0.13fF |
| C1052 ro_complete_0/a3 ro_complete_0/cbank_0/switch_2/vin 0.09fF |
| C1053 gnd ro_div_0/divider_0/and_0/out1 0.29fF |
| C1054 ro_div_0/divider_0/tspc_2/a_630_n680# ro_div_0/divider_0/tspc_2/Z4 0.12fF |
| C1055 ro_div_0/divider_0/tspc_2/Z1 ro_div_0/divider_0/tspc_2/Z2 1.07fF |
| C1056 ro_div_0/divider_0/nor_0/B ro_div_0/divider_0/tspc_2/Z3 0.38fF |
| C1057 gnd pd_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# 0.63fF |
| C1058 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/and_0/OUT 0.05fF |
| C1059 pd_0/tspc_r_0/Qbar1 pd_0/tspc_r_0/Qbar 0.01fF |
| C1060 pd_0/tspc_r_0/Z3 pd_0/R 0.27fF |
| C1061 io_analog[6] io_clamp_low[2] 0.53fF |
| C1062 pd_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# pd_div_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF |
| C1063 pd_div_0/divider_0/prescaler_0/tspc_1/Z1 pd_div_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF |
| C1064 pd_div_0/divider_0/tspc_2/a_630_n680# pd_div_0/bufin 0.04fF |
| C1065 pd_div_0/divider_0/nor_0/B pd_div_0/divider_0/tspc_2/Z2 0.40fF |
| C1066 pll_full_0/pd_0/tspc_r_0/Z4 pll_full_0/pd_0/tspc_r_1/Z4 0.02fF |
| C1067 pll_full_0/pd_0/DOWN pll_full_0/pd_0/and_pd_0/Out1 0.12fF |
| C1068 pll_full_0/pd_0/REF pll_full_0/pd_0/tspc_r_1/Z1 0.17fF |
| C1069 pll_full_0/pd_0/tspc_r_1/Qbar1 pll_full_0/pd_0/UP 0.11fF |
| C1070 pll_full_0/divbuf_0/OUT4 pll_full_0/divbuf_0/OUT5 20.26fF |
| C1071 pll_full_0/ro_complete_0/cbank_0/switch_3/vin pll_full_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF |
| C1072 ro_complete_0/cbank_0/switch_3/vin ro_complete_0/cbank_0/switch_2/vin 0.20fF |
| C1073 ro_div_0/divider_0/tspc_1/Z1 ro_div_0/divider_0/tspc_1/Z4 0.00fF |
| C1074 ro_div_0/divider_0/tspc_1/a_630_n680# gnd 0.62fF |
| C1075 ro_div_0/divider_0/and_0/A ro_div_0/divider_0/and_0/B 0.18fF |
| C1076 divbuf_3/OUT5 divbuf_3/a_492_n240# 0.01fF |
| C1077 gnd pd_div_0/divider_0/prescaler_0/nand_1/z1 0.16fF |
| C1078 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/nor_0/B 0.00fF |
| C1079 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/clk 0.01fF |
| C1080 cp_0/a_1710_0# io_analog[1] 0.32fF |
| C1081 pd_0/tspc_r_1/Z3 pd_0/tspc_r_1/Qbar1 0.38fF |
| C1082 io_clamp_low[1] io_clamp_high[1] 0.53fF |
| C1083 divbuf_2/OUT2 divbuf_2/OUT3 1.37fF |
| C1084 pd_div_0/divider_0/nor_1/B pd_div_0/divider_0/tspc_1/Z4 0.21fF |
| C1085 pd_div_0/divider_0/tspc_1/Z2 pd_div_0/divider_0/tspc_1/Z3 0.16fF |
| C1086 pd_div_0/divider_0/tspc_0/a_630_n680# pd_div_0/divider_0/nor_1/A 0.35fF |
| C1087 pd_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# pd_div_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF |
| C1088 pd_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# pd_div_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF |
| C1089 pd_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# pd_div_0/divider_0/prescaler_0/tspc_1/Q 0.04fF |
| C1090 ro_div_0/divbuf_0/OUT3 ro_div_0/divbuf_0/OUT5 0.01fF |
| C1091 ro_div_0/divider_0/tspc_0/a_630_n680# ro_div_0/divider_0/tspc_0/Z3 0.05fF |
| C1092 ro_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# ro_div_0/divider_0/prescaler_0/tspc_0/Z4 0.08fF |
| C1093 ro_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_0/divider_0/prescaler_0/tspc_0/Z3 0.05fF |
| C1094 ro_div_0/ro_complete_0/cbank_2/switch_0/vin ro_div_0/ro_complete_0/cbank_2/v 1.44fF |
| C1095 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF |
| C1096 ro_div_0/divider_0/prescaler_0/tspc_0/D ro_div_0/divider_0/prescaler_0/nand_0/z1 0.24fF |
| C1097 ro_div_0/divider_0/prescaler_0/tspc_2/Z4 gnd 0.44fF |
| C1098 ro_div_0/divider_0/prescaler_0/tspc_1/Z2 ro_div_0/divider_0/prescaler_0/Out 0.19fF |
| C1099 pd_div_0/pd_0/R pd_div_0/pd_0/tspc_r_1/Z3 0.29fF |
| C1100 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF |
| C1101 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF |
| C1102 gnd pd_div_0/divider_0/and_0/Z1 0.41fF |
| C1103 pd_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# pd_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# 0.19fF |
| C1104 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/tspc_2/a_630_n680# 0.01fF |
| C1105 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/prescaler_0/Out 0.01fF |
| C1106 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_0/Q 0.19fF |
| C1107 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/clk 0.14fF |
| C1108 pd_0/tspc_r_1/Qbar pd_0/and_pd_0/Z1 0.02fF |
| C1109 divbuf_2/OUT2 divbuf_2/a_492_n240# 0.42fF |
| C1110 pd_div_0/divider_0/prescaler_0/tspc_2/Z4 pd_div_0/divider_0/prescaler_0/tspc_2/D 0.11fF |
| C1111 pd_div_0/divider_0/prescaler_0/tspc_1/Z1 pd_div_0/divider_0/prescaler_0/Out 0.08fF |
| C1112 ro_div_0/ro_complete_0/a2 ro_div_0/ro_complete_0/cbank_2/switch_2/vin 0.14fF |
| C1113 ro_div_0/ro_complete_0/cbank_0/switch_2/vin ro_div_0/ro_complete_0/cbank_0/v 1.30fF |
| C1114 gpio_analog[14] gpio_analog[15] 0.68fF |
| C1115 ro_div_0/divider_0/tspc_1/a_630_n680# ro_div_0/divider_0/tspc_0/Q 0.01fF |
| C1116 pll_full_0/ro_complete_0/cbank_2/switch_1/vin pll_full_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF |
| C1117 pll_full_0/ro_complete_0/cbank_2/switch_3/vin pll_full_0/ro_complete_0/cbank_2/v 1.30fF |
| C1118 ro_div_0/divider_0/and_0/OUT ro_div_0/divider_0/and_0/out1 0.31fF |
| C1119 ro_div_0/divider_0/prescaler_0/tspc_0/D ro_div_0/divider_0/clk 0.26fF |
| C1120 gnd ro_div_0/divider_0/nor_0/B 1.23fF |
| C1121 gnd pd_div_0/divider_0/tspc_0/Z4 0.44fF |
| C1122 pd_div_0/pd_0/REF pd_div_0/pd_0/tspc_r_1/Z4 0.02fF |
| C1123 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.08fF |
| C1124 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z3 0.05fF |
| C1125 pd_div_0/divider_0/tspc_0/Z3 pd_div_0/divider_0/tspc_0/a_630_n680# 0.05fF |
| C1126 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divider_0/tspc_2/Z2 0.01fF |
| C1127 pll_full_0/divider_0/prescaler_0/tspc_2/D pll_full_0/divider_0/clk 0.29fF |
| C1128 gpio_analog[13] ro_complete_0/cbank_0/switch_3/vin 0.14fF |
| C1129 gpio_noesd[15] gpio_analog[17] 5.80fF |
| C1130 pll_full_0/pd_0/R pll_full_0/pd_0/tspc_r_1/Z3 0.29fF |
| C1131 ro_div_0/divider_0/tspc_0/Z4 ro_div_0/divider_0/tspc_0/Z2 0.36fF |
| C1132 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/nor_1/A 0.15fF |
| C1133 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z3 0.38fF |
| C1134 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF |
| C1135 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.33fF |
| C1136 pll_full_0/divider_0/prescaler_0/m1_2700_2190# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.38fF |
| C1137 divbuf_5/a_492_n240# divbuf_5/OUT2 0.42fF |
| C1138 pd_div_0/divider_0/nor_1/B pd_div_0/divider_0/tspc_0/a_630_n680# 0.01fF |
| C1139 pd_div_0/divider_0/mc2 pd_div_0/divider_0/and_0/out1 0.06fF |
| C1140 pd_div_0/divider_0/tspc_0/Q pd_div_0/divider_0/nor_1/A 0.55fF |
| C1141 pd_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# pd_div_0/divider_0/prescaler_0/tspc_0/Q 0.04fF |
| C1142 pll_full_0/divider_0/and_0/out1 pll_full_0/divider_0/and_0/A 0.01fF |
| C1143 ro_div_0/divbuf_0/OUT ro_div_0/divbuf_0/OUT4 1.11fF |
| C1144 divbuf_5/OUT2 divbuf_5/OUT3 1.37fF |
| C1145 ro_div_0/divider_0/nor_1/Z1 ro_div_0/divider_0/nor_1/B 0.06fF |
| C1146 pll_full_0/divbuf_1/a_492_n240# pll_full_0/divbuf_1/OUT2 0.42fF |
| C1147 pll_full_0/ro_complete_0/cbank_1/switch_3/vin pll_full_0/ro_complete_0/cbank_1/switch_4/vin 0.20fF |
| C1148 pd_div_0/pd_0/tspc_r_0/Z3 pd_div_0/pd_0/tspc_r_0/Z4 0.20fF |
| C1149 pd_div_0/pd_0/DOWN pd_div_0/pd_0/UP 0.49fF |
| C1150 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 pll_full_0/divider_0/prescaler_0/tspc_2/D 0.05fF |
| C1151 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/clk 0.01fF |
| C1152 divbuf_5/a_492_n240# io_analog[5] 0.00fF |
| C1153 pd_div_0/divider_0/tspc_1/Z3 pd_div_0/divider_0/tspc_1/Z4 0.65fF |
| C1154 pd_div_0/divider_0/prescaler_0/tspc_0/Z2 pd_div_0/divider_0/clk 0.11fF |
| C1155 pd_0/tspc_r_1/Z2 pd_0/tspc_r_1/Z4 0.14fF |
| C1156 divbuf_5/OUT4 divbuf_5/OUT5 20.26fF |
| C1157 divbuf_5/OUT3 io_analog[5] 0.26fF |
| C1158 ro_div_0/ro_complete_0/cbank_2/switch_5/vin ro_div_0/ro_complete_0/cbank_2/v 1.30fF |
| C1159 ro_div_0/divider_0/tspc_1/Q ro_div_0/divider_0/tspc_2/Z3 0.45fF |
| C1160 ro_div_0/divider_0/prescaler_0/tspc_0/Q gnd 0.35fF |
| C1161 ro_div_0/divider_0/nor_1/A ro_div_0/divider_0/and_0/A 0.01fF |
| C1162 pll_full_0/ro_complete_0/cbank_1/switch_1/vin pll_full_0/divider_0/clk 1.46fF |
| C1163 gnd pd_div_0/divider_0/prescaler_0/tspc_0/Z2 0.16fF |
| C1164 pd_div_0/pd_0/REF pd_div_0/pd_0/tspc_r_1/Qbar1 0.12fF |
| C1165 pd_div_0/divider_0/tspc_0/Z2 pd_div_0/divider_0/tspc_0/Z4 0.36fF |
| C1166 pd_div_0/divider_0/tspc_0/Z3 pd_div_0/divider_0/tspc_0/Q 0.05fF |
| C1167 pd_div_0/divider_0/prescaler_0/tspc_0/Z2 pd_div_0/divider_0/prescaler_0/tspc_0/Z4 0.36fF |
| C1168 ashish_0/a_150_n710# io_analog[7] 4.33fF |
| C1169 ashish_0/a_150_0# io_analog[6] 4.44fF |
| C1170 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/and_0/B 0.08fF |
| C1171 pd_div_0/divider_0/tspc_1/Q pd_div_0/divider_0/tspc_2/Z2 0.14fF |
| C1172 pd_div_0/divider_0/prescaler_0/tspc_1/Q pd_div_0/divider_0/prescaler_0/nand_1/z1 0.22fF |
| C1173 pd_div_0/divider_0/prescaler_0/tspc_0/Q pd_div_0/divider_0/prescaler_0/tspc_2/D 0.04fF |
| C1174 pll_full_0/pd_0/tspc_r_0/Qbar1 pll_full_0/pd_0/tspc_r_0/z5 0.20fF |
| C1175 ro_complete_0/a4 divbuf_5/IN 0.05fF |
| C1176 ro_div_0/divider_0/prescaler_0/m1_2700_2190# ro_div_0/divider_0/nor_1/A 0.01fF |
| C1177 ro_div_0/divider_0/tspc_0/Q ro_div_0/divider_0/tspc_1/Z1 0.01fF |
| C1178 ro_div_0/divider_0/prescaler_0/tspc_1/Z1 ro_div_0/divider_0/prescaler_0/tspc_1/Z4 0.00fF |
| C1179 io_analog[5] io_clamp_low[1] 0.53fF |
| C1180 ro_complete_0/cbank_0/v ro_complete_0/cbank_0/switch_0/vin 1.30fF |
| C1181 ro_div_0/divider_0/nor_0/B ro_div_0/divider_0/tspc_2/Z4 0.22fF |
| C1182 ro_div_0/divider_0/tspc_2/Z2 ro_div_0/divider_0/tspc_2/Z3 0.16fF |
| C1183 gnd ro_div_0/divider_0/and_0/A 0.69fF |
| C1184 pll_full_0/divider_0/tspc_1/a_630_n680# pll_full_0/divider_0/tspc_1/Q 0.04fF |
| C1185 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z2 0.30fF |
| C1186 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# 0.01fF |
| C1187 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/D 0.09fF |
| C1188 pd_div_0/pd_0/UP pd_div_0/pd_0/and_pd_0/Z1 0.06fF |
| C1189 pd_div_0/divider_0/tspc_0/Q pd_div_0/divider_0/nor_1/B 0.22fF |
| C1190 pd_div_0/divider_0/prescaler_0/tspc_1/Z2 pd_div_0/divider_0/prescaler_0/tspc_1/Z3 0.16fF |
| C1191 pd_div_0/divider_0/mc2 pd_div_0/divider_0/nor_0/B 0.15fF |
| C1192 pd_0/DOWN pd_0/R 0.38fF |
| C1193 pd_0/tspc_r_0/Z3 pd_0/tspc_r_0/Z4 0.20fF |
| C1194 pd_0/DIV pd_0/tspc_r_0/z5 0.04fF |
| C1195 pd_0/tspc_r_0/Z1 pd_0/tspc_r_0/Z2 0.71fF |
| C1196 pd_div_0/divider_0/nor_0/B pd_div_0/bufin 0.29fF |
| C1197 pd_div_0/divider_0/tspc_2/Z1 pd_div_0/divider_0/tspc_2/Z3 0.06fF |
| C1198 pll_full_0/pd_0/tspc_r_0/z5 pll_full_0/pd_0/tspc_r_1/z5 0.02fF |
| C1199 pll_full_0/pd_0/tspc_r_1/Z3 pll_full_0/pd_0/tspc_r_1/Z2 0.25fF |
| C1200 ro_div_0/divider_0/prescaler_0/tspc_2/Z1 ro_div_0/divider_0/prescaler_0/tspc_2/Z3 0.06fF |
| C1201 ro_div_0/divider_0/prescaler_0/m1_2700_2190# gnd 0.22fF |
| C1202 pll_full_0/divbuf_0/OUT3 pll_full_0/divbuf_0/OUT2 1.37fF |
| C1203 pd_div_0/pd_0/DOWN pd_div_0/pd_0/tspc_r_0/z5 0.03fF |
| C1204 pll_full_0/divider_0/nor_1/A pll_full_0/divider_0/tspc_1/Z4 0.02fF |
| C1205 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.15fF |
| C1206 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 pll_full_0/divider_0/and_0/OUT 0.06fF |
| C1207 divbuf_3/a_492_n240# divbuf_3/OUT2 0.42fF |
| C1208 pd_div_0/divider_0/tspc_1/Z2 pd_div_0/divider_0/tspc_1/Z4 0.36fF |
| C1209 pd_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# pd_div_0/divider_0/prescaler_0/tspc_2/Z4 0.12fF |
| C1210 pd_div_0/divider_0/prescaler_0/tspc_2/Z1 pd_div_0/divider_0/prescaler_0/tspc_2/Z2 1.07fF |
| C1211 pd_0/tspc_r_0/Z4 pd_0/tspc_r_1/Z4 0.02fF |
| C1212 pd_0/DOWN pd_0/and_pd_0/Out1 0.12fF |
| C1213 pd_0/tspc_r_1/Qbar1 pd_0/UP 0.11fF |
| C1214 pd_div_0/divider_0/and_0/out1 pd_div_0/divider_0/and_0/Z1 0.36fF |
| C1215 ro_div_0/divbuf_0/OUT4 ro_div_0/divbuf_0/OUT5 20.26fF |
| C1216 ro_div_0/ro_complete_0/cbank_0/switch_3/vin ro_div_0/ro_complete_0/cbank_0/switch_2/vin 0.20fF |
| C1217 ro_complete_0/a4 ro_complete_0/cbank_1/switch_1/vin 0.09fF |
| C1218 ro_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# ro_div_0/divider_0/prescaler_0/tspc_0/Z4 0.12fF |
| C1219 ro_div_0/divider_0/prescaler_0/tspc_0/Z1 ro_div_0/divider_0/prescaler_0/tspc_0/Z2 1.07fF |
| C1220 gpio_analog[14] ro_complete_0/a2 0.56fF |
| C1221 ro_div_0/divider_0/tspc_1/Q gnd 0.33fF |
| C1222 ro_div_0/divider_0/and_0/OUT ro_div_0/divider_0/prescaler_0/tspc_0/Q 0.04fF |
| C1223 ro_div_0/divider_0/prescaler_0/tspc_1/Z3 ro_div_0/divider_0/clk 0.45fF |
| C1224 pll_full_0/ro_complete_0/a5 pll_full_0/ro_complete_0/cbank_1/switch_0/vin 0.09fF |
| C1225 pll_full_0/ro_complete_0/cbank_0/switch_4/vin pll_full_0/ro_complete_0/cbank_0/v 1.30fF |
| C1226 pll_full_0/divider_0/tspc_0/Z3 pll_full_0/divider_0/tspc_0/Z4 0.65fF |
| C1227 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 0.16fF |
| C1228 gnd pd_div_0/divider_0/nor_1/Z1 0.01fF |
| C1229 pd_div_0/pd_0/R pd_div_0/pd_0/UP 0.45fF |
| C1230 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/and_0/B 0.31fF |
| C1231 pll_full_0/divider_0/tspc_1/Q pll_full_0/divider_0/nor_0/B 0.22fF |
| C1232 pll_full_0/divider_0/prescaler_0/tspc_1/Q pll_full_0/divider_0/prescaler_0/tspc_2/D 0.32fF |
| C1233 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/clk 0.01fF |
| C1234 pd_div_0/divider_0/nor_1/B pd_div_0/divider_0/tspc_2/Z4 0.02fF |
| C1235 pd_div_0/divider_0/prescaler_0/tspc_1/Z3 pd_div_0/divider_0/prescaler_0/Out 0.11fF |
| C1236 pd_div_0/divider_0/prescaler_0/tspc_1/Z2 pd_div_0/divider_0/clk 0.11fF |
| C1237 pll_full_0/pd_0/DIV pll_full_0/pd_0/tspc_r_0/Qbar1 0.12fF |
| C1238 pd_div_0/divbuf_0/OUT2 pd_div_0/div 0.06fF |
| C1239 pd_0/DOWN divbuf_0/a_492_n240# 0.13fF |
| C1240 ro_div_0/ro_complete_0/cbank_0/switch_4/vin ro_div_0/ro_complete_0/cbank_0/switch_5/vin 0.20fF |
| C1241 pd_div_0/divbuf_0/OUT2 pd_div_0/divbuf_0/OUT5 0.02fF |
| C1242 pd_div_0/div pd_div_0/pd_0/tspc_r_0/Qbar1 0.12fF |
| C1243 pd_div_0/div pd_div_0/divbuf_0/OUT4 1.11fF |
| C1244 divbuf_0/a_492_n240# divbuf_0/OUT2 0.42fF |
| C1245 gnd ro_div_0/divider_0/tspc_2/Z2 0.16fF |
| C1246 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Z4 0.12fF |
| C1247 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 1.07fF |
| C1248 pll_full_0/ro_complete_0/cbank_1/switch_4/vin pll_full_0/divider_0/clk 1.46fF |
| C1249 gnd pd_div_0/divider_0/prescaler_0/tspc_1/Z2 0.17fF |
| C1250 pd_div_0/divbuf_0/OUT5 pd_div_0/divbuf_0/OUT4 20.26fF |
| C1251 pd_div_0/pd_0/tspc_r_1/Z3 pd_div_0/pd_0/tspc_r_1/z5 0.11fF |
| C1252 pll_full_0/divider_0/tspc_2/a_630_n680# pll_full_0/divbuf_0/IN 0.04fF |
| C1253 pll_full_0/divider_0/nor_0/B pll_full_0/divider_0/tspc_2/Z2 0.40fF |
| C1254 pd_div_0/divider_0/prescaler_0/m1_2700_2190# pd_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# 0.19fF |
| C1255 pll_full_0/pd_0/R pll_full_0/pd_0/UP 0.46fF |
| C1256 ro_div_0/ro_complete_0/cbank_2/switch_1/vin ro_div_0/ro_complete_0/cbank_2/switch_0/vin 0.19fF |
| C1257 ro_div_0/ro_complete_0/cbank_2/switch_3/vin ro_div_0/ro_complete_0/cbank_2/v 1.30fF |
| C1258 ro_div_0/divider_0/prescaler_0/m1_2700_2190# ro_div_0/divider_0/and_0/OUT 0.14fF |
| C1259 pll_full_0/ro_complete_0/a2 pll_full_0/ro_complete_0/cbank_1/switch_3/vin 0.09fF |
| C1260 ro_complete_0/a3 ro_complete_0/cbank_2/switch_2/vin 0.09fF |
| C1261 pll_full_0/divider_0/nor_1/B pll_full_0/divider_0/tspc_1/Z4 0.21fF |
| C1262 pll_full_0/divider_0/tspc_1/Z2 pll_full_0/divider_0/tspc_1/Z3 0.16fF |
| C1263 pll_full_0/divider_0/tspc_0/a_630_n680# pll_full_0/divider_0/nor_1/A 0.35fF |
| C1264 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z4 0.08fF |
| C1265 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_2/Z3 0.05fF |
| C1266 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# pll_full_0/divider_0/prescaler_0/tspc_1/Q 0.04fF |
| C1267 pd_0/R pd_0/tspc_r_1/Z3 0.29fF |
| C1268 pd_div_0/divider_0/mc2 pd_div_0/divider_0/and_0/A 0.16fF |
| C1269 pd_div_0/divider_0/tspc_0/Q pd_div_0/divider_0/tspc_1/Z3 0.45fF |
| C1270 divbuf_5/OUT2 divbuf_5/OUT5 0.02fF |
| C1271 pd_div_0/divider_0/prescaler_0/Out pd_div_0/divider_0/clk 0.51fF |
| C1272 ro_div_0/divbuf_0/OUT ro_div_0/divbuf_0/OUT5 43.38fF |
| C1273 pll_full_0/pd_0/UP pll_full_0/pd_0/and_pd_0/Out1 0.33fF |
| C1274 io_clamp_high[0] io_analog[4] 0.53fF |
| C1275 pd_div_0/pd_0/tspc_r_0/Z3 pd_div_0/pd_0/tspc_r_0/z5 0.11fF |
| C1276 ro_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# gnd 0.22fF |
| C1277 ro_div_0/ro_complete_0/cbank_2/v ro_div_0/divider_0/clk 1.36fF |
| C1278 pll_full_0/divbuf_0/OUT5 pll_full_0/divbuf_0/a_492_n240# 0.01fF |
| Xashish_0 io_analog[7] io_analog[6] ashish_0/Gnd ashish |
| Xpd_0 gpio_analog[12] gpio_analog[12] gpio_analog[12] pd_0/DIV pd_0/UP pd_0/DOWN pd_0/R |
| + pd |
| Xcp_0 vdda1 vdda1 gpio_analog[12] io_analog[0] io_analog[1] cp_0/upbar cp |
| Xfilter_0 gpio_analog[12] gpio_noesd[15] filter |
| Xro_div_0/ro_complete_0 ro_div_0/ro_complete_0/a0 ro_div_0/ro_complete_0/a1 ro_div_0/ro_complete_0/a5 |
| + ro_div_0/ro_complete_0/a4 ro_div_0/ro_complete_0/a3 ro_div_0/ro_complete_0/a2 ro_complete |
| Xro_div_0/divbuf_0 VDD ro_div_0/divbuf_0/IN ro_div_0/divbuf_0/OUT ro_div_0/divbuf_0/OUT2 |
| + ro_div_0/divbuf_0/OUT3 ro_div_0/divbuf_0/OUT4 ro_div_0/divbuf_0/OUT5 gpio_analog[12] |
| + divbuf |
| Xro_div_0/divider_0 gnd vdd ro_div_0/divbuf_0/IN ro_div_0/divider_0/clk gnd divider |
| Xro_complete_0 gpio_analog[12] gpio_analog[13] gpio_analog[14] ro_complete_0/a4 ro_complete_0/a3 |
| + ro_complete_0/a2 ro_complete |
| Xdivbuf_0 gpio_analog[12] pd_0/DOWN gpio_analog[12] divbuf_0/OUT2 divbuf_0/OUT3 divbuf_0/OUT4 |
| + divbuf_0/OUT5 gpio_analog[12] divbuf |
| Xpd_div_0 pd_div_0/div pd_div_0/bufin pd_div |
| Xdivbuf_1 gpio_analog[12] pd_0/UP gpio_analog[12] divbuf_1/OUT2 divbuf_1/OUT3 divbuf_1/OUT4 |
| + divbuf_1/OUT5 gpio_analog[12] divbuf |
| Xdivbuf_2 gpio_analog[12] divbuf_2/IN pd_0/DIV divbuf_2/OUT2 divbuf_2/OUT3 divbuf_2/OUT4 |
| + divbuf_2/OUT5 gpio_analog[12] divbuf |
| Xdivbuf_3 gpio_analog[12] gpio_analog[12] gpio_analog[12] divbuf_3/OUT2 divbuf_3/OUT3 |
| + divbuf_3/OUT4 divbuf_3/OUT5 gpio_analog[12] divbuf |
| Xdivbuf_4 vdda1 divbuf_4/IN divbuf_4/OUT divbuf_4/OUT2 divbuf_4/OUT3 divbuf_4/OUT4 |
| + divbuf_4/OUT5 gpio_analog[12] divbuf |
| Xdivbuf_5 VDD divbuf_5/IN io_analog[5] divbuf_5/OUT2 divbuf_5/OUT3 divbuf_5/OUT4 divbuf_5/OUT5 |
| + gpio_analog[12] divbuf |
| Xpll_full_0 vdda1 pll_full |
| C1279 io_analog[4] vdda1 43.84fF |
| C1280 io_in_3v3[0] vdda1 0.61fF |
| C1281 io_oeb[26] vdda1 0.61fF |
| C1282 io_in[0] vdda1 0.61fF |
| C1283 io_out[26] vdda1 0.61fF |
| C1284 io_out[0] vdda1 0.61fF |
| C1285 io_in[26] vdda1 0.61fF |
| C1286 io_oeb[0] vdda1 0.61fF |
| C1287 io_in_3v3[26] vdda1 0.61fF |
| C1288 io_in_3v3[1] vdda1 0.61fF |
| C1289 io_oeb[25] vdda1 0.61fF |
| C1290 io_in[1] vdda1 0.61fF |
| C1291 io_out[25] vdda1 0.61fF |
| C1292 io_out[1] vdda1 0.61fF |
| C1293 io_in[25] vdda1 0.61fF |
| C1294 io_oeb[1] vdda1 0.61fF |
| C1295 io_in_3v3[25] vdda1 0.61fF |
| C1296 io_in_3v3[2] vdda1 0.61fF |
| C1297 io_oeb[24] vdda1 0.61fF |
| C1298 io_in[2] vdda1 0.61fF |
| C1299 io_out[24] vdda1 0.61fF |
| C1300 io_out[2] vdda1 0.61fF |
| C1301 io_in[24] vdda1 0.61fF |
| C1302 io_oeb[2] vdda1 0.61fF |
| C1303 io_in_3v3[24] vdda1 0.61fF |
| C1304 io_in_3v3[3] vdda1 0.61fF |
| C1305 gpio_noesd[17] vdda1 0.61fF |
| C1306 io_in[3] vdda1 0.61fF |
| C1307 io_out[3] vdda1 0.61fF |
| C1308 io_oeb[3] vdda1 0.61fF |
| C1309 io_in_3v3[4] vdda1 0.61fF |
| C1310 io_in[4] vdda1 0.61fF |
| C1311 io_out[4] vdda1 0.61fF |
| C1312 io_oeb[4] vdda1 0.61fF |
| C1313 io_in_3v3[5] vdda1 0.61fF |
| C1314 io_in[5] vdda1 0.61fF |
| C1315 io_out[5] vdda1 0.61fF |
| C1316 io_oeb[5] vdda1 0.61fF |
| C1317 io_in_3v3[6] vdda1 0.61fF |
| C1318 io_in[6] vdda1 0.61fF |
| C1319 io_out[6] vdda1 0.61fF |
| C1320 io_oeb[6] vdda1 0.61fF |
| C1321 vssd1 vdda1 604.65fF |
| C1322 gpio_analog[17] vdda1 187.27fF |
| C1323 io_oeb[23] vdda1 0.61fF |
| C1324 io_out[23] vdda1 0.61fF |
| C1325 io_in[23] vdda1 0.61fF |
| C1326 io_in_3v3[23] vdda1 0.61fF |
| C1327 gpio_noesd[16] vdda1 0.61fF |
| C1328 gpio_analog[16] vdda1 177.29fF |
| C1329 io_oeb[22] vdda1 0.61fF |
| C1330 io_out[22] vdda1 0.61fF |
| C1331 io_in[22] vdda1 0.61fF |
| C1332 io_in_3v3[22] vdda1 0.61fF |
| C1333 io_oeb[21] vdda1 0.61fF |
| C1334 io_out[21] vdda1 0.61fF |
| C1335 io_in[21] vdda1 0.61fF |
| C1336 gpio_analog[15] vdda1 145.89fF |
| C1337 io_in_3v3[21] vdda1 0.61fF |
| C1338 gpio_noesd[14] vdda1 0.61fF |
| C1339 vssd2 vdda1 13.04fF |
| C1340 vdda2 vdda1 13.04fF |
| C1341 gpio_analog[0] vdda1 0.61fF |
| C1342 gpio_noesd[0] vdda1 0.61fF |
| C1343 io_in_3v3[7] vdda1 0.61fF |
| C1344 io_in[7] vdda1 0.61fF |
| C1345 io_out[7] vdda1 0.61fF |
| C1346 io_oeb[7] vdda1 0.61fF |
| C1347 gpio_analog[1] vdda1 0.61fF |
| C1348 gpio_noesd[1] vdda1 0.61fF |
| C1349 io_in_3v3[8] vdda1 0.61fF |
| C1350 io_oeb[20] vdda1 0.61fF |
| C1351 io_out[20] vdda1 0.61fF |
| C1352 io_in[20] vdda1 0.61fF |
| C1353 io_in_3v3[20] vdda1 0.61fF |
| C1354 gpio_noesd[13] vdda1 0.61fF |
| C1355 io_oeb[19] vdda1 0.61fF |
| C1356 io_out[19] vdda1 0.61fF |
| C1357 io_in[19] vdda1 0.61fF |
| C1358 io_in_3v3[19] vdda1 0.61fF |
| C1359 gpio_noesd[12] vdda1 0.61fF |
| C1360 io_in[8] vdda1 0.61fF |
| C1361 io_out[8] vdda1 0.61fF |
| C1362 io_oeb[8] vdda1 0.61fF |
| C1363 gpio_analog[2] vdda1 0.61fF |
| C1364 gpio_noesd[2] vdda1 0.61fF |
| C1365 io_in_3v3[9] vdda1 0.61fF |
| C1366 io_in[9] vdda1 0.61fF |
| C1367 io_out[9] vdda1 0.61fF |
| C1368 io_oeb[9] vdda1 0.61fF |
| C1369 io_oeb[18] vdda1 0.61fF |
| C1370 io_out[18] vdda1 0.61fF |
| C1371 io_in[18] vdda1 0.61fF |
| C1372 io_in_3v3[18] vdda1 0.61fF |
| C1373 gpio_noesd[11] vdda1 0.61fF |
| C1374 gpio_analog[11] vdda1 0.61fF |
| C1375 io_oeb[17] vdda1 0.61fF |
| C1376 io_out[17] vdda1 0.61fF |
| C1377 io_in[17] vdda1 0.61fF |
| C1378 io_in_3v3[17] vdda1 0.61fF |
| C1379 gpio_noesd[10] vdda1 0.61fF |
| C1380 gpio_analog[10] vdda1 0.61fF |
| C1381 gpio_analog[3] vdda1 0.61fF |
| C1382 gpio_noesd[3] vdda1 0.61fF |
| C1383 io_in_3v3[10] vdda1 0.61fF |
| C1384 io_in[10] vdda1 0.61fF |
| C1385 io_out[10] vdda1 0.61fF |
| C1386 io_oeb[10] vdda1 0.61fF |
| C1387 io_oeb[16] vdda1 0.61fF |
| C1388 gpio_analog[4] vdda1 0.61fF |
| C1389 gpio_noesd[4] vdda1 0.61fF |
| C1390 io_in_3v3[11] vdda1 0.61fF |
| C1391 io_in[11] vdda1 0.61fF |
| C1392 io_out[11] vdda1 0.61fF |
| C1393 io_oeb[11] vdda1 0.61fF |
| C1394 io_out[16] vdda1 0.61fF |
| C1395 io_in[16] vdda1 0.61fF |
| C1396 io_in_3v3[16] vdda1 0.61fF |
| C1397 gpio_noesd[9] vdda1 0.61fF |
| C1398 gpio_analog[9] vdda1 0.61fF |
| C1399 io_oeb[15] vdda1 0.61fF |
| C1400 io_out[15] vdda1 0.61fF |
| C1401 io_in[15] vdda1 0.61fF |
| C1402 io_in_3v3[15] vdda1 0.61fF |
| C1403 gpio_noesd[8] vdda1 0.61fF |
| C1404 gpio_analog[8] vdda1 0.61fF |
| C1405 gpio_analog[5] vdda1 0.61fF |
| C1406 gpio_noesd[5] vdda1 0.61fF |
| C1407 io_in_3v3[12] vdda1 0.61fF |
| C1408 io_in[12] vdda1 0.61fF |
| C1409 io_out[12] vdda1 0.61fF |
| C1410 io_oeb[12] vdda1 0.61fF |
| C1411 io_oeb[14] vdda1 0.61fF |
| C1412 io_out[14] vdda1 0.61fF |
| C1413 io_in[14] vdda1 0.61fF |
| C1414 io_in_3v3[14] vdda1 0.61fF |
| C1415 gpio_noesd[7] vdda1 0.61fF |
| C1416 vssa2 vdda1 13.04fF |
| C1417 gpio_analog[6] vdda1 0.61fF |
| C1418 gpio_noesd[6] vdda1 0.61fF |
| C1419 io_in_3v3[13] vdda1 0.61fF |
| C1420 io_in[13] vdda1 0.61fF |
| C1421 io_out[13] vdda1 0.61fF |
| C1422 io_oeb[13] vdda1 0.61fF |
| C1423 vccd1 vdda1 13.04fF |
| C1424 vccd2 vdda1 13.04fF |
| C1425 io_analog[10] vdda1 9.60fF |
| C1426 io_analog[3] vdda1 6.86fF |
| C1427 io_clamp_high[0] vdda1 3.58fF |
| C1428 io_clamp_low[0] vdda1 3.58fF |
| C1429 io_clamp_high[1] vdda1 3.58fF |
| C1430 io_clamp_low[1] vdda1 3.58fF |
| C1431 io_clamp_high[2] vdda1 3.58fF |
| C1432 io_clamp_low[2] vdda1 3.58fF |
| C1433 io_analog[8] vdda1 6.83fF |
| C1434 io_analog[9] vdda1 25.11fF |
| C1435 user_irq[2] vdda1 0.63fF |
| C1436 user_irq[1] vdda1 0.63fF |
| C1437 user_irq[0] vdda1 0.63fF |
| C1438 user_clock2 vdda1 0.63fF |
| C1439 la_oenb[127] vdda1 0.63fF |
| C1440 la_data_out[127] vdda1 0.63fF |
| C1441 la_data_in[127] vdda1 0.63fF |
| C1442 la_oenb[126] vdda1 0.63fF |
| C1443 la_data_out[126] vdda1 0.63fF |
| C1444 la_data_in[126] vdda1 0.63fF |
| C1445 la_oenb[125] vdda1 0.63fF |
| C1446 la_data_out[125] vdda1 0.63fF |
| C1447 la_data_in[125] vdda1 0.63fF |
| C1448 la_oenb[124] vdda1 0.63fF |
| C1449 la_data_out[124] vdda1 0.63fF |
| C1450 la_data_in[124] vdda1 0.63fF |
| C1451 la_oenb[123] vdda1 0.63fF |
| C1452 la_data_out[123] vdda1 0.63fF |
| C1453 la_data_in[123] vdda1 0.63fF |
| C1454 la_oenb[122] vdda1 0.63fF |
| C1455 la_data_out[122] vdda1 0.63fF |
| C1456 la_data_in[122] vdda1 0.63fF |
| C1457 la_oenb[121] vdda1 0.63fF |
| C1458 la_data_out[121] vdda1 0.63fF |
| C1459 la_data_in[121] vdda1 0.63fF |
| C1460 la_oenb[120] vdda1 0.63fF |
| C1461 la_data_out[120] vdda1 0.63fF |
| C1462 la_data_in[120] vdda1 0.63fF |
| C1463 la_oenb[119] vdda1 0.63fF |
| C1464 la_data_out[119] vdda1 0.63fF |
| C1465 la_data_in[119] vdda1 0.63fF |
| C1466 la_oenb[118] vdda1 0.63fF |
| C1467 la_data_out[118] vdda1 0.63fF |
| C1468 la_data_in[118] vdda1 0.63fF |
| C1469 la_oenb[117] vdda1 0.63fF |
| C1470 la_data_out[117] vdda1 0.63fF |
| C1471 la_data_in[117] vdda1 0.63fF |
| C1472 la_oenb[116] vdda1 0.63fF |
| C1473 la_data_out[116] vdda1 0.63fF |
| C1474 la_data_in[116] vdda1 0.63fF |
| C1475 la_oenb[115] vdda1 0.63fF |
| C1476 la_data_out[115] vdda1 0.63fF |
| C1477 la_data_in[115] vdda1 0.63fF |
| C1478 la_oenb[114] vdda1 0.63fF |
| C1479 la_data_out[114] vdda1 0.63fF |
| C1480 la_data_in[114] vdda1 0.63fF |
| C1481 la_oenb[113] vdda1 0.63fF |
| C1482 la_data_out[113] vdda1 0.63fF |
| C1483 la_data_in[113] vdda1 0.63fF |
| C1484 la_oenb[112] vdda1 0.63fF |
| C1485 la_data_out[112] vdda1 0.63fF |
| C1486 la_data_in[112] vdda1 0.63fF |
| C1487 la_oenb[111] vdda1 0.63fF |
| C1488 la_data_out[111] vdda1 0.63fF |
| C1489 la_data_in[111] vdda1 0.63fF |
| C1490 la_oenb[110] vdda1 0.63fF |
| C1491 la_data_out[110] vdda1 0.63fF |
| C1492 la_data_in[110] vdda1 0.63fF |
| C1493 la_oenb[109] vdda1 0.63fF |
| C1494 la_data_out[109] vdda1 0.63fF |
| C1495 la_data_in[109] vdda1 0.63fF |
| C1496 la_oenb[108] vdda1 0.63fF |
| C1497 la_data_out[108] vdda1 0.63fF |
| C1498 la_data_in[108] vdda1 0.63fF |
| C1499 la_oenb[107] vdda1 0.63fF |
| C1500 la_data_out[107] vdda1 0.63fF |
| C1501 la_data_in[107] vdda1 0.63fF |
| C1502 la_oenb[106] vdda1 0.63fF |
| C1503 la_data_out[106] vdda1 0.63fF |
| C1504 la_data_in[106] vdda1 0.63fF |
| C1505 la_oenb[105] vdda1 0.63fF |
| C1506 la_data_out[105] vdda1 0.63fF |
| C1507 la_data_in[105] vdda1 0.63fF |
| C1508 la_oenb[104] vdda1 0.63fF |
| C1509 la_data_out[104] vdda1 0.63fF |
| C1510 la_data_in[104] vdda1 0.63fF |
| C1511 la_oenb[103] vdda1 0.63fF |
| C1512 la_data_out[103] vdda1 0.63fF |
| C1513 la_data_in[103] vdda1 0.63fF |
| C1514 la_oenb[102] vdda1 0.63fF |
| C1515 la_data_out[102] vdda1 0.63fF |
| C1516 la_data_in[102] vdda1 0.63fF |
| C1517 la_oenb[101] vdda1 0.63fF |
| C1518 la_data_out[101] vdda1 0.63fF |
| C1519 la_data_in[101] vdda1 0.63fF |
| C1520 la_oenb[100] vdda1 0.63fF |
| C1521 la_data_out[100] vdda1 0.63fF |
| C1522 la_data_in[100] vdda1 0.63fF |
| C1523 la_oenb[99] vdda1 0.63fF |
| C1524 la_data_out[99] vdda1 0.63fF |
| C1525 la_data_in[99] vdda1 0.63fF |
| C1526 la_oenb[98] vdda1 0.63fF |
| C1527 la_data_out[98] vdda1 0.63fF |
| C1528 la_data_in[98] vdda1 0.63fF |
| C1529 la_oenb[97] vdda1 0.63fF |
| C1530 la_data_out[97] vdda1 0.63fF |
| C1531 la_data_in[97] vdda1 0.63fF |
| C1532 la_oenb[96] vdda1 0.63fF |
| C1533 la_data_out[96] vdda1 0.63fF |
| C1534 la_data_in[96] vdda1 0.63fF |
| C1535 la_oenb[95] vdda1 0.63fF |
| C1536 la_data_out[95] vdda1 0.63fF |
| C1537 la_data_in[95] vdda1 0.63fF |
| C1538 la_oenb[94] vdda1 0.63fF |
| C1539 la_data_out[94] vdda1 0.63fF |
| C1540 la_data_in[94] vdda1 0.63fF |
| C1541 la_oenb[93] vdda1 0.63fF |
| C1542 la_data_out[93] vdda1 0.63fF |
| C1543 la_data_in[93] vdda1 0.63fF |
| C1544 la_oenb[92] vdda1 0.63fF |
| C1545 la_data_out[92] vdda1 0.63fF |
| C1546 la_data_in[92] vdda1 0.63fF |
| C1547 la_oenb[91] vdda1 0.63fF |
| C1548 la_data_out[91] vdda1 0.63fF |
| C1549 la_data_in[91] vdda1 0.63fF |
| C1550 la_oenb[90] vdda1 0.63fF |
| C1551 la_data_out[90] vdda1 0.63fF |
| C1552 la_data_in[90] vdda1 0.63fF |
| C1553 la_oenb[89] vdda1 0.63fF |
| C1554 la_data_out[89] vdda1 0.63fF |
| C1555 la_data_in[89] vdda1 0.63fF |
| C1556 la_oenb[88] vdda1 0.63fF |
| C1557 la_data_out[88] vdda1 0.63fF |
| C1558 la_data_in[88] vdda1 0.63fF |
| C1559 la_oenb[87] vdda1 0.63fF |
| C1560 la_data_out[87] vdda1 0.63fF |
| C1561 la_data_in[87] vdda1 0.63fF |
| C1562 la_oenb[86] vdda1 0.63fF |
| C1563 la_data_out[86] vdda1 0.63fF |
| C1564 la_data_in[86] vdda1 0.63fF |
| C1565 la_oenb[85] vdda1 0.63fF |
| C1566 la_data_out[85] vdda1 0.63fF |
| C1567 la_data_in[85] vdda1 0.63fF |
| C1568 la_oenb[84] vdda1 0.63fF |
| C1569 la_data_out[84] vdda1 0.63fF |
| C1570 la_data_in[84] vdda1 0.63fF |
| C1571 la_oenb[83] vdda1 0.63fF |
| C1572 la_data_out[83] vdda1 0.63fF |
| C1573 la_data_in[83] vdda1 0.63fF |
| C1574 la_oenb[82] vdda1 0.63fF |
| C1575 la_data_out[82] vdda1 0.63fF |
| C1576 la_data_in[82] vdda1 0.63fF |
| C1577 la_oenb[81] vdda1 0.63fF |
| C1578 la_data_out[81] vdda1 0.63fF |
| C1579 la_data_in[81] vdda1 0.63fF |
| C1580 la_oenb[80] vdda1 0.63fF |
| C1581 la_data_out[80] vdda1 0.63fF |
| C1582 la_data_in[80] vdda1 0.63fF |
| C1583 la_oenb[79] vdda1 0.63fF |
| C1584 la_data_out[79] vdda1 0.63fF |
| C1585 la_data_in[79] vdda1 0.63fF |
| C1586 la_oenb[78] vdda1 0.63fF |
| C1587 la_data_out[78] vdda1 0.63fF |
| C1588 la_data_in[78] vdda1 0.63fF |
| C1589 la_oenb[77] vdda1 0.63fF |
| C1590 la_data_out[77] vdda1 0.63fF |
| C1591 la_data_in[77] vdda1 0.63fF |
| C1592 la_oenb[76] vdda1 0.63fF |
| C1593 la_data_out[76] vdda1 0.63fF |
| C1594 la_data_in[76] vdda1 0.63fF |
| C1595 la_oenb[75] vdda1 0.63fF |
| C1596 la_data_out[75] vdda1 0.63fF |
| C1597 la_data_in[75] vdda1 0.63fF |
| C1598 la_oenb[74] vdda1 0.63fF |
| C1599 la_data_out[74] vdda1 0.63fF |
| C1600 la_data_in[74] vdda1 0.63fF |
| C1601 la_oenb[73] vdda1 0.63fF |
| C1602 la_data_out[73] vdda1 0.63fF |
| C1603 la_data_in[73] vdda1 0.63fF |
| C1604 la_oenb[72] vdda1 0.63fF |
| C1605 la_data_out[72] vdda1 0.63fF |
| C1606 la_data_in[72] vdda1 0.63fF |
| C1607 la_oenb[71] vdda1 0.63fF |
| C1608 la_data_out[71] vdda1 0.63fF |
| C1609 la_data_in[71] vdda1 0.63fF |
| C1610 la_oenb[70] vdda1 0.63fF |
| C1611 la_data_out[70] vdda1 0.63fF |
| C1612 la_data_in[70] vdda1 0.63fF |
| C1613 la_oenb[69] vdda1 0.63fF |
| C1614 la_data_out[69] vdda1 0.63fF |
| C1615 la_data_in[69] vdda1 0.63fF |
| C1616 la_oenb[68] vdda1 0.63fF |
| C1617 la_data_out[68] vdda1 0.63fF |
| C1618 la_data_in[68] vdda1 0.63fF |
| C1619 la_oenb[67] vdda1 0.63fF |
| C1620 la_data_out[67] vdda1 0.63fF |
| C1621 la_data_in[67] vdda1 0.63fF |
| C1622 la_oenb[66] vdda1 0.63fF |
| C1623 la_data_out[66] vdda1 0.63fF |
| C1624 la_data_in[66] vdda1 0.63fF |
| C1625 la_oenb[65] vdda1 0.63fF |
| C1626 la_data_out[65] vdda1 0.63fF |
| C1627 la_data_in[65] vdda1 0.63fF |
| C1628 la_oenb[64] vdda1 0.63fF |
| C1629 la_data_out[64] vdda1 0.63fF |
| C1630 la_data_in[64] vdda1 0.63fF |
| C1631 la_oenb[63] vdda1 0.63fF |
| C1632 la_data_out[63] vdda1 0.63fF |
| C1633 la_data_in[63] vdda1 0.63fF |
| C1634 la_oenb[62] vdda1 0.63fF |
| C1635 la_data_out[62] vdda1 0.63fF |
| C1636 la_data_in[62] vdda1 0.63fF |
| C1637 la_oenb[61] vdda1 0.63fF |
| C1638 la_data_out[61] vdda1 0.63fF |
| C1639 la_data_in[61] vdda1 0.63fF |
| C1640 la_oenb[60] vdda1 0.63fF |
| C1641 la_data_out[60] vdda1 0.63fF |
| C1642 la_data_in[60] vdda1 0.63fF |
| C1643 la_oenb[59] vdda1 0.63fF |
| C1644 la_data_out[59] vdda1 0.63fF |
| C1645 la_data_in[59] vdda1 0.63fF |
| C1646 la_oenb[58] vdda1 0.63fF |
| C1647 la_data_out[58] vdda1 0.63fF |
| C1648 la_data_in[58] vdda1 0.63fF |
| C1649 la_oenb[57] vdda1 0.63fF |
| C1650 la_data_out[57] vdda1 0.63fF |
| C1651 la_data_in[57] vdda1 0.63fF |
| C1652 la_oenb[56] vdda1 0.63fF |
| C1653 la_data_out[56] vdda1 0.63fF |
| C1654 la_data_in[56] vdda1 0.63fF |
| C1655 la_oenb[55] vdda1 0.63fF |
| C1656 la_data_out[55] vdda1 0.63fF |
| C1657 la_data_in[55] vdda1 0.63fF |
| C1658 la_oenb[54] vdda1 0.63fF |
| C1659 la_data_out[54] vdda1 0.63fF |
| C1660 la_data_in[54] vdda1 0.63fF |
| C1661 la_oenb[53] vdda1 0.63fF |
| C1662 la_data_out[53] vdda1 0.63fF |
| C1663 la_data_in[53] vdda1 0.63fF |
| C1664 la_oenb[52] vdda1 0.63fF |
| C1665 la_data_out[52] vdda1 0.63fF |
| C1666 la_data_in[52] vdda1 0.63fF |
| C1667 la_oenb[51] vdda1 0.63fF |
| C1668 la_data_out[51] vdda1 0.63fF |
| C1669 la_data_in[51] vdda1 0.63fF |
| C1670 la_oenb[50] vdda1 0.63fF |
| C1671 la_data_out[50] vdda1 0.63fF |
| C1672 la_data_in[50] vdda1 0.63fF |
| C1673 la_oenb[49] vdda1 0.63fF |
| C1674 la_data_out[49] vdda1 0.63fF |
| C1675 la_data_in[49] vdda1 0.63fF |
| C1676 la_oenb[48] vdda1 0.63fF |
| C1677 la_data_out[48] vdda1 0.63fF |
| C1678 la_data_in[48] vdda1 0.63fF |
| C1679 la_oenb[47] vdda1 0.63fF |
| C1680 la_data_out[47] vdda1 0.63fF |
| C1681 la_data_in[47] vdda1 0.63fF |
| C1682 la_oenb[46] vdda1 0.63fF |
| C1683 la_data_out[46] vdda1 0.63fF |
| C1684 la_data_in[46] vdda1 0.63fF |
| C1685 la_oenb[45] vdda1 0.63fF |
| C1686 la_data_out[45] vdda1 0.63fF |
| C1687 la_data_in[45] vdda1 0.63fF |
| C1688 la_oenb[44] vdda1 0.63fF |
| C1689 la_data_out[44] vdda1 0.63fF |
| C1690 la_data_in[44] vdda1 0.63fF |
| C1691 la_oenb[43] vdda1 0.63fF |
| C1692 la_data_out[43] vdda1 0.63fF |
| C1693 la_data_in[43] vdda1 0.63fF |
| C1694 la_oenb[42] vdda1 0.63fF |
| C1695 la_data_out[42] vdda1 0.63fF |
| C1696 la_data_in[42] vdda1 0.63fF |
| C1697 la_oenb[41] vdda1 0.63fF |
| C1698 la_data_out[41] vdda1 0.63fF |
| C1699 la_data_in[41] vdda1 0.63fF |
| C1700 la_oenb[40] vdda1 0.63fF |
| C1701 la_data_out[40] vdda1 0.63fF |
| C1702 la_data_in[40] vdda1 0.63fF |
| C1703 la_oenb[39] vdda1 0.63fF |
| C1704 la_data_out[39] vdda1 0.63fF |
| C1705 la_data_in[39] vdda1 0.63fF |
| C1706 la_oenb[38] vdda1 0.63fF |
| C1707 la_data_out[38] vdda1 0.63fF |
| C1708 la_data_in[38] vdda1 0.63fF |
| C1709 la_oenb[37] vdda1 0.63fF |
| C1710 la_data_out[37] vdda1 0.63fF |
| C1711 la_data_in[37] vdda1 0.63fF |
| C1712 la_oenb[36] vdda1 0.63fF |
| C1713 la_data_out[36] vdda1 0.63fF |
| C1714 la_data_in[36] vdda1 0.63fF |
| C1715 la_oenb[35] vdda1 0.63fF |
| C1716 la_data_out[35] vdda1 0.63fF |
| C1717 la_data_in[35] vdda1 0.63fF |
| C1718 la_oenb[34] vdda1 0.63fF |
| C1719 la_data_out[34] vdda1 0.63fF |
| C1720 la_data_in[34] vdda1 0.63fF |
| C1721 la_oenb[33] vdda1 0.63fF |
| C1722 la_data_out[33] vdda1 0.63fF |
| C1723 la_data_in[33] vdda1 0.63fF |
| C1724 la_oenb[32] vdda1 0.63fF |
| C1725 la_data_out[32] vdda1 0.63fF |
| C1726 la_data_in[32] vdda1 0.63fF |
| C1727 la_oenb[31] vdda1 0.63fF |
| C1728 la_data_out[31] vdda1 0.63fF |
| C1729 la_data_in[31] vdda1 0.63fF |
| C1730 la_oenb[30] vdda1 0.63fF |
| C1731 la_data_out[30] vdda1 0.63fF |
| C1732 la_data_in[30] vdda1 0.63fF |
| C1733 la_oenb[29] vdda1 0.63fF |
| C1734 la_data_out[29] vdda1 0.63fF |
| C1735 la_data_in[29] vdda1 0.63fF |
| C1736 la_oenb[28] vdda1 0.63fF |
| C1737 la_data_out[28] vdda1 0.63fF |
| C1738 la_data_in[28] vdda1 0.63fF |
| C1739 la_oenb[27] vdda1 0.63fF |
| C1740 la_data_out[27] vdda1 0.63fF |
| C1741 la_data_in[27] vdda1 0.63fF |
| C1742 la_oenb[26] vdda1 0.63fF |
| C1743 la_data_out[26] vdda1 0.63fF |
| C1744 la_data_in[26] vdda1 0.63fF |
| C1745 la_oenb[25] vdda1 0.63fF |
| C1746 la_data_out[25] vdda1 0.63fF |
| C1747 la_data_in[25] vdda1 0.63fF |
| C1748 la_oenb[24] vdda1 0.63fF |
| C1749 la_data_out[24] vdda1 0.63fF |
| C1750 la_data_in[24] vdda1 0.63fF |
| C1751 la_oenb[23] vdda1 0.63fF |
| C1752 la_data_out[23] vdda1 0.63fF |
| C1753 la_data_in[23] vdda1 0.63fF |
| C1754 la_oenb[22] vdda1 0.63fF |
| C1755 la_data_out[22] vdda1 0.63fF |
| C1756 la_data_in[22] vdda1 0.63fF |
| C1757 la_oenb[21] vdda1 0.63fF |
| C1758 la_data_out[21] vdda1 0.63fF |
| C1759 la_data_in[21] vdda1 0.63fF |
| C1760 la_oenb[20] vdda1 0.63fF |
| C1761 la_data_out[20] vdda1 0.63fF |
| C1762 la_data_in[20] vdda1 0.63fF |
| C1763 la_oenb[19] vdda1 0.63fF |
| C1764 la_data_out[19] vdda1 0.63fF |
| C1765 la_data_in[19] vdda1 0.63fF |
| C1766 la_oenb[18] vdda1 0.63fF |
| C1767 la_data_out[18] vdda1 0.63fF |
| C1768 la_data_in[18] vdda1 0.63fF |
| C1769 la_oenb[17] vdda1 0.63fF |
| C1770 la_data_out[17] vdda1 0.63fF |
| C1771 la_data_in[17] vdda1 0.63fF |
| C1772 la_oenb[16] vdda1 0.63fF |
| C1773 la_data_out[16] vdda1 0.63fF |
| C1774 la_data_in[16] vdda1 0.63fF |
| C1775 la_oenb[15] vdda1 0.63fF |
| C1776 la_data_out[15] vdda1 0.63fF |
| C1777 la_data_in[15] vdda1 0.63fF |
| C1778 la_oenb[14] vdda1 0.63fF |
| C1779 la_data_out[14] vdda1 0.63fF |
| C1780 la_data_in[14] vdda1 0.63fF |
| C1781 la_oenb[13] vdda1 0.63fF |
| C1782 la_data_out[13] vdda1 0.63fF |
| C1783 la_data_in[13] vdda1 0.63fF |
| C1784 la_oenb[12] vdda1 0.63fF |
| C1785 la_data_out[12] vdda1 0.63fF |
| C1786 la_data_in[12] vdda1 0.63fF |
| C1787 la_oenb[11] vdda1 0.63fF |
| C1788 la_data_out[11] vdda1 0.63fF |
| C1789 la_data_in[11] vdda1 0.63fF |
| C1790 la_oenb[10] vdda1 0.63fF |
| C1791 la_data_out[10] vdda1 0.63fF |
| C1792 la_data_in[10] vdda1 0.63fF |
| C1793 la_oenb[9] vdda1 0.63fF |
| C1794 la_data_out[9] vdda1 0.63fF |
| C1795 la_data_in[9] vdda1 0.63fF |
| C1796 la_oenb[8] vdda1 0.63fF |
| C1797 la_data_out[8] vdda1 0.63fF |
| C1798 la_data_in[8] vdda1 0.63fF |
| C1799 la_oenb[7] vdda1 0.63fF |
| C1800 la_data_out[7] vdda1 0.63fF |
| C1801 la_data_in[7] vdda1 0.63fF |
| C1802 la_oenb[6] vdda1 0.63fF |
| C1803 la_data_out[6] vdda1 0.63fF |
| C1804 la_data_in[6] vdda1 0.63fF |
| C1805 la_oenb[5] vdda1 0.63fF |
| C1806 la_data_out[5] vdda1 0.63fF |
| C1807 la_data_in[5] vdda1 0.63fF |
| C1808 la_oenb[4] vdda1 0.63fF |
| C1809 la_data_out[4] vdda1 0.63fF |
| C1810 la_data_in[4] vdda1 0.63fF |
| C1811 la_oenb[3] vdda1 0.63fF |
| C1812 la_data_out[3] vdda1 0.63fF |
| C1813 la_data_in[3] vdda1 0.63fF |
| C1814 la_oenb[2] vdda1 0.63fF |
| C1815 la_data_out[2] vdda1 0.63fF |
| C1816 la_data_in[2] vdda1 0.63fF |
| C1817 la_oenb[1] vdda1 0.63fF |
| C1818 la_data_out[1] vdda1 0.63fF |
| C1819 la_data_in[1] vdda1 0.63fF |
| C1820 la_oenb[0] vdda1 0.63fF |
| C1821 la_data_out[0] vdda1 0.63fF |
| C1822 la_data_in[0] vdda1 0.63fF |
| C1823 wbs_dat_o[31] vdda1 0.63fF |
| C1824 wbs_dat_i[31] vdda1 0.63fF |
| C1825 wbs_adr_i[31] vdda1 0.63fF |
| C1826 wbs_dat_o[30] vdda1 0.63fF |
| C1827 wbs_dat_i[30] vdda1 0.63fF |
| C1828 wbs_adr_i[30] vdda1 0.63fF |
| C1829 wbs_dat_o[29] vdda1 0.63fF |
| C1830 wbs_dat_i[29] vdda1 0.63fF |
| C1831 wbs_adr_i[29] vdda1 0.63fF |
| C1832 wbs_dat_o[28] vdda1 0.63fF |
| C1833 wbs_dat_i[28] vdda1 0.63fF |
| C1834 wbs_adr_i[28] vdda1 0.63fF |
| C1835 wbs_dat_o[27] vdda1 0.63fF |
| C1836 wbs_dat_i[27] vdda1 0.63fF |
| C1837 wbs_adr_i[27] vdda1 0.63fF |
| C1838 wbs_dat_o[26] vdda1 0.63fF |
| C1839 wbs_dat_i[26] vdda1 0.63fF |
| C1840 wbs_adr_i[26] vdda1 0.63fF |
| C1841 wbs_dat_o[25] vdda1 0.63fF |
| C1842 wbs_dat_i[25] vdda1 0.63fF |
| C1843 wbs_adr_i[25] vdda1 0.63fF |
| C1844 wbs_dat_o[24] vdda1 0.63fF |
| C1845 wbs_dat_i[24] vdda1 0.63fF |
| C1846 wbs_adr_i[24] vdda1 0.63fF |
| C1847 wbs_dat_o[23] vdda1 0.63fF |
| C1848 wbs_dat_i[23] vdda1 0.63fF |
| C1849 wbs_adr_i[23] vdda1 0.63fF |
| C1850 wbs_dat_o[22] vdda1 0.63fF |
| C1851 wbs_dat_i[22] vdda1 0.63fF |
| C1852 wbs_adr_i[22] vdda1 0.63fF |
| C1853 wbs_dat_o[21] vdda1 0.63fF |
| C1854 wbs_dat_i[21] vdda1 0.63fF |
| C1855 wbs_adr_i[21] vdda1 0.63fF |
| C1856 wbs_dat_o[20] vdda1 0.63fF |
| C1857 wbs_dat_i[20] vdda1 0.63fF |
| C1858 wbs_adr_i[20] vdda1 0.63fF |
| C1859 wbs_dat_o[19] vdda1 0.63fF |
| C1860 wbs_dat_i[19] vdda1 0.63fF |
| C1861 wbs_adr_i[19] vdda1 0.63fF |
| C1862 wbs_dat_o[18] vdda1 0.63fF |
| C1863 wbs_dat_i[18] vdda1 0.63fF |
| C1864 wbs_adr_i[18] vdda1 0.63fF |
| C1865 wbs_dat_o[17] vdda1 0.63fF |
| C1866 wbs_dat_i[17] vdda1 0.63fF |
| C1867 wbs_adr_i[17] vdda1 0.63fF |
| C1868 wbs_dat_o[16] vdda1 0.63fF |
| C1869 wbs_dat_i[16] vdda1 0.63fF |
| C1870 wbs_adr_i[16] vdda1 0.63fF |
| C1871 wbs_dat_o[15] vdda1 0.63fF |
| C1872 wbs_dat_i[15] vdda1 0.63fF |
| C1873 wbs_adr_i[15] vdda1 0.63fF |
| C1874 wbs_dat_o[14] vdda1 0.63fF |
| C1875 wbs_dat_i[14] vdda1 0.63fF |
| C1876 wbs_adr_i[14] vdda1 0.63fF |
| C1877 wbs_dat_o[13] vdda1 0.63fF |
| C1878 wbs_dat_i[13] vdda1 0.63fF |
| C1879 wbs_adr_i[13] vdda1 0.63fF |
| C1880 wbs_dat_o[12] vdda1 0.63fF |
| C1881 wbs_dat_i[12] vdda1 0.63fF |
| C1882 wbs_adr_i[12] vdda1 0.63fF |
| C1883 wbs_dat_o[11] vdda1 0.63fF |
| C1884 wbs_dat_i[11] vdda1 0.63fF |
| C1885 wbs_adr_i[11] vdda1 0.63fF |
| C1886 wbs_dat_o[10] vdda1 0.63fF |
| C1887 wbs_dat_i[10] vdda1 0.63fF |
| C1888 wbs_adr_i[10] vdda1 0.63fF |
| C1889 wbs_dat_o[9] vdda1 0.63fF |
| C1890 wbs_dat_i[9] vdda1 0.63fF |
| C1891 wbs_adr_i[9] vdda1 0.63fF |
| C1892 wbs_dat_o[8] vdda1 0.63fF |
| C1893 wbs_dat_i[8] vdda1 0.63fF |
| C1894 wbs_adr_i[8] vdda1 0.63fF |
| C1895 wbs_dat_o[7] vdda1 0.63fF |
| C1896 wbs_dat_i[7] vdda1 0.63fF |
| C1897 wbs_adr_i[7] vdda1 0.63fF |
| C1898 wbs_dat_o[6] vdda1 0.63fF |
| C1899 wbs_dat_i[6] vdda1 0.63fF |
| C1900 wbs_adr_i[6] vdda1 0.63fF |
| C1901 wbs_dat_o[5] vdda1 0.63fF |
| C1902 wbs_dat_i[5] vdda1 0.63fF |
| C1903 wbs_adr_i[5] vdda1 0.63fF |
| C1904 wbs_dat_o[4] vdda1 0.63fF |
| C1905 wbs_dat_i[4] vdda1 0.63fF |
| C1906 wbs_adr_i[4] vdda1 0.63fF |
| C1907 wbs_sel_i[3] vdda1 0.63fF |
| C1908 wbs_dat_o[3] vdda1 0.63fF |
| C1909 wbs_dat_i[3] vdda1 0.63fF |
| C1910 wbs_adr_i[3] vdda1 0.63fF |
| C1911 wbs_sel_i[2] vdda1 0.63fF |
| C1912 wbs_dat_o[2] vdda1 0.63fF |
| C1913 wbs_dat_i[2] vdda1 0.63fF |
| C1914 wbs_adr_i[2] vdda1 0.63fF |
| C1915 wbs_sel_i[1] vdda1 0.63fF |
| C1916 wbs_dat_o[1] vdda1 0.63fF |
| C1917 wbs_dat_i[1] vdda1 0.63fF |
| C1918 wbs_adr_i[1] vdda1 0.63fF |
| C1919 wbs_sel_i[0] vdda1 0.63fF |
| C1920 wbs_dat_o[0] vdda1 0.63fF |
| C1921 wbs_dat_i[0] vdda1 0.63fF |
| C1922 wbs_adr_i[0] vdda1 0.63fF |
| C1923 wbs_we_i vdda1 0.63fF |
| C1924 wbs_stb_i vdda1 0.63fF |
| C1925 wbs_cyc_i vdda1 0.63fF |
| C1926 wbs_ack_o vdda1 0.63fF |
| C1927 wb_rst_i vdda1 0.63fF |
| C1928 wb_clk_i vdda1 0.63fF |
| C1929 gpio_analog[7] vdda1 92.33fF |
| C1930 io_analog[2] vdda1 133.63fF |
| C1931 m4_28900_141410# vdda1 540.96fF **FLOATING |
| C1932 m4_115800_678290# vdda1 75.23fF **FLOATING |
| C1933 li_17838_664356# vdda1 1.78fF **FLOATING |
| C1934 li_17806_665450# vdda1 1.77fF **FLOATING |
| C1935 pll_full_0/divider_0/and_0/Z1 vdda1 0.65fF |
| C1936 pll_full_0/divider_0/and_0/B vdda1 2.45fF |
| C1937 pll_full_0/divider_0/and_0/A vdda1 2.35fF |
| C1938 pll_full_0/divider_0/and_0/out1 vdda1 2.99fF |
| C1939 pll_full_0/divider_0/tspc_2/Z4 vdda1 0.86fF |
| C1940 pll_full_0/divbuf_0/IN vdda1 10.47fF |
| C1941 pll_full_0/divider_0/tspc_2/Z3 vdda1 2.26fF |
| C1942 pll_full_0/divider_0/tspc_2/Z2 vdda1 1.46fF |
| C1943 pll_full_0/divider_0/tspc_2/Z1 vdda1 0.99fF |
| C1944 pll_full_0/divider_0/nor_0/B vdda1 6.48fF |
| C1945 pll_full_0/divider_0/tspc_2/a_630_n680# vdda1 1.14fF **FLOATING |
| C1946 pll_full_0/divider_0/tspc_1/Z4 vdda1 0.86fF |
| C1947 pll_full_0/divider_0/tspc_1/Q vdda1 3.12fF |
| C1948 pll_full_0/divider_0/tspc_1/Z3 vdda1 2.26fF |
| C1949 pll_full_0/divider_0/tspc_1/Z2 vdda1 1.46fF |
| C1950 pll_full_0/divider_0/tspc_1/Z1 vdda1 0.99fF |
| C1951 pll_full_0/divider_0/nor_1/B vdda1 7.12fF |
| C1952 pll_full_0/divider_0/tspc_1/a_630_n680# vdda1 1.15fF **FLOATING |
| C1953 pll_full_0/divider_0/tspc_0/Z4 vdda1 0.86fF |
| C1954 pll_full_0/divider_0/tspc_0/Q vdda1 3.14fF |
| C1955 pll_full_0/divider_0/tspc_0/Z3 vdda1 2.26fF |
| C1956 pll_full_0/divider_0/tspc_0/Z2 vdda1 1.46fF |
| C1957 pll_full_0/divider_0/tspc_0/Z1 vdda1 0.99fF |
| C1958 pll_full_0/divider_0/nor_1/A vdda1 7.08fF |
| C1959 pll_full_0/divider_0/tspc_0/a_630_n680# vdda1 1.15fF **FLOATING |
| C1960 pll_full_0/divider_0/clk vdda1 32.57fF |
| C1961 pll_full_0/divider_0/prescaler_0/Out vdda1 4.59fF |
| C1962 pll_full_0/divider_0/prescaler_0/nand_1/z1 vdda1 0.36fF |
| C1963 pll_full_0/divider_0/prescaler_0/tspc_2/D vdda1 2.64fF |
| C1964 pll_full_0/divider_0/prescaler_0/tspc_0/Q vdda1 3.72fF |
| C1965 pll_full_0/divider_0/prescaler_0/tspc_1/Q vdda1 3.61fF |
| C1966 pll_full_0/divider_0/prescaler_0/nand_0/z1 vdda1 0.36fF |
| C1967 pll_full_0/divider_0/prescaler_0/tspc_0/D vdda1 3.12fF |
| C1968 pll_full_0/divider_0/and_0/OUT vdda1 5.67fF |
| C1969 pll_full_0/divider_0/prescaler_0/tspc_2/Z4 vdda1 0.86fF |
| C1970 pll_full_0/divider_0/prescaler_0/tspc_2/Z3 vdda1 2.26fF |
| C1971 pll_full_0/divider_0/prescaler_0/tspc_2/Z2 vdda1 1.46fF |
| C1972 pll_full_0/divider_0/prescaler_0/tspc_2/Z1 vdda1 0.99fF |
| C1973 pll_full_0/divider_0/prescaler_0/tspc_2/a_630_n680# vdda1 1.16fF **FLOATING |
| C1974 pll_full_0/divider_0/prescaler_0/tspc_2/a_740_n680# vdda1 2.11fF **FLOATING |
| C1975 pll_full_0/divider_0/prescaler_0/tspc_1/Z4 vdda1 0.86fF |
| C1976 pll_full_0/divider_0/prescaler_0/tspc_1/Z3 vdda1 2.26fF |
| C1977 pll_full_0/divider_0/prescaler_0/tspc_1/Z2 vdda1 1.48fF |
| C1978 pll_full_0/divider_0/prescaler_0/tspc_1/Z1 vdda1 0.99fF |
| C1979 pll_full_0/divider_0/prescaler_0/tspc_1/a_630_n680# vdda1 1.14fF **FLOATING |
| C1980 pll_full_0/divider_0/prescaler_0/m1_2700_2190# vdda1 4.22fF **FLOATING |
| C1981 pll_full_0/divider_0/prescaler_0/tspc_0/Z4 vdda1 0.86fF |
| C1982 pll_full_0/divider_0/prescaler_0/tspc_0/Z3 vdda1 2.26fF |
| C1983 pll_full_0/divider_0/prescaler_0/tspc_0/Z2 vdda1 1.19fF |
| C1984 pll_full_0/divider_0/prescaler_0/tspc_0/Z1 vdda1 0.99fF |
| C1985 pll_full_0/divider_0/prescaler_0/tspc_0/a_630_n680# vdda1 1.47fF **FLOATING |
| C1986 pll_full_0/divider_0/prescaler_0/tspc_0/a_740_n680# vdda1 2.11fF **FLOATING |
| C1987 pll_full_0/divider_0/nor_1/Z1 vdda1 1.34fF |
| C1988 pll_full_0/divider_0/nor_0/Z1 vdda1 1.34fF |
| C1989 pll_full_0/divbuf_1/OUT vdda1 363.82fF |
| C1990 pll_full_0/divbuf_1/OUT5 vdda1 350.37fF |
| C1991 pll_full_0/divbuf_1/OUT4 vdda1 133.72fF |
| C1992 pll_full_0/divbuf_1/OUT3 vdda1 34.03fF |
| C1993 pll_full_0/divbuf_1/OUT2 vdda1 8.71fF |
| C1994 pll_full_0/divbuf_1/a_492_n240# vdda1 2.46fF **FLOATING |
| C1995 pll_full_0/divbuf_0/OUT5 vdda1 350.37fF |
| C1996 pll_full_0/divbuf_0/OUT4 vdda1 133.72fF |
| C1997 pll_full_0/divbuf_0/OUT3 vdda1 34.03fF |
| C1998 pll_full_0/divbuf_0/OUT2 vdda1 8.71fF |
| C1999 pll_full_0/divbuf_0/a_492_n240# vdda1 2.46fF **FLOATING |
| C2000 pll_full_0/ro_complete_0/cbank_2/v vdda1 17.88fF |
| C2001 pll_full_0/ro_complete_0/cbank_2/switch_5/vin vdda1 0.78fF |
| C2002 pll_full_0/ro_complete_0/cbank_2/switch_4/vin vdda1 1.50fF |
| C2003 pll_full_0/ro_complete_0/cbank_2/switch_2/vin vdda1 1.30fF |
| C2004 pll_full_0/ro_complete_0/cbank_2/switch_3/vin vdda1 0.56fF |
| C2005 pll_full_0/ro_complete_0/cbank_2/switch_1/vin vdda1 1.14fF |
| C2006 pll_full_0/ro_complete_0/cbank_2/switch_0/vin vdda1 1.02fF |
| C2007 pll_full_0/ro_complete_0/cbank_1/switch_5/vin vdda1 0.78fF |
| C2008 pll_full_0/ro_complete_0/a0 vdda1 7.88fF |
| C2009 pll_full_0/ro_complete_0/cbank_1/switch_4/vin vdda1 1.50fF |
| C2010 pll_full_0/ro_complete_0/a1 vdda1 5.39fF |
| C2011 pll_full_0/ro_complete_0/cbank_1/switch_2/vin vdda1 1.30fF |
| C2012 pll_full_0/ro_complete_0/a3 vdda1 6.85fF |
| C2013 pll_full_0/ro_complete_0/cbank_1/switch_3/vin vdda1 0.56fF |
| C2014 pll_full_0/ro_complete_0/a2 vdda1 5.48fF |
| C2015 pll_full_0/ro_complete_0/cbank_1/switch_1/vin vdda1 1.14fF |
| C2016 pll_full_0/ro_complete_0/a4 vdda1 5.36fF |
| C2017 pll_full_0/ro_complete_0/cbank_1/switch_0/vin vdda1 1.02fF |
| C2018 pll_full_0/ro_complete_0/a5 vdda1 5.19fF |
| C2019 pll_full_0/ro_complete_0/cbank_0/v vdda1 15.02fF |
| C2020 pll_full_0/ro_complete_0/cbank_0/switch_5/vin vdda1 0.78fF |
| C2021 pll_full_0/ro_complete_0/cbank_0/switch_4/vin vdda1 1.50fF |
| C2022 pll_full_0/ro_complete_0/cbank_0/switch_2/vin vdda1 1.30fF |
| C2023 pll_full_0/ro_complete_0/cbank_0/switch_3/vin vdda1 0.56fF |
| C2024 pll_full_0/ro_complete_0/cbank_0/switch_1/vin vdda1 1.14fF |
| C2025 pll_full_0/ro_complete_0/cbank_0/switch_0/vin vdda1 1.02fF |
| C2026 pll_full_0/ro_complete_0/ro_var_extend_0/vcont vdda1 0.27fF |
| C2027 pll_full_0/filter_0/a_4216_n5230# vdda1 419.25fF **FLOATING |
| C2028 pll_full_0/filter_0/a_4216_n2998# vdda1 1.39fF **FLOATING |
| C2029 pll_full_0/cp_0/down vdda1 1.54fF |
| C2030 pll_full_0/cp_0/upbar vdda1 1.79fF |
| C2031 pll_full_0/cp_0/a_7110_n2840# vdda1 0.17fF **FLOATING |
| C2032 pll_full_0/cp_0/a_3060_n2840# vdda1 1.71fF **FLOATING |
| C2033 pll_full_0/cp_0/a_7110_0# vdda1 0.17fF **FLOATING |
| C2034 pll_full_0/cp_0/a_6370_0# vdda1 0.40fF **FLOATING |
| C2035 pll_full_0/cp_0/a_3060_0# vdda1 2.49fF **FLOATING |
| C2036 pll_full_0/cp_0/a_1710_0# vdda1 7.47fF **FLOATING |
| C2037 pll_full_0/pd_0/and_pd_0/Z1 vdda1 0.39fF |
| C2038 pll_full_0/pd_0/and_pd_0/Out1 vdda1 2.22fF |
| C2039 pll_full_0/pd_0/tspc_r_1/z5 vdda1 1.10fF |
| C2040 pll_full_0/pd_0/tspc_r_1/Z4 vdda1 1.07fF |
| C2041 pll_full_0/pd_0/tspc_r_1/Qbar vdda1 0.88fF |
| C2042 pll_full_0/pd_0/tspc_r_1/Z2 vdda1 1.22fF |
| C2043 pll_full_0/pd_0/tspc_r_1/Z1 vdda1 0.67fF |
| C2044 pll_full_0/pd_0/UP vdda1 6.61fF |
| C2045 pll_full_0/pd_0/tspc_r_1/Qbar1 vdda1 1.34fF |
| C2046 pll_full_0/pd_0/tspc_r_1/Z3 vdda1 2.12fF |
| C2047 pll_full_0/pd_0/REF vdda1 7.29fF |
| C2048 pll_full_0/pd_0/tspc_r_0/z5 vdda1 1.10fF |
| C2049 pll_full_0/pd_0/tspc_r_0/Z4 vdda1 1.07fF |
| C2050 pll_full_0/pd_0/R vdda1 3.05fF |
| C2051 pll_full_0/pd_0/tspc_r_0/Qbar vdda1 0.79fF |
| C2052 pll_full_0/pd_0/tspc_r_0/Z2 vdda1 1.22fF |
| C2053 pll_full_0/pd_0/tspc_r_0/Z1 vdda1 0.67fF |
| C2054 pll_full_0/pd_0/DOWN vdda1 7.24fF |
| C2055 pll_full_0/pd_0/tspc_r_0/Qbar1 vdda1 1.34fF |
| C2056 pll_full_0/pd_0/tspc_r_0/Z3 vdda1 2.12fF |
| C2057 pll_full_0/pd_0/DIV vdda1 372.75fF |
| C2058 io_analog[5] vdda1 1865.75fF |
| C2059 divbuf_5/OUT5 vdda1 350.37fF |
| C2060 divbuf_5/OUT4 vdda1 133.72fF |
| C2061 divbuf_5/OUT3 vdda1 34.03fF |
| C2062 divbuf_5/OUT2 vdda1 8.71fF |
| C2063 divbuf_5/a_492_n240# vdda1 2.46fF **FLOATING |
| C2064 divbuf_4/OUT vdda1 363.82fF |
| C2065 divbuf_4/OUT5 vdda1 350.37fF |
| C2066 divbuf_4/OUT4 vdda1 133.72fF |
| C2067 divbuf_4/OUT3 vdda1 34.03fF |
| C2068 divbuf_4/OUT2 vdda1 8.71fF |
| C2069 divbuf_4/IN vdda1 0.89fF |
| C2070 divbuf_4/a_492_n240# vdda1 2.46fF **FLOATING |
| C2071 divbuf_3/OUT5 vdda1 393.75fF |
| C2072 divbuf_3/OUT4 vdda1 134.83fF |
| C2073 divbuf_3/OUT3 vdda1 34.29fF |
| C2074 divbuf_3/OUT2 vdda1 8.77fF |
| C2075 divbuf_3/a_492_n240# vdda1 2.59fF **FLOATING |
| C2076 divbuf_2/OUT5 vdda1 350.37fF |
| C2077 divbuf_2/OUT4 vdda1 133.72fF |
| C2078 divbuf_2/OUT3 vdda1 34.03fF |
| C2079 divbuf_2/OUT2 vdda1 8.71fF |
| C2080 divbuf_2/IN vdda1 43.96fF |
| C2081 divbuf_2/a_492_n240# vdda1 2.46fF **FLOATING |
| C2082 divbuf_1/OUT5 vdda1 393.75fF |
| C2083 divbuf_1/OUT4 vdda1 134.83fF |
| C2084 divbuf_1/OUT3 vdda1 34.29fF |
| C2085 divbuf_1/OUT2 vdda1 8.77fF |
| C2086 divbuf_1/a_492_n240# vdda1 2.46fF **FLOATING |
| C2087 pd_div_0/divider_0/and_0/Z1 vdda1 0.33fF |
| C2088 pd_div_0/divider_0/and_0/B vdda1 1.79fF |
| C2089 pd_div_0/divider_0/and_0/A vdda1 1.66fF |
| C2090 pd_div_0/divider_0/and_0/out1 vdda1 2.71fF |
| C2091 pd_div_0/divider_0/tspc_2/Z4 vdda1 0.42fF |
| C2092 pd_div_0/bufin vdda1 9.07fF |
| C2093 pd_div_0/divider_0/tspc_2/Z3 vdda1 2.00fF |
| C2094 pd_div_0/divider_0/tspc_2/Z2 vdda1 1.29fF |
| C2095 pd_div_0/divider_0/tspc_2/Z1 vdda1 0.99fF |
| C2096 pd_div_0/divider_0/nor_0/B vdda1 5.25fF |
| C2097 pd_div_0/divider_0/tspc_2/a_630_n680# vdda1 0.53fF **FLOATING |
| C2098 pd_div_0/divider_0/tspc_1/Z4 vdda1 0.42fF |
| C2099 pd_div_0/divider_0/tspc_1/Q vdda1 2.79fF |
| C2100 pd_div_0/divider_0/tspc_1/Z3 vdda1 2.00fF |
| C2101 pd_div_0/divider_0/tspc_1/Z2 vdda1 1.29fF |
| C2102 pd_div_0/divider_0/tspc_1/Z1 vdda1 0.99fF |
| C2103 pd_div_0/divider_0/nor_1/B vdda1 5.95fF |
| C2104 pd_div_0/divider_0/tspc_1/a_630_n680# vdda1 0.53fF **FLOATING |
| C2105 pd_div_0/divider_0/tspc_0/Z4 vdda1 0.42fF |
| C2106 pd_div_0/divider_0/tspc_0/Q vdda1 2.81fF |
| C2107 pd_div_0/divider_0/tspc_0/Z3 vdda1 2.00fF |
| C2108 pd_div_0/divider_0/tspc_0/Z2 vdda1 1.30fF |
| C2109 pd_div_0/divider_0/tspc_0/Z1 vdda1 0.99fF |
| C2110 pd_div_0/divider_0/nor_1/A vdda1 6.02fF |
| C2111 pd_div_0/divider_0/tspc_0/a_630_n680# vdda1 0.53fF **FLOATING |
| C2112 pd_div_0/divider_0/clk vdda1 5.63fF |
| C2113 pd_div_0/divider_0/prescaler_0/Out vdda1 4.13fF |
| C2114 pd_div_0/divider_0/prescaler_0/nand_1/z1 vdda1 0.20fF |
| C2115 pd_div_0/divider_0/prescaler_0/tspc_2/D vdda1 2.59fF |
| C2116 pd_div_0/divider_0/prescaler_0/tspc_0/Q vdda1 3.30fF |
| C2117 pd_div_0/divider_0/prescaler_0/tspc_1/Q vdda1 2.78fF |
| C2118 pd_div_0/divider_0/prescaler_0/nand_0/z1 vdda1 0.20fF |
| C2119 pd_div_0/divider_0/prescaler_0/tspc_0/D vdda1 3.07fF |
| C2120 pd_div_0/divider_0/and_0/OUT vdda1 5.35fF |
| C2121 pd_div_0/divider_0/prescaler_0/tspc_2/Z4 vdda1 0.42fF |
| C2122 pd_div_0/divider_0/prescaler_0/tspc_2/Z3 vdda1 2.00fF |
| C2123 pd_div_0/divider_0/prescaler_0/tspc_2/Z2 vdda1 1.30fF |
| C2124 pd_div_0/divider_0/prescaler_0/tspc_2/Z1 vdda1 0.99fF |
| C2125 pd_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# vdda1 0.53fF **FLOATING |
| C2126 pd_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# vdda1 1.89fF **FLOATING |
| C2127 pd_div_0/divider_0/prescaler_0/tspc_1/Z4 vdda1 0.42fF |
| C2128 pd_div_0/divider_0/prescaler_0/tspc_1/Z3 vdda1 2.00fF |
| C2129 pd_div_0/divider_0/prescaler_0/tspc_1/Z2 vdda1 1.31fF |
| C2130 pd_div_0/divider_0/prescaler_0/tspc_1/Z1 vdda1 0.99fF |
| C2131 pd_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# vdda1 0.53fF **FLOATING |
| C2132 pd_div_0/divider_0/prescaler_0/m1_2700_2190# vdda1 3.99fF **FLOATING |
| C2133 pd_div_0/divider_0/prescaler_0/tspc_0/Z4 vdda1 0.42fF |
| C2134 pd_div_0/divider_0/prescaler_0/tspc_0/Z3 vdda1 2.00fF |
| C2135 pd_div_0/divider_0/prescaler_0/tspc_0/Z2 vdda1 1.30fF |
| C2136 pd_div_0/divider_0/prescaler_0/tspc_0/Z1 vdda1 0.99fF |
| C2137 pd_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# vdda1 0.53fF **FLOATING |
| C2138 pd_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# vdda1 1.89fF **FLOATING |
| C2139 pd_div_0/divider_0/nor_1/Z1 vdda1 1.33fF |
| C2140 pd_div_0/divider_0/nor_0/Z1 vdda1 1.33fF |
| C2141 pd_div_0/divider_0/mc2 vdda1 3.93fF |
| C2142 pd_div_0/divbuf_0/OUT5 vdda1 350.37fF |
| C2143 pd_div_0/divbuf_0/OUT4 vdda1 133.72fF |
| C2144 pd_div_0/divbuf_0/OUT3 vdda1 34.03fF |
| C2145 pd_div_0/divbuf_0/OUT2 vdda1 8.71fF |
| C2146 pd_div_0/divbuf_0/a_492_n240# vdda1 2.46fF **FLOATING |
| C2147 pd_div_0/pd_0/and_pd_0/Z1 vdda1 0.39fF |
| C2148 pd_div_0/pd_0/and_pd_0/Out1 vdda1 2.22fF |
| C2149 pd_div_0/pd_0/tspc_r_1/z5 vdda1 1.10fF |
| C2150 pd_div_0/pd_0/tspc_r_1/Z4 vdda1 1.07fF |
| C2151 pd_div_0/pd_0/tspc_r_1/Qbar vdda1 0.88fF |
| C2152 pd_div_0/pd_0/tspc_r_1/Z2 vdda1 1.22fF |
| C2153 pd_div_0/pd_0/tspc_r_1/Z1 vdda1 0.67fF |
| C2154 pd_div_0/pd_0/UP vdda1 2.30fF |
| C2155 pd_div_0/pd_0/tspc_r_1/Qbar1 vdda1 1.34fF |
| C2156 pd_div_0/pd_0/tspc_r_1/Z3 vdda1 2.12fF |
| C2157 pd_div_0/pd_0/REF vdda1 1.86fF |
| C2158 pd_div_0/pd_0/tspc_r_0/z5 vdda1 1.10fF |
| C2159 pd_div_0/pd_0/tspc_r_0/Z4 vdda1 1.07fF |
| C2160 pd_div_0/pd_0/R vdda1 3.05fF |
| C2161 pd_div_0/pd_0/tspc_r_0/Qbar vdda1 0.79fF |
| C2162 pd_div_0/pd_0/tspc_r_0/Z2 vdda1 1.22fF |
| C2163 pd_div_0/pd_0/tspc_r_0/Z1 vdda1 0.67fF |
| C2164 pd_div_0/pd_0/DOWN vdda1 3.17fF |
| C2165 pd_div_0/pd_0/tspc_r_0/Qbar1 vdda1 1.34fF |
| C2166 pd_div_0/pd_0/tspc_r_0/Z3 vdda1 2.12fF |
| C2167 pd_div_0/div vdda1 368.60fF |
| C2168 divbuf_0/OUT5 vdda1 393.75fF |
| C2169 divbuf_0/OUT4 vdda1 134.83fF |
| C2170 divbuf_0/OUT3 vdda1 34.29fF |
| C2171 divbuf_0/OUT2 vdda1 8.77fF |
| C2172 divbuf_0/a_492_n240# vdda1 2.46fF **FLOATING |
| C2173 ro_complete_0/cbank_2/v vdda1 17.89fF |
| C2174 ro_complete_0/cbank_2/switch_5/vin vdda1 0.87fF |
| C2175 ro_complete_0/cbank_2/switch_4/vin vdda1 1.63fF |
| C2176 ro_complete_0/cbank_2/switch_2/vin vdda1 1.30fF |
| C2177 ro_complete_0/cbank_2/switch_3/vin vdda1 0.56fF |
| C2178 ro_complete_0/cbank_2/switch_1/vin vdda1 1.14fF |
| C2179 ro_complete_0/cbank_2/switch_0/vin vdda1 1.02fF |
| C2180 divbuf_5/IN vdda1 19.88fF |
| C2181 ro_complete_0/cbank_1/switch_5/vin vdda1 0.87fF |
| C2182 ro_complete_0/cbank_1/switch_4/vin vdda1 1.50fF |
| C2183 gpio_analog[13] vdda1 69.60fF |
| C2184 ro_complete_0/cbank_1/switch_2/vin vdda1 1.30fF |
| C2185 ro_complete_0/a3 vdda1 26.74fF |
| C2186 ro_complete_0/cbank_1/switch_3/vin vdda1 0.56fF |
| C2187 ro_complete_0/a2 vdda1 20.30fF |
| C2188 ro_complete_0/cbank_1/switch_1/vin vdda1 1.14fF |
| C2189 ro_complete_0/a4 vdda1 33.91fF |
| C2190 ro_complete_0/cbank_1/switch_0/vin vdda1 1.02fF |
| C2191 gpio_analog[14] vdda1 127.21fF |
| C2192 ro_complete_0/cbank_0/v vdda1 17.14fF |
| C2193 ro_complete_0/cbank_0/switch_2/vin vdda1 1.30fF |
| C2194 ro_complete_0/cbank_0/switch_3/vin vdda1 0.76fF |
| C2195 ro_complete_0/cbank_0/switch_1/vin vdda1 1.14fF |
| C2196 ro_complete_0/cbank_0/switch_0/vin vdda1 1.02fF |
| C2197 ro_complete_0/ro_var_extend_0/vcont vdda1 0.27fF |
| C2198 ro_div_0/divider_0/and_0/Z1 vdda1 0.33fF |
| C2199 ro_div_0/divider_0/and_0/B vdda1 1.79fF |
| C2200 ro_div_0/divider_0/and_0/A vdda1 1.66fF |
| C2201 ro_div_0/divider_0/and_0/out1 vdda1 2.71fF |
| C2202 ro_div_0/divider_0/tspc_2/Z4 vdda1 0.42fF |
| C2203 ro_div_0/divbuf_0/IN vdda1 9.25fF |
| C2204 ro_div_0/divider_0/tspc_2/Z3 vdda1 2.00fF |
| C2205 ro_div_0/divider_0/tspc_2/Z2 vdda1 1.29fF |
| C2206 ro_div_0/divider_0/tspc_2/Z1 vdda1 0.99fF |
| C2207 ro_div_0/divider_0/nor_0/B vdda1 5.25fF |
| C2208 ro_div_0/divider_0/tspc_2/a_630_n680# vdda1 0.53fF **FLOATING |
| C2209 ro_div_0/divider_0/tspc_1/Z4 vdda1 0.42fF |
| C2210 ro_div_0/divider_0/tspc_1/Q vdda1 2.79fF |
| C2211 ro_div_0/divider_0/tspc_1/Z3 vdda1 2.00fF |
| C2212 ro_div_0/divider_0/tspc_1/Z2 vdda1 1.29fF |
| C2213 ro_div_0/divider_0/tspc_1/Z1 vdda1 0.99fF |
| C2214 ro_div_0/divider_0/nor_1/B vdda1 5.95fF |
| C2215 ro_div_0/divider_0/tspc_1/a_630_n680# vdda1 0.53fF **FLOATING |
| C2216 ro_div_0/divider_0/tspc_0/Z4 vdda1 0.42fF |
| C2217 ro_div_0/divider_0/tspc_0/Q vdda1 2.81fF |
| C2218 ro_div_0/divider_0/tspc_0/Z3 vdda1 2.00fF |
| C2219 ro_div_0/divider_0/tspc_0/Z2 vdda1 1.30fF |
| C2220 ro_div_0/divider_0/tspc_0/Z1 vdda1 0.99fF |
| C2221 ro_div_0/divider_0/nor_1/A vdda1 6.02fF |
| C2222 ro_div_0/divider_0/tspc_0/a_630_n680# vdda1 0.53fF **FLOATING |
| C2223 ro_div_0/divider_0/clk vdda1 23.35fF |
| C2224 ro_div_0/divider_0/prescaler_0/Out vdda1 4.13fF |
| C2225 ro_div_0/divider_0/prescaler_0/nand_1/z1 vdda1 0.20fF |
| C2226 gnd vdda1 48.10fF |
| C2227 ro_div_0/divider_0/prescaler_0/tspc_2/D vdda1 2.59fF |
| C2228 ro_div_0/divider_0/prescaler_0/tspc_0/Q vdda1 3.30fF |
| C2229 ro_div_0/divider_0/prescaler_0/tspc_1/Q vdda1 2.78fF |
| C2230 ro_div_0/divider_0/prescaler_0/nand_0/z1 vdda1 0.20fF |
| C2231 ro_div_0/divider_0/prescaler_0/tspc_0/D vdda1 3.07fF |
| C2232 ro_div_0/divider_0/and_0/OUT vdda1 5.35fF |
| C2233 ro_div_0/divider_0/prescaler_0/tspc_2/Z4 vdda1 0.42fF |
| C2234 ro_div_0/divider_0/prescaler_0/tspc_2/Z3 vdda1 2.00fF |
| C2235 ro_div_0/divider_0/prescaler_0/tspc_2/Z2 vdda1 1.30fF |
| C2236 ro_div_0/divider_0/prescaler_0/tspc_2/Z1 vdda1 0.99fF |
| C2237 ro_div_0/divider_0/prescaler_0/tspc_2/a_630_n680# vdda1 0.53fF **FLOATING |
| C2238 ro_div_0/divider_0/prescaler_0/tspc_2/a_740_n680# vdda1 1.89fF **FLOATING |
| C2239 ro_div_0/divider_0/prescaler_0/tspc_1/Z4 vdda1 0.42fF |
| C2240 ro_div_0/divider_0/prescaler_0/tspc_1/Z3 vdda1 2.00fF |
| C2241 ro_div_0/divider_0/prescaler_0/tspc_1/Z2 vdda1 1.31fF |
| C2242 ro_div_0/divider_0/prescaler_0/tspc_1/Z1 vdda1 0.99fF |
| C2243 ro_div_0/divider_0/prescaler_0/tspc_1/a_630_n680# vdda1 0.53fF **FLOATING |
| C2244 ro_div_0/divider_0/prescaler_0/m1_2700_2190# vdda1 3.99fF **FLOATING |
| C2245 ro_div_0/divider_0/prescaler_0/tspc_0/Z4 vdda1 0.42fF |
| C2246 ro_div_0/divider_0/prescaler_0/tspc_0/Z3 vdda1 2.00fF |
| C2247 ro_div_0/divider_0/prescaler_0/tspc_0/Z2 vdda1 1.30fF |
| C2248 ro_div_0/divider_0/prescaler_0/tspc_0/Z1 vdda1 0.99fF |
| C2249 ro_div_0/divider_0/prescaler_0/tspc_0/a_630_n680# vdda1 0.53fF **FLOATING |
| C2250 ro_div_0/divider_0/prescaler_0/tspc_0/a_740_n680# vdda1 1.89fF **FLOATING |
| C2251 ro_div_0/divider_0/nor_1/Z1 vdda1 1.33fF |
| C2252 ro_div_0/divider_0/nor_0/Z1 vdda1 1.33fF |
| C2253 ro_div_0/divbuf_0/OUT vdda1 363.89fF |
| C2254 ro_div_0/divbuf_0/OUT5 vdda1 350.37fF |
| C2255 ro_div_0/divbuf_0/OUT4 vdda1 133.72fF |
| C2256 ro_div_0/divbuf_0/OUT3 vdda1 34.03fF |
| C2257 ro_div_0/divbuf_0/OUT2 vdda1 8.71fF |
| C2258 ro_div_0/divbuf_0/a_492_n240# vdda1 2.46fF **FLOATING |
| C2259 ro_div_0/ro_complete_0/cbank_2/v vdda1 17.84fF |
| C2260 ro_div_0/ro_complete_0/cbank_2/switch_5/vin vdda1 0.78fF |
| C2261 ro_div_0/ro_complete_0/cbank_2/switch_4/vin vdda1 1.50fF |
| C2262 ro_div_0/ro_complete_0/cbank_2/switch_2/vin vdda1 1.30fF |
| C2263 ro_div_0/ro_complete_0/cbank_2/switch_3/vin vdda1 0.56fF |
| C2264 ro_div_0/ro_complete_0/cbank_2/switch_1/vin vdda1 1.14fF |
| C2265 ro_div_0/ro_complete_0/cbank_2/switch_0/vin vdda1 1.02fF |
| C2266 ro_div_0/ro_complete_0/cbank_1/switch_5/vin vdda1 0.78fF |
| C2267 ro_div_0/ro_complete_0/a0 vdda1 7.88fF |
| C2268 ro_div_0/ro_complete_0/cbank_1/switch_4/vin vdda1 1.50fF |
| C2269 ro_div_0/ro_complete_0/a1 vdda1 5.39fF |
| C2270 ro_div_0/ro_complete_0/cbank_1/switch_2/vin vdda1 1.30fF |
| C2271 ro_div_0/ro_complete_0/a3 vdda1 6.85fF |
| C2272 ro_div_0/ro_complete_0/cbank_1/switch_3/vin vdda1 0.56fF |
| C2273 ro_div_0/ro_complete_0/a2 vdda1 5.48fF |
| C2274 ro_div_0/ro_complete_0/cbank_1/switch_1/vin vdda1 1.14fF |
| C2275 ro_div_0/ro_complete_0/a4 vdda1 5.36fF |
| C2276 ro_div_0/ro_complete_0/cbank_1/switch_0/vin vdda1 1.02fF |
| C2277 ro_div_0/ro_complete_0/a5 vdda1 5.19fF |
| C2278 ro_div_0/ro_complete_0/cbank_0/v vdda1 14.98fF |
| C2279 ro_div_0/ro_complete_0/cbank_0/switch_5/vin vdda1 0.78fF |
| C2280 ro_div_0/ro_complete_0/cbank_0/switch_4/vin vdda1 1.50fF |
| C2281 ro_div_0/ro_complete_0/cbank_0/switch_2/vin vdda1 1.30fF |
| C2282 ro_div_0/ro_complete_0/cbank_0/switch_3/vin vdda1 0.56fF |
| C2283 ro_div_0/ro_complete_0/cbank_0/switch_1/vin vdda1 1.14fF |
| C2284 ro_div_0/ro_complete_0/cbank_0/switch_0/vin vdda1 1.02fF |
| C2285 ro_div_0/ro_complete_0/ro_var_extend_0/vcont vdda1 0.27fF |
| C2286 gpio_noesd[15] vdda1 179.74fF |
| C2287 filter_0/a_4216_n5230# vdda1 418.47fF **FLOATING |
| C2288 filter_0/a_4216_n2998# vdda1 1.03fF **FLOATING |
| C2289 io_analog[1] vdda1 61.29fF |
| C2290 io_analog[0] vdda1 37.70fF |
| C2291 cp_0/upbar vdda1 1.79fF |
| C2292 cp_0/a_7110_n2840# vdda1 0.17fF **FLOATING |
| C2293 cp_0/a_3060_n2840# vdda1 1.71fF **FLOATING |
| C2294 cp_0/a_7110_0# vdda1 0.17fF **FLOATING |
| C2295 cp_0/a_6370_0# vdda1 0.40fF **FLOATING |
| C2296 cp_0/a_3060_0# vdda1 4.16fF **FLOATING |
| C2297 cp_0/a_1710_0# vdda1 6.63fF **FLOATING |
| C2298 cp_0/a_10_n50# vdda1 3.15fF **FLOATING |
| C2299 pd_0/and_pd_0/Z1 vdda1 0.39fF |
| C2300 pd_0/and_pd_0/Out1 vdda1 2.22fF |
| C2301 pd_0/tspc_r_1/z5 vdda1 1.14fF |
| C2302 pd_0/tspc_r_1/Z4 vdda1 1.09fF |
| C2303 pd_0/tspc_r_1/Qbar vdda1 0.88fF |
| C2304 pd_0/tspc_r_1/Z2 vdda1 1.41fF |
| C2305 pd_0/tspc_r_1/Z1 vdda1 0.84fF |
| C2306 pd_0/UP vdda1 7.59fF |
| C2307 pd_0/tspc_r_1/Qbar1 vdda1 1.46fF |
| C2308 pd_0/tspc_r_1/Z3 vdda1 2.78fF |
| C2309 pd_0/tspc_r_0/z5 vdda1 1.10fF |
| C2310 pd_0/tspc_r_0/Z4 vdda1 1.07fF |
| C2311 pd_0/R vdda1 3.66fF |
| C2312 pd_0/tspc_r_0/Qbar vdda1 0.79fF |
| C2313 pd_0/tspc_r_0/Z2 vdda1 1.22fF |
| C2314 pd_0/tspc_r_0/Z1 vdda1 0.67fF |
| C2315 pd_0/DOWN vdda1 10.38fF |
| C2316 pd_0/tspc_r_0/Qbar1 vdda1 1.34fF |
| C2317 pd_0/tspc_r_0/Z3 vdda1 2.12fF |
| C2318 pd_0/DIV vdda1 399.71fF |
| C2319 ashish_0/Gnd vdda1 6.85fF |
| C2320 io_analog[6] vdda1 39.21fF |
| C2321 io_analog[7] vdda1 24.64fF |
| C2322 ashish_0/a_150_n710# vdda1 1.54fF **FLOATING |
| .ends |
