all-components
diff --git a/gds/user_analog_project_wrapper.gds b/gds/user_analog_project_wrapper.gds index 7f81f25..369e5f9 100644 --- a/gds/user_analog_project_wrapper.gds +++ b/gds/user_analog_project_wrapper.gds Binary files differ
diff --git a/mag/and.ext b/mag/and.ext index f5a5eb2..32b36bd 100644 --- a/mag/and.ext +++ b/mag/and.ext
@@ -17,21 +17,20 @@ node "out1" 6488 1253.5 10 20 pdif 0 0 0 0 0 0 0 0 32000 960 83200 2400 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 53200 3340 0 0 136500 4640 0 0 0 0 0 0 0 0 0 0 0 0 node "VDD" 2103 2469.6 -170 -30 nw 0 0 0 0 823200 3640 0 0 6400 320 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 substrate "a_120_n970#" 0 0 120 -970 ppd 0 0 0 0 0 0 0 0 0 0 10000 400 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -cap "Z1" "gnd!" 15.5425 cap "GND" "Z1" 409.78 -cap "OUT" "vdd!" 7.33333 -cap "OUT" "Z1" 43.6452 -cap "OUT" "GND" 198 -cap "B" "Z1" 67.1786 -cap "a_n100_20#" "vdd!" 50.2857 -cap "A" "GND" 57.75 +cap "vdd!" "a_n100_20#" 50.2857 +cap "vdd!" "out1" 11.55 +cap "vdd!" "VDD" 9.25 +cap "Z1" "OUT" 43.6452 +cap "GND" "OUT" 198 +cap "Z1" "B" 67.1786 +cap "GND" "A" 57.75 +cap "Z1" "a_n100_20#" 7.96552 +cap "Z1" "out1" 356.371 +cap "GND" "a_n100_20#" 13.8886 +cap "GND" "out1" 226.769 +cap "gnd!" "Z1" 15.5425 cap "B" "OUT" 8.8 -cap "a_n100_20#" "Z1" 7.96552 -cap "out1" "vdd!" 11.55 -cap "out1" "Z1" 356.371 -cap "a_n100_20#" "GND" 13.8886 -cap "VDD" "vdd!" 9.25 -cap "out1" "GND" 226.769 cap "a_n100_20#" "OUT" 574.768 cap "A" "B" 87.6201 cap "out1" "OUT" 261.752 @@ -43,6 +42,7 @@ cap "out1" "a_n100_20#" 1441.54 cap "VDD" "a_n100_20#" 48.86 cap "VDD" "out1" 6.1975 +cap "vdd!" "OUT" 7.33333 device msubckt sky130_fd_pr__nfet_01v8 480 -670 481 -669 l=30 w=300 "a_120_n970#" "out1" 60 0 "GND" 300 0 "OUT" 300 0 device msubckt sky130_fd_pr__nfet_01v8 230 -670 231 -669 l=30 w=400 "a_120_n970#" "B" 60 0 "Z1" 400 0 "out1" 400 0 device msubckt sky130_fd_pr__nfet_01v8 -20 -670 -19 -669 l=30 w=400 "a_120_n970#" "A" 60 0 "GND" 400 0 "Z1" 400 0
diff --git a/mag/and_pd.ext b/mag/and_pd.ext index d765f6b..c29dad7 100644 --- a/mag/and_pd.ext +++ b/mag/and_pd.ext
@@ -17,8 +17,8 @@ substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 cap "a_n60_n30#" "Out" 277.2 cap "Out1" "Out" 188.1 -cap "Out1" "a_n60_n30#" 1023.37 cap "B" "Out" 8.8 +cap "Out1" "a_n60_n30#" 1023.37 cap "B" "a_n60_n30#" 18.7 cap "VDD" "Out" 1.85 cap "B" "Out1" 271.254
diff --git a/mag/cbank.ext b/mag/cbank.ext index cd40627..fbd7d80 100644 --- a/mag/cbank.ext +++ b/mag/cbank.ext
@@ -26,10 +26,6 @@ node "a_2720_n30#" 133 1402.86 2720 -30 ndif 0 0 0 0 0 0 0 0 19600 560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 19600 560 19600 560 19600 560 642800 4060 0 0 0 0 0 0 node "a_1840_n30#" 120 0 1840 -30 ndif 0 0 0 0 0 0 0 0 19600 560 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 substrate "gnd!" 0 0 4650 -1660 ppd 0 0 0 0 0 0 0 0 0 0 67600 1040 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 482200 8300 403200 6720 403200 6720 1919200 11580 2616000 18040 0 0 0 0 -cap "a_1840_n30#" "li_1840_n30#" 18.13 -cap "v" "li_1840_n30#" 1301.39 -cap "a_2720_n30#" "li_1840_n30#" 435.273 -cap "a_6220_n30#" "v" 1301.39 cap "a_5320_n30#" "v" 1301.39 cap "a_5320_n30#" "a_6220_n30#" 368.308 cap "a_4460_n30#" "v" 1301.39 @@ -38,6 +34,10 @@ cap "a_2720_n30#" "v" 1301.39 cap "a_3600_n30#" "a_4460_n30#" 399 cap "a_2720_n30#" "a_3600_n30#" 281.647 +cap "v" "li_1840_n30#" 1301.39 +cap "a_2720_n30#" "li_1840_n30#" 435.273 +cap "a_1840_n30#" "li_1840_n30#" 18.13 +cap "a_6220_n30#" "v" 1301.39 device csubckt sky130_fd_pr__cap_mim_m3_1 6070 590 6071 591 w=560 l=560 "None" "v" 1920 0 "a_6220_n30#" 1440 0 device csubckt sky130_fd_pr__cap_mim_m3_1 5190 590 5191 591 w=560 l=560 "None" "v" 1920 0 "a_5320_n30#" 1440 0 device csubckt sky130_fd_pr__cap_mim_m3_1 4320 590 4321 591 w=560 l=560 "None" "v" 1920 0 "a_4460_n30#" 1440 0 @@ -49,14 +49,14 @@ cap "switch_1/vcont" "switch_1/vin" 83.635 cap "switch_0/vcont" "switch_0/vout" 4.23077 cap "switch_0/vcont" "switch_0/vin" 83.635 -cap "switch_2/vout" "switch_2/vcont" 4.23077 -cap "switch_2/vin" "switch_2/vcont" 83.635 -cap "switch_4/vout" "switch_4/vcont" 4.23077 -cap "switch_4/vin" "switch_4/vcont" 83.635 -cap "switch_3/vout" "switch_3/vcont" 4.23077 +cap "switch_2/vcont" "switch_2/vout" 4.23077 +cap "switch_2/vcont" "switch_2/vin" 83.635 +cap "switch_4/vcont" "switch_4/vout" 4.23077 +cap "switch_4/vcont" "switch_4/vin" 83.635 +cap "switch_3/vcont" "switch_3/vout" 4.23077 cap "switch_3/vcont" "switch_3/vin" 83.635 -cap "switch_5/vout" "switch_5/vcont" 4.23077 -cap "switch_5/vin" "switch_5/vcont" 83.635 +cap "switch_5/vcont" "switch_5/vout" 4.23077 +cap "switch_5/vcont" "switch_5/vin" 83.635 merge "switch_5/vout" "switch_4/VSUBS" -915.086 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 91320 -1316 93600 0 93600 0 139137 -1408 -72040 -3202 0 0 0 0 merge "switch_4/VSUBS" "switch_4/vout" merge "switch_4/vout" "switch_5/VSUBS"
diff --git a/mag/cp.ext b/mag/cp.ext index cc7ca6f..af806cf 100644 --- a/mag/cp.ext +++ b/mag/cp.ext
@@ -19,11 +19,6 @@ node "a_10_n50#" 3989 2430.18 10 -50 p 0 0 0 0 0 0 0 0 684000 4360 1368000 7960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2779200 17200 0 0 1936200 15780 239200 4200 0 0 0 0 0 0 0 0 0 0 node "vdd!" 16208 127784 -490 -160 nw 0 0 0 0 40009000 27420 0 0 78300 1120 6840000 39800 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 745200 5020 0 0 6275100 44200 960700 13000 348300 5280 348300 5280 3226600 19660 0 0 0 0 substrate "gnd!" 0 0 -370 -2840 ndif 0 0 0 0 0 0 0 0 3419400 21800 81200 1140 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1389600 8600 0 0 3576600 28780 732600 8960 351000 5300 351000 5300 4550400 19920 0 0 0 0 -cap "upbar" "down" 20.625 -cap "a_1710_n2840#" "out" 606.81 -cap "vdd!" "out" 281.2 -cap "vdd!" "a_1710_n2840#" 254.08 -cap "vdd!" "a_10_n50#" 530.297 cap "vdd!" "a_3060_n2840#" 320.4 cap "a_10_n50#" "vbias" 192.9 cap "out" "a_1710_0#" 841.733 @@ -33,7 +28,12 @@ cap "vdd!" "a_3060_0#" 1788.27 cap "a_1710_n2840#" "upbar" 291.6 cap "vdd!" "a_1710_0#" 707.2 +cap "a_1710_n2840#" "out" 606.81 +cap "vdd!" "out" 281.2 +cap "vdd!" "a_1710_n2840#" 254.08 +cap "vdd!" "a_10_n50#" 530.297 cap "a_1710_0#" "down" 320.4 +cap "upbar" "down" 20.625 device msubckt sky130_fd_pr__nfet_01v8 8100 -2840 8101 -2839 l=360 w=1800 "gnd!" "a_1710_0#" 720 0 "a_7110_n2840#" 1800 0 "out" 1800 0 device msubckt sky130_fd_pr__nfet_01v8 6750 -2840 6751 -2839 l=360 w=1800 "gnd!" "down" 720 0 "gnd!" 1800 0 "a_7110_n2840#" 1800 0 device msubckt sky130_fd_pr__nfet_01v8 5400 -2840 5401 -2839 l=360 w=1800 "gnd!" "out" 720 0 "a_3060_n2840#" 1800 0 "gnd!" 1800 0
diff --git a/mag/divider.ext b/mag/divider.ext index 1d8cca6..ad4249a 100644 --- a/mag/divider.ext +++ b/mag/divider.ext
@@ -1,4 +1,4 @@ -timestamp 1640900248 +timestamp 1640711282 version 8.3 tech sky130A style ngspice() @@ -40,49 +40,48 @@ node "w_n140_1520#" 3306 3024 -140 1520 nw 0 0 0 0 1008000 4240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 node "w_2780_1920#" 30753 19421.4 2780 1920 nw 0 0 0 0 6473800 22840 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -cap "mc2" "li_5740_3250#" 22.679 -cap "li_5740_3250#" "vdd" 27.9 -cap "li_3310_1810#" "vdd" 35.39 -cap "li_5740_3250#" "vdd" 27.9 -cap "li_5560_680#" "m1_5770_3360#" 16.875 -cap "li_5560_680#" "li_7140_680#" 437.5 -cap "li_7040_820#" "m1_5770_3360#" 90 -cap "Out" "li_7140_680#" 23.5 -cap "li_5740_3250#" "m1_5770_3360#" 286.375 -cap "vdd" "vdd" 33.5 -cap "mc2" "gnd" 27.9 -cap "li_6130_3350#" "m1_5770_3360#" 136.842 -cap "vdd" "vdd" 51.2353 -cap "vdd" "vdd" 20.1 -cap "mc2" "m1_5770_3360#" 35.7143 -cap "mc2" "li_7140_680#" 61.52 -cap "w_2780_1920#" "li_3310_1810#" 18.0375 -cap "w_2780_1920#" "li_5740_3250#" 72.945 -cap "w_2780_1920#" "li_6130_3350#" 7.215 -cap "w_2780_1920#" "li_2870_2670#" 50.69 +cap "li_3310_1810#" "w_2780_1920#" 18.0375 +cap "li_5740_3250#" "w_2780_1920#" 72.945 +cap "li_5740_3250#" "mc2" 22.679 +cap "li_6130_3350#" "w_2780_1920#" 7.215 cap "w_2780_1920#" "m4_7030_1860#" 1.36 +cap "li_6130_3350#" "li_5740_3250#" 68.1032 cap "w_2780_1920#" "vdd" 0.84 cap "w_2780_1920#" "vdd" 9.82 cap "w_2780_1920#" "vdd" 4.08 cap "w_2780_1920#" "vdd" 8.88 -cap "li_7140_680#" "m1_5770_3360#" 19.2857 -cap "li_3980_680#" "li_5560_680#" 782.5 -cap "li_7040_820#" "li_5560_680#" 15 +cap "li_5740_3250#" "vdd" 27.9 +cap "li_3310_1810#" "vdd" 35.39 +cap "li_5740_3250#" "vdd" 27.9 +cap "mc2" "gnd" 27.9 cap "w_2780_1920#" "m1_5770_3360#" 53.84 -cap "li_5460_820#" "li_3980_680#" 20 -cap "li_5740_3250#" "li_5560_680#" 21.9534 -cap "li_5740_3250#" "li_3980_680#" 22.5 +cap "mc2" "m1_5770_3360#" 35.7143 +cap "li_7140_680#" "mc2" 61.52 +cap "vdd" "vdd" 33.5 +cap "vdd" "vdd" 51.2353 +cap "li_5740_3250#" "m1_5770_3360#" 286.375 +cap "vdd" "vdd" 20.1 +cap "li_6130_3350#" "m1_5770_3360#" 136.842 +cap "li_5560_680#" "li_5740_3250#" 21.9534 cap "li_5560_680#" "m4_7020_30#" 24.425 -cap "li_5740_3250#" "li_5460_820#" 128.305 +cap "li_3980_680#" "li_5740_3250#" 22.5 +cap "li_2870_2670#" "w_2780_1920#" 50.69 cap "li_3980_680#" "gnd" 24.425 cap "li_3980_680#" "gnd" 27.1625 -cap "li_6130_3350#" "li_5740_3250#" 68.1032 +cap "li_5460_820#" "li_5740_3250#" 128.305 +cap "li_7140_680#" "m1_5770_3360#" 19.2857 +cap "li_5560_680#" "m1_5770_3360#" 16.875 +cap "li_5560_680#" "li_7140_680#" 437.5 +cap "li_7040_820#" "m1_5770_3360#" 90 +cap "li_3980_680#" "li_5560_680#" 782.5 +cap "Out" "li_7140_680#" 23.5 +cap "li_7040_820#" "li_5560_680#" 15 +cap "li_5460_820#" "li_3980_680#" 20 +cap "tspc_0/w_n140_n70#" "prescaler_0/tspc_1/a_740_n680#" 6.63 +cap "prescaler_0/tspc_1/Q" "tspc_0/D" 12.6992 +cap "prescaler_0/GND" "tspc_0/w_n140_n70#" 4.08 cap "prescaler_0/tspc_1/a_740_n680#" "tspc_0/D" 4.21875 cap "prescaler_0/tspc_1/Q" "tspc_0/D" 12.6992 -cap "tspc_0/w_n140_n70#" "prescaler_0/GND" 4.08 -cap "tspc_0/w_n140_n70#" "prescaler_0/tspc_1/a_740_n680#" 6.63 -cap "tspc_0/a_630_n680#" "li_5560_680#" 2.72727 -cap "prescaler_0/GND" "tspc_0/a_630_n680#" 3.80769 cap "tspc_0/D" "prescaler_0/m1_2700_2190#" 4.21875 cap "tspc_0/D" "li_5560_680#" 2.25 cap "tspc_0/D" "tspc_0/a_630_n680#" 152.917 @@ -91,63 +90,65 @@ cap "tspc_0/D" "tspc_1/a_300_n150#" 7.39286 cap "tspc_0/D" "tspc_0/Z3" 1.36364 cap "tspc_0/D" "tspc_0/Z2" 141.466 -cap "prescaler_0/tspc_1/Q" "tspc_0/D" 12.6992 -cap "tspc_1/D" "tspc_0/a_630_n680#" 2.72727 -cap "tspc_1/D" "tspc_1/Z4" 33.0938 -cap "tspc_1/Z2" "tspc_1/GND" 7.81579 -cap "tspc_1/a_300_n150#" "tspc_1/Z4" 30.4615 -cap "tspc_0/a_740_n680#" "tspc_0/a_630_n680#" 6.66667 -cap "tspc_0/a_740_n680#" "tspc_1/Z4" 20.5714 -cap "tspc_1/D" "tspc_1/GND" 555.809 -cap "tspc_1/a_300_n150#" "tspc_1/GND" 21.2143 -cap "tspc_0/a_740_n680#" "tspc_1/GND" 65.2632 -cap "tspc_1/D" "tspc_1/Z3" 1.36364 -cap "tspc_1/D" "tspc_1/Z2" 213.298 -cap "tspc_0/a_740_n680#" "tspc_1/Z2" 154.016 -cap "tspc_1/a_300_n150#" "tspc_1/Z1" 7 -cap "tspc_1/a_300_n150#" "tspc_1/Z2" 25.8231 -cap "tspc_1/a_300_n150#" "tspc_1/a_n60_n20#" 36.9286 -cap "tspc_1/a_300_n150#" "tspc_1/D" 70.641 -cap "tspc_0/a_740_n680#" "tspc_1/D" -7.31795 -cap "tspc_0/a_740_n680#" "tspc_1/a_300_n150#" 215.64 -cap "tspc_1/D" "tspc_1/a_630_n680#" 95.25 -cap "tspc_1/w_n140_n70#" "tspc_0/a_740_n680#" 4.695 -cap "tspc_1/w_n140_n70#" "tspc_1/a_300_n150#" -3.33067e-16 +cap "tspc_0/a_630_n680#" "li_5560_680#" 2.72727 +cap "prescaler_0/GND" "tspc_0/a_630_n680#" 3.80769 cap "tspc_1/GND" "tspc_0/a_630_n680#" 3.80769 +cap "tspc_1/a_630_n680#" "tspc_1/D" 95.25 +cap "tspc_1/Z4" "tspc_1/D" 33.0938 +cap "tspc_1/GND" "tspc_1/Z2" 7.81579 +cap "tspc_0/a_630_n680#" "tspc_1/D" 2.72727 +cap "tspc_1/D" "tspc_1/Z3" 1.36364 +cap "tspc_1/GND" "tspc_1/D" 555.809 +cap "tspc_1/D" "tspc_1/Z2" 213.298 +cap "tspc_1/Z4" "tspc_1/a_300_n150#" 30.4615 +cap "tspc_0/a_630_n680#" "tspc_0/a_740_n680#" 6.66667 +cap "tspc_1/Z4" "tspc_0/a_740_n680#" 20.5714 +cap "tspc_1/GND" "tspc_1/a_300_n150#" 21.2143 +cap "tspc_1/Z2" "tspc_1/a_300_n150#" 25.8231 +cap "tspc_1/Z2" "tspc_0/a_740_n680#" 154.016 +cap "tspc_1/GND" "tspc_0/a_740_n680#" 65.2632 +cap "tspc_1/Z1" "tspc_1/a_300_n150#" 7 +cap "tspc_1/a_n60_n20#" "tspc_1/a_300_n150#" 36.9286 +cap "tspc_1/D" "tspc_1/a_300_n150#" 70.641 +cap "tspc_1/D" "tspc_0/a_740_n680#" -7.31795 +cap "tspc_0/a_740_n680#" "tspc_1/a_300_n150#" 215.64 +cap "tspc_1/w_n140_n70#" "tspc_1/a_300_n150#" -3.33067e-16 +cap "tspc_1/w_n140_n70#" "tspc_0/a_740_n680#" 4.695 +cap "tspc_2/a_300_n150#" "tspc_2/w_n140_n70#" -3.33067e-16 +cap "tspc_1/a_740_n680#" "tspc_2/w_n140_n70#" 4.615 +cap "tspc_2/GND" "tspc_1/a_630_n680#" 7.61538 +cap "tspc_2/D" "tspc_2/a_630_n680#" 41.25 +cap "tspc_2/Z2" "tspc_2/GND" 7.81579 +cap "tspc_2/D" "tspc_1/a_630_n680#" 1.21622 +cap "tspc_2/D" "tspc_2/Z4" 35.8248 +cap "tspc_2/D" "tspc_2/GND" 508.356 +cap "tspc_2/a_300_n150#" "tspc_2/Z4" 30.4615 +cap "tspc_1/a_740_n680#" "tspc_2/Z4" 21.1765 +cap "tspc_1/a_740_n680#" "tspc_1/a_630_n680#" 63.8571 +cap "tspc_2/a_300_n150#" "tspc_2/GND" 21.2143 +cap "tspc_1/a_740_n680#" "tspc_2/GND" 118.593 +cap "tspc_2/D" "tspc_2/Z3" 1.36364 +cap "tspc_2/D" "tspc_2/Z2" 309.898 cap "tspc_2/a_300_n150#" "tspc_2/Z2" 25.8231 cap "tspc_1/a_740_n680#" "tspc_2/Z2" 156.315 cap "tspc_2/a_300_n150#" "tspc_2/Z1" 7 -cap "tspc_2/D" "tspc_2/a_630_n680#" 41.25 -cap "tspc_2/D" "tspc_2/Z4" 35.8248 cap "tspc_2/a_300_n150#" "tspc_2/a_n60_n20#" 36.9286 cap "tspc_2/a_300_n150#" "tspc_2/D" 70.641 cap "tspc_1/a_740_n680#" "tspc_2/D" -6.57619 -cap "tspc_2/w_n140_n70#" "tspc_2/a_300_n150#" -3.33067e-16 -cap "tspc_2/w_n140_n70#" "tspc_1/a_740_n680#" 4.615 -cap "tspc_2/GND" "tspc_1/a_630_n680#" 7.61538 -cap "tspc_2/Z2" "tspc_2/GND" 7.81579 -cap "tspc_2/D" "tspc_1/a_630_n680#" 1.21622 -cap "tspc_1/a_740_n680#" "tspc_2/Z4" 21.1765 -cap "tspc_2/D" "tspc_2/GND" 508.356 -cap "tspc_2/a_300_n150#" "tspc_2/Z4" 30.4615 cap "tspc_1/a_740_n680#" "tspc_2/a_300_n150#" 230.89 -cap "tspc_2/D" "tspc_2/Z3" 1.36364 -cap "tspc_2/D" "tspc_2/Z2" 309.898 -cap "tspc_1/a_740_n680#" "tspc_1/a_630_n680#" 63.8571 -cap "tspc_1/a_740_n680#" "tspc_2/GND" 118.593 -cap "tspc_2/a_300_n150#" "tspc_2/GND" 21.2143 cap "tspc_2/a_740_n680#" "tspc_2/a_630_n680#" 118.333 cap "tspc_2/a_740_n680#" "tspc_2/GND" 155.113 cap "tspc_2/a_740_n680#" "tspc_2/Q" 20.775 cap "prescaler_0/nand_0/VDD" "prescaler_0/mc1" 23.03 cap "prescaler_0/nand_0/VDD" "prescaler_0/nand_0/a_n20_20#" 9.24 -cap "prescaler_0/nand_1/VDD" "prescaler_0/GND" 16.32 -cap "prescaler_0/nand_1/VDD" "prescaler_0/mc1" 21.365 -cap "prescaler_0/nand_1/VDD" "prescaler_0/nand_1/a_280_n230#" 40.95 +cap "prescaler_0/mc1" "prescaler_0/nand_1/VDD" 21.365 +cap "prescaler_0/GND" "prescaler_0/tspc_1/a_n60_n20#" 92.731 cap "prescaler_0/tspc_1/a_n60_n20#" "prescaler_0/tspc_1/Q" 19.25 -cap "prescaler_0/tspc_1/a_n60_n20#" "prescaler_0/GND" 92.731 -cap "prescaler_0/tspc_1/a_n60_n20#" "prescaler_0/nand_1/a_280_n230#" 37.52 -cap "prescaler_0/tspc_1/a_n60_n20#" "prescaler_0/nand_1/VDD" 16.2475 +cap "prescaler_0/nand_1/VDD" "prescaler_0/nand_1/a_280_n230#" 40.95 +cap "prescaler_0/nand_1/a_280_n230#" "prescaler_0/tspc_1/a_n60_n20#" 37.52 +cap "prescaler_0/nand_1/VDD" "prescaler_0/tspc_1/a_n60_n20#" 16.2475 +cap "prescaler_0/GND" "prescaler_0/nand_1/VDD" 16.32 +cap "and_0/OUT" "tspc_1/a_n60_n20#" 7.5 cap "tspc_1/a_n60_n20#" "tspc_0/Z2" 10 cap "tspc_1/a_n60_n20#" "prescaler_0/m4_2730_1520#" 10.4433 cap "tspc_1/a_n60_n20#" "prescaler_0/GND" 49.961 @@ -156,57 +157,64 @@ cap "tspc_1/a_n60_n20#" "tspc_1/w_n140_n70#" 9.035 cap "and_0/vdd!" "tspc_0/vdd!" 11 cap "tspc_1/a_n60_n20#" "tspc_0/vdd!" 11.2857 -cap "and_0/OUT" "tspc_1/a_n60_n20#" 7.5 -cap "tspc_1/a_n60_n20#" "li_5740_3250#" 83.7778 -cap "m1_5770_3360#" "tspc_1/w_n140_n70#" -4.42 cap "nor_1/A" "m1_5770_3360#" 14.775 +cap "tspc_1/a_300_n150#" "tspc_1/a_n60_n20#" 56.8559 cap "nor_1/Z1" "m1_5770_3360#" 170.44 -cap "nor_1/a_n40_20#" "li_5740_3250#" 93.75 -cap "nor_1/B" "m1_5770_3360#" 14.775 -cap "nor_1/Out" "m1_5770_3360#" 85.22 -cap "nor_1/a_n40_20#" "m1_5770_3360#" 26.8462 -cap "tspc_1/a_n60_n20#" "tspc_1/a_300_n150#" 56.8559 +cap "tspc_1/a_n60_n20#" "nor_1/a_n40_20#" 432.374 cap "tspc_1/a_n60_n20#" "tspc_1/w_n140_n70#" -1.79856e-14 -cap "nor_1/a_n40_20#" "tspc_1/a_n60_n20#" 432.374 -cap "nor_1/a_n40_20#" "tspc_1/w_n140_n70#" -4.08 +cap "li_5740_3250#" "nor_1/a_n40_20#" 93.75 +cap "m1_5770_3360#" "nor_1/B" 14.775 +cap "m1_5770_3360#" "nor_1/Out" 85.22 +cap "m1_5770_3360#" "nor_1/a_n40_20#" 26.8462 cap "tspc_1/a_740_n680#" "m1_5770_3360#" 2.10938 +cap "m1_5770_3360#" "tspc_1/w_n140_n70#" -4.42 +cap "tspc_1/w_n140_n70#" "nor_1/a_n40_20#" -4.08 +cap "tspc_1/a_n60_n20#" "li_5740_3250#" 83.7778 +cap "tspc_2/Z2" "m1_5770_3360#" 45 cap "tspc_1/a_740_n680#" "m1_5770_3360#" 31.3043 cap "tspc_2/a_n60_n20#" "m1_5770_3360#" 59.3707 cap "nor_1/a_n40_20#" "m1_5770_3360#" -166.637 -cap "tspc_2/a_n60_n20#" "tspc_2/a_300_n150#" 56.8559 cap "tspc_2/w_n140_n70#" "m1_5770_3360#" 12.155 +cap "tspc_2/a_n60_n20#" "tspc_2/a_300_n150#" 56.8559 cap "nor_1/a_n40_20#" "tspc_2/a_n60_n20#" 31.4366 cap "tspc_2/w_n140_n70#" "tspc_2/a_n60_n20#" -0.52 -cap "tspc_2/Z2" "m1_5770_3360#" 45 cap "li_7140_680#" "tspc_2/a_n60_n20#" 13.125 -cap "tspc_2/a_740_n680#" "li_7140_680#" 21.8182 -cap "mc2" "prescaler_0/tspc_2/GND" 211.575 +cap "li_7140_680#" "tspc_2/a_740_n680#" 21.8182 +cap "prescaler_0/tspc_2/GND" "mc2" 211.575 cap "prescaler_0/tspc_2/a_630_n680#" "mc2" 142.175 cap "prescaler_0/tspc_2/a_630_n680#" "mc2" 52.165 cap "prescaler_0/GND" "mc2" 143.403 cap "prescaler_0/tspc_2/Z2" "mc2" 236.68 -cap "prescaler_0/GND" "w_2780_1920#" 3.12 -cap "prescaler_0/nand_1/A" "w_2780_1920#" 3.33 -cap "prescaler_0/nand_1/A" "and_0/a_n100_20#" 1.83333 cap "prescaler_0/nand_1/A" "prescaler_0/GND" 22.72 +cap "w_2780_1920#" "prescaler_0/GND" 3.12 +cap "w_2780_1920#" "prescaler_0/nand_1/A" 3.33 +cap "prescaler_0/nand_1/A" "and_0/a_n100_20#" 1.83333 +cap "nor_0/gnd!" "mc2" 65.22 +cap "mc2" "and_0/Z1" 92.03 +cap "mc2" "prescaler_0/GND" 234.38 +cap "mc2" "and_0/OUT" 46.015 +cap "mc2" "nor_0/Out" 13.94 +cap "mc2" "and_0/B" 13.94 +cap "mc2" "and_0/out1" 59.955 +cap "mc2" "and_0/a_120_n970#" 49.2 +cap "nor_0/gnd!" "prescaler_0/GND" 12.25 +cap "nor_0/gnd!" "nor_0/Out" 14.496 +cap "nor_0/Out" "nor_0/Z1" 11.4391 +cap "and_0/OUT" "and_0/a_n100_20#" 39.6 cap "nor_0/Out" "nor_0/B" 6.6 -cap "nor_0/Out" "prescaler_0/GND" 16.9459 cap "and_0/OUT" "prescaler_0/GND" -20.05 +cap "nor_0/Out" "prescaler_0/GND" 16.9459 cap "and_0/out1" "and_0/OUT" 48.6223 cap "w_2780_1920#" "and_0/OUT" -1.77636e-15 cap "w_2780_1920#" "and_0/B" 1.17 -cap "nor_0/gnd!" "mc2" 65.22 -cap "and_0/Z1" "mc2" 92.03 -cap "and_0/OUT" "mc2" 46.015 -cap "prescaler_0/GND" "mc2" 234.38 -cap "nor_0/Out" "mc2" 13.94 -cap "and_0/B" "mc2" 13.94 -cap "and_0/out1" "mc2" 59.955 -cap "and_0/a_120_n970#" "mc2" 49.2 -cap "prescaler_0/GND" "nor_0/gnd!" 12.25 -cap "nor_0/Out" "nor_0/gnd!" 14.496 -cap "nor_0/Out" "nor_0/Z1" 11.4391 -cap "and_0/OUT" "and_0/a_n100_20#" 39.6 +cap "nor_1/A" "nor_1/gnd!" 65.22 +cap "nor_1/Out" "nor_1/gnd!" 2.53846 +cap "nor_1/GND" "nor_1/gnd!" 11.2881 +cap "nor_0/B" "nor_1/a_n40_20#" 12.72 +cap "nor_1/Out" "nor_0/Z1" 181.56 +cap "nor_1/A" "nor_1/Out" 163.742 +cap "nor_1/B" "nor_1/Out" 41.7957 +cap "nor_1/Out" "nor_0/a_n40_20#" 90.78 cap "nor_0/Out" "nor_1/Out" 90.78 cap "nor_0/Out" "nor_0/Z1" 11.4391 cap "nor_1/GND" "nor_1/A" 440.796 @@ -218,25 +226,17 @@ cap "nor_0/B" "nor_1/Out" 127.077 cap "w_2780_1920#" "nor_1/Out" 7.41 cap "nor_0/B" "nor_1/B" 12.6816 +cap "nor_0/B" "nor_1/Z1" 85.22 cap "nor_0/A" "nor_1/GND" 1.28205 cap "nor_0/a_460_n430#" "nor_1/A" 49.2 cap "nor_0/B" "nor_0/Out" 6.6 cap "nor_0/B" "nor_0/A" 58.3333 cap "w_2780_1920#" "nor_0/B" -2.21 cap "w_2780_1920#" "nor_0/A" 0.99 -cap "nor_1/gnd!" "nor_1/A" 65.22 -cap "nor_1/gnd!" "nor_1/Out" 2.53846 -cap "nor_1/gnd!" "nor_1/GND" 11.2881 -cap "nor_1/a_n40_20#" "nor_0/B" 12.72 -cap "nor_1/Z1" "nor_0/B" 85.22 -cap "nor_1/Out" "nor_0/a_n40_20#" 90.78 -cap "nor_1/Out" "nor_0/Z1" 181.56 -cap "nor_1/A" "nor_1/Out" 163.742 -cap "nor_1/B" "nor_1/Out" 41.7957 -cap "nor_1/a_n40_20#" "m1_5770_3360#" -162.86 cap "w_2780_1920#" "m1_5770_3360#" -0.26 -cap "nor_1/A" "nor_1/GND" -54.6596 +cap "nor_1/a_n40_20#" "m1_5770_3360#" -162.86 cap "nor_1/A" "nor_1/Out" 16.2969 +cap "nor_1/A" "nor_1/GND" -54.6596 cap "nor_1/B" "nor_1/A" 0.868421 merge "and_0/GND" "nor_1/GND" -278.645 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 92500 -2320 0 0 0 0 merge "nor_1/GND" "m4_5770_3730#"
diff --git a/mag/nand.ext b/mag/nand.ext index a2ece37..95df739 100644 --- a/mag/nand.ext +++ b/mag/nand.ext
@@ -16,27 +16,27 @@ node "A" 1521 380.56 30 -230 p 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 32500 2060 0 0 9600 480 0 0 0 0 0 0 0 0 0 0 0 0 node "VDD" 2047 1224 -80 -20 nw 0 0 0 0 408000 2560 0 0 3600 240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 substrate "a_490_n530#" 0 0 490 -530 ppd 0 0 0 0 0 0 0 0 0 0 8100 360 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -cap "z1" "gnd!" 5.7957 -cap "OUT" "gnd!" 26.819 -cap "GND" "z1" 159.5 -cap "OUT" "vdd!" 59.1643 -cap "a_n20_20#" "vdd!" 13.8947 -cap "OUT" "z1" 210.754 -cap "OUT" "GND" 22 -cap "a_n20_20#" "z1" 8.55556 -cap "a_280_n230#" "z1" 70.125 -cap "a_n20_20#" "GND" 8.55556 -cap "A" "z1" 8.25 -cap "a_n20_20#" "OUT" 838.2 -cap "A" "GND" 57.75 -cap "a_280_n230#" "OUT" 150.608 -cap "a_280_n230#" "a_n20_20#" 13.0842 -cap "A" "OUT" 9.74286 -cap "A" "a_n20_20#" 13.0842 +cap "gnd!" "OUT" 26.819 cap "A" "a_280_n230#" 81.6947 -cap "VDD" "vdd!" 5.92 -cap "VDD" "OUT" 2.96 -cap "VDD" "a_n20_20#" 21.8 +cap "a_n20_20#" "OUT" 838.2 +cap "vdd!" "VDD" 5.92 +cap "z1" "a_280_n230#" 70.125 +cap "z1" "A" 8.25 +cap "GND" "A" 57.75 +cap "GND" "z1" 159.5 +cap "OUT" "VDD" 2.96 +cap "OUT" "a_280_n230#" 150.608 +cap "a_n20_20#" "VDD" 21.8 +cap "a_n20_20#" "a_280_n230#" 13.0842 +cap "OUT" "A" 9.74286 +cap "a_n20_20#" "A" 13.0842 +cap "vdd!" "OUT" 59.1643 +cap "gnd!" "z1" 5.7957 +cap "vdd!" "a_n20_20#" 13.8947 +cap "z1" "OUT" 210.754 +cap "GND" "OUT" 22 +cap "z1" "a_n20_20#" 8.55556 +cap "GND" "a_n20_20#" 8.55556 device msubckt sky130_fd_pr__nfet_01v8 310 -450 311 -449 l=30 w=200 "a_490_n530#" "a_280_n230#" 60 0 "z1" 200 0 "OUT" 200 0 device msubckt sky130_fd_pr__nfet_01v8 60 -450 61 -449 l=30 w=200 "a_490_n530#" "A" 60 0 "GND" 200 0 "z1" 200 0 device msubckt sky130_fd_pr__pfet_01v8 310 20 311 21 l=30 w=400 "VDD" "a_280_n230#" 60 0 "a_n20_20#" 400 0 "OUT" 400 0
diff --git a/mag/nor.ext b/mag/nor.ext index d4cdf5e..8f809c8 100644 --- a/mag/nor.ext +++ b/mag/nor.ext
@@ -16,26 +16,26 @@ node "A" 2231 379.695 -40 -100 p 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 48700 3040 0 0 9200 460 0 0 0 0 0 0 0 0 0 0 0 0 node "VDD" 3662 2250 -110 -30 nw 0 0 0 0 750000 3700 0 0 10000 400 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 substrate "a_460_n430#" 0 0 460 -430 ppd 0 0 0 0 0 0 0 0 0 0 14400 480 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -cap "a_n40_20#" "GND" 9.625 -cap "B" "GND" 39.7045 +cap "GND" "Out" 453.75 +cap "vdd!" "Z1" 15.4 +cap "GND" "Z1" 9.625 +cap "GND" "a_n40_20#" 9.625 +cap "GND" "B" 39.7045 +cap "GND" "A" 19.25 +cap "vdd!" "VDD" 13.32 +cap "gnd!" "GND" 21.9035 +cap "Z1" "Out" 779.396 cap "a_n40_20#" "Out" 99 -cap "A" "GND" 19.25 cap "a_n40_20#" "Z1" 749.833 -cap "VDD" "vdd!" 13.32 cap "B" "Out" 246.8 cap "A" "Out" 8.8 cap "B" "Z1" 57.75 cap "VDD" "Out" 2.3125 -cap "VDD" "Z1" 2.775 cap "A" "a_n40_20#" 57.75 +cap "VDD" "Z1" 2.775 cap "VDD" "a_n40_20#" 16.2425 cap "A" "B" 72.9302 -cap "GND" "gnd!" 21.9035 -cap "Out" "gnd!" 79.8251 -cap "Out" "GND" 453.75 -cap "Z1" "vdd!" 15.4 -cap "Z1" "GND" 9.625 -cap "Z1" "Out" 779.396 +cap "gnd!" "Out" 79.8251 device msubckt sky130_fd_pr__nfet_01v8 290 -420 291 -419 l=30 w=200 "a_460_n430#" "B" 60 0 "GND" 200 0 "Out" 200 0 device msubckt sky130_fd_pr__nfet_01v8 40 -420 41 -419 l=30 w=200 "a_460_n430#" "A" 60 0 "GND" 200 0 "Out" 200 0 device msubckt sky130_fd_pr__pfet_01v8 290 20 291 21 l=30 w=900 "VDD" "B" 60 0 "Z1" 900 0 "Out" 900 0
diff --git a/mag/pd.ext b/mag/pd.ext index 35bea11..2df0def 100644 --- a/mag/pd.ext +++ b/mag/pd.ext
@@ -17,69 +17,69 @@ node "VDD" 76 1878.87 60 -770 v0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3200 320 12800 640 16400 720 20000 800 213800 7140 0 0 0 0 node "VDD" 22177 1894.2 0 1160 nw 0 0 0 0 631400 6180 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 +cap "VDD" "VDD" 0.48 cap "R" "GND" 53.75 +cap "m1_2010_600#" "UP" 4.5 +cap "R" "UP" 72 cap "DOWN" "GND" 50.15 cap "VDD" "GND" 113.9 -cap "m1_2010_600#" "UP" 4.5 cap "VDD" "DIV" 27.9 -cap "R" "UP" 72 cap "VDD" "REF" 27.9 cap "DOWN" "UP" 101.25 cap "DOWN" "m1_2010_600#" 41.625 cap "DOWN" "R" 185.417 -cap "VDD" "VDD" 0.48 -cap "tspc_r_1/VDD" "tspc_r_1/Z3" 10.9091 -cap "tspc_r_0/z5" "tspc_r_1/z5" 4.86486 -cap "tspc_r_0/GND" "tspc_r_1/Z4" 6.66667 -cap "tspc_r_1/VDD" "tspc_r_1/clk" 62.5 -cap "tspc_r_1/VDD" "tspc_r_1/R" 100 -cap "tspc_r_0/GND" "tspc_r_1/R" 80.745 -cap "tspc_r_0/Z4" "tspc_r_1/Z4" 9.72973 cap "tspc_r_1/VDD" "tspc_r_1/Z2" 72 -cap "tspc_r_0/GND" "tspc_r_1/VDD" 53.6 cap "tspc_r_1/R" "tspc_r_1/Z3" 148.04 -cap "tspc_r_0/GND" "tspc_r_0/Z4" 6.66667 -cap "tspc_r_0/GND" "tspc_r_0/z5" 6.66667 +cap "tspc_r_0/GND" "tspc_r_1/Z4" 6.66667 +cap "tspc_r_0/GND" "tspc_r_1/R" 80.745 +cap "tspc_r_1/VDD" "tspc_r_1/Z3" 10.9091 +cap "tspc_r_1/VDD" "tspc_r_1/R" 100 cap "tspc_r_0/z5" "tspc_r_1/z5" 4.86486 -cap "tspc_r_0/GND" "tspc_r_1/Q" 38.8765 -cap "tspc_r_0/GND" "tspc_r_1/z5" 6.66667 +cap "tspc_r_0/GND" "tspc_r_1/VDD" 53.6 +cap "tspc_r_1/VDD" "tspc_r_1/clk" 62.5 +cap "tspc_r_0/Z4" "tspc_r_1/Z4" 9.72973 +cap "tspc_r_0/GND" "tspc_r_0/Z4" 6.66667 cap "tspc_r_0/GND" "tspc_r_1/R" 9.25926 cap "tspc_r_0/z5" "tspc_r_1/z5" 4.86486 -cap "tspc_r_0/VDD" "tspc_r_0/GND" 53.6 -cap "tspc_r_0/clk" "tspc_r_0/R" 103.99 -cap "tspc_r_0/VDD" "tspc_r_0/R" 66.6667 -cap "tspc_r_0/GND" "tspc_r_1/Z4" 6.66667 -cap "tspc_r_0/Z4" "tspc_r_1/Z4" 9.72973 -cap "tspc_r_0/VDD" "tspc_r_0/Z2" 72 -cap "tspc_r_0/w_n290_n40#" "tspc_r_0/Z2" 12.775 -cap "tspc_r_0/VDD" "tspc_r_0/Z3" 10.9091 -cap "tspc_r_0/GND" "tspc_r_0/Z4" 6.66667 -cap "tspc_r_0/R" "tspc_r_0/GND" 80.745 -cap "tspc_r_0/Z3" "tspc_r_0/R" 155.78 -cap "tspc_r_0/VDD" "tspc_r_0/clk" 44.4444 -cap "tspc_r_0/w_n290_n40#" "tspc_r_0/VDD" 41.43 -cap "and_pd_0/Out1" "tspc_r_0/Qbar" 51.2286 -cap "and_pd_0/A" "tspc_r_0/Qbar" 17.9186 -cap "and_pd_0/VDD" "tspc_r_0/VDD" 30.4 -cap "and_pd_0/A" "and_pd_0/Out1" 72.925 -cap "tspc_r_0/Q" "and_pd_0/Out1" 77.035 -cap "tspc_r_0/Q" "and_pd_0/A" 244.523 +cap "tspc_r_0/GND" "tspc_r_1/z5" 6.66667 cap "tspc_r_0/GND" "tspc_r_0/z5" 6.66667 -cap "tspc_r_0/R" "tspc_r_0/GND" 25.3883 +cap "tspc_r_0/GND" "tspc_r_1/Q" 38.8765 +cap "tspc_r_0/z5" "tspc_r_1/z5" 4.86486 +cap "tspc_r_0/GND" "tspc_r_0/Z4" 6.66667 +cap "tspc_r_0/VDD" "tspc_r_0/clk" 44.4444 +cap "tspc_r_0/R" "tspc_r_0/GND" 80.745 +cap "tspc_r_0/w_n290_n40#" "tspc_r_0/VDD" 41.43 +cap "tspc_r_0/Z3" "tspc_r_0/R" 155.78 +cap "tspc_r_0/Z4" "tspc_r_1/Z4" 9.72973 +cap "tspc_r_0/GND" "tspc_r_1/Z4" 6.66667 +cap "tspc_r_0/VDD" "tspc_r_0/GND" 53.6 +cap "tspc_r_0/VDD" "tspc_r_0/R" 66.6667 +cap "tspc_r_0/clk" "tspc_r_0/R" 103.99 +cap "tspc_r_0/w_n290_n40#" "tspc_r_0/Z2" 12.775 +cap "tspc_r_0/VDD" "tspc_r_0/Z2" 72 +cap "tspc_r_0/VDD" "tspc_r_0/Z3" 10.9091 cap "tspc_r_0/GND" "tspc_r_1/z5" 6.66667 cap "tspc_r_0/z5" "tspc_r_1/z5" 4.86486 +cap "tspc_r_0/GND" "tspc_r_0/z5" 6.66667 +cap "tspc_r_0/R" "tspc_r_0/GND" 25.3883 +cap "tspc_r_0/Qbar" "and_pd_0/Z1" 21.0517 cap "tspc_r_0/Qbar" "tspc_r_0/GND" 44.4044 +cap "and_pd_0/A" "and_pd_0/Z1" 193.89 cap "tspc_r_0/Qbar" "tspc_r_0/R" 31.025 cap "tspc_r_0/VDD" "tspc_r_0/GND" 8.88178e-16 cap "and_pd_0/A" "tspc_r_0/GND" 269.694 cap "and_pd_0/Out1" "tspc_r_0/R" 27.725 +cap "tspc_r_0/VDD" "tspc_r_0/Qbar" 74.25 +cap "and_pd_0/A" "tspc_r_0/Qbar" 17.9186 +cap "and_pd_0/Out1" "tspc_r_0/Qbar" 51.2286 cap "and_pd_0/A" "tspc_r_0/R" 86.5 cap "tspc_r_0/Q" "tspc_r_0/R" 323.962 cap "tspc_r_0/Qbar1" "tspc_r_0/R" 287.105 +cap "and_pd_0/A" "and_pd_0/Out1" 72.925 cap "tspc_r_0/Z3" "tspc_r_0/R" 56.18 -cap "tspc_r_0/Qbar" "and_pd_0/Z1" 21.0517 -cap "and_pd_0/A" "and_pd_0/Z1" 193.89 -cap "tspc_r_0/VDD" "tspc_r_0/Qbar" 74.25 +cap "tspc_r_0/Q" "and_pd_0/Out1" 77.035 +cap "tspc_r_0/Q" "and_pd_0/A" 244.523 +cap "and_pd_0/VDD" "tspc_r_0/VDD" 30.4 cap "and_pd_0/GND" "DOWN" 113.28 cap "and_pd_0/Out" "DOWN" 90.78 cap "and_pd_0/Out" "and_pd_0/GND" 16.129
diff --git a/mag/prescaler.ext b/mag/prescaler.ext index 7a09d08..f3cc86a 100644 --- a/mag/prescaler.ext +++ b/mag/prescaler.ext
@@ -1,4 +1,4 @@ -timestamp 1640900248 +timestamp 1640629925 version 8.3 tech sky130A style ngspice() @@ -29,135 +29,135 @@ node "w_490_520#" 72250 51 490 520 nw 0 0 0 0 17000 1740 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 node "w_1990_520#" 42668 312 1990 520 nw 0 0 0 0 104000 3360 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -cap "w_1990_520#" "m2_970_460#" 33.345 -cap "li_n310_330#" "li_3590_420#" 92.2845 -cap "li_n310_330#" "mc1" 37.515 -cap "w_1990_520#" "mc1" 1.56 +cap "Out" "m1_2700_2190#" 27.465 +cap "m1_2700_2190#" "mc1" 63.2343 +cap "m2_970_460#" "li_1980_2130#" 138.025 +cap "li_3590_420#" "li_n310_330#" 92.2845 +cap "w_1990_520#" "VDD" 0.66 +cap "clk" "li_n310_330#" 28.72 +cap "m2_970_460#" "w_1990_520#" 33.345 +cap "clk" "li_3590_420#" 168.462 +cap "mc1" "w_1990_520#" 1.56 +cap "mc1" "li_n310_330#" 37.515 +cap "m2_970_460#" "li_3590_420#" 183.333 +cap "m1_2700_2190#" "li_3590_420#" 23.5 +cap "m2_970_460#" "li_2030_420#" 17.38 +cap "clk" "li_450_280#" 28.72 +cap "Out" "li_3590_420#" 716.418 +cap "Out" "li_2030_420#" 197.97 cap "GND" "m4_2730_1520#" 23.6471 cap "m2_970_460#" "VDD" 42 -cap "Out" "GND" 27.9 cap "mc1" "m4_2730_1520#" 23.175 cap "mc1" "VDD" 41.675 -cap "li_3590_420#" "clk" 168.462 cap "mc1" "m4_350_1060#" 84.575 -cap "li_3590_420#" "m2_970_460#" 183.333 -cap "Out" "m1_2700_2190#" 27.465 -cap "li_3590_420#" "m1_2700_2190#" 23.5 -cap "li_2030_420#" "m2_970_460#" 17.38 -cap "li_450_280#" "clk" 28.72 -cap "li_3590_420#" "Out" 716.418 -cap "mc1" "m2_970_460#" 37.515 -cap "li_2030_420#" "Out" 197.97 -cap "mc1" "m1_2700_2190#" 63.2343 -cap "w_1990_520#" "VDD" 0.66 -cap "li_n310_330#" "clk" 28.72 -cap "li_1980_2130#" "m2_970_460#" 138.025 +cap "Out" "GND" 27.9 +cap "m2_970_460#" "mc1" 37.515 +cap "nand_0/a_280_n230#" "tspc_0/Z4" 106.442 +cap "tspc_0/a_n60_n20#" "nand_0/vdd!" 20.3077 +cap "tspc_0/D" "tspc_0/a_300_n150#" 127.12 +cap "tspc_0/D" "nand_0/gnd!" 15.6873 +cap "tspc_0/Z4" "nand_0/gnd!" 12.1 +cap "tspc_0/D" "tspc_0/Z4" 12.3811 +cap "nand_0/a_280_n230#" "tspc_0/GND" 124.422 +cap "nand_0/a_280_n230#" "nand_0/z1" 153.26 +cap "nand_0/a_280_n230#" "tspc_0/Z3" 75.9225 +cap "nand_0/a_280_n230#" "tspc_0/Z2" 56.16 +cap "tspc_0/D" "nand_0/z1" 2.11538 cap "nand_0/A" "nand_0/a_n20_20#" 44.8462 cap "nand_0/A" "nand_0/a_280_n230#" 13.02 cap "tspc_0/Z1" "nand_0/vdd!" 10.56 cap "tspc_0/a_300_n150#" "nand_0/a_280_n230#" 94.1074 cap "tspc_0/D" "nand_0/a_280_n230#" 165.278 cap "tspc_0/a_300_n150#" "nand_0/A" 17.42 -cap "tspc_0/D" "nand_0/A" 29.5549 cap "tspc_0/D" "tspc_0/a_n60_n20#" 34.1786 -cap "tspc_0/D" "tspc_0/a_300_n150#" 127.12 -cap "nand_0/a_280_n230#" "tspc_0/Z4" 106.442 -cap "tspc_0/D" "nand_0/gnd!" 15.6873 -cap "tspc_0/a_n60_n20#" "nand_0/vdd!" 20.3077 -cap "tspc_0/D" "tspc_0/Z4" 12.3811 -cap "tspc_0/Z4" "nand_0/gnd!" 12.1 -cap "nand_0/a_280_n230#" "nand_0/z1" 153.26 -cap "nand_0/a_280_n230#" "tspc_0/Z3" 75.9225 -cap "nand_0/a_280_n230#" "tspc_0/GND" 124.422 -cap "nand_0/a_280_n230#" "tspc_0/Z2" 56.16 -cap "tspc_0/D" "nand_0/z1" 2.11538 -cap "li_3590_420#" "tspc_0/Z3" 57.62 -cap "tspc_0/Z3" "tspc_0/a_300_n150#" 198.42 -cap "tspc_0/GND" "tspc_0/a_630_n680#" 17.3347 -cap "tspc_1/Z2" "tspc_0/GND" 16.9342 -cap "tspc_0/Q" "tspc_1/Z3" 3.50402 -cap "tspc_0/Q" "tspc_1/Z4" 102.17 -cap "tspc_0/a_740_n680#" "tspc_1/Z4" 4.09091 +cap "tspc_0/D" "nand_0/A" 29.5549 +cap "tspc_1/Z4" "li_3590_420#" 55.1 cap "tspc_0/Q" "tspc_0/GND" 51.0882 +cap "tspc_0/Q" "tspc_1/Z2" 85.89 cap "tspc_0/a_740_n680#" "tspc_1/Z2" 5.4 cap "tspc_0/Q" "tspc_1/Z1" 26.5569 -cap "tspc_0/Q" "tspc_1/Z2" 85.89 cap "tspc_0/Q" "tspc_1/a_n60_n20#" 40.081 -cap "li_3590_420#" "tspc_0/a_300_n150#" 83.0378 +cap "tspc_0/a_n60_n20#" "tspc_1/a_n60_n20#" 25.1842 cap "tspc_0/a_740_n680#" "tspc_0/Q" 32.1861 -cap "tspc_1/Z4" "li_3590_420#" 55.1 +cap "tspc_0/a_300_n150#" "tspc_0/Q" 177.533 +cap "tspc_0/a_300_n150#" "tspc_0/a_740_n680#" 129.16 cap "tspc_0/GND" "li_3590_420#" 198.939 +cap "tspc_0/a_300_n150#" "tspc_0/Z3" 198.42 cap "tspc_0/Z4" "li_3590_420#" 107.677 cap "tspc_1/Z2" "li_3590_420#" 43.32 cap "tspc_0/Q" "li_3590_420#" 142.71 -cap "tspc_0/Q" "tspc_0/a_300_n150#" 177.533 cap "tspc_0/a_740_n680#" "li_3590_420#" 150.46 -cap "tspc_1/a_n60_n20#" "tspc_0/a_n60_n20#" 25.1842 -cap "tspc_0/a_740_n680#" "tspc_0/a_300_n150#" 129.16 -cap "tspc_1/Q" "tspc_1/Z4" 104.585 -cap "tspc_1/Q" "tspc_1/GND" 218.86 -cap "tspc_1/a_740_n680#" "tspc_1/Q" 175.043 -cap "tspc_1/Z3" "tspc_1/Q" 156.507 -cap "tspc_1/Z2" "tspc_1/Q" 12.84 -cap "tspc_0/Q" "tspc_1/GND" 39.1 -cap "tspc_0/Q" "tspc_1/Z4" 78.2567 -cap "tspc_1/a_300_n150#" "tspc_1/Q" 68.7785 -cap "tspc_0/Q" "tspc_1/Q" 50.6 -cap "tspc_0/Q" "tspc_1/a_740_n680#" 82.65 -cap "tspc_0/Q" "tspc_1/Z3" 59.529 -cap "tspc_0/Q" "tspc_1/Z2" 9.99 +cap "tspc_0/Z3" "li_3590_420#" 57.62 +cap "tspc_0/Q" "tspc_1/Z3" 3.50402 +cap "tspc_0/a_740_n680#" "tspc_1/Z4" 4.09091 +cap "tspc_0/Q" "tspc_1/Z4" 102.17 +cap "tspc_0/a_300_n150#" "li_3590_420#" 83.0378 +cap "tspc_0/GND" "tspc_0/a_630_n680#" 17.3347 +cap "tspc_1/Z2" "tspc_0/GND" 16.9342 cap "tspc_0/Q" "tspc_1/a_300_n150#" 179.587 cap "tspc_1/Z4" "tspc_0/a_740_n680#" 1.92857 +cap "tspc_1/Z2" "tspc_1/Q" 12.84 +cap "tspc_0/Q" "tspc_1/GND" 39.1 +cap "tspc_0/Q" "tspc_1/Q" 50.6 +cap "tspc_0/Q" "tspc_1/Z4" 78.2567 +cap "tspc_1/a_300_n150#" "tspc_1/Q" 68.7785 +cap "tspc_0/Q" "tspc_1/a_740_n680#" 82.65 +cap "tspc_0/Q" "tspc_1/Z3" 59.529 +cap "tspc_1/Q" "tspc_1/GND" 218.86 +cap "tspc_1/Q" "tspc_1/Z4" 104.585 +cap "tspc_1/a_740_n680#" "tspc_1/Q" 175.043 +cap "tspc_1/Z3" "tspc_1/Q" 156.507 +cap "tspc_0/Q" "tspc_1/Z2" 9.99 +cap "tspc_0/a_n60_n20#" "tspc_0/w_n140_n70#" -2.82 cap "tspc_0/Z2" "mc1" 46.8 +cap "mc1" "tspc_0/w_n140_n70#" 9.165 cap "tspc_0/a_n60_n20#" "mc1" 162.542 -cap "tspc_0/w_n140_n70#" "mc1" 9.165 cap "tspc_0/a_n60_n20#" "tspc_0/Z2" 10 cap "tspc_0/a_n60_n20#" "nand_0/OUT" 11.7857 -cap "tspc_2/Q" "tspc_0/a_n60_n20#" 32.5248 -cap "tspc_0/w_n140_n70#" "tspc_0/a_n60_n20#" -2.82 -cap "nand_1/vdd!" "tspc_1/a_n60_n20#" 16.775 +cap "tspc_0/a_n60_n20#" "tspc_2/Q" 32.5248 +cap "tspc_0/Z2" "mc1" 17.4522 +cap "tspc_1/w_n140_n70#" "mc1" 25.74 cap "tspc_1/a_n60_n20#" "tspc_2/Z2" 10 cap "tspc_0/Q" "tspc_1/Z1" 23.4474 -cap "mc1" "tspc_1/Z2" 18 -cap "mc1" "tspc_1/w_n140_n70#" 25.74 +cap "tspc_2/Z2" "mc1" 53.3571 +cap "tspc_1/a_n60_n20#" "mc1" 414.897 +cap "tspc_2/Z1" "nand_1/vdd!" 2.44444 +cap "tspc_1/a_n60_n20#" "nand_1/vdd!" 16.775 +cap "nand_1/a_280_n230#" "nand_1/OUT" 3.66667 +cap "tspc_1/a_n60_n20#" "tspc_1/Z2" 4.35484 +cap "tspc_0/a_300_n150#" "nand_1/OUT" -6.9 +cap "tspc_1/w_n140_n70#" "nand_1/OUT" 3.6075 +cap "tspc_1/Z2" "mc1" 18 +cap "tspc_1/w_n140_n70#" "tspc_0/a_300_n150#" 11.59 cap "nand_1/OUT" "tspc_2/Z1" 42 cap "nand_1/OUT" "tspc_1/a_n60_n20#" 145.242 cap "nand_1/a_280_n230#" "tspc_1/a_n60_n20#" 2.75 -cap "tspc_1/a_n60_n20#" "tspc_1/Z2" 4.35484 cap "tspc_0/a_300_n150#" "tspc_1/a_n60_n20#" 166.667 -cap "tspc_1/w_n140_n70#" "tspc_1/a_n60_n20#" -7.56 -cap "nand_1/a_280_n230#" "nand_1/OUT" 3.66667 -cap "mc1" "tspc_0/Z2" 17.4522 -cap "tspc_0/a_300_n150#" "nand_1/OUT" -6.9 cap "tspc_1/a_n60_n20#" "tspc_0/Q" 63.106 -cap "tspc_1/w_n140_n70#" "nand_1/OUT" 3.6075 -cap "mc1" "tspc_2/Z2" 53.3571 -cap "tspc_1/w_n140_n70#" "tspc_0/a_300_n150#" 11.59 -cap "mc1" "tspc_1/a_n60_n20#" 414.897 -cap "nand_1/vdd!" "tspc_2/Z1" 2.44444 -cap "tspc_1/a_n60_n20#" "tspc_1/a_300_n150#" 1.38889 +cap "tspc_1/w_n140_n70#" "tspc_1/a_n60_n20#" -7.56 +cap "tspc_1/Z2" "tspc_1/a_n60_n20#" 11.9132 cap "nand_1/GND" "tspc_1/a_n60_n20#" 39.5155 -cap "nand_1/a_280_n230#" "tspc_1/a_n60_n20#" 13.125 +cap "tspc_1/a_740_n680#" "nand_1/a_280_n230#" 21.8182 cap "nand_1/A" "tspc_1/a_n60_n20#" 227.695 -cap "tspc_1/w_n140_n70#" "tspc_1/a_n60_n20#" -2.94 +cap "tspc_1/Z2" "nand_1/A" 46.2522 +cap "nand_1/a_280_n230#" "tspc_1/a_n60_n20#" 13.125 cap "nand_1/A" "nand_1/OUT" 22.3793 -cap "tspc_1/w_n140_n70#" "nand_1/A" 9.555 -cap "nand_1/OUT" "tspc_1/vdd!" 7.61538 -cap "tspc_1/a_n60_n20#" "tspc_1/Z2" 11.9132 -cap "nand_1/a_280_n230#" "tspc_1/a_740_n680#" 21.8182 -cap "nand_1/A" "tspc_1/Z2" 46.2522 +cap "tspc_1/a_n60_n20#" "tspc_1/w_n140_n70#" -2.94 +cap "nand_1/A" "tspc_1/w_n140_n70#" 9.555 +cap "tspc_1/a_n60_n20#" "tspc_1/a_300_n150#" 1.38889 +cap "tspc_1/vdd!" "nand_1/OUT" 7.61538 cap "tspc_2/Q" "tspc_2/a_740_n680#" 18.4737 +cap "tspc_2/Z3" "tspc_2/D" 5.25747 +cap "tspc_2/a_300_n150#" "tspc_2/D" 0.18 +cap "tspc_2/w_n140_n70#" "tspc_2/D" 7.215 cap "nand_1/a_280_n230#" "tspc_2/a_n60_n20#" 4.58333 cap "tspc_2/D" "nand_1/gnd!" 111.733 -cap "tspc_2/D" "nand_1/a_280_n230#" 6.11111 cap "tspc_2/D" "nand_1/z1" 20 -cap "tspc_2/D" "tspc_2/Z4" 7.71692 -cap "tspc_2/D" "tspc_2/Z1" 78.2353 cap "tspc_2/D" "tspc_2/a_n60_n20#" 174.4 +cap "tspc_2/D" "tspc_2/Z1" 78.2353 +cap "tspc_2/D" "nand_1/a_280_n230#" 6.11111 +cap "tspc_2/D" "tspc_2/Z4" 7.71692 cap "tspc_2/D" "tspc_2/GND" 7.10543e-15 -cap "tspc_2/a_300_n150#" "tspc_2/D" 0.18 -cap "tspc_2/Z3" "tspc_2/D" 5.25747 -cap "tspc_2/w_n140_n70#" "tspc_2/D" 7.215 cap "nand_1/OUT" "nand_1/z1" 4.58333 merge "tspc_2/GND" "nand_1/GND" -652.42 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 67900 -3600 0 0 0 0 merge "nand_1/GND" "tspc_1/GND"
diff --git a/mag/ro_complete.ext b/mag/ro_complete.ext index 0232523..d7de5b1 100644 --- a/mag/ro_complete.ext +++ b/mag/ro_complete.ext
@@ -18,47 +18,47 @@ node "li_1010_1400#" 88 1456.19 1010 1400 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 38800 1200 19600 560 19600 560 19600 560 196600 4100 0 0 0 0 node "li_7140_1400#" 85 6915.9 7140 1400 li 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 50400 1320 32400 720 2572800 21920 57600 960 57600 960 0 0 0 0 substrate "a_7790_n10640#" 0 0 7790 -10640 ppd 0 0 0 0 0 0 0 0 0 0 1216800 18720 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1036800 17280 1349800 21100 1085200 18160 1085200 18160 3951000 27540 0 0 0 0 -cap "li_4080_1390#" "a5" 77.72 -cap "li_7140_1400#" "a5" 100.96 +cap "a5" "li_4080_1390#" 77.72 +cap "a5" "li_7140_1400#" 100.96 cap "cbank_2/a1" "cbank_2/switch_1/vout" 10.1538 cap "cbank_2/a0" "cbank_2/switch_1/vin" 243.345 cap "cbank_2/a0" "cbank_2/switch_0/vout" 46.5385 cap "cbank_2/a0" "cbank_2/a1" 9.35 -cap "cbank_2/switch_3/vin" "cbank_2/a2" 219.322 -cap "cbank_2/switch_2/vout" "cbank_2/a2" 46.5385 -cap "cbank_2/switch_1/vout" "cbank_2/a1" 36.3846 cap "cbank_2/a2" "cbank_2/a3" 4.95 cap "cbank_2/a1" "cbank_2/a2" 8.63077 -cap "cbank_2/switch_4/vout" "cbank_2/a4" 46.5385 +cap "cbank_2/switch_2/vout" "cbank_2/a2" 46.5385 +cap "cbank_2/switch_3/vin" "cbank_2/a2" 219.322 +cap "cbank_2/a1" "cbank_2/switch_1/vout" 36.3846 +cap "cbank_2/switch_3/vout" "cbank_2/a3" 46.5385 +cap "cbank_2/switch_4/vin" "cbank_2/a3" 203.307 +cap "cbank_2/a4" "cbank_2/a3" 9.61714 cap "a2" "cbank_2/a3" 4.95 -cap "cbank_2/a3" "cbank_2/switch_4/vin" 203.307 -cap "cbank_2/a3" "cbank_2/switch_3/vout" 46.5385 -cap "cbank_2/a3" "cbank_2/a4" 9.61714 +cap "cbank_2/a4" "cbank_2/switch_4/vout" 46.5385 cap "cbank_2/switch_5/vin" "li_7140_1400#" 24 -cap "cbank_2/switch_5/vout" "cbank_2/a5" 46.5385 +cap "cbank_2/a5" "cbank_2/switch_5/vout" 46.5385 cap "cbank_2/a4" "cbank_2/a5" 8.63077 -cap "cbank_1/gnd!" "cbank_2/v" 85.5235 +cap "cbank_2/v" "cbank_1/gnd!" 85.5235 +cap "a0" "cbank_2/v" 53.41 cap "cbank_1/switch_0/vout" "cbank_2/v" 275.882 +cap "a0" "cbank_2/a_2720_n30#" 58.495 cap "cbank_1/switch_0/vout" "a1" 19.5854 cap "cbank_1/switch_1/vin" "a0" 34.1478 cap "cbank_1/switch_0/vout" "a0" 181.38 -cap "a0" "cbank_2/v" 53.41 -cap "a0" "cbank_2/a_2720_n30#" 58.495 cap "cbank_1/switch_3/vin" "a2" 18.7 -cap "a2" "cbank_2/v" 53.41 -cap "a2" "cbank_2/a_4460_n30#" 49.3975 -cap "a1" "cbank_2/v" 53.41 -cap "cbank_1/gnd!" "cbank_2/v" 275.882 cap "cbank_1/switch_2/vin" "a1" 30.2077 cap "cbank_1/gnd!" "a2" 181.38 cap "cbank_1/gnd!" "a1" 207.754 +cap "cbank_2/a_4460_n30#" "a2" 49.3975 +cap "cbank_2/v" "a2" 53.41 +cap "cbank_2/v" "a1" 53.41 +cap "cbank_2/v" "cbank_1/gnd!" 275.882 +cap "a3" "cbank_1/gnd!" 188.986 +cap "a2" "cbank_1/switch_3/vin" 18.7 +cap "cbank_1/gnd!" "cbank_2/v" 275.882 +cap "cbank_1/gnd!" "a4" 62.3432 cap "a3" "cbank_2/v" 53.41 cap "a3" "cbank_2/a_5320_n30#" 43.3325 cap "cbank_1/switch_4/vin" "a3" 35.7 -cap "cbank_1/switch_3/vin" "a2" 18.7 -cap "cbank_1/gnd!" "cbank_2/v" 275.882 -cap "cbank_1/gnd!" "a4" 62.3432 -cap "cbank_1/gnd!" "a3" 188.986 cap "li_7140_1400#" "cbank_2/a_6220_n30#" 126 cap "a4" "li_7140_1400#" 53.41 cap "cbank_1/switch_4/vout" "li_7140_1400#" 230.8 @@ -72,24 +72,24 @@ cap "cbank_1/a0" "cbank_1/a1" 12.8333 cap "cbank_1/a2" "cbank_1/a3" 6.79412 cap "cbank_1/a1" "cbank_1/a2" 11.8462 -cap "cbank_1/gnd!" "cbank_1/a2" 248.36 -cap "cbank_1/gnd!" "cbank_1/a1" 276.047 cap "cbank_1/a2" "cbank_1/switch_3/vin" 91.3 +cap "cbank_1/gnd!" "cbank_1/a2" 248.36 cap "cbank_1/a1" "cbank_1/switch_2/vin" 147.485 -cap "cbank_1/gnd!" "cbank_1/a3" 259.572 +cap "cbank_1/gnd!" "cbank_1/a1" 276.047 cap "cbank_1/switch_3/vin" "a2" 91.3 -cap "cbank_1/a3" "cbank_1/switch_4/vin" 174.3 +cap "cbank_1/a3" "a2" 6.79412 cap "cbank_1/gnd!" "cbank_1/a4" 153.055 cap "cbank_1/a3" "cbank_1/a4" 13.2 -cap "cbank_1/a3" "a2" 6.79412 +cap "cbank_1/gnd!" "cbank_1/a3" 259.572 +cap "cbank_1/a3" "cbank_1/switch_4/vin" 174.3 +cap "cbank_1/a4" "cbank_1/a5" 11.8462 cap "cbank_1/a5" "cbank_1/switch_5/vout" 156.098 cap "cbank_1/a4" "cbank_1/switch_5/vin" 147.485 cap "cbank_1/a4" "cbank_1/switch_5/vout" 106.517 -cap "cbank_1/a4" "cbank_1/a5" 11.8462 cap "cbank_1/v" "cbank_0/gnd!" 46.9 -cap "cbank_1/v" "cbank_1/a0" 53.41 -cap "cbank_1/switch_1/vin" "cbank_1/a0" 287.74 cap "cbank_0/gnd!" "cbank_1/v" 151.29 +cap "cbank_1/a0" "cbank_1/v" 53.41 +cap "cbank_1/a0" "cbank_1/switch_1/vin" 287.74 cap "cbank_1/a2" "cbank_1/v" 53.41 cap "cbank_0/gnd!" "cbank_1/v" 151.29 cap "cbank_1/a2" "cbank_1/switch_3/vin" 261.67 @@ -105,54 +105,54 @@ cap "cbank_0/switch_0/vout" "a1" 41.7195 cap "cbank_0/switch_1/vin" "a0" 128.843 cap "cbank_0/switch_0/vout" "a0" 296.011 +cap "cbank_0/switch_3/vin" "a2" 70.5571 +cap "cbank_0/switch_2/vin" "a1" 113.977 cap "cbank_0/gnd!" "cbank_1/v" 151.29 cap "cbank_0/gnd!" "a2" 296.011 -cap "cbank_0/switch_3/vin" "a2" 70.5571 cap "cbank_0/gnd!" "a1" 343.879 -cap "cbank_0/switch_2/vin" "a1" 113.977 -cap "cbank_1/v" "cbank_0/gnd!" 151.29 cap "cbank_0/switch_4/vin" "a3" 134.7 cap "cbank_0/gnd!" "a4" 122.843 cap "cbank_0/gnd!" "a3" 309.986 cap "cbank_0/switch_3/vin" "a2" 70.5571 -cap "li_4080_1390#" "cbank_0/switch_4/vout" 339.331 +cap "cbank_1/v" "cbank_0/gnd!" 151.29 cap "cbank_0/switch_4/vout" "a5" 187.16 cap "cbank_0/switch_5/vin" "a4" 113.977 cap "cbank_0/switch_4/vout" "a4" 187.143 +cap "li_4080_1390#" "cbank_0/switch_4/vout" 339.331 cap "li_4080_1390#" "a_7790_n10640#" -33.775 cap "li_7140_1400#" "a_7790_n10640#" 67.7 -cap "cbank_0/switch_1/vout" "cbank_0/a1" 26.2514 +cap "cbank_0/a1" "cbank_0/switch_1/vout" 26.2514 cap "cbank_0/a0" "cbank_0/switch_1/vin" 72.0261 cap "cbank_0/a0" "cbank_0/switch_0/vout" 133.728 cap "cbank_0/a0" "cbank_0/a1" 9.9 -cap "cbank_0/switch_2/vin" "cbank_0/a1" 63.7154 -cap "cbank_0/switch_1/vout" "cbank_0/a1" 139.922 cap "cbank_0/a2" "cbank_0/a3" 5.24118 cap "cbank_0/a1" "cbank_0/a2" 9.13846 cap "cbank_0/switch_3/vin" "cbank_0/a2" 39.4429 cap "cbank_0/switch_2/vout" "cbank_0/a2" 133.728 -cap "a2" "cbank_0/switch_3/vin" 39.4429 +cap "cbank_0/switch_2/vin" "cbank_0/a1" 63.7154 +cap "cbank_0/switch_1/vout" "cbank_0/a1" 139.922 cap "a2" "cbank_0/a3" 5.24118 -cap "cbank_0/switch_4/vout" "cbank_0/a4" 92.5551 cap "cbank_0/switch_4/vin" "cbank_0/a3" 75.3 cap "cbank_0/switch_3/vout" "cbank_0/a3" 138.572 -cap "cbank_0/a3" "cbank_0/a4" 10.1829 -cap "li_4080_1390#" "cbank_0/switch_5/vin" 91 +cap "cbank_0/a4" "cbank_0/a3" 10.1829 +cap "cbank_0/switch_3/vin" "a2" 39.4429 +cap "cbank_0/a4" "cbank_0/switch_4/vout" 92.5551 +cap "cbank_0/switch_5/vin" "li_4080_1390#" 91 cap "cbank_0/a5" "cbank_0/switch_5/vout" 93.8699 cap "cbank_0/a4" "cbank_0/switch_5/vin" 63.7154 cap "cbank_0/a4" "cbank_0/switch_4/vout" 46.0167 cap "cbank_0/a4" "cbank_0/a5" 9.13846 cap "li_4080_1390#" "cbank_0/a_6220_n30#" 42 -cap "ro_var_extend_0/out1" "ro_var_extend_0/out1" 120.023 cap "ro_var_extend_0/out3" "ro_var_extend_0/out1" 116.667 cap "ro_var_extend_0/w_n116_n750#" "ro_var_extend_0/out1" 100.15 cap "ro_var_extend_0/gnd" "ro_var_extend_0/out1" 198.749 +cap "ro_var_extend_0/out1" "ro_var_extend_0/out1" 120.023 +cap "ro_var_extend_0/gnd" "ro_var_extend_0/out2" 259.55 cap "ro_var_extend_0/out2" "ro_var_extend_0/out3" 100 cap "ro_var_extend_0/out2" "ro_var_extend_0/out2" 113.031 cap "ro_var_extend_0/w_n116_n750#" "ro_var_extend_0/out2" 184.5 -cap "ro_var_extend_0/gnd" "ro_var_extend_0/out2" 259.55 +cap "ro_var_extend_0/out3" "ro_var_extend_0/gnd" 12.1846 cap "ro_var_extend_0/w_n116_n750#" "ro_var_extend_0/vcont" -11.167 -cap "ro_var_extend_0/gnd" "ro_var_extend_0/out3" 12.1846 merge "cbank_0/a4" "cbank_1/a4" -1641 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 15680 -6020 0 0 0 0 0 0 0 0 0 0 0 0 merge "cbank_1/a4" "cbank_2/a4" merge "cbank_2/a4" "a4"
diff --git a/mag/ro_var_extend.ext b/mag/ro_var_extend.ext index 8a57314..e0705a5 100644 --- a/mag/ro_var_extend.ext +++ b/mag/ro_var_extend.ext
@@ -14,14 +14,14 @@ node "w_n116_n750#" 20519 4163.15 -116 -750 nw 0 0 0 0 319818 3930 0 0 116400 3564 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 37536 2616 1153264 13180 0 0 0 0 0 0 0 0 0 0 node "vdd" 20170 17140.2 -250 320 nw 0 0 0 0 4464300 14320 0 0 35200 860 120000 3000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1276520 16068 0 0 0 0 0 0 0 0 0 0 0 0 substrate "gnd" 0 0 -210 -20 ndif 0 0 0 0 0 0 0 0 60000 1800 117400 3220 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1050720 15848 0 0 0 0 0 0 0 0 0 0 0 0 -cap "vdd" "out2" 235.622 -cap "out3" "out1" 1156.32 -cap "w_n116_n750#" "out1" 566.63 -cap "w_n116_n750#" "out3" 213.319 cap "out1" "out2" 40.8506 cap "w_n116_n750#" "vcont" 140.194 cap "out3" "out2" 1263.05 cap "w_n116_n750#" "out2" 786.728 +cap "out3" "out1" 1156.32 +cap "w_n116_n750#" "out1" 566.63 +cap "vdd" "out2" 235.622 +cap "w_n116_n750#" "out3" 213.319 cap "vdd" "out1" 230.66 cap "vdd" "out3" 230.554 device subckt sky130_fd_pr__cap_var_lvt 5955 -694 5956 -693 l=36 w=200 "w_n116_n750#" "out3" 72 0 "w_n116_n750#" 400 0
diff --git a/mag/switch.ext b/mag/switch.ext index 9a3126c..fadf98e 100644 --- a/mag/switch.ext +++ b/mag/switch.ext
@@ -9,7 +9,7 @@ node "vin" 1082 0 -190 0 ndif 0 0 0 0 0 0 0 0 259200 3240 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 196000 3080 0 0 0 0 0 0 0 0 0 0 0 0 node "vcont" 1139 384.82 -40 1460 p 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 124600 3560 0 0 19600 560 0 0 0 0 0 0 0 0 0 0 0 0 substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -cap "vin" "vcont" 8.25 cap "vin" "vout" 420 -cap "vout" "vcont" 16.5 +cap "vcont" "vout" 16.5 +cap "vcont" "vin" 8.25 device msubckt sky130_fd_pr__nfet_01v8 -10 0 -9 1 l=70 w=1440 "VSUBS" "vcont" 140 0 "vin" 1440 0 "vout" 1440 0
diff --git a/mag/tspc.ext b/mag/tspc.ext index f615b66..c83ce4d 100644 --- a/mag/tspc.ext +++ b/mag/tspc.ext
@@ -21,59 +21,59 @@ node "a_740_n680#" 3851 1353.54 740 -680 ndif 0 0 0 0 0 0 0 0 16000 560 24000 760 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 53200 3440 0 0 51300 2040 67500 3960 0 0 0 0 0 0 0 0 0 0 node "w_n140_n70#" 2649 4440 -140 -70 nw 0 0 0 0 1480000 4960 0 0 9000 380 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 substrate "a_540_n1120#" 0 0 540 -1120 ppd 0 0 0 0 0 0 0 0 0 0 13200 460 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -cap "a_n60_n20#" "Z1" 583.229 -cap "w_n140_n70#" "Z3" 2.3125 -cap "D" "a_300_n150#" 132.679 -cap "a_n60_n20#" "a_300_n150#" 20.3736 -cap "w_n140_n70#" "Z2" 14.44 -cap "a_740_n680#" "a_300_n150#" 12.4103 -cap "a_n60_n20#" "D" 19.4229 -cap "w_n140_n70#" "Z1" 4.1625 -cap "w_n140_n70#" "a_300_n150#" 0.665 -cap "a_740_n680#" "a_n60_n20#" 515.003 +cap "GND" "D" 27.9314 +cap "Z4" "a_300_n150#" 118.945 cap "w_n140_n70#" "a_n60_n20#" 85.4425 +cap "Z4" "D" 97.7372 cap "w_n140_n70#" "a_740_n680#" 18.5775 +cap "a_740_n680#" "a_n60_n20#" 515.003 +cap "D" "a_300_n150#" 132.679 +cap "Z3" "w_n140_n70#" 2.3125 +cap "Z3" "a_n60_n20#" 671.367 +cap "Z2" "w_n140_n70#" 14.44 +cap "Z2" "a_n60_n20#" 359.159 +cap "Z3" "a_740_n680#" 334.495 +cap "Z1" "w_n140_n70#" 4.1625 +cap "Z1" "a_n60_n20#" 583.229 +cap "Z2" "Z3" 161.5 +cap "Z1" "Z3" 62.0085 +cap "Z1" "Z2" 1068.12 +cap "vdd!" "w_n140_n70#" 13.32 +cap "vdd!" "a_n60_n20#" 16.7381 +cap "a_630_n680#" "a_740_n680#" 190.867 +cap "GND" "a_740_n680#" 224.895 +cap "Z4" "a_n60_n20#" 7.7 +cap "a_630_n680#" "Z3" 54.2903 +cap "Q" "w_n140_n70#" 6.845 +cap "a_300_n150#" "w_n140_n70#" 0.665 +cap "Z4" "a_740_n680#" 82.0167 +cap "Q" "a_n60_n20#" 607.82 +cap "a_300_n150#" "a_n60_n20#" 20.3736 +cap "a_630_n680#" "Z2" 6.6 +cap "GND" "Z3" 265.176 +cap "vdd!" "Z1" 13.5882 +cap "Q" "a_740_n680#" 178.823 +cap "a_300_n150#" "a_740_n680#" 12.4103 +cap "D" "a_n60_n20#" 19.4229 +cap "Z4" "Z3" 651.52 +cap "GND" "Z2" 156.712 +cap "Z4" "Z2" 361.112 +cap "Q" "Z3" 52.8649 +cap "Z3" "a_300_n150#" 446.312 +cap "Z4" "Z1" 3.38462 +cap "Z3" "D" 46.1286 +cap "Z2" "a_300_n150#" 110.226 +cap "Z2" "D" 91.0218 +cap "Z1" "D" 26.4 cap "a_630_n680#" "gnd!" 4 cap "Z4" "gnd!" 3 cap "GND" "a_630_n680#" 610.469 cap "Z4" "a_630_n680#" 121.707 cap "Q" "a_630_n680#" 36.6667 cap "Z4" "GND" 441.644 -cap "Z3" "a_630_n680#" 54.2903 +cap "a_630_n680#" "a_300_n150#" 9.625 cap "Q" "GND" 289.808 -cap "Z2" "a_630_n680#" 6.6 -cap "Z3" "GND" 265.176 -cap "Z1" "vdd!" 13.5882 -cap "Z3" "Z4" 651.52 -cap "Z2" "GND" 156.712 -cap "Z2" "Z4" 361.112 -cap "a_300_n150#" "a_630_n680#" 9.625 -cap "Z3" "Q" 52.8649 -cap "a_300_n150#" "GND" 22.7597 -cap "Z1" "Z4" 3.38462 -cap "a_n60_n20#" "vdd!" 16.7381 -cap "D" "GND" 27.9314 -cap "a_300_n150#" "Z4" 118.945 -cap "Z2" "Z3" 161.5 -cap "a_740_n680#" "a_630_n680#" 190.867 -cap "D" "Z4" 97.7372 -cap "Z1" "Z3" 62.0085 -cap "w_n140_n70#" "vdd!" 13.32 -cap "a_740_n680#" "GND" 224.895 -cap "a_n60_n20#" "Z4" 7.7 -cap "Z1" "Z2" 1068.12 -cap "a_300_n150#" "Z3" 446.312 -cap "a_740_n680#" "Z4" 82.0167 -cap "D" "Z3" 46.1286 -cap "a_n60_n20#" "Q" 607.82 -cap "a_300_n150#" "Z2" 110.226 -cap "a_740_n680#" "Q" 178.823 -cap "a_n60_n20#" "Z3" 671.367 -cap "D" "Z2" 91.0218 -cap "D" "Z1" 26.4 -cap "a_n60_n20#" "Z2" 359.159 -cap "w_n140_n70#" "Q" 6.845 -cap "a_740_n680#" "Z3" 334.495 +cap "GND" "a_300_n150#" 22.7597 device msubckt sky130_fd_pr__nfet_01v8 1210 -680 1211 -679 l=30 w=400 "a_540_n1120#" "a_740_n680#" 60 0 "GND" 400 0 "Q" 400 0 device msubckt sky130_fd_pr__nfet_01v8 960 -680 961 -679 l=30 w=200 "a_540_n1120#" "Z3" 60 0 "GND" 200 0 "a_630_n680#" 200 0 device msubckt sky130_fd_pr__nfet_01v8 710 -680 711 -679 l=30 w=200 "a_540_n1120#" "a_300_n150#" 60 0 "a_630_n680#" 200 0 "a_740_n680#" 200 0
diff --git a/mag/tspc_r.ext b/mag/tspc_r.ext index cefe627..3281bc8 100644 --- a/mag/tspc_r.ext +++ b/mag/tspc_r.ext
@@ -21,41 +21,23 @@ node "D" 1470 418.74 -250 -140 p 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 34600 2100 0 0 8000 400 0 0 0 0 0 0 0 0 0 0 0 0 node "w_n290_n40#" 7882 2692.8 -290 -40 nw 0 0 0 0 897600 4960 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -cap "Qbar" "GND" 138.6 -cap "Z2" "Z4" 137.657 cap "VDD" "z5" 6.6 -cap "Z2" "GND" 142.361 cap "Q" "z5" 33 -cap "Z2" "R" 208.97 cap "Qbar1" "z5" 203.056 -cap "VDD" "GND" 17.6 cap "Z3" "z5" 110 -cap "Q" "GND" 263.95 -cap "Z3" "Z4" 201.943 -cap "Qbar1" "GND" 157.761 cap "clk" "z5" 38.3774 -cap "VDD" "Qbar" 237.6 cap "Z1" "Z2" 709.991 -cap "Qbar1" "R" 11.3571 -cap "Z3" "GND" 324.951 -cap "clk" "Z4" 18.15 -cap "Q" "Qbar" 213.204 cap "VDD" "Z2" 95.0921 -cap "Qbar1" "Qbar" 7.54286 -cap "clk" "GND" 37.5833 -cap "Z3" "R" 137.379 cap "VDD" "Z1" 316.564 -cap "D" "GND" 14.4375 -cap "clk" "R" 508.778 cap "Q" "VDD" 334.95 cap "Z3" "Z2" 249.04 -cap "D" "R" 16.14 +cap "Z4" "z5" 42.0885 cap "Qbar1" "VDD" 315.732 cap "Z3" "Z1" 85.3 cap "clk" "Z2" 187.91 +cap "GND" "z5" 558.112 cap "Z3" "VDD" 509.325 cap "clk" "Z1" 170.927 -cap "w_n290_n40#" "Qbar" 1.85 cap "D" "Z2" 47.3222 cap "Qbar1" "Q" 109.835 cap "clk" "VDD" 129.37 @@ -68,14 +50,32 @@ cap "clk" "Qbar1" 121.715 cap "w_n290_n40#" "Q" 1.85 cap "clk" "Z3" 652.716 +cap "Z2" "Z4" 137.657 cap "w_n290_n40#" "Qbar1" 1.82 +cap "Z2" "GND" 142.361 cap "w_n290_n40#" "Z3" 11.56 cap "D" "clk" 31.5485 +cap "Z2" "R" 208.97 cap "w_n290_n40#" "clk" 10.355 -cap "Z4" "z5" 42.0885 -cap "GND" "z5" 558.112 +cap "VDD" "GND" 17.6 +cap "Q" "GND" 263.95 +cap "Z3" "Z4" 201.943 +cap "Qbar1" "GND" 157.761 +cap "VDD" "Qbar" 237.6 +cap "Qbar1" "R" 11.3571 +cap "Z3" "GND" 324.951 +cap "clk" "Z4" 18.15 +cap "Q" "Qbar" 213.204 +cap "Qbar1" "Qbar" 7.54286 +cap "clk" "GND" 37.5833 +cap "Z3" "R" 137.379 +cap "D" "GND" 14.4375 +cap "clk" "R" 508.778 +cap "D" "R" 16.14 +cap "w_n290_n40#" "Qbar" 1.85 cap "GND" "Z4" 527.304 cap "R" "GND" 35.3744 +cap "Qbar" "GND" 138.6 device msubckt sky130_fd_pr__nfet_01v8 1580 -480 1581 -479 l=30 w=180 "VSUBS" "Q" 60 0 "GND" 180 0 "Qbar" 180 0 device msubckt sky130_fd_pr__nfet_01v8 1330 -480 1331 -479 l=30 w=180 "VSUBS" "Qbar1" 60 0 "GND" 180 0 "Q" 180 0 device msubckt sky130_fd_pr__nfet_01v8 1080 -480 1081 -479 l=30 w=180 "VSUBS" "Z3" 60 0 "GND" 180 0 "z5" 180 0
diff --git a/mag/user_analog_project_wrapper.ext b/mag/user_analog_project_wrapper.ext index dbcbb0a..43113d4 100644 --- a/mag/user_analog_project_wrapper.ext +++ b/mag/user_analog_project_wrapper.ext
@@ -1,12 +1,13 @@ -timestamp 1640900248 +timestamp 1640900463 version 8.3 tech sky130A style ngspice() scale 1000 1 500000 resistclasses 4400000 2200000 1700000 3050000 120000 197000 114000 191000 120000 197000 114000 191000 48200 319800 2000000 48200 48200 12200 125 125 47 47 29 5 use divider divider_0 1 0 125466 0 1 682732 -use pd pd_0 1 0 94826 0 1 683320 +use ro_complete ro_complete_0 1 0 10262 0 1 688176 use cp cp_0 1 0 66630 0 1 683860 +use pd pd_0 1 0 94826 0 1 683320 port "io_analog[4]" 41 329294 702300 334294 704800 m5 port "io_analog[4]" 47 318994 702300 323994 704800 m5 port "io_analog[5]" 42 227594 702300 232594 704800 m5 @@ -1399,8 +1400,8 @@ cap "io_analog[4]" "io_analog[4]" 26250 cap "io_clamp_low[2]" "io_clamp_high[2]" 525 cap "io_analog[5]" "io_analog[5]" 26250 -cap "io_analog[6]" "io_clamp_low[2]" 525 cap "io_analog[4]" "io_analog[4]" 21250 +cap "io_analog[6]" "io_clamp_low[2]" 525 cap "io_analog[4]" "io_analog[4]" 21250 cap "io_analog[5]" "io_analog[5]" 26250 cap "io_analog[5]" "io_analog[5]" 21250 @@ -1411,4 +1412,5 @@ cap "io_analog[6]" "io_analog[6]" 21250 merge "divider_0/VSUBS" "pd_0/VSUBS" 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 merge "pd_0/VSUBS" "cp_0/gnd!" -merge "cp_0/gnd!" "VSUBS" +merge "cp_0/gnd!" "ro_complete_0/a_7790_n10640#" +merge "ro_complete_0/a_7790_n10640#" "VSUBS"
diff --git a/mag/user_analog_project_wrapper.mag b/mag/user_analog_project_wrapper.mag index 0400d20..2bafeb5 100644 --- a/mag/user_analog_project_wrapper.mag +++ b/mag/user_analog_project_wrapper.mag
@@ -1,6 +1,6 @@ magic tech sky130A -timestamp 1640900248 +timestamp 1640900463 << metal2 >> rect 262 -400 318 240 rect 853 -400 909 240 @@ -700,18 +700,22 @@ rect -50 0 0 352000 rect 292000 0 292050 352000 rect -50 -50 292050 0 -use divider divider_0 -timestamp 1640900248 -transform 1 0 62733 0 1 341366 -box -185 -70 4395 1990 -use pd pd_0 -timestamp 1640777101 -transform 1 0 47413 0 1 341660 -box -115 -730 1470 690 +use ro_complete ro_complete_0 +timestamp 1640809734 +transform 1 0 5131 0 1 344088 +box 362 -5330 4455 1180 use cp cp_0 timestamp 1640602475 transform 1 0 33315 0 1 341930 box -245 -1715 4500 2030 +use pd pd_0 +timestamp 1640777101 +transform 1 0 47413 0 1 341660 +box -115 -730 1470 690 +use divider divider_0 +timestamp 1640900248 +transform 1 0 62733 0 1 341366 +box -185 -70 4395 1990 << labels >> flabel metal3 s 291760 134615 292400 134671 0 FreeSans 560 0 0 0 gpio_analog[0] port 0 nsew signal bidirectional