dineshannayya | 6f545ba | 2021-11-23 21:22:32 +0530 | [diff] [blame] | 1 | |
| 2 | \rm -rf netlist |
| 3 | \rm -rf logs |
| 4 | \rm -rf reports |
| 5 | mkdir netlist |
| 6 | mkdir logs |
| 7 | mkdir reports |
| 8 | |
| 9 | echo "#################################################" |
| 10 | echo "Genenerating Netlist winout power ports" |
| 11 | echo "#################################################" |
| 12 | export MERGED_LEF_UNPADDED=../lef/merged_unpadded.lef |
| 13 | |
| 14 | export DESIGN_NAME=sar_adc |
| 15 | openroad -exit scripts/or_write_verilog.tcl |
| 16 | |
| 17 | export DESIGN_NAME=wb_interconnect |
| 18 | openroad -exit scripts/or_write_verilog.tcl |
| 19 | |
| 20 | export DESIGN_NAME=syntacore |
| 21 | openroad -exit scripts/or_write_verilog.tcl |
| 22 | |
| 23 | export DESIGN_NAME=qspim |
| 24 | openroad -exit scripts/or_write_verilog.tcl |
| 25 | |
| 26 | export DESIGN_NAME=uart_i2cm_usb_spi |
| 27 | openroad -exit scripts/or_write_verilog.tcl |
| 28 | |
| 29 | export DESIGN_NAME=pinmux |
| 30 | openroad -exit scripts/or_write_verilog.tcl |
| 31 | |
| 32 | export DESIGN_NAME=wb_host |
| 33 | openroad -exit scripts/or_write_verilog.tcl |
| 34 | |
| 35 | sta scripts/sta.tcl | tee logs/sta.log |