| ############################################################################### |
| # Created by write_sdc |
| # Sun Nov 14 09:07:48 2021 |
| ############################################################################### |
| current_design wb_host |
| ############################################################################### |
| # Timing Constraints |
| ############################################################################### |
| create_clock -name wbm_clk_i -period 10.0000 [get_ports {wbm_clk_i}] |
| create_clock -name mem_clk -period 10.0000 [get_ports {mem_clk}] |
| set_clock_uncertainty -rise_from [get_clocks {wbm_clk_i}] -rise_to [get_clocks {wbm_clk_i}] -hold 0.1500 |
| set_clock_uncertainty -rise_from [get_clocks {wbm_clk_i}] -rise_to [get_clocks {wbm_clk_i}] -setup 0.2000 |
| set_clock_uncertainty -rise_from [get_clocks {wbm_clk_i}] -fall_to [get_clocks {wbm_clk_i}] -hold 0.1500 |
| set_clock_uncertainty -rise_from [get_clocks {wbm_clk_i}] -fall_to [get_clocks {wbm_clk_i}] -setup 0.2000 |
| set_clock_uncertainty -fall_from [get_clocks {wbm_clk_i}] -rise_to [get_clocks {wbm_clk_i}] -hold 0.1500 |
| set_clock_uncertainty -fall_from [get_clocks {wbm_clk_i}] -rise_to [get_clocks {wbm_clk_i}] -setup 0.2000 |
| set_clock_uncertainty -fall_from [get_clocks {wbm_clk_i}] -fall_to [get_clocks {wbm_clk_i}] -hold 0.1500 |
| set_clock_uncertainty -fall_from [get_clocks {wbm_clk_i}] -fall_to [get_clocks {wbm_clk_i}] -setup 0.2000 |
| set_clock_uncertainty -rise_from [get_clocks {mem_clk}] -rise_to [get_clocks {mem_clk}] -hold 0.1500 |
| set_clock_uncertainty -rise_from [get_clocks {mem_clk}] -rise_to [get_clocks {mem_clk}] -setup 0.2000 |
| set_clock_uncertainty -rise_from [get_clocks {mem_clk}] -fall_to [get_clocks {mem_clk}] -hold 0.1500 |
| set_clock_uncertainty -rise_from [get_clocks {mem_clk}] -fall_to [get_clocks {mem_clk}] -setup 0.2000 |
| set_clock_uncertainty -fall_from [get_clocks {mem_clk}] -rise_to [get_clocks {mem_clk}] -hold 0.1500 |
| set_clock_uncertainty -fall_from [get_clocks {mem_clk}] -rise_to [get_clocks {mem_clk}] -setup 0.2000 |
| set_clock_uncertainty -fall_from [get_clocks {mem_clk}] -fall_to [get_clocks {mem_clk}] -hold 0.1500 |
| set_clock_uncertainty -fall_from [get_clocks {mem_clk}] -fall_to [get_clocks {mem_clk}] -setup 0.2000 |
| set_clock_groups -name async_clock -asynchronous \ |
| -group [get_clocks {mem_clk}]\ |
| -group [get_clocks {wbm_clk_i}] -comment {Async Clock group} |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[0]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[10]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[11]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[12]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[13]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[14]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[15]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[16]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[17]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[18]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[19]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[1]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[20]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[21]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[22]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[23]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[24]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[25]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[26]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[27]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[28]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[29]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[2]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[30]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[31]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[3]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[4]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[5]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[6]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[7]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[8]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_adr_i[9]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_cyc_i}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[0]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[10]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[11]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[12]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[13]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[14]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[15]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[16]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[17]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[18]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[19]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[1]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[20]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[21]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[22]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[23]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[24]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[25]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[26]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[27]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[28]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[29]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[2]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[30]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[31]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[3]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[4]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[5]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[6]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[7]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[8]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_i[9]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_rst_i}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_sel_i[0]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_sel_i[1]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_sel_i[2]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_sel_i[3]}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_stb_i}] |
| set_input_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_we_i}] |
| |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[0]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[10]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[11]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[12]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[13]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[14]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[15]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[16]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[17]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[18]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[19]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[1]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[20]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[21]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[22]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[23]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[24]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[25]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[26]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[27]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[28]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[29]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[2]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[30]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[31]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[3]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[4]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[5]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[6]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[7]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[8]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_adr_i[9]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_cyc_i}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[0]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[10]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[11]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[12]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[13]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[14]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[15]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[16]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[17]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[18]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[19]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[1]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[20]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[21]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[22]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[23]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[24]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[25]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[26]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[27]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[28]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[29]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[2]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[30]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[31]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[3]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[4]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[5]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[6]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[7]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[8]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_i[9]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_rst_i}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_sel_i[0]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_sel_i[1]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_sel_i[2]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_sel_i[3]}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_stb_i}] |
| set_input_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_we_i}] |
| |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_ack_o}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[0]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[10]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[11]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[12]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[13]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[14]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[15]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[16]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[17]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[18]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[19]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[1]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[20]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[21]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[22]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[23]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[24]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[25]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[26]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[27]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[28]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[29]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[2]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[30]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[31]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[3]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[4]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[5]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[6]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[7]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[8]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_dat_o[9]}] |
| set_output_delay 5.0000 -clock [get_clocks {wbm_clk_i}] -max -add_delay [get_ports {wbm_err_o}] |
| |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_ack_o}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[0]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[10]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[11]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[12]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[13]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[14]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[15]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[16]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[17]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[18]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[19]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[1]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[20]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[21]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[22]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[23]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[24]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[25]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[26]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[27]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[28]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[29]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[2]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[30]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[31]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[3]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[4]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[5]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[6]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[7]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[8]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_dat_o[9]}] |
| set_output_delay 1.0000 -clock [get_clocks {wbm_clk_i}] -min -add_delay [get_ports {wbm_err_o}] |
| |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_a[8]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_a[7]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_a[6]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_a[5]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_a[4]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_a[3]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_a[2]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_a[1]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_a[0]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_b[8]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_b[7]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_b[6]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_b[5]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_b[4]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_b[3]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_b[2]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_b[1]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_b[0]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[31]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[30]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[29]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[28]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[27]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[26]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[25]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[24]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[23]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[22]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[21]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[20]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[19]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[18]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[17]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[16]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[15]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[14]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[13]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[12]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[11]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[10]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[9]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[8]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[7]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[6]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[5]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[4]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[3]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[2]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[1]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[0]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_mask_b[3]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_mask_b[2]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_mask_b[1]}] |
| set_output_delay -max 4 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_mask_b[0]}] |
| |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_a[8]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_a[7]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_a[6]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_a[5]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_a[4]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_a[3]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_a[2]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_a[1]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_a[0]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_b[8]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_b[7]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_b[6]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_b[5]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_b[4]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_b[3]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_b[2]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_b[1]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_addr_b[0]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[31]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[30]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[29]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[28]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[27]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[26]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[25]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[24]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[23]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[22]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[21]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[20]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[19]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[18]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[17]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[16]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[15]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[14]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[13]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[12]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[11]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[10]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[9]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[8]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[7]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[6]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[5]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[4]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[3]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[2]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[1]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_din_b[0]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_mask_b[3]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_mask_b[2]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_mask_b[1]}] |
| set_output_delay -min -1.0 -clock [get_clocks {wbm_clk_i}] -add_delay [get_ports {func_mask_b[0]}] |
| ############################################################################### |
| # Environment |
| ############################################################################### |
| set_load -pin_load 0.0334 [get_ports {bist_clk}] |
| set_load -pin_load 0.0334 [get_ports {bist_en}] |
| set_load -pin_load 0.0334 [get_ports {bist_load}] |
| set_load -pin_load 0.0334 [get_ports {bist_rst_n}] |
| set_load -pin_load 0.0334 [get_ports {bist_run}] |
| set_load -pin_load 0.0334 [get_ports {bist_sdi}] |
| set_load -pin_load 0.0334 [get_ports {bist_shift}] |
| set_load -pin_load 0.0334 [get_ports {func_cen_a}] |
| set_load -pin_load 0.0334 [get_ports {func_cen_b}] |
| set_load -pin_load 0.0334 [get_ports {func_clk_a}] |
| set_load -pin_load 0.0334 [get_ports {func_clk_b}] |
| set_load -pin_load 0.0334 [get_ports {func_web_b}] |
| set_load -pin_load 0.0334 [get_ports {mem_clk_out}] |
| set_load -pin_load 0.0334 [get_ports {wbd_int_rst_n}] |
| set_load -pin_load 0.0334 [get_ports {wbm_ack_o}] |
| set_load -pin_load 0.0334 [get_ports {wbm_err_o}] |
| set_load -pin_load 0.0334 [get_ports {func_addr_a[8]}] |
| set_load -pin_load 0.0334 [get_ports {func_addr_a[7]}] |
| set_load -pin_load 0.0334 [get_ports {func_addr_a[6]}] |
| set_load -pin_load 0.0334 [get_ports {func_addr_a[5]}] |
| set_load -pin_load 0.0334 [get_ports {func_addr_a[4]}] |
| set_load -pin_load 0.0334 [get_ports {func_addr_a[3]}] |
| set_load -pin_load 0.0334 [get_ports {func_addr_a[2]}] |
| set_load -pin_load 0.0334 [get_ports {func_addr_a[1]}] |
| set_load -pin_load 0.0334 [get_ports {func_addr_a[0]}] |
| set_load -pin_load 0.0334 [get_ports {func_addr_b[8]}] |
| set_load -pin_load 0.0334 [get_ports {func_addr_b[7]}] |
| set_load -pin_load 0.0334 [get_ports {func_addr_b[6]}] |
| set_load -pin_load 0.0334 [get_ports {func_addr_b[5]}] |
| set_load -pin_load 0.0334 [get_ports {func_addr_b[4]}] |
| set_load -pin_load 0.0334 [get_ports {func_addr_b[3]}] |
| set_load -pin_load 0.0334 [get_ports {func_addr_b[2]}] |
| set_load -pin_load 0.0334 [get_ports {func_addr_b[1]}] |
| set_load -pin_load 0.0334 [get_ports {func_addr_b[0]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[31]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[30]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[29]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[28]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[27]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[26]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[25]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[24]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[23]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[22]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[21]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[20]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[19]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[18]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[17]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[16]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[15]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[14]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[13]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[12]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[11]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[10]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[9]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[8]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[7]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[6]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[5]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[4]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[3]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[2]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[1]}] |
| set_load -pin_load 0.0334 [get_ports {func_din_b[0]}] |
| set_load -pin_load 0.0334 [get_ports {func_mask_b[3]}] |
| set_load -pin_load 0.0334 [get_ports {func_mask_b[2]}] |
| set_load -pin_load 0.0334 [get_ports {func_mask_b[1]}] |
| set_load -pin_load 0.0334 [get_ports {func_mask_b[0]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[37]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[36]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[35]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[34]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[33]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[32]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[31]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[30]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[29]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[28]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[27]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[26]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[25]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[24]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[23]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[22]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[21]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[20]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[19]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[18]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[17]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[16]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[15]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[14]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[13]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[12]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[11]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[10]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[9]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[8]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[7]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[6]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[5]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[4]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[3]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[2]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[1]}] |
| set_load -pin_load 0.0334 [get_ports {io_oeb[0]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[37]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[36]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[35]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[34]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[33]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[32]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[31]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[30]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[29]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[28]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[27]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[26]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[25]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[24]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[23]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[22]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[21]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[20]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[19]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[18]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[17]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[16]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[15]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[14]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[13]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[12]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[11]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[10]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[9]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[8]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[7]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[6]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[5]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[4]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[3]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[2]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[1]}] |
| set_load -pin_load 0.0334 [get_ports {io_out[0]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[127]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[126]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[125]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[124]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[123]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[122]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[121]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[120]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[119]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[118]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[117]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[116]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[115]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[114]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[113]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[112]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[111]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[110]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[109]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[108]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[107]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[106]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[105]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[104]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[103]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[102]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[101]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[100]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[99]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[98]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[97]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[96]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[95]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[94]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[93]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[92]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[91]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[90]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[89]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[88]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[87]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[86]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[85]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[84]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[83]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[82]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[81]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[80]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[79]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[78]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[77]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[76]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[75]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[74]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[73]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[72]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[71]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[70]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[69]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[68]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[67]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[66]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[65]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[64]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[63]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[62]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[61]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[60]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[59]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[58]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[57]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[56]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[55]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[54]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[53]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[52]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[51]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[50]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[49]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[48]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[47]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[46]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[45]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[44]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[43]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[42]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[41]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[40]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[39]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[38]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[37]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[36]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[35]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[34]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[33]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[32]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[31]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[30]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[29]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[28]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[27]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[26]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[25]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[24]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[23]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[22]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[21]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[20]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[19]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[18]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[17]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[16]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[15]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[14]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[13]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[12]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[11]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[10]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[9]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[8]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[7]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[6]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[5]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[4]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[3]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[2]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[1]}] |
| set_load -pin_load 0.0334 [get_ports {la_data_out[0]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[31]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[30]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[29]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[28]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[27]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[26]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[25]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[24]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[23]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[22]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[21]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[20]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[19]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[18]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[17]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[16]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[15]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[14]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[13]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[12]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[11]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[10]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[9]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[8]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[7]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[6]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[5]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[4]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[3]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[2]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[1]}] |
| set_load -pin_load 0.0334 [get_ports {wbm_dat_o[0]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bist_correct}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bist_done}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bist_error}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bist_sdo}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {mem_clk}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {user_clock1}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {user_clock2}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_clk_i}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_cyc_i}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_rst_i}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_stb_i}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_we_i}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bist_error_cnt[3]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bist_error_cnt[2]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bist_error_cnt[1]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {bist_error_cnt[0]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[31]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[30]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[29]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[28]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[27]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[26]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[25]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[24]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[23]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[22]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[21]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[20]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[19]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[18]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[17]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[16]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[15]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[14]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[13]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[12]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[11]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[10]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[9]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[8]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[7]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[6]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[5]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[4]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[3]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[2]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[1]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {func_dout_a[0]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[31]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[30]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[29]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[28]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[27]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[26]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[25]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[24]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[23]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[22]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[21]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[20]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[19]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[18]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[17]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[16]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[15]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[14]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[13]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[12]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[11]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[10]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[9]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[8]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[7]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[6]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[5]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[4]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[3]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[2]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[1]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_adr_i[0]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[31]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[30]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[29]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[28]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[27]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[26]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[25]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[24]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[23]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[22]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[21]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[20]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[19]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[18]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[17]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[16]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[15]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[14]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[13]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[12]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[11]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[10]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[9]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[8]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[7]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[6]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[5]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[4]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[3]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[2]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[1]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_dat_i[0]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_sel_i[3]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_sel_i[2]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_sel_i[1]}] |
| set_driving_cell -lib_cell sky130_fd_sc_hd__inv_8 -pin {Y} -input_transition_rise 0.0000 -input_transition_fall 0.0000 [get_ports {wbm_sel_i[0]}] |
| ############################################################################### |
| # Design Rules |
| ############################################################################### |
