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foss-eda-tools / third_party / shuttle / sky130 / mpw-004 / slot-010 / refs/heads/main / . / verilog / rtl
tree: ca3cd94f3f98c8c08dcf5e0de522f1bb1f077c24 [path history] [tgz]
  1. eFPGA_conf/
  2. eFPGA_core/
  3. ibex_core/
  4. icesoc/
  5. eFPGA_CPU_top.v
  6. models_pack.v
  7. uprj_netlists.v
  8. user_proj_example.v
  9. user_project_wrapper.v