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@@ -24,10 +24,13 @@
 #### Top-Level Diagram
 ![alt text](docs/encoder_schematic.png)
 
--Input Data is stored at dual channel rams.\ 
--AGU (Address Generator Unit) generates data indices for interleaving.\
--Pre Encoder unit identifies initial state of the encoder.\
--Encoder Core produces outputs according to the state and the inputs.\
+-Input Data is stored at dual channel rams. 
+
+-AGU (Address Generator Unit) generates data indices for interleaving.
+
+-Pre Encoder unit identifies initial state of the encoder.
+
+-Encoder Core produces outputs according to the state and the inputs.
 
 #### Synthesis Report
 ![alt text](docs/synt_encoder.png)
@@ -39,10 +42,12 @@
 #### Throughput
 ![equation](http://www.sciweavers.org/tex2img.php?eq=%5Cfrac%7B2%2AN%7D%7B3%2AN%2B10%7D%20%2A%20f&bc=White&fc=Black&im=jpg&fs=12&ff=arev&edit=0)
 
-'N' = input data block size in couple number ranging from 56 to 2396.\
+'N' = input data block size in couple number ranging from 56 to 2396.
+
 'f' = frequency in Mhz.
 
-For 50 Mhz clock speed and N = 56, throughput equals 31.5 Mbps.\
+For 50 Mhz clock speed and N = 56, throughput equals 31.5 Mbps.
+
 For 50 Mhz clock speed and N = 2396, throughput equals 33.3 Mbps.
 
 Setup