| commit | 0e88761734941cc44fb05ee66e030db0d9f2dc4e | [log] [tgz] |
|---|---|---|
| author | Ganesh Gore <goreganesh007@gmail.com> | Tue Jan 04 06:38:57 2022 -0700 |
| committer | Ganesh Gore <goreganesh007@gmail.com> | Tue Jan 04 06:38:57 2022 -0700 |
| tree | 8f69e719027c6b230ba3151ab4fe23ae7f4619a9 | |
| parent | fedb7fdad277b343ec678e3234fde67b56b6d4d2 [diff] |
Updated readme
This repository contains test structure for RRAM based Multiplexers design. Please refere to following publications for detail.
[1] X. Tang, E. Giacomin, G. De Micheli, P.-E. Gaillardon, “Circuit Designs of High-performance and Low-power RRAM-based Multiplexers based on 4T(ransistor)1R(RAM) Programming Structure,” IEEE Transactions on Circuits and Systems - I, vol. 64, no. 5, pp. 1173-1186, May 2017. RANKED within the IEEE TCAS-I TOP POPULAR ARTICLES in May 2017. PDF
[2] X. Tang, G. De Micheli, P.-E. Gaillardon, “A High-performance FPGA Architecture Using One-Level RRAM-based Multiplexers,” IEEE Transactions on Emerging Topics in Computing (TETC), vol. 5, no. 2, pp. 210-222, April-June 2017. PDF