| commit | 8579182fb860bcea78f7548fc713decef1f01684 | [log] [tgz] |
|---|---|---|
| author | Jeff DiCorpo <jeffdi@efabless.com> | Sun Jan 09 08:50:44 2022 -0800 |
| committer | Jeff DiCorpo <jeffdi@efabless.com> | Sun Jan 09 08:50:44 2022 -0800 |
| tree | 2975f8ac35c16e1c7a09be36453602eeed1d183d | |
| parent | 0e88761734941cc44fb05ee66e030db0d9f2dc4e [diff] |
final gds oasis
This repository contains test structure for RRAM based Multiplexers design. Please refere to following publications for detail.
[1] X. Tang, E. Giacomin, G. De Micheli, P.-E. Gaillardon, “Circuit Designs of High-performance and Low-power RRAM-based Multiplexers based on 4T(ransistor)1R(RAM) Programming Structure,” IEEE Transactions on Circuits and Systems - I, vol. 64, no. 5, pp. 1173-1186, May 2017. RANKED within the IEEE TCAS-I TOP POPULAR ARTICLES in May 2017. PDF
[2] X. Tang, G. De Micheli, P.-E. Gaillardon, “A High-performance FPGA Architecture Using One-Level RRAM-based Multiplexers,” IEEE Transactions on Emerging Topics in Computing (TETC), vol. 5, no. 2, pp. 210-222, April-June 2017. PDF
