VREF output short circuit corrected.
diff --git a/gds/user_analog_project_wrapper.gds b/gds/user_analog_project_wrapper.gds index 425bdf5..43e2187 100644 --- a/gds/user_analog_project_wrapper.gds +++ b/gds/user_analog_project_wrapper.gds Binary files differ
diff --git a/mag/user_analog_project_wrapper.ext b/mag/user_analog_project_wrapper.ext index 06d067a..65f5408 100644 --- a/mag/user_analog_project_wrapper.ext +++ b/mag/user_analog_project_wrapper.ext
@@ -1,4 +1,4 @@ -timestamp 1641013539 +timestamp 1641015273 version 8.3 tech sky130A style ngspice() @@ -696,8 +696,8 @@ port "wb_rst_i" 573 1706 -800 1818 480 m2 port "wb_clk_i" 572 524 -800 636 480 m2 port "vssa2" 567 0 549442 1660 554242 m3 -port "io_analog[1]" 38 566594 702300 571594 704800 m3 port "gpio_analog[7]" 15 -800 511530 480 511642 m3 +port "io_analog[1]" 38 566594 702300 571594 704800 m3 node "c_n100_n100#" 0 0 -100 -100 comment 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 node "io_analog[4]" 0 2925 329294 702300 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 node "io_analog[4]" 0 2925 318994 702300 m5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12500000 15000 0 0 @@ -872,7 +872,7 @@ node "gpio_noesd[7]" 1 613.728 -800 510348 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 node "vdda2" 0 172056 0 214888 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 136500800 640160 0 0 0 0 0 0 node "m3_4800_550000#" 0 164 4800 550000 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 160000 1600 0 0 0 0 0 0 -node "vssa2" 0 6529.6 0 559442 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11816000 14560 0 0 0 0 0 0 +node "vssa2" 0 6519 0 559442 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11808000 14520 0 0 0 0 0 0 node "m3_6400_574320#" 0 136.96 6400 574320 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 19200 640 0 0 0 0 0 0 node "vccd2" 0 67524.7 0 633842 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 46664000 189600 13184000 69440 0 0 0 0 node "vccd2" 0 6519 0 643842 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11808000 14520 0 0 0 0 0 0 @@ -1390,43 +1390,48 @@ node "wbs_ack_o" 1 631.648 2888 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0 node "wb_rst_i" 1 631.648 1706 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0 node "wb_clk_i" 1 631.648 524 -800 m2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 143360 2784 0 0 0 0 0 0 0 0 -node "vssa2" 0 593697 0 549442 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 206595200 1036400 83304000 391360 206595200 1036400 0 0 0 0 +node "vssa2" 0 593676 0 549442 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 206595200 1036400 83288000 391280 206595200 1036400 0 0 0 0 +node "gpio_analog[7]" 0 24491.7 -800 511530 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2726400 68480 3326240 82484 0 0 0 0 0 0 node "io_analog[1]" 36 17771.5 566594 702300 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1811200 45440 12793920 22508 0 0 0 0 0 0 -node "gpio_analog[7]" 0 256789 -800 511530 m3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5715200 285760 15795200 433920 16224000 437440 15686400 430720 0 0 0 0 +node "m1_800_511360#" 0 231742 800 511360 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5696000 284800 13036800 364640 12851200 354240 15654400 429920 0 0 0 0 node "m1_543720_703240#" 0 78515.6 543720 703240 m1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1804800 90240 4275200 110400 5024000 148160 6080000 155680 0 0 0 0 substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -cap "io_analog[4]" "io_analog[4]" 26250 -cap "io_clamp_high[1]" "io_analog[5]" 525 -cap "vssa2" "m3_4800_550000#" 1132 -cap "io_clamp_low[2]" "io_analog[6]" 525 -cap "io_analog[4]" "io_analog[4]" 21250 -cap "io_analog[6]" "io_analog[6]" 21250 -cap "gpio_analog[7]" "vssa2" 3960.75 -cap "m1_543720_703240#" "io_analog[1]" 53622.6 -cap "io_analog[10]" "vccd2" 792 -cap "io_analog[6]" "io_analog[6]" 21250 -cap "io_analog[5]" "io_analog[5]" 21250 -cap "vssa2" "vccd2" 1703.67 -cap "io_analog[5]" "io_analog[5]" 21250 -cap "io_analog[5]" "io_analog[5]" 26250 -cap "io_clamp_high[2]" "io_analog[6]" 525 -cap "io_analog[4]" "io_analog[4]" 26250 -cap "io_clamp_high[1]" "io_clamp_low[1]" 525 -cap "io_analog[6]" "io_analog[6]" 26250 -cap "io_analog[5]" "io_analog[5]" 26250 -cap "io_clamp_low[1]" "io_analog[5]" 525 -cap "vdda2" "gpio_analog[7]" 2899.2 cap "vi" "vssa2" 2611.2 -cap "io_analog[10]" "vssa2" 1562 -cap "vi" "ii" 252 +cap "m1_800_511360#" "gpio_analog[7]" 177161 +cap "vssa2" "gpio_analog[7]" 842.5 +cap "m1_800_511360#" "vdda2" 2598.4 cap "io_analog[6]" "io_analog[6]" 26250 -cap "vssa2" "ii" 2611.2 -cap "io_clamp_high[0]" "io_clamp_low[0]" 525 +cap "ii" "vssa2" 2611.2 +cap "io_analog[6]" "io_analog[6]" 26250 +cap "io_clamp_low[2]" "io_analog[6]" 525 +cap "m3_4800_550000#" "vssa2" 1132 cap "io_analog[4]" "io_analog[4]" 21250 -cap "io_clamp_high[2]" "io_clamp_low[2]" 525 -cap "gpio_analog[7]" "vccd2" 2224.33 -cap "io_analog[4]" "io_clamp_low[0]" 525 +cap "vccd2" "io_analog[10]" 792 +cap "io_analog[4]" "io_analog[4]" 21250 +cap "m1_800_511360#" "vssa2" 3118.25 +cap "io_analog[5]" "io_analog[5]" 21250 +cap "io_analog[5]" "io_analog[5]" 21250 +cap "vccd2" "gpio_analog[7]" 296 +cap "io_clamp_high[1]" "io_analog[5]" 525 +cap "io_analog[6]" "io_analog[6]" 21250 +cap "io_analog[5]" "io_analog[5]" 26250 +cap "io_analog[5]" "io_analog[5]" 26250 +cap "io_clamp_low[0]" "io_clamp_high[0]" 525 +cap "io_analog[1]" "m1_543720_703240#" 53622.6 cap "io_clamp_high[0]" "io_analog[4]" 525 +cap "io_analog[6]" "io_analog[6]" 21250 +cap "io_analog[5]" "io_clamp_low[1]" 525 +cap "io_analog[4]" "io_analog[4]" 26250 +cap "vi" "ii" 252 +cap "io_analog[4]" "io_clamp_low[0]" 525 +cap "vdda2" "gpio_analog[7]" 300.8 +cap "io_clamp_high[1]" "io_clamp_low[1]" 525 +cap "vssa2" "io_analog[10]" 1562 +cap "m1_800_511360#" "vccd2" 1928.33 +cap "vssa2" "vccd2" 1703.67 +cap "io_analog[4]" "io_analog[4]" 26250 +cap "io_clamp_high[2]" "io_analog[6]" 525 +cap "io_clamp_high[2]" "io_clamp_low[2]" 525 subcap "wb_clk_i" -296.744 subcap "wb_clk_i" -334.904 subcap "wbs_sel_i[1]" -264.308 @@ -1599,106 +1604,108 @@ subcap "io_in[12]" -200.4 subcap "io_out[12]" -200.4 subcap "io_oeb[12]" -200.4 -subcap "gpio_analog[7]" -256432 -subcap "gpio_analog[7]" -256493 -cap "sbcs1v8_0/p0" "sbcs1v8_0/vdda" 63 +subcap "gpio_analog[7]" -24173.8 +subcap "gpio_analog[7]" -24196 +cap "sbcs1v8_0/vdda" "sbcs1v8_0/p0" 63 cap "sbcs1v8_0/s" "sbcs1v8_0/vdda" 63 cap "sbcs1v8_0/p1" "sbcs1v8_0/vdda" 63 -cap "sbcs1v8_0/vdda" "sbcs1v8_0/p2" 63 +cap "sbcs1v8_0/p2" "sbcs1v8_0/vdda" 63 cap "sbcs1v8_0/vdda" "sbcs1v8_0/p0" 9 cap "sbcs1v8_0/vdda" "sbcs1v8_0/s" 9 -cap "sbcs1v8_0/vdda" "sbcs1v8_0/p1" 9 cap "sbcs1v8_0/p2" "sbcs1v8_0/vdda" 9 +cap "sbcs1v8_0/p1" "sbcs1v8_0/vdda" 9 subcap "vdda1" -6207.19 -subcap "vssa2" -593051 -cap "sbcs1v8_0/vdda" "vssa2" 125 +subcap "vssa2" -593030 cap "sbcs1v8_0/vdda" "vssa2" 167.5 +cap "sbcs1v8_0/vdda" "vssa2" 125 cap "vssa2" "sbcs1v8_0/vssa" 116.667 cap "vssa2" "sbcs1v8_0/vssa" 156.333 -cap "vssa2" "sbcs1v8_0/vdda" 158.333 -cap "vssa2" "sbcs1v8_0/vdda" 212.167 +cap "sbcs1v8_0/vdda" "vssa2" 212.167 +cap "sbcs1v8_0/vdda" "vssa2" 158.333 +cap "vssa2" "sbcs1v8_0/vssa" 390.833 +cap "vssa2" "sbcs1v8_0/vssa" 291.667 +cap "sbcs1v8_0/vssa" "vssa2" 390.833 +cap "sbcs1v8_0/vssa" "vssa2" 291.667 +cap "sbcs1v8_0/vssa" "vssa2" 390.833 +cap "sbcs1v8_0/vssa" "vssa2" 291.667 +cap "sbcs1v8_0/vssa" "vssa2" 390.833 +cap "sbcs1v8_0/vssa" "vssa2" 291.667 +cap "vssa2" "sbcs1v8_0/vssa" 291.667 +cap "vssa2" "sbcs1v8_0/vssa" 390.833 +cap "vssa2" "sbcs1v8_0/vssa" 390.833 +cap "sbcs1v8_0/vssa" "vssa2" 291.667 +cap "sbcs1v8_0/vssa" "vssa2" 291.667 +cap "vssa2" "sbcs1v8_0/vssa" 390.833 +cap "vssa2" "sbcs1v8_0/vssa" 291.667 +cap "vssa2" "sbcs1v8_0/vssa" 390.833 +cap "sbcs1v8_0/vssa" "vssa2" 390.833 +cap "vssa2" "sbcs1v8_0/vssa" 291.667 +cap "vssa2" "sbcs1v8_0/vssa" 291.667 +cap "vssa2" "sbcs1v8_0/vssa" 390.833 cap "sbcs1v8_0/vssa" "vssa2" 291.667 cap "vssa2" "sbcs1v8_0/vssa" 390.833 cap "sbcs1v8_0/vssa" "vssa2" 291.667 cap "sbcs1v8_0/vssa" "vssa2" 390.833 -cap "vssa2" "sbcs1v8_0/vssa" 291.667 -cap "sbcs1v8_0/vssa" "vssa2" 390.833 -cap "sbcs1v8_0/vssa" "vssa2" 291.667 -cap "sbcs1v8_0/vssa" "vssa2" 390.833 -cap "vssa2" "sbcs1v8_0/vssa" 390.833 -cap "vssa2" "sbcs1v8_0/vssa" 291.667 cap "sbcs1v8_0/vssa" "vssa2" 390.833 cap "vssa2" "sbcs1v8_0/vssa" 291.667 -cap "vssa2" "sbcs1v8_0/vssa" 390.833 -cap "vssa2" "sbcs1v8_0/vssa" 291.667 -cap "vssa2" "sbcs1v8_0/vssa" 291.667 -cap "vssa2" "sbcs1v8_0/vssa" 390.833 -cap "sbcs1v8_0/vssa" "vssa2" 390.833 -cap "sbcs1v8_0/vssa" "vssa2" 291.667 -cap "sbcs1v8_0/vssa" "vssa2" 390.833 -cap "sbcs1v8_0/vssa" "vssa2" 291.667 -cap "vssa2" "sbcs1v8_0/vssa" 291.667 -cap "sbcs1v8_0/vssa" "vssa2" 390.833 -cap "sbcs1v8_0/vssa" "vssa2" 390.833 -cap "sbcs1v8_0/vssa" "vssa2" 291.667 -cap "sbcs1v8_0/vssa" "vssa2" 390.833 -cap "sbcs1v8_0/vssa" "vssa2" 291.667 cap "sbcs1v8_0/n" "sbcs1v8_0/vssa" 31.5 +cap "sbcs1v8_0/vssa" "vssa2" 390.833 +cap "sbcs1v8_0/io" "sbcs1v8_0/vssa" 4.54747e-13 cap "vssa2" "sbcs1v8_0/vssa" 390.833 cap "sbcs1v8_0/n" "sbcs1v8_0/vssa" 31.5 -cap "vssa2" "sbcs1v8_0/vssa" 390.833 -cap "sbcs1v8_0/vssa" "sbcs1v8_0/io" 4.54747e-13 -cap "sbcs1v8_0/vssa" "sbcs1v8_0/io" -5.68434e-14 cap "sbcs1v8_0/vssa" "vssa2" 33.5 +cap "sbcs1v8_0/io" "sbcs1v8_0/vssa" -5.68434e-14 +cap "vref1v8_0/vo" "vref1v8_0/vssa" 50 cap "sbcs1v8_1/vdda" "gpio_analog[7]" -7.10543e-15 -cap "sbcs1v8_1/vdda" "vssa2" 250 -cap "sbcs1v8_1/vdda" "vssa2" 335 -cap "sbcs1v8_1/vdda" "vssa2" 44.6667 -cap "sbcs1v8_1/vssa" "vssa2" 241.667 -cap "sbcs1v8_1/vdda" "vssa2" 33.3333 +cap "vssa2" "sbcs1v8_1/vdda" 335 +cap "vref1v8_0/vo" "vref1v8_0/vssa" 116.667 +cap "vssa2" "sbcs1v8_1/vdda" 250 +cap "vssa2" "sbcs1v8_1/vdda" 44.6667 cap "vssa2" "sbcs1v8_1/vssa" 323.833 -cap "vssa2" "sbcs1v8_1/vssa" 390.833 +cap "vssa2" "sbcs1v8_1/vdda" 33.3333 +cap "sbcs1v8_1/vssa" "vssa2" 241.667 cap "sbcs1v8_1/vssa" "vssa2" 291.667 -cap "vssa2" "sbcs1v8_1/vssa" 390.833 +cap "sbcs1v8_1/vssa" "vssa2" 390.833 cap "vssa2" "sbcs1v8_1/vssa" 291.667 cap "vssa2" "sbcs1v8_1/vssa" 390.833 cap "sbcs1v8_1/vssa" "vssa2" 291.667 cap "vssa2" "sbcs1v8_1/vssa" 390.833 -cap "vssa2" "sbcs1v8_1/vssa" 291.667 -cap "vssa2" "sbcs1v8_1/vssa" 291.667 -cap "vssa2" "sbcs1v8_1/vssa" 390.833 +cap "sbcs1v8_1/vssa" "vssa2" 390.833 +cap "sbcs1v8_1/vssa" "vssa2" 291.667 cap "vssa2" "sbcs1v8_1/vssa" 390.833 cap "vssa2" "sbcs1v8_1/vssa" 291.667 cap "sbcs1v8_1/vssa" "vssa2" 390.833 cap "vssa2" "sbcs1v8_1/vssa" 291.667 -cap "sbcs1v8_1/vssa" "vssa2" 390.833 -cap "sbcs1v8_1/vssa" "vssa2" 291.667 cap "vssa2" "sbcs1v8_1/vssa" 390.833 -cap "sbcs1v8_1/vssa" "vssa2" 291.667 cap "vssa2" "sbcs1v8_1/vssa" 291.667 +cap "vssa2" "sbcs1v8_1/vssa" 291.667 +cap "sbcs1v8_1/vssa" "vssa2" 390.833 +cap "vssa2" "sbcs1v8_1/vssa" 390.833 +cap "vssa2" "sbcs1v8_1/vssa" 291.667 +cap "vssa2" "sbcs1v8_1/vssa" 291.667 +cap "sbcs1v8_1/vssa" "vssa2" 390.833 cap "sbcs1v8_1/vssa" "vssa2" 390.833 cap "vssa2" "sbcs1v8_1/vssa" 291.667 cap "sbcs1v8_1/vssa" "vssa2" 390.833 cap "sbcs1v8_1/vssa" "vssa2" 291.667 -cap "vssa2" "sbcs1v8_1/vssa" 390.833 -cap "vssa2" "sbcs1v8_1/vssa" 390.833 cap "sbcs1v8_1/vssa" "vssa2" 291.667 +cap "sbcs1v8_1/vssa" "vssa2" 390.833 subcap "vi" -357.6 -cap "vssa2" "vref1v8_0/vssa" 390.833 cap "sbcs1v8_1/n" "vref1v8_0/vssa" 63 -cap "vssa2" "sbcs1v8_1/vssa" 256.833 +cap "vref1v8_0/vssa" "vssa2" 390.833 +cap "sbcs1v8_1/vssa" "vref1v8_0/ii" -1.36424e-12 +cap "sbcs1v8_1/vssa" "vssa2" 256.833 cap "vref1v8_0/vi" "sbcs1v8_1/vssa" -1.36424e-12 -cap "vref1v8_0/ii" "sbcs1v8_1/vssa" -1.36424e-12 subcap "vdda1" -103659 -cap "vref1v8_0/vssa" "vref1v8_0/vo" 4.26326e-14 -cap "vref1v8_0/vo" "vref1v8_0/vssa" 3.90799e-14 -cap "vref1v8_0/vo" "vref1v8_0/n" 63 +cap "vref1v8_0/vo" "vref1v8_0/vssa" 29 +cap "vref1v8_0/n" "vref1v8_0/vssa" 63 +cap "vref1v8_0/vo" "vref1v8_0/vssa" 95.6667 cap "vref1v8_0/vssa" "vref1v8_0/vssa" 18 cap "vref1v8_0/vssa" "vref1v8_0/vi" 126 -cap "vref1v8_0/vi" "vref1v8_0/ii" 1.42109e-14 -cap "vref1v8_0/vssa" "vref1v8_0/ii" 126 +cap "vref1v8_0/ii" "vref1v8_0/vi" 1.42109e-14 +cap "vref1v8_0/ii" "vref1v8_0/vssa" 126 subcap "vdda1" -103326 -subcap "vssa2" -5960.77 +subcap "vssa2" -5950.17 subcap "gpio_analog[6]" -200.4 subcap "gpio_noesd[6]" -200.4 subcap "io_in_3v3[13]" -200.4 @@ -1710,24 +1717,24 @@ subcap "vccd2" -67032.9 subcap "vccd1" -6135.45 subcap "vccd2" -6104.17 -cap "sbcs5v0_0/s" "sbcs5v0_0/vdda" 63 -cap "sbcs5v0_0/p0" "sbcs5v0_0/vdda" 63 +cap "sbcs5v0_0/vdda" "sbcs5v0_0/s" 63 +cap "sbcs5v0_0/vdda" "sbcs5v0_0/p0" 63 subcap "io_analog[0]" -6591.86 subcap "io_analog[0]" -6244 subcap "io_analog[10]" -89632.2 -cap "sbcs5v0_0/vdda" "vssa2" 14 +cap "vssa2" "sbcs5v0_0/vdda" 14 cap "vssa2" "sbcs5v0_0/vdda" 14 cap "vssa2" "sbcs5v0_0/s" 14 -cap "vssa2" "sbcs5v0_0/p1" 14 -cap "vssa2" "sbcs5v0_0/vdda" 14 cap "vssa2" "sbcs5v0_0/vdda" 14 cap "vssa2" "sbcs5v0_0/p2" 14 -cap "vssa2" "sbcs5v0_0/p0" 14 +cap "sbcs5v0_0/p1" "vssa2" 14 +cap "sbcs5v0_0/p0" "vssa2" 14 +cap "sbcs5v0_0/vdda" "vssa2" 14 cap "vssa2" "sbcs5v0_0/vdda" 14 +cap "sbcs5v0_0/io" "sbcs5v0_0/vssa" 2.84217e-14 cap "sbcs5v0_0/vssa" "sbcs5v0_0/n" 126 -cap "sbcs5v0_0/vssa" "sbcs5v0_0/z" 63 -cap "sbcs5v0_0/vssa" "sbcs5v0_0/io" 2.84217e-14 -cap "sbcs5v0_0/vssa" "sbcs5v0_0/io" 1.36424e-12 +cap "sbcs5v0_0/z" "sbcs5v0_0/vssa" 63 +cap "sbcs5v0_0/io" "sbcs5v0_0/vssa" 1.36424e-12 subcap "io_analog[9]" -5957.47 subcap "io_analog[8]" -6061.29 subcap "io_analog[7]" -6168.29 @@ -1775,10 +1782,9 @@ merge "sbcs5v0_0/vdda" "vdda1" -583.01 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -138000 -2642 0 0 0 0 0 0 merge "sbcs1v8_1/io" "vref1v8_0/ii" -98.4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -480 0 0 0 0 0 0 merge "vref1v8_0/ii" "ii" -merge "sbcs5v0_0/vssa" "vref1v8_0/vo" 87.9437 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 320000 0 319439 -800 322560 0 0 0 0 0 -merge "vref1v8_0/vo" "vref1v8_0/vssa" -merge "vref1v8_0/vssa" "gpio_analog[7]" -merge "gpio_analog[7]" "sbcs1v8_1/vssa" +merge "sbcs5v0_0/vssa" "vref1v8_0/vssa" 87.9437 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 320000 0 319439 -800 322560 0 0 0 0 0 +merge "vref1v8_0/vssa" "m1_800_511360#" +merge "m1_800_511360#" "sbcs1v8_1/vssa" merge "sbcs1v8_1/vssa" "sbcs1v8_0/vssa" merge "sbcs1v8_0/vssa" "VSUBS" merge "VSUBS" "vssa2" @@ -1789,3 +1795,4 @@ merge "vref1v8_0/vi" "vi" merge "sbcs1v8_0/io" "io_analog[10]" -5329.8 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -8500000 -13560 0 0 0 0 0 0 merge "sbcs5v0_0/io" "io_analog[1]" -6890.6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -12500000 -15320 0 0 0 0 0 0 +merge "vref1v8_0/vo" "gpio_analog[7]" -485.338 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -4600 -3202 0 0 0 0 0 0
diff --git a/mag/user_analog_project_wrapper.mag b/mag/user_analog_project_wrapper.mag index ec9ba37..93bcfa8 100644 --- a/mag/user_analog_project_wrapper.mag +++ b/mag/user_analog_project_wrapper.mag
@@ -1,6 +1,6 @@ magic tech sky130A -timestamp 1641013539 +timestamp 1641015273 << metal1 >> rect 271860 351815 271900 351820 rect 271860 351785 271865 351815 @@ -1142,18 +1142,6 @@ rect 16960 275445 16965 275475 rect 16995 275445 17000 275475 rect 16960 275440 17000 275445 -rect 17040 275475 17080 275480 -rect 17040 275445 17045 275475 -rect 17075 275445 17080 275475 -rect 17040 275440 17080 275445 -rect 17120 275475 17160 275480 -rect 17120 275445 17125 275475 -rect 17155 275445 17160 275475 -rect 17120 275440 17160 275445 -rect 17200 275475 17240 275480 -rect 17200 275445 17205 275475 -rect 17235 275445 17240 275475 -rect 17200 275440 17240 275445 rect 16720 275315 16760 275320 rect 16720 275285 16725 275315 rect 16755 275285 16760 275315 @@ -4988,9 +4976,6 @@ rect 16725 275445 16755 275475 rect 16885 275445 16915 275475 rect 16965 275445 16995 275475 -rect 17045 275445 17075 275475 -rect 17125 275445 17155 275475 -rect 17205 275445 17235 275475 rect 16725 275285 16755 275315 rect 16885 275285 16915 275315 rect 16965 275285 16995 275315 @@ -6272,15 +6257,12 @@ rect 271895 350025 272025 350055 rect 272055 350025 272060 350055 rect 271860 350020 272060 350025 -rect 16720 275475 17240 275480 +rect 16720 275475 17040 275480 rect 16720 275445 16725 275475 rect 16755 275445 16885 275475 rect 16915 275445 16965 275475 -rect 16995 275445 17045 275475 -rect 17075 275445 17125 275475 -rect 17155 275445 17205 275475 -rect 17235 275445 17240 275475 -rect 16720 275440 17240 275445 +rect 16995 275445 17040 275475 +rect 16720 275440 17040 275445 rect 16720 275395 17240 275400 rect 16720 275365 16805 275395 rect 16835 275365 17125 275395 @@ -8756,9 +8738,6 @@ rect 16725 275445 16755 275475 rect 16885 275445 16915 275475 rect 16965 275445 16995 275475 -rect 17045 275445 17075 275475 -rect 17125 275445 17155 275475 -rect 17205 275445 17235 275475 rect 16805 275365 16835 275395 rect 17125 275365 17155 275395 rect 28405 275325 28435 275355 @@ -9761,17 +9740,13 @@ rect -400 316921 830 317600 rect 3200 287160 3280 287200 rect 3240 287120 3280 287160 -rect -400 280600 830 282121 -rect -400 280400 840 280600 -rect -400 279721 830 280400 -rect -400 275500 830 277121 +rect -400 279721 830 282121 +rect -400 275200 830 277121 rect 14200 275800 14400 340200 rect 16200 317790 16400 317800 rect 16200 317610 16210 317790 rect 16390 317610 16400 317790 rect 14220 275700 14300 275800 -rect -400 275300 850 275500 -rect -400 275200 830 275300 rect -400 275160 1200 275200 rect -400 275040 1040 275160 rect 1160 275040 1200 275160 @@ -10263,16 +10238,13 @@ rect 400 255876 440 255880 rect 400 255844 404 255876 rect 436 255844 440 255876 -rect 200 255821 320 255840 -rect -400 255800 320 255821 -rect -400 255795 360 255800 +rect -400 255795 360 255821 rect -400 255765 325 255795 rect 355 255765 360 255795 -rect 200 255760 360 255765 +rect 320 255760 360 255765 rect 400 255796 440 255844 rect 400 255764 404 255796 rect 436 255764 440 255796 -rect 200 255720 320 255760 rect 400 255716 440 255764 rect 400 255684 404 255716 rect 436 255684 440 255716 @@ -12627,27 +12599,18 @@ rect 16960 275284 16964 275316 rect 16996 275284 17000 275316 rect 16960 275280 17000 275284 -rect 17040 275476 17080 275480 -rect 17040 275444 17044 275476 -rect 17076 275444 17080 275476 -rect 17040 275396 17080 275444 +rect 17040 275396 17080 275440 rect 17040 275364 17044 275396 rect 17076 275364 17080 275396 rect 17040 275316 17080 275364 -rect 17120 275476 17160 275480 -rect 17120 275444 17124 275476 -rect 17156 275444 17160 275476 -rect 17120 275395 17160 275444 +rect 17120 275395 17160 275440 rect 17120 275365 17125 275395 rect 17155 275365 17160 275395 rect 17120 275360 17160 275365 -rect 17200 275476 17240 275480 -rect 17200 275444 17204 275476 -rect 17236 275444 17240 275476 rect 17040 275284 17044 275316 rect 17076 275284 17080 275316 rect 17040 275280 17080 275284 -rect 17200 275316 17240 275444 +rect 17200 275316 17240 275440 rect 17200 275284 17204 275316 rect 17236 275284 17240 275316 rect 17200 275280 17240 275284 @@ -18554,22 +18517,7 @@ rect 16965 275285 16995 275315 rect 16995 275285 16996 275315 rect 16964 275284 16996 275285 -rect 17044 275475 17076 275476 -rect 17044 275445 17045 275475 -rect 17045 275445 17075 275475 -rect 17075 275445 17076 275475 -rect 17044 275444 17076 275445 rect 17044 275364 17076 275396 -rect 17124 275475 17156 275476 -rect 17124 275445 17125 275475 -rect 17125 275445 17155 275475 -rect 17155 275445 17156 275475 -rect 17124 275444 17156 275445 -rect 17204 275475 17236 275476 -rect 17204 275445 17205 275475 -rect 17205 275445 17235 275475 -rect 17235 275445 17236 275475 -rect 17204 275444 17236 275445 rect 17044 275315 17076 275316 rect 17044 275285 17045 275315 rect 17045 275285 17075 275315 @@ -22004,15 +21952,12 @@ rect 1190 317610 16210 317790 rect 16390 317610 16400 317790 rect 1000 317600 16400 317610 -rect 16720 275476 17240 275480 +rect 16720 275476 17040 275480 rect 16720 275444 16724 275476 rect 16756 275444 16884 275476 rect 16916 275444 16964 275476 -rect 16996 275444 17044 275476 -rect 17076 275444 17124 275476 -rect 17156 275444 17204 275476 -rect 17236 275444 17240 275476 -rect 16720 275440 17240 275444 +rect 16996 275444 17040 275476 +rect 16720 275440 17040 275444 rect 16720 275396 17240 275400 rect 16720 275364 16884 275396 rect 16916 275364 16964 275396 @@ -23862,22 +23807,22 @@ rect -50 0 0 352000 rect 292000 0 292050 352000 rect -50 -50 292050 0 -use sbcs5v0 sbcs5v0_0 ../lib/sbcs5v0/mag -timestamp 1640892658 -transform 1 0 262020 0 1 344380 -box -1520 -5880 10040 5640 -use sbcs1v8 sbcs1v8_1 ../lib/sbcs1v8/mag -timestamp 1640892658 -transform 1 0 18720 0 1 269280 -box -1520 -5880 10040 5640 -use sbcs1v8 sbcs1v8_0 -timestamp 1640892658 -transform 1 0 4320 0 1 269280 -box -1520 -5880 10040 5640 use vref1v8 vref1v8_0 ../lib/vref1v8/mag timestamp 1641007606 transform -1 0 28040 0 -1 276480 box -720 -3720 11000 1080 +use sbcs1v8 sbcs1v8_0 ../lib/sbcs1v8/mag +timestamp 1640892658 +transform 1 0 4320 0 1 269280 +box -1520 -5880 10040 5640 +use sbcs1v8 sbcs1v8_1 +timestamp 1640892658 +transform 1 0 18720 0 1 269280 +box -1520 -5880 10040 5640 +use sbcs5v0 sbcs5v0_0 ../lib/sbcs5v0/mag +timestamp 1640892658 +transform 1 0 262020 0 1 344380 +box -1520 -5880 10040 5640 << labels >> flabel metal3 s 291760 134615 292400 134671 0 FreeSans 560 0 0 0 gpio_analog[0] port 0 nsew signal bidirectional
diff --git a/mag/user_analog_project_wrapper.spice b/mag/user_analog_project_wrapper.spice index d3ff4b8..7b0aead 100644 --- a/mag/user_analog_project_wrapper.spice +++ b/mag/user_analog_project_wrapper.spice
@@ -1204,7 +1204,7 @@ .subckt user_analog_project_wrapper gpio_analog[0] gpio_analog[10] gpio_analog[11] + gpio_analog[12] gpio_analog[13] gpio_analog[14] gpio_analog[15] gpio_analog[16] + gpio_analog[17] gpio_analog[1] gpio_analog[2] gpio_analog[3] gpio_analog[4] gpio_analog[5] -+ gpio_analog[6] vssa2 gpio_analog[8] gpio_analog[9] gpio_noesd[0] gpio_noesd[10] ++ gpio_analog[6] gpio_analog[7] gpio_analog[8] gpio_analog[9] gpio_noesd[0] gpio_noesd[10] + gpio_noesd[11] gpio_noesd[12] gpio_noesd[13] gpio_noesd[14] gpio_noesd[15] gpio_noesd[16] + gpio_noesd[17] gpio_noesd[1] gpio_noesd[2] gpio_noesd[3] gpio_noesd[4] gpio_noesd[5] + gpio_noesd[6] gpio_noesd[7] gpio_noesd[8] gpio_noesd[9] io_analog[0] io_analog[10] @@ -1289,7 +1289,7 @@ + la_oenb[85] la_oenb[86] la_oenb[87] la_oenb[88] la_oenb[89] la_oenb[8] la_oenb[90] + la_oenb[91] la_oenb[92] la_oenb[93] la_oenb[94] la_oenb[95] la_oenb[96] la_oenb[97] + la_oenb[98] la_oenb[99] la_oenb[9] user_clock2 user_irq[0] user_irq[1] user_irq[2] -+ vccd1 vccd2 vdda1 vdda2 vssa1 vssd1 vssd2 wb_clk_i wb_rst_i wbs_ack_o wbs_adr_i[0] ++ vccd1 vccd2 vdda1 vdda2 vssa1 vssa2 vssd1 vssd2 wb_clk_i wb_rst_i wbs_ack_o wbs_adr_i[0] + wbs_adr_i[10] wbs_adr_i[11] wbs_adr_i[12] wbs_adr_i[13] wbs_adr_i[14] wbs_adr_i[15] + wbs_adr_i[16] wbs_adr_i[17] wbs_adr_i[18] wbs_adr_i[19] wbs_adr_i[1] wbs_adr_i[20] + wbs_adr_i[21] wbs_adr_i[22] wbs_adr_i[23] wbs_adr_i[24] wbs_adr_i[25] wbs_adr_i[26] @@ -1309,7 +1309,7 @@ + wbs_stb_i wbs_we_i Xsbcs1v8_0 io_analog[10] vdda2 vssa2 sbcs1v8_0/x sbcs1v8 Xsbcs1v8_1 ii vccd2 vssa2 vi sbcs1v8 -Xvref1v8_0 ii vi vssa2 vssa2 vref1v8 +Xvref1v8_0 ii vi gpio_analog[7] vssa2 vref1v8 Xsbcs5v0_0 io_analog[1] vdda1 vssa2 sbcs5v0_0/x sbcs5v0 .ends