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foss-eda-tools / third_party / shuttle / sky130 / mpw-003 / slot-039 / 2cf5cb0874766148cbb513174cc9f41625835209 / .
tree: 8a659fd90352f8dd6ccb9115f5578ece51a369c1 [path history] [tgz]
  1. .github/
  2. def/
  3. docs/
  4. gds/
  5. jobs/
  6. lef/
  7. mag/
  8. maglef/
  9. oas/
  10. openlane/
  11. signoff/
  12. spi/
  13. verilog/
  14. caravel
  15. wb_hyperram
  16. wb_openram_wrapper
  17. wb_ram_bus_mux
  18. .gitignore
  19. .gitmodules
  20. LICENSE
  21. Makefile
  22. README.md
README.md

Caravel User Project

License UPRJ_CI Caravel Build

:exclamation: Important Note

Additional memory (internal 1kB of OpenRAM and HyperRAM driver for external memory chip) connected through Wishbone to Caravel SoC for MPW submission

Memory blockSpaceAddressSize
HyperRAM ext. chipRAM0x3000_0000 - 0x307f_ffff8MB
HyperRAM ext. chipRegisters0x3080_0000 - 0x3080_ffffmax 64k registers, 16bit each
HyperRAM driverCSRs0x3081_0000 - 0x3081_ffffmax 64kB, 16k CSRs
OpenRAMRAM0x30c0_0000 - 0x30c0_ffffmax 64kB