| # 8-bit SAR-ADC with offset calibration |
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| This is a mixed-mode project featuring a 8-bit SAR-ADC, with offset calibration. |
| The logic section is synthesized using the openlane digital flow. |
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| ## Layout |
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| The layout is created using magic as a pcell generator and drc checker, while the |
| connection of the design is done using klayout. |
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| ## Architecture |
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| The ADC is composed of a differential top-plate sampled dac, which is made from an array of MIM capacitors. |
| The comparator is a regenerative comparator, which is followed by a latch to retain the output state during |
| reset. The latch output is fed into the logic section, which performs the standard binary search algorithm. |
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| ## Simulation |
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| The simulation is carried out using ngspice using the mixed-mode xspice capabilities. |
| The digital section is synthesized using yosys that can then be bridged to/from the |
| analog section. |
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| The Schematics are created using xschem, which also serves as the simulation framework. |
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| The SAR schematic: |
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| The simulation output can then be viewed in both analog and digital domain. |
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| Digital waveforms displayed using GTKWave |
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| Analog waveforms displayed using Gnuplot in interactive mode. |
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