Workflow completed with all the macros
diff --git a/def/user_project_wrapper.def b/def/user_project_wrapper.def
index 72220c8..df43646 100644
--- a/def/user_project_wrapper.def
+++ b/def/user_project_wrapper.def
@@ -1308,8 +1308,9 @@
- via4_3100x3100 + VIARULE M4M5_PR + CUTSIZE 800 800 + LAYERS met4 via4 met5 + CUTSPACING 800 800 + ENCLOSURE 350 350 350 350 + ROWCOL 2 2 ;
- via4_1600x3100 + VIARULE M4M5_PR + CUTSIZE 800 800 + LAYERS met4 via4 met5 + CUTSPACING 800 800 + ENCLOSURE 400 350 400 350 + ROWCOL 2 1 ;
END VIAS
-COMPONENTS 2 ;
- - chip_controller chip_controller + FIXED ( 200000 1800000 ) N ;
+COMPONENTS 3 ;
+ - chip_controller chip_controller + FIXED ( 200000 2300000 ) N ;
+ - core0 core + FIXED ( 1300000 200000 ) N ;
- custom_sram custom_sram + FIXED ( 1500000 1800000 ) N ;
END COMPONENTS
PINS 645 ;
@@ -3447,27 +3448,35 @@
+ LAYER met4 ( -901550 1550160 ) ( -898450 1769310 )
+ LAYER met4 ( -1081550 1550160 ) ( -1078450 1769310 )
+ LAYER met4 ( -1261550 1550160 ) ( -1258450 1769310 )
- + LAYER met4 ( -1441550 -1769310 ) ( -1438450 1769310 )
+ + LAYER met4 ( -1441550 -49840 ) ( -1438450 1769310 )
+ LAYER met4 ( -1621550 -1769310 ) ( -1618450 1769310 )
+ LAYER met4 ( -1801550 -1769310 ) ( -1798450 1769310 )
+ LAYER met4 ( -1981550 -1769310 ) ( -1978450 1769310 )
+ LAYER met4 ( -2161550 -1769310 ) ( -2158450 1769310 )
- + LAYER met4 ( -2341550 450160 ) ( -2338450 1769310 )
- + LAYER met4 ( -2521550 450160 ) ( -2518450 1769310 )
- + LAYER met4 ( -2701550 450160 ) ( -2698450 1769310 )
+ + LAYER met4 ( -2341550 950160 ) ( -2338450 1769310 )
+ + LAYER met4 ( -2521550 950160 ) ( -2518450 1769310 )
+ + LAYER met4 ( -2701550 950160 ) ( -2698450 1769310 )
+ LAYER met4 ( -2881550 -1769310 ) ( -2878450 1769310 )
+ LAYER met4 ( 36030 -1764510 ) ( 39130 1764510 )
+ LAYER met4 ( -2900550 -1764510 ) ( -2897450 1764510 )
- + LAYER met4 ( -181550 -1769310 ) ( -178450 30160 )
- + LAYER met4 ( -361550 -1769310 ) ( -358450 30160 )
- + LAYER met4 ( -541550 -1769310 ) ( -538450 30160 )
- + LAYER met4 ( -721550 -1769310 ) ( -718450 30160 )
- + LAYER met4 ( -901550 -1769310 ) ( -898450 30160 )
- + LAYER met4 ( -1081550 -1769310 ) ( -1078450 30160 )
- + LAYER met4 ( -1261550 -1769310 ) ( -1258450 30160 )
- + LAYER met4 ( -2341550 -1769310 ) ( -2338450 30160 )
- + LAYER met4 ( -2521550 -1769310 ) ( -2518450 30160 )
- + LAYER met4 ( -2701550 -1769310 ) ( -2698450 30160 )
+ + LAYER met4 ( -2341550 -1769310 ) ( -2338450 530160 )
+ + LAYER met4 ( -2521550 -1769310 ) ( -2518450 530160 )
+ + LAYER met4 ( -2701550 -1769310 ) ( -2698450 530160 )
+ + LAYER met4 ( -181550 -49840 ) ( -178450 30160 )
+ + LAYER met4 ( -361550 -49840 ) ( -358450 30160 )
+ + LAYER met4 ( -541550 -49840 ) ( -538450 30160 )
+ + LAYER met4 ( -721550 -49840 ) ( -718450 30160 )
+ + LAYER met4 ( -901550 -49840 ) ( -898450 30160 )
+ + LAYER met4 ( -1081550 -49840 ) ( -1078450 30160 )
+ + LAYER met4 ( -1261550 -49840 ) ( -1258450 30160 )
+ + LAYER met4 ( -181550 -1769310 ) ( -178450 -1569840 )
+ + LAYER met4 ( -361550 -1769310 ) ( -358450 -1569840 )
+ + LAYER met4 ( -541550 -1769310 ) ( -538450 -1569840 )
+ + LAYER met4 ( -721550 -1769310 ) ( -718450 -1569840 )
+ + LAYER met4 ( -901550 -1769310 ) ( -898450 -1569840 )
+ + LAYER met4 ( -1081550 -1769310 ) ( -1078450 -1569840 )
+ + LAYER met4 ( -1261550 -1769310 ) ( -1258450 -1569840 )
+ + LAYER met4 ( -1441550 -1769310 ) ( -1438450 -1569840 )
+ LAYER met5 ( -2900550 1761410 ) ( 39130 1764510 )
+ LAYER met5 ( -2905350 1674490 ) ( 43930 1677590 )
+ LAYER met5 ( -2905350 1494490 ) ( 43930 1497590 )
@@ -3479,6 +3488,7 @@
+ LAYER met5 ( -2905350 414490 ) ( 43930 417590 )
+ LAYER met5 ( -2905350 234490 ) ( 43930 237590 )
+ LAYER met5 ( -2905350 54490 ) ( 43930 57590 )
+ + LAYER met5 ( -1261550 -40210 ) ( -178450 -37110 )
+ LAYER met5 ( -2905350 -125510 ) ( 43930 -122410 )
+ LAYER met5 ( -2905350 -305510 ) ( 43930 -302410 )
+ LAYER met5 ( -2905350 -485510 ) ( 43930 -482410 )
@@ -3494,33 +3504,42 @@
- vccd2 + NET vccd2 + SPECIAL + DIRECTION INPUT + USE POWER
+ PORT
+ LAYER met4 ( -1550 -1778910 ) ( 1550 1778910 )
- + LAYER met4 ( -181550 -1778910 ) ( -178450 1778910 )
+ + LAYER met4 ( -181550 -49840 ) ( -178450 1778910 )
+ LAYER met4 ( -361550 1550160 ) ( -358450 1778910 )
+ LAYER met4 ( -541550 1550160 ) ( -538450 1778910 )
+ LAYER met4 ( -721550 1550160 ) ( -718450 1778910 )
+ LAYER met4 ( -901550 1550160 ) ( -898450 1778910 )
+ LAYER met4 ( -1081550 1550160 ) ( -1078450 1778910 )
+ LAYER met4 ( -1261550 1550160 ) ( -1258450 1778910 )
- + LAYER met4 ( -1441550 -1778910 ) ( -1438450 1778910 )
- + LAYER met4 ( -1621550 -1778910 ) ( -1618450 1778910 )
+ + LAYER met4 ( -1441550 -49840 ) ( -1438450 1778910 )
+ + LAYER met4 ( -1621550 -49840 ) ( -1618450 1778910 )
+ LAYER met4 ( -1801550 -1778910 ) ( -1798450 1778910 )
+ LAYER met4 ( -1981550 -1778910 ) ( -1978450 1778910 )
+ LAYER met4 ( -2161550 -1778910 ) ( -2158450 1778910 )
- + LAYER met4 ( -2341550 450160 ) ( -2338450 1778910 )
- + LAYER met4 ( -2521550 450160 ) ( -2518450 1778910 )
- + LAYER met4 ( -2701550 450160 ) ( -2698450 1778910 )
+ + LAYER met4 ( -2341550 950160 ) ( -2338450 1778910 )
+ + LAYER met4 ( -2521550 950160 ) ( -2518450 1778910 )
+ + LAYER met4 ( -2701550 950160 ) ( -2698450 1778910 )
+ LAYER met4 ( -2881550 -1778910 ) ( -2878450 1778910 )
+ LAYER met4 ( 27030 -1774110 ) ( 30130 1774110 )
+ LAYER met4 ( -2928750 -1774110 ) ( -2925650 1774110 )
- + LAYER met4 ( -361550 -1778910 ) ( -358450 30160 )
- + LAYER met4 ( -541550 -1778910 ) ( -538450 30160 )
- + LAYER met4 ( -721550 -1778910 ) ( -718450 30160 )
- + LAYER met4 ( -901550 -1778910 ) ( -898450 30160 )
- + LAYER met4 ( -1081550 -1778910 ) ( -1078450 30160 )
- + LAYER met4 ( -1261550 -1778910 ) ( -1258450 30160 )
- + LAYER met4 ( -2341550 -1778910 ) ( -2338450 30160 )
- + LAYER met4 ( -2521550 -1778910 ) ( -2518450 30160 )
- + LAYER met4 ( -2701550 -1778910 ) ( -2698450 30160 )
+ + LAYER met4 ( -2341550 -1778910 ) ( -2338450 530160 )
+ + LAYER met4 ( -2521550 -1778910 ) ( -2518450 530160 )
+ + LAYER met4 ( -2701550 -1778910 ) ( -2698450 530160 )
+ + LAYER met4 ( -361550 -49840 ) ( -358450 30160 )
+ + LAYER met4 ( -541550 -49840 ) ( -538450 30160 )
+ + LAYER met4 ( -721550 -49840 ) ( -718450 30160 )
+ + LAYER met4 ( -901550 -49840 ) ( -898450 30160 )
+ + LAYER met4 ( -1081550 -49840 ) ( -1078450 30160 )
+ + LAYER met4 ( -1261550 -49840 ) ( -1258450 30160 )
+ + LAYER met4 ( -181550 -1778910 ) ( -178450 -1569840 )
+ + LAYER met4 ( -361550 -1778910 ) ( -358450 -1569840 )
+ + LAYER met4 ( -541550 -1778910 ) ( -538450 -1569840 )
+ + LAYER met4 ( -721550 -1778910 ) ( -718450 -1569840 )
+ + LAYER met4 ( -901550 -1778910 ) ( -898450 -1569840 )
+ + LAYER met4 ( -1081550 -1778910 ) ( -1078450 -1569840 )
+ + LAYER met4 ( -1261550 -1778910 ) ( -1258450 -1569840 )
+ + LAYER met4 ( -1441550 -1778910 ) ( -1438450 -1569840 )
+ + LAYER met4 ( -1621550 -1778910 ) ( -1618450 -1569840 )
+ LAYER met5 ( -2928750 1771010 ) ( 30130 1774110 )
+ LAYER met5 ( -2933550 1693090 ) ( 34930 1696190 )
+ LAYER met5 ( -2933550 1513090 ) ( 34930 1516190 )
@@ -3532,6 +3551,7 @@
+ LAYER met5 ( -2933550 433090 ) ( 34930 436190 )
+ LAYER met5 ( -2933550 253090 ) ( 34930 256190 )
+ LAYER met5 ( -2933550 73090 ) ( 34930 76190 )
+ + LAYER met5 ( -1261550 -21610 ) ( -358450 -18510 )
+ LAYER met5 ( -2933550 -106910 ) ( 34930 -103810 )
+ LAYER met5 ( -2933550 -286910 ) ( 34930 -283810 )
+ LAYER met5 ( -2933550 -466910 ) ( 34930 -463810 )
@@ -3546,109 +3566,129 @@
+ FIXED ( 2909120 1759840 ) N ;
- vdda1 + NET vdda1 + SPECIAL + DIRECTION INPUT + USE POWER
+ PORT
- + LAYER met4 ( -1550 -1788510 ) ( 1550 1788510 )
- + LAYER met4 ( -181550 1550160 ) ( -178450 1788510 )
- + LAYER met4 ( -361550 1550160 ) ( -358450 1788510 )
- + LAYER met4 ( -541550 1550160 ) ( -538450 1788510 )
- + LAYER met4 ( -721550 1550160 ) ( -718450 1788510 )
- + LAYER met4 ( -901550 1550160 ) ( -898450 1788510 )
- + LAYER met4 ( -1081550 1550160 ) ( -1078450 1788510 )
- + LAYER met4 ( -1261550 -1788510 ) ( -1258450 1788510 )
- + LAYER met4 ( -1441550 -1788510 ) ( -1438450 1788510 )
- + LAYER met4 ( -1621550 -1788510 ) ( -1618450 1788510 )
- + LAYER met4 ( -1801550 -1788510 ) ( -1798450 1788510 )
- + LAYER met4 ( -1981550 -1788510 ) ( -1978450 1788510 )
- + LAYER met4 ( -2161550 450160 ) ( -2158450 1788510 )
- + LAYER met4 ( -2341550 450160 ) ( -2338450 1788510 )
- + LAYER met4 ( -2521550 450160 ) ( -2518450 1788510 )
- + LAYER met4 ( -2701550 -1788510 ) ( -2698450 1788510 )
- + LAYER met4 ( 198030 -1783710 ) ( 201130 1783710 )
- + LAYER met4 ( -2776950 -1783710 ) ( -2773850 1783710 )
- + LAYER met4 ( -181550 -1788510 ) ( -178450 30160 )
- + LAYER met4 ( -361550 -1788510 ) ( -358450 30160 )
- + LAYER met4 ( -541550 -1788510 ) ( -538450 30160 )
- + LAYER met4 ( -721550 -1788510 ) ( -718450 30160 )
- + LAYER met4 ( -901550 -1788510 ) ( -898450 30160 )
- + LAYER met4 ( -1081550 -1788510 ) ( -1078450 30160 )
- + LAYER met4 ( -2161550 -1788510 ) ( -2158450 30160 )
- + LAYER met4 ( -2341550 -1788510 ) ( -2338450 30160 )
- + LAYER met4 ( -2521550 -1788510 ) ( -2518450 30160 )
- + LAYER met5 ( -2776950 1780610 ) ( 201130 1783710 )
- + LAYER met5 ( -2781750 1711690 ) ( 205930 1714790 )
- + LAYER met5 ( -2781750 1531690 ) ( 205930 1534790 )
- + LAYER met5 ( -2781750 1351690 ) ( 205930 1354790 )
- + LAYER met5 ( -2781750 1171690 ) ( 205930 1174790 )
- + LAYER met5 ( -2781750 991690 ) ( 205930 994790 )
- + LAYER met5 ( -2781750 811690 ) ( 205930 814790 )
- + LAYER met5 ( -2781750 631690 ) ( 205930 634790 )
- + LAYER met5 ( -2781750 451690 ) ( 205930 454790 )
- + LAYER met5 ( -2781750 271690 ) ( 205930 274790 )
- + LAYER met5 ( -2781750 91690 ) ( 205930 94790 )
- + LAYER met5 ( -2781750 -88310 ) ( 205930 -85210 )
- + LAYER met5 ( -2781750 -268310 ) ( 205930 -265210 )
- + LAYER met5 ( -2781750 -448310 ) ( 205930 -445210 )
- + LAYER met5 ( -2781750 -628310 ) ( 205930 -625210 )
- + LAYER met5 ( -2781750 -808310 ) ( 205930 -805210 )
- + LAYER met5 ( -2781750 -988310 ) ( 205930 -985210 )
- + LAYER met5 ( -2781750 -1168310 ) ( 205930 -1165210 )
- + LAYER met5 ( -2781750 -1348310 ) ( 205930 -1345210 )
- + LAYER met5 ( -2781750 -1528310 ) ( 205930 -1525210 )
- + LAYER met5 ( -2781750 -1708310 ) ( 205930 -1705210 )
- + LAYER met5 ( -2776950 -1783710 ) ( 201130 -1780610 )
- + FIXED ( 2747720 1759840 ) N ;
+ + LAYER met4 ( -1550 -919175 ) ( 1550 919175 )
+ + LAYER met4 ( -181550 680825 ) ( -178450 919175 )
+ + LAYER met4 ( -361550 680825 ) ( -358450 919175 )
+ + LAYER met4 ( -541550 680825 ) ( -538450 919175 )
+ + LAYER met4 ( -721550 680825 ) ( -718450 919175 )
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+ + LAYER met4 ( -1981550 -2657845 ) ( -1978450 919175 )
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+ + LAYER met5 ( -2776950 911275 ) ( 201130 914375 )
+ + LAYER met5 ( -2781750 842355 ) ( 205930 845455 )
+ + LAYER met5 ( -2781750 662355 ) ( 205930 665455 )
+ + LAYER met5 ( -2781750 482355 ) ( 205930 485455 )
+ + LAYER met5 ( -2781750 302355 ) ( 205930 305455 )
+ + LAYER met5 ( -2781750 122355 ) ( 205930 125455 )
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+ + LAYER met5 ( -2781750 -417645 ) ( 205930 -414545 )
+ + LAYER met5 ( -2781750 -597645 ) ( 205930 -594545 )
+ + LAYER met5 ( -2781750 -777645 ) ( 205930 -774545 )
+ + LAYER met5 ( -1081550 -872345 ) ( -178450 -869245 )
+ + LAYER met5 ( -2781750 -957645 ) ( 205930 -954545 )
+ + LAYER met5 ( -2781750 -1137645 ) ( 205930 -1134545 )
+ + LAYER met5 ( -2781750 -1317645 ) ( 205930 -1314545 )
+ + LAYER met5 ( -2781750 -1497645 ) ( 205930 -1494545 )
+ + LAYER met5 ( -2781750 -1677645 ) ( 205930 -1674545 )
+ + LAYER met5 ( -2781750 -1857645 ) ( 205930 -1854545 )
+ + LAYER met5 ( -2781750 -2037645 ) ( 205930 -2034545 )
+ + LAYER met5 ( -2781750 -2217645 ) ( 205930 -2214545 )
+ + LAYER met5 ( -2781750 -2397645 ) ( 205930 -2394545 )
+ + LAYER met5 ( -2781750 -2577645 ) ( 205930 -2574545 )
+ + LAYER met5 ( -2776950 -2653045 ) ( 201130 -2649945 )
+ + FIXED ( 2747720 2629175 ) N ;
- vdda2 + NET vdda2 + SPECIAL + DIRECTION INPUT + USE POWER
+ PORT
- + LAYER met4 ( -1550 -1798110 ) ( 1550 1798110 )
- + LAYER met4 ( -181550 1550160 ) ( -178450 1798110 )
- + LAYER met4 ( -361550 1550160 ) ( -358450 1798110 )
- + LAYER met4 ( -541550 1550160 ) ( -538450 1798110 )
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- + LAYER met4 ( -1081550 -1798110 ) ( -1078450 30160 )
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- + LAYER met5 ( -2805150 1790210 ) ( 192130 1793310 )
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- + LAYER met5 ( -2809950 1370290 ) ( 196930 1373390 )
- + LAYER met5 ( -2809950 1190290 ) ( 196930 1193390 )
- + LAYER met5 ( -2809950 1010290 ) ( 196930 1013390 )
- + LAYER met5 ( -2809950 830290 ) ( 196930 833390 )
- + LAYER met5 ( -2809950 650290 ) ( 196930 653390 )
- + LAYER met5 ( -2809950 470290 ) ( 196930 473390 )
- + LAYER met5 ( -2809950 290290 ) ( 196930 293390 )
- + LAYER met5 ( -2809950 110290 ) ( 196930 113390 )
- + LAYER met5 ( -2809950 -69710 ) ( 196930 -66610 )
- + LAYER met5 ( -2809950 -249710 ) ( 196930 -246610 )
- + LAYER met5 ( -2809950 -429710 ) ( 196930 -426610 )
- + LAYER met5 ( -2809950 -609710 ) ( 196930 -606610 )
- + LAYER met5 ( -2809950 -789710 ) ( 196930 -786610 )
- + LAYER met5 ( -2809950 -969710 ) ( 196930 -966610 )
- + LAYER met5 ( -2809950 -1149710 ) ( 196930 -1146610 )
- + LAYER met5 ( -2809950 -1329710 ) ( 196930 -1326610 )
- + LAYER met5 ( -2809950 -1509710 ) ( 196930 -1506610 )
- + LAYER met5 ( -2809950 -1689710 ) ( 196930 -1686610 )
- + LAYER met5 ( -2805150 -1793310 ) ( 192130 -1790210 )
- + FIXED ( 2766320 1759840 ) N ;
+ + LAYER met4 ( -1550 -923975 ) ( 1550 923975 )
+ + LAYER met4 ( -181550 676025 ) ( -178450 923975 )
+ + LAYER met4 ( -361550 676025 ) ( -358450 923975 )
+ + LAYER met4 ( -541550 676025 ) ( -538450 923975 )
+ + LAYER met4 ( -721550 676025 ) ( -718450 923975 )
+ + LAYER met4 ( -901550 676025 ) ( -898450 923975 )
+ + LAYER met4 ( -1081550 676025 ) ( -1078450 923975 )
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+ + FIXED ( 2766320 2633975 ) N ;
- vssa1 + NET vssa1 + SPECIAL + DIRECTION INPUT + USE GROUND
+ PORT
+ LAYER met4 ( -1550 -1788510 ) ( 1550 1788510 )
@@ -3660,24 +3700,32 @@
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+ LAYER met5 ( -3005330 1640290 ) ( 1550 1643390 )
+ LAYER met5 ( -3005330 1460290 ) ( 1550 1463390 )
@@ -3754,7 +3810,7 @@
- vssd1 + NET vssd1 + SPECIAL + DIRECTION INPUT + USE GROUND
+ PORT
+ LAYER met4 ( -1550 -1769310 ) ( 1550 1769310 )
- + LAYER met4 ( -133930 -1769310 ) ( -130830 1769310 )
+ + LAYER met4 ( -133930 -49840 ) ( -130830 1769310 )
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+ LAYER met4 ( -493930 1550160 ) ( -490830 1769310 )
+ LAYER met4 ( -673930 1550160 ) ( -670830 1769310 )
@@ -3762,24 +3818,33 @@
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+ NEW met4 0 + SHAPE STRIPE ( 1782640 915880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1629040 915880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1475440 915880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1321840 915880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2704240 735880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2550640 735880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2397040 735880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2243440 735880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2089840 735880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1936240 735880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1782640 735880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1629040 735880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1475440 735880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1321840 735880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2704240 555880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2550640 555880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2397040 555880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2243440 555880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2089840 555880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1936240 555880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1782640 555880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1629040 555880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1475440 555880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1321840 555880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2704240 375880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2550640 375880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2397040 375880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2243440 375880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2089840 375880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1936240 375880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1782640 375880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1629040 375880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1475440 375880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1321840 375880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 529040 2535880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 375440 2535880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 221840 2535880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 529040 2355880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 375440 2355880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 221840 2355880 ) via4_1600x3100
NEW met4 0 + SHAPE STRIPE ( 2928100 3522800 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2890520 3522800 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2710520 3522800 ) via4_3100x3100
@@ -4457,9 +4607,6 @@
NEW met4 0 + SHAPE STRIPE ( 1090520 2535880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 910520 2535880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 730520 2535880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 550520 2535880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 370520 2535880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 190520 2535880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 10520 2535880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -8480 2535880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2928100 2355880 ) via4_3100x3100
@@ -4469,9 +4616,6 @@
NEW met4 0 + SHAPE STRIPE ( 1090520 2355880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 910520 2355880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 730520 2355880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 550520 2355880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 370520 2355880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 190520 2355880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 10520 2355880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -8480 2355880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2928100 2175880 ) via4_3100x3100
@@ -4481,6 +4625,9 @@
NEW met4 0 + SHAPE STRIPE ( 1090520 2175880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 910520 2175880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 730520 2175880 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 550520 2175880 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 370520 2175880 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 190520 2175880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 10520 2175880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -8480 2175880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2928100 1995880 ) via4_3100x3100
@@ -4490,6 +4637,9 @@
NEW met4 0 + SHAPE STRIPE ( 1090520 1995880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 910520 1995880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 730520 1995880 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 550520 1995880 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 370520 1995880 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 190520 1995880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 10520 1995880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -8480 1995880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2928100 1815880 ) via4_3100x3100
@@ -4499,18 +4649,20 @@
NEW met4 0 + SHAPE STRIPE ( 1090520 1815880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 910520 1815880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 730520 1815880 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 550520 1815880 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 370520 1815880 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 190520 1815880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 10520 1815880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -8480 1815880 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 2710520 1721180 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 2530520 1721180 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 2350520 1721180 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 2170520 1721180 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 1990520 1721180 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 1810520 1721180 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 1630520 1721180 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2928100 1635880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2890520 1635880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2710520 1635880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2530520 1635880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2350520 1635880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2170520 1635880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1990520 1635880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1810520 1635880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1630520 1635880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1450520 1635880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1270520 1635880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1090520 1635880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 910520 1635880 ) via4_3100x3100
@@ -4522,14 +4674,6 @@
NEW met4 0 + SHAPE STRIPE ( -8480 1635880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2928100 1455880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2890520 1455880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2710520 1455880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2530520 1455880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2350520 1455880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2170520 1455880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1990520 1455880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1810520 1455880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1630520 1455880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1450520 1455880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1270520 1455880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1090520 1455880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 910520 1455880 ) via4_3100x3100
@@ -4541,14 +4685,6 @@
NEW met4 0 + SHAPE STRIPE ( -8480 1455880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2928100 1275880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2890520 1275880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2710520 1275880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2530520 1275880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2350520 1275880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2170520 1275880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1990520 1275880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1810520 1275880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1630520 1275880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1450520 1275880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1270520 1275880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1090520 1275880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 910520 1275880 ) via4_3100x3100
@@ -4560,14 +4696,6 @@
NEW met4 0 + SHAPE STRIPE ( -8480 1275880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2928100 1095880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2890520 1095880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2710520 1095880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2530520 1095880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2350520 1095880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2170520 1095880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1990520 1095880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1810520 1095880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1630520 1095880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1450520 1095880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1270520 1095880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1090520 1095880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 910520 1095880 ) via4_3100x3100
@@ -4579,14 +4707,6 @@
NEW met4 0 + SHAPE STRIPE ( -8480 1095880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2928100 915880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2890520 915880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2710520 915880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2530520 915880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2350520 915880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2170520 915880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1990520 915880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1810520 915880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1630520 915880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1450520 915880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1270520 915880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1090520 915880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 910520 915880 ) via4_3100x3100
@@ -4598,14 +4718,6 @@
NEW met4 0 + SHAPE STRIPE ( -8480 915880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2928100 735880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2890520 735880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2710520 735880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2530520 735880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2350520 735880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2170520 735880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1990520 735880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1810520 735880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1630520 735880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1450520 735880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1270520 735880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1090520 735880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 910520 735880 ) via4_3100x3100
@@ -4617,14 +4729,6 @@
NEW met4 0 + SHAPE STRIPE ( -8480 735880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2928100 555880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2890520 555880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2710520 555880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2530520 555880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2350520 555880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2170520 555880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1990520 555880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1810520 555880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1630520 555880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1450520 555880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1270520 555880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1090520 555880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 910520 555880 ) via4_3100x3100
@@ -4636,14 +4740,6 @@
NEW met4 0 + SHAPE STRIPE ( -8480 555880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2928100 375880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2890520 375880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2710520 375880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2530520 375880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2350520 375880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2170520 375880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1990520 375880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1810520 375880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1630520 375880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1450520 375880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1270520 375880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1090520 375880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 910520 375880 ) via4_3100x3100
@@ -4655,14 +4751,6 @@
NEW met4 0 + SHAPE STRIPE ( -8480 375880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2928100 195880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2890520 195880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2710520 195880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2530520 195880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2350520 195880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2170520 195880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1990520 195880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1810520 195880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1630520 195880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1450520 195880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1270520 195880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1090520 195880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 910520 195880 ) via4_3100x3100
@@ -4721,6 +4809,7 @@
NEW met5 3100 + SHAPE STRIPE ( -14830 2175880 ) ( 2934450 2175880 )
NEW met5 3100 + SHAPE STRIPE ( -14830 1995880 ) ( 2934450 1995880 )
NEW met5 3100 + SHAPE STRIPE ( -14830 1815880 ) ( 2934450 1815880 )
+ NEW met5 3100 + SHAPE STRIPE ( 1628970 1721180 ) ( 2712070 1721180 )
NEW met5 3100 + SHAPE STRIPE ( -14830 1635880 ) ( 2934450 1635880 )
NEW met5 3100 + SHAPE STRIPE ( -14830 1455880 ) ( 2934450 1455880 )
NEW met5 3100 + SHAPE STRIPE ( -14830 1275880 ) ( 2934450 1275880 )
@@ -4740,27 +4829,35 @@
NEW met4 3100 + SHAPE STRIPE ( 1990520 3310000 ) ( 1990520 3529150 )
NEW met4 3100 + SHAPE STRIPE ( 1810520 3310000 ) ( 1810520 3529150 )
NEW met4 3100 + SHAPE STRIPE ( 1630520 3310000 ) ( 1630520 3529150 )
- NEW met4 3100 + SHAPE STRIPE ( 1450520 -9470 ) ( 1450520 3529150 )
+ NEW met4 3100 + SHAPE STRIPE ( 1450520 1710000 ) ( 1450520 3529150 )
NEW met4 3100 + SHAPE STRIPE ( 1270520 -9470 ) ( 1270520 3529150 )
NEW met4 3100 + SHAPE STRIPE ( 1090520 -9470 ) ( 1090520 3529150 )
NEW met4 3100 + SHAPE STRIPE ( 910520 -9470 ) ( 910520 3529150 )
NEW met4 3100 + SHAPE STRIPE ( 730520 -9470 ) ( 730520 3529150 )
- NEW met4 3100 + SHAPE STRIPE ( 550520 2210000 ) ( 550520 3529150 )
- NEW met4 3100 + SHAPE STRIPE ( 370520 2210000 ) ( 370520 3529150 )
- NEW met4 3100 + SHAPE STRIPE ( 190520 2210000 ) ( 190520 3529150 )
+ NEW met4 3100 + SHAPE STRIPE ( 550520 2710000 ) ( 550520 3529150 )
+ NEW met4 3100 + SHAPE STRIPE ( 370520 2710000 ) ( 370520 3529150 )
+ NEW met4 3100 + SHAPE STRIPE ( 190520 2710000 ) ( 190520 3529150 )
NEW met4 3100 + SHAPE STRIPE ( 10520 -9470 ) ( 10520 3529150 )
NEW met4 3100 + SHAPE STRIPE ( 2928100 -4670 ) ( 2928100 3524350 )
NEW met4 3100 + SHAPE STRIPE ( -8480 -4670 ) ( -8480 3524350 )
- NEW met4 3100 + SHAPE STRIPE ( 2710520 -9470 ) ( 2710520 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 2530520 -9470 ) ( 2530520 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 2350520 -9470 ) ( 2350520 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 2170520 -9470 ) ( 2170520 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 1990520 -9470 ) ( 1990520 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 1810520 -9470 ) ( 1810520 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 1630520 -9470 ) ( 1630520 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 550520 -9470 ) ( 550520 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 370520 -9470 ) ( 370520 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 190520 -9470 ) ( 190520 1790000 ) ;
+ NEW met4 3100 + SHAPE STRIPE ( 550520 -9470 ) ( 550520 2290000 )
+ NEW met4 3100 + SHAPE STRIPE ( 370520 -9470 ) ( 370520 2290000 )
+ NEW met4 3100 + SHAPE STRIPE ( 190520 -9470 ) ( 190520 2290000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2710520 1710000 ) ( 2710520 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2530520 1710000 ) ( 2530520 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2350520 1710000 ) ( 2350520 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2170520 1710000 ) ( 2170520 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1990520 1710000 ) ( 1990520 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1810520 1710000 ) ( 1810520 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1630520 1710000 ) ( 1630520 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2710520 -9470 ) ( 2710520 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2530520 -9470 ) ( 2530520 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2350520 -9470 ) ( 2350520 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2170520 -9470 ) ( 2170520 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1990520 -9470 ) ( 1990520 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1810520 -9470 ) ( 1810520 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1630520 -9470 ) ( 1630520 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1450520 -9470 ) ( 1450520 190000 ) ;
- vccd2 ( PIN vccd2 ) + USE POWER
+ ROUTED met4 0 + SHAPE STRIPE ( 2937700 3532400 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2909120 3532400 ) via4_3100x3100
@@ -4860,9 +4957,6 @@
NEW met4 0 + SHAPE STRIPE ( 1109120 2554480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 929120 2554480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 749120 2554480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 569120 2554480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 389120 2554480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 209120 2554480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 29120 2554480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -18080 2554480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2937700 2374480 ) via4_3100x3100
@@ -4873,9 +4967,6 @@
NEW met4 0 + SHAPE STRIPE ( 1109120 2374480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 929120 2374480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 749120 2374480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 569120 2374480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 389120 2374480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 209120 2374480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 29120 2374480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -18080 2374480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2937700 2194480 ) via4_3100x3100
@@ -4886,6 +4977,9 @@
NEW met4 0 + SHAPE STRIPE ( 1109120 2194480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 929120 2194480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 749120 2194480 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 569120 2194480 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 389120 2194480 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 209120 2194480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 29120 2194480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -18080 2194480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2937700 2014480 ) via4_3100x3100
@@ -4896,6 +4990,9 @@
NEW met4 0 + SHAPE STRIPE ( 1109120 2014480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 929120 2014480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 749120 2014480 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 569120 2014480 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 389120 2014480 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 209120 2014480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 29120 2014480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -18080 2014480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2937700 1834480 ) via4_3100x3100
@@ -4906,19 +5003,19 @@
NEW met4 0 + SHAPE STRIPE ( 1109120 1834480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 929120 1834480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 749120 1834480 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 569120 1834480 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 389120 1834480 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 209120 1834480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 29120 1834480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -18080 1834480 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 2549120 1739780 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 2369120 1739780 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 2189120 1739780 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 2009120 1739780 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 1829120 1739780 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 1649120 1739780 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2937700 1654480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2909120 1654480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2729120 1654480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2549120 1654480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2369120 1654480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2189120 1654480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2009120 1654480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1829120 1654480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1649120 1654480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1469120 1654480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1289120 1654480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1109120 1654480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 929120 1654480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 749120 1654480 ) via4_3100x3100
@@ -4929,15 +5026,6 @@
NEW met4 0 + SHAPE STRIPE ( -18080 1654480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2937700 1474480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2909120 1474480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2729120 1474480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2549120 1474480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2369120 1474480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2189120 1474480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2009120 1474480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1829120 1474480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1649120 1474480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1469120 1474480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1289120 1474480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1109120 1474480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 929120 1474480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 749120 1474480 ) via4_3100x3100
@@ -4948,15 +5036,6 @@
NEW met4 0 + SHAPE STRIPE ( -18080 1474480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2937700 1294480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2909120 1294480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2729120 1294480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2549120 1294480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2369120 1294480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2189120 1294480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2009120 1294480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1829120 1294480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1649120 1294480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1469120 1294480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1289120 1294480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1109120 1294480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 929120 1294480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 749120 1294480 ) via4_3100x3100
@@ -4967,15 +5046,6 @@
NEW met4 0 + SHAPE STRIPE ( -18080 1294480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2937700 1114480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2909120 1114480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2729120 1114480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2549120 1114480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2369120 1114480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2189120 1114480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2009120 1114480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1829120 1114480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1649120 1114480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1469120 1114480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1289120 1114480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1109120 1114480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 929120 1114480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 749120 1114480 ) via4_3100x3100
@@ -4986,15 +5056,6 @@
NEW met4 0 + SHAPE STRIPE ( -18080 1114480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2937700 934480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2909120 934480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2729120 934480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2549120 934480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2369120 934480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2189120 934480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2009120 934480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1829120 934480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1649120 934480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1469120 934480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1289120 934480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1109120 934480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 929120 934480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 749120 934480 ) via4_3100x3100
@@ -5005,15 +5066,6 @@
NEW met4 0 + SHAPE STRIPE ( -18080 934480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2937700 754480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2909120 754480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2729120 754480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2549120 754480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2369120 754480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2189120 754480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2009120 754480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1829120 754480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1649120 754480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1469120 754480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1289120 754480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1109120 754480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 929120 754480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 749120 754480 ) via4_3100x3100
@@ -5024,15 +5076,6 @@
NEW met4 0 + SHAPE STRIPE ( -18080 754480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2937700 574480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2909120 574480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2729120 574480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2549120 574480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2369120 574480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2189120 574480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2009120 574480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1829120 574480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1649120 574480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1469120 574480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1289120 574480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1109120 574480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 929120 574480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 749120 574480 ) via4_3100x3100
@@ -5043,15 +5086,6 @@
NEW met4 0 + SHAPE STRIPE ( -18080 574480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2937700 394480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2909120 394480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2729120 394480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2549120 394480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2369120 394480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2189120 394480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2009120 394480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1829120 394480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1649120 394480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1469120 394480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1289120 394480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1109120 394480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 929120 394480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 749120 394480 ) via4_3100x3100
@@ -5062,15 +5096,6 @@
NEW met4 0 + SHAPE STRIPE ( -18080 394480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2937700 214480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2909120 214480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2729120 214480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2549120 214480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2369120 214480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2189120 214480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2009120 214480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1829120 214480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1649120 214480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1469120 214480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1289120 214480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1109120 214480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 929120 214480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 749120 214480 ) via4_3100x3100
@@ -5128,6 +5153,7 @@
NEW met5 3100 + SHAPE STRIPE ( -24430 2194480 ) ( 2944050 2194480 )
NEW met5 3100 + SHAPE STRIPE ( -24430 2014480 ) ( 2944050 2014480 )
NEW met5 3100 + SHAPE STRIPE ( -24430 1834480 ) ( 2944050 1834480 )
+ NEW met5 3100 + SHAPE STRIPE ( 1647570 1739780 ) ( 2550670 1739780 )
NEW met5 3100 + SHAPE STRIPE ( -24430 1654480 ) ( 2944050 1654480 )
NEW met5 3100 + SHAPE STRIPE ( -24430 1474480 ) ( 2944050 1474480 )
NEW met5 3100 + SHAPE STRIPE ( -24430 1294480 ) ( 2944050 1294480 )
@@ -5140,33 +5166,42 @@
NEW met5 3100 + SHAPE STRIPE ( -24430 34480 ) ( 2944050 34480 )
NEW met5 3100 + SHAPE STRIPE ( -19630 -12720 ) ( 2939250 -12720 )
NEW met4 3100 + SHAPE STRIPE ( 2909120 -19070 ) ( 2909120 3538750 )
- NEW met4 3100 + SHAPE STRIPE ( 2729120 -19070 ) ( 2729120 3538750 )
+ NEW met4 3100 + SHAPE STRIPE ( 2729120 1710000 ) ( 2729120 3538750 )
NEW met4 3100 + SHAPE STRIPE ( 2549120 3310000 ) ( 2549120 3538750 )
NEW met4 3100 + SHAPE STRIPE ( 2369120 3310000 ) ( 2369120 3538750 )
NEW met4 3100 + SHAPE STRIPE ( 2189120 3310000 ) ( 2189120 3538750 )
NEW met4 3100 + SHAPE STRIPE ( 2009120 3310000 ) ( 2009120 3538750 )
NEW met4 3100 + SHAPE STRIPE ( 1829120 3310000 ) ( 1829120 3538750 )
NEW met4 3100 + SHAPE STRIPE ( 1649120 3310000 ) ( 1649120 3538750 )
- NEW met4 3100 + SHAPE STRIPE ( 1469120 -19070 ) ( 1469120 3538750 )
- NEW met4 3100 + SHAPE STRIPE ( 1289120 -19070 ) ( 1289120 3538750 )
+ NEW met4 3100 + SHAPE STRIPE ( 1469120 1710000 ) ( 1469120 3538750 )
+ NEW met4 3100 + SHAPE STRIPE ( 1289120 1710000 ) ( 1289120 3538750 )
NEW met4 3100 + SHAPE STRIPE ( 1109120 -19070 ) ( 1109120 3538750 )
NEW met4 3100 + SHAPE STRIPE ( 929120 -19070 ) ( 929120 3538750 )
NEW met4 3100 + SHAPE STRIPE ( 749120 -19070 ) ( 749120 3538750 )
- NEW met4 3100 + SHAPE STRIPE ( 569120 2210000 ) ( 569120 3538750 )
- NEW met4 3100 + SHAPE STRIPE ( 389120 2210000 ) ( 389120 3538750 )
- NEW met4 3100 + SHAPE STRIPE ( 209120 2210000 ) ( 209120 3538750 )
+ NEW met4 3100 + SHAPE STRIPE ( 569120 2710000 ) ( 569120 3538750 )
+ NEW met4 3100 + SHAPE STRIPE ( 389120 2710000 ) ( 389120 3538750 )
+ NEW met4 3100 + SHAPE STRIPE ( 209120 2710000 ) ( 209120 3538750 )
NEW met4 3100 + SHAPE STRIPE ( 29120 -19070 ) ( 29120 3538750 )
NEW met4 3100 + SHAPE STRIPE ( 2937700 -14270 ) ( 2937700 3533950 )
NEW met4 3100 + SHAPE STRIPE ( -18080 -14270 ) ( -18080 3533950 )
- NEW met4 3100 + SHAPE STRIPE ( 2549120 -19070 ) ( 2549120 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 2369120 -19070 ) ( 2369120 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 2189120 -19070 ) ( 2189120 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 2009120 -19070 ) ( 2009120 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 1829120 -19070 ) ( 1829120 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 1649120 -19070 ) ( 1649120 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 569120 -19070 ) ( 569120 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 389120 -19070 ) ( 389120 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 209120 -19070 ) ( 209120 1790000 ) ;
+ NEW met4 3100 + SHAPE STRIPE ( 569120 -19070 ) ( 569120 2290000 )
+ NEW met4 3100 + SHAPE STRIPE ( 389120 -19070 ) ( 389120 2290000 )
+ NEW met4 3100 + SHAPE STRIPE ( 209120 -19070 ) ( 209120 2290000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2549120 1710000 ) ( 2549120 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2369120 1710000 ) ( 2369120 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2189120 1710000 ) ( 2189120 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2009120 1710000 ) ( 2009120 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1829120 1710000 ) ( 1829120 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1649120 1710000 ) ( 1649120 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2729120 -19070 ) ( 2729120 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2549120 -19070 ) ( 2549120 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2369120 -19070 ) ( 2369120 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2189120 -19070 ) ( 2189120 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2009120 -19070 ) ( 2009120 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1829120 -19070 ) ( 1829120 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1649120 -19070 ) ( 1649120 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1469120 -19070 ) ( 1469120 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1289120 -19070 ) ( 1289120 190000 ) ;
- vdda1 ( PIN vdda1 ) + USE POWER
+ ROUTED met4 0 + SHAPE STRIPE ( 2947300 3542000 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2747720 3542000 ) via4_3100x3100
@@ -5259,9 +5294,6 @@
NEW met4 0 + SHAPE STRIPE ( 1127720 2573080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 947720 2573080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 767720 2573080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 587720 2573080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 407720 2573080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 227720 2573080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 47720 2573080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -27680 2573080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2947300 2393080 ) via4_3100x3100
@@ -5271,9 +5303,6 @@
NEW met4 0 + SHAPE STRIPE ( 1127720 2393080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 947720 2393080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 767720 2393080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 587720 2393080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 407720 2393080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 227720 2393080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 47720 2393080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -27680 2393080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2947300 2213080 ) via4_3100x3100
@@ -5295,6 +5324,9 @@
NEW met4 0 + SHAPE STRIPE ( 1127720 2033080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 947720 2033080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 767720 2033080 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 587720 2033080 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 407720 2033080 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 227720 2033080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 47720 2033080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -27680 2033080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2947300 1853080 ) via4_3100x3100
@@ -5304,18 +5336,18 @@
NEW met4 0 + SHAPE STRIPE ( 1127720 1853080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 947720 1853080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 767720 1853080 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 587720 1853080 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 407720 1853080 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 227720 1853080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 47720 1853080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -27680 1853080 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 2567720 1758380 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 2387720 1758380 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 2207720 1758380 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 2027720 1758380 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 1847720 1758380 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 1667720 1758380 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2947300 1673080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2747720 1673080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2567720 1673080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2387720 1673080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2207720 1673080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2027720 1673080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1847720 1673080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1667720 1673080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1487720 1673080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1307720 1673080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1127720 1673080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 947720 1673080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 767720 1673080 ) via4_3100x3100
@@ -5325,15 +5357,6 @@
NEW met4 0 + SHAPE STRIPE ( 47720 1673080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -27680 1673080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2947300 1493080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2747720 1493080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2567720 1493080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2387720 1493080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2207720 1493080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2027720 1493080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1847720 1493080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1667720 1493080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1487720 1493080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1307720 1493080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1127720 1493080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 947720 1493080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 767720 1493080 ) via4_3100x3100
@@ -5343,15 +5366,6 @@
NEW met4 0 + SHAPE STRIPE ( 47720 1493080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -27680 1493080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2947300 1313080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2747720 1313080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2567720 1313080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2387720 1313080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2207720 1313080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2027720 1313080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1847720 1313080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1667720 1313080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1487720 1313080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1307720 1313080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1127720 1313080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 947720 1313080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 767720 1313080 ) via4_3100x3100
@@ -5361,15 +5375,6 @@
NEW met4 0 + SHAPE STRIPE ( 47720 1313080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -27680 1313080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2947300 1133080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2747720 1133080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2567720 1133080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2387720 1133080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2207720 1133080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2027720 1133080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1847720 1133080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1667720 1133080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1487720 1133080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1307720 1133080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1127720 1133080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 947720 1133080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 767720 1133080 ) via4_3100x3100
@@ -5379,15 +5384,6 @@
NEW met4 0 + SHAPE STRIPE ( 47720 1133080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -27680 1133080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2947300 953080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2747720 953080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2567720 953080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2387720 953080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2207720 953080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2027720 953080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1847720 953080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1667720 953080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1487720 953080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1307720 953080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1127720 953080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 947720 953080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 767720 953080 ) via4_3100x3100
@@ -5397,15 +5393,6 @@
NEW met4 0 + SHAPE STRIPE ( 47720 953080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -27680 953080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2947300 773080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2747720 773080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2567720 773080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2387720 773080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2207720 773080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2027720 773080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1847720 773080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1667720 773080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1487720 773080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1307720 773080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1127720 773080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 947720 773080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 767720 773080 ) via4_3100x3100
@@ -5415,15 +5402,6 @@
NEW met4 0 + SHAPE STRIPE ( 47720 773080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -27680 773080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2947300 593080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2747720 593080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2567720 593080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2387720 593080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2207720 593080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2027720 593080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1847720 593080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1667720 593080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1487720 593080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1307720 593080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1127720 593080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 947720 593080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 767720 593080 ) via4_3100x3100
@@ -5433,15 +5411,6 @@
NEW met4 0 + SHAPE STRIPE ( 47720 593080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -27680 593080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2947300 413080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2747720 413080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2567720 413080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2387720 413080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2207720 413080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2027720 413080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1847720 413080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1667720 413080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1487720 413080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1307720 413080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1127720 413080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 947720 413080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 767720 413080 ) via4_3100x3100
@@ -5451,15 +5420,6 @@
NEW met4 0 + SHAPE STRIPE ( 47720 413080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -27680 413080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2947300 233080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2747720 233080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2567720 233080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2387720 233080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2207720 233080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2027720 233080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1847720 233080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1667720 233080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1487720 233080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1307720 233080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1127720 233080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 947720 233080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 767720 233080 ) via4_3100x3100
@@ -5515,6 +5475,7 @@
NEW met5 3100 + SHAPE STRIPE ( -34030 2213080 ) ( 2953650 2213080 )
NEW met5 3100 + SHAPE STRIPE ( -34030 2033080 ) ( 2953650 2033080 )
NEW met5 3100 + SHAPE STRIPE ( -34030 1853080 ) ( 2953650 1853080 )
+ NEW met5 3100 + SHAPE STRIPE ( 1666170 1758380 ) ( 2569270 1758380 )
NEW met5 3100 + SHAPE STRIPE ( -34030 1673080 ) ( 2953650 1673080 )
NEW met5 3100 + SHAPE STRIPE ( -34030 1493080 ) ( 2953650 1493080 )
NEW met5 3100 + SHAPE STRIPE ( -34030 1313080 ) ( 2953650 1313080 )
@@ -5526,33 +5487,42 @@
NEW met5 3100 + SHAPE STRIPE ( -34030 233080 ) ( 2953650 233080 )
NEW met5 3100 + SHAPE STRIPE ( -34030 53080 ) ( 2953650 53080 )
NEW met5 3100 + SHAPE STRIPE ( -29230 -22320 ) ( 2948850 -22320 )
- NEW met4 3100 + SHAPE STRIPE ( 2747720 -28670 ) ( 2747720 3548350 )
+ NEW met4 3100 + SHAPE STRIPE ( 2747720 1710000 ) ( 2747720 3548350 )
NEW met4 3100 + SHAPE STRIPE ( 2567720 3310000 ) ( 2567720 3548350 )
NEW met4 3100 + SHAPE STRIPE ( 2387720 3310000 ) ( 2387720 3548350 )
NEW met4 3100 + SHAPE STRIPE ( 2207720 3310000 ) ( 2207720 3548350 )
NEW met4 3100 + SHAPE STRIPE ( 2027720 3310000 ) ( 2027720 3548350 )
NEW met4 3100 + SHAPE STRIPE ( 1847720 3310000 ) ( 1847720 3548350 )
NEW met4 3100 + SHAPE STRIPE ( 1667720 3310000 ) ( 1667720 3548350 )
- NEW met4 3100 + SHAPE STRIPE ( 1487720 -28670 ) ( 1487720 3548350 )
- NEW met4 3100 + SHAPE STRIPE ( 1307720 -28670 ) ( 1307720 3548350 )
+ NEW met4 3100 + SHAPE STRIPE ( 1487720 1710000 ) ( 1487720 3548350 )
+ NEW met4 3100 + SHAPE STRIPE ( 1307720 1710000 ) ( 1307720 3548350 )
NEW met4 3100 + SHAPE STRIPE ( 1127720 -28670 ) ( 1127720 3548350 )
NEW met4 3100 + SHAPE STRIPE ( 947720 -28670 ) ( 947720 3548350 )
NEW met4 3100 + SHAPE STRIPE ( 767720 -28670 ) ( 767720 3548350 )
- NEW met4 3100 + SHAPE STRIPE ( 587720 2210000 ) ( 587720 3548350 )
- NEW met4 3100 + SHAPE STRIPE ( 407720 2210000 ) ( 407720 3548350 )
- NEW met4 3100 + SHAPE STRIPE ( 227720 2210000 ) ( 227720 3548350 )
+ NEW met4 3100 + SHAPE STRIPE ( 587720 2710000 ) ( 587720 3548350 )
+ NEW met4 3100 + SHAPE STRIPE ( 407720 2710000 ) ( 407720 3548350 )
+ NEW met4 3100 + SHAPE STRIPE ( 227720 2710000 ) ( 227720 3548350 )
NEW met4 3100 + SHAPE STRIPE ( 47720 -28670 ) ( 47720 3548350 )
NEW met4 3100 + SHAPE STRIPE ( 2947300 -23870 ) ( 2947300 3543550 )
NEW met4 3100 + SHAPE STRIPE ( -27680 -23870 ) ( -27680 3543550 )
- NEW met4 3100 + SHAPE STRIPE ( 2567720 -28670 ) ( 2567720 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 2387720 -28670 ) ( 2387720 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 2207720 -28670 ) ( 2207720 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 2027720 -28670 ) ( 2027720 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 1847720 -28670 ) ( 1847720 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 1667720 -28670 ) ( 1667720 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 587720 -28670 ) ( 587720 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 407720 -28670 ) ( 407720 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 227720 -28670 ) ( 227720 1790000 ) ;
+ NEW met4 3100 + SHAPE STRIPE ( 587720 -28670 ) ( 587720 2290000 )
+ NEW met4 3100 + SHAPE STRIPE ( 407720 -28670 ) ( 407720 2290000 )
+ NEW met4 3100 + SHAPE STRIPE ( 227720 -28670 ) ( 227720 2290000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2567720 1710000 ) ( 2567720 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2387720 1710000 ) ( 2387720 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2207720 1710000 ) ( 2207720 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2027720 1710000 ) ( 2027720 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1847720 1710000 ) ( 1847720 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1667720 1710000 ) ( 1667720 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2747720 -28670 ) ( 2747720 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2567720 -28670 ) ( 2567720 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2387720 -28670 ) ( 2387720 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2207720 -28670 ) ( 2207720 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2027720 -28670 ) ( 2027720 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1847720 -28670 ) ( 1847720 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1667720 -28670 ) ( 1667720 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1487720 -28670 ) ( 1487720 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1307720 -28670 ) ( 1307720 190000 ) ;
- vdda2 ( PIN vdda2 ) + USE POWER
+ ROUTED met4 0 + SHAPE STRIPE ( 2956900 3551600 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2766320 3551600 ) via4_3100x3100
@@ -5647,9 +5617,6 @@
NEW met4 0 + SHAPE STRIPE ( 1146320 2591680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 966320 2591680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 786320 2591680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 606320 2591680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 426320 2591680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 246320 2591680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 66320 2591680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -37280 2591680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2956900 2411680 ) via4_3100x3100
@@ -5658,9 +5625,6 @@
NEW met4 0 + SHAPE STRIPE ( 1146320 2411680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 966320 2411680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 786320 2411680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 606320 2411680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 426320 2411680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 246320 2411680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 66320 2411680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -37280 2411680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2956900 2231680 ) via4_3100x3100
@@ -5680,6 +5644,9 @@
NEW met4 0 + SHAPE STRIPE ( 1146320 2051680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 966320 2051680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 786320 2051680 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 606320 2051680 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 426320 2051680 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 246320 2051680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 66320 2051680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -37280 2051680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2956900 1871680 ) via4_3100x3100
@@ -5688,18 +5655,19 @@
NEW met4 0 + SHAPE STRIPE ( 1146320 1871680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 966320 1871680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 786320 1871680 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 606320 1871680 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 426320 1871680 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 246320 1871680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 66320 1871680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -37280 1871680 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 2586320 1776980 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 2406320 1776980 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 2226320 1776980 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 2046320 1776980 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 1866320 1776980 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 1686320 1776980 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 1506320 1776980 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2956900 1691680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2766320 1691680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2586320 1691680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2406320 1691680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2226320 1691680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2046320 1691680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1866320 1691680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1686320 1691680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1506320 1691680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1326320 1691680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1146320 1691680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 966320 1691680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 786320 1691680 ) via4_3100x3100
@@ -5709,15 +5677,6 @@
NEW met4 0 + SHAPE STRIPE ( 66320 1691680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -37280 1691680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2956900 1511680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2766320 1511680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2586320 1511680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2406320 1511680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2226320 1511680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2046320 1511680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1866320 1511680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1686320 1511680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1506320 1511680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1326320 1511680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1146320 1511680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 966320 1511680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 786320 1511680 ) via4_3100x3100
@@ -5727,15 +5686,6 @@
NEW met4 0 + SHAPE STRIPE ( 66320 1511680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -37280 1511680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2956900 1331680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2766320 1331680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2586320 1331680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2406320 1331680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2226320 1331680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2046320 1331680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1866320 1331680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1686320 1331680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1506320 1331680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1326320 1331680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1146320 1331680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 966320 1331680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 786320 1331680 ) via4_3100x3100
@@ -5745,15 +5695,6 @@
NEW met4 0 + SHAPE STRIPE ( 66320 1331680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -37280 1331680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2956900 1151680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2766320 1151680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2586320 1151680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2406320 1151680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2226320 1151680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2046320 1151680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1866320 1151680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1686320 1151680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1506320 1151680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1326320 1151680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1146320 1151680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 966320 1151680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 786320 1151680 ) via4_3100x3100
@@ -5763,15 +5704,6 @@
NEW met4 0 + SHAPE STRIPE ( 66320 1151680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -37280 1151680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2956900 971680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2766320 971680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2586320 971680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2406320 971680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2226320 971680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2046320 971680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1866320 971680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1686320 971680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1506320 971680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1326320 971680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1146320 971680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 966320 971680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 786320 971680 ) via4_3100x3100
@@ -5781,15 +5713,6 @@
NEW met4 0 + SHAPE STRIPE ( 66320 971680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -37280 971680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2956900 791680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2766320 791680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2586320 791680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2406320 791680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2226320 791680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2046320 791680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1866320 791680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1686320 791680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1506320 791680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1326320 791680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1146320 791680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 966320 791680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 786320 791680 ) via4_3100x3100
@@ -5799,15 +5722,6 @@
NEW met4 0 + SHAPE STRIPE ( 66320 791680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -37280 791680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2956900 611680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2766320 611680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2586320 611680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2406320 611680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2226320 611680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2046320 611680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1866320 611680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1686320 611680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1506320 611680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1326320 611680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1146320 611680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 966320 611680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 786320 611680 ) via4_3100x3100
@@ -5817,15 +5731,6 @@
NEW met4 0 + SHAPE STRIPE ( 66320 611680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -37280 611680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2956900 431680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2766320 431680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2586320 431680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2406320 431680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2226320 431680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2046320 431680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1866320 431680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1686320 431680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1506320 431680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1326320 431680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1146320 431680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 966320 431680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 786320 431680 ) via4_3100x3100
@@ -5835,15 +5740,6 @@
NEW met4 0 + SHAPE STRIPE ( 66320 431680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -37280 431680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2956900 251680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2766320 251680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2586320 251680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2406320 251680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2226320 251680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2046320 251680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1866320 251680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1686320 251680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1506320 251680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1326320 251680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1146320 251680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 966320 251680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 786320 251680 ) via4_3100x3100
@@ -5899,6 +5795,7 @@
NEW met5 3100 + SHAPE STRIPE ( -43630 2231680 ) ( 2963250 2231680 )
NEW met5 3100 + SHAPE STRIPE ( -43630 2051680 ) ( 2963250 2051680 )
NEW met5 3100 + SHAPE STRIPE ( -43630 1871680 ) ( 2963250 1871680 )
+ NEW met5 3100 + SHAPE STRIPE ( 1504770 1776980 ) ( 2587870 1776980 )
NEW met5 3100 + SHAPE STRIPE ( -43630 1691680 ) ( 2963250 1691680 )
NEW met5 3100 + SHAPE STRIPE ( -43630 1511680 ) ( 2963250 1511680 )
NEW met5 3100 + SHAPE STRIPE ( -43630 1331680 ) ( 2963250 1331680 )
@@ -5910,7 +5807,7 @@
NEW met5 3100 + SHAPE STRIPE ( -43630 251680 ) ( 2963250 251680 )
NEW met5 3100 + SHAPE STRIPE ( -43630 71680 ) ( 2963250 71680 )
NEW met5 3100 + SHAPE STRIPE ( -38830 -31920 ) ( 2958450 -31920 )
- NEW met4 3100 + SHAPE STRIPE ( 2766320 -38270 ) ( 2766320 3557950 )
+ NEW met4 3100 + SHAPE STRIPE ( 2766320 1710000 ) ( 2766320 3557950 )
NEW met4 3100 + SHAPE STRIPE ( 2586320 3310000 ) ( 2586320 3557950 )
NEW met4 3100 + SHAPE STRIPE ( 2406320 3310000 ) ( 2406320 3557950 )
NEW met4 3100 + SHAPE STRIPE ( 2226320 3310000 ) ( 2226320 3557950 )
@@ -5918,26 +5815,35 @@
NEW met4 3100 + SHAPE STRIPE ( 1866320 3310000 ) ( 1866320 3557950 )
NEW met4 3100 + SHAPE STRIPE ( 1686320 3310000 ) ( 1686320 3557950 )
NEW met4 3100 + SHAPE STRIPE ( 1506320 3310000 ) ( 1506320 3557950 )
- NEW met4 3100 + SHAPE STRIPE ( 1326320 -38270 ) ( 1326320 3557950 )
+ NEW met4 3100 + SHAPE STRIPE ( 1326320 1710000 ) ( 1326320 3557950 )
NEW met4 3100 + SHAPE STRIPE ( 1146320 -38270 ) ( 1146320 3557950 )
NEW met4 3100 + SHAPE STRIPE ( 966320 -38270 ) ( 966320 3557950 )
NEW met4 3100 + SHAPE STRIPE ( 786320 -38270 ) ( 786320 3557950 )
- NEW met4 3100 + SHAPE STRIPE ( 606320 2210000 ) ( 606320 3557950 )
- NEW met4 3100 + SHAPE STRIPE ( 426320 2210000 ) ( 426320 3557950 )
- NEW met4 3100 + SHAPE STRIPE ( 246320 2210000 ) ( 246320 3557950 )
+ NEW met4 3100 + SHAPE STRIPE ( 606320 2710000 ) ( 606320 3557950 )
+ NEW met4 3100 + SHAPE STRIPE ( 426320 2710000 ) ( 426320 3557950 )
+ NEW met4 3100 + SHAPE STRIPE ( 246320 2710000 ) ( 246320 3557950 )
NEW met4 3100 + SHAPE STRIPE ( 66320 -38270 ) ( 66320 3557950 )
NEW met4 3100 + SHAPE STRIPE ( 2956900 -33470 ) ( 2956900 3553150 )
NEW met4 3100 + SHAPE STRIPE ( -37280 -33470 ) ( -37280 3553150 )
- NEW met4 3100 + SHAPE STRIPE ( 2586320 -38270 ) ( 2586320 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 2406320 -38270 ) ( 2406320 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 2226320 -38270 ) ( 2226320 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 2046320 -38270 ) ( 2046320 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 1866320 -38270 ) ( 1866320 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 1686320 -38270 ) ( 1686320 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 1506320 -38270 ) ( 1506320 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 606320 -38270 ) ( 606320 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 426320 -38270 ) ( 426320 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 246320 -38270 ) ( 246320 1790000 ) ;
+ NEW met4 3100 + SHAPE STRIPE ( 606320 -38270 ) ( 606320 2290000 )
+ NEW met4 3100 + SHAPE STRIPE ( 426320 -38270 ) ( 426320 2290000 )
+ NEW met4 3100 + SHAPE STRIPE ( 246320 -38270 ) ( 246320 2290000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2586320 1710000 ) ( 2586320 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2406320 1710000 ) ( 2406320 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2226320 1710000 ) ( 2226320 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2046320 1710000 ) ( 2046320 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1866320 1710000 ) ( 1866320 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1686320 1710000 ) ( 1686320 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1506320 1710000 ) ( 1506320 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2766320 -38270 ) ( 2766320 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2586320 -38270 ) ( 2586320 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2406320 -38270 ) ( 2406320 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2226320 -38270 ) ( 2226320 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2046320 -38270 ) ( 2046320 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1866320 -38270 ) ( 1866320 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1686320 -38270 ) ( 1686320 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1506320 -38270 ) ( 1506320 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1326320 -38270 ) ( 1326320 190000 ) ;
- vssa1 ( PIN vssa1 ) + USE GROUND
+ ROUTED met4 0 + SHAPE STRIPE ( 2952100 3546800 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2837720 3546800 ) via4_3100x3100
@@ -6015,8 +5921,6 @@
NEW met4 0 + SHAPE STRIPE ( 1037720 2663080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 857720 2663080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 677720 2663080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 497720 2663080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 317720 2663080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 137720 2663080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -32480 2663080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2952100 2483080 ) via4_3100x3100
@@ -6026,8 +5930,6 @@
NEW met4 0 + SHAPE STRIPE ( 1037720 2483080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 857720 2483080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 677720 2483080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 497720 2483080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 317720 2483080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 137720 2483080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -32480 2483080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2952100 2303080 ) via4_3100x3100
@@ -6037,8 +5939,6 @@
NEW met4 0 + SHAPE STRIPE ( 1037720 2303080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 857720 2303080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 677720 2303080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 497720 2303080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 317720 2303080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 137720 2303080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -32480 2303080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2952100 2123080 ) via4_3100x3100
@@ -6048,6 +5948,8 @@
NEW met4 0 + SHAPE STRIPE ( 1037720 2123080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 857720 2123080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 677720 2123080 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 497720 2123080 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 317720 2123080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 137720 2123080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -32480 2123080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2952100 1943080 ) via4_3100x3100
@@ -6057,6 +5959,8 @@
NEW met4 0 + SHAPE STRIPE ( 1037720 1943080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 857720 1943080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 677720 1943080 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 497720 1943080 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 317720 1943080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 137720 1943080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -32480 1943080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2952100 1763080 ) via4_3100x3100
@@ -6079,14 +5983,6 @@
NEW met4 0 + SHAPE STRIPE ( -32480 1763080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2952100 1583080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2837720 1583080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2657720 1583080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2477720 1583080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2297720 1583080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2117720 1583080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1937720 1583080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1757720 1583080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1577720 1583080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1397720 1583080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1217720 1583080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1037720 1583080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 857720 1583080 ) via4_3100x3100
@@ -6097,14 +5993,6 @@
NEW met4 0 + SHAPE STRIPE ( -32480 1583080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2952100 1403080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2837720 1403080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2657720 1403080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2477720 1403080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2297720 1403080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2117720 1403080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1937720 1403080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1757720 1403080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1577720 1403080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1397720 1403080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1217720 1403080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1037720 1403080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 857720 1403080 ) via4_3100x3100
@@ -6115,14 +6003,6 @@
NEW met4 0 + SHAPE STRIPE ( -32480 1403080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2952100 1223080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2837720 1223080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2657720 1223080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2477720 1223080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2297720 1223080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2117720 1223080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1937720 1223080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1757720 1223080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1577720 1223080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1397720 1223080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1217720 1223080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1037720 1223080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 857720 1223080 ) via4_3100x3100
@@ -6133,14 +6013,6 @@
NEW met4 0 + SHAPE STRIPE ( -32480 1223080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2952100 1043080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2837720 1043080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2657720 1043080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2477720 1043080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2297720 1043080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2117720 1043080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1937720 1043080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1757720 1043080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1577720 1043080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1397720 1043080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1217720 1043080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1037720 1043080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 857720 1043080 ) via4_3100x3100
@@ -6151,14 +6023,6 @@
NEW met4 0 + SHAPE STRIPE ( -32480 1043080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2952100 863080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2837720 863080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2657720 863080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2477720 863080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2297720 863080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2117720 863080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1937720 863080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1757720 863080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1577720 863080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1397720 863080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1217720 863080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1037720 863080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 857720 863080 ) via4_3100x3100
@@ -6169,14 +6033,6 @@
NEW met4 0 + SHAPE STRIPE ( -32480 863080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2952100 683080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2837720 683080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2657720 683080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2477720 683080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2297720 683080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2117720 683080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1937720 683080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1757720 683080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1577720 683080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1397720 683080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1217720 683080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1037720 683080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 857720 683080 ) via4_3100x3100
@@ -6187,14 +6043,6 @@
NEW met4 0 + SHAPE STRIPE ( -32480 683080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2952100 503080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2837720 503080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2657720 503080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2477720 503080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2297720 503080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2117720 503080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1937720 503080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1757720 503080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1577720 503080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1397720 503080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1217720 503080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1037720 503080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 857720 503080 ) via4_3100x3100
@@ -6205,14 +6053,6 @@
NEW met4 0 + SHAPE STRIPE ( -32480 503080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2952100 323080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2837720 323080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2657720 323080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2477720 323080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2297720 323080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2117720 323080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1937720 323080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1757720 323080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1577720 323080 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1397720 323080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1217720 323080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1037720 323080 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 857720 323080 ) via4_3100x3100
@@ -6287,24 +6127,32 @@
NEW met4 3100 + SHAPE STRIPE ( 1937720 3310000 ) ( 1937720 3548350 )
NEW met4 3100 + SHAPE STRIPE ( 1757720 3310000 ) ( 1757720 3548350 )
NEW met4 3100 + SHAPE STRIPE ( 1577720 3310000 ) ( 1577720 3548350 )
- NEW met4 3100 + SHAPE STRIPE ( 1397720 -28670 ) ( 1397720 3548350 )
+ NEW met4 3100 + SHAPE STRIPE ( 1397720 1710000 ) ( 1397720 3548350 )
NEW met4 3100 + SHAPE STRIPE ( 1217720 -28670 ) ( 1217720 3548350 )
NEW met4 3100 + SHAPE STRIPE ( 1037720 -28670 ) ( 1037720 3548350 )
NEW met4 3100 + SHAPE STRIPE ( 857720 -28670 ) ( 857720 3548350 )
NEW met4 3100 + SHAPE STRIPE ( 677720 -28670 ) ( 677720 3548350 )
- NEW met4 3100 + SHAPE STRIPE ( 497720 2210000 ) ( 497720 3548350 )
- NEW met4 3100 + SHAPE STRIPE ( 317720 2210000 ) ( 317720 3548350 )
+ NEW met4 3100 + SHAPE STRIPE ( 497720 2710000 ) ( 497720 3548350 )
+ NEW met4 3100 + SHAPE STRIPE ( 317720 2710000 ) ( 317720 3548350 )
NEW met4 3100 + SHAPE STRIPE ( 137720 -28670 ) ( 137720 3548350 )
NEW met4 3100 + SHAPE STRIPE ( -32480 -28670 ) ( -32480 3548350 )
- NEW met4 3100 + SHAPE STRIPE ( 2657720 -28670 ) ( 2657720 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 2477720 -28670 ) ( 2477720 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 2297720 -28670 ) ( 2297720 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 2117720 -28670 ) ( 2117720 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 1937720 -28670 ) ( 1937720 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 1757720 -28670 ) ( 1757720 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 1577720 -28670 ) ( 1577720 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 497720 -28670 ) ( 497720 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 317720 -28670 ) ( 317720 1790000 ) ;
+ NEW met4 3100 + SHAPE STRIPE ( 497720 -28670 ) ( 497720 2290000 )
+ NEW met4 3100 + SHAPE STRIPE ( 317720 -28670 ) ( 317720 2290000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2657720 1710000 ) ( 2657720 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2477720 1710000 ) ( 2477720 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2297720 1710000 ) ( 2297720 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2117720 1710000 ) ( 2117720 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1937720 1710000 ) ( 1937720 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1757720 1710000 ) ( 1757720 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1577720 1710000 ) ( 1577720 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2657720 -28670 ) ( 2657720 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2477720 -28670 ) ( 2477720 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2297720 -28670 ) ( 2297720 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2117720 -28670 ) ( 2117720 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1937720 -28670 ) ( 1937720 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1757720 -28670 ) ( 1757720 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1577720 -28670 ) ( 1577720 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1397720 -28670 ) ( 1397720 190000 ) ;
- vssa2 ( PIN vssa2 ) + USE GROUND
+ ROUTED met4 0 + SHAPE STRIPE ( 2961700 3556400 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2856320 3556400 ) via4_3100x3100
@@ -6382,8 +6230,6 @@
NEW met4 0 + SHAPE STRIPE ( 1056320 2681680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 876320 2681680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 696320 2681680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 516320 2681680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 336320 2681680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 156320 2681680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -42080 2681680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2961700 2501680 ) via4_3100x3100
@@ -6393,8 +6239,6 @@
NEW met4 0 + SHAPE STRIPE ( 1056320 2501680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 876320 2501680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 696320 2501680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 516320 2501680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 336320 2501680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 156320 2501680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -42080 2501680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2961700 2321680 ) via4_3100x3100
@@ -6404,8 +6248,6 @@
NEW met4 0 + SHAPE STRIPE ( 1056320 2321680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 876320 2321680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 696320 2321680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 516320 2321680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 336320 2321680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 156320 2321680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -42080 2321680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2961700 2141680 ) via4_3100x3100
@@ -6415,6 +6257,8 @@
NEW met4 0 + SHAPE STRIPE ( 1056320 2141680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 876320 2141680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 696320 2141680 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 516320 2141680 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 336320 2141680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 156320 2141680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -42080 2141680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2961700 1961680 ) via4_3100x3100
@@ -6424,6 +6268,8 @@
NEW met4 0 + SHAPE STRIPE ( 1056320 1961680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 876320 1961680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 696320 1961680 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 516320 1961680 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 336320 1961680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 156320 1961680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -42080 1961680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2961700 1781680 ) via4_3100x3100
@@ -6446,14 +6292,6 @@
NEW met4 0 + SHAPE STRIPE ( -42080 1781680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2961700 1601680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2856320 1601680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2676320 1601680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2496320 1601680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2316320 1601680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2136320 1601680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1956320 1601680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1776320 1601680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1596320 1601680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1416320 1601680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1236320 1601680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1056320 1601680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 876320 1601680 ) via4_3100x3100
@@ -6464,14 +6302,6 @@
NEW met4 0 + SHAPE STRIPE ( -42080 1601680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2961700 1421680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2856320 1421680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2676320 1421680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2496320 1421680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2316320 1421680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2136320 1421680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1956320 1421680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1776320 1421680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1596320 1421680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1416320 1421680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1236320 1421680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1056320 1421680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 876320 1421680 ) via4_3100x3100
@@ -6482,14 +6312,6 @@
NEW met4 0 + SHAPE STRIPE ( -42080 1421680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2961700 1241680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2856320 1241680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2676320 1241680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2496320 1241680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2316320 1241680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2136320 1241680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1956320 1241680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1776320 1241680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1596320 1241680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1416320 1241680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1236320 1241680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1056320 1241680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 876320 1241680 ) via4_3100x3100
@@ -6500,14 +6322,6 @@
NEW met4 0 + SHAPE STRIPE ( -42080 1241680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2961700 1061680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2856320 1061680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2676320 1061680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2496320 1061680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2316320 1061680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2136320 1061680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1956320 1061680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1776320 1061680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1596320 1061680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1416320 1061680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1236320 1061680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1056320 1061680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 876320 1061680 ) via4_3100x3100
@@ -6518,14 +6332,6 @@
NEW met4 0 + SHAPE STRIPE ( -42080 1061680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2961700 881680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2856320 881680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2676320 881680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2496320 881680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2316320 881680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2136320 881680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1956320 881680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1776320 881680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1596320 881680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1416320 881680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1236320 881680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1056320 881680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 876320 881680 ) via4_3100x3100
@@ -6536,14 +6342,6 @@
NEW met4 0 + SHAPE STRIPE ( -42080 881680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2961700 701680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2856320 701680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2676320 701680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2496320 701680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2316320 701680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2136320 701680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1956320 701680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1776320 701680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1596320 701680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1416320 701680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1236320 701680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1056320 701680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 876320 701680 ) via4_3100x3100
@@ -6554,14 +6352,6 @@
NEW met4 0 + SHAPE STRIPE ( -42080 701680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2961700 521680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2856320 521680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2676320 521680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2496320 521680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2316320 521680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2136320 521680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1956320 521680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1776320 521680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1596320 521680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1416320 521680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1236320 521680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1056320 521680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 876320 521680 ) via4_3100x3100
@@ -6572,14 +6362,6 @@
NEW met4 0 + SHAPE STRIPE ( -42080 521680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2961700 341680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2856320 341680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2676320 341680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2496320 341680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2316320 341680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2136320 341680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1956320 341680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1776320 341680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1596320 341680 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1416320 341680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1236320 341680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1056320 341680 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 876320 341680 ) via4_3100x3100
@@ -6654,24 +6436,32 @@
NEW met4 3100 + SHAPE STRIPE ( 1956320 3310000 ) ( 1956320 3557950 )
NEW met4 3100 + SHAPE STRIPE ( 1776320 3310000 ) ( 1776320 3557950 )
NEW met4 3100 + SHAPE STRIPE ( 1596320 3310000 ) ( 1596320 3557950 )
- NEW met4 3100 + SHAPE STRIPE ( 1416320 -38270 ) ( 1416320 3557950 )
+ NEW met4 3100 + SHAPE STRIPE ( 1416320 1710000 ) ( 1416320 3557950 )
NEW met4 3100 + SHAPE STRIPE ( 1236320 -38270 ) ( 1236320 3557950 )
NEW met4 3100 + SHAPE STRIPE ( 1056320 -38270 ) ( 1056320 3557950 )
NEW met4 3100 + SHAPE STRIPE ( 876320 -38270 ) ( 876320 3557950 )
NEW met4 3100 + SHAPE STRIPE ( 696320 -38270 ) ( 696320 3557950 )
- NEW met4 3100 + SHAPE STRIPE ( 516320 2210000 ) ( 516320 3557950 )
- NEW met4 3100 + SHAPE STRIPE ( 336320 2210000 ) ( 336320 3557950 )
+ NEW met4 3100 + SHAPE STRIPE ( 516320 2710000 ) ( 516320 3557950 )
+ NEW met4 3100 + SHAPE STRIPE ( 336320 2710000 ) ( 336320 3557950 )
NEW met4 3100 + SHAPE STRIPE ( 156320 -38270 ) ( 156320 3557950 )
NEW met4 3100 + SHAPE STRIPE ( -42080 -38270 ) ( -42080 3557950 )
- NEW met4 3100 + SHAPE STRIPE ( 2676320 -38270 ) ( 2676320 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 2496320 -38270 ) ( 2496320 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 2316320 -38270 ) ( 2316320 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 2136320 -38270 ) ( 2136320 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 1956320 -38270 ) ( 1956320 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 1776320 -38270 ) ( 1776320 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 1596320 -38270 ) ( 1596320 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 516320 -38270 ) ( 516320 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 336320 -38270 ) ( 336320 1790000 ) ;
+ NEW met4 3100 + SHAPE STRIPE ( 516320 -38270 ) ( 516320 2290000 )
+ NEW met4 3100 + SHAPE STRIPE ( 336320 -38270 ) ( 336320 2290000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2676320 1710000 ) ( 2676320 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2496320 1710000 ) ( 2496320 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2316320 1710000 ) ( 2316320 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2136320 1710000 ) ( 2136320 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1956320 1710000 ) ( 1956320 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1776320 1710000 ) ( 1776320 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1596320 1710000 ) ( 1596320 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2676320 -38270 ) ( 2676320 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2496320 -38270 ) ( 2496320 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2316320 -38270 ) ( 2316320 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2136320 -38270 ) ( 2136320 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1956320 -38270 ) ( 1956320 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1776320 -38270 ) ( 1776320 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1596320 -38270 ) ( 1596320 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1416320 -38270 ) ( 1416320 190000 ) ;
- vssd1 ( PIN vssd1 ) + USE GROUND
+ ROUTED met4 0 + SHAPE STRIPE ( 2673840 3165880 ) via4_1600x3100
NEW met4 0 + SHAPE STRIPE ( 2520240 3165880 ) via4_1600x3100
@@ -6737,10 +6527,90 @@
NEW met4 0 + SHAPE STRIPE ( 1905840 1905880 ) via4_1600x3100
NEW met4 0 + SHAPE STRIPE ( 1752240 1905880 ) via4_1600x3100
NEW met4 0 + SHAPE STRIPE ( 1598640 1905880 ) via4_1600x3100
- NEW met4 0 + SHAPE STRIPE ( 452240 2085880 ) via4_1600x3100
- NEW met4 0 + SHAPE STRIPE ( 298640 2085880 ) via4_1600x3100
- NEW met4 0 + SHAPE STRIPE ( 452240 1905880 ) via4_1600x3100
- NEW met4 0 + SHAPE STRIPE ( 298640 1905880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2781040 1545880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2627440 1545880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2473840 1545880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2320240 1545880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2166640 1545880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2013040 1545880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1859440 1545880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1705840 1545880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1552240 1545880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1398640 1545880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2781040 1365880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2627440 1365880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2473840 1365880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2320240 1365880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2166640 1365880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2013040 1365880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1859440 1365880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1705840 1365880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1552240 1365880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1398640 1365880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2781040 1185880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2627440 1185880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2473840 1185880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2320240 1185880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2166640 1185880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2013040 1185880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1859440 1185880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1705840 1185880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1552240 1185880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1398640 1185880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2781040 1005880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2627440 1005880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2473840 1005880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2320240 1005880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2166640 1005880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2013040 1005880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1859440 1005880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1705840 1005880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1552240 1005880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1398640 1005880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2781040 825880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2627440 825880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2473840 825880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2320240 825880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2166640 825880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2013040 825880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1859440 825880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1705840 825880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1552240 825880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1398640 825880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2781040 645880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2627440 645880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2473840 645880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2320240 645880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2166640 645880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2013040 645880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1859440 645880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1705840 645880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1552240 645880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1398640 645880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2781040 465880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2627440 465880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2473840 465880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2320240 465880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2166640 465880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2013040 465880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1859440 465880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1705840 465880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1552240 465880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1398640 465880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2781040 285880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2627440 285880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2473840 285880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2320240 285880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2166640 285880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 2013040 285880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1859440 285880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1705840 285880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1552240 285880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 1398640 285880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 452240 2625880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 298640 2625880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 452240 2445880 ) via4_1600x3100
+ NEW met4 0 + SHAPE STRIPE ( 298640 2445880 ) via4_1600x3100
NEW met4 0 + SHAPE STRIPE ( 2932900 3527600 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2800520 3527600 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2620520 3527600 ) via4_3100x3100
@@ -6817,8 +6687,6 @@
NEW met4 0 + SHAPE STRIPE ( 1000520 2625880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 820520 2625880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 640520 2625880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 460520 2625880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 280520 2625880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 100520 2625880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -13280 2625880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2932900 2445880 ) via4_3100x3100
@@ -6828,8 +6696,6 @@
NEW met4 0 + SHAPE STRIPE ( 1000520 2445880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 820520 2445880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 640520 2445880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 460520 2445880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 280520 2445880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 100520 2445880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -13280 2445880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2932900 2265880 ) via4_3100x3100
@@ -6850,6 +6716,8 @@
NEW met4 0 + SHAPE STRIPE ( 1000520 2085880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 820520 2085880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 640520 2085880 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 460520 2085880 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 280520 2085880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 100520 2085880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -13280 2085880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2932900 1905880 ) via4_3100x3100
@@ -6859,6 +6727,8 @@
NEW met4 0 + SHAPE STRIPE ( 1000520 1905880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 820520 1905880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 640520 1905880 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 460520 1905880 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 280520 1905880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 100520 1905880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -13280 1905880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2932900 1725880 ) via4_3100x3100
@@ -6880,15 +6750,6 @@
NEW met4 0 + SHAPE STRIPE ( 100520 1725880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -13280 1725880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2932900 1545880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2800520 1545880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2620520 1545880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2440520 1545880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2260520 1545880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2080520 1545880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1900520 1545880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1720520 1545880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1540520 1545880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1360520 1545880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1180520 1545880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1000520 1545880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 820520 1545880 ) via4_3100x3100
@@ -6898,15 +6759,6 @@
NEW met4 0 + SHAPE STRIPE ( 100520 1545880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -13280 1545880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2932900 1365880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2800520 1365880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2620520 1365880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2440520 1365880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2260520 1365880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2080520 1365880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1900520 1365880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1720520 1365880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1540520 1365880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1360520 1365880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1180520 1365880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1000520 1365880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 820520 1365880 ) via4_3100x3100
@@ -6916,15 +6768,6 @@
NEW met4 0 + SHAPE STRIPE ( 100520 1365880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -13280 1365880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2932900 1185880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2800520 1185880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2620520 1185880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2440520 1185880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2260520 1185880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2080520 1185880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1900520 1185880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1720520 1185880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1540520 1185880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1360520 1185880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1180520 1185880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1000520 1185880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 820520 1185880 ) via4_3100x3100
@@ -6934,15 +6777,6 @@
NEW met4 0 + SHAPE STRIPE ( 100520 1185880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -13280 1185880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2932900 1005880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2800520 1005880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2620520 1005880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2440520 1005880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2260520 1005880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2080520 1005880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1900520 1005880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1720520 1005880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1540520 1005880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1360520 1005880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1180520 1005880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1000520 1005880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 820520 1005880 ) via4_3100x3100
@@ -6952,15 +6786,6 @@
NEW met4 0 + SHAPE STRIPE ( 100520 1005880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -13280 1005880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2932900 825880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2800520 825880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2620520 825880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2440520 825880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2260520 825880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2080520 825880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1900520 825880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1720520 825880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1540520 825880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1360520 825880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1180520 825880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1000520 825880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 820520 825880 ) via4_3100x3100
@@ -6970,15 +6795,6 @@
NEW met4 0 + SHAPE STRIPE ( 100520 825880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -13280 825880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2932900 645880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2800520 645880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2620520 645880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2440520 645880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2260520 645880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2080520 645880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1900520 645880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1720520 645880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1540520 645880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1360520 645880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1180520 645880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1000520 645880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 820520 645880 ) via4_3100x3100
@@ -6988,15 +6804,6 @@
NEW met4 0 + SHAPE STRIPE ( 100520 645880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -13280 645880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2932900 465880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2800520 465880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2620520 465880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2440520 465880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2260520 465880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2080520 465880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1900520 465880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1720520 465880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1540520 465880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1360520 465880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1180520 465880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1000520 465880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 820520 465880 ) via4_3100x3100
@@ -7006,15 +6813,6 @@
NEW met4 0 + SHAPE STRIPE ( 100520 465880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -13280 465880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2932900 285880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2800520 285880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2620520 285880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2440520 285880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2260520 285880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2080520 285880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1900520 285880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1720520 285880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1540520 285880 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1360520 285880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1180520 285880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1000520 285880 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 820520 285880 ) via4_3100x3100
@@ -7081,7 +6879,7 @@
NEW met5 3100 + SHAPE STRIPE ( -14830 105880 ) ( 2934450 105880 )
NEW met5 3100 + SHAPE STRIPE ( -14830 -7920 ) ( 2934450 -7920 )
NEW met4 3100 + SHAPE STRIPE ( 2932900 -9470 ) ( 2932900 3529150 )
- NEW met4 3100 + SHAPE STRIPE ( 2800520 -9470 ) ( 2800520 3529150 )
+ NEW met4 3100 + SHAPE STRIPE ( 2800520 1710000 ) ( 2800520 3529150 )
NEW met4 3100 + SHAPE STRIPE ( 2620520 3310000 ) ( 2620520 3529150 )
NEW met4 3100 + SHAPE STRIPE ( 2440520 3310000 ) ( 2440520 3529150 )
NEW met4 3100 + SHAPE STRIPE ( 2260520 3310000 ) ( 2260520 3529150 )
@@ -7089,24 +6887,33 @@
NEW met4 3100 + SHAPE STRIPE ( 1900520 3310000 ) ( 1900520 3529150 )
NEW met4 3100 + SHAPE STRIPE ( 1720520 3310000 ) ( 1720520 3529150 )
NEW met4 3100 + SHAPE STRIPE ( 1540520 3310000 ) ( 1540520 3529150 )
- NEW met4 3100 + SHAPE STRIPE ( 1360520 -9470 ) ( 1360520 3529150 )
+ NEW met4 3100 + SHAPE STRIPE ( 1360520 1710000 ) ( 1360520 3529150 )
NEW met4 3100 + SHAPE STRIPE ( 1180520 -9470 ) ( 1180520 3529150 )
NEW met4 3100 + SHAPE STRIPE ( 1000520 -9470 ) ( 1000520 3529150 )
NEW met4 3100 + SHAPE STRIPE ( 820520 -9470 ) ( 820520 3529150 )
NEW met4 3100 + SHAPE STRIPE ( 640520 -9470 ) ( 640520 3529150 )
- NEW met4 3100 + SHAPE STRIPE ( 460520 2210000 ) ( 460520 3529150 )
- NEW met4 3100 + SHAPE STRIPE ( 280520 2210000 ) ( 280520 3529150 )
+ NEW met4 3100 + SHAPE STRIPE ( 460520 2710000 ) ( 460520 3529150 )
+ NEW met4 3100 + SHAPE STRIPE ( 280520 2710000 ) ( 280520 3529150 )
NEW met4 3100 + SHAPE STRIPE ( 100520 -9470 ) ( 100520 3529150 )
NEW met4 3100 + SHAPE STRIPE ( -13280 -9470 ) ( -13280 3529150 )
- NEW met4 3100 + SHAPE STRIPE ( 2620520 -9470 ) ( 2620520 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 2440520 -9470 ) ( 2440520 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 2260520 -9470 ) ( 2260520 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 2080520 -9470 ) ( 2080520 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 1900520 -9470 ) ( 1900520 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 1720520 -9470 ) ( 1720520 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 1540520 -9470 ) ( 1540520 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 460520 -9470 ) ( 460520 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 280520 -9470 ) ( 280520 1790000 ) ;
+ NEW met4 3100 + SHAPE STRIPE ( 460520 -9470 ) ( 460520 2290000 )
+ NEW met4 3100 + SHAPE STRIPE ( 280520 -9470 ) ( 280520 2290000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2620520 1710000 ) ( 2620520 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2440520 1710000 ) ( 2440520 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2260520 1710000 ) ( 2260520 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2080520 1710000 ) ( 2080520 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1900520 1710000 ) ( 1900520 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1720520 1710000 ) ( 1720520 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1540520 1710000 ) ( 1540520 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2800520 -9470 ) ( 2800520 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2620520 -9470 ) ( 2620520 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2440520 -9470 ) ( 2440520 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2260520 -9470 ) ( 2260520 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2080520 -9470 ) ( 2080520 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1900520 -9470 ) ( 1900520 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1720520 -9470 ) ( 1720520 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1540520 -9470 ) ( 1540520 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1360520 -9470 ) ( 1360520 190000 ) ;
- vssd2 ( PIN vssd2 ) + USE GROUND
+ ROUTED met4 0 + SHAPE STRIPE ( 2942500 3537200 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2819120 3537200 ) via4_3100x3100
@@ -7184,8 +6991,6 @@
NEW met4 0 + SHAPE STRIPE ( 1019120 2644480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 839120 2644480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 659120 2644480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 479120 2644480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 299120 2644480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 119120 2644480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -22880 2644480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2942500 2464480 ) via4_3100x3100
@@ -7195,8 +7000,6 @@
NEW met4 0 + SHAPE STRIPE ( 1019120 2464480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 839120 2464480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 659120 2464480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 479120 2464480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 299120 2464480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 119120 2464480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -22880 2464480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2942500 2284480 ) via4_3100x3100
@@ -7217,6 +7020,8 @@
NEW met4 0 + SHAPE STRIPE ( 1019120 2104480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 839120 2104480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 659120 2104480 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 479120 2104480 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 299120 2104480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 119120 2104480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -22880 2104480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2942500 1924480 ) via4_3100x3100
@@ -7226,6 +7031,8 @@
NEW met4 0 + SHAPE STRIPE ( 1019120 1924480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 839120 1924480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 659120 1924480 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 479120 1924480 ) via4_3100x3100
+ NEW met4 0 + SHAPE STRIPE ( 299120 1924480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 119120 1924480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( -22880 1924480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2942500 1744480 ) via4_3100x3100
@@ -7248,14 +7055,6 @@
NEW met4 0 + SHAPE STRIPE ( -22880 1744480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2942500 1564480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2819120 1564480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2639120 1564480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2459120 1564480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2279120 1564480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2099120 1564480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1919120 1564480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1739120 1564480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1559120 1564480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1379120 1564480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1199120 1564480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1019120 1564480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 839120 1564480 ) via4_3100x3100
@@ -7266,14 +7065,6 @@
NEW met4 0 + SHAPE STRIPE ( -22880 1564480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2942500 1384480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2819120 1384480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2639120 1384480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2459120 1384480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2279120 1384480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2099120 1384480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1919120 1384480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1739120 1384480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1559120 1384480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1379120 1384480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1199120 1384480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1019120 1384480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 839120 1384480 ) via4_3100x3100
@@ -7284,14 +7075,6 @@
NEW met4 0 + SHAPE STRIPE ( -22880 1384480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2942500 1204480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2819120 1204480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2639120 1204480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2459120 1204480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2279120 1204480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2099120 1204480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1919120 1204480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1739120 1204480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1559120 1204480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1379120 1204480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1199120 1204480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1019120 1204480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 839120 1204480 ) via4_3100x3100
@@ -7302,14 +7085,6 @@
NEW met4 0 + SHAPE STRIPE ( -22880 1204480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2942500 1024480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2819120 1024480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2639120 1024480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2459120 1024480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2279120 1024480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2099120 1024480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1919120 1024480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1739120 1024480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1559120 1024480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1379120 1024480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1199120 1024480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1019120 1024480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 839120 1024480 ) via4_3100x3100
@@ -7320,14 +7095,6 @@
NEW met4 0 + SHAPE STRIPE ( -22880 1024480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2942500 844480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2819120 844480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2639120 844480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2459120 844480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2279120 844480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2099120 844480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1919120 844480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1739120 844480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1559120 844480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1379120 844480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1199120 844480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1019120 844480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 839120 844480 ) via4_3100x3100
@@ -7338,14 +7105,6 @@
NEW met4 0 + SHAPE STRIPE ( -22880 844480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2942500 664480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2819120 664480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2639120 664480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2459120 664480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2279120 664480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2099120 664480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1919120 664480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1739120 664480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1559120 664480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1379120 664480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1199120 664480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1019120 664480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 839120 664480 ) via4_3100x3100
@@ -7356,14 +7115,6 @@
NEW met4 0 + SHAPE STRIPE ( -22880 664480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2942500 484480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2819120 484480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2639120 484480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2459120 484480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2279120 484480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2099120 484480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1919120 484480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1739120 484480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1559120 484480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1379120 484480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1199120 484480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1019120 484480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 839120 484480 ) via4_3100x3100
@@ -7374,14 +7125,6 @@
NEW met4 0 + SHAPE STRIPE ( -22880 484480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2942500 304480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 2819120 304480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2639120 304480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2459120 304480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2279120 304480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 2099120 304480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1919120 304480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1739120 304480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1559120 304480 ) via4_3100x3100
- NEW met4 0 + SHAPE STRIPE ( 1379120 304480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1199120 304480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 1019120 304480 ) via4_3100x3100
NEW met4 0 + SHAPE STRIPE ( 839120 304480 ) via4_3100x3100
@@ -7456,443 +7199,553 @@
NEW met4 3100 + SHAPE STRIPE ( 1919120 3310000 ) ( 1919120 3538750 )
NEW met4 3100 + SHAPE STRIPE ( 1739120 3310000 ) ( 1739120 3538750 )
NEW met4 3100 + SHAPE STRIPE ( 1559120 3310000 ) ( 1559120 3538750 )
- NEW met4 3100 + SHAPE STRIPE ( 1379120 -19070 ) ( 1379120 3538750 )
+ NEW met4 3100 + SHAPE STRIPE ( 1379120 1710000 ) ( 1379120 3538750 )
NEW met4 3100 + SHAPE STRIPE ( 1199120 -19070 ) ( 1199120 3538750 )
NEW met4 3100 + SHAPE STRIPE ( 1019120 -19070 ) ( 1019120 3538750 )
NEW met4 3100 + SHAPE STRIPE ( 839120 -19070 ) ( 839120 3538750 )
NEW met4 3100 + SHAPE STRIPE ( 659120 -19070 ) ( 659120 3538750 )
- NEW met4 3100 + SHAPE STRIPE ( 479120 2210000 ) ( 479120 3538750 )
- NEW met4 3100 + SHAPE STRIPE ( 299120 2210000 ) ( 299120 3538750 )
+ NEW met4 3100 + SHAPE STRIPE ( 479120 2710000 ) ( 479120 3538750 )
+ NEW met4 3100 + SHAPE STRIPE ( 299120 2710000 ) ( 299120 3538750 )
NEW met4 3100 + SHAPE STRIPE ( 119120 -19070 ) ( 119120 3538750 )
NEW met4 3100 + SHAPE STRIPE ( -22880 -19070 ) ( -22880 3538750 )
- NEW met4 3100 + SHAPE STRIPE ( 2639120 -19070 ) ( 2639120 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 2459120 -19070 ) ( 2459120 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 2279120 -19070 ) ( 2279120 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 2099120 -19070 ) ( 2099120 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 1919120 -19070 ) ( 1919120 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 1739120 -19070 ) ( 1739120 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 1559120 -19070 ) ( 1559120 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 479120 -19070 ) ( 479120 1790000 )
- NEW met4 3100 + SHAPE STRIPE ( 299120 -19070 ) ( 299120 1790000 ) ;
+ NEW met4 3100 + SHAPE STRIPE ( 479120 -19070 ) ( 479120 2290000 )
+ NEW met4 3100 + SHAPE STRIPE ( 299120 -19070 ) ( 299120 2290000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2639120 1710000 ) ( 2639120 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2459120 1710000 ) ( 2459120 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2279120 1710000 ) ( 2279120 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2099120 1710000 ) ( 2099120 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1919120 1710000 ) ( 1919120 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1739120 1710000 ) ( 1739120 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1559120 1710000 ) ( 1559120 1790000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2639120 -19070 ) ( 2639120 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2459120 -19070 ) ( 2459120 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2279120 -19070 ) ( 2279120 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 2099120 -19070 ) ( 2099120 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1919120 -19070 ) ( 1919120 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1739120 -19070 ) ( 1739120 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1559120 -19070 ) ( 1559120 190000 )
+ NEW met4 3100 + SHAPE STRIPE ( 1379120 -19070 ) ( 1379120 190000 ) ;
END SPECIALNETS
NETS 1161 ;
- addr0_to_sram\[0\] ( custom_sram a[0] ) ( chip_controller addr0_to_sram[0] ) + USE SIGNAL
- + ROUTED met3 ( 1486950 1835660 ) ( 1500060 * 0 )
- NEW met2 ( 1486950 1799790 ) ( * 1835660 )
- NEW met3 ( 198260 1805740 ) ( 200100 * 0 )
- NEW met4 ( 198260 1796220 ) ( * 1805740 )
- NEW met3 ( 198260 1796220 ) ( 202170 * )
- NEW met2 ( 202170 1796220 ) ( * 1799790 )
- NEW met1 ( 202170 1799790 ) ( 1486950 * )
- NEW met2 ( 1486950 1835660 ) M2M3_PR_M
- NEW met1 ( 1486950 1799790 ) M1M2_PR
- NEW met3 ( 198260 1805740 ) M3M4_PR_M
- NEW met3 ( 198260 1796220 ) M3M4_PR_M
- NEW met2 ( 202170 1796220 ) M2M3_PR_M
- NEW met1 ( 202170 1799790 ) M1M2_PR ;
+ + ROUTED met3 ( 1487870 1998180 ) ( 1500060 * 0 )
+ NEW met1 ( 206770 2266610 ) ( 1487870 * )
+ NEW met2 ( 1487870 1998180 ) ( * 2266610 )
+ NEW met3 ( 203780 2298060 ) ( * 2300780 0 )
+ NEW met3 ( 203780 2298060 ) ( 206770 * )
+ NEW met2 ( 206770 2266610 ) ( * 2298060 )
+ NEW met1 ( 206770 2266610 ) M1M2_PR
+ NEW met2 ( 1487870 1998180 ) M2M3_PR_M
+ NEW met1 ( 1487870 2266610 ) M1M2_PR
+ NEW met2 ( 206770 2298060 ) M2M3_PR_M ;
- addr0_to_sram\[10\] ( custom_sram a[10] ) ( chip_controller addr0_to_sram[10] ) + USE SIGNAL
- + ROUTED met3 ( 2699740 2437460 0 ) ( 2713770 * )
- NEW met3 ( 599380 1875780 0 ) ( 607430 * )
- NEW met2 ( 607430 1870170 ) ( * 1875780 )
- NEW met2 ( 790510 1809990 ) ( * 1870170 )
- NEW met2 ( 2713770 1809990 ) ( * 2437460 )
- NEW met1 ( 607430 1870170 ) ( 790510 * )
- NEW met1 ( 790510 1809990 ) ( 2713770 * )
- NEW met2 ( 2713770 2437460 ) M2M3_PR_M
- NEW met2 ( 607430 1875780 ) M2M3_PR_M
- NEW met1 ( 607430 1870170 ) M1M2_PR
- NEW met1 ( 790510 1809990 ) M1M2_PR
- NEW met1 ( 790510 1870170 ) M1M2_PR
- NEW met1 ( 2713770 1809990 ) M1M2_PR ;
- - addr0_to_sram\[11\] ( custom_sram a[11] ) ( chip_controller addr0_to_sram[11] ) + USE SIGNAL
- + ROUTED met2 ( 707710 1788230 ) ( * 2477410 )
- NEW met2 ( 267950 1788230 ) ( * 1800300 0 )
- NEW met1 ( 267950 1788230 ) ( 707710 * )
- NEW met2 ( 1490170 2477410 ) ( * 2478260 )
- NEW met3 ( 1490170 2478260 ) ( 1500060 * 0 )
- NEW met1 ( 707710 2477410 ) ( 1490170 * )
- NEW met1 ( 707710 1788230 ) M1M2_PR
- NEW met1 ( 707710 2477410 ) M1M2_PR
- NEW met1 ( 267950 1788230 ) M1M2_PR
- NEW met1 ( 1490170 2477410 ) M1M2_PR
- NEW met2 ( 1490170 2478260 ) M2M3_PR_M ;
- - addr0_to_sram\[12\] ( custom_sram a[12] ) ( chip_controller addr0_to_sram[12] ) + USE SIGNAL
- + ROUTED met3 ( 198030 1884620 ) ( 200100 * 0 )
- NEW met2 ( 196190 2014800 ) ( 198030 * )
- NEW met2 ( 198030 1884620 ) ( * 2014800 )
- NEW met2 ( 196190 2014800 ) ( * 2615110 )
- NEW met2 ( 1490170 2615110 ) ( * 2621060 )
- NEW met3 ( 1490170 2621060 ) ( 1500060 * 0 )
- NEW met1 ( 196190 2615110 ) ( 1490170 * )
- NEW met1 ( 196190 2615110 ) M1M2_PR
- NEW met2 ( 198030 1884620 ) M2M3_PR_M
- NEW met1 ( 1490170 2615110 ) M1M2_PR
- NEW met2 ( 1490170 2621060 ) M2M3_PR_M ;
- - addr0_to_sram\[13\] ( custom_sram a[13] ) ( chip_controller addr0_to_sram[13] ) + USE SIGNAL
- + ROUTED met2 ( 279910 1791970 ) ( * 1800300 0 )
- NEW met2 ( 2077130 1791970 ) ( * 1800300 0 )
- NEW met1 ( 279910 1791970 ) ( 2077130 * )
- NEW met1 ( 279910 1791970 ) M1M2_PR
- NEW met1 ( 2077130 1791970 ) M1M2_PR ;
- - addr0_to_sram\[14\] ( custom_sram a[14] ) ( chip_controller addr0_to_sram[14] ) + USE SIGNAL
- + ROUTED met1 ( 302910 2211190 ) ( 317630 * )
- NEW met1 ( 317630 2211190 ) ( * 2211530 )
- NEW met1 ( 1446930 1938850 ) ( 1466250 * )
- NEW met2 ( 302910 2199460 0 ) ( * 2211190 )
- NEW met1 ( 585350 2207450 ) ( 600070 * )
- NEW met2 ( 600070 2198610 ) ( * 2207450 )
- NEW met1 ( 600070 2198610 ) ( 611570 * )
- NEW li1 ( 611570 2198610 ) ( * 2199630 )
- NEW met2 ( 585350 2207450 ) ( * 2211530 )
- NEW met1 ( 1249130 2100350 ) ( 1269830 * )
- NEW met2 ( 1269830 2069750 ) ( * 2100350 )
- NEW met1 ( 1269830 2069750 ) ( 1286850 * )
- NEW met2 ( 1249130 2100350 ) ( * 2114630 )
- NEW met2 ( 1286850 2024870 ) ( * 2069750 )
- NEW met2 ( 1466250 1823590 ) ( * 1938850 )
- NEW met2 ( 1446930 1938850 ) ( * 1993930 )
- NEW met2 ( 2695830 1808630 ) ( * 1809140 )
- NEW met2 ( 2695370 1809140 ) ( 2695830 * )
- NEW met2 ( 2695370 1809140 ) ( * 2546100 )
- NEW met2 ( 2695370 2546100 ) ( 2696750 * )
- NEW met2 ( 2696750 2546100 ) ( * 2586380 )
- NEW met3 ( 2696750 2586380 ) ( 2696980 * )
- NEW met3 ( 2696980 2586380 ) ( * 2587740 0 )
- NEW met1 ( 317630 2211530 ) ( 585350 * )
- NEW met1 ( 1218310 2141490 ) ( 1228430 * )
- NEW met2 ( 1228430 2114630 ) ( * 2141490 )
- NEW met1 ( 1228430 2114630 ) ( 1249130 * )
- NEW met1 ( 1286850 2024870 ) ( 1406910 * )
- NEW met1 ( 1466250 1823590 ) ( 1490630 * )
- NEW met2 ( 1199450 2179570 ) ( * 2199630 )
- NEW met1 ( 1199450 2179570 ) ( 1218310 * )
- NEW met1 ( 611570 2199630 ) ( 1199450 * )
- NEW met2 ( 1218310 2141490 ) ( * 2179570 )
- NEW met2 ( 1406910 1993930 ) ( * 2024870 )
- NEW met1 ( 1406910 1993930 ) ( 1446930 * )
- NEW met2 ( 1490630 1808630 ) ( * 1823590 )
- NEW met1 ( 1490630 1808630 ) ( 2695830 * )
- NEW met1 ( 302910 2211190 ) M1M2_PR
- NEW met1 ( 585350 2211530 ) M1M2_PR
- NEW met1 ( 1286850 2024870 ) M1M2_PR
- NEW met1 ( 1249130 2114630 ) M1M2_PR
- NEW met1 ( 1466250 1823590 ) M1M2_PR
- NEW met1 ( 1446930 1938850 ) M1M2_PR
- NEW met1 ( 1466250 1938850 ) M1M2_PR
- NEW met1 ( 585350 2207450 ) M1M2_PR
- NEW met1 ( 600070 2207450 ) M1M2_PR
- NEW met1 ( 600070 2198610 ) M1M2_PR
- NEW li1 ( 611570 2198610 ) L1M1_PR_MR
- NEW li1 ( 611570 2199630 ) L1M1_PR_MR
- NEW met1 ( 1249130 2100350 ) M1M2_PR
- NEW met1 ( 1269830 2100350 ) M1M2_PR
- NEW met1 ( 1269830 2069750 ) M1M2_PR
- NEW met1 ( 1286850 2069750 ) M1M2_PR
- NEW met1 ( 1446930 1993930 ) M1M2_PR
- NEW met1 ( 2695830 1808630 ) M1M2_PR
- NEW met2 ( 2696750 2586380 ) M2M3_PR_M
- NEW met1 ( 1218310 2141490 ) M1M2_PR
- NEW met1 ( 1228430 2141490 ) M1M2_PR
- NEW met1 ( 1228430 2114630 ) M1M2_PR
- NEW met1 ( 1406910 2024870 ) M1M2_PR
- NEW met1 ( 1490630 1823590 ) M1M2_PR
- NEW met1 ( 1199450 2199630 ) M1M2_PR
- NEW met1 ( 1199450 2179570 ) M1M2_PR
- NEW met1 ( 1218310 2179570 ) M1M2_PR
- NEW met1 ( 1406910 1993930 ) M1M2_PR
- NEW met1 ( 1490630 1808630 ) M1M2_PR ;
- - addr0_to_sram\[15\] ( custom_sram a[15] ) ( chip_controller addr0_to_sram[15] ) + USE SIGNAL
- + ROUTED met2 ( 301990 1788570 ) ( * 1800300 0 )
- NEW met2 ( 2215590 1792310 ) ( * 1800300 0 )
- NEW li1 ( 348450 1788570 ) ( * 1792310 )
- NEW met1 ( 301990 1788570 ) ( 348450 * )
- NEW met1 ( 348450 1792310 ) ( 2215590 * )
- NEW met1 ( 301990 1788570 ) M1M2_PR
- NEW met1 ( 2215590 1792310 ) M1M2_PR
- NEW li1 ( 348450 1788570 ) L1M1_PR_MR
- NEW li1 ( 348450 1792310 ) L1M1_PR_MR ;
- - addr0_to_sram\[16\] ( custom_sram a[16] ) ( chip_controller addr0_to_sram[16] ) + USE SIGNAL
- + ROUTED met3 ( 599380 1907740 0 ) ( 607430 * )
- NEW met2 ( 607430 1904850 ) ( * 1907740 )
- NEW met2 ( 1183350 1789930 ) ( * 1904850 )
- NEW met2 ( 2307590 1789930 ) ( * 1800300 0 )
- NEW met1 ( 607430 1904850 ) ( 1183350 * )
- NEW met1 ( 1183350 1789930 ) ( 2307590 * )
- NEW met2 ( 607430 1907740 ) M2M3_PR_M
- NEW met1 ( 607430 1904850 ) M1M2_PR
- NEW met1 ( 1183350 1789930 ) M1M2_PR
- NEW met1 ( 1183350 1904850 ) M1M2_PR
- NEW met1 ( 2307590 1789930 ) M1M2_PR ;
- - addr0_to_sram\[17\] ( custom_sram a[17] ) ( chip_controller addr0_to_sram[17] ) + USE SIGNAL
- + ROUTED met2 ( 316250 2199460 0 ) ( 316710 * )
- NEW met2 ( 316710 2199460 ) ( * 2829310 )
- NEW met2 ( 1490170 2829310 ) ( * 2835260 )
- NEW met3 ( 1490170 2835260 ) ( 1500060 * 0 )
- NEW met1 ( 316710 2829310 ) ( 1490170 * )
- NEW met1 ( 316710 2829310 ) M1M2_PR
- NEW met1 ( 1490170 2829310 ) M1M2_PR
- NEW met2 ( 1490170 2835260 ) M2M3_PR_M ;
- - addr0_to_sram\[18\] ( custom_sram a[18] ) ( chip_controller addr0_to_sram[18] ) + USE SIGNAL
- + ROUTED met1 ( 1356770 2021470 ) ( 1372870 * )
- NEW met2 ( 1451530 1842630 ) ( * 1859290 )
- NEW met1 ( 1451530 1842630 ) ( 1481430 * )
- NEW met3 ( 2696980 2636020 ) ( 2711930 * )
- NEW met2 ( 1246370 2128570 ) ( * 2193170 )
- NEW met2 ( 1372870 2000730 ) ( * 2021470 )
- NEW met2 ( 1356770 2021470 ) ( * 2128570 )
- NEW met2 ( 1481430 1809820 ) ( * 1842630 )
- NEW met4 ( 2694220 1809820 ) ( * 2546100 )
- NEW met4 ( 2694220 2546100 ) ( 2696980 * )
- NEW met4 ( 2696980 2546100 ) ( * 2636020 )
- NEW met3 ( 2699740 2662540 0 ) ( 2711930 * )
- NEW met2 ( 2711930 2636020 ) ( * 2662540 )
- NEW met3 ( 327290 2208980 ) ( 551310 * )
- NEW met1 ( 1246370 2128570 ) ( 1356770 * )
- NEW met1 ( 1432210 1859290 ) ( 1451530 * )
- NEW met1 ( 1392190 1931710 ) ( 1415190 * )
- NEW met2 ( 327290 2199460 0 ) ( * 2208980 )
- NEW li1 ( 551310 2193170 ) ( * 2206430 )
- NEW met2 ( 551310 2206430 ) ( * 2208980 )
- NEW met1 ( 551310 2193170 ) ( 1246370 * )
- NEW met1 ( 1415190 1890570 ) ( 1432210 * )
- NEW met2 ( 1415190 1890570 ) ( * 1931710 )
- NEW met2 ( 1432210 1859290 ) ( * 1890570 )
- NEW met1 ( 1372870 2000730 ) ( 1392190 * )
- NEW met2 ( 1392190 1931710 ) ( * 2000730 )
- NEW met3 ( 1481430 1809820 ) ( 2694220 * )
- NEW met1 ( 1246370 2128570 ) M1M2_PR
- NEW met1 ( 1356770 2021470 ) M1M2_PR
- NEW met1 ( 1372870 2021470 ) M1M2_PR
- NEW met1 ( 1356770 2128570 ) M1M2_PR
- NEW met1 ( 1451530 1859290 ) M1M2_PR
- NEW met1 ( 1451530 1842630 ) M1M2_PR
- NEW met1 ( 1481430 1842630 ) M1M2_PR
- NEW met3 ( 2696980 2636020 ) M3M4_PR_M
- NEW met2 ( 2711930 2636020 ) M2M3_PR_M
- NEW met1 ( 1246370 2193170 ) M1M2_PR
- NEW met1 ( 1372870 2000730 ) M1M2_PR
- NEW met2 ( 1481430 1809820 ) M2M3_PR_M
- NEW met3 ( 2694220 1809820 ) M3M4_PR_M
- NEW met2 ( 2711930 2662540 ) M2M3_PR_M
- NEW met2 ( 327290 2208980 ) M2M3_PR_M
- NEW met2 ( 551310 2208980 ) M2M3_PR_M
- NEW met1 ( 1432210 1859290 ) M1M2_PR
- NEW met1 ( 1392190 1931710 ) M1M2_PR
- NEW met1 ( 1415190 1931710 ) M1M2_PR
- NEW li1 ( 551310 2206430 ) L1M1_PR_MR
- NEW met1 ( 551310 2206430 ) M1M2_PR
- NEW li1 ( 551310 2193170 ) L1M1_PR_MR
- NEW met1 ( 1415190 1890570 ) M1M2_PR
- NEW met1 ( 1432210 1890570 ) M1M2_PR
- NEW met1 ( 1392190 2000730 ) M1M2_PR
- NEW met1 ( 551310 2206430 ) RECT ( -355 -70 0 70 ) ;
- - addr0_to_sram\[19\] ( custom_sram a[19] ) ( chip_controller addr0_to_sram[19] ) + USE SIGNAL
- + ROUTED met3 ( 599380 1933580 0 ) ( 607890 * )
- NEW met2 ( 607890 1933580 ) ( * 1938850 )
- NEW met1 ( 607890 1938850 ) ( 852610 * )
- NEW met2 ( 2270330 3298340 ) ( * 3298510 )
- NEW met2 ( 2270330 3298340 ) ( 2271710 * 0 )
- NEW met1 ( 852610 3298510 ) ( 2270330 * )
- NEW met2 ( 852610 1938850 ) ( * 3298510 )
- NEW met2 ( 607890 1933580 ) M2M3_PR_M
- NEW met1 ( 607890 1938850 ) M1M2_PR
- NEW met1 ( 852610 1938850 ) M1M2_PR
- NEW met1 ( 852610 3298510 ) M1M2_PR
- NEW met1 ( 2270330 3298510 ) M1M2_PR ;
- - addr0_to_sram\[1\] ( custom_sram a[1] ) ( chip_controller addr0_to_sram[1] ) + USE SIGNAL
- + ROUTED met2 ( 210910 1792820 ) ( * 1800300 0 )
- NEW li1 ( 1584470 3292050 ) ( * 3296470 )
- NEW met2 ( 1584470 3296300 ) ( * 3296470 )
- NEW met2 ( 1584470 3296300 ) ( 1585850 * 0 )
- NEW met1 ( 831910 3292050 ) ( 1584470 * )
- NEW met3 ( 210910 1792820 ) ( 831910 * )
- NEW met2 ( 831910 1792820 ) ( * 3292050 )
- NEW met2 ( 210910 1792820 ) M2M3_PR_M
- NEW met1 ( 831910 3292050 ) M1M2_PR
- NEW li1 ( 1584470 3292050 ) L1M1_PR_MR
- NEW li1 ( 1584470 3296470 ) L1M1_PR_MR
- NEW met1 ( 1584470 3296470 ) M1M2_PR
- NEW met2 ( 831910 1792820 ) M2M3_PR_M
- NEW met1 ( 1584470 3296470 ) RECT ( -355 -70 0 70 ) ;
- - addr0_to_sram\[2\] ( custom_sram a[2] ) ( chip_controller addr0_to_sram[2] ) + USE SIGNAL
- + ROUTED met2 ( 219190 1788910 ) ( * 1800300 0 )
- NEW met2 ( 687470 1788910 ) ( * 1973530 )
- NEW met1 ( 219190 1788910 ) ( 687470 * )
- NEW met2 ( 1486030 1973530 ) ( * 1978460 )
- NEW met3 ( 1486030 1978460 ) ( 1500060 * 0 )
- NEW met1 ( 687470 1973530 ) ( 1486030 * )
- NEW met1 ( 219190 1788910 ) M1M2_PR
- NEW met1 ( 687470 1788910 ) M1M2_PR
- NEW met1 ( 687470 1973530 ) M1M2_PR
- NEW met1 ( 1486030 1973530 ) M1M2_PR
- NEW met2 ( 1486030 1978460 ) M2M3_PR_M ;
- - addr0_to_sram\[3\] ( custom_sram a[3] ) ( chip_controller addr0_to_sram[3] ) + USE SIGNAL
- + ROUTED met2 ( 1641970 3296300 ) ( * 3296470 )
- NEW met2 ( 1641970 3296300 ) ( 1642890 * 0 )
- NEW met2 ( 227470 1793500 ) ( * 1800300 0 )
- NEW met2 ( 983710 1793500 ) ( * 3292390 )
- NEW met1 ( 1628400 3296470 ) ( 1641970 * )
- NEW met1 ( 1628400 3292390 ) ( * 3296470 )
- NEW met1 ( 983710 3292390 ) ( 1628400 * )
- NEW met3 ( 227470 1793500 ) ( 983710 * )
- NEW met1 ( 983710 3292390 ) M1M2_PR
- NEW met1 ( 1641970 3296470 ) M1M2_PR
- NEW met2 ( 227470 1793500 ) M2M3_PR_M
- NEW met2 ( 983710 1793500 ) M2M3_PR_M ;
- - addr0_to_sram\[4\] ( custom_sram a[4] ) ( chip_controller addr0_to_sram[4] ) + USE SIGNAL
- + ROUTED met2 ( 225170 2199460 0 ) ( * 2221050 )
- NEW met1 ( 225170 2221050 ) ( 645610 * )
- NEW met2 ( 1486030 2121260 ) ( * 2125170 )
- NEW met3 ( 1486030 2121260 ) ( 1500060 * 0 )
- NEW met1 ( 645610 2125170 ) ( 1486030 * )
- NEW met2 ( 645610 2125170 ) ( * 2221050 )
- NEW met1 ( 225170 2221050 ) M1M2_PR
- NEW met1 ( 645610 2125170 ) M1M2_PR
- NEW met1 ( 645610 2221050 ) M1M2_PR
- NEW met1 ( 1486030 2125170 ) M1M2_PR
- NEW met2 ( 1486030 2121260 ) M2M3_PR_M ;
- - addr0_to_sram\[5\] ( custom_sram a[5] ) ( chip_controller addr0_to_sram[5] ) + USE SIGNAL
- + ROUTED met3 ( 2699740 1987300 0 ) ( 2714230 * )
- NEW met2 ( 2714230 1800130 ) ( * 1987300 )
- NEW met1 ( 198030 1800130 ) ( 2714230 * )
- NEW met1 ( 198030 1801490 ) ( * 1801830 )
- NEW met1 ( 198030 1801830 ) ( 199870 * )
- NEW met2 ( 199870 1801830 ) ( * 1841780 )
- NEW met2 ( 199410 1841780 ) ( 199870 * )
- NEW met3 ( 199410 1841780 ) ( 200100 * 0 )
- NEW met2 ( 198030 1800130 ) ( * 1801490 )
- NEW met1 ( 198030 1800130 ) M1M2_PR
- NEW met1 ( 2714230 1800130 ) M1M2_PR
- NEW met2 ( 2714230 1987300 ) M2M3_PR_M
- NEW met1 ( 198030 1801490 ) M1M2_PR
- NEW met1 ( 199870 1801830 ) M1M2_PR
- NEW met2 ( 199410 1841780 ) M2M3_PR_M ;
- - addr0_to_sram\[6\] ( custom_sram a[6] ) ( chip_controller addr0_to_sram[6] ) + USE SIGNAL
- + ROUTED met3 ( 599380 1856740 0 ) ( 607890 * )
- NEW met2 ( 607890 1856740 ) ( * 1862350 )
- NEW met1 ( 607890 1862350 ) ( 632270 * )
- NEW met2 ( 1490170 2187390 ) ( * 2192660 )
- NEW met3 ( 1490170 2192660 ) ( 1500060 * 0 )
- NEW met1 ( 632270 2187390 ) ( 1490170 * )
- NEW met2 ( 632270 1862350 ) ( * 2187390 )
- NEW met2 ( 607890 1856740 ) M2M3_PR_M
- NEW met1 ( 607890 1862350 ) M1M2_PR
- NEW met1 ( 632270 1862350 ) M1M2_PR
- NEW met1 ( 632270 2187390 ) M1M2_PR
- NEW met1 ( 1490170 2187390 ) M1M2_PR
- NEW met2 ( 1490170 2192660 ) M2M3_PR_M ;
- - addr0_to_sram\[7\] ( custom_sram a[7] ) ( chip_controller addr0_to_sram[7] ) + USE SIGNAL
- + ROUTED met3 ( 2699740 2134860 ) ( * 2137580 0 )
- NEW met3 ( 2699740 2134860 ) ( 2701350 * )
- NEW met2 ( 496110 2205070 ) ( * 2209150 )
- NEW met2 ( 1180130 2187050 ) ( * 2205070 )
- NEW met2 ( 1452450 1842290 ) ( * 1893970 )
- NEW met1 ( 2697210 2074170 ) ( 2701350 * )
- NEW met2 ( 2697210 1808970 ) ( * 2074170 )
- NEW met2 ( 2701350 2074170 ) ( * 2134860 )
- NEW met1 ( 242650 2209150 ) ( 496110 * )
- NEW met1 ( 1217850 2021470 ) ( 1237170 * )
- NEW met1 ( 1452450 1842290 ) ( 1487870 * )
- NEW met2 ( 242650 2199460 0 ) ( * 2209150 )
- NEW met1 ( 496110 2205070 ) ( 1180130 * )
- NEW met2 ( 1237170 1990530 ) ( * 2021470 )
- NEW met2 ( 1197150 2173110 ) ( * 2187050 )
- NEW met1 ( 1197150 2173110 ) ( 1217850 * )
- NEW met1 ( 1180130 2187050 ) ( 1197150 * )
- NEW met2 ( 1217850 2021470 ) ( * 2173110 )
- NEW met2 ( 1331930 1976590 ) ( * 1990530 )
- NEW met1 ( 1237170 1990530 ) ( 1331930 * )
- NEW met1 ( 1397250 1907910 ) ( 1408750 * )
- NEW met2 ( 1408750 1893970 ) ( * 1907910 )
- NEW met1 ( 1408750 1893970 ) ( 1452450 * )
- NEW met1 ( 1331930 1976590 ) ( 1397250 * )
- NEW met2 ( 1397250 1907910 ) ( * 1976590 )
- NEW met2 ( 1487870 1808970 ) ( * 1842290 )
- NEW met1 ( 1487870 1808970 ) ( 2697210 * )
- NEW met1 ( 496110 2209150 ) M1M2_PR
- NEW met1 ( 1452450 1842290 ) M1M2_PR
- NEW met2 ( 2701350 2134860 ) M2M3_PR_M
- NEW met1 ( 496110 2205070 ) M1M2_PR
- NEW met1 ( 1180130 2205070 ) M1M2_PR
- NEW met1 ( 1180130 2187050 ) M1M2_PR
- NEW met1 ( 1452450 1893970 ) M1M2_PR
- NEW met1 ( 2697210 1808970 ) M1M2_PR
- NEW met1 ( 2697210 2074170 ) M1M2_PR
- NEW met1 ( 2701350 2074170 ) M1M2_PR
- NEW met1 ( 242650 2209150 ) M1M2_PR
- NEW met1 ( 1217850 2021470 ) M1M2_PR
- NEW met1 ( 1237170 2021470 ) M1M2_PR
- NEW met1 ( 1487870 1842290 ) M1M2_PR
- NEW met1 ( 1237170 1990530 ) M1M2_PR
- NEW met1 ( 1197150 2187050 ) M1M2_PR
- NEW met1 ( 1197150 2173110 ) M1M2_PR
- NEW met1 ( 1217850 2173110 ) M1M2_PR
- NEW met1 ( 1331930 1990530 ) M1M2_PR
- NEW met1 ( 1331930 1976590 ) M1M2_PR
- NEW met1 ( 1397250 1907910 ) M1M2_PR
- NEW met1 ( 1408750 1907910 ) M1M2_PR
- NEW met1 ( 1408750 1893970 ) M1M2_PR
- NEW met1 ( 1397250 1976590 ) M1M2_PR
- NEW met1 ( 1487870 1808970 ) M1M2_PR ;
- - addr0_to_sram\[8\] ( custom_sram a[8] ) ( chip_controller addr0_to_sram[8] ) + USE SIGNAL
- + ROUTED met2 ( 1487410 2332230 ) ( * 2335460 )
- NEW met3 ( 1487410 2335460 ) ( 1500060 * 0 )
- NEW met1 ( 255070 2332230 ) ( 1487410 * )
- NEW met2 ( 254150 2199460 0 ) ( 255070 * )
- NEW met2 ( 255070 2199460 ) ( * 2332230 )
- NEW met1 ( 255070 2332230 ) M1M2_PR
- NEW met1 ( 1487410 2332230 ) M1M2_PR
- NEW met2 ( 1487410 2335460 ) M2M3_PR_M ;
- - addr0_to_sram\[9\] ( custom_sram a[9] ) ( chip_controller addr0_to_sram[9] ) + USE SIGNAL
- + ROUTED met3 ( 584660 2200140 ) ( 584890 * )
- NEW met2 ( 584890 2199630 ) ( * 2200140 )
- NEW li1 ( 584890 2193510 ) ( * 2199630 )
- NEW met4 ( 584660 2200140 ) ( * 2213740 )
- NEW met2 ( 1349870 1956190 ) ( * 1993930 )
- NEW met2 ( 1467170 1807270 ) ( * 1887170 )
- NEW met2 ( 2696750 1807270 ) ( * 1810500 )
- NEW met2 ( 2696290 1810500 ) ( 2696750 * )
- NEW met2 ( 2696290 1810500 ) ( * 2256300 )
- NEW met2 ( 2696290 2256300 ) ( 2696750 * )
+ + ROUTED met1 ( 1442330 1863710 ) ( 1449230 * )
+ NEW met2 ( 1449230 1850790 ) ( * 1863710 )
+ NEW met1 ( 1449230 1850790 ) ( 1463030 * )
+ NEW met2 ( 1463030 1841610 ) ( * 1850790 )
+ NEW met1 ( 1463030 1841610 ) ( 1477290 * )
+ NEW met2 ( 1477290 1830390 ) ( * 1841610 )
+ NEW met3 ( 599380 2363340 0 ) ( 606510 * )
+ NEW met2 ( 606510 2360110 ) ( * 2363340 )
+ NEW met2 ( 1173690 2356370 ) ( * 2360110 )
+ NEW met1 ( 1253730 2198270 ) ( 1269370 * )
+ NEW met2 ( 1269370 2187390 ) ( * 2198270 )
+ NEW met1 ( 1269370 2187390 ) ( 1269830 * )
+ NEW met1 ( 1269830 2187050 ) ( * 2187390 )
+ NEW met2 ( 1253730 2198270 ) ( * 2356370 )
+ NEW met1 ( 1349870 1973530 ) ( 1359530 * )
+ NEW met1 ( 1359530 1973190 ) ( * 1973530 )
+ NEW met1 ( 1359530 1973190 ) ( 1386670 * )
+ NEW met2 ( 1386670 1952620 ) ( * 1973190 )
+ NEW met2 ( 1349870 1973530 ) ( * 2111570 )
+ NEW met2 ( 1442330 1863710 ) ( * 1875270 )
+ NEW met2 ( 2696290 2352900 ) ( 2696750 * )
+ NEW met2 ( 2696750 2352900 ) ( * 2361300 )
NEW met3 ( 2696750 2361300 ) ( 2696980 * )
NEW met3 ( 2696980 2361300 ) ( * 2362660 0 )
- NEW met2 ( 2696750 2256300 ) ( * 2361300 )
- NEW met3 ( 267490 2213740 ) ( 584660 * )
- NEW met2 ( 1391270 1936810 ) ( * 1956190 )
- NEW met1 ( 1391270 1936810 ) ( 1411970 * )
- NEW met1 ( 1349870 1956190 ) ( 1391270 * )
- NEW met2 ( 267490 2199460 0 ) ( * 2213740 )
- NEW met1 ( 1322270 1993930 ) ( 1349870 * )
- NEW met1 ( 1300650 2096270 ) ( 1322270 * )
- NEW met2 ( 1322270 1993930 ) ( * 2096270 )
- NEW met1 ( 584890 2193510 ) ( 1300650 * )
- NEW met2 ( 1300650 2096270 ) ( * 2193510 )
- NEW met2 ( 1411970 1887170 ) ( * 1936810 )
- NEW met1 ( 1411970 1887170 ) ( 1467170 * )
- NEW met1 ( 1467170 1807270 ) ( 2696750 * )
- NEW met3 ( 584660 2213740 ) M3M4_PR_M
- NEW met1 ( 1349870 1956190 ) M1M2_PR
- NEW met3 ( 584660 2200140 ) M3M4_PR_M
- NEW met2 ( 584890 2200140 ) M2M3_PR_M
- NEW li1 ( 584890 2199630 ) L1M1_PR_MR
- NEW met1 ( 584890 2199630 ) M1M2_PR
- NEW li1 ( 584890 2193510 ) L1M1_PR_MR
- NEW met1 ( 1349870 1993930 ) M1M2_PR
- NEW met1 ( 1467170 1807270 ) M1M2_PR
- NEW met1 ( 1467170 1887170 ) M1M2_PR
- NEW met1 ( 2696750 1807270 ) M1M2_PR
+ NEW met1 ( 1311230 2159510 ) ( 1331930 * )
+ NEW met2 ( 1331930 2111570 ) ( * 2159510 )
+ NEW met1 ( 1331930 2111570 ) ( 1349870 * )
+ NEW met2 ( 1387130 1943270 ) ( * 1952620 )
+ NEW met1 ( 1387130 1943270 ) ( 1422090 * )
+ NEW met2 ( 1422090 1924910 ) ( * 1943270 )
+ NEW met1 ( 1422090 1924910 ) ( 1433130 * )
+ NEW met2 ( 1386670 1952620 ) ( 1387130 * )
+ NEW met1 ( 1477290 1830390 ) ( 1484190 * )
+ NEW met1 ( 606510 2360110 ) ( 1173690 * )
+ NEW met1 ( 1173690 2356370 ) ( 1253730 * )
+ NEW met2 ( 1296970 2175490 ) ( * 2187050 )
+ NEW met1 ( 1296970 2175490 ) ( 1304330 * )
+ NEW met2 ( 1304330 2159850 ) ( * 2175490 )
+ NEW met1 ( 1304330 2159850 ) ( 1311230 * )
+ NEW met1 ( 1269830 2187050 ) ( 1296970 * )
+ NEW met1 ( 1311230 2159510 ) ( * 2159850 )
+ NEW met2 ( 1433130 1875270 ) ( * 1924910 )
+ NEW met1 ( 1433130 1875270 ) ( 1442330 * )
+ NEW met2 ( 1484190 1808970 ) ( * 1830390 )
+ NEW met1 ( 1484190 1808970 ) ( 2694450 * )
+ NEW met2 ( 2696290 2318400 ) ( * 2352900 )
+ NEW met2 ( 2696290 2318400 ) ( 2697210 * )
+ NEW met2 ( 2697210 2263200 ) ( * 2318400 )
+ NEW met2 ( 2695830 2263200 ) ( 2697210 * )
+ NEW met2 ( 2695830 2256300 ) ( * 2263200 )
+ NEW met2 ( 2694450 2229380 ) ( 2694910 * )
+ NEW met2 ( 2694910 2229380 ) ( * 2231420 )
+ NEW met2 ( 2694910 2231420 ) ( 2695370 * )
+ NEW met2 ( 2695370 2231420 ) ( * 2256300 )
+ NEW met2 ( 2695370 2256300 ) ( 2695830 * )
+ NEW met2 ( 2694450 2208000 ) ( * 2229380 )
+ NEW met2 ( 2694450 2208000 ) ( 2694910 * )
+ NEW met2 ( 2694910 2201100 ) ( * 2208000 )
+ NEW met2 ( 2693530 2201100 ) ( 2694910 * )
+ NEW met2 ( 2693530 2180400 ) ( * 2201100 )
+ NEW met2 ( 2693530 2180400 ) ( 2694910 * )
+ NEW met2 ( 2694910 2118300 ) ( * 2180400 )
+ NEW met2 ( 2694450 2118300 ) ( 2694910 * )
+ NEW met2 ( 2694450 2104500 ) ( * 2118300 )
+ NEW met2 ( 2693070 2098140 ) ( 2694910 * )
+ NEW met2 ( 2694910 2098140 ) ( * 2104500 )
+ NEW met2 ( 2694450 2104500 ) ( 2694910 * )
+ NEW met2 ( 2693070 2097460 ) ( 2694910 * )
+ NEW met2 ( 2693070 2097460 ) ( * 2098140 )
+ NEW met2 ( 2694910 2090700 ) ( * 2097460 )
+ NEW met2 ( 2694450 2090700 ) ( 2694910 * )
+ NEW met2 ( 2694450 2083800 ) ( * 2090700 )
+ NEW met2 ( 2694450 2083800 ) ( 2694910 * )
+ NEW met2 ( 2694910 2028600 ) ( * 2083800 )
+ NEW met2 ( 2693530 2021300 ) ( 2694450 * )
+ NEW met2 ( 2694450 2021300 ) ( * 2021700 )
+ NEW met2 ( 2694450 2021700 ) ( 2694910 * )
+ NEW met2 ( 2694910 2021700 ) ( * 2023340 )
+ NEW met2 ( 2694450 2023340 ) ( 2694910 * )
+ NEW met2 ( 2694450 2023340 ) ( * 2028600 )
+ NEW met2 ( 2694450 2028600 ) ( 2694910 * )
+ NEW met2 ( 2693530 2007900 ) ( * 2021300 )
+ NEW met2 ( 2693530 2007900 ) ( 2693990 * )
+ NEW met2 ( 2693990 2006340 ) ( * 2007900 )
+ NEW met2 ( 2693990 2006340 ) ( 2694450 * )
+ NEW met2 ( 2694450 2002260 ) ( * 2006340 )
+ NEW met2 ( 2693530 2002260 ) ( 2694450 * )
+ NEW met2 ( 2693530 1994100 ) ( * 2002260 )
+ NEW met2 ( 2692610 1994100 ) ( 2693530 * )
+ NEW met2 ( 2694450 1808970 ) ( * 1938900 )
+ NEW met2 ( 2692610 1968260 ) ( 2696750 * )
+ NEW met2 ( 2696750 1964180 ) ( * 1968260 )
+ NEW met3 ( 2696750 1964180 ) ( 2698590 * )
+ NEW met2 ( 2698590 1944460 ) ( * 1964180 )
+ NEW met3 ( 2696750 1944460 ) ( 2698590 * )
+ NEW met2 ( 2695370 1944460 ) ( 2696750 * )
+ NEW met2 ( 2695370 1943780 ) ( * 1944460 )
+ NEW met2 ( 2693530 1943780 ) ( 2695370 * )
+ NEW met2 ( 2693530 1940380 ) ( * 1943780 )
+ NEW met2 ( 2693070 1940380 ) ( 2693530 * )
+ NEW met2 ( 2693070 1938900 ) ( * 1940380 )
+ NEW met2 ( 2693070 1938900 ) ( 2694450 * )
+ NEW met2 ( 2692610 1968260 ) ( * 1994100 )
+ NEW met1 ( 1349870 2111570 ) M1M2_PR
+ NEW met1 ( 1442330 1863710 ) M1M2_PR
+ NEW met1 ( 1449230 1863710 ) M1M2_PR
+ NEW met1 ( 1449230 1850790 ) M1M2_PR
+ NEW met1 ( 1463030 1850790 ) M1M2_PR
+ NEW met1 ( 1463030 1841610 ) M1M2_PR
+ NEW met1 ( 1477290 1841610 ) M1M2_PR
+ NEW met1 ( 1477290 1830390 ) M1M2_PR
+ NEW met2 ( 606510 2363340 ) M2M3_PR_M
+ NEW met1 ( 606510 2360110 ) M1M2_PR
+ NEW met1 ( 1173690 2360110 ) M1M2_PR
+ NEW met1 ( 1173690 2356370 ) M1M2_PR
+ NEW met1 ( 1253730 2198270 ) M1M2_PR
+ NEW met1 ( 1269370 2198270 ) M1M2_PR
+ NEW met1 ( 1269370 2187390 ) M1M2_PR
+ NEW met1 ( 1253730 2356370 ) M1M2_PR
+ NEW met1 ( 1349870 1973530 ) M1M2_PR
+ NEW met1 ( 1386670 1973190 ) M1M2_PR
+ NEW met1 ( 1442330 1875270 ) M1M2_PR
+ NEW met1 ( 2694450 1808970 ) M1M2_PR
NEW met2 ( 2696750 2361300 ) M2M3_PR_M
- NEW met2 ( 267490 2213740 ) M2M3_PR_M
- NEW met1 ( 1391270 1956190 ) M1M2_PR
- NEW met1 ( 1391270 1936810 ) M1M2_PR
- NEW met1 ( 1411970 1936810 ) M1M2_PR
- NEW met1 ( 1322270 1993930 ) M1M2_PR
- NEW met1 ( 1300650 2096270 ) M1M2_PR
- NEW met1 ( 1322270 2096270 ) M1M2_PR
- NEW met1 ( 1300650 2193510 ) M1M2_PR
- NEW met1 ( 1411970 1887170 ) M1M2_PR
- NEW met3 ( 584660 2200140 ) RECT ( -390 -150 0 150 )
- NEW met1 ( 584890 2199630 ) RECT ( -355 -70 0 70 ) ;
+ NEW met1 ( 1331930 2159510 ) M1M2_PR
+ NEW met1 ( 1331930 2111570 ) M1M2_PR
+ NEW met1 ( 1387130 1943270 ) M1M2_PR
+ NEW met1 ( 1422090 1943270 ) M1M2_PR
+ NEW met1 ( 1422090 1924910 ) M1M2_PR
+ NEW met1 ( 1433130 1924910 ) M1M2_PR
+ NEW met1 ( 1484190 1830390 ) M1M2_PR
+ NEW met1 ( 1296970 2187050 ) M1M2_PR
+ NEW met1 ( 1296970 2175490 ) M1M2_PR
+ NEW met1 ( 1304330 2175490 ) M1M2_PR
+ NEW met1 ( 1304330 2159850 ) M1M2_PR
+ NEW met1 ( 1433130 1875270 ) M1M2_PR
+ NEW met1 ( 1484190 1808970 ) M1M2_PR
+ NEW met2 ( 2696750 1964180 ) M2M3_PR_M
+ NEW met2 ( 2698590 1964180 ) M2M3_PR_M
+ NEW met2 ( 2698590 1944460 ) M2M3_PR_M
+ NEW met2 ( 2696750 1944460 ) M2M3_PR_M ;
+ - addr0_to_sram\[11\] ( custom_sram a[11] ) ( chip_controller addr0_to_sram[11] ) + USE SIGNAL
+ + ROUTED met2 ( 126270 1803870 ) ( * 2366910 )
+ NEW met2 ( 190670 2366910 ) ( * 2368780 )
+ NEW met3 ( 190670 2368780 ) ( 201020 * )
+ NEW met3 ( 201020 2368780 ) ( * 2369460 0 )
+ NEW met1 ( 126270 2366910 ) ( 190670 * )
+ NEW met2 ( 1815390 1803020 ) ( 1817230 * 0 )
+ NEW met2 ( 1815390 1802850 ) ( * 1803020 )
+ NEW li1 ( 1815390 1802850 ) ( * 1803870 )
+ NEW met1 ( 126270 1803870 ) ( 1815390 * )
+ NEW met1 ( 126270 1803870 ) M1M2_PR
+ NEW met1 ( 126270 2366910 ) M1M2_PR
+ NEW met1 ( 190670 2366910 ) M1M2_PR
+ NEW met2 ( 190670 2368780 ) M2M3_PR_M
+ NEW li1 ( 1815390 1802850 ) L1M1_PR_MR
+ NEW met1 ( 1815390 1802850 ) M1M2_PR
+ NEW li1 ( 1815390 1803870 ) L1M1_PR_MR
+ NEW met1 ( 1815390 1802850 ) RECT ( -355 -70 0 70 ) ;
+ - addr0_to_sram\[12\] ( custom_sram a[12] ) ( chip_controller addr0_to_sram[12] ) + USE SIGNAL
+ + ROUTED met1 ( 1343430 2245190 ) ( 1350790 * )
+ NEW met2 ( 1350790 2235330 ) ( * 2245190 )
+ NEW met1 ( 1350790 2235330 ) ( 1357690 * )
+ NEW met2 ( 1441870 1849430 ) ( * 1862690 )
+ NEW met1 ( 1441870 1849430 ) ( 1449230 * )
+ NEW met1 ( 1449230 1849090 ) ( * 1849430 )
+ NEW met1 ( 1449230 1849090 ) ( 1457970 * )
+ NEW met2 ( 1457970 1841950 ) ( * 1849090 )
+ NEW met1 ( 1457970 1841950 ) ( 1480970 * )
+ NEW met2 ( 298310 2286670 ) ( * 2300100 0 )
+ NEW met1 ( 1370570 2083690 ) ( 1377010 * )
+ NEW met2 ( 1377010 2006170 ) ( * 2083690 )
+ NEW met1 ( 1357690 2166310 ) ( 1370570 * )
+ NEW met2 ( 1357690 2166310 ) ( * 2235330 )
+ NEW met2 ( 1370570 2083690 ) ( * 2166310 )
+ NEW met2 ( 1343430 2245190 ) ( * 2281230 )
+ NEW met2 ( 1480970 1818150 ) ( * 1841950 )
+ NEW met1 ( 2698130 2549150 ) ( 2708250 * )
+ NEW met3 ( 2699740 2659820 ) ( * 2662540 0 )
+ NEW met3 ( 2699740 2659820 ) ( 2708250 * )
+ NEW met2 ( 2708250 2549150 ) ( * 2659820 )
+ NEW met1 ( 1417950 1862690 ) ( 1441870 * )
+ NEW met1 ( 1391730 1924910 ) ( 1407830 * )
+ NEW met2 ( 426650 2281230 ) ( * 2286670 )
+ NEW met1 ( 298310 2286670 ) ( 426650 * )
+ NEW met1 ( 426650 2281230 ) ( 1343430 * )
+ NEW met1 ( 1407830 1911310 ) ( 1417950 * )
+ NEW met2 ( 1407830 1911310 ) ( * 1924910 )
+ NEW met2 ( 1417950 1862690 ) ( * 1911310 )
+ NEW met1 ( 1377010 2006170 ) ( 1391730 * )
+ NEW met2 ( 1391730 1924910 ) ( * 2006170 )
+ NEW met2 ( 1500290 1808290 ) ( * 1818150 )
+ NEW met1 ( 1480970 1818150 ) ( 1500290 * )
+ NEW met1 ( 1500290 1808290 ) ( 2695370 * )
+ NEW met3 ( 2696750 2293980 ) ( 2696980 * )
+ NEW met2 ( 2695370 2293980 ) ( 2696750 * )
+ NEW met2 ( 2698130 2546100 ) ( * 2549150 )
+ NEW met2 ( 2696750 2546100 ) ( 2698130 * )
+ NEW met2 ( 2695370 2476900 ) ( 2696750 * )
+ NEW met2 ( 2695370 2293980 ) ( * 2476900 )
+ NEW met2 ( 2696750 2476900 ) ( * 2477100 )
+ NEW met3 ( 2696750 2477100 ) ( 2696980 * )
+ NEW met3 ( 2696980 2477100 ) ( * 2477580 )
+ NEW met3 ( 2696980 2477580 ) ( 2698590 * )
+ NEW met2 ( 2695370 2230740 ) ( 2696290 * )
+ NEW met2 ( 2696290 2230740 ) ( * 2232100 )
+ NEW met2 ( 2696290 2232100 ) ( 2696750 * )
+ NEW met3 ( 2696750 2232100 ) ( 2696980 * )
+ NEW met4 ( 2696980 2232100 ) ( * 2293980 )
+ NEW met2 ( 2696750 2539200 ) ( * 2546100 )
+ NEW met2 ( 2696750 2539200 ) ( 2698590 * )
+ NEW met2 ( 2698590 2477580 ) ( * 2539200 )
+ NEW met2 ( 2695370 2104500 ) ( * 2230740 )
+ NEW met2 ( 2695830 2095420 ) ( 2697210 * )
+ NEW met2 ( 2695830 2095420 ) ( * 2104500 )
+ NEW met2 ( 2695370 2104500 ) ( 2695830 * )
+ NEW met2 ( 2697210 2090700 ) ( * 2095420 )
+ NEW met2 ( 2695370 2066860 ) ( 2696290 * )
+ NEW met2 ( 2696290 2066860 ) ( * 2090700 )
+ NEW met2 ( 2696290 2090700 ) ( 2697210 * )
+ NEW met2 ( 2695370 2024020 ) ( 2696290 * )
+ NEW met2 ( 2695370 2024020 ) ( * 2066860 )
+ NEW met2 ( 2696290 2014800 ) ( * 2024020 )
+ NEW met2 ( 2695830 2014800 ) ( 2696290 * )
+ NEW met2 ( 2695830 2001000 ) ( * 2014800 )
+ NEW met2 ( 2694450 2001000 ) ( 2695830 * )
+ NEW met2 ( 2694450 1968940 ) ( 2696750 * )
+ NEW met3 ( 2696750 1968940 ) ( 2696980 * )
+ NEW met4 ( 2696980 1941060 ) ( * 1968940 )
+ NEW met3 ( 2696750 1941060 ) ( 2696980 * )
+ NEW met2 ( 2695370 1941060 ) ( 2696750 * )
+ NEW met2 ( 2694450 1968940 ) ( * 2001000 )
+ NEW met2 ( 2695370 1808290 ) ( * 1941060 )
+ NEW met1 ( 1343430 2245190 ) M1M2_PR
+ NEW met1 ( 1350790 2245190 ) M1M2_PR
+ NEW met1 ( 1350790 2235330 ) M1M2_PR
+ NEW met1 ( 1357690 2235330 ) M1M2_PR
+ NEW met1 ( 1441870 1862690 ) M1M2_PR
+ NEW met1 ( 1441870 1849430 ) M1M2_PR
+ NEW met1 ( 1457970 1849090 ) M1M2_PR
+ NEW met1 ( 1457970 1841950 ) M1M2_PR
+ NEW met1 ( 1480970 1841950 ) M1M2_PR
+ NEW met1 ( 298310 2286670 ) M1M2_PR
+ NEW met1 ( 1377010 2006170 ) M1M2_PR
+ NEW met1 ( 1370570 2083690 ) M1M2_PR
+ NEW met1 ( 1377010 2083690 ) M1M2_PR
+ NEW met1 ( 1357690 2166310 ) M1M2_PR
+ NEW met1 ( 1370570 2166310 ) M1M2_PR
+ NEW met1 ( 1343430 2281230 ) M1M2_PR
+ NEW met1 ( 1480970 1818150 ) M1M2_PR
+ NEW met1 ( 2695370 1808290 ) M1M2_PR
+ NEW met1 ( 2698130 2549150 ) M1M2_PR
+ NEW met1 ( 2708250 2549150 ) M1M2_PR
+ NEW met2 ( 2708250 2659820 ) M2M3_PR_M
+ NEW met1 ( 1417950 1862690 ) M1M2_PR
+ NEW met1 ( 1391730 1924910 ) M1M2_PR
+ NEW met1 ( 1407830 1924910 ) M1M2_PR
+ NEW met1 ( 426650 2286670 ) M1M2_PR
+ NEW met1 ( 426650 2281230 ) M1M2_PR
+ NEW met1 ( 1407830 1911310 ) M1M2_PR
+ NEW met1 ( 1417950 1911310 ) M1M2_PR
+ NEW met1 ( 1391730 2006170 ) M1M2_PR
+ NEW met1 ( 1500290 1818150 ) M1M2_PR
+ NEW met1 ( 1500290 1808290 ) M1M2_PR
+ NEW met3 ( 2696980 2293980 ) M3M4_PR_M
+ NEW met2 ( 2696750 2293980 ) M2M3_PR_M
+ NEW met2 ( 2696750 2477100 ) M2M3_PR_M
+ NEW met2 ( 2698590 2477580 ) M2M3_PR_M
+ NEW met2 ( 2696750 2232100 ) M2M3_PR_M
+ NEW met3 ( 2696980 2232100 ) M3M4_PR_M
+ NEW met2 ( 2696750 1968940 ) M2M3_PR_M
+ NEW met3 ( 2696980 1968940 ) M3M4_PR_M
+ NEW met3 ( 2696980 1941060 ) M3M4_PR_M
+ NEW met2 ( 2696750 1941060 ) M2M3_PR_M
+ NEW met3 ( 2696980 2293980 ) RECT ( 0 -150 390 150 )
+ NEW met3 ( 2696980 2232100 ) RECT ( 0 -150 390 150 )
+ NEW met3 ( 2696980 1968940 ) RECT ( 0 -150 390 150 )
+ NEW met3 ( 2696980 1941060 ) RECT ( 0 -150 390 150 ) ;
+ - addr0_to_sram\[13\] ( custom_sram a[13] ) ( chip_controller addr0_to_sram[13] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2378980 0 ) ( 607430 * )
+ NEW met2 ( 607430 2378980 ) ( * 2380170 )
+ NEW li1 ( 2097830 3292390 ) ( * 3296810 )
+ NEW met2 ( 2097830 3296810 ) ( * 3296980 )
+ NEW met2 ( 2097830 3296980 ) ( 2099670 * 0 )
+ NEW met1 ( 1314910 3292390 ) ( 2097830 * )
+ NEW met1 ( 607430 2380170 ) ( 1314910 * )
+ NEW met2 ( 1314910 2380170 ) ( * 3292390 )
+ NEW met2 ( 607430 2378980 ) M2M3_PR_M
+ NEW met1 ( 607430 2380170 ) M1M2_PR
+ NEW met1 ( 1314910 3292390 ) M1M2_PR
+ NEW li1 ( 2097830 3292390 ) L1M1_PR_MR
+ NEW li1 ( 2097830 3296810 ) L1M1_PR_MR
+ NEW met1 ( 2097830 3296810 ) M1M2_PR
+ NEW met1 ( 1314910 2380170 ) M1M2_PR
+ NEW met1 ( 2097830 3296810 ) RECT ( -355 -70 0 70 ) ;
+ - addr0_to_sram\[14\] ( custom_sram a[14] ) ( chip_controller addr0_to_sram[14] ) + USE SIGNAL
+ + ROUTED met2 ( 120750 1794010 ) ( * 2394450 )
+ NEW met2 ( 191130 2394450 ) ( * 2398020 )
+ NEW met3 ( 191130 2398020 ) ( 201020 * )
+ NEW met3 ( 201020 2398020 ) ( * 2398700 0 )
+ NEW met2 ( 1958450 1794010 ) ( * 1800300 0 )
+ NEW met1 ( 120750 2394450 ) ( 191130 * )
+ NEW met1 ( 120750 1794010 ) ( 1958450 * )
+ NEW met1 ( 120750 1794010 ) M1M2_PR
+ NEW met1 ( 120750 2394450 ) M1M2_PR
+ NEW met1 ( 191130 2394450 ) M1M2_PR
+ NEW met2 ( 191130 2398020 ) M2M3_PR_M
+ NEW met1 ( 1958450 1794010 ) M1M2_PR ;
+ - addr0_to_sram\[15\] ( custom_sram a[15] ) ( chip_controller addr0_to_sram[15] ) + USE SIGNAL
+ + ROUTED met1 ( 191590 2448170 ) ( 192970 * )
+ NEW met2 ( 192970 2406860 ) ( * 2448170 )
+ NEW met3 ( 192970 2406860 ) ( 200100 * )
+ NEW met3 ( 200100 2406180 0 ) ( * 2406860 )
+ NEW met2 ( 592710 2703850 ) ( * 2704700 )
+ NEW met2 ( 188830 2690420 ) ( 189290 * )
+ NEW met2 ( 188830 2666110 ) ( * 2690420 )
+ NEW met1 ( 188830 2666110 ) ( 191590 * )
+ NEW met2 ( 189290 2690420 ) ( * 2703850 )
+ NEW met2 ( 191590 2448170 ) ( * 2666110 )
+ NEW met2 ( 609730 2621910 ) ( * 2642700 )
+ NEW met2 ( 608350 2642700 ) ( 609730 * )
+ NEW met1 ( 189290 2703850 ) ( 592710 * )
+ NEW met2 ( 1484190 2615620 ) ( * 2621910 )
+ NEW met3 ( 1484190 2615620 ) ( 1500060 * 0 )
+ NEW met1 ( 609730 2621910 ) ( 1484190 * )
+ NEW met2 ( 594090 2703850 ) ( * 2704700 )
+ NEW met1 ( 594090 2703850 ) ( 608350 * )
+ NEW met3 ( 592710 2704700 ) ( 594090 * )
+ NEW met2 ( 608350 2642700 ) ( * 2703850 )
+ NEW met1 ( 191590 2448170 ) M1M2_PR
+ NEW met1 ( 192970 2448170 ) M1M2_PR
+ NEW met2 ( 192970 2406860 ) M2M3_PR_M
+ NEW met1 ( 189290 2703850 ) M1M2_PR
+ NEW met1 ( 609730 2621910 ) M1M2_PR
+ NEW met1 ( 592710 2703850 ) M1M2_PR
+ NEW met2 ( 592710 2704700 ) M2M3_PR_M
+ NEW met1 ( 188830 2666110 ) M1M2_PR
+ NEW met1 ( 191590 2666110 ) M1M2_PR
+ NEW met1 ( 1484190 2621910 ) M1M2_PR
+ NEW met2 ( 1484190 2615620 ) M2M3_PR_M
+ NEW met2 ( 594090 2704700 ) M2M3_PR_M
+ NEW met1 ( 594090 2703850 ) M1M2_PR
+ NEW met1 ( 608350 2703850 ) M1M2_PR ;
+ - addr0_to_sram\[16\] ( custom_sram a[16] ) ( chip_controller addr0_to_sram[16] ) + USE SIGNAL
+ + ROUTED met3 ( 185610 2412300 ) ( 200100 * )
+ NEW met3 ( 200100 2411620 0 ) ( * 2412300 )
+ NEW met2 ( 185610 2412300 ) ( * 3291370 )
+ NEW li1 ( 2168670 3291370 ) ( * 3296810 )
+ NEW met2 ( 2168670 3296810 ) ( * 3296980 )
+ NEW met2 ( 2168670 3296980 ) ( 2170510 * 0 )
+ NEW met1 ( 185610 3291370 ) ( 2168670 * )
+ NEW met2 ( 185610 2412300 ) M2M3_PR_M
+ NEW met1 ( 185610 3291370 ) M1M2_PR
+ NEW li1 ( 2168670 3291370 ) L1M1_PR_MR
+ NEW li1 ( 2168670 3296810 ) L1M1_PR_MR
+ NEW met1 ( 2168670 3296810 ) M1M2_PR
+ NEW met1 ( 2168670 3296810 ) RECT ( -355 -70 0 70 ) ;
+ - addr0_to_sram\[17\] ( custom_sram a[17] ) ( chip_controller addr0_to_sram[17] ) + USE SIGNAL
+ + ROUTED met2 ( 323150 2296870 ) ( * 2300100 0 )
+ NEW met1 ( 323150 2296870 ) ( 1489250 * )
+ NEW met3 ( 1489250 2748220 ) ( 1500060 * 0 )
+ NEW met2 ( 1489250 2296870 ) ( * 2748220 )
+ NEW met1 ( 323150 2296870 ) M1M2_PR
+ NEW met1 ( 1489250 2296870 ) M1M2_PR
+ NEW met2 ( 1489250 2748220 ) M2M3_PR_M ;
+ - addr0_to_sram\[18\] ( custom_sram a[18] ) ( chip_controller addr0_to_sram[18] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2412300 0 ) ( 607430 * )
+ NEW met2 ( 607430 2412300 ) ( * 2414510 )
+ NEW met3 ( 2699740 2962420 0 ) ( 2712390 * )
+ NEW met2 ( 2712390 2962420 ) ( * 3290010 )
+ NEW met1 ( 607430 2414510 ) ( 1497530 * )
+ NEW met1 ( 1497530 3290010 ) ( 2712390 * )
+ NEW met2 ( 1497530 2414510 ) ( * 3290010 )
+ NEW met2 ( 607430 2412300 ) M2M3_PR_M
+ NEW met1 ( 607430 2414510 ) M1M2_PR
+ NEW met1 ( 2712390 3290010 ) M1M2_PR
+ NEW met2 ( 2712390 2962420 ) M2M3_PR_M
+ NEW met1 ( 1497530 2414510 ) M1M2_PR
+ NEW met1 ( 1497530 3290010 ) M1M2_PR ;
+ - addr0_to_sram\[19\] ( custom_sram a[19] ) ( chip_controller addr0_to_sram[19] ) + USE SIGNAL
+ + ROUTED met2 ( 2311730 3299700 0 ) ( * 3308030 )
+ NEW met1 ( 1500290 3308030 ) ( 2311730 * )
+ NEW met2 ( 336950 2297890 ) ( * 2300100 0 )
+ NEW met1 ( 336950 2297890 ) ( 1500290 * )
+ NEW met2 ( 1500290 2297890 ) ( * 3308030 )
+ NEW met1 ( 2311730 3308030 ) M1M2_PR
+ NEW met1 ( 1500290 3308030 ) M1M2_PR
+ NEW met1 ( 336950 2297890 ) M1M2_PR
+ NEW met1 ( 1500290 2297890 ) M1M2_PR ;
+ - addr0_to_sram\[1\] ( custom_sram a[1] ) ( chip_controller addr0_to_sram[1] ) + USE SIGNAL
+ + ROUTED met2 ( 238510 2090490 ) ( * 2299250 )
+ NEW met2 ( 1490170 2086580 ) ( * 2090490 )
+ NEW met3 ( 1490170 2086580 ) ( 1500060 * 0 )
+ NEW met1 ( 238510 2090490 ) ( 1490170 * )
+ NEW met3 ( 200100 2307580 0 ) ( * 2308260 )
+ NEW met3 ( 198950 2308260 ) ( 200100 * )
+ NEW met2 ( 198950 2299250 ) ( * 2308260 )
+ NEW met1 ( 198950 2299250 ) ( 238510 * )
+ NEW met1 ( 238510 2090490 ) M1M2_PR
+ NEW met1 ( 238510 2299250 ) M1M2_PR
+ NEW met1 ( 1490170 2090490 ) M1M2_PR
+ NEW met2 ( 1490170 2086580 ) M2M3_PR_M
+ NEW met2 ( 198950 2308260 ) M2M3_PR_M
+ NEW met1 ( 198950 2299250 ) M1M2_PR ;
+ - addr0_to_sram\[2\] ( custom_sram a[2] ) ( chip_controller addr0_to_sram[2] ) + USE SIGNAL
+ + ROUTED met2 ( 215970 2699940 ) ( 216430 * 0 )
+ NEW met2 ( 215970 2699940 ) ( * 2725270 )
+ NEW met2 ( 1535250 1793330 ) ( * 1800300 0 )
+ NEW met1 ( 215970 2725270 ) ( 1432210 * )
+ NEW met2 ( 1432210 1793330 ) ( * 2725270 )
+ NEW met1 ( 1432210 1793330 ) ( 1535250 * )
+ NEW met1 ( 215970 2725270 ) M1M2_PR
+ NEW met1 ( 1535250 1793330 ) M1M2_PR
+ NEW met1 ( 1432210 2725270 ) M1M2_PR
+ NEW met1 ( 1432210 1793330 ) M1M2_PR ;
+ - addr0_to_sram\[3\] ( custom_sram a[3] ) ( chip_controller addr0_to_sram[3] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2321180 0 ) ( 607430 * )
+ NEW met2 ( 607430 2321180 ) ( * 2325090 )
+ NEW met2 ( 1674630 3299020 ) ( * 3299190 )
+ NEW met2 ( 1674630 3299020 ) ( 1676010 * 0 )
+ NEW met1 ( 607430 2325090 ) ( 1425310 * )
+ NEW met1 ( 1425310 3299190 ) ( 1674630 * )
+ NEW met2 ( 1425310 2325090 ) ( * 3299190 )
+ NEW met2 ( 607430 2321180 ) M2M3_PR_M
+ NEW met1 ( 607430 2325090 ) M1M2_PR
+ NEW met1 ( 1674630 3299190 ) M1M2_PR
+ NEW met1 ( 1425310 2325090 ) M1M2_PR
+ NEW met1 ( 1425310 3299190 ) M1M2_PR ;
+ - addr0_to_sram\[4\] ( custom_sram a[4] ) ( chip_controller addr0_to_sram[4] ) + USE SIGNAL
+ + ROUTED met2 ( 244490 2262870 ) ( * 2300100 0 )
+ NEW met2 ( 1490170 2262700 ) ( * 2262870 )
+ NEW met3 ( 1490170 2262700 ) ( 1500060 * 0 )
+ NEW met1 ( 244490 2262870 ) ( 1490170 * )
+ NEW met1 ( 244490 2262870 ) M1M2_PR
+ NEW met1 ( 1490170 2262870 ) M1M2_PR
+ NEW met2 ( 1490170 2262700 ) M2M3_PR_M ;
+ - addr0_to_sram\[5\] ( custom_sram a[5] ) ( chip_controller addr0_to_sram[5] ) + USE SIGNAL
+ + ROUTED met3 ( 2699740 1837700 0 ) ( 2705030 * )
+ NEW met2 ( 2705030 1807270 ) ( * 1837700 )
+ NEW met2 ( 254610 1807270 ) ( * 2256300 )
+ NEW met2 ( 253690 2256300 ) ( 254610 * )
+ NEW met2 ( 253690 2256300 ) ( * 2300100 )
+ NEW met2 ( 252770 2300100 0 ) ( 253690 * )
+ NEW met1 ( 254610 1807270 ) ( 2705030 * )
+ NEW met2 ( 2705030 1837700 ) M2M3_PR_M
+ NEW met1 ( 2705030 1807270 ) M1M2_PR
+ NEW met1 ( 254610 1807270 ) M1M2_PR ;
+ - addr0_to_sram\[6\] ( custom_sram a[6] ) ( chip_controller addr0_to_sram[6] ) + USE SIGNAL
+ + ROUTED met3 ( 197570 2335460 ) ( 200100 * )
+ NEW met3 ( 200100 2334780 0 ) ( * 2335460 )
+ NEW met3 ( 2699740 1987300 0 ) ( 2713310 * )
+ NEW met2 ( 2713310 1807610 ) ( * 1987300 )
+ NEW met1 ( 197570 1807610 ) ( 2713310 * )
+ NEW met2 ( 197570 1807610 ) ( * 2335460 )
+ NEW met2 ( 197570 2335460 ) M2M3_PR_M
+ NEW met1 ( 197570 1807610 ) M1M2_PR
+ NEW met1 ( 2713310 1807610 ) M1M2_PR
+ NEW met2 ( 2713310 1987300 ) M2M3_PR_M ;
+ - addr0_to_sram\[7\] ( custom_sram a[7] ) ( chip_controller addr0_to_sram[7] ) + USE SIGNAL
+ + ROUTED met2 ( 189290 2339370 ) ( * 2340900 )
+ NEW met3 ( 189290 2340900 ) ( 200100 * )
+ NEW met3 ( 200100 2340220 0 ) ( * 2340900 )
+ NEW met1 ( 177790 2339370 ) ( 189290 * )
+ NEW met3 ( 1490170 2351100 ) ( 1500060 * 0 )
+ NEW met2 ( 1490170 2304350 ) ( * 2351100 )
+ NEW met2 ( 177790 2304350 ) ( * 2339370 )
+ NEW met1 ( 177790 2304350 ) ( 1490170 * )
+ NEW met1 ( 189290 2339370 ) M1M2_PR
+ NEW met2 ( 189290 2340900 ) M2M3_PR_M
+ NEW met1 ( 177790 2339370 ) M1M2_PR
+ NEW met2 ( 1490170 2351100 ) M2M3_PR_M
+ NEW met1 ( 1490170 2304350 ) M1M2_PR
+ NEW met1 ( 177790 2304350 ) M1M2_PR ;
+ - addr0_to_sram\[8\] ( custom_sram a[8] ) ( chip_controller addr0_to_sram[8] ) + USE SIGNAL
+ + ROUTED met2 ( 256450 2699260 0 ) ( 257370 * )
+ NEW met2 ( 257370 2699260 ) ( * 2724930 )
+ NEW met1 ( 257370 2724930 ) ( 604210 * )
+ NEW met2 ( 1490170 2395300 ) ( * 2400910 )
+ NEW met3 ( 1490170 2395300 ) ( 1500060 * 0 )
+ NEW met1 ( 604210 2400910 ) ( 1490170 * )
+ NEW met2 ( 604210 2400910 ) ( * 2724930 )
+ NEW met1 ( 604210 2724930 ) M1M2_PR
+ NEW met1 ( 604210 2400910 ) M1M2_PR
+ NEW met1 ( 257370 2724930 ) M1M2_PR
+ NEW met1 ( 1490170 2400910 ) M1M2_PR
+ NEW met2 ( 1490170 2395300 ) M2M3_PR_M ;
+ - addr0_to_sram\[9\] ( custom_sram a[9] ) ( chip_controller addr0_to_sram[9] ) + USE SIGNAL
+ + ROUTED met2 ( 584890 2704530 ) ( * 2710140 )
+ NEW met2 ( 268410 2699260 0 ) ( 268870 * )
+ NEW met2 ( 268870 2699260 ) ( * 2704530 )
+ NEW met1 ( 268870 2704530 ) ( 584890 * )
+ NEW met2 ( 1490170 2439500 ) ( * 2442390 )
+ NEW met3 ( 1490170 2439500 ) ( 1500060 * 0 )
+ NEW met2 ( 600530 2699430 ) ( * 2710140 )
+ NEW met1 ( 600530 2699430 ) ( 604670 * )
+ NEW met3 ( 584890 2710140 ) ( 600530 * )
+ NEW met2 ( 604670 2442390 ) ( * 2699430 )
+ NEW met1 ( 604670 2442390 ) ( 1490170 * )
+ NEW met1 ( 584890 2704530 ) M1M2_PR
+ NEW met2 ( 584890 2710140 ) M2M3_PR_M
+ NEW met1 ( 268870 2704530 ) M1M2_PR
+ NEW met1 ( 1490170 2442390 ) M1M2_PR
+ NEW met2 ( 1490170 2439500 ) M2M3_PR_M
+ NEW met2 ( 600530 2710140 ) M2M3_PR_M
+ NEW met1 ( 600530 2699430 ) M1M2_PR
+ NEW met1 ( 604670 2699430 ) M1M2_PR
+ NEW met1 ( 604670 2442390 ) M1M2_PR ;
- addr_to_core_mem\[0\] ( chip_controller addr_to_core_mem[0] ) + USE SIGNAL ;
- addr_to_core_mem\[10\] ( chip_controller addr_to_core_mem[10] ) + USE SIGNAL ;
- addr_to_core_mem\[11\] ( chip_controller addr_to_core_mem[11] ) + USE SIGNAL ;
@@ -7942,244 +7795,2952 @@
- analog_io[7] ( PIN analog_io[7] ) + USE SIGNAL ;
- analog_io[8] ( PIN analog_io[8] ) + USE SIGNAL ;
- analog_io[9] ( PIN analog_io[9] ) + USE SIGNAL ;
- - clk ( custom_sram clk ) ( chip_controller clk ) + USE SIGNAL
- + ROUTED met3 ( 203780 1799620 ) ( 204010 * )
- NEW met2 ( 204010 1795710 ) ( * 1799620 )
- NEW met2 ( 634110 1788570 ) ( * 1795710 )
- NEW met1 ( 204010 1795710 ) ( 634110 * )
- NEW met2 ( 1523290 1788570 ) ( * 1800300 0 )
- NEW met1 ( 634110 1788570 ) ( 1523290 * )
- NEW met3 ( 203780 1799620 ) ( * 1800900 )
- NEW met3 ( 203780 1800900 ) ( * 1800980 0 )
- NEW met2 ( 204010 1799620 ) M2M3_PR_M
- NEW met1 ( 204010 1795710 ) M1M2_PR
- NEW met1 ( 634110 1795710 ) M1M2_PR
- NEW met1 ( 634110 1788570 ) M1M2_PR
- NEW met1 ( 1523290 1788570 ) M1M2_PR ;
- - core0_data_print\[0\] ( chip_controller core0_data_print[0] ) + USE SIGNAL ;
- - core0_data_print\[10\] ( chip_controller core0_data_print[10] ) + USE SIGNAL ;
- - core0_data_print\[11\] ( chip_controller core0_data_print[11] ) + USE SIGNAL ;
- - core0_data_print\[12\] ( chip_controller core0_data_print[12] ) + USE SIGNAL ;
- - core0_data_print\[13\] ( chip_controller core0_data_print[13] ) + USE SIGNAL ;
- - core0_data_print\[14\] ( chip_controller core0_data_print[14] ) + USE SIGNAL ;
- - core0_data_print\[15\] ( chip_controller core0_data_print[15] ) + USE SIGNAL ;
- - core0_data_print\[16\] ( chip_controller core0_data_print[16] ) + USE SIGNAL ;
- - core0_data_print\[17\] ( chip_controller core0_data_print[17] ) + USE SIGNAL ;
- - core0_data_print\[18\] ( chip_controller core0_data_print[18] ) + USE SIGNAL ;
- - core0_data_print\[19\] ( chip_controller core0_data_print[19] ) + USE SIGNAL ;
- - core0_data_print\[1\] ( chip_controller core0_data_print[1] ) + USE SIGNAL ;
- - core0_data_print\[20\] ( chip_controller core0_data_print[20] ) + USE SIGNAL ;
- - core0_data_print\[21\] ( chip_controller core0_data_print[21] ) + USE SIGNAL ;
- - core0_data_print\[22\] ( chip_controller core0_data_print[22] ) + USE SIGNAL ;
- - core0_data_print\[23\] ( chip_controller core0_data_print[23] ) + USE SIGNAL ;
- - core0_data_print\[24\] ( chip_controller core0_data_print[24] ) + USE SIGNAL ;
- - core0_data_print\[25\] ( chip_controller core0_data_print[25] ) + USE SIGNAL ;
- - core0_data_print\[26\] ( chip_controller core0_data_print[26] ) + USE SIGNAL ;
- - core0_data_print\[27\] ( chip_controller core0_data_print[27] ) + USE SIGNAL ;
- - core0_data_print\[28\] ( chip_controller core0_data_print[28] ) + USE SIGNAL ;
- - core0_data_print\[29\] ( chip_controller core0_data_print[29] ) + USE SIGNAL ;
- - core0_data_print\[2\] ( chip_controller core0_data_print[2] ) + USE SIGNAL ;
- - core0_data_print\[30\] ( chip_controller core0_data_print[30] ) + USE SIGNAL ;
- - core0_data_print\[31\] ( chip_controller core0_data_print[31] ) + USE SIGNAL ;
- - core0_data_print\[3\] ( chip_controller core0_data_print[3] ) + USE SIGNAL ;
- - core0_data_print\[4\] ( chip_controller core0_data_print[4] ) + USE SIGNAL ;
- - core0_data_print\[5\] ( chip_controller core0_data_print[5] ) + USE SIGNAL ;
- - core0_data_print\[6\] ( chip_controller core0_data_print[6] ) + USE SIGNAL ;
- - core0_data_print\[7\] ( chip_controller core0_data_print[7] ) + USE SIGNAL ;
- - core0_data_print\[8\] ( chip_controller core0_data_print[8] ) + USE SIGNAL ;
- - core0_data_print\[9\] ( chip_controller core0_data_print[9] ) + USE SIGNAL ;
- - core0_is_mem_we ( chip_controller we ) + USE SIGNAL ;
- - core0_need_reset_mem_req ( chip_controller reset_mem_req ) + USE SIGNAL ;
- - core0_to_mem_address\[0\] ( chip_controller addr_in[0] ) + USE SIGNAL ;
- - core0_to_mem_address\[10\] ( chip_controller addr_in[10] ) + USE SIGNAL ;
- - core0_to_mem_address\[11\] ( chip_controller addr_in[11] ) + USE SIGNAL ;
- - core0_to_mem_address\[12\] ( chip_controller addr_in[12] ) + USE SIGNAL ;
- - core0_to_mem_address\[13\] ( chip_controller addr_in[13] ) + USE SIGNAL ;
- - core0_to_mem_address\[14\] ( chip_controller addr_in[14] ) + USE SIGNAL ;
- - core0_to_mem_address\[15\] ( chip_controller addr_in[15] ) + USE SIGNAL ;
- - core0_to_mem_address\[16\] ( chip_controller addr_in[16] ) + USE SIGNAL ;
- - core0_to_mem_address\[17\] ( chip_controller addr_in[17] ) + USE SIGNAL ;
- - core0_to_mem_address\[18\] ( chip_controller addr_in[18] ) + USE SIGNAL ;
- - core0_to_mem_address\[19\] ( chip_controller addr_in[19] ) + USE SIGNAL ;
- - core0_to_mem_address\[1\] ( chip_controller addr_in[1] ) + USE SIGNAL ;
- - core0_to_mem_address\[2\] ( chip_controller addr_in[2] ) + USE SIGNAL ;
- - core0_to_mem_address\[3\] ( chip_controller addr_in[3] ) + USE SIGNAL ;
- - core0_to_mem_address\[4\] ( chip_controller addr_in[4] ) + USE SIGNAL ;
- - core0_to_mem_address\[5\] ( chip_controller addr_in[5] ) + USE SIGNAL ;
- - core0_to_mem_address\[6\] ( chip_controller addr_in[6] ) + USE SIGNAL ;
- - core0_to_mem_address\[7\] ( chip_controller addr_in[7] ) + USE SIGNAL ;
- - core0_to_mem_address\[8\] ( chip_controller addr_in[8] ) + USE SIGNAL ;
- - core0_to_mem_address\[9\] ( chip_controller addr_in[9] ) + USE SIGNAL ;
- - core0_to_mem_data\[0\] ( chip_controller wr_data[0] ) + USE SIGNAL ;
- - core0_to_mem_data\[100\] ( chip_controller wr_data[100] ) + USE SIGNAL ;
- - core0_to_mem_data\[101\] ( chip_controller wr_data[101] ) + USE SIGNAL ;
- - core0_to_mem_data\[102\] ( chip_controller wr_data[102] ) + USE SIGNAL ;
- - core0_to_mem_data\[103\] ( chip_controller wr_data[103] ) + USE SIGNAL ;
- - core0_to_mem_data\[104\] ( chip_controller wr_data[104] ) + USE SIGNAL ;
- - core0_to_mem_data\[105\] ( chip_controller wr_data[105] ) + USE SIGNAL ;
- - core0_to_mem_data\[106\] ( chip_controller wr_data[106] ) + USE SIGNAL ;
- - core0_to_mem_data\[107\] ( chip_controller wr_data[107] ) + USE SIGNAL ;
- - core0_to_mem_data\[108\] ( chip_controller wr_data[108] ) + USE SIGNAL ;
- - core0_to_mem_data\[109\] ( chip_controller wr_data[109] ) + USE SIGNAL ;
- - core0_to_mem_data\[10\] ( chip_controller wr_data[10] ) + USE SIGNAL ;
- - core0_to_mem_data\[110\] ( chip_controller wr_data[110] ) + USE SIGNAL ;
- - core0_to_mem_data\[111\] ( chip_controller wr_data[111] ) + USE SIGNAL ;
- - core0_to_mem_data\[112\] ( chip_controller wr_data[112] ) + USE SIGNAL ;
- - core0_to_mem_data\[113\] ( chip_controller wr_data[113] ) + USE SIGNAL ;
- - core0_to_mem_data\[114\] ( chip_controller wr_data[114] ) + USE SIGNAL ;
- - core0_to_mem_data\[115\] ( chip_controller wr_data[115] ) + USE SIGNAL ;
- - core0_to_mem_data\[116\] ( chip_controller wr_data[116] ) + USE SIGNAL ;
- - core0_to_mem_data\[117\] ( chip_controller wr_data[117] ) + USE SIGNAL ;
- - core0_to_mem_data\[118\] ( chip_controller wr_data[118] ) + USE SIGNAL ;
- - core0_to_mem_data\[119\] ( chip_controller wr_data[119] ) + USE SIGNAL ;
- - core0_to_mem_data\[11\] ( chip_controller wr_data[11] ) + USE SIGNAL ;
- - core0_to_mem_data\[120\] ( chip_controller wr_data[120] ) + USE SIGNAL ;
- - core0_to_mem_data\[121\] ( chip_controller wr_data[121] ) + USE SIGNAL ;
- - core0_to_mem_data\[122\] ( chip_controller wr_data[122] ) + USE SIGNAL ;
- - core0_to_mem_data\[123\] ( chip_controller wr_data[123] ) + USE SIGNAL ;
- - core0_to_mem_data\[124\] ( chip_controller wr_data[124] ) + USE SIGNAL ;
- - core0_to_mem_data\[125\] ( chip_controller wr_data[125] ) + USE SIGNAL ;
- - core0_to_mem_data\[126\] ( chip_controller wr_data[126] ) + USE SIGNAL ;
- - core0_to_mem_data\[127\] ( chip_controller wr_data[127] ) + USE SIGNAL ;
- - core0_to_mem_data\[12\] ( chip_controller wr_data[12] ) + USE SIGNAL ;
- - core0_to_mem_data\[13\] ( chip_controller wr_data[13] ) + USE SIGNAL ;
- - core0_to_mem_data\[14\] ( chip_controller wr_data[14] ) + USE SIGNAL ;
- - core0_to_mem_data\[15\] ( chip_controller wr_data[15] ) + USE SIGNAL ;
- - core0_to_mem_data\[16\] ( chip_controller wr_data[16] ) + USE SIGNAL ;
- - core0_to_mem_data\[17\] ( chip_controller wr_data[17] ) + USE SIGNAL ;
- - core0_to_mem_data\[18\] ( chip_controller wr_data[18] ) + USE SIGNAL ;
- - core0_to_mem_data\[19\] ( chip_controller wr_data[19] ) + USE SIGNAL ;
- - core0_to_mem_data\[1\] ( chip_controller wr_data[1] ) + USE SIGNAL ;
- - core0_to_mem_data\[20\] ( chip_controller wr_data[20] ) + USE SIGNAL ;
- - core0_to_mem_data\[21\] ( chip_controller wr_data[21] ) + USE SIGNAL ;
- - core0_to_mem_data\[22\] ( chip_controller wr_data[22] ) + USE SIGNAL ;
- - core0_to_mem_data\[23\] ( chip_controller wr_data[23] ) + USE SIGNAL ;
- - core0_to_mem_data\[24\] ( chip_controller wr_data[24] ) + USE SIGNAL ;
- - core0_to_mem_data\[25\] ( chip_controller wr_data[25] ) + USE SIGNAL ;
- - core0_to_mem_data\[26\] ( chip_controller wr_data[26] ) + USE SIGNAL ;
- - core0_to_mem_data\[27\] ( chip_controller wr_data[27] ) + USE SIGNAL ;
- - core0_to_mem_data\[28\] ( chip_controller wr_data[28] ) + USE SIGNAL ;
- - core0_to_mem_data\[29\] ( chip_controller wr_data[29] ) + USE SIGNAL ;
- - core0_to_mem_data\[2\] ( chip_controller wr_data[2] ) + USE SIGNAL ;
- - core0_to_mem_data\[30\] ( chip_controller wr_data[30] ) + USE SIGNAL ;
- - core0_to_mem_data\[31\] ( chip_controller wr_data[31] ) + USE SIGNAL ;
- - core0_to_mem_data\[32\] ( chip_controller wr_data[32] ) + USE SIGNAL ;
- - core0_to_mem_data\[33\] ( chip_controller wr_data[33] ) + USE SIGNAL ;
- - core0_to_mem_data\[34\] ( chip_controller wr_data[34] ) + USE SIGNAL ;
- - core0_to_mem_data\[35\] ( chip_controller wr_data[35] ) + USE SIGNAL ;
- - core0_to_mem_data\[36\] ( chip_controller wr_data[36] ) + USE SIGNAL ;
- - core0_to_mem_data\[37\] ( chip_controller wr_data[37] ) + USE SIGNAL ;
- - core0_to_mem_data\[38\] ( chip_controller wr_data[38] ) + USE SIGNAL ;
- - core0_to_mem_data\[39\] ( chip_controller wr_data[39] ) + USE SIGNAL ;
- - core0_to_mem_data\[3\] ( chip_controller wr_data[3] ) + USE SIGNAL ;
- - core0_to_mem_data\[40\] ( chip_controller wr_data[40] ) + USE SIGNAL ;
- - core0_to_mem_data\[41\] ( chip_controller wr_data[41] ) + USE SIGNAL ;
- - core0_to_mem_data\[42\] ( chip_controller wr_data[42] ) + USE SIGNAL ;
- - core0_to_mem_data\[43\] ( chip_controller wr_data[43] ) + USE SIGNAL ;
- - core0_to_mem_data\[44\] ( chip_controller wr_data[44] ) + USE SIGNAL ;
- - core0_to_mem_data\[45\] ( chip_controller wr_data[45] ) + USE SIGNAL ;
- - core0_to_mem_data\[46\] ( chip_controller wr_data[46] ) + USE SIGNAL ;
- - core0_to_mem_data\[47\] ( chip_controller wr_data[47] ) + USE SIGNAL ;
- - core0_to_mem_data\[48\] ( chip_controller wr_data[48] ) + USE SIGNAL ;
- - core0_to_mem_data\[49\] ( chip_controller wr_data[49] ) + USE SIGNAL ;
- - core0_to_mem_data\[4\] ( chip_controller wr_data[4] ) + USE SIGNAL ;
- - core0_to_mem_data\[50\] ( chip_controller wr_data[50] ) + USE SIGNAL ;
- - core0_to_mem_data\[51\] ( chip_controller wr_data[51] ) + USE SIGNAL ;
- - core0_to_mem_data\[52\] ( chip_controller wr_data[52] ) + USE SIGNAL ;
- - core0_to_mem_data\[53\] ( chip_controller wr_data[53] ) + USE SIGNAL ;
- - core0_to_mem_data\[54\] ( chip_controller wr_data[54] ) + USE SIGNAL ;
- - core0_to_mem_data\[55\] ( chip_controller wr_data[55] ) + USE SIGNAL ;
- - core0_to_mem_data\[56\] ( chip_controller wr_data[56] ) + USE SIGNAL ;
- - core0_to_mem_data\[57\] ( chip_controller wr_data[57] ) + USE SIGNAL ;
- - core0_to_mem_data\[58\] ( chip_controller wr_data[58] ) + USE SIGNAL ;
- - core0_to_mem_data\[59\] ( chip_controller wr_data[59] ) + USE SIGNAL ;
- - core0_to_mem_data\[5\] ( chip_controller wr_data[5] ) + USE SIGNAL ;
- - core0_to_mem_data\[60\] ( chip_controller wr_data[60] ) + USE SIGNAL ;
- - core0_to_mem_data\[61\] ( chip_controller wr_data[61] ) + USE SIGNAL ;
- - core0_to_mem_data\[62\] ( chip_controller wr_data[62] ) + USE SIGNAL ;
- - core0_to_mem_data\[63\] ( chip_controller wr_data[63] ) + USE SIGNAL ;
- - core0_to_mem_data\[64\] ( chip_controller wr_data[64] ) + USE SIGNAL ;
- - core0_to_mem_data\[65\] ( chip_controller wr_data[65] ) + USE SIGNAL ;
- - core0_to_mem_data\[66\] ( chip_controller wr_data[66] ) + USE SIGNAL ;
- - core0_to_mem_data\[67\] ( chip_controller wr_data[67] ) + USE SIGNAL ;
- - core0_to_mem_data\[68\] ( chip_controller wr_data[68] ) + USE SIGNAL ;
- - core0_to_mem_data\[69\] ( chip_controller wr_data[69] ) + USE SIGNAL ;
- - core0_to_mem_data\[6\] ( chip_controller wr_data[6] ) + USE SIGNAL ;
- - core0_to_mem_data\[70\] ( chip_controller wr_data[70] ) + USE SIGNAL ;
- - core0_to_mem_data\[71\] ( chip_controller wr_data[71] ) + USE SIGNAL ;
- - core0_to_mem_data\[72\] ( chip_controller wr_data[72] ) + USE SIGNAL ;
- - core0_to_mem_data\[73\] ( chip_controller wr_data[73] ) + USE SIGNAL ;
- - core0_to_mem_data\[74\] ( chip_controller wr_data[74] ) + USE SIGNAL ;
- - core0_to_mem_data\[75\] ( chip_controller wr_data[75] ) + USE SIGNAL ;
- - core0_to_mem_data\[76\] ( chip_controller wr_data[76] ) + USE SIGNAL ;
- - core0_to_mem_data\[77\] ( chip_controller wr_data[77] ) + USE SIGNAL ;
- - core0_to_mem_data\[78\] ( chip_controller wr_data[78] ) + USE SIGNAL ;
- - core0_to_mem_data\[79\] ( chip_controller wr_data[79] ) + USE SIGNAL ;
- - core0_to_mem_data\[7\] ( chip_controller wr_data[7] ) + USE SIGNAL ;
- - core0_to_mem_data\[80\] ( chip_controller wr_data[80] ) + USE SIGNAL ;
- - core0_to_mem_data\[81\] ( chip_controller wr_data[81] ) + USE SIGNAL ;
- - core0_to_mem_data\[82\] ( chip_controller wr_data[82] ) + USE SIGNAL ;
- - core0_to_mem_data\[83\] ( chip_controller wr_data[83] ) + USE SIGNAL ;
- - core0_to_mem_data\[84\] ( chip_controller wr_data[84] ) + USE SIGNAL ;
- - core0_to_mem_data\[85\] ( chip_controller wr_data[85] ) + USE SIGNAL ;
- - core0_to_mem_data\[86\] ( chip_controller wr_data[86] ) + USE SIGNAL ;
- - core0_to_mem_data\[87\] ( chip_controller wr_data[87] ) + USE SIGNAL ;
- - core0_to_mem_data\[88\] ( chip_controller wr_data[88] ) + USE SIGNAL ;
- - core0_to_mem_data\[89\] ( chip_controller wr_data[89] ) + USE SIGNAL ;
- - core0_to_mem_data\[8\] ( chip_controller wr_data[8] ) + USE SIGNAL ;
- - core0_to_mem_data\[90\] ( chip_controller wr_data[90] ) + USE SIGNAL ;
- - core0_to_mem_data\[91\] ( chip_controller wr_data[91] ) + USE SIGNAL ;
- - core0_to_mem_data\[92\] ( chip_controller wr_data[92] ) + USE SIGNAL ;
- - core0_to_mem_data\[93\] ( chip_controller wr_data[93] ) + USE SIGNAL ;
- - core0_to_mem_data\[94\] ( chip_controller wr_data[94] ) + USE SIGNAL ;
- - core0_to_mem_data\[95\] ( chip_controller wr_data[95] ) + USE SIGNAL ;
- - core0_to_mem_data\[96\] ( chip_controller wr_data[96] ) + USE SIGNAL ;
- - core0_to_mem_data\[97\] ( chip_controller wr_data[97] ) + USE SIGNAL ;
- - core0_to_mem_data\[98\] ( chip_controller wr_data[98] ) + USE SIGNAL ;
- - core0_to_mem_data\[99\] ( chip_controller wr_data[99] ) + USE SIGNAL ;
- - core0_to_mem_data\[9\] ( chip_controller wr_data[9] ) + USE SIGNAL ;
+ - clk ( custom_sram clk ) ( core0 clk ) ( chip_controller clk ) + USE SIGNAL
+ + ROUTED met2 ( 313950 1731790 ) ( * 2290070 )
+ NEW met1 ( 313950 1731790 ) ( 1307550 * )
+ NEW met2 ( 1490170 1821890 ) ( * 1822060 )
+ NEW met3 ( 1490170 1822060 ) ( 1500060 * 0 )
+ NEW met1 ( 1307550 1821890 ) ( 1490170 * )
+ NEW met2 ( 1307550 1699660 ) ( 1309390 * 0 )
+ NEW met2 ( 1307550 1699660 ) ( * 1821890 )
+ NEW met2 ( 204010 2290070 ) ( * 2300100 0 )
+ NEW met1 ( 204010 2290070 ) ( 313950 * )
+ NEW met1 ( 313950 1731790 ) M1M2_PR
+ NEW met1 ( 313950 2290070 ) M1M2_PR
+ NEW met1 ( 1307550 1731790 ) M1M2_PR
+ NEW met1 ( 1307550 1821890 ) M1M2_PR
+ NEW met1 ( 1490170 1821890 ) M1M2_PR
+ NEW met2 ( 1490170 1822060 ) M2M3_PR_M
+ NEW met1 ( 204010 2290070 ) M1M2_PR
+ NEW met2 ( 1307550 1731790 ) RECT ( -70 -485 70 0 ) ;
+ - core0_data_print\[0\] ( core0 hex_out[0] ) ( chip_controller core0_data_print[0] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2306220 ) ( * 2306900 0 )
+ NEW met3 ( 599380 2306220 ) ( 606970 * )
+ NEW met2 ( 606970 2305030 ) ( * 2306220 )
+ NEW met2 ( 1289610 225420 ) ( * 507110 )
+ NEW met1 ( 606970 2305030 ) ( 935870 * )
+ NEW met1 ( 935870 507110 ) ( 1289610 * )
+ NEW met3 ( 1289610 225420 ) ( 1300420 * 0 )
+ NEW met2 ( 935870 507110 ) ( * 2305030 )
+ NEW met2 ( 606970 2306220 ) M2M3_PR_M
+ NEW met1 ( 606970 2305030 ) M1M2_PR
+ NEW met2 ( 1289610 225420 ) M2M3_PR_M
+ NEW met1 ( 1289610 507110 ) M1M2_PR
+ NEW met1 ( 935870 507110 ) M1M2_PR
+ NEW met1 ( 935870 2305030 ) M1M2_PR ;
+ - core0_data_print\[10\] ( core0 hex_out[10] ) ( chip_controller core0_data_print[10] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2364700 0 ) ( 607430 * )
+ NEW met2 ( 607430 2362490 ) ( * 2364700 )
+ NEW met1 ( 607430 2362490 ) ( 607890 * )
+ NEW li1 ( 607890 2360450 ) ( * 2362490 )
+ NEW met2 ( 984170 568990 ) ( * 2360450 )
+ NEW met2 ( 1290070 508300 ) ( * 568990 )
+ NEW met1 ( 984170 568990 ) ( 1290070 * )
+ NEW met3 ( 1290070 508300 ) ( 1300420 * 0 )
+ NEW met1 ( 607890 2360450 ) ( 984170 * )
+ NEW met1 ( 984170 568990 ) M1M2_PR
+ NEW met2 ( 1290070 508300 ) M2M3_PR_M
+ NEW met1 ( 1290070 568990 ) M1M2_PR
+ NEW met2 ( 607430 2364700 ) M2M3_PR_M
+ NEW met1 ( 607430 2362490 ) M1M2_PR
+ NEW li1 ( 607890 2362490 ) L1M1_PR_MR
+ NEW li1 ( 607890 2360450 ) L1M1_PR_MR
+ NEW met1 ( 984170 2360450 ) M1M2_PR ;
+ - core0_data_print\[11\] ( core0 hex_out[11] ) ( chip_controller core0_data_print[11] ) + USE SIGNAL
+ + ROUTED met3 ( 2796570 419220 ) ( 2797260 * )
+ NEW met3 ( 2797260 417180 0 ) ( * 419220 )
+ NEW met1 ( 191590 2352970 ) ( 192510 * )
+ NEW met2 ( 192510 2352970 ) ( * 2373540 )
+ NEW met3 ( 192510 2373540 ) ( 200100 * )
+ NEW met3 ( 200100 2372860 0 ) ( * 2373540 )
+ NEW met2 ( 2796570 419220 ) ( * 420900 )
+ NEW met2 ( 2795650 420900 ) ( 2796570 * )
+ NEW met2 ( 2795190 1697790 ) ( * 1701190 )
+ NEW met1 ( 2795190 1697790 ) ( 2795650 * )
+ NEW li1 ( 2795650 1692350 ) ( * 1697790 )
+ NEW met1 ( 191590 1701190 ) ( 2795190 * )
+ NEW met2 ( 191590 1701190 ) ( * 2352970 )
+ NEW met2 ( 2795650 420900 ) ( * 1692350 )
+ NEW met2 ( 2796570 419220 ) M2M3_PR_M
+ NEW met1 ( 191590 1701190 ) M1M2_PR
+ NEW met1 ( 191590 2352970 ) M1M2_PR
+ NEW met1 ( 192510 2352970 ) M1M2_PR
+ NEW met2 ( 192510 2373540 ) M2M3_PR_M
+ NEW met1 ( 2795190 1701190 ) M1M2_PR
+ NEW met1 ( 2795190 1697790 ) M1M2_PR
+ NEW li1 ( 2795650 1697790 ) L1M1_PR_MR
+ NEW li1 ( 2795650 1692350 ) L1M1_PR_MR
+ NEW met1 ( 2795650 1692350 ) M1M2_PR
+ NEW met1 ( 2795650 1692350 ) RECT ( -355 -70 0 70 ) ;
+ - core0_data_print\[12\] ( core0 hex_out[12] ) ( chip_controller core0_data_print[12] ) + USE SIGNAL
+ + ROUTED met2 ( 114770 565590 ) ( * 2380510 )
+ NEW met2 ( 190670 2380510 ) ( * 2381700 )
+ NEW met3 ( 190670 2381700 ) ( 201020 * )
+ NEW met3 ( 201020 2381700 ) ( * 2382380 0 )
+ NEW met2 ( 1283630 561340 ) ( * 565590 )
+ NEW met1 ( 114770 2380510 ) ( 190670 * )
+ NEW met1 ( 114770 565590 ) ( 1283630 * )
+ NEW met3 ( 1283630 561340 ) ( 1300420 * 0 )
+ NEW met1 ( 114770 565590 ) M1M2_PR
+ NEW met1 ( 114770 2380510 ) M1M2_PR
+ NEW met1 ( 190670 2380510 ) M1M2_PR
+ NEW met2 ( 190670 2381700 ) M2M3_PR_M
+ NEW met1 ( 1283630 565590 ) M1M2_PR
+ NEW met2 ( 1283630 561340 ) M2M3_PR_M ;
+ - core0_data_print\[13\] ( core0 hex_out[13] ) ( chip_controller core0_data_print[13] ) + USE SIGNAL
+ + ROUTED met2 ( 294630 2699260 0 ) ( 295550 * )
+ NEW met2 ( 295550 2699260 ) ( * 2724250 )
+ NEW met2 ( 673670 190910 ) ( * 2724250 )
+ NEW met1 ( 295550 2724250 ) ( 673670 * )
+ NEW met2 ( 1595050 190910 ) ( * 200260 0 )
+ NEW met1 ( 673670 190910 ) ( 1595050 * )
+ NEW met1 ( 295550 2724250 ) M1M2_PR
+ NEW met1 ( 673670 190910 ) M1M2_PR
+ NEW met1 ( 673670 2724250 ) M1M2_PR
+ NEW met1 ( 1595050 190910 ) M1M2_PR ;
+ - core0_data_print\[14\] ( core0 hex_out[14] ) ( chip_controller core0_data_print[14] ) + USE SIGNAL
+ + ROUTED met2 ( 190670 2394790 ) ( * 2400060 )
+ NEW met3 ( 190670 2400060 ) ( 201020 * )
+ NEW met3 ( 201020 2400060 ) ( * 2400740 0 )
+ NEW met2 ( 140990 1796730 ) ( * 2394790 )
+ NEW met1 ( 140990 2394790 ) ( 190670 * )
+ NEW met2 ( 1700850 1699660 ) ( 1703150 * 0 )
+ NEW met1 ( 140990 1796730 ) ( 1700850 * )
+ NEW met2 ( 1700850 1699660 ) ( * 1796730 )
+ NEW met1 ( 190670 2394790 ) M1M2_PR
+ NEW met2 ( 190670 2400060 ) M2M3_PR_M
+ NEW met1 ( 140990 1796730 ) M1M2_PR
+ NEW met1 ( 140990 2394790 ) M1M2_PR
+ NEW met1 ( 1700850 1796730 ) M1M2_PR ;
+ - core0_data_print\[15\] ( core0 hex_out[15] ) ( chip_controller core0_data_print[15] ) + USE SIGNAL
+ + ROUTED met2 ( 190210 2401930 ) ( * 2407540 )
+ NEW met3 ( 190210 2407540 ) ( 199180 * )
+ NEW met3 ( 199180 2407540 ) ( * 2408220 )
+ NEW met3 ( 199180 2408220 ) ( 200100 * )
+ NEW met3 ( 200100 2407540 0 ) ( * 2408220 )
+ NEW met2 ( 128110 1072870 ) ( * 2401930 )
+ NEW met2 ( 1286390 631380 ) ( * 1072870 )
+ NEW met1 ( 128110 2401930 ) ( 190210 * )
+ NEW met1 ( 128110 1072870 ) ( 1286390 * )
+ NEW met3 ( 1286390 631380 ) ( 1300420 * 0 )
+ NEW met1 ( 128110 1072870 ) M1M2_PR
+ NEW met1 ( 128110 2401930 ) M1M2_PR
+ NEW met1 ( 190210 2401930 ) M1M2_PR
+ NEW met2 ( 190210 2407540 ) M2M3_PR_M
+ NEW met1 ( 1286390 1072870 ) M1M2_PR
+ NEW met2 ( 1286390 631380 ) M2M3_PR_M ;
+ - core0_data_print\[16\] ( core0 hex_out[16] ) ( chip_controller core0_data_print[16] ) + USE SIGNAL
+ + ROUTED met2 ( 323610 1724310 ) ( * 2256300 )
+ NEW met2 ( 321310 2256300 ) ( 323610 * )
+ NEW met2 ( 321310 2256300 ) ( * 2300100 )
+ NEW met2 ( 319930 2300100 0 ) ( 321310 * )
+ NEW met2 ( 1740410 1699660 0 ) ( * 1724310 )
+ NEW met1 ( 323610 1724310 ) ( 1740410 * )
+ NEW met1 ( 323610 1724310 ) M1M2_PR
+ NEW met1 ( 1740410 1724310 ) M1M2_PR ;
+ - core0_data_print\[17\] ( core0 hex_out[17] ) ( chip_controller core0_data_print[17] ) + USE SIGNAL
+ + ROUTED met2 ( 319010 2699260 0 ) ( 320390 * )
+ NEW met2 ( 320390 2699260 ) ( * 2723060 )
+ NEW met2 ( 1762030 191930 ) ( * 200260 0 )
+ NEW met2 ( 693450 191930 ) ( * 2723060 )
+ NEW met3 ( 320390 2723060 ) ( 693450 * )
+ NEW met1 ( 693450 191930 ) ( 1762030 * )
+ NEW met2 ( 320390 2723060 ) M2M3_PR_M
+ NEW met1 ( 693450 191930 ) M1M2_PR
+ NEW met2 ( 693450 2723060 ) M2M3_PR_M
+ NEW met1 ( 1762030 191930 ) M1M2_PR ;
+ - core0_data_print\[18\] ( core0 hex_out[18] ) ( chip_controller core0_data_print[18] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2413660 0 ) ( 606970 * )
+ NEW met2 ( 606970 2408220 ) ( * 2413660 )
+ NEW met2 ( 606970 2408220 ) ( 607430 * )
+ NEW met2 ( 607430 2408220 ) ( * 2408390 )
+ NEW met2 ( 1260170 180710 ) ( * 2408390 )
+ NEW met1 ( 607430 2408390 ) ( 1260170 * )
+ NEW met2 ( 1777210 180710 ) ( * 200260 0 )
+ NEW met1 ( 1260170 180710 ) ( 1777210 * )
+ NEW met2 ( 606970 2413660 ) M2M3_PR_M
+ NEW met1 ( 607430 2408390 ) M1M2_PR
+ NEW met1 ( 1260170 180710 ) M1M2_PR
+ NEW met1 ( 1260170 2408390 ) M1M2_PR
+ NEW met1 ( 1777210 180710 ) M1M2_PR ;
+ - core0_data_print\[19\] ( core0 hex_out[19] ) ( chip_controller core0_data_print[19] ) + USE SIGNAL
+ + ROUTED met2 ( 566950 2716090 ) ( * 2741250 )
+ NEW met3 ( 2797030 523940 ) ( 2797260 * )
+ NEW met3 ( 2797260 521900 0 ) ( * 523940 )
+ NEW met2 ( 332810 2699260 0 ) ( 334190 * )
+ NEW met2 ( 334190 2699260 ) ( * 2717450 )
+ NEW li1 ( 518190 2716090 ) ( * 2717450 )
+ NEW met1 ( 334190 2717450 ) ( 518190 * )
+ NEW met1 ( 518190 2716090 ) ( 566950 * )
+ NEW met1 ( 566950 2741250 ) ( 1503050 * )
+ NEW met2 ( 1503050 1698810 ) ( * 2741250 )
+ NEW met1 ( 1503050 1698810 ) ( 2797030 * )
+ NEW met2 ( 2797030 523940 ) ( * 1698810 )
+ NEW met1 ( 566950 2716090 ) M1M2_PR
+ NEW met1 ( 566950 2741250 ) M1M2_PR
+ NEW met2 ( 2797030 523940 ) M2M3_PR_M
+ NEW met1 ( 2797030 1698810 ) M1M2_PR
+ NEW met1 ( 334190 2717450 ) M1M2_PR
+ NEW li1 ( 518190 2717450 ) L1M1_PR_MR
+ NEW li1 ( 518190 2716090 ) L1M1_PR_MR
+ NEW met1 ( 1503050 1698810 ) M1M2_PR
+ NEW met1 ( 1503050 2741250 ) M1M2_PR ;
+ - core0_data_print\[1\] ( core0 hex_out[1] ) ( chip_controller core0_data_print[1] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 278460 ) ( * 282710 )
+ NEW met2 ( 293710 282710 ) ( * 2300270 )
+ NEW met1 ( 293710 282710 ) ( 1283630 * )
+ NEW met3 ( 1283630 278460 ) ( 1300420 * 0 )
+ NEW met1 ( 276000 2300270 ) ( 293710 * )
+ NEW met1 ( 276000 2300270 ) ( * 2300610 )
+ NEW met3 ( 200100 2311660 0 ) ( * 2312340 )
+ NEW met3 ( 199410 2312340 ) ( 200100 * )
+ NEW met2 ( 199410 2300610 ) ( * 2312340 )
+ NEW met1 ( 199410 2300610 ) ( 276000 * )
+ NEW met1 ( 293710 282710 ) M1M2_PR
+ NEW met1 ( 1283630 282710 ) M1M2_PR
+ NEW met2 ( 1283630 278460 ) M2M3_PR_M
+ NEW met1 ( 293710 2300270 ) M1M2_PR
+ NEW met2 ( 199410 2312340 ) M2M3_PR_M
+ NEW met1 ( 199410 2300610 ) M1M2_PR ;
+ - core0_data_print\[20\] ( core0 hex_out[20] ) ( chip_controller core0_data_print[20] ) + USE SIGNAL
+ + ROUTED met2 ( 1834250 1699660 0 ) ( * 1723970 )
+ NEW met1 ( 345230 2284290 ) ( 351210 * )
+ NEW met2 ( 345230 2284290 ) ( * 2300100 0 )
+ NEW met2 ( 351210 1723970 ) ( * 2284290 )
+ NEW met1 ( 351210 1723970 ) ( 1834250 * )
+ NEW met1 ( 1834250 1723970 ) M1M2_PR
+ NEW met1 ( 351210 1723970 ) M1M2_PR
+ NEW met1 ( 351210 2284290 ) M1M2_PR
+ NEW met1 ( 345230 2284290 ) M1M2_PR ;
+ - core0_data_print\[21\] ( core0 hex_out[21] ) ( chip_controller core0_data_print[21] ) + USE SIGNAL
+ + ROUTED met2 ( 191130 2429810 ) ( * 2435420 )
+ NEW met3 ( 191130 2435420 ) ( 200100 * )
+ NEW met3 ( 200100 2434740 0 ) ( * 2435420 )
+ NEW met2 ( 1850810 1699660 ) ( 1853110 * 0 )
+ NEW met2 ( 1850810 1699660 ) ( * 1797070 )
+ NEW met1 ( 134090 2429810 ) ( 191130 * )
+ NEW met2 ( 134090 1797070 ) ( * 2429810 )
+ NEW met1 ( 134090 1797070 ) ( 1850810 * )
+ NEW met1 ( 191130 2429810 ) M1M2_PR
+ NEW met2 ( 191130 2435420 ) M2M3_PR_M
+ NEW met1 ( 1850810 1797070 ) M1M2_PR
+ NEW met1 ( 134090 2429810 ) M1M2_PR
+ NEW met1 ( 134090 1797070 ) M1M2_PR ;
+ - core0_data_print\[22\] ( core0 hex_out[22] ) ( chip_controller core0_data_print[22] ) + USE SIGNAL
+ + ROUTED met1 ( 355350 2284290 ) ( 358570 * )
+ NEW met2 ( 355350 2284290 ) ( * 2300100 0 )
+ NEW met2 ( 358570 1723290 ) ( * 2284290 )
+ NEW met2 ( 1909230 1699660 0 ) ( * 1723290 )
+ NEW met1 ( 358570 1723290 ) ( 1909230 * )
+ NEW met1 ( 358570 1723290 ) M1M2_PR
+ NEW met1 ( 358570 2284290 ) M1M2_PR
+ NEW met1 ( 355350 2284290 ) M1M2_PR
+ NEW met1 ( 1909230 1723290 ) M1M2_PR ;
+ - core0_data_print\[23\] ( core0 hex_out[23] ) ( chip_controller core0_data_print[23] ) + USE SIGNAL
+ + ROUTED met2 ( 1928090 1699660 0 ) ( * 1735530 )
+ NEW met1 ( 1336530 1735530 ) ( 1928090 * )
+ NEW met2 ( 1336530 1735530 ) ( * 2435930 )
+ NEW met3 ( 599380 2436100 0 ) ( 608350 * )
+ NEW met2 ( 608350 2435930 ) ( * 2436100 )
+ NEW met1 ( 608350 2435930 ) ( 1336530 * )
+ NEW met1 ( 1928090 1735530 ) M1M2_PR
+ NEW met1 ( 1336530 1735530 ) M1M2_PR
+ NEW met1 ( 1336530 2435930 ) M1M2_PR
+ NEW met2 ( 608350 2436100 ) M2M3_PR_M
+ NEW met1 ( 608350 2435930 ) M1M2_PR ;
+ - core0_data_print\[24\] ( core0 hex_out[24] ) ( chip_controller core0_data_print[24] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 661300 0 ) ( 2803010 * )
+ NEW met2 ( 363630 2300100 0 ) ( 364550 * )
+ NEW met2 ( 364550 1799110 ) ( * 2300100 )
+ NEW met1 ( 364550 1799110 ) ( 2803010 * )
+ NEW met2 ( 2803010 661300 ) ( * 1799110 )
+ NEW met2 ( 2803010 661300 ) M2M3_PR_M
+ NEW met1 ( 2803010 1799110 ) M1M2_PR
+ NEW met1 ( 364550 1799110 ) M1M2_PR ;
+ - core0_data_print\[25\] ( core0 hex_out[25] ) ( chip_controller core0_data_print[25] ) + USE SIGNAL
+ + ROUTED met3 ( 2797950 698020 ) ( 2798180 * )
+ NEW met3 ( 2798180 696660 0 ) ( * 698020 )
+ NEW met2 ( 189750 2449500 ) ( 190210 * )
+ NEW met2 ( 190210 2449500 ) ( * 2457860 )
+ NEW met3 ( 190210 2457860 ) ( 201020 * )
+ NEW met3 ( 201020 2457860 ) ( * 2458540 0 )
+ NEW met1 ( 189750 1805570 ) ( 2797950 * )
+ NEW met2 ( 189750 1805570 ) ( * 2449500 )
+ NEW met2 ( 2797950 698020 ) ( * 1805570 )
+ NEW met2 ( 2797950 698020 ) M2M3_PR_M
+ NEW met1 ( 189750 1805570 ) M1M2_PR
+ NEW met2 ( 190210 2457860 ) M2M3_PR_M
+ NEW met1 ( 2797950 1805570 ) M1M2_PR ;
+ - core0_data_print\[26\] ( core0 hex_out[26] ) ( chip_controller core0_data_print[26] ) + USE SIGNAL
+ + ROUTED met2 ( 121670 1252390 ) ( * 2464150 )
+ NEW met2 ( 189750 2464150 ) ( * 2465340 )
+ NEW met3 ( 189750 2465340 ) ( 201020 * )
+ NEW met3 ( 201020 2465340 ) ( * 2466020 0 )
+ NEW met2 ( 1285930 821780 ) ( * 1252390 )
+ NEW met1 ( 121670 1252390 ) ( 1285930 * )
+ NEW met1 ( 121670 2464150 ) ( 189750 * )
+ NEW met3 ( 1300420 821780 ) ( * 825860 0 )
+ NEW met3 ( 1285930 821780 ) ( 1300420 * )
+ NEW met1 ( 121670 1252390 ) M1M2_PR
+ NEW met1 ( 1285930 1252390 ) M1M2_PR
+ NEW met1 ( 121670 2464150 ) M1M2_PR
+ NEW met1 ( 189750 2464150 ) M1M2_PR
+ NEW met2 ( 189750 2465340 ) M2M3_PR_M
+ NEW met2 ( 1285930 821780 ) M2M3_PR_M ;
+ - core0_data_print\[27\] ( core0 hex_out[27] ) ( chip_controller core0_data_print[27] ) + USE SIGNAL
+ + ROUTED met3 ( 186990 2470780 ) ( 201020 * )
+ NEW met3 ( 201020 2470780 ) ( * 2471460 0 )
+ NEW met3 ( 2799100 713660 0 ) ( 2803930 * )
+ NEW met1 ( 186990 1805230 ) ( 2803930 * )
+ NEW met2 ( 186990 1805230 ) ( * 2470780 )
+ NEW met2 ( 2803930 713660 ) ( * 1805230 )
+ NEW met1 ( 186990 1805230 ) M1M2_PR
+ NEW met2 ( 186990 2470780 ) M2M3_PR_M
+ NEW met2 ( 2803930 713660 ) M2M3_PR_M
+ NEW met1 ( 2803930 1805230 ) M1M2_PR ;
+ - core0_data_print\[28\] ( core0 hex_out[28] ) ( chip_controller core0_data_print[28] ) + USE SIGNAL
+ + ROUTED met2 ( 383410 2699260 0 ) ( 383870 * )
+ NEW met2 ( 383870 2699260 ) ( * 2717790 )
+ NEW met1 ( 380190 2717790 ) ( 383870 * )
+ NEW met2 ( 1928550 189550 ) ( * 200260 0 )
+ NEW met2 ( 380190 2717790 ) ( * 2741930 )
+ NEW met2 ( 1245910 189550 ) ( * 2741930 )
+ NEW met1 ( 1245910 189550 ) ( 1928550 * )
+ NEW met1 ( 380190 2741930 ) ( 1245910 * )
+ NEW met1 ( 383870 2717790 ) M1M2_PR
+ NEW met1 ( 380190 2717790 ) M1M2_PR
+ NEW met1 ( 1245910 189550 ) M1M2_PR
+ NEW met1 ( 1928550 189550 ) M1M2_PR
+ NEW met1 ( 380190 2741930 ) M1M2_PR
+ NEW met1 ( 1245910 2741930 ) M1M2_PR ;
+ - core0_data_print\[29\] ( core0 hex_out[29] ) ( chip_controller core0_data_print[29] ) + USE SIGNAL
+ + ROUTED met1 ( 1315370 1730090 ) ( 1984210 * )
+ NEW met2 ( 1315370 1730090 ) ( * 2463470 )
+ NEW met2 ( 1984210 1699660 0 ) ( * 1730090 )
+ NEW met3 ( 599380 2463980 0 ) ( 607430 * )
+ NEW met2 ( 607430 2463470 ) ( * 2463980 )
+ NEW met1 ( 607430 2463470 ) ( 1315370 * )
+ NEW met1 ( 1315370 1730090 ) M1M2_PR
+ NEW met1 ( 1984210 1730090 ) M1M2_PR
+ NEW met1 ( 1315370 2463470 ) M1M2_PR
+ NEW met2 ( 607430 2463980 ) M2M3_PR_M
+ NEW met1 ( 607430 2463470 ) M1M2_PR ;
+ - core0_data_print\[2\] ( core0 hex_out[2] ) ( chip_controller core0_data_print[2] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2315740 ) ( * 2316420 0 )
+ NEW met3 ( 599380 2315740 ) ( 606970 * )
+ NEW met2 ( 606970 2312170 ) ( * 2315740 )
+ NEW met2 ( 693910 934830 ) ( * 2312170 )
+ NEW met2 ( 1289150 313820 ) ( * 934830 )
+ NEW met1 ( 606970 2312170 ) ( 693910 * )
+ NEW met3 ( 1289150 313820 ) ( 1300420 * 0 )
+ NEW met1 ( 693910 934830 ) ( 1289150 * )
+ NEW met2 ( 606970 2315740 ) M2M3_PR_M
+ NEW met1 ( 606970 2312170 ) M1M2_PR
+ NEW met1 ( 693910 2312170 ) M1M2_PR
+ NEW met2 ( 1289150 313820 ) M2M3_PR_M
+ NEW met1 ( 693910 934830 ) M1M2_PR
+ NEW met1 ( 1289150 934830 ) M1M2_PR ;
+ - core0_data_print\[30\] ( core0 hex_out[30] ) ( chip_controller core0_data_print[30] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 766020 0 ) ( 2813130 * )
+ NEW met2 ( 2813130 766020 ) ( * 772650 )
+ NEW met1 ( 2813130 772650 ) ( 2864190 * )
+ NEW met1 ( 608350 1806250 ) ( 2864190 * )
+ NEW met2 ( 2864190 772650 ) ( * 1806250 )
+ NEW met3 ( 599380 2472140 0 ) ( 607430 * )
+ NEW met2 ( 607430 2470270 ) ( * 2472140 )
+ NEW met1 ( 607430 2470270 ) ( 607890 * )
+ NEW li1 ( 607890 2429130 ) ( * 2470270 )
+ NEW met1 ( 607890 2429130 ) ( 608350 * )
+ NEW met2 ( 608350 1806250 ) ( * 2429130 )
+ NEW met2 ( 2813130 766020 ) M2M3_PR_M
+ NEW met1 ( 2813130 772650 ) M1M2_PR
+ NEW met1 ( 608350 1806250 ) M1M2_PR
+ NEW met1 ( 2864190 772650 ) M1M2_PR
+ NEW met1 ( 2864190 1806250 ) M1M2_PR
+ NEW met2 ( 607430 2472140 ) M2M3_PR_M
+ NEW met1 ( 607430 2470270 ) M1M2_PR
+ NEW li1 ( 607890 2470270 ) L1M1_PR_MR
+ NEW li1 ( 607890 2429130 ) L1M1_PR_MR
+ NEW met1 ( 608350 2429130 ) M1M2_PR ;
+ - core0_data_print\[31\] ( core0 hex_out[31] ) ( chip_controller core0_data_print[31] ) + USE SIGNAL
+ + ROUTED met2 ( 190210 2484550 ) ( * 2489820 )
+ NEW met3 ( 190210 2489820 ) ( 200100 * )
+ NEW met3 ( 200100 2489140 0 ) ( * 2489820 )
+ NEW met2 ( 1974090 185810 ) ( * 200260 0 )
+ NEW met1 ( 156630 185810 ) ( 1974090 * )
+ NEW met2 ( 156630 185810 ) ( * 2484550 )
+ NEW met1 ( 156630 2484550 ) ( 190210 * )
+ NEW met1 ( 190210 2484550 ) M1M2_PR
+ NEW met2 ( 190210 2489820 ) M2M3_PR_M
+ NEW met1 ( 156630 185810 ) M1M2_PR
+ NEW met1 ( 1974090 185810 ) M1M2_PR
+ NEW met1 ( 156630 2484550 ) M1M2_PR ;
+ - core0_data_print\[3\] ( core0 hex_out[3] ) ( chip_controller core0_data_print[3] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 366860 ) ( * 372470 )
+ NEW li1 ( 328670 2300270 ) ( * 2303330 )
+ NEW met2 ( 328670 372470 ) ( * 2300270 )
+ NEW met1 ( 328670 372470 ) ( 1283630 * )
+ NEW met3 ( 1283630 366860 ) ( 1300420 * 0 )
+ NEW met3 ( 200100 2323900 0 ) ( * 2324580 )
+ NEW met3 ( 192510 2324580 ) ( 200100 * )
+ NEW met2 ( 192510 2303330 ) ( * 2324580 )
+ NEW met1 ( 192510 2303330 ) ( 328670 * )
+ NEW met1 ( 1283630 372470 ) M1M2_PR
+ NEW met2 ( 1283630 366860 ) M2M3_PR_M
+ NEW met1 ( 328670 372470 ) M1M2_PR
+ NEW li1 ( 328670 2303330 ) L1M1_PR_MR
+ NEW li1 ( 328670 2300270 ) L1M1_PR_MR
+ NEW met1 ( 328670 2300270 ) M1M2_PR
+ NEW met2 ( 192510 2324580 ) M2M3_PR_M
+ NEW met1 ( 192510 2303330 ) M1M2_PR
+ NEW met1 ( 328670 2300270 ) RECT ( -355 -70 0 70 ) ;
+ - core0_data_print\[4\] ( core0 hex_out[4] ) ( chip_controller core0_data_print[4] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2327300 0 ) ( 606970 * )
+ NEW met2 ( 606970 2325770 ) ( * 2327300 )
+ NEW met2 ( 963010 824330 ) ( * 2325770 )
+ NEW met2 ( 1288690 419900 ) ( * 824330 )
+ NEW met1 ( 606970 2325770 ) ( 963010 * )
+ NEW met3 ( 1288690 419900 ) ( 1300420 * 0 )
+ NEW met1 ( 963010 824330 ) ( 1288690 * )
+ NEW met2 ( 606970 2327300 ) M2M3_PR_M
+ NEW met1 ( 606970 2325770 ) M1M2_PR
+ NEW met1 ( 963010 2325770 ) M1M2_PR
+ NEW met2 ( 1288690 419900 ) M2M3_PR_M
+ NEW met1 ( 963010 824330 ) M1M2_PR
+ NEW met1 ( 1288690 824330 ) M1M2_PR ;
+ - core0_data_print\[5\] ( core0 hex_out[5] ) ( chip_controller core0_data_print[5] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2333420 0 ) ( 607430 * )
+ NEW met2 ( 607430 2332570 ) ( * 2333420 )
+ NEW met2 ( 1247290 186150 ) ( * 2332570 )
+ NEW met1 ( 607430 2332570 ) ( 1247290 * )
+ NEW met2 ( 1413350 186150 ) ( * 200260 0 )
+ NEW met1 ( 1247290 186150 ) ( 1413350 * )
+ NEW met2 ( 607430 2333420 ) M2M3_PR_M
+ NEW met1 ( 607430 2332570 ) M1M2_PR
+ NEW met1 ( 1247290 186150 ) M1M2_PR
+ NEW met1 ( 1247290 2332570 ) M1M2_PR
+ NEW met1 ( 1413350 186150 ) M1M2_PR ;
+ - core0_data_print\[6\] ( core0 hex_out[6] ) ( chip_controller core0_data_print[6] ) + USE SIGNAL
+ + ROUTED met3 ( 191820 2336140 ) ( 201020 * )
+ NEW met3 ( 201020 2336140 ) ( * 2336820 0 )
+ NEW met2 ( 2794730 315180 ) ( 2796570 * )
+ NEW met3 ( 2796570 315180 ) ( 2797260 * )
+ NEW met3 ( 2797260 312460 0 ) ( * 315180 )
+ NEW met1 ( 192970 1805910 ) ( 2794730 * )
+ NEW met3 ( 191820 2304180 ) ( 192970 * )
+ NEW met4 ( 191820 2304180 ) ( * 2336140 )
+ NEW met2 ( 192970 1805910 ) ( * 2304180 )
+ NEW li1 ( 2794730 1135090 ) ( * 1152090 )
+ NEW met2 ( 2794730 315180 ) ( * 1135090 )
+ NEW met2 ( 2794730 1152090 ) ( * 1805910 )
+ NEW met3 ( 191820 2336140 ) M3M4_PR_M
+ NEW met2 ( 2796570 315180 ) M2M3_PR_M
+ NEW met1 ( 192970 1805910 ) M1M2_PR
+ NEW met1 ( 2794730 1805910 ) M1M2_PR
+ NEW met3 ( 191820 2304180 ) M3M4_PR_M
+ NEW met2 ( 192970 2304180 ) M2M3_PR_M
+ NEW li1 ( 2794730 1135090 ) L1M1_PR_MR
+ NEW met1 ( 2794730 1135090 ) M1M2_PR
+ NEW li1 ( 2794730 1152090 ) L1M1_PR_MR
+ NEW met1 ( 2794730 1152090 ) M1M2_PR
+ NEW met1 ( 2794730 1135090 ) RECT ( 0 -70 355 70 )
+ NEW met1 ( 2794730 1152090 ) RECT ( 0 -70 355 70 ) ;
+ - core0_data_print\[7\] ( core0 hex_out[7] ) ( chip_controller core0_data_print[7] ) + USE SIGNAL
+ + ROUTED met2 ( 1489250 182410 ) ( * 200260 0 )
+ NEW met1 ( 275770 182410 ) ( 1489250 * )
+ NEW met1 ( 269330 2283950 ) ( 275770 * )
+ NEW met2 ( 269330 2283950 ) ( * 2300100 0 )
+ NEW met2 ( 275770 182410 ) ( * 2283950 )
+ NEW met1 ( 275770 182410 ) M1M2_PR
+ NEW met1 ( 1489250 182410 ) M1M2_PR
+ NEW met1 ( 275770 2283950 ) M1M2_PR
+ NEW met1 ( 269330 2283950 ) M1M2_PR ;
+ - core0_data_print\[8\] ( core0 hex_out[8] ) ( chip_controller core0_data_print[8] ) + USE SIGNAL
+ + ROUTED met2 ( 1552730 1699660 0 ) ( * 1711730 )
+ NEW met2 ( 259670 2699260 0 ) ( 261050 * )
+ NEW met2 ( 261050 2699260 ) ( * 2711330 )
+ NEW met2 ( 1424850 1711730 ) ( * 2711330 )
+ NEW met1 ( 1424850 1711730 ) ( 1552730 * )
+ NEW met1 ( 261050 2711330 ) ( 1424850 * )
+ NEW met1 ( 1552730 1711730 ) M1M2_PR
+ NEW met1 ( 261050 2711330 ) M1M2_PR
+ NEW met1 ( 1424850 2711330 ) M1M2_PR
+ NEW met1 ( 1424850 1711730 ) M1M2_PR ;
+ - core0_data_print\[9\] ( core0 hex_out[9] ) ( chip_controller core0_data_print[9] ) + USE SIGNAL
+ + ROUTED li1 ( 271170 2698070 ) ( * 2699430 )
+ NEW met2 ( 271170 2699260 ) ( * 2699430 )
+ NEW met2 ( 270250 2699260 0 ) ( 271170 * )
+ NEW met2 ( 1498910 1711390 ) ( * 2698070 )
+ NEW met2 ( 1590450 1699660 0 ) ( * 1711390 )
+ NEW met1 ( 1498910 1711390 ) ( 1590450 * )
+ NEW met1 ( 271170 2698070 ) ( 1498910 * )
+ NEW li1 ( 271170 2698070 ) L1M1_PR_MR
+ NEW li1 ( 271170 2699430 ) L1M1_PR_MR
+ NEW met1 ( 271170 2699430 ) M1M2_PR
+ NEW met1 ( 1498910 2698070 ) M1M2_PR
+ NEW met1 ( 1498910 1711390 ) M1M2_PR
+ NEW met1 ( 1590450 1711390 ) M1M2_PR
+ NEW met1 ( 271170 2699430 ) RECT ( -355 -70 0 70 ) ;
+ - core0_is_mem_we ( core0 is_memory_we ) ( chip_controller we ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 208420 0 ) ( 2802090 * )
+ NEW met2 ( 219190 2300100 0 ) ( 219650 * )
+ NEW met2 ( 219650 1798090 ) ( * 2300100 )
+ NEW met1 ( 219650 1798090 ) ( 2802090 * )
+ NEW met2 ( 2802090 208420 ) ( * 1798090 )
+ NEW met2 ( 2802090 208420 ) M2M3_PR_M
+ NEW met1 ( 219650 1798090 ) M1M2_PR
+ NEW met1 ( 2802090 1798090 ) M1M2_PR ;
+ - core0_need_reset_mem_req ( core0 is_mem_req_reset ) ( chip_controller reset_mem_req ) + USE SIGNAL
+ + ROUTED met2 ( 222410 2287690 ) ( * 2300100 0 )
+ NEW met2 ( 397210 210630 ) ( * 2287690 )
+ NEW met2 ( 1304790 201620 ) ( 1307550 * 0 )
+ NEW met2 ( 1304790 201620 ) ( * 210630 )
+ NEW met1 ( 397210 210630 ) ( 1304790 * )
+ NEW met1 ( 222410 2287690 ) ( 397210 * )
+ NEW met1 ( 397210 210630 ) M1M2_PR
+ NEW met1 ( 222410 2287690 ) M1M2_PR
+ NEW met1 ( 397210 2287690 ) M1M2_PR
+ NEW met1 ( 1304790 210630 ) M1M2_PR ;
+ - core0_to_mem_address\[0\] ( core0 mem_addr_out[0] ) ( chip_controller addr_in[0] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2304860 0 ) ( * 2305540 )
+ NEW met3 ( 599380 2305540 ) ( 607430 * )
+ NEW met2 ( 607430 2305540 ) ( * 2305710 )
+ NEW met2 ( 1288230 243100 ) ( * 658750 )
+ NEW met1 ( 607430 2305710 ) ( 1011310 * )
+ NEW met2 ( 1011310 658750 ) ( * 2305710 )
+ NEW met1 ( 1011310 658750 ) ( 1288230 * )
+ NEW met3 ( 1288230 243100 ) ( 1300420 * 0 )
+ NEW met2 ( 607430 2305540 ) M2M3_PR_M
+ NEW met1 ( 607430 2305710 ) M1M2_PR
+ NEW met2 ( 1288230 243100 ) M2M3_PR_M
+ NEW met1 ( 1288230 658750 ) M1M2_PR
+ NEW met1 ( 1011310 2305710 ) M1M2_PR
+ NEW met1 ( 1011310 658750 ) M1M2_PR ;
+ - core0_to_mem_address\[10\] ( core0 mem_addr_out[10] ) ( chip_controller addr_in[10] ) + USE SIGNAL
+ + ROUTED met2 ( 190670 2360450 ) ( * 2362660 )
+ NEW met3 ( 190670 2362660 ) ( 200100 * )
+ NEW met3 ( 200100 2361980 0 ) ( * 2362660 )
+ NEW met2 ( 1289610 525980 ) ( * 1300670 )
+ NEW met1 ( 162150 2360450 ) ( 190670 * )
+ NEW met1 ( 162150 1300670 ) ( 1289610 * )
+ NEW met3 ( 1289610 525980 ) ( 1300420 * 0 )
+ NEW met2 ( 162150 1300670 ) ( * 2360450 )
+ NEW met1 ( 190670 2360450 ) M1M2_PR
+ NEW met2 ( 190670 2362660 ) M2M3_PR_M
+ NEW met2 ( 1289610 525980 ) M2M3_PR_M
+ NEW met1 ( 1289610 1300670 ) M1M2_PR
+ NEW met1 ( 162150 1300670 ) M1M2_PR
+ NEW met1 ( 162150 2360450 ) M1M2_PR ;
+ - core0_to_mem_address\[11\] ( core0 mem_addr_out[11] ) ( chip_controller addr_in[11] ) + USE SIGNAL
+ + ROUTED met2 ( 191130 2359260 ) ( 191590 * )
+ NEW met2 ( 191590 2359260 ) ( * 2370820 )
+ NEW met3 ( 191590 2370820 ) ( 201020 * )
+ NEW met3 ( 201020 2370820 ) ( * 2371500 0 )
+ NEW met2 ( 2796110 469200 ) ( 2796570 * )
+ NEW met2 ( 2796570 437580 ) ( * 469200 )
+ NEW met3 ( 2796570 437580 ) ( 2797260 * )
+ NEW met3 ( 2797260 434860 0 ) ( * 437580 )
+ NEW met1 ( 191130 1700850 ) ( 2796110 * )
+ NEW met2 ( 191130 1700850 ) ( * 2359260 )
+ NEW met2 ( 2796110 469200 ) ( * 1700850 )
+ NEW met1 ( 191130 1700850 ) M1M2_PR
+ NEW met2 ( 191590 2370820 ) M2M3_PR_M
+ NEW met2 ( 2796570 437580 ) M2M3_PR_M
+ NEW met1 ( 2796110 1700850 ) M1M2_PR ;
+ - core0_to_mem_address\[12\] ( core0 mem_addr_out[12] ) ( chip_controller addr_in[12] ) + USE SIGNAL
+ + ROUTED met2 ( 1564690 182070 ) ( * 200260 0 )
+ NEW met2 ( 299690 2286330 ) ( * 2300100 0 )
+ NEW met2 ( 376050 182070 ) ( * 2286330 )
+ NEW met1 ( 376050 182070 ) ( 1564690 * )
+ NEW met1 ( 299690 2286330 ) ( 376050 * )
+ NEW met1 ( 376050 182070 ) M1M2_PR
+ NEW met1 ( 1564690 182070 ) M1M2_PR
+ NEW met1 ( 299690 2286330 ) M1M2_PR
+ NEW met1 ( 376050 2286330 ) M1M2_PR ;
+ - core0_to_mem_address\[13\] ( core0 mem_addr_out[13] ) ( chip_controller addr_in[13] ) + USE SIGNAL
+ + ROUTED met2 ( 292790 2699260 0 ) ( 294170 * )
+ NEW met2 ( 294170 2699260 ) ( * 2723910 )
+ NEW met2 ( 1283630 596020 ) ( * 600270 )
+ NEW met2 ( 700810 600270 ) ( * 2723910 )
+ NEW met1 ( 294170 2723910 ) ( 700810 * )
+ NEW met1 ( 700810 600270 ) ( 1283630 * )
+ NEW met3 ( 1283630 596020 ) ( 1300420 * 0 )
+ NEW met1 ( 294170 2723910 ) M1M2_PR
+ NEW met1 ( 700810 600270 ) M1M2_PR
+ NEW met1 ( 700810 2723910 ) M1M2_PR
+ NEW met1 ( 1283630 600270 ) M1M2_PR
+ NEW met2 ( 1283630 596020 ) M2M3_PR_M ;
+ - core0_to_mem_address\[14\] ( core0 mem_addr_out[14] ) ( chip_controller addr_in[14] ) + USE SIGNAL
+ + ROUTED met2 ( 297390 2699940 ) ( 297850 * 0 )
+ NEW met2 ( 297390 2699940 ) ( * 2740910 )
+ NEW met2 ( 1625410 187510 ) ( * 200260 0 )
+ NEW met1 ( 1238550 187510 ) ( 1625410 * )
+ NEW met1 ( 297390 2740910 ) ( 1238550 * )
+ NEW met2 ( 1238550 187510 ) ( * 2740910 )
+ NEW met1 ( 297390 2740910 ) M1M2_PR
+ NEW met1 ( 1238550 187510 ) M1M2_PR
+ NEW met1 ( 1625410 187510 ) M1M2_PR
+ NEW met1 ( 1238550 2740910 ) M1M2_PR ;
+ - core0_to_mem_address\[15\] ( core0 mem_addr_out[15] ) ( chip_controller addr_in[15] ) + USE SIGNAL
+ + ROUTED met2 ( 1670950 199070 ) ( * 200260 0 )
+ NEW met3 ( 599380 2389860 0 ) ( 607430 * )
+ NEW met2 ( 607430 2389010 ) ( * 2389860 )
+ NEW met1 ( 607430 2388670 ) ( * 2389010 )
+ NEW met1 ( 606970 2388670 ) ( 607430 * )
+ NEW met1 ( 606970 2387990 ) ( * 2388670 )
+ NEW met1 ( 1225670 199070 ) ( 1670950 * )
+ NEW met1 ( 606970 2387990 ) ( 1225670 * )
+ NEW met2 ( 1225670 199070 ) ( * 2387990 )
+ NEW met1 ( 1670950 199070 ) M1M2_PR
+ NEW met2 ( 607430 2389860 ) M2M3_PR_M
+ NEW met1 ( 607430 2389010 ) M1M2_PR
+ NEW met1 ( 1225670 199070 ) M1M2_PR
+ NEW met1 ( 1225670 2387990 ) M1M2_PR ;
+ - core0_to_mem_address\[16\] ( core0 mem_addr_out[16] ) ( chip_controller addr_in[16] ) + USE SIGNAL
+ + ROUTED met2 ( 318090 2285650 ) ( * 2300100 0 )
+ NEW met2 ( 382950 178330 ) ( * 2284630 )
+ NEW met2 ( 1711430 200260 ) ( 1716490 * 0 )
+ NEW li1 ( 348450 2284630 ) ( * 2285650 )
+ NEW met1 ( 318090 2285650 ) ( 348450 * )
+ NEW met1 ( 348450 2284630 ) ( 382950 * )
+ NEW met1 ( 382950 178330 ) ( 1711430 * )
+ NEW met2 ( 1711430 178330 ) ( * 200260 )
+ NEW met1 ( 318090 2285650 ) M1M2_PR
+ NEW met1 ( 382950 178330 ) M1M2_PR
+ NEW met1 ( 382950 2284630 ) M1M2_PR
+ NEW li1 ( 348450 2285650 ) L1M1_PR_MR
+ NEW li1 ( 348450 2284630 ) L1M1_PR_MR
+ NEW met1 ( 1711430 178330 ) M1M2_PR ;
+ - core0_to_mem_address\[17\] ( core0 mem_addr_out[17] ) ( chip_controller addr_in[17] ) + USE SIGNAL
+ + ROUTED met2 ( 187910 2415530 ) ( * 2419100 )
+ NEW met3 ( 187910 2419100 ) ( 200100 * )
+ NEW met3 ( 200100 2418420 0 ) ( * 2419100 )
+ NEW met2 ( 1290070 649060 ) ( * 1107210 )
+ NEW met1 ( 169510 2415530 ) ( 187910 * )
+ NEW met1 ( 169510 1107210 ) ( 1290070 * )
+ NEW met3 ( 1290070 649060 ) ( 1300420 * 0 )
+ NEW met2 ( 169510 1107210 ) ( * 2415530 )
+ NEW met1 ( 187910 2415530 ) M1M2_PR
+ NEW met2 ( 187910 2419100 ) M2M3_PR_M
+ NEW met2 ( 1290070 649060 ) M2M3_PR_M
+ NEW met1 ( 1290070 1107210 ) M1M2_PR
+ NEW met1 ( 169510 2415530 ) M1M2_PR
+ NEW met1 ( 169510 1107210 ) M1M2_PR ;
+ - core0_to_mem_address\[18\] ( core0 mem_addr_out[18] ) ( chip_controller addr_in[18] ) + USE SIGNAL
+ + ROUTED met3 ( 2796570 507620 ) ( 2797260 * )
+ NEW met3 ( 2797260 504900 0 ) ( * 507620 )
+ NEW met2 ( 324530 2699940 ) ( 325910 * 0 )
+ NEW met2 ( 324530 2699940 ) ( * 2746350 )
+ NEW met1 ( 324530 2746350 ) ( 1501210 * )
+ NEW met2 ( 1501210 1699150 ) ( * 2746350 )
+ NEW met1 ( 1501210 1699150 ) ( 2796570 * )
+ NEW met2 ( 2796570 507620 ) ( * 1699150 )
+ NEW met2 ( 2796570 507620 ) M2M3_PR_M
+ NEW met1 ( 2796570 1699150 ) M1M2_PR
+ NEW met1 ( 324530 2746350 ) M1M2_PR
+ NEW met1 ( 1501210 1699150 ) M1M2_PR
+ NEW met1 ( 1501210 2746350 ) M1M2_PR ;
+ - core0_to_mem_address\[19\] ( core0 mem_addr_out[19] ) ( chip_controller addr_in[19] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 539580 0 ) ( 2808990 * )
+ NEW met2 ( 2808990 539580 ) ( * 544850 )
+ NEW met1 ( 2808990 544850 ) ( 2823250 * )
+ NEW met2 ( 2823250 544850 ) ( * 1784150 )
+ NEW met2 ( 343850 1784150 ) ( * 2256300 )
+ NEW met2 ( 339710 2256300 ) ( 343850 * )
+ NEW met2 ( 339710 2256300 ) ( * 2300100 )
+ NEW met2 ( 338330 2300100 0 ) ( 339710 * )
+ NEW met1 ( 343850 1784150 ) ( 2823250 * )
+ NEW met2 ( 2808990 539580 ) M2M3_PR_M
+ NEW met1 ( 2808990 544850 ) M1M2_PR
+ NEW met1 ( 2823250 544850 ) M1M2_PR
+ NEW met1 ( 2823250 1784150 ) M1M2_PR
+ NEW met1 ( 343850 1784150 ) M1M2_PR ;
+ - core0_to_mem_address\[1\] ( core0 mem_addr_out[1] ) ( chip_controller addr_in[1] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2313020 0 ) ( 607430 * )
+ NEW met2 ( 607430 2311830 ) ( * 2313020 )
+ NEW met2 ( 2808530 200090 ) ( * 225420 )
+ NEW met3 ( 2799100 225420 0 ) ( 2808530 * )
+ NEW met1 ( 607430 2311830 ) ( 1211870 * )
+ NEW met1 ( 1211870 200090 ) ( 2808530 * )
+ NEW met2 ( 1211870 200090 ) ( * 2311830 )
+ NEW met2 ( 607430 2313020 ) M2M3_PR_M
+ NEW met1 ( 607430 2311830 ) M1M2_PR
+ NEW met1 ( 2808530 200090 ) M1M2_PR
+ NEW met2 ( 2808530 225420 ) M2M3_PR_M
+ NEW met1 ( 1211870 200090 ) M1M2_PR
+ NEW met1 ( 1211870 2311830 ) M1M2_PR ;
+ - core0_to_mem_address\[2\] ( core0 mem_addr_out[2] ) ( chip_controller addr_in[2] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2314380 0 ) ( 607430 * )
+ NEW met2 ( 607430 2314210 ) ( * 2314380 )
+ NEW met2 ( 1283630 331500 ) ( * 337790 )
+ NEW met1 ( 607430 2314210 ) ( 618010 * )
+ NEW met2 ( 618010 337790 ) ( * 2314210 )
+ NEW met1 ( 618010 337790 ) ( 1283630 * )
+ NEW met3 ( 1283630 331500 ) ( 1300420 * 0 )
+ NEW met2 ( 607430 2314380 ) M2M3_PR_M
+ NEW met1 ( 607430 2314210 ) M1M2_PR
+ NEW met1 ( 1283630 337790 ) M1M2_PR
+ NEW met2 ( 1283630 331500 ) M2M3_PR_M
+ NEW met1 ( 618010 2314210 ) M1M2_PR
+ NEW met1 ( 618010 337790 ) M1M2_PR ;
+ - core0_to_mem_address\[3\] ( core0 mem_addr_out[3] ) ( chip_controller addr_in[3] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 384540 ) ( * 386070 )
+ NEW met1 ( 240810 386070 ) ( 1283630 * )
+ NEW met3 ( 1283630 384540 ) ( 1300420 * 0 )
+ NEW met2 ( 240810 386070 ) ( * 2256300 )
+ NEW met2 ( 239890 2256300 ) ( 240810 * )
+ NEW met2 ( 239890 2256300 ) ( * 2283950 )
+ NEW met1 ( 235750 2283950 ) ( 239890 * )
+ NEW met2 ( 235750 2283950 ) ( * 2300100 0 )
+ NEW met1 ( 1283630 386070 ) M1M2_PR
+ NEW met2 ( 1283630 384540 ) M2M3_PR_M
+ NEW met1 ( 240810 386070 ) M1M2_PR
+ NEW met1 ( 239890 2283950 ) M1M2_PR
+ NEW met1 ( 235750 2283950 ) M1M2_PR ;
+ - core0_to_mem_address\[4\] ( core0 mem_addr_out[4] ) ( chip_controller addr_in[4] ) + USE SIGNAL
+ + ROUTED met2 ( 1366430 200260 ) ( 1367810 * 0 )
+ NEW met2 ( 1366430 174930 ) ( * 200260 )
+ NEW met2 ( 258750 174930 ) ( * 2256300 )
+ NEW met2 ( 258290 2256300 ) ( 258750 * )
+ NEW met2 ( 258290 2256300 ) ( * 2284290 )
+ NEW met1 ( 245870 2284290 ) ( 258290 * )
+ NEW met2 ( 245870 2284290 ) ( * 2300100 0 )
+ NEW met1 ( 258750 174930 ) ( 1366430 * )
+ NEW met1 ( 1366430 174930 ) M1M2_PR
+ NEW met1 ( 258750 174930 ) M1M2_PR
+ NEW met1 ( 258290 2284290 ) M1M2_PR
+ NEW met1 ( 245870 2284290 ) M1M2_PR ;
+ - core0_to_mem_address\[5\] ( core0 mem_addr_out[5] ) ( chip_controller addr_in[5] ) + USE SIGNAL
+ + ROUTED met2 ( 1280870 192950 ) ( * 2719150 )
+ NEW met2 ( 240350 2699940 ) ( 240810 * 0 )
+ NEW met2 ( 240350 2699940 ) ( * 2719150 )
+ NEW met1 ( 240350 2719150 ) ( 1280870 * )
+ NEW met2 ( 1428530 192950 ) ( * 200260 0 )
+ NEW met1 ( 1280870 192950 ) ( 1428530 * )
+ NEW met1 ( 1280870 192950 ) M1M2_PR
+ NEW met1 ( 1280870 2719150 ) M1M2_PR
+ NEW met1 ( 240350 2719150 ) M1M2_PR
+ NEW met1 ( 1428530 192950 ) M1M2_PR ;
+ - core0_to_mem_address\[6\] ( core0 mem_addr_out[6] ) ( chip_controller addr_in[6] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2340900 ) ( * 2341580 0 )
+ NEW met3 ( 599380 2340900 ) ( 606970 * )
+ NEW met2 ( 606970 2339370 ) ( * 2340900 )
+ NEW met2 ( 1370110 1742670 ) ( * 2339370 )
+ NEW met2 ( 1532490 1699660 ) ( 1534330 * 0 )
+ NEW met2 ( 1532490 1699660 ) ( * 1742670 )
+ NEW met1 ( 606970 2339370 ) ( 1370110 * )
+ NEW met1 ( 1370110 1742670 ) ( 1532490 * )
+ NEW met2 ( 606970 2340900 ) M2M3_PR_M
+ NEW met1 ( 606970 2339370 ) M1M2_PR
+ NEW met1 ( 1370110 1742670 ) M1M2_PR
+ NEW met1 ( 1370110 2339370 ) M1M2_PR
+ NEW met1 ( 1532490 1742670 ) M1M2_PR ;
+ - core0_to_mem_address\[7\] ( core0 mem_addr_out[7] ) ( chip_controller addr_in[7] ) + USE SIGNAL
+ + ROUTED met2 ( 250010 2699940 ) ( 250930 * 0 )
+ NEW met2 ( 1504430 187850 ) ( * 200260 0 )
+ NEW met1 ( 1114350 187850 ) ( 1504430 * )
+ NEW met2 ( 250010 2699940 ) ( * 2742270 )
+ NEW met1 ( 250010 2742270 ) ( 1114350 * )
+ NEW met2 ( 1114350 187850 ) ( * 2742270 )
+ NEW met1 ( 1114350 187850 ) M1M2_PR
+ NEW met1 ( 1504430 187850 ) M1M2_PR
+ NEW met1 ( 250010 2742270 ) M1M2_PR
+ NEW met1 ( 1114350 2742270 ) M1M2_PR ;
+ - core0_to_mem_address\[8\] ( core0 mem_addr_out[8] ) ( chip_controller addr_in[8] ) + USE SIGNAL
+ + ROUTED met2 ( 1267530 205700 ) ( * 2716260 )
+ NEW met3 ( 2799100 330140 0 ) ( 2809450 * )
+ NEW met2 ( 2809450 205700 ) ( * 330140 )
+ NEW met2 ( 257830 2699260 0 ) ( 259210 * )
+ NEW met2 ( 259210 2699260 ) ( * 2716260 )
+ NEW met3 ( 1267530 205700 ) ( 2809450 * )
+ NEW met3 ( 259210 2716260 ) ( 1267530 * )
+ NEW met2 ( 1267530 205700 ) M2M3_PR_M
+ NEW met2 ( 1267530 2716260 ) M2M3_PR_M
+ NEW met2 ( 2809450 205700 ) M2M3_PR_M
+ NEW met2 ( 2809450 330140 ) M2M3_PR_M
+ NEW met2 ( 259210 2716260 ) M2M3_PR_M ;
+ - core0_to_mem_address\[9\] ( core0 mem_addr_out[9] ) ( chip_controller addr_in[9] ) + USE SIGNAL
+ + ROUTED met3 ( 187220 2354500 ) ( 201020 * )
+ NEW met3 ( 201020 2354500 ) ( * 2355180 0 )
+ NEW met3 ( 2799100 364820 0 ) ( 2802550 * )
+ NEW met3 ( 187220 1806420 ) ( 2802550 * )
+ NEW met4 ( 187220 1806420 ) ( * 2354500 )
+ NEW met2 ( 2802550 364820 ) ( * 1806420 )
+ NEW met3 ( 187220 1806420 ) M3M4_PR_M
+ NEW met3 ( 187220 2354500 ) M3M4_PR_M
+ NEW met2 ( 2802550 364820 ) M2M3_PR_M
+ NEW met2 ( 2802550 1806420 ) M2M3_PR_M ;
+ - core0_to_mem_data\[0\] ( core0 mem_data_out[0] ) ( chip_controller wr_data[0] ) + USE SIGNAL
+ + ROUTED met2 ( 207690 2699260 0 ) ( 208610 * )
+ NEW met2 ( 208610 2699260 ) ( * 2727650 )
+ NEW met2 ( 1337450 192610 ) ( * 200260 0 )
+ NEW met1 ( 1295130 192610 ) ( 1337450 * )
+ NEW met1 ( 208610 2727650 ) ( 1295130 * )
+ NEW met2 ( 1295130 192610 ) ( * 2727650 )
+ NEW met1 ( 208610 2727650 ) M1M2_PR
+ NEW met1 ( 1337450 192610 ) M1M2_PR
+ NEW met1 ( 1295130 192610 ) M1M2_PR
+ NEW met1 ( 1295130 2727650 ) M1M2_PR ;
+ - core0_to_mem_data\[100\] ( core0 mem_data_out[100] ) ( chip_controller wr_data[100] ) + USE SIGNAL
+ + ROUTED li1 ( 572930 2699430 ) ( * 2701810 )
+ NEW met2 ( 708630 1428170 ) ( * 2701810 )
+ NEW met2 ( 1283630 1425620 ) ( * 1428170 )
+ NEW met1 ( 562350 2699430 ) ( * 2700110 )
+ NEW met1 ( 547630 2700110 ) ( 562350 * )
+ NEW met2 ( 547630 2699260 ) ( * 2700110 )
+ NEW met2 ( 546710 2699260 0 ) ( 547630 * )
+ NEW met1 ( 562350 2699430 ) ( 572930 * )
+ NEW met1 ( 708630 1428170 ) ( 1283630 * )
+ NEW met3 ( 1283630 1425620 ) ( 1300420 * 0 )
+ NEW met1 ( 572930 2701810 ) ( 708630 * )
+ NEW li1 ( 572930 2699430 ) L1M1_PR_MR
+ NEW li1 ( 572930 2701810 ) L1M1_PR_MR
+ NEW met1 ( 708630 2701810 ) M1M2_PR
+ NEW met1 ( 708630 1428170 ) M1M2_PR
+ NEW met1 ( 1283630 1428170 ) M1M2_PR
+ NEW met2 ( 1283630 1425620 ) M2M3_PR_M
+ NEW met1 ( 547630 2700110 ) M1M2_PR ;
+ - core0_to_mem_data\[101\] ( core0 mem_data_out[101] ) ( chip_controller wr_data[101] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 1460980 ) ( * 1462510 )
+ NEW met2 ( 552230 2699260 0 ) ( 553150 * )
+ NEW met2 ( 553150 2699260 ) ( * 2718810 )
+ NEW met1 ( 553150 2718810 ) ( 652970 * )
+ NEW met1 ( 652970 1462510 ) ( 1283630 * )
+ NEW met3 ( 1283630 1460980 ) ( 1300420 * 0 )
+ NEW met2 ( 652970 1462510 ) ( * 2718810 )
+ NEW met1 ( 1283630 1462510 ) M1M2_PR
+ NEW met2 ( 1283630 1460980 ) M2M3_PR_M
+ NEW met1 ( 553150 2718810 ) M1M2_PR
+ NEW met1 ( 652970 1462510 ) M1M2_PR
+ NEW met1 ( 652970 2718810 ) M1M2_PR ;
+ - core0_to_mem_data\[102\] ( core0 mem_data_out[102] ) ( chip_controller wr_data[102] ) + USE SIGNAL
+ + ROUTED met1 ( 610190 2618510 ) ( 612030 * )
+ NEW met3 ( 2799100 1446700 0 ) ( 2807150 * )
+ NEW met3 ( 599380 2651660 0 ) ( 610190 * )
+ NEW met2 ( 610190 2618510 ) ( * 2651660 )
+ NEW met2 ( 2807150 1446700 ) ( * 1702210 )
+ NEW met1 ( 612030 1702210 ) ( 2807150 * )
+ NEW met2 ( 612030 1702210 ) ( * 2618510 )
+ NEW met1 ( 610190 2618510 ) M1M2_PR
+ NEW met1 ( 612030 2618510 ) M1M2_PR
+ NEW met2 ( 2807150 1446700 ) M2M3_PR_M
+ NEW met1 ( 612030 1702210 ) M1M2_PR
+ NEW met2 ( 610190 2651660 ) M2M3_PR_M
+ NEW met1 ( 2807150 1702210 ) M1M2_PR ;
+ - core0_to_mem_data\[103\] ( core0 mem_data_out[103] ) ( chip_controller wr_data[103] ) + USE SIGNAL
+ + ROUTED met2 ( 186990 2622930 ) ( * 2627180 )
+ NEW met3 ( 186990 2627180 ) ( 201020 * )
+ NEW met3 ( 201020 2627180 ) ( * 2627860 0 )
+ NEW met2 ( 126730 1798770 ) ( * 2622930 )
+ NEW met2 ( 2601530 1699660 ) ( 2602910 * 0 )
+ NEW met2 ( 2601530 1699660 ) ( * 1798770 )
+ NEW met1 ( 126730 2622930 ) ( 186990 * )
+ NEW met1 ( 126730 1798770 ) ( 2601530 * )
+ NEW met1 ( 126730 2622930 ) M1M2_PR
+ NEW met1 ( 186990 2622930 ) M1M2_PR
+ NEW met2 ( 186990 2627180 ) M2M3_PR_M
+ NEW met1 ( 126730 1798770 ) M1M2_PR
+ NEW met1 ( 2601530 1798770 ) M1M2_PR ;
+ - core0_to_mem_data\[104\] ( core0 mem_data_out[104] ) ( chip_controller wr_data[104] ) + USE SIGNAL
+ + ROUTED met2 ( 2621770 1699660 0 ) ( * 1721930 )
+ NEW met2 ( 556830 2300100 0 ) ( 557750 * )
+ NEW met2 ( 557750 1721930 ) ( * 2300100 )
+ NEW met1 ( 557750 1721930 ) ( 2621770 * )
+ NEW met1 ( 2621770 1721930 ) M1M2_PR
+ NEW met1 ( 557750 1721930 ) M1M2_PR ;
+ - core0_to_mem_data\[105\] ( core0 mem_data_out[105] ) ( chip_controller wr_data[105] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 1499060 0 ) ( * 1501780 )
+ NEW met3 ( 2799100 1501780 ) ( 2799330 * )
+ NEW met2 ( 2799330 1501780 ) ( * 1709350 )
+ NEW met2 ( 563270 2278340 ) ( 564650 * )
+ NEW met2 ( 563270 2278340 ) ( * 2300100 )
+ NEW met2 ( 561890 2300100 0 ) ( 563270 * )
+ NEW met2 ( 564650 1709350 ) ( * 2278340 )
+ NEW met1 ( 564650 1709350 ) ( 2799330 * )
+ NEW met2 ( 2799330 1501780 ) M2M3_PR_M
+ NEW met1 ( 2799330 1709350 ) M1M2_PR
+ NEW met1 ( 564650 1709350 ) M1M2_PR ;
+ - core0_to_mem_data\[106\] ( core0 mem_data_out[106] ) ( chip_controller wr_data[106] ) + USE SIGNAL
+ + ROUTED met3 ( 190670 2636020 ) ( 201020 * )
+ NEW met3 ( 201020 2636020 ) ( * 2636700 0 )
+ NEW met2 ( 1283630 1478660 ) ( * 1483250 )
+ NEW met2 ( 108790 1483250 ) ( * 2583830 )
+ NEW met2 ( 190670 2583830 ) ( * 2636020 )
+ NEW met1 ( 108790 1483250 ) ( 1283630 * )
+ NEW met3 ( 1283630 1478660 ) ( 1300420 * 0 )
+ NEW met1 ( 108790 2583830 ) ( 190670 * )
+ NEW met1 ( 108790 1483250 ) M1M2_PR
+ NEW met2 ( 190670 2636020 ) M2M3_PR_M
+ NEW met1 ( 1283630 1483250 ) M1M2_PR
+ NEW met2 ( 1283630 1478660 ) M2M3_PR_M
+ NEW met1 ( 108790 2583830 ) M1M2_PR
+ NEW met1 ( 190670 2583830 ) M1M2_PR ;
+ - core0_to_mem_data\[107\] ( core0 mem_data_out[107] ) ( chip_controller wr_data[107] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2659140 0 ) ( 608810 * )
+ NEW met2 ( 608810 2656590 ) ( * 2659140 )
+ NEW met2 ( 1446010 1729070 ) ( * 2656590 )
+ NEW met1 ( 1446010 1729070 ) ( 2659030 * )
+ NEW met1 ( 608810 2656590 ) ( 1446010 * )
+ NEW met2 ( 2659030 1699660 0 ) ( * 1729070 )
+ NEW met1 ( 1446010 1729070 ) M1M2_PR
+ NEW met2 ( 608810 2659140 ) M2M3_PR_M
+ NEW met1 ( 608810 2656590 ) M1M2_PR
+ NEW met1 ( 1446010 2656590 ) M1M2_PR
+ NEW met1 ( 2659030 1729070 ) M1M2_PR ;
+ - core0_to_mem_data\[108\] ( core0 mem_data_out[108] ) ( chip_controller wr_data[108] ) + USE SIGNAL
+ + ROUTED li1 ( 561430 2696710 ) ( * 2699430 )
+ NEW met2 ( 561430 2699260 ) ( * 2699430 )
+ NEW met2 ( 560970 2699260 0 ) ( 561430 * )
+ NEW met2 ( 1411510 1715470 ) ( * 2696710 )
+ NEW met2 ( 2677890 1699660 0 ) ( * 1715470 )
+ NEW met1 ( 1411510 1715470 ) ( 2677890 * )
+ NEW met1 ( 561430 2696710 ) ( 1411510 * )
+ NEW li1 ( 561430 2696710 ) L1M1_PR_MR
+ NEW li1 ( 561430 2699430 ) L1M1_PR_MR
+ NEW met1 ( 561430 2699430 ) M1M2_PR
+ NEW met1 ( 1411510 2696710 ) M1M2_PR
+ NEW met1 ( 1411510 1715470 ) M1M2_PR
+ NEW met1 ( 2677890 1715470 ) M1M2_PR
+ NEW met1 ( 561430 2699430 ) RECT ( -355 -70 0 70 ) ;
+ - core0_to_mem_data\[109\] ( core0 mem_data_out[109] ) ( chip_controller wr_data[109] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2665940 0 ) ( 607890 * )
+ NEW met2 ( 607890 2664070 ) ( * 2665940 )
+ NEW met2 ( 1183350 195670 ) ( * 2664070 )
+ NEW met2 ( 2670990 195670 ) ( * 200260 0 )
+ NEW met1 ( 1183350 195670 ) ( 2670990 * )
+ NEW met1 ( 607890 2664070 ) ( 1183350 * )
+ NEW met1 ( 1183350 195670 ) M1M2_PR
+ NEW met2 ( 607890 2665940 ) M2M3_PR_M
+ NEW met1 ( 607890 2664070 ) M1M2_PR
+ NEW met1 ( 1183350 2664070 ) M1M2_PR
+ NEW met1 ( 2670990 195670 ) M1M2_PR ;
+ - core0_to_mem_data\[10\] ( core0 mem_data_out[10] ) ( chip_controller wr_data[10] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 382500 0 ) ( 2808990 * )
+ NEW met2 ( 2808990 382500 ) ( * 383010 )
+ NEW met1 ( 2808990 383010 ) ( 2822790 * )
+ NEW met3 ( 188140 2368100 ) ( 200100 * )
+ NEW met3 ( 200100 2367420 0 ) ( * 2368100 )
+ NEW met2 ( 2822790 383010 ) ( * 1805740 )
+ NEW met3 ( 188140 1805740 ) ( 2822790 * )
+ NEW met4 ( 188140 1805740 ) ( * 2368100 )
+ NEW met2 ( 2808990 382500 ) M2M3_PR_M
+ NEW met1 ( 2808990 383010 ) M1M2_PR
+ NEW met1 ( 2822790 383010 ) M1M2_PR
+ NEW met3 ( 188140 1805740 ) M3M4_PR_M
+ NEW met3 ( 188140 2368100 ) M3M4_PR_M
+ NEW met2 ( 2822790 1805740 ) M2M3_PR_M ;
+ - core0_to_mem_data\[110\] ( core0 mem_data_out[110] ) ( chip_controller wr_data[110] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 1533740 0 ) ( * 1536460 )
+ NEW met3 ( 2799100 1536460 ) ( 2800250 * )
+ NEW met3 ( 599380 2668660 0 ) ( 608810 * )
+ NEW met2 ( 608810 2663730 ) ( * 2668660 )
+ NEW met2 ( 2800250 1536460 ) ( * 1700170 )
+ NEW met1 ( 608810 2663730 ) ( 1497990 * )
+ NEW met2 ( 1497990 1700170 ) ( * 2663730 )
+ NEW met1 ( 1497990 1700170 ) ( 2800250 * )
+ NEW met2 ( 2800250 1536460 ) M2M3_PR_M
+ NEW met2 ( 608810 2668660 ) M2M3_PR_M
+ NEW met1 ( 608810 2663730 ) M1M2_PR
+ NEW met1 ( 2800250 1700170 ) M1M2_PR
+ NEW met1 ( 1497990 1700170 ) M1M2_PR
+ NEW met1 ( 1497990 2663730 ) M1M2_PR ;
+ - core0_to_mem_data\[111\] ( core0 mem_data_out[111] ) ( chip_controller wr_data[111] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 1551420 0 ) ( 2800710 * )
+ NEW met2 ( 2800710 1551420 ) ( * 1699830 )
+ NEW met2 ( 1498450 1699830 ) ( * 2670530 )
+ NEW met1 ( 1498450 1699830 ) ( 2800710 * )
+ NEW met3 ( 599380 2672060 0 ) ( 612950 * )
+ NEW met2 ( 612950 2670530 ) ( * 2672060 )
+ NEW met1 ( 612950 2670530 ) ( 1498450 * )
+ NEW met2 ( 2800710 1551420 ) M2M3_PR_M
+ NEW met1 ( 2800710 1699830 ) M1M2_PR
+ NEW met1 ( 1498450 1699830 ) M1M2_PR
+ NEW met1 ( 1498450 2670530 ) M1M2_PR
+ NEW met2 ( 612950 2672060 ) M2M3_PR_M
+ NEW met1 ( 612950 2670530 ) M1M2_PR ;
+ - core0_to_mem_data\[112\] ( core0 mem_data_out[112] ) ( chip_controller wr_data[112] ) + USE SIGNAL
+ + ROUTED met1 ( 190210 2686170 ) ( 192510 * )
+ NEW met2 ( 192510 2656420 ) ( * 2686170 )
+ NEW met3 ( 192510 2656420 ) ( 199870 * )
+ NEW met3 ( 199870 2656420 ) ( * 2657100 )
+ NEW met3 ( 199870 2657100 ) ( 200100 * )
+ NEW met3 ( 200100 2656420 0 ) ( * 2657100 )
+ NEW met2 ( 190210 2686170 ) ( * 2707590 )
+ NEW met2 ( 1283630 1514020 ) ( * 1517930 )
+ NEW met2 ( 722430 1517930 ) ( * 2707590 )
+ NEW met1 ( 722430 1517930 ) ( 1283630 * )
+ NEW met3 ( 1283630 1514020 ) ( 1300420 * 0 )
+ NEW met1 ( 190210 2707590 ) ( 722430 * )
+ NEW met1 ( 190210 2707590 ) M1M2_PR
+ NEW met1 ( 190210 2686170 ) M1M2_PR
+ NEW met1 ( 192510 2686170 ) M1M2_PR
+ NEW met2 ( 192510 2656420 ) M2M3_PR_M
+ NEW met1 ( 1283630 1517930 ) M1M2_PR
+ NEW met2 ( 1283630 1514020 ) M2M3_PR_M
+ NEW met1 ( 722430 2707590 ) M1M2_PR
+ NEW met1 ( 722430 1517930 ) M1M2_PR ;
+ - core0_to_mem_data\[113\] ( core0 mem_data_out[113] ) ( chip_controller wr_data[113] ) + USE SIGNAL
+ + ROUTED met2 ( 189290 2657270 ) ( * 2662540 )
+ NEW met3 ( 189290 2662540 ) ( 200100 * )
+ NEW met3 ( 200100 2661860 0 ) ( * 2662540 )
+ NEW met2 ( 2713770 1699660 ) ( 2715610 * 0 )
+ NEW met2 ( 2713770 1699660 ) ( * 1798430 )
+ NEW met1 ( 175490 2657270 ) ( 189290 * )
+ NEW met1 ( 175490 1798430 ) ( 2713770 * )
+ NEW met2 ( 175490 1798430 ) ( * 2657270 )
+ NEW met1 ( 189290 2657270 ) M1M2_PR
+ NEW met2 ( 189290 2662540 ) M2M3_PR_M
+ NEW met1 ( 2713770 1798430 ) M1M2_PR
+ NEW met1 ( 175490 1798430 ) M1M2_PR
+ NEW met1 ( 175490 2657270 ) M1M2_PR ;
+ - core0_to_mem_data\[114\] ( core0 mem_data_out[114] ) ( chip_controller wr_data[114] ) + USE SIGNAL
+ + ROUTED met2 ( 2701350 185130 ) ( * 200260 0 )
+ NEW met2 ( 1156670 185130 ) ( * 2671210 )
+ NEW met1 ( 1156670 185130 ) ( 2701350 * )
+ NEW met3 ( 599380 2674780 0 ) ( 613410 * )
+ NEW met2 ( 613410 2671210 ) ( * 2674780 )
+ NEW met1 ( 613410 2671210 ) ( 1156670 * )
+ NEW met1 ( 1156670 185130 ) M1M2_PR
+ NEW met1 ( 2701350 185130 ) M1M2_PR
+ NEW met1 ( 1156670 2671210 ) M1M2_PR
+ NEW met2 ( 613410 2674780 ) M2M3_PR_M
+ NEW met1 ( 613410 2671210 ) M1M2_PR ;
+ - core0_to_mem_data\[115\] ( core0 mem_data_out[115] ) ( chip_controller wr_data[115] ) + USE SIGNAL
+ + ROUTED met1 ( 577990 2284290 ) ( 578910 * )
+ NEW met2 ( 578910 2284290 ) ( * 2300100 0 )
+ NEW met2 ( 577990 1721590 ) ( * 2284290 )
+ NEW met2 ( 2771730 1699660 0 ) ( * 1721590 )
+ NEW met1 ( 577990 1721590 ) ( 2771730 * )
+ NEW met1 ( 577990 1721590 ) M1M2_PR
+ NEW met1 ( 577990 2284290 ) M1M2_PR
+ NEW met1 ( 578910 2284290 ) M1M2_PR
+ NEW met1 ( 2771730 1721590 ) M1M2_PR ;
+ - core0_to_mem_data\[116\] ( core0 mem_data_out[116] ) ( chip_controller wr_data[116] ) + USE SIGNAL
+ + ROUTED met3 ( 198030 2670020 ) ( 200100 * )
+ NEW met3 ( 200100 2669340 0 ) ( * 2670020 )
+ NEW met2 ( 198030 2670020 ) ( * 2699770 )
+ NEW met2 ( 984630 1531530 ) ( * 2699770 )
+ NEW met2 ( 1283630 1531530 ) ( * 1531700 )
+ NEW li1 ( 561890 2699770 ) ( 562810 * )
+ NEW met1 ( 198030 2699770 ) ( 561890 * )
+ NEW met1 ( 984630 1531530 ) ( 1283630 * )
+ NEW met3 ( 1283630 1531700 ) ( 1300420 * 0 )
+ NEW met1 ( 562810 2699770 ) ( 984630 * )
+ NEW met1 ( 198030 2699770 ) M1M2_PR
+ NEW met1 ( 984630 2699770 ) M1M2_PR
+ NEW met2 ( 198030 2670020 ) M2M3_PR_M
+ NEW met1 ( 984630 1531530 ) M1M2_PR
+ NEW met1 ( 1283630 1531530 ) M1M2_PR
+ NEW met2 ( 1283630 1531700 ) M2M3_PR_M
+ NEW li1 ( 561890 2699770 ) L1M1_PR_MR
+ NEW li1 ( 562810 2699770 ) L1M1_PR_MR ;
+ - core0_to_mem_data\[117\] ( core0 mem_data_out[117] ) ( chip_controller wr_data[117] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 1549380 ) ( * 1552270 )
+ NEW met2 ( 583970 2300100 0 ) ( 585350 * )
+ NEW met2 ( 585350 1552270 ) ( * 2300100 )
+ NEW met1 ( 585350 1552270 ) ( 1283630 * )
+ NEW met3 ( 1283630 1549380 ) ( 1300420 * 0 )
+ NEW met1 ( 585350 1552270 ) M1M2_PR
+ NEW met1 ( 1283630 1552270 ) M1M2_PR
+ NEW met2 ( 1283630 1549380 ) M2M3_PR_M ;
+ - core0_to_mem_data\[118\] ( core0 mem_data_out[118] ) ( chip_controller wr_data[118] ) + USE SIGNAL
+ + ROUTED met2 ( 592250 1791630 ) ( * 2256300 )
+ NEW met2 ( 591330 2256300 ) ( 592250 * )
+ NEW met2 ( 591330 2256300 ) ( * 2284290 )
+ NEW met1 ( 587190 2284290 ) ( 591330 * )
+ NEW met2 ( 587190 2284290 ) ( * 2300100 0 )
+ NEW met3 ( 2799100 1620780 0 ) ( 2807610 * )
+ NEW met2 ( 2807610 1620780 ) ( * 1791630 )
+ NEW met1 ( 592250 1791630 ) ( 2807610 * )
+ NEW met1 ( 592250 1791630 ) M1M2_PR
+ NEW met1 ( 591330 2284290 ) M1M2_PR
+ NEW met1 ( 587190 2284290 ) M1M2_PR
+ NEW met2 ( 2807610 1620780 ) M2M3_PR_M
+ NEW met1 ( 2807610 1791630 ) M1M2_PR ;
+ - core0_to_mem_data\[119\] ( core0 mem_data_out[119] ) ( chip_controller wr_data[119] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 1567060 ) ( * 1573010 )
+ NEW met2 ( 599150 1573010 ) ( * 2256300 )
+ NEW met2 ( 598230 2256300 ) ( 599150 * )
+ NEW met2 ( 598230 2256300 ) ( * 2288030 )
+ NEW met1 ( 594090 2288030 ) ( 598230 * )
+ NEW met2 ( 594090 2288030 ) ( * 2300100 0 )
+ NEW met1 ( 599150 1573010 ) ( 1283630 * )
+ NEW met3 ( 1283630 1567060 ) ( 1300420 * 0 )
+ NEW met1 ( 599150 1573010 ) M1M2_PR
+ NEW met1 ( 1283630 1573010 ) M1M2_PR
+ NEW met2 ( 1283630 1567060 ) M2M3_PR_M
+ NEW met1 ( 598230 2288030 ) M1M2_PR
+ NEW met1 ( 594090 2288030 ) M1M2_PR ;
+ - core0_to_mem_data\[11\] ( core0 mem_data_out[11] ) ( chip_controller wr_data[11] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2372860 0 ) ( 607430 * )
+ NEW met2 ( 607430 2372010 ) ( * 2372860 )
+ NEW met1 ( 607430 2372010 ) ( 607890 * )
+ NEW li1 ( 607890 2367250 ) ( * 2372010 )
+ NEW met2 ( 1283630 543660 ) ( * 544850 )
+ NEW met1 ( 607890 2367250 ) ( 1135510 * )
+ NEW met2 ( 1135510 544850 ) ( * 2367250 )
+ NEW met1 ( 1135510 544850 ) ( 1283630 * )
+ NEW met3 ( 1283630 543660 ) ( 1300420 * 0 )
+ NEW met2 ( 607430 2372860 ) M2M3_PR_M
+ NEW met1 ( 607430 2372010 ) M1M2_PR
+ NEW li1 ( 607890 2372010 ) L1M1_PR_MR
+ NEW li1 ( 607890 2367250 ) L1M1_PR_MR
+ NEW met1 ( 1283630 544850 ) M1M2_PR
+ NEW met2 ( 1283630 543660 ) M2M3_PR_M
+ NEW met1 ( 1135510 544850 ) M1M2_PR
+ NEW met1 ( 1135510 2367250 ) M1M2_PR ;
+ - core0_to_mem_data\[120\] ( core0 mem_data_out[120] ) ( chip_controller wr_data[120] ) + USE SIGNAL
+ + ROUTED met2 ( 95910 185980 ) ( * 2677330 )
+ NEW met2 ( 189290 2677330 ) ( * 2679540 )
+ NEW met3 ( 189290 2679540 ) ( 201020 * )
+ NEW met3 ( 201020 2679540 ) ( * 2680220 0 )
+ NEW met2 ( 2746890 185980 ) ( * 200260 0 )
+ NEW met3 ( 95910 185980 ) ( 2746890 * )
+ NEW met1 ( 95910 2677330 ) ( 189290 * )
+ NEW met2 ( 95910 185980 ) M2M3_PR_M
+ NEW met1 ( 95910 2677330 ) M1M2_PR
+ NEW met1 ( 189290 2677330 ) M1M2_PR
+ NEW met2 ( 189290 2679540 ) M2M3_PR_M
+ NEW met2 ( 2746890 185980 ) M2M3_PR_M ;
+ - core0_to_mem_data\[121\] ( core0 mem_data_out[121] ) ( chip_controller wr_data[121] ) + USE SIGNAL
+ + ROUTED met2 ( 991530 1607690 ) ( * 2684810 )
+ NEW met2 ( 1283630 1602420 ) ( * 1607690 )
+ NEW met1 ( 991530 1607690 ) ( 1283630 * )
+ NEW met3 ( 1283630 1602420 ) ( 1300420 * 0 )
+ NEW met3 ( 599380 2684300 0 ) ( 613870 * )
+ NEW met2 ( 613870 2684300 ) ( * 2684810 )
+ NEW met1 ( 613870 2684810 ) ( 991530 * )
+ NEW met1 ( 991530 1607690 ) M1M2_PR
+ NEW met1 ( 991530 2684810 ) M1M2_PR
+ NEW met1 ( 1283630 1607690 ) M1M2_PR
+ NEW met2 ( 1283630 1602420 ) M2M3_PR_M
+ NEW met2 ( 613870 2684300 ) M2M3_PR_M
+ NEW met1 ( 613870 2684810 ) M1M2_PR ;
+ - core0_to_mem_data\[122\] ( core0 mem_data_out[122] ) ( chip_controller wr_data[122] ) + USE SIGNAL
+ + ROUTED li1 ( 589490 2696030 ) ( * 2699430 )
+ NEW met2 ( 589490 2699260 ) ( * 2699430 )
+ NEW met2 ( 588570 2699260 0 ) ( 589490 * )
+ NEW met2 ( 804310 191420 ) ( * 2691270 )
+ NEW met2 ( 2762070 191420 ) ( * 200260 0 )
+ NEW met3 ( 804310 191420 ) ( 2762070 * )
+ NEW li1 ( 612950 2691270 ) ( * 2696030 )
+ NEW met1 ( 589490 2696030 ) ( 612950 * )
+ NEW met1 ( 612950 2691270 ) ( 804310 * )
+ NEW li1 ( 589490 2696030 ) L1M1_PR_MR
+ NEW li1 ( 589490 2699430 ) L1M1_PR_MR
+ NEW met1 ( 589490 2699430 ) M1M2_PR
+ NEW met2 ( 804310 191420 ) M2M3_PR_M
+ NEW met1 ( 804310 2691270 ) M1M2_PR
+ NEW met2 ( 2762070 191420 ) M2M3_PR_M
+ NEW li1 ( 612950 2696030 ) L1M1_PR_MR
+ NEW li1 ( 612950 2691270 ) L1M1_PR_MR
+ NEW met1 ( 589490 2699430 ) RECT ( -355 -70 0 70 ) ;
+ - core0_to_mem_data\[123\] ( core0 mem_data_out[123] ) ( chip_controller wr_data[123] ) + USE SIGNAL
+ + ROUTED met2 ( 1176910 178670 ) ( * 2684130 )
+ NEW met2 ( 2774030 200260 ) ( 2777250 * 0 )
+ NEW met1 ( 1176910 178670 ) ( 2774030 * )
+ NEW met2 ( 2774030 178670 ) ( * 200260 )
+ NEW met3 ( 599380 2686340 0 ) ( 613410 * )
+ NEW met2 ( 613410 2684130 ) ( * 2686340 )
+ NEW met1 ( 613410 2684130 ) ( 1176910 * )
+ NEW met1 ( 1176910 178670 ) M1M2_PR
+ NEW met1 ( 1176910 2684130 ) M1M2_PR
+ NEW met1 ( 2774030 178670 ) M1M2_PR
+ NEW met2 ( 613410 2686340 ) M2M3_PR_M
+ NEW met1 ( 613410 2684130 ) M1M2_PR ;
+ - core0_to_mem_data\[124\] ( core0 mem_data_out[124] ) ( chip_controller wr_data[124] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 1656140 0 ) ( 2801170 * )
+ NEW met2 ( 609730 2666620 ) ( 610650 * )
+ NEW met2 ( 610650 2642700 ) ( * 2666620 )
+ NEW met2 ( 610650 2642700 ) ( 611110 * )
+ NEW met2 ( 2801170 1656140 ) ( * 1702550 )
+ NEW met1 ( 611110 1702550 ) ( 2801170 * )
+ NEW met3 ( 599380 2691100 0 ) ( 609730 * )
+ NEW met2 ( 609730 2666620 ) ( * 2691100 )
+ NEW met2 ( 611110 1702550 ) ( * 2642700 )
+ NEW met2 ( 2801170 1656140 ) M2M3_PR_M
+ NEW met1 ( 611110 1702550 ) M1M2_PR
+ NEW met1 ( 2801170 1702550 ) M1M2_PR
+ NEW met2 ( 609730 2691100 ) M2M3_PR_M ;
+ - core0_to_mem_data\[125\] ( core0 mem_data_out[125] ) ( chip_controller wr_data[125] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 1637780 ) ( * 1642030 )
+ NEW met1 ( 922530 1642030 ) ( 1283630 * )
+ NEW met3 ( 1283630 1637780 ) ( 1300420 * 0 )
+ NEW met2 ( 922530 1642030 ) ( * 2680390 )
+ NEW met3 ( 599380 2693820 0 ) ( 612950 * )
+ NEW met2 ( 612950 2680390 ) ( * 2693820 )
+ NEW met1 ( 612950 2680390 ) ( 922530 * )
+ NEW met1 ( 1283630 1642030 ) M1M2_PR
+ NEW met2 ( 1283630 1637780 ) M2M3_PR_M
+ NEW met1 ( 922530 1642030 ) M1M2_PR
+ NEW met1 ( 922530 2680390 ) M1M2_PR
+ NEW met2 ( 612950 2693820 ) M2M3_PR_M
+ NEW met1 ( 612950 2680390 ) M1M2_PR ;
+ - core0_to_mem_data\[126\] ( core0 mem_data_out[126] ) ( chip_controller wr_data[126] ) + USE SIGNAL
+ + ROUTED met2 ( 1459810 1821600 ) ( 1460270 * )
+ NEW met2 ( 1460270 1697110 ) ( * 1821600 )
+ NEW met2 ( 1459810 1821600 ) ( * 2687530 )
+ NEW met2 ( 2795190 1693540 ) ( * 1697110 )
+ NEW met3 ( 2795190 1693540 ) ( 2796340 * )
+ NEW met3 ( 2796340 1690820 0 ) ( * 1693540 )
+ NEW met1 ( 1460270 1697110 ) ( 2795190 * )
+ NEW met3 ( 599380 2698580 0 ) ( 612490 * )
+ NEW met2 ( 612490 2687530 ) ( * 2698580 )
+ NEW met1 ( 612490 2687530 ) ( 1459810 * )
+ NEW met1 ( 1460270 1697110 ) M1M2_PR
+ NEW met1 ( 1459810 2687530 ) M1M2_PR
+ NEW met1 ( 2795190 1697110 ) M1M2_PR
+ NEW met2 ( 2795190 1693540 ) M2M3_PR_M
+ NEW met2 ( 612490 2698580 ) M2M3_PR_M
+ NEW met1 ( 612490 2687530 ) M1M2_PR ;
+ - core0_to_mem_data\[127\] ( core0 mem_data_out[127] ) ( chip_controller wr_data[127] ) + USE SIGNAL
+ + ROUTED met2 ( 1170930 1697110 ) ( * 2692630 )
+ NEW met2 ( 1283630 1690820 ) ( * 1697110 )
+ NEW met1 ( 1170930 1697110 ) ( 1283630 * )
+ NEW met3 ( 1283630 1690820 ) ( 1300420 * 0 )
+ NEW met2 ( 600070 2692630 ) ( * 2696540 )
+ NEW met2 ( 599150 2696540 0 ) ( 600070 * )
+ NEW met1 ( 600070 2692630 ) ( 1170930 * )
+ NEW met1 ( 1170930 2692630 ) M1M2_PR
+ NEW met1 ( 1170930 1697110 ) M1M2_PR
+ NEW met1 ( 1283630 1697110 ) M1M2_PR
+ NEW met2 ( 1283630 1690820 ) M2M3_PR_M
+ NEW met1 ( 600070 2692630 ) M1M2_PR ;
+ - core0_to_mem_data\[12\] ( core0 mem_data_out[12] ) ( chip_controller wr_data[12] ) + USE SIGNAL
+ + ROUTED met2 ( 303370 1724650 ) ( * 2256300 )
+ NEW met2 ( 302450 2256300 ) ( 303370 * )
+ NEW met2 ( 302450 2256300 ) ( * 2300100 )
+ NEW met2 ( 301530 2300100 0 ) ( 302450 * )
+ NEW met2 ( 1665430 1699660 0 ) ( * 1724650 )
+ NEW met1 ( 303370 1724650 ) ( 1665430 * )
+ NEW met1 ( 303370 1724650 ) M1M2_PR
+ NEW met1 ( 1665430 1724650 ) M1M2_PR ;
+ - core0_to_mem_data\[13\] ( core0 mem_data_out[13] ) ( chip_controller wr_data[13] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 469540 0 ) ( 2814970 * )
+ NEW met2 ( 2814970 469540 ) ( 2815430 * )
+ NEW met2 ( 309810 2300100 0 ) ( 310270 * )
+ NEW met2 ( 310270 1707650 ) ( * 2300100 )
+ NEW met2 ( 2815430 469540 ) ( * 1707650 )
+ NEW met1 ( 310270 1707650 ) ( 2815430 * )
+ NEW met2 ( 2814970 469540 ) M2M3_PR_M
+ NEW met1 ( 310270 1707650 ) M1M2_PR
+ NEW met1 ( 2815430 1707650 ) M1M2_PR ;
+ - core0_to_mem_data\[14\] ( core0 mem_data_out[14] ) ( chip_controller wr_data[14] ) + USE SIGNAL
+ + ROUTED met2 ( 302910 2699940 ) ( 303370 * 0 )
+ NEW met2 ( 302910 2699940 ) ( * 2735130 )
+ NEW met2 ( 1640590 188870 ) ( * 200260 0 )
+ NEW met2 ( 1080310 188870 ) ( * 2735130 )
+ NEW met1 ( 302910 2735130 ) ( 1080310 * )
+ NEW met1 ( 1080310 188870 ) ( 1640590 * )
+ NEW met1 ( 302910 2735130 ) M1M2_PR
+ NEW met1 ( 1080310 188870 ) M1M2_PR
+ NEW met1 ( 1080310 2735130 ) M1M2_PR
+ NEW met1 ( 1640590 188870 ) M1M2_PR ;
+ - core0_to_mem_data\[15\] ( core0 mem_data_out[15] ) ( chip_controller wr_data[15] ) + USE SIGNAL
+ + ROUTED met2 ( 316710 197370 ) ( * 2300100 0 )
+ NEW met2 ( 1686130 197370 ) ( * 200260 0 )
+ NEW met1 ( 316710 197370 ) ( 1686130 * )
+ NEW met1 ( 316710 197370 ) M1M2_PR
+ NEW met1 ( 1686130 197370 ) M1M2_PR ;
+ - core0_to_mem_data\[16\] ( core0 mem_data_out[16] ) ( chip_controller wr_data[16] ) + USE SIGNAL
+ + ROUTED met2 ( 1731670 197030 ) ( * 200260 0 )
+ NEW met2 ( 322690 2278340 ) ( 324070 * )
+ NEW met2 ( 322690 2278340 ) ( * 2300100 )
+ NEW met2 ( 321770 2300100 0 ) ( 322690 * )
+ NEW met2 ( 324070 197030 ) ( * 2278340 )
+ NEW met1 ( 324070 197030 ) ( 1731670 * )
+ NEW met1 ( 324070 197030 ) M1M2_PR
+ NEW met1 ( 1731670 197030 ) M1M2_PR ;
+ - core0_to_mem_data\[17\] ( core0 mem_data_out[17] ) ( chip_controller wr_data[17] ) + USE SIGNAL
+ + ROUTED met2 ( 323610 2699940 ) ( 324070 * 0 )
+ NEW met2 ( 323610 2699940 ) ( * 2715410 )
+ NEW met3 ( 2797260 487220 0 ) ( * 489260 )
+ NEW met2 ( 567410 2712010 ) ( * 2741590 )
+ NEW met4 ( 2794500 565800 ) ( 2797260 * )
+ NEW met4 ( 2797260 489260 ) ( * 565800 )
+ NEW li1 ( 348450 2715410 ) ( * 2716090 )
+ NEW met1 ( 323610 2715410 ) ( 348450 * )
+ NEW li1 ( 517730 2712010 ) ( * 2716090 )
+ NEW met1 ( 348450 2716090 ) ( 517730 * )
+ NEW met1 ( 517730 2712010 ) ( 567410 * )
+ NEW met1 ( 567410 2741590 ) ( 1502590 * )
+ NEW met2 ( 1502590 1701020 ) ( * 2741590 )
+ NEW met3 ( 1502590 1701020 ) ( 2794500 * )
+ NEW met4 ( 2794500 565800 ) ( * 1701020 )
+ NEW met1 ( 323610 2715410 ) M1M2_PR
+ NEW met1 ( 567410 2712010 ) M1M2_PR
+ NEW met3 ( 2797260 489260 ) M3M4_PR_M
+ NEW met1 ( 567410 2741590 ) M1M2_PR
+ NEW met3 ( 2794500 1701020 ) M3M4_PR_M
+ NEW li1 ( 348450 2715410 ) L1M1_PR_MR
+ NEW li1 ( 348450 2716090 ) L1M1_PR_MR
+ NEW li1 ( 517730 2716090 ) L1M1_PR_MR
+ NEW li1 ( 517730 2712010 ) L1M1_PR_MR
+ NEW met2 ( 1502590 1701020 ) M2M3_PR_M
+ NEW met1 ( 1502590 2741590 ) M1M2_PR ;
+ - core0_to_mem_data\[18\] ( core0 mem_data_out[18] ) ( chip_controller wr_data[18] ) + USE SIGNAL
+ + ROUTED met2 ( 190210 2429470 ) ( * 2429980 )
+ NEW met3 ( 190210 2429980 ) ( 200100 * )
+ NEW met3 ( 200100 2429300 0 ) ( * 2429980 )
+ NEW met2 ( 1285010 702100 ) ( * 1052130 )
+ NEW met1 ( 141910 2429470 ) ( 190210 * )
+ NEW met1 ( 141910 1052130 ) ( 1285010 * )
+ NEW met3 ( 1285010 702100 ) ( 1300420 * 0 )
+ NEW met2 ( 141910 1052130 ) ( * 2429470 )
+ NEW met1 ( 190210 2429470 ) M1M2_PR
+ NEW met2 ( 190210 2429980 ) M2M3_PR_M
+ NEW met2 ( 1285010 702100 ) M2M3_PR_M
+ NEW met1 ( 1285010 1052130 ) M1M2_PR
+ NEW met1 ( 141910 1052130 ) M1M2_PR
+ NEW met1 ( 141910 2429470 ) M1M2_PR ;
+ - core0_to_mem_data\[19\] ( core0 mem_data_out[19] ) ( chip_controller wr_data[19] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2423180 0 ) ( 607430 * )
+ NEW met2 ( 607430 2421990 ) ( * 2423180 )
+ NEW met2 ( 1439110 1786190 ) ( * 2421990 )
+ NEW met1 ( 607430 2421990 ) ( 1439110 * )
+ NEW met2 ( 1794690 1699660 ) ( 1796530 * 0 )
+ NEW met1 ( 1439110 1786190 ) ( 1794690 * )
+ NEW met2 ( 1794690 1699660 ) ( * 1786190 )
+ NEW met2 ( 607430 2423180 ) M2M3_PR_M
+ NEW met1 ( 607430 2421990 ) M1M2_PR
+ NEW met1 ( 1439110 2421990 ) M1M2_PR
+ NEW met1 ( 1439110 1786190 ) M1M2_PR
+ NEW met1 ( 1794690 1786190 ) M1M2_PR ;
+ - core0_to_mem_data\[1\] ( core0 mem_data_out[1] ) ( chip_controller wr_data[1] ) + USE SIGNAL
+ + ROUTED met3 ( 2797030 245820 ) ( 2797260 * )
+ NEW met3 ( 2797260 243100 0 ) ( * 245820 )
+ NEW met2 ( 2795190 372600 ) ( 2797030 * )
+ NEW met2 ( 2797030 245820 ) ( * 372600 )
+ NEW met2 ( 2795650 1692860 ) ( * 1701530 )
+ NEW met2 ( 2795190 1692860 ) ( 2795650 * )
+ NEW met1 ( 194810 1701530 ) ( 2795650 * )
+ NEW met1 ( 194810 2301290 ) ( 198030 * )
+ NEW met2 ( 198030 2301290 ) ( * 2319140 )
+ NEW met3 ( 198030 2319140 ) ( 200100 * )
+ NEW met3 ( 200100 2318460 0 ) ( * 2319140 )
+ NEW met2 ( 194810 1701530 ) ( * 2301290 )
+ NEW met2 ( 2795190 372600 ) ( * 1692860 )
+ NEW met1 ( 194810 1701530 ) M1M2_PR
+ NEW met2 ( 2797030 245820 ) M2M3_PR_M
+ NEW met1 ( 2795650 1701530 ) M1M2_PR
+ NEW met1 ( 194810 2301290 ) M1M2_PR
+ NEW met1 ( 198030 2301290 ) M1M2_PR
+ NEW met2 ( 198030 2319140 ) M2M3_PR_M ;
+ - core0_to_mem_data\[20\] ( core0 mem_data_out[20] ) ( chip_controller wr_data[20] ) + USE SIGNAL
+ + ROUTED met3 ( 2797260 576980 ) ( 2797490 * )
+ NEW met3 ( 2797260 574260 0 ) ( * 576980 )
+ NEW met2 ( 343850 2699940 ) ( 344770 * 0 )
+ NEW met2 ( 343850 2699940 ) ( * 2718470 )
+ NEW met1 ( 338330 2718470 ) ( 343850 * )
+ NEW met2 ( 338330 2718470 ) ( * 2739550 )
+ NEW met1 ( 338330 2739550 ) ( 1501670 * )
+ NEW met2 ( 1501670 1699490 ) ( * 2739550 )
+ NEW met1 ( 1501670 1699490 ) ( 2797490 * )
+ NEW met2 ( 2797490 576980 ) ( * 1699490 )
+ NEW met2 ( 2797490 576980 ) M2M3_PR_M
+ NEW met1 ( 2797490 1699490 ) M1M2_PR
+ NEW met1 ( 343850 2718470 ) M1M2_PR
+ NEW met1 ( 338330 2718470 ) M1M2_PR
+ NEW met1 ( 338330 2739550 ) M1M2_PR
+ NEW met1 ( 1501670 1699490 ) M1M2_PR
+ NEW met1 ( 1501670 2739550 ) M1M2_PR ;
+ - core0_to_mem_data\[21\] ( core0 mem_data_out[21] ) ( chip_controller wr_data[21] ) + USE SIGNAL
+ + ROUTED met1 ( 1432670 1735870 ) ( 1871510 * )
+ NEW met2 ( 1432670 1735870 ) ( * 2430150 )
+ NEW met2 ( 1871510 1699660 0 ) ( * 1735870 )
+ NEW met3 ( 599380 2431340 0 ) ( 608350 * )
+ NEW met2 ( 608350 2430150 ) ( * 2431340 )
+ NEW met1 ( 608350 2430150 ) ( 1432670 * )
+ NEW met1 ( 1432670 1735870 ) M1M2_PR
+ NEW met1 ( 1432670 2430150 ) M1M2_PR
+ NEW met1 ( 1871510 1735870 ) M1M2_PR
+ NEW met2 ( 608350 2431340 ) M2M3_PR_M
+ NEW met1 ( 608350 2430150 ) M1M2_PR ;
+ - core0_to_mem_data\[22\] ( core0 mem_data_out[22] ) ( chip_controller wr_data[22] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 755140 ) ( * 758710 )
+ NEW met1 ( 619390 758710 ) ( 1283630 * )
+ NEW met3 ( 1283630 755140 ) ( 1300420 * 0 )
+ NEW met3 ( 599380 2434060 0 ) ( 608350 * )
+ NEW met2 ( 608350 2433550 ) ( * 2434060 )
+ NEW met1 ( 608350 2433550 ) ( 619390 * )
+ NEW met2 ( 619390 758710 ) ( * 2433550 )
+ NEW met1 ( 1283630 758710 ) M1M2_PR
+ NEW met2 ( 1283630 755140 ) M2M3_PR_M
+ NEW met1 ( 619390 758710 ) M1M2_PR
+ NEW met2 ( 608350 2434060 ) M2M3_PR_M
+ NEW met1 ( 608350 2433550 ) M1M2_PR
+ NEW met1 ( 619390 2433550 ) M1M2_PR ;
+ - core0_to_mem_data\[23\] ( core0 mem_data_out[23] ) ( chip_controller wr_data[23] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 626620 0 ) ( 2804390 * )
+ NEW met2 ( 365930 2699260 0 ) ( 366390 * )
+ NEW met2 ( 366390 2699260 ) ( * 2740230 )
+ NEW met1 ( 366390 2740230 ) ( 1502130 * )
+ NEW met2 ( 1502130 1700510 ) ( * 2740230 )
+ NEW met1 ( 1502130 1700510 ) ( 2804390 * )
+ NEW met2 ( 2804390 626620 ) ( * 1700510 )
+ NEW met2 ( 2804390 626620 ) M2M3_PR_M
+ NEW met1 ( 2804390 1700510 ) M1M2_PR
+ NEW met1 ( 366390 2740230 ) M1M2_PR
+ NEW met1 ( 1502130 1700510 ) M1M2_PR
+ NEW met1 ( 1502130 2740230 ) M1M2_PR ;
+ - core0_to_mem_data\[24\] ( core0 mem_data_out[24] ) ( chip_controller wr_data[24] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 678980 0 ) ( 2808300 * )
+ NEW met1 ( 181930 2456670 ) ( 186530 * )
+ NEW met2 ( 186530 2456670 ) ( * 2457180 )
+ NEW met3 ( 186530 2457180 ) ( 200100 * )
+ NEW met3 ( 200100 2456500 0 ) ( * 2457180 )
+ NEW met3 ( 181930 1776500 ) ( 2808300 * )
+ NEW met2 ( 181930 1776500 ) ( * 2456670 )
+ NEW met4 ( 2808300 678980 ) ( * 1776500 )
+ NEW met3 ( 2808300 678980 ) M3M4_PR_M
+ NEW met2 ( 181930 1776500 ) M2M3_PR_M
+ NEW met1 ( 181930 2456670 ) M1M2_PR
+ NEW met1 ( 186530 2456670 ) M1M2_PR
+ NEW met2 ( 186530 2457180 ) M2M3_PR_M
+ NEW met3 ( 2808300 1776500 ) M3M4_PR_M ;
+ - core0_to_mem_data\[25\] ( core0 mem_data_out[25] ) ( chip_controller wr_data[25] ) + USE SIGNAL
+ + ROUTED met2 ( 1835630 200260 ) ( 1837470 * 0 )
+ NEW met2 ( 1835630 173570 ) ( * 200260 )
+ NEW met2 ( 368690 2288370 ) ( * 2300100 0 )
+ NEW met1 ( 368690 2288370 ) ( 1204970 * )
+ NEW met2 ( 1204970 173570 ) ( * 2288370 )
+ NEW met1 ( 1204970 173570 ) ( 1835630 * )
+ NEW met1 ( 1835630 173570 ) M1M2_PR
+ NEW met1 ( 368690 2288370 ) M1M2_PR
+ NEW met1 ( 1204970 173570 ) M1M2_PR
+ NEW met1 ( 1204970 2288370 ) M1M2_PR ;
+ - core0_to_mem_data\[26\] ( core0 mem_data_out[26] ) ( chip_controller wr_data[26] ) + USE SIGNAL
+ + ROUTED met2 ( 1852650 194650 ) ( * 200260 0 )
+ NEW met2 ( 122130 194650 ) ( * 2463810 )
+ NEW met2 ( 188370 2463810 ) ( * 2468740 )
+ NEW met3 ( 188370 2468740 ) ( 201020 * )
+ NEW met3 ( 201020 2468740 ) ( * 2469420 0 )
+ NEW met1 ( 122130 194650 ) ( 1852650 * )
+ NEW met1 ( 122130 2463810 ) ( 188370 * )
+ NEW met1 ( 122130 194650 ) M1M2_PR
+ NEW met1 ( 1852650 194650 ) M1M2_PR
+ NEW met1 ( 122130 2463810 ) M1M2_PR
+ NEW met1 ( 188370 2463810 ) M1M2_PR
+ NEW met2 ( 188370 2468740 ) M2M3_PR_M ;
+ - core0_to_mem_data\[27\] ( core0 mem_data_out[27] ) ( chip_controller wr_data[27] ) + USE SIGNAL
+ + ROUTED met1 ( 382030 2283950 ) ( 386170 * )
+ NEW met2 ( 382030 2283950 ) ( * 2300100 0 )
+ NEW met2 ( 386170 195330 ) ( * 2283950 )
+ NEW met2 ( 1898190 195330 ) ( * 200260 0 )
+ NEW met1 ( 386170 195330 ) ( 1898190 * )
+ NEW met1 ( 386170 195330 ) M1M2_PR
+ NEW met1 ( 386170 2283950 ) M1M2_PR
+ NEW met1 ( 382030 2283950 ) M1M2_PR
+ NEW met1 ( 1898190 195330 ) M1M2_PR ;
+ - core0_to_mem_data\[28\] ( core0 mem_data_out[28] ) ( chip_controller wr_data[28] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 861220 ) ( * 862410 )
+ NEW met1 ( 619850 862410 ) ( 1283630 * )
+ NEW met3 ( 1283630 861220 ) ( 1300420 * 0 )
+ NEW met3 ( 599380 2462620 0 ) ( 608350 * )
+ NEW met2 ( 608350 2462450 ) ( * 2462620 )
+ NEW met1 ( 608350 2462450 ) ( 619850 * )
+ NEW met2 ( 619850 862410 ) ( * 2462450 )
+ NEW met1 ( 1283630 862410 ) M1M2_PR
+ NEW met2 ( 1283630 861220 ) M2M3_PR_M
+ NEW met1 ( 619850 862410 ) M1M2_PR
+ NEW met2 ( 608350 2462620 ) M2M3_PR_M
+ NEW met1 ( 608350 2462450 ) M1M2_PR
+ NEW met1 ( 619850 2462450 ) M1M2_PR ;
+ - core0_to_mem_data\[29\] ( core0 mem_data_out[29] ) ( chip_controller wr_data[29] ) + USE SIGNAL
+ + ROUTED met2 ( 392610 1784490 ) ( * 2256300 )
+ NEW met2 ( 390310 2256300 ) ( 392610 * )
+ NEW met2 ( 390310 2256300 ) ( * 2300100 )
+ NEW met2 ( 388930 2300100 0 ) ( 390310 * )
+ NEW met3 ( 2799100 749020 0 ) ( 2808990 * )
+ NEW met2 ( 2808990 749020 ) ( * 750890 )
+ NEW met1 ( 2808990 750890 ) ( 2823710 * )
+ NEW met2 ( 2823710 750890 ) ( * 1784490 )
+ NEW met1 ( 392610 1784490 ) ( 2823710 * )
+ NEW met1 ( 392610 1784490 ) M1M2_PR
+ NEW met2 ( 2808990 749020 ) M2M3_PR_M
+ NEW met1 ( 2808990 750890 ) M1M2_PR
+ NEW met1 ( 2823710 750890 ) M1M2_PR
+ NEW met1 ( 2823710 1784490 ) M1M2_PR ;
+ - core0_to_mem_data\[2\] ( core0 mem_data_out[2] ) ( chip_controller wr_data[2] ) + USE SIGNAL
+ + ROUTED met2 ( 226550 2699260 0 ) ( 227010 * )
+ NEW met2 ( 227010 2699260 ) ( * 2723230 )
+ NEW met2 ( 1283630 349180 ) ( * 351730 )
+ NEW met1 ( 227010 2723230 ) ( 727950 * )
+ NEW met2 ( 727950 351730 ) ( * 2723230 )
+ NEW met1 ( 727950 351730 ) ( 1283630 * )
+ NEW met3 ( 1283630 349180 ) ( 1300420 * 0 )
+ NEW met1 ( 227010 2723230 ) M1M2_PR
+ NEW met1 ( 1283630 351730 ) M1M2_PR
+ NEW met2 ( 1283630 349180 ) M2M3_PR_M
+ NEW met1 ( 727950 2723230 ) M1M2_PR
+ NEW met1 ( 727950 351730 ) M1M2_PR ;
+ - core0_to_mem_data\[30\] ( core0 mem_data_out[30] ) ( chip_controller wr_data[30] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 896580 ) ( * 896750 )
+ NEW met1 ( 620310 896750 ) ( 1283630 * )
+ NEW met3 ( 1283630 896580 ) ( 1300420 * 0 )
+ NEW met3 ( 599380 2476900 0 ) ( 608350 * )
+ NEW met2 ( 608350 2476730 ) ( * 2476900 )
+ NEW met1 ( 608350 2476730 ) ( 620310 * )
+ NEW met2 ( 620310 896750 ) ( * 2476730 )
+ NEW met1 ( 1283630 896750 ) M1M2_PR
+ NEW met2 ( 1283630 896580 ) M2M3_PR_M
+ NEW met1 ( 620310 896750 ) M1M2_PR
+ NEW met2 ( 608350 2476900 ) M2M3_PR_M
+ NEW met1 ( 608350 2476730 ) M1M2_PR
+ NEW met1 ( 620310 2476730 ) M1M2_PR ;
+ - core0_to_mem_data\[31\] ( core0 mem_data_out[31] ) ( chip_controller wr_data[31] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 783700 0 ) ( 2814050 * )
+ NEW met3 ( 599380 2484380 0 ) ( 607430 * )
+ NEW met2 ( 607430 2484210 ) ( * 2484380 )
+ NEW met1 ( 1411970 1696770 ) ( 1435200 * )
+ NEW met1 ( 1435200 1696090 ) ( * 1696770 )
+ NEW met1 ( 607430 2484210 ) ( 1411970 * )
+ NEW met2 ( 1411970 1696770 ) ( * 2484210 )
+ NEW met1 ( 1435200 1696090 ) ( 2814050 * )
+ NEW met2 ( 2814050 783700 ) ( * 1696090 )
+ NEW met2 ( 2814050 783700 ) M2M3_PR_M
+ NEW met2 ( 607430 2484380 ) M2M3_PR_M
+ NEW met1 ( 607430 2484210 ) M1M2_PR
+ NEW met1 ( 2814050 1696090 ) M1M2_PR
+ NEW met1 ( 1411970 1696770 ) M1M2_PR
+ NEW met1 ( 1411970 2484210 ) M1M2_PR ;
+ - core0_to_mem_data\[32\] ( core0 mem_data_out[32] ) ( chip_controller wr_data[32] ) + USE SIGNAL
+ + ROUTED met3 ( 194350 2492540 ) ( 201020 * )
+ NEW met3 ( 201020 2492540 ) ( * 2493220 0 )
+ NEW met2 ( 1285470 949620 ) ( * 1390090 )
+ NEW met1 ( 194350 1390090 ) ( 1285470 * )
+ NEW met3 ( 1285470 949620 ) ( 1300420 * 0 )
+ NEW met1 ( 194350 2308430 ) ( * 2309450 )
+ NEW met2 ( 194350 1390090 ) ( * 2308430 )
+ NEW met2 ( 194350 2309450 ) ( * 2492540 )
+ NEW met1 ( 194350 1390090 ) M1M2_PR
+ NEW met2 ( 194350 2492540 ) M2M3_PR_M
+ NEW met2 ( 1285470 949620 ) M2M3_PR_M
+ NEW met1 ( 1285470 1390090 ) M1M2_PR
+ NEW met1 ( 194350 2308430 ) M1M2_PR
+ NEW met1 ( 194350 2309450 ) M1M2_PR ;
+ - core0_to_mem_data\[33\] ( core0 mem_data_out[33] ) ( chip_controller wr_data[33] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 966620 ) ( * 972570 )
+ NEW met1 ( 409170 2283950 ) ( 413310 * )
+ NEW met2 ( 409170 2283950 ) ( * 2300100 0 )
+ NEW met2 ( 413310 972570 ) ( * 2283950 )
+ NEW met1 ( 413310 972570 ) ( 1283630 * )
+ NEW met3 ( 1283630 966620 ) ( 1300420 * 0 )
+ NEW met1 ( 413310 972570 ) M1M2_PR
+ NEW met1 ( 1283630 972570 ) M1M2_PR
+ NEW met2 ( 1283630 966620 ) M2M3_PR_M
+ NEW met1 ( 413310 2283950 ) M1M2_PR
+ NEW met1 ( 409170 2283950 ) M1M2_PR ;
+ - core0_to_mem_data\[34\] ( core0 mem_data_out[34] ) ( chip_controller wr_data[34] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2492540 0 ) ( 607430 * )
+ NEW met2 ( 607430 2492370 ) ( * 2492540 )
+ NEW met2 ( 804770 1007250 ) ( * 2492370 )
+ NEW met2 ( 1283630 1001980 ) ( * 1007250 )
+ NEW met1 ( 607430 2492370 ) ( 804770 * )
+ NEW met1 ( 804770 1007250 ) ( 1283630 * )
+ NEW met3 ( 1283630 1001980 ) ( 1300420 * 0 )
+ NEW met2 ( 607430 2492540 ) M2M3_PR_M
+ NEW met1 ( 607430 2492370 ) M1M2_PR
+ NEW met1 ( 804770 1007250 ) M1M2_PR
+ NEW met1 ( 804770 2492370 ) M1M2_PR
+ NEW met1 ( 1283630 1007250 ) M1M2_PR
+ NEW met2 ( 1283630 1001980 ) M2M3_PR_M ;
+ - core0_to_mem_data\[35\] ( core0 mem_data_out[35] ) ( chip_controller wr_data[35] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2493900 0 ) ( 606510 * )
+ NEW met2 ( 606510 2491010 ) ( * 2493900 )
+ NEW met2 ( 2019170 1699660 ) ( 2021470 * 0 )
+ NEW met2 ( 2019170 1699660 ) ( * 1776330 )
+ NEW met1 ( 606510 2491010 ) ( 1322730 * )
+ NEW met2 ( 1322730 1776330 ) ( * 2491010 )
+ NEW met1 ( 1322730 1776330 ) ( 2019170 * )
+ NEW met2 ( 606510 2493900 ) M2M3_PR_M
+ NEW met1 ( 606510 2491010 ) M1M2_PR
+ NEW met1 ( 2019170 1776330 ) M1M2_PR
+ NEW met1 ( 1322730 1776330 ) M1M2_PR
+ NEW met1 ( 1322730 2491010 ) M1M2_PR ;
+ - core0_to_mem_data\[36\] ( core0 mem_data_out[36] ) ( chip_controller wr_data[36] ) + USE SIGNAL
+ + ROUTED met1 ( 415610 2283950 ) ( 419290 * )
+ NEW met2 ( 415610 2283950 ) ( * 2300100 0 )
+ NEW met2 ( 419290 1742330 ) ( * 2283950 )
+ NEW met3 ( 2799100 836060 0 ) ( 2815890 * )
+ NEW met2 ( 2815890 836060 ) ( * 1742330 )
+ NEW met1 ( 419290 1742330 ) ( 2815890 * )
+ NEW met1 ( 419290 1742330 ) M1M2_PR
+ NEW met1 ( 2815890 1742330 ) M1M2_PR
+ NEW met1 ( 419290 2283950 ) M1M2_PR
+ NEW met1 ( 415610 2283950 ) M1M2_PR
+ NEW met2 ( 2815890 836060 ) M2M3_PR_M ;
+ - core0_to_mem_data\[37\] ( core0 mem_data_out[37] ) ( chip_controller wr_data[37] ) + USE SIGNAL
+ + ROUTED met2 ( 186990 2498150 ) ( * 2503420 )
+ NEW met3 ( 186990 2503420 ) ( 201020 * )
+ NEW met3 ( 201020 2503420 ) ( * 2504100 0 )
+ NEW met2 ( 2038490 1699660 ) ( 2040330 * 0 )
+ NEW met2 ( 2038490 1699660 ) ( * 1800810 )
+ NEW met1 ( 147890 2498150 ) ( 186990 * )
+ NEW met2 ( 147890 1800810 ) ( * 2498150 )
+ NEW met1 ( 147890 1800810 ) ( 2038490 * )
+ NEW met1 ( 186990 2498150 ) M1M2_PR
+ NEW met2 ( 186990 2503420 ) M2M3_PR_M
+ NEW met1 ( 2038490 1800810 ) M1M2_PR
+ NEW met1 ( 147890 2498150 ) M1M2_PR
+ NEW met1 ( 147890 1800810 ) M1M2_PR ;
+ - core0_to_mem_data\[38\] ( core0 mem_data_out[38] ) ( chip_controller wr_data[38] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2498660 0 ) ( 607430 * )
+ NEW met2 ( 607430 2498150 ) ( * 2498660 )
+ NEW met2 ( 1191170 198730 ) ( * 2498150 )
+ NEW met1 ( 607430 2498150 ) ( 1191170 * )
+ NEW met2 ( 2004450 198730 ) ( * 200260 0 )
+ NEW met1 ( 1191170 198730 ) ( 2004450 * )
+ NEW met2 ( 607430 2498660 ) M2M3_PR_M
+ NEW met1 ( 607430 2498150 ) M1M2_PR
+ NEW met1 ( 1191170 198730 ) M1M2_PR
+ NEW met1 ( 1191170 2498150 ) M1M2_PR
+ NEW met1 ( 2004450 198730 ) M1M2_PR ;
+ - core0_to_mem_data\[39\] ( core0 mem_data_out[39] ) ( chip_controller wr_data[39] ) + USE SIGNAL
+ + ROUTED met3 ( 197110 2505460 ) ( 201020 * )
+ NEW met3 ( 201020 2505460 ) ( * 2506140 0 )
+ NEW met1 ( 192970 2473670 ) ( 196650 * )
+ NEW met2 ( 192970 2473670 ) ( * 2497470 )
+ NEW met1 ( 192970 2497470 ) ( 197110 * )
+ NEW met2 ( 197110 2497470 ) ( * 2505460 )
+ NEW met2 ( 1283630 1037340 ) ( * 1041590 )
+ NEW met1 ( 196650 1041590 ) ( 1283630 * )
+ NEW met3 ( 1283630 1037340 ) ( 1300420 * 0 )
+ NEW met2 ( 196650 1041590 ) ( * 2473670 )
+ NEW met2 ( 197110 2505460 ) M2M3_PR_M
+ NEW met1 ( 196650 1041590 ) M1M2_PR
+ NEW met1 ( 196650 2473670 ) M1M2_PR
+ NEW met1 ( 192970 2473670 ) M1M2_PR
+ NEW met1 ( 192970 2497470 ) M1M2_PR
+ NEW met1 ( 197110 2497470 ) M1M2_PR
+ NEW met1 ( 1283630 1041590 ) M1M2_PR
+ NEW met2 ( 1283630 1037340 ) M2M3_PR_M ;
+ - core0_to_mem_data\[3\] ( core0 mem_data_out[3] ) ( chip_controller wr_data[3] ) + USE SIGNAL
+ + ROUTED met2 ( 1476830 1699660 ) ( 1477750 * 0 )
+ NEW met2 ( 1476830 1699660 ) ( * 2725950 )
+ NEW met2 ( 233450 2699260 0 ) ( 234370 * )
+ NEW met2 ( 234370 2699260 ) ( * 2712350 )
+ NEW met1 ( 234370 2712350 ) ( 254610 * )
+ NEW met2 ( 254610 2712350 ) ( * 2725950 )
+ NEW met1 ( 254610 2725950 ) ( 1476830 * )
+ NEW met1 ( 1476830 2725950 ) M1M2_PR
+ NEW met1 ( 234370 2712350 ) M1M2_PR
+ NEW met1 ( 254610 2712350 ) M1M2_PR
+ NEW met1 ( 254610 2725950 ) M1M2_PR ;
+ - core0_to_mem_data\[40\] ( core0 mem_data_out[40] ) ( chip_controller wr_data[40] ) + USE SIGNAL
+ + ROUTED met2 ( 419750 2699260 0 ) ( 420210 * )
+ NEW met2 ( 420210 2699260 ) ( * 2728500 )
+ NEW met2 ( 2049990 191590 ) ( * 200260 0 )
+ NEW met3 ( 420210 2728500 ) ( 1045810 * )
+ NEW met1 ( 1045810 191590 ) ( 2049990 * )
+ NEW met2 ( 1045810 191590 ) ( * 2728500 )
+ NEW met2 ( 420210 2728500 ) M2M3_PR_M
+ NEW met1 ( 2049990 191590 ) M1M2_PR
+ NEW met1 ( 1045810 191590 ) M1M2_PR
+ NEW met2 ( 1045810 2728500 ) M2M3_PR_M ;
+ - core0_to_mem_data\[41\] ( core0 mem_data_out[41] ) ( chip_controller wr_data[41] ) + USE SIGNAL
+ + ROUTED met2 ( 189290 2505290 ) ( * 2510900 )
+ NEW met3 ( 189290 2510900 ) ( 201020 * )
+ NEW met3 ( 201020 2510900 ) ( * 2511580 0 )
+ NEW met2 ( 113390 1783300 ) ( * 2505290 )
+ NEW met3 ( 2799100 853740 0 ) ( 2809220 * )
+ NEW met1 ( 113390 2505290 ) ( 189290 * )
+ NEW met3 ( 113390 1783300 ) ( 2809220 * )
+ NEW met4 ( 2809220 853740 ) ( * 1783300 )
+ NEW met1 ( 113390 2505290 ) M1M2_PR
+ NEW met1 ( 189290 2505290 ) M1M2_PR
+ NEW met2 ( 189290 2510900 ) M2M3_PR_M
+ NEW met2 ( 113390 1783300 ) M2M3_PR_M
+ NEW met3 ( 2809220 853740 ) M3M4_PR_M
+ NEW met3 ( 2809220 1783300 ) M3M4_PR_M ;
+ - core0_to_mem_data\[42\] ( core0 mem_data_out[42] ) ( chip_controller wr_data[42] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2506820 0 ) ( 607430 * )
+ NEW met2 ( 607430 2506650 ) ( * 2506820 )
+ NEW met2 ( 969450 198390 ) ( * 2506650 )
+ NEW met1 ( 607430 2506650 ) ( 969450 * )
+ NEW met2 ( 2079890 198390 ) ( * 200260 0 )
+ NEW met1 ( 969450 198390 ) ( 2079890 * )
+ NEW met2 ( 607430 2506820 ) M2M3_PR_M
+ NEW met1 ( 607430 2506650 ) M1M2_PR
+ NEW met1 ( 969450 198390 ) M1M2_PR
+ NEW met1 ( 969450 2506650 ) M1M2_PR
+ NEW met1 ( 2079890 198390 ) M1M2_PR ;
+ - core0_to_mem_data\[43\] ( core0 mem_data_out[43] ) ( chip_controller wr_data[43] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2511580 0 ) ( 609730 * )
+ NEW met2 ( 609730 2505970 ) ( * 2511580 )
+ NEW met2 ( 1283630 1055020 ) ( * 1055530 )
+ NEW met2 ( 873770 1055530 ) ( * 2505970 )
+ NEW met1 ( 609730 2505970 ) ( 873770 * )
+ NEW met1 ( 873770 1055530 ) ( 1283630 * )
+ NEW met3 ( 1283630 1055020 ) ( 1300420 * 0 )
+ NEW met2 ( 609730 2511580 ) M2M3_PR_M
+ NEW met1 ( 609730 2505970 ) M1M2_PR
+ NEW met1 ( 873770 1055530 ) M1M2_PR
+ NEW met1 ( 873770 2505970 ) M1M2_PR
+ NEW met1 ( 1283630 1055530 ) M1M2_PR
+ NEW met2 ( 1283630 1055020 ) M2M3_PR_M ;
+ - core0_to_mem_data\[44\] ( core0 mem_data_out[44] ) ( chip_controller wr_data[44] ) + USE SIGNAL
+ + ROUTED met2 ( 426650 2699260 0 ) ( 427570 * )
+ NEW met2 ( 427570 2699260 ) ( * 2720340 )
+ NEW met3 ( 427570 2720340 ) ( 1003950 * )
+ NEW met2 ( 2110250 192270 ) ( * 200260 0 )
+ NEW met1 ( 1003950 192270 ) ( 2110250 * )
+ NEW met2 ( 1003950 192270 ) ( * 2720340 )
+ NEW met2 ( 427570 2720340 ) M2M3_PR_M
+ NEW met1 ( 1003950 192270 ) M1M2_PR
+ NEW met2 ( 1003950 2720340 ) M2M3_PR_M
+ NEW met1 ( 2110250 192270 ) M1M2_PR ;
+ - core0_to_mem_data\[45\] ( core0 mem_data_out[45] ) ( chip_controller wr_data[45] ) + USE SIGNAL
+ + ROUTED met2 ( 2125430 196010 ) ( * 200260 0 )
+ NEW met2 ( 679650 196010 ) ( * 2717790 )
+ NEW met2 ( 430330 2699260 0 ) ( 431710 * )
+ NEW met2 ( 431710 2699260 ) ( * 2717790 )
+ NEW met1 ( 679650 196010 ) ( 2125430 * )
+ NEW met1 ( 431710 2717790 ) ( 679650 * )
+ NEW met1 ( 679650 196010 ) M1M2_PR
+ NEW met1 ( 679650 2717790 ) M1M2_PR
+ NEW met1 ( 2125430 196010 ) M1M2_PR
+ NEW met1 ( 431710 2717790 ) M1M2_PR ;
+ - core0_to_mem_data\[46\] ( core0 mem_data_out[46] ) ( chip_controller wr_data[46] ) + USE SIGNAL
+ + ROUTED met2 ( 2140610 194990 ) ( * 200260 0 )
+ NEW met2 ( 597310 194990 ) ( * 2290580 )
+ NEW met1 ( 597310 194990 ) ( 2140610 * )
+ NEW met2 ( 435850 2290580 ) ( * 2300100 0 )
+ NEW met3 ( 435850 2290580 ) ( 597310 * )
+ NEW met1 ( 597310 194990 ) M1M2_PR
+ NEW met1 ( 2140610 194990 ) M1M2_PR
+ NEW met2 ( 597310 2290580 ) M2M3_PR_M
+ NEW met2 ( 435850 2290580 ) M2M3_PR_M ;
+ - core0_to_mem_data\[47\] ( core0 mem_data_out[47] ) ( chip_controller wr_data[47] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 923100 0 ) ( 2805310 * )
+ NEW met2 ( 440450 1707990 ) ( * 2256300 )
+ NEW met2 ( 439070 2256300 ) ( 440450 * )
+ NEW met2 ( 439070 2256300 ) ( * 2300100 )
+ NEW met2 ( 437690 2300100 0 ) ( 439070 * )
+ NEW met1 ( 440450 1707990 ) ( 2805310 * )
+ NEW met2 ( 2805310 923100 ) ( * 1707990 )
+ NEW met2 ( 2805310 923100 ) M2M3_PR_M
+ NEW met1 ( 2805310 1707990 ) M1M2_PR
+ NEW met1 ( 440450 1707990 ) M1M2_PR ;
+ - core0_to_mem_data\[48\] ( core0 mem_data_out[48] ) ( chip_controller wr_data[48] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2525860 0 ) ( 607430 * )
+ NEW met2 ( 607430 2525690 ) ( * 2525860 )
+ NEW met2 ( 1342970 1780070 ) ( * 2525690 )
+ NEW met1 ( 607430 2525690 ) ( 1342970 * )
+ NEW met2 ( 2094610 1699660 ) ( 2096910 * 0 )
+ NEW met1 ( 1342970 1780070 ) ( 2094610 * )
+ NEW met2 ( 2094610 1699660 ) ( * 1780070 )
+ NEW met2 ( 607430 2525860 ) M2M3_PR_M
+ NEW met1 ( 607430 2525690 ) M1M2_PR
+ NEW met1 ( 1342970 2525690 ) M1M2_PR
+ NEW met1 ( 1342970 1780070 ) M1M2_PR
+ NEW met1 ( 2094610 1780070 ) M1M2_PR ;
+ - core0_to_mem_data\[49\] ( core0 mem_data_out[49] ) ( chip_controller wr_data[49] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2527220 0 ) ( 607430 * )
+ NEW met2 ( 607430 2527050 ) ( * 2527220 )
+ NEW met2 ( 1283630 1072700 ) ( * 1076270 )
+ NEW met1 ( 607430 2527050 ) ( 756930 * )
+ NEW met1 ( 756930 1076270 ) ( 1283630 * )
+ NEW met3 ( 1283630 1072700 ) ( 1300420 * 0 )
+ NEW met2 ( 756930 1076270 ) ( * 2527050 )
+ NEW met2 ( 607430 2527220 ) M2M3_PR_M
+ NEW met1 ( 607430 2527050 ) M1M2_PR
+ NEW met1 ( 1283630 1076270 ) M1M2_PR
+ NEW met2 ( 1283630 1072700 ) M2M3_PR_M
+ NEW met1 ( 756930 1076270 ) M1M2_PR
+ NEW met1 ( 756930 2527050 ) M1M2_PR ;
+ - core0_to_mem_data\[4\] ( core0 mem_data_out[4] ) ( chip_controller wr_data[4] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2332060 0 ) ( 607430 * )
+ NEW met2 ( 607430 2329170 ) ( * 2332060 )
+ NEW met1 ( 607430 2329170 ) ( 607890 * )
+ NEW li1 ( 607890 2325430 ) ( * 2329170 )
+ NEW met2 ( 1439570 1731450 ) ( * 2325430 )
+ NEW met1 ( 607890 2325430 ) ( 1439570 * )
+ NEW met1 ( 1439570 1731450 ) ( 1496610 * )
+ NEW met2 ( 1496610 1699660 0 ) ( * 1731450 )
+ NEW met2 ( 607430 2332060 ) M2M3_PR_M
+ NEW met1 ( 607430 2329170 ) M1M2_PR
+ NEW li1 ( 607890 2329170 ) L1M1_PR_MR
+ NEW li1 ( 607890 2325430 ) L1M1_PR_MR
+ NEW met1 ( 1439570 1731450 ) M1M2_PR
+ NEW met1 ( 1439570 2325430 ) M1M2_PR
+ NEW met1 ( 1496610 1731450 ) M1M2_PR ;
+ - core0_to_mem_data\[50\] ( core0 mem_data_out[50] ) ( chip_controller wr_data[50] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2529940 0 ) ( 609270 * )
+ NEW met2 ( 609270 2526370 ) ( * 2529940 )
+ NEW met1 ( 609270 2526370 ) ( 907810 * )
+ NEW met2 ( 2201330 197710 ) ( * 200260 0 )
+ NEW met1 ( 907810 197710 ) ( 2201330 * )
+ NEW met2 ( 907810 197710 ) ( * 2526370 )
+ NEW met2 ( 609270 2529940 ) M2M3_PR_M
+ NEW met1 ( 609270 2526370 ) M1M2_PR
+ NEW met1 ( 907810 197710 ) M1M2_PR
+ NEW met1 ( 907810 2526370 ) M1M2_PR
+ NEW met1 ( 2201330 197710 ) M1M2_PR ;
+ - core0_to_mem_data\[51\] ( core0 mem_data_out[51] ) ( chip_controller wr_data[51] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 1090380 ) ( * 1097010 )
+ NEW met2 ( 867330 1097010 ) ( * 2730030 )
+ NEW met2 ( 445970 2699260 0 ) ( 447350 * )
+ NEW met2 ( 447350 2699260 ) ( * 2730030 )
+ NEW met1 ( 447350 2730030 ) ( 867330 * )
+ NEW met1 ( 867330 1097010 ) ( 1283630 * )
+ NEW met3 ( 1283630 1090380 ) ( 1300420 * 0 )
+ NEW met1 ( 867330 1097010 ) M1M2_PR
+ NEW met1 ( 867330 2730030 ) M1M2_PR
+ NEW met1 ( 1283630 1097010 ) M1M2_PR
+ NEW met2 ( 1283630 1090380 ) M2M3_PR_M
+ NEW met1 ( 447350 2730030 ) M1M2_PR ;
+ - core0_to_mem_data\[52\] ( core0 mem_data_out[52] ) ( chip_controller wr_data[52] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2533340 0 ) ( 607430 * )
+ NEW met2 ( 607430 2533170 ) ( * 2533340 )
+ NEW met2 ( 1283630 1108060 ) ( * 1110610 )
+ NEW met1 ( 607430 2533170 ) ( 825470 * )
+ NEW met2 ( 825470 1110610 ) ( * 2533170 )
+ NEW met1 ( 825470 1110610 ) ( 1283630 * )
+ NEW met3 ( 1283630 1108060 ) ( 1300420 * 0 )
+ NEW met2 ( 607430 2533340 ) M2M3_PR_M
+ NEW met1 ( 607430 2533170 ) M1M2_PR
+ NEW met1 ( 1283630 1110610 ) M1M2_PR
+ NEW met2 ( 1283630 1108060 ) M2M3_PR_M
+ NEW met1 ( 825470 2533170 ) M1M2_PR
+ NEW met1 ( 825470 1110610 ) M1M2_PR ;
+ - core0_to_mem_data\[53\] ( core0 mem_data_out[53] ) ( chip_controller wr_data[53] ) + USE SIGNAL
+ + ROUTED met2 ( 2231690 196350 ) ( * 200260 0 )
+ NEW met2 ( 790050 196350 ) ( * 2714390 )
+ NEW met2 ( 451030 2699260 0 ) ( 452410 * )
+ NEW met2 ( 452410 2699260 ) ( * 2714390 )
+ NEW met1 ( 790050 196350 ) ( 2231690 * )
+ NEW met1 ( 452410 2714390 ) ( 790050 * )
+ NEW met1 ( 790050 196350 ) M1M2_PR
+ NEW met1 ( 790050 2714390 ) M1M2_PR
+ NEW met1 ( 2231690 196350 ) M1M2_PR
+ NEW met1 ( 452410 2714390 ) M1M2_PR ;
+ - core0_to_mem_data\[54\] ( core0 mem_data_out[54] ) ( chip_controller wr_data[54] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 940780 0 ) ( 2811750 * )
+ NEW met2 ( 2811750 940780 ) ( * 941970 )
+ NEW met1 ( 2811750 941970 ) ( 2830610 * )
+ NEW met2 ( 2830610 941970 ) ( * 1784830 )
+ NEW met2 ( 461610 1784830 ) ( * 2256300 )
+ NEW met2 ( 460690 2256300 ) ( 461610 * )
+ NEW met2 ( 460690 2256300 ) ( * 2300100 )
+ NEW met2 ( 459310 2300100 0 ) ( 460690 * )
+ NEW met1 ( 461610 1784830 ) ( 2830610 * )
+ NEW met2 ( 2811750 940780 ) M2M3_PR_M
+ NEW met1 ( 2811750 941970 ) M1M2_PR
+ NEW met1 ( 2830610 941970 ) M1M2_PR
+ NEW met1 ( 2830610 1784830 ) M1M2_PR
+ NEW met1 ( 461610 1784830 ) M1M2_PR ;
+ - core0_to_mem_data\[55\] ( core0 mem_data_out[55] ) ( chip_controller wr_data[55] ) + USE SIGNAL
+ + ROUTED met2 ( 468050 1722950 ) ( * 2256300 )
+ NEW met2 ( 467130 2256300 ) ( 468050 * )
+ NEW met2 ( 467130 2256300 ) ( * 2285820 )
+ NEW met2 ( 465750 2285820 ) ( 467130 * )
+ NEW met2 ( 465750 2285820 ) ( * 2300100 )
+ NEW met2 ( 464370 2300100 0 ) ( 465750 * )
+ NEW met2 ( 2190290 1699660 0 ) ( * 1722950 )
+ NEW met1 ( 468050 1722950 ) ( 2190290 * )
+ NEW met1 ( 468050 1722950 ) M1M2_PR
+ NEW met1 ( 2190290 1722950 ) M1M2_PR ;
+ - core0_to_mem_data\[56\] ( core0 mem_data_out[56] ) ( chip_controller wr_data[56] ) + USE SIGNAL
+ + ROUTED met1 ( 471730 2713030 ) ( * 2713710 )
+ NEW met2 ( 459770 2699260 0 ) ( 461150 * )
+ NEW met2 ( 461150 2699260 ) ( * 2713030 )
+ NEW met1 ( 461150 2713030 ) ( 471730 * )
+ NEW met2 ( 2277230 196690 ) ( * 200260 0 )
+ NEW met1 ( 853070 196690 ) ( 2277230 * )
+ NEW met2 ( 853070 196690 ) ( * 2713710 )
+ NEW met1 ( 471730 2713710 ) ( 853070 * )
+ NEW met1 ( 461150 2713030 ) M1M2_PR
+ NEW met1 ( 853070 196690 ) M1M2_PR
+ NEW met1 ( 853070 2713710 ) M1M2_PR
+ NEW met1 ( 2277230 196690 ) M1M2_PR ;
+ - core0_to_mem_data\[57\] ( core0 mem_data_out[57] ) ( chip_controller wr_data[57] ) + USE SIGNAL
+ + ROUTED met2 ( 189750 2532660 ) ( * 2532830 )
+ NEW met3 ( 189750 2532660 ) ( 201020 * )
+ NEW met3 ( 201020 2532660 ) ( * 2533340 0 )
+ NEW met1 ( 162610 2532830 ) ( 189750 * )
+ NEW met2 ( 2292410 194310 ) ( * 200260 0 )
+ NEW met1 ( 162610 194310 ) ( 2292410 * )
+ NEW met2 ( 162610 194310 ) ( * 2532830 )
+ NEW met1 ( 189750 2532830 ) M1M2_PR
+ NEW met2 ( 189750 2532660 ) M2M3_PR_M
+ NEW met1 ( 162610 194310 ) M1M2_PR
+ NEW met1 ( 162610 2532830 ) M1M2_PR
+ NEW met1 ( 2292410 194310 ) M1M2_PR ;
+ - core0_to_mem_data\[58\] ( core0 mem_data_out[58] ) ( chip_controller wr_data[58] ) + USE SIGNAL
+ + ROUTED met2 ( 189750 2533510 ) ( * 2535380 )
+ NEW met3 ( 189750 2535380 ) ( 200100 * )
+ NEW met3 ( 200100 2534700 0 ) ( * 2535380 )
+ NEW met3 ( 2799100 975460 0 ) ( 2811060 * )
+ NEW met2 ( 114310 1694900 ) ( * 2533510 )
+ NEW met1 ( 114310 2533510 ) ( 189750 * )
+ NEW met3 ( 114310 1694900 ) ( 2811060 * )
+ NEW met4 ( 2811060 975460 ) ( * 1694900 )
+ NEW met1 ( 114310 2533510 ) M1M2_PR
+ NEW met1 ( 189750 2533510 ) M1M2_PR
+ NEW met2 ( 189750 2535380 ) M2M3_PR_M
+ NEW met3 ( 2811060 975460 ) M3M4_PR_M
+ NEW met2 ( 114310 1694900 ) M2M3_PR_M
+ NEW met3 ( 2811060 1694900 ) M3M4_PR_M ;
+ - core0_to_mem_data\[59\] ( core0 mem_data_out[59] ) ( chip_controller wr_data[59] ) + USE SIGNAL
+ + ROUTED met2 ( 188830 2532490 ) ( * 2536060 )
+ NEW met3 ( 188830 2536060 ) ( 201020 * )
+ NEW met3 ( 201020 2536060 ) ( * 2536740 0 )
+ NEW met2 ( 2322310 193970 ) ( * 200260 0 )
+ NEW met1 ( 176410 2532490 ) ( 188830 * )
+ NEW met1 ( 176410 193970 ) ( 2322310 * )
+ NEW met2 ( 176410 193970 ) ( * 2532490 )
+ NEW met1 ( 188830 2532490 ) M1M2_PR
+ NEW met2 ( 188830 2536060 ) M2M3_PR_M
+ NEW met1 ( 2322310 193970 ) M1M2_PR
+ NEW met1 ( 176410 193970 ) M1M2_PR
+ NEW met1 ( 176410 2532490 ) M1M2_PR ;
+ - core0_to_mem_data\[5\] ( core0 mem_data_out[5] ) ( chip_controller wr_data[5] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2339540 0 ) ( 606050 * )
+ NEW met3 ( 2799100 295460 0 ) ( 2811750 * )
+ NEW met2 ( 2811750 295460 ) ( * 296650 )
+ NEW met1 ( 2811750 296650 ) ( 2829690 * )
+ NEW met2 ( 606050 2304600 ) ( * 2339540 )
+ NEW met2 ( 606050 2304600 ) ( 607430 * )
+ NEW met2 ( 607430 1799450 ) ( * 2304600 )
+ NEW met2 ( 2829690 296650 ) ( * 1799450 )
+ NEW met1 ( 607430 1799450 ) ( 2829690 * )
+ NEW met2 ( 606050 2339540 ) M2M3_PR_M
+ NEW met2 ( 2811750 295460 ) M2M3_PR_M
+ NEW met1 ( 2811750 296650 ) M1M2_PR
+ NEW met1 ( 2829690 296650 ) M1M2_PR
+ NEW met1 ( 607430 1799450 ) M1M2_PR
+ NEW met1 ( 2829690 1799450 ) M1M2_PR ;
+ - core0_to_mem_data\[60\] ( core0 mem_data_out[60] ) ( chip_controller wr_data[60] ) + USE SIGNAL
+ + ROUTED met2 ( 2337490 181730 ) ( * 200260 0 )
+ NEW met3 ( 599380 2547620 0 ) ( 607430 * )
+ NEW met2 ( 607430 2547110 ) ( * 2547620 )
+ NEW met1 ( 1197150 181730 ) ( 2337490 * )
+ NEW met1 ( 607430 2547110 ) ( 1197150 * )
+ NEW met2 ( 1197150 181730 ) ( * 2547110 )
+ NEW met1 ( 2337490 181730 ) M1M2_PR
+ NEW met2 ( 607430 2547620 ) M2M3_PR_M
+ NEW met1 ( 607430 2547110 ) M1M2_PR
+ NEW met1 ( 1197150 181730 ) M1M2_PR
+ NEW met1 ( 1197150 2547110 ) M1M2_PR ;
+ - core0_to_mem_data\[61\] ( core0 mem_data_out[61] ) ( chip_controller wr_data[61] ) + USE SIGNAL
+ + ROUTED met1 ( 476330 2283950 ) ( 482770 * )
+ NEW met2 ( 476330 2283950 ) ( * 2300100 0 )
+ NEW met2 ( 482770 1722610 ) ( * 2283950 )
+ NEW met2 ( 2228010 1699660 0 ) ( * 1722610 )
+ NEW met1 ( 482770 1722610 ) ( 2228010 * )
+ NEW met1 ( 482770 1722610 ) M1M2_PR
+ NEW met1 ( 482770 2283950 ) M1M2_PR
+ NEW met1 ( 476330 2283950 ) M1M2_PR
+ NEW met1 ( 2228010 1722610 ) M1M2_PR ;
+ - core0_to_mem_data\[62\] ( core0 mem_data_out[62] ) ( chip_controller wr_data[62] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2553740 0 ) ( 609730 * )
+ NEW met2 ( 609730 2546100 ) ( * 2553740 )
+ NEW met2 ( 608810 2546100 ) ( 609730 * )
+ NEW met3 ( 2799100 1010140 0 ) ( 2808990 * )
+ NEW met2 ( 2808990 1010140 ) ( * 1014050 )
+ NEW met1 ( 2808990 1014050 ) ( 2824630 * )
+ NEW met2 ( 2824630 1014050 ) ( * 1791290 )
+ NEW met1 ( 608810 1791290 ) ( 2824630 * )
+ NEW met2 ( 608810 1791290 ) ( * 2546100 )
+ NEW met1 ( 608810 1791290 ) M1M2_PR
+ NEW met2 ( 609730 2553740 ) M2M3_PR_M
+ NEW met2 ( 2808990 1010140 ) M2M3_PR_M
+ NEW met1 ( 2808990 1014050 ) M1M2_PR
+ NEW met1 ( 2824630 1014050 ) M1M2_PR
+ NEW met1 ( 2824630 1791290 ) M1M2_PR ;
+ - core0_to_mem_data\[63\] ( core0 mem_data_out[63] ) ( chip_controller wr_data[63] ) + USE SIGNAL
+ + ROUTED met2 ( 607430 2540820 ) ( 608350 * )
+ NEW met2 ( 608350 2497800 ) ( * 2540820 )
+ NEW met2 ( 607890 2497800 ) ( 608350 * )
+ NEW met3 ( 599380 2557140 0 ) ( 606970 * )
+ NEW met2 ( 606970 2553060 ) ( * 2557140 )
+ NEW met2 ( 606970 2553060 ) ( 607430 * )
+ NEW met2 ( 607430 2548300 ) ( * 2553060 )
+ NEW met2 ( 606970 2548300 ) ( 607430 * )
+ NEW met2 ( 606970 2546260 ) ( * 2548300 )
+ NEW met2 ( 606970 2546260 ) ( 607430 * )
+ NEW met2 ( 607430 2540820 ) ( * 2546260 )
+ NEW met3 ( 2798180 1029180 ) ( 2798410 * )
+ NEW met3 ( 2798180 1027820 0 ) ( * 1029180 )
+ NEW met1 ( 607890 1800130 ) ( 2798410 * )
+ NEW met2 ( 2798410 1029180 ) ( * 1800130 )
+ NEW met2 ( 607890 1800130 ) ( * 2497800 )
+ NEW met1 ( 607890 1800130 ) M1M2_PR
+ NEW met2 ( 606970 2557140 ) M2M3_PR_M
+ NEW met2 ( 2798410 1029180 ) M2M3_PR_M
+ NEW met1 ( 2798410 1800130 ) M1M2_PR ;
+ - core0_to_mem_data\[64\] ( core0 mem_data_out[64] ) ( chip_controller wr_data[64] ) + USE SIGNAL
+ + ROUTED met2 ( 475410 2699260 0 ) ( 475870 * )
+ NEW met2 ( 475870 2699260 ) ( * 2729690 )
+ NEW met2 ( 901830 1145290 ) ( * 2729690 )
+ NEW met2 ( 1283630 1143420 ) ( * 1145290 )
+ NEW met1 ( 475870 2729690 ) ( 901830 * )
+ NEW met1 ( 901830 1145290 ) ( 1283630 * )
+ NEW met3 ( 1283630 1143420 ) ( 1300420 * 0 )
+ NEW met1 ( 475870 2729690 ) M1M2_PR
+ NEW met1 ( 901830 2729690 ) M1M2_PR
+ NEW met1 ( 901830 1145290 ) M1M2_PR
+ NEW met1 ( 1283630 1145290 ) M1M2_PR
+ NEW met2 ( 1283630 1143420 ) M2M3_PR_M ;
+ - core0_to_mem_data\[65\] ( core0 mem_data_out[65] ) ( chip_controller wr_data[65] ) + USE SIGNAL
+ + ROUTED met2 ( 482310 2699260 0 ) ( 482770 * )
+ NEW met2 ( 482770 2699260 ) ( * 2730370 )
+ NEW met2 ( 1283630 1178780 ) ( * 1179630 )
+ NEW met2 ( 880670 1179630 ) ( * 2730370 )
+ NEW met1 ( 482770 2730370 ) ( 880670 * )
+ NEW met1 ( 880670 1179630 ) ( 1283630 * )
+ NEW met3 ( 1283630 1178780 ) ( 1300420 * 0 )
+ NEW met1 ( 482770 2730370 ) M1M2_PR
+ NEW met1 ( 880670 1179630 ) M1M2_PR
+ NEW met1 ( 880670 2730370 ) M1M2_PR
+ NEW met1 ( 1283630 1179630 ) M1M2_PR
+ NEW met2 ( 1283630 1178780 ) M2M3_PR_M ;
+ - core0_to_mem_data\[66\] ( core0 mem_data_out[66] ) ( chip_controller wr_data[66] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2561900 0 ) ( 607430 * )
+ NEW met2 ( 607430 2560030 ) ( * 2561900 )
+ NEW met1 ( 1391270 1756270 ) ( 2263430 * )
+ NEW met1 ( 607430 2560030 ) ( 1391270 * )
+ NEW met2 ( 1391270 1756270 ) ( * 2560030 )
+ NEW met2 ( 2263430 1699660 ) ( 2265270 * 0 )
+ NEW met2 ( 2263430 1699660 ) ( * 1756270 )
+ NEW met2 ( 607430 2561900 ) M2M3_PR_M
+ NEW met1 ( 607430 2560030 ) M1M2_PR
+ NEW met1 ( 1391270 1756270 ) M1M2_PR
+ NEW met1 ( 2263430 1756270 ) M1M2_PR
+ NEW met1 ( 1391270 2560030 ) M1M2_PR ;
+ - core0_to_mem_data\[67\] ( core0 mem_data_out[67] ) ( chip_controller wr_data[67] ) + USE SIGNAL
+ + ROUTED met2 ( 487830 2699260 0 ) ( 488750 * )
+ NEW met2 ( 488750 2699260 ) ( * 2727990 )
+ NEW met1 ( 488750 2727990 ) ( 1503970 * )
+ NEW met2 ( 1503970 1714110 ) ( * 2727990 )
+ NEW met2 ( 2284130 1699660 0 ) ( * 1714110 )
+ NEW met1 ( 1503970 1714110 ) ( 2284130 * )
+ NEW met1 ( 488750 2727990 ) M1M2_PR
+ NEW met1 ( 1503970 2727990 ) M1M2_PR
+ NEW met1 ( 1503970 1714110 ) M1M2_PR
+ NEW met1 ( 2284130 1714110 ) M1M2_PR ;
+ - core0_to_mem_data\[68\] ( core0 mem_data_out[68] ) ( chip_controller wr_data[68] ) + USE SIGNAL
+ + ROUTED met2 ( 488290 2300100 0 ) ( 489210 * )
+ NEW met2 ( 489210 1200370 ) ( * 2300100 )
+ NEW met2 ( 1283630 1196460 ) ( * 1200370 )
+ NEW met1 ( 489210 1200370 ) ( 1283630 * )
+ NEW met3 ( 1283630 1196460 ) ( 1300420 * 0 )
+ NEW met1 ( 489210 1200370 ) M1M2_PR
+ NEW met1 ( 1283630 1200370 ) M1M2_PR
+ NEW met2 ( 1283630 1196460 ) M2M3_PR_M ;
+ - core0_to_mem_data\[69\] ( core0 mem_data_out[69] ) ( chip_controller wr_data[69] ) + USE SIGNAL
+ + ROUTED met2 ( 2422130 200260 ) ( 2428570 * 0 )
+ NEW met3 ( 599380 2572780 0 ) ( 608810 * )
+ NEW met2 ( 608810 2567170 ) ( * 2572780 )
+ NEW met2 ( 2422130 175610 ) ( * 200260 )
+ NEW met1 ( 608810 2567170 ) ( 1142870 * )
+ NEW met2 ( 1142870 175610 ) ( * 2567170 )
+ NEW met1 ( 1142870 175610 ) ( 2422130 * )
+ NEW met2 ( 608810 2572780 ) M2M3_PR_M
+ NEW met1 ( 608810 2567170 ) M1M2_PR
+ NEW met1 ( 2422130 175610 ) M1M2_PR
+ NEW met1 ( 1142870 175610 ) M1M2_PR
+ NEW met1 ( 1142870 2567170 ) M1M2_PR ;
+ - core0_to_mem_data\[6\] ( core0 mem_data_out[6] ) ( chip_controller wr_data[6] ) + USE SIGNAL
+ + ROUTED met2 ( 1458890 198050 ) ( * 200260 0 )
+ NEW met1 ( 268410 198050 ) ( 1458890 * )
+ NEW met2 ( 267950 2300100 0 ) ( 268410 * )
+ NEW met2 ( 268410 198050 ) ( * 2300100 )
+ NEW met1 ( 1458890 198050 ) M1M2_PR
+ NEW met1 ( 268410 198050 ) M1M2_PR ;
+ - core0_to_mem_data\[70\] ( core0 mem_data_out[70] ) ( chip_controller wr_data[70] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 1062500 0 ) ( 2816350 * )
+ NEW met1 ( 495650 2283950 ) ( 496570 * )
+ NEW met2 ( 496570 2283950 ) ( * 2300100 0 )
+ NEW met2 ( 495650 1708330 ) ( * 2283950 )
+ NEW met2 ( 2816350 1062500 ) ( * 1708330 )
+ NEW met1 ( 495650 1708330 ) ( 2816350 * )
+ NEW met2 ( 2816350 1062500 ) M2M3_PR_M
+ NEW met1 ( 495650 1708330 ) M1M2_PR
+ NEW met1 ( 495650 2283950 ) M1M2_PR
+ NEW met1 ( 496570 2283950 ) M1M2_PR
+ NEW met1 ( 2816350 1708330 ) M1M2_PR ;
+ - core0_to_mem_data\[71\] ( core0 mem_data_out[71] ) ( chip_controller wr_data[71] ) + USE SIGNAL
+ + ROUTED met2 ( 501630 2300100 0 ) ( 502550 * )
+ NEW met2 ( 502550 1722270 ) ( * 2300100 )
+ NEW met2 ( 2321850 1699660 0 ) ( * 1722270 )
+ NEW met1 ( 502550 1722270 ) ( 2321850 * )
+ NEW met1 ( 502550 1722270 ) M1M2_PR
+ NEW met1 ( 2321850 1722270 ) M1M2_PR ;
+ - core0_to_mem_data\[72\] ( core0 mem_data_out[72] ) ( chip_controller wr_data[72] ) + USE SIGNAL
+ + ROUTED met2 ( 127190 1672970 ) ( * 2554250 )
+ NEW met2 ( 189750 2554250 ) ( * 2557140 )
+ NEW met3 ( 189750 2557140 ) ( 200100 * )
+ NEW met3 ( 200100 2556460 0 ) ( * 2557140 )
+ NEW met2 ( 1285010 1249500 ) ( * 1672970 )
+ NEW met1 ( 127190 1672970 ) ( 1285010 * )
+ NEW met3 ( 1285010 1249500 ) ( 1300420 * 0 )
+ NEW met1 ( 127190 2554250 ) ( 189750 * )
+ NEW met1 ( 127190 1672970 ) M1M2_PR
+ NEW met2 ( 1285010 1249500 ) M2M3_PR_M
+ NEW met1 ( 1285010 1672970 ) M1M2_PR
+ NEW met1 ( 127190 2554250 ) M1M2_PR
+ NEW met1 ( 189750 2554250 ) M1M2_PR
+ NEW met2 ( 189750 2557140 ) M2M3_PR_M ;
+ - core0_to_mem_data\[73\] ( core0 mem_data_out[73] ) ( chip_controller wr_data[73] ) + USE SIGNAL
+ + ROUTED li1 ( 493810 2695010 ) ( * 2699430 )
+ NEW met2 ( 493810 2699260 ) ( * 2699430 )
+ NEW met2 ( 492890 2699260 0 ) ( 493810 * )
+ NEW met2 ( 1283630 1267180 ) ( * 1269390 )
+ NEW met2 ( 963470 1269390 ) ( * 2695010 )
+ NEW met1 ( 963470 1269390 ) ( 1283630 * )
+ NEW met3 ( 1283630 1267180 ) ( 1300420 * 0 )
+ NEW met1 ( 493810 2695010 ) ( 963470 * )
+ NEW li1 ( 493810 2695010 ) L1M1_PR_MR
+ NEW li1 ( 493810 2699430 ) L1M1_PR_MR
+ NEW met1 ( 493810 2699430 ) M1M2_PR
+ NEW met1 ( 963470 1269390 ) M1M2_PR
+ NEW met1 ( 963470 2695010 ) M1M2_PR
+ NEW met1 ( 1283630 1269390 ) M1M2_PR
+ NEW met2 ( 1283630 1267180 ) M2M3_PR_M
+ NEW met1 ( 493810 2699430 ) RECT ( -355 -70 0 70 ) ;
+ - core0_to_mem_data\[74\] ( core0 mem_data_out[74] ) ( chip_controller wr_data[74] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 1080180 0 ) ( 2808990 * )
+ NEW met3 ( 599380 2587060 0 ) ( 609270 * )
+ NEW met2 ( 609270 2580770 ) ( * 2587060 )
+ NEW met1 ( 609270 2580770 ) ( 1390810 * )
+ NEW met2 ( 1390810 1703230 ) ( * 2580770 )
+ NEW met1 ( 1390810 1703230 ) ( 2808990 * )
+ NEW met2 ( 2808990 1080180 ) ( * 1703230 )
+ NEW met2 ( 2808990 1080180 ) M2M3_PR_M
+ NEW met2 ( 609270 2587060 ) M2M3_PR_M
+ NEW met1 ( 609270 2580770 ) M1M2_PR
+ NEW met1 ( 2808990 1703230 ) M1M2_PR
+ NEW met1 ( 1390810 1703230 ) M1M2_PR
+ NEW met1 ( 1390810 2580770 ) M1M2_PR ;
+ - core0_to_mem_data\[75\] ( core0 mem_data_out[75] ) ( chip_controller wr_data[75] ) + USE SIGNAL
+ + ROUTED met2 ( 497490 2699940 ) ( 497950 * 0 )
+ NEW met2 ( 497490 2699940 ) ( * 2747030 )
+ NEW met3 ( 2799100 1097860 0 ) ( 2805770 * )
+ NEW met1 ( 497490 2747030 ) ( 1500750 * )
+ NEW met2 ( 1500750 1704250 ) ( * 2747030 )
+ NEW met1 ( 1500750 1704250 ) ( 2805770 * )
+ NEW met2 ( 2805770 1097860 ) ( * 1704250 )
+ NEW met1 ( 497490 2747030 ) M1M2_PR
+ NEW met2 ( 2805770 1097860 ) M2M3_PR_M
+ NEW met1 ( 2805770 1704250 ) M1M2_PR
+ NEW met1 ( 1500750 1704250 ) M1M2_PR
+ NEW met1 ( 1500750 2747030 ) M1M2_PR ;
+ - core0_to_mem_data\[76\] ( core0 mem_data_out[76] ) ( chip_controller wr_data[76] ) + USE SIGNAL
+ + ROUTED met2 ( 187450 2561050 ) ( * 2563260 )
+ NEW met3 ( 187450 2563260 ) ( 201020 * )
+ NEW met3 ( 201020 2563260 ) ( * 2563940 0 )
+ NEW met1 ( 168590 2561050 ) ( 187450 * )
+ NEW met2 ( 2376130 1699660 ) ( 2377970 * 0 )
+ NEW met1 ( 168590 1791970 ) ( 2376130 * )
+ NEW met2 ( 2376130 1699660 ) ( * 1791970 )
+ NEW met2 ( 168590 1791970 ) ( * 2561050 )
+ NEW met1 ( 187450 2561050 ) M1M2_PR
+ NEW met2 ( 187450 2563260 ) M2M3_PR_M
+ NEW met1 ( 168590 1791970 ) M1M2_PR
+ NEW met1 ( 168590 2561050 ) M1M2_PR
+ NEW met1 ( 2376130 1791970 ) M1M2_PR ;
+ - core0_to_mem_data\[77\] ( core0 mem_data_out[77] ) ( chip_controller wr_data[77] ) + USE SIGNAL
+ + ROUTED met2 ( 501630 2699260 0 ) ( 502550 * )
+ NEW met2 ( 502550 2699260 ) ( * 2727140 )
+ NEW met3 ( 502550 2727140 ) ( 1299270 * )
+ NEW met2 ( 2474110 188020 ) ( * 200260 0 )
+ NEW met3 ( 1299270 188020 ) ( 2474110 * )
+ NEW met2 ( 1299270 188020 ) ( * 2727140 )
+ NEW met2 ( 502550 2727140 ) M2M3_PR_M
+ NEW met2 ( 1299270 188020 ) M2M3_PR_M
+ NEW met2 ( 1299270 2727140 ) M2M3_PR_M
+ NEW met2 ( 2474110 188020 ) M2M3_PR_M ;
+ - core0_to_mem_data\[78\] ( core0 mem_data_out[78] ) ( chip_controller wr_data[78] ) + USE SIGNAL
+ + ROUTED met2 ( 108330 1693540 ) ( * 2567850 )
+ NEW met2 ( 188830 2567850 ) ( * 2570740 )
+ NEW met3 ( 188830 2570740 ) ( 201020 * )
+ NEW met3 ( 201020 2570740 ) ( * 2571420 0 )
+ NEW met3 ( 2794500 1693540 ) ( * 1694220 )
+ NEW met3 ( 2794500 1694220 ) ( 2812900 * )
+ NEW met1 ( 108330 2567850 ) ( 188830 * )
+ NEW met3 ( 108330 1693540 ) ( 2794500 * )
+ NEW met3 ( 2799100 1132540 0 ) ( 2812900 * )
+ NEW met4 ( 2812900 1132540 ) ( * 1694220 )
+ NEW met2 ( 108330 1693540 ) M2M3_PR_M
+ NEW met1 ( 108330 2567850 ) M1M2_PR
+ NEW met1 ( 188830 2567850 ) M1M2_PR
+ NEW met2 ( 188830 2570740 ) M2M3_PR_M
+ NEW met3 ( 2812900 1694220 ) M3M4_PR_M
+ NEW met3 ( 2812900 1132540 ) M3M4_PR_M ;
+ - core0_to_mem_data\[79\] ( core0 mem_data_out[79] ) ( chip_controller wr_data[79] ) + USE SIGNAL
+ + ROUTED met2 ( 514970 2300100 0 ) ( 516350 * )
+ NEW met2 ( 516350 1324470 ) ( * 2300100 )
+ NEW met2 ( 1283630 1320220 ) ( * 1324470 )
+ NEW met1 ( 516350 1324470 ) ( 1283630 * )
+ NEW met3 ( 1283630 1320220 ) ( 1300420 * 0 )
+ NEW met1 ( 516350 1324470 ) M1M2_PR
+ NEW met1 ( 1283630 1324470 ) M1M2_PR
+ NEW met2 ( 1283630 1320220 ) M2M3_PR_M ;
+ - core0_to_mem_data\[7\] ( core0 mem_data_out[7] ) ( chip_controller wr_data[7] ) + USE SIGNAL
+ + ROUTED met3 ( 196190 2349060 ) ( 201020 * )
+ NEW met3 ( 201020 2349060 ) ( * 2349740 0 )
+ NEW met2 ( 1518230 200260 ) ( 1519610 * 0 )
+ NEW met1 ( 193890 170510 ) ( 227700 * )
+ NEW met1 ( 227700 170170 ) ( * 170510 )
+ NEW met1 ( 227700 170170 ) ( 1518230 * )
+ NEW met2 ( 1518230 170170 ) ( * 200260 )
+ NEW met1 ( 193890 2308090 ) ( 196190 * )
+ NEW met2 ( 193890 170510 ) ( * 2308090 )
+ NEW met2 ( 196190 2308090 ) ( * 2349060 )
+ NEW met2 ( 196190 2349060 ) M2M3_PR_M
+ NEW met1 ( 193890 170510 ) M1M2_PR
+ NEW met1 ( 1518230 170170 ) M1M2_PR
+ NEW met1 ( 193890 2308090 ) M1M2_PR
+ NEW met1 ( 196190 2308090 ) M1M2_PR ;
+ - core0_to_mem_data\[80\] ( core0 mem_data_out[80] ) ( chip_controller wr_data[80] ) + USE SIGNAL
+ + ROUTED met2 ( 505310 2699940 ) ( 506690 * 0 )
+ NEW met2 ( 505310 2699940 ) ( * 2740570 )
+ NEW met2 ( 2792890 1242000 ) ( 2794270 * )
+ NEW met2 ( 2792890 1242000 ) ( * 1698470 )
+ NEW met1 ( 505310 2740570 ) ( 1503510 * )
+ NEW met2 ( 1503510 1698470 ) ( * 2740570 )
+ NEW met1 ( 1503510 1698470 ) ( 2792890 * )
+ NEW met2 ( 2794270 1151410 ) ( 2794730 * )
+ NEW met1 ( 2794730 1151410 ) ( 2798870 * )
+ NEW met2 ( 2798870 1151410 ) ( * 1151580 )
+ NEW met3 ( 2798870 1151580 ) ( 2799100 * )
+ NEW met3 ( 2799100 1150220 0 ) ( * 1151580 )
+ NEW met2 ( 2794270 1151410 ) ( * 1242000 )
+ NEW met1 ( 505310 2740570 ) M1M2_PR
+ NEW met1 ( 2792890 1698470 ) M1M2_PR
+ NEW met1 ( 1503510 1698470 ) M1M2_PR
+ NEW met1 ( 1503510 2740570 ) M1M2_PR
+ NEW met1 ( 2794730 1151410 ) M1M2_PR
+ NEW met1 ( 2798870 1151410 ) M1M2_PR
+ NEW met2 ( 2798870 1151580 ) M2M3_PR_M ;
+ - core0_to_mem_data\[81\] ( core0 mem_data_out[81] ) ( chip_controller wr_data[81] ) + USE SIGNAL
+ + ROUTED met2 ( 121210 1790950 ) ( * 2574310 )
+ NEW met2 ( 186990 2574140 ) ( * 2574310 )
+ NEW met3 ( 186990 2574140 ) ( 201020 * )
+ NEW met3 ( 201020 2574140 ) ( * 2574820 0 )
+ NEW met1 ( 121210 2574310 ) ( 186990 * )
+ NEW met2 ( 2394530 1699660 ) ( 2396830 * 0 )
+ NEW met1 ( 121210 1790950 ) ( 2394530 * )
+ NEW met2 ( 2394530 1699660 ) ( * 1790950 )
+ NEW met1 ( 121210 1790950 ) M1M2_PR
+ NEW met1 ( 121210 2574310 ) M1M2_PR
+ NEW met1 ( 186990 2574310 ) M1M2_PR
+ NEW met2 ( 186990 2574140 ) M2M3_PR_M
+ NEW met1 ( 2394530 1790950 ) M1M2_PR ;
+ - core0_to_mem_data\[82\] ( core0 mem_data_out[82] ) ( chip_controller wr_data[82] ) + USE SIGNAL
+ + ROUTED met2 ( 102350 1700340 ) ( * 2573970 )
+ NEW met2 ( 189290 2573970 ) ( * 2579580 )
+ NEW met3 ( 189290 2579580 ) ( 201020 * )
+ NEW met3 ( 201020 2579580 ) ( * 2580260 0 )
+ NEW met1 ( 102350 2573970 ) ( 189290 * )
+ NEW met3 ( 102350 1700340 ) ( 2813820 * )
+ NEW met3 ( 2799100 1167220 0 ) ( 2813820 * )
+ NEW met4 ( 2813820 1167220 ) ( * 1700340 )
+ NEW met2 ( 102350 1700340 ) M2M3_PR_M
+ NEW met1 ( 102350 2573970 ) M1M2_PR
+ NEW met1 ( 189290 2573970 ) M1M2_PR
+ NEW met2 ( 189290 2579580 ) M2M3_PR_M
+ NEW met3 ( 2813820 1700340 ) M3M4_PR_M
+ NEW met3 ( 2813820 1167220 ) M3M4_PR_M ;
+ - core0_to_mem_data\[83\] ( core0 mem_data_out[83] ) ( chip_controller wr_data[83] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2606100 0 ) ( 607430 * )
+ NEW met2 ( 607430 2602190 ) ( * 2606100 )
+ NEW met2 ( 2502630 202300 ) ( 2504470 * 0 )
+ NEW met2 ( 1163570 202980 ) ( * 2602190 )
+ NEW met1 ( 607430 2602190 ) ( 1163570 * )
+ NEW met3 ( 1163570 202980 ) ( 2449500 * )
+ NEW met3 ( 2449500 202300 ) ( * 202980 )
+ NEW met3 ( 2449500 202300 ) ( 2502630 * )
+ NEW met2 ( 607430 2606100 ) M2M3_PR_M
+ NEW met1 ( 607430 2602190 ) M1M2_PR
+ NEW met2 ( 1163570 202980 ) M2M3_PR_M
+ NEW met1 ( 1163570 2602190 ) M1M2_PR
+ NEW met2 ( 2502630 202300 ) M2M3_PR_M ;
+ - core0_to_mem_data\[84\] ( core0 mem_data_out[84] ) ( chip_controller wr_data[84] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2608820 0 ) ( 607430 * )
+ NEW met2 ( 607430 2608820 ) ( * 2609330 )
+ NEW met2 ( 2518730 200260 ) ( 2519650 * 0 )
+ NEW met2 ( 2518730 171530 ) ( * 200260 )
+ NEW met1 ( 607430 2609330 ) ( 811670 * )
+ NEW met2 ( 811670 171530 ) ( * 2609330 )
+ NEW met1 ( 811670 171530 ) ( 2518730 * )
+ NEW met2 ( 607430 2608820 ) M2M3_PR_M
+ NEW met1 ( 607430 2609330 ) M1M2_PR
+ NEW met1 ( 2518730 171530 ) M1M2_PR
+ NEW met1 ( 811670 2609330 ) M1M2_PR
+ NEW met1 ( 811670 171530 ) M1M2_PR ;
+ - core0_to_mem_data\[85\] ( core0 mem_data_out[85] ) ( chip_controller wr_data[85] ) + USE SIGNAL
+ + ROUTED met2 ( 2532990 202980 ) ( 2534830 * 0 )
+ NEW met2 ( 2532990 202980 ) ( * 203150 )
+ NEW met2 ( 1148850 205530 ) ( * 2287180 )
+ NEW met1 ( 1148850 205530 ) ( 2449500 * )
+ NEW met1 ( 2449500 203150 ) ( * 205530 )
+ NEW met1 ( 2449500 203150 ) ( 2532990 * )
+ NEW met2 ( 526930 2287180 ) ( * 2300100 0 )
+ NEW met3 ( 526930 2287180 ) ( 1148850 * )
+ NEW met1 ( 1148850 205530 ) M1M2_PR
+ NEW met1 ( 2532990 203150 ) M1M2_PR
+ NEW met2 ( 1148850 2287180 ) M2M3_PR_M
+ NEW met2 ( 526930 2287180 ) M2M3_PR_M ;
+ - core0_to_mem_data\[86\] ( core0 mem_data_out[86] ) ( chip_controller wr_data[86] ) + USE SIGNAL
+ + ROUTED met3 ( 193430 2592500 ) ( 201020 * )
+ NEW met3 ( 201020 2592500 ) ( * 2593180 0 )
+ NEW met2 ( 2546330 200260 ) ( 2550010 * 0 )
+ NEW met1 ( 193430 172210 ) ( 2546330 * )
+ NEW met2 ( 2546330 172210 ) ( * 200260 )
+ NEW met2 ( 193430 172210 ) ( * 2592500 )
+ NEW met1 ( 193430 172210 ) M1M2_PR
+ NEW met2 ( 193430 2592500 ) M2M3_PR_M
+ NEW met1 ( 2546330 172210 ) M1M2_PR ;
+ - core0_to_mem_data\[87\] ( core0 mem_data_out[87] ) ( chip_controller wr_data[87] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2613580 0 ) ( 613870 * )
+ NEW met3 ( 2799100 1219580 0 ) ( 2810830 * )
+ NEW met2 ( 2810830 1219580 ) ( * 1220430 )
+ NEW met1 ( 2810830 1220430 ) ( 2825090 * )
+ NEW met2 ( 2825090 1220430 ) ( * 1809990 )
+ NEW met1 ( 613870 1809990 ) ( 2825090 * )
+ NEW met2 ( 613870 1809990 ) ( * 2613580 )
+ NEW met2 ( 613870 2613580 ) M2M3_PR_M
+ NEW met1 ( 613870 1809990 ) M1M2_PR
+ NEW met2 ( 2810830 1219580 ) M2M3_PR_M
+ NEW met1 ( 2810830 1220430 ) M1M2_PR
+ NEW met1 ( 2825090 1220430 ) M1M2_PR
+ NEW met1 ( 2825090 1809990 ) M1M2_PR ;
+ - core0_to_mem_data\[88\] ( core0 mem_data_out[88] ) ( chip_controller wr_data[88] ) + USE SIGNAL
+ + ROUTED met3 ( 2798870 1256300 ) ( 2799100 * )
+ NEW met3 ( 2799100 1254940 0 ) ( * 1256300 )
+ NEW met2 ( 2798870 1256300 ) ( * 1708670 )
+ NEW met1 ( 531990 2284290 ) ( 536590 * )
+ NEW met2 ( 531990 2284290 ) ( * 2300100 0 )
+ NEW met2 ( 536590 1708670 ) ( * 2284290 )
+ NEW met1 ( 536590 1708670 ) ( 2798870 * )
+ NEW met2 ( 2798870 1256300 ) M2M3_PR_M
+ NEW met1 ( 2798870 1708670 ) M1M2_PR
+ NEW met1 ( 536590 1708670 ) M1M2_PR
+ NEW met1 ( 536590 2284290 ) M1M2_PR
+ NEW met1 ( 531990 2284290 ) M1M2_PR ;
+ - core0_to_mem_data\[89\] ( core0 mem_data_out[89] ) ( chip_controller wr_data[89] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 1271940 0 ) ( 2806230 * )
+ NEW met2 ( 2806230 1271940 ) ( * 1703570 )
+ NEW met2 ( 521410 2699940 ) ( 522330 * 0 )
+ NEW met2 ( 521410 2699940 ) ( * 2717450 )
+ NEW met1 ( 518650 2717450 ) ( 521410 * )
+ NEW met2 ( 518650 2717450 ) ( * 2747370 )
+ NEW met1 ( 518650 2747370 ) ( 1486950 * )
+ NEW met2 ( 1486950 1703570 ) ( * 2747370 )
+ NEW met1 ( 1486950 1703570 ) ( 2806230 * )
+ NEW met2 ( 2806230 1271940 ) M2M3_PR_M
+ NEW met1 ( 2806230 1703570 ) M1M2_PR
+ NEW met1 ( 521410 2717450 ) M1M2_PR
+ NEW met1 ( 518650 2717450 ) M1M2_PR
+ NEW met1 ( 518650 2747370 ) M1M2_PR
+ NEW met1 ( 1486950 1703570 ) M1M2_PR
+ NEW met1 ( 1486950 2747370 ) M1M2_PR ;
+ - core0_to_mem_data\[8\] ( core0 mem_data_out[8] ) ( chip_controller wr_data[8] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 472940 ) ( * 475830 )
+ NEW met2 ( 266570 2699260 0 ) ( 267950 * )
+ NEW met2 ( 267950 2699260 ) ( * 2729350 )
+ NEW met1 ( 267950 2729350 ) ( 845710 * )
+ NEW met1 ( 845710 475830 ) ( 1283630 * )
+ NEW met3 ( 1283630 472940 ) ( 1300420 * 0 )
+ NEW met2 ( 845710 475830 ) ( * 2729350 )
+ NEW met1 ( 1283630 475830 ) M1M2_PR
+ NEW met2 ( 1283630 472940 ) M2M3_PR_M
+ NEW met1 ( 267950 2729350 ) M1M2_PR
+ NEW met1 ( 845710 475830 ) M1M2_PR
+ NEW met1 ( 845710 2729350 ) M1M2_PR ;
+ - core0_to_mem_data\[90\] ( core0 mem_data_out[90] ) ( chip_controller wr_data[90] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2621740 0 ) ( 608350 * )
+ NEW met2 ( 608350 2615450 ) ( * 2621740 )
+ NEW met3 ( 2799100 1307300 0 ) ( 2810830 * )
+ NEW met2 ( 2810830 1307300 ) ( * 1695750 )
+ NEW met1 ( 608350 2615450 ) ( 1404150 * )
+ NEW met1 ( 1404150 1695750 ) ( * 1696770 )
+ NEW met2 ( 1404150 1696770 ) ( * 2615450 )
+ NEW met1 ( 1404150 1695750 ) ( 2810830 * )
+ NEW met2 ( 608350 2621740 ) M2M3_PR_M
+ NEW met1 ( 608350 2615450 ) M1M2_PR
+ NEW met2 ( 2810830 1307300 ) M2M3_PR_M
+ NEW met1 ( 2810830 1695750 ) M1M2_PR
+ NEW met1 ( 1404150 2615450 ) M1M2_PR
+ NEW met1 ( 1404150 1696770 ) M1M2_PR ;
+ - core0_to_mem_data\[91\] ( core0 mem_data_out[91] ) ( chip_controller wr_data[91] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2623100 0 ) ( 607890 * )
+ NEW met2 ( 607890 2622250 ) ( * 2623100 )
+ NEW met2 ( 1356770 1749470 ) ( * 2622250 )
+ NEW met1 ( 607890 2622250 ) ( 1356770 * )
+ NEW met1 ( 1356770 1749470 ) ( 2488370 * )
+ NEW met2 ( 2488370 1699660 ) ( 2490670 * 0 )
+ NEW met2 ( 2488370 1699660 ) ( * 1749470 )
+ NEW met2 ( 607890 2623100 ) M2M3_PR_M
+ NEW met1 ( 607890 2622250 ) M1M2_PR
+ NEW met1 ( 1356770 1749470 ) M1M2_PR
+ NEW met1 ( 1356770 2622250 ) M1M2_PR
+ NEW met1 ( 2488370 1749470 ) M1M2_PR ;
+ - core0_to_mem_data\[92\] ( core0 mem_data_out[92] ) ( chip_controller wr_data[92] ) + USE SIGNAL
+ + ROUTED met2 ( 188830 2601510 ) ( * 2603380 )
+ NEW met3 ( 188830 2603380 ) ( 201020 * )
+ NEW met3 ( 201020 2603380 ) ( * 2604060 0 )
+ NEW met3 ( 2799100 1341980 0 ) ( 2811290 * )
+ NEW met2 ( 94070 1693710 ) ( * 2601510 )
+ NEW met2 ( 2811290 1341980 ) ( * 1693710 )
+ NEW met1 ( 94070 2601510 ) ( 188830 * )
+ NEW met1 ( 94070 1693710 ) ( 2811290 * )
+ NEW met1 ( 94070 2601510 ) M1M2_PR
+ NEW met1 ( 188830 2601510 ) M1M2_PR
+ NEW met2 ( 188830 2603380 ) M2M3_PR_M
+ NEW met2 ( 2811290 1341980 ) M2M3_PR_M
+ NEW met1 ( 94070 1693710 ) M1M2_PR
+ NEW met1 ( 2811290 1693710 ) M1M2_PR ;
+ - core0_to_mem_data\[93\] ( core0 mem_data_out[93] ) ( chip_controller wr_data[93] ) + USE SIGNAL
+ + ROUTED met3 ( 194580 2608140 ) ( 200100 * )
+ NEW met3 ( 200100 2607460 0 ) ( * 2608140 )
+ NEW met2 ( 2573930 200260 ) ( 2579910 * 0 )
+ NEW met3 ( 194580 172380 ) ( 2573930 * )
+ NEW met2 ( 2573930 172380 ) ( * 200260 )
+ NEW met4 ( 194580 172380 ) ( * 2608140 )
+ NEW met3 ( 194580 2608140 ) M3M4_PR_M
+ NEW met3 ( 194580 172380 ) M3M4_PR_M
+ NEW met2 ( 2573930 172380 ) M2M3_PR_M ;
+ - core0_to_mem_data\[94\] ( core0 mem_data_out[94] ) ( chip_controller wr_data[94] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2631260 0 ) ( 608350 * )
+ NEW met2 ( 608350 2629050 ) ( * 2631260 )
+ NEW met3 ( 2799100 1358980 0 ) ( 2812210 * )
+ NEW met2 ( 2812210 1358980 ) ( * 1695070 )
+ NEW met1 ( 608350 2629050 ) ( 1336070 * )
+ NEW met1 ( 1336070 1695070 ) ( * 1696770 )
+ NEW met2 ( 1336070 1696770 ) ( * 2629050 )
+ NEW met1 ( 1336070 1695070 ) ( 2812210 * )
+ NEW met2 ( 608350 2631260 ) M2M3_PR_M
+ NEW met1 ( 608350 2629050 ) M1M2_PR
+ NEW met2 ( 2812210 1358980 ) M2M3_PR_M
+ NEW met1 ( 2812210 1695070 ) M1M2_PR
+ NEW met1 ( 1336070 2629050 ) M1M2_PR
+ NEW met1 ( 1336070 1696770 ) M1M2_PR ;
+ - core0_to_mem_data\[95\] ( core0 mem_data_out[95] ) ( chip_controller wr_data[95] ) + USE SIGNAL
+ + ROUTED met3 ( 193660 2614260 ) ( 201020 * )
+ NEW met3 ( 201020 2614260 ) ( * 2614940 0 )
+ NEW met2 ( 2594630 200260 ) ( 2595090 * 0 )
+ NEW met2 ( 2594630 179180 ) ( * 200260 )
+ NEW met3 ( 193660 179180 ) ( 2594630 * )
+ NEW met4 ( 193660 179180 ) ( * 2614260 )
+ NEW met3 ( 193660 2614260 ) M3M4_PR_M
+ NEW met3 ( 193660 179180 ) M3M4_PR_M
+ NEW met2 ( 2594630 179180 ) M2M3_PR_M ;
+ - core0_to_mem_data\[96\] ( core0 mem_data_out[96] ) ( chip_controller wr_data[96] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2637380 0 ) ( 608810 * )
+ NEW met2 ( 608810 2635850 ) ( * 2637380 )
+ NEW met2 ( 1383450 1729750 ) ( * 2635850 )
+ NEW met2 ( 2527930 1699660 0 ) ( * 1729750 )
+ NEW met1 ( 608810 2635850 ) ( 1383450 * )
+ NEW met1 ( 1383450 1729750 ) ( 2527930 * )
+ NEW met2 ( 608810 2637380 ) M2M3_PR_M
+ NEW met1 ( 608810 2635850 ) M1M2_PR
+ NEW met1 ( 1383450 1729750 ) M1M2_PR
+ NEW met1 ( 1383450 2635850 ) M1M2_PR
+ NEW met1 ( 2527930 1729750 ) M1M2_PR ;
+ - core0_to_mem_data\[97\] ( core0 mem_data_out[97] ) ( chip_controller wr_data[97] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 1411340 0 ) ( 2806690 * )
+ NEW met2 ( 2806690 1411340 ) ( * 1755930 )
+ NEW met1 ( 551310 1755930 ) ( 2806690 * )
+ NEW met1 ( 547170 2284290 ) ( 551310 * )
+ NEW met2 ( 547170 2284290 ) ( * 2300100 0 )
+ NEW met2 ( 551310 1755930 ) ( * 2284290 )
+ NEW met1 ( 2806690 1755930 ) M1M2_PR
+ NEW met2 ( 2806690 1411340 ) M2M3_PR_M
+ NEW met1 ( 551310 1755930 ) M1M2_PR
+ NEW met1 ( 551310 2284290 ) M1M2_PR
+ NEW met1 ( 547170 2284290 ) M1M2_PR ;
+ - core0_to_mem_data\[98\] ( core0 mem_data_out[98] ) ( chip_controller wr_data[98] ) + USE SIGNAL
+ + ROUTED met2 ( 190210 2615110 ) ( * 2619020 )
+ NEW met3 ( 190210 2619020 ) ( 200100 * )
+ NEW met3 ( 200100 2618340 0 ) ( * 2619020 )
+ NEW met2 ( 88090 1741990 ) ( * 2615110 )
+ NEW met1 ( 88090 2615110 ) ( 190210 * )
+ NEW met1 ( 88090 1741990 ) ( 2563810 * )
+ NEW met2 ( 2563810 1699660 ) ( 2565650 * 0 )
+ NEW met2 ( 2563810 1699660 ) ( * 1741990 )
+ NEW met1 ( 88090 1741990 ) M1M2_PR
+ NEW met1 ( 88090 2615110 ) M1M2_PR
+ NEW met1 ( 190210 2615110 ) M1M2_PR
+ NEW met2 ( 190210 2619020 ) M2M3_PR_M
+ NEW met1 ( 2563810 1741990 ) M1M2_PR ;
+ - core0_to_mem_data\[99\] ( core0 mem_data_out[99] ) ( chip_controller wr_data[99] ) + USE SIGNAL
+ + ROUTED met2 ( 894930 1414230 ) ( * 2731390 )
+ NEW met2 ( 1283630 1407940 ) ( * 1414230 )
+ NEW met2 ( 544870 2699260 0 ) ( 545330 * )
+ NEW met2 ( 545330 2699260 ) ( * 2700620 )
+ NEW met2 ( 544870 2700620 ) ( 545330 * )
+ NEW met2 ( 544870 2700620 ) ( * 2731390 )
+ NEW met1 ( 544870 2731390 ) ( 894930 * )
+ NEW met1 ( 894930 1414230 ) ( 1283630 * )
+ NEW met3 ( 1283630 1407940 ) ( 1300420 * 0 )
+ NEW met1 ( 894930 2731390 ) M1M2_PR
+ NEW met1 ( 894930 1414230 ) M1M2_PR
+ NEW met1 ( 1283630 1414230 ) M1M2_PR
+ NEW met2 ( 1283630 1407940 ) M2M3_PR_M
+ NEW met1 ( 544870 2731390 ) M1M2_PR ;
+ - core0_to_mem_data\[9\] ( core0 mem_data_out[9] ) ( chip_controller wr_data[9] ) + USE SIGNAL
+ + ROUTED met2 ( 284510 2289730 ) ( * 2300100 0 )
+ NEW met1 ( 284510 2289730 ) ( 431250 * )
+ NEW met2 ( 431250 1779050 ) ( * 2289730 )
+ NEW met2 ( 1607930 1699660 ) ( 1609310 * 0 )
+ NEW met1 ( 431250 1779050 ) ( 1607930 * )
+ NEW met2 ( 1607930 1699660 ) ( * 1779050 )
+ NEW met1 ( 284510 2289730 ) M1M2_PR
+ NEW met1 ( 431250 1779050 ) M1M2_PR
+ NEW met1 ( 431250 2289730 ) M1M2_PR
+ NEW met1 ( 1607930 1779050 ) M1M2_PR ;
- csb0_to_sram ( custom_sram csb0_to_sram ) ( chip_controller csb0_to_sram ) + USE SIGNAL
- + ROUTED met2 ( 202170 2199460 0 ) ( * 2222750 )
- NEW met2 ( 1342050 1787890 ) ( * 2222750 )
- NEW met1 ( 202170 2222750 ) ( 1342050 * )
- NEW met2 ( 1615290 1787890 ) ( * 1800300 0 )
- NEW met1 ( 1342050 1787890 ) ( 1615290 * )
- NEW met1 ( 202170 2222750 ) M1M2_PR
- NEW met1 ( 1342050 2222750 ) M1M2_PR
- NEW met1 ( 1342050 1787890 ) M1M2_PR
- NEW met1 ( 1615290 1787890 ) M1M2_PR ;
- - data_out_to_core\[0\] ( chip_controller data_out_to_core[0] ) + USE SIGNAL ;
- - data_out_to_core\[10\] ( chip_controller data_out_to_core[10] ) + USE SIGNAL ;
- - data_out_to_core\[11\] ( chip_controller data_out_to_core[11] ) + USE SIGNAL ;
- - data_out_to_core\[12\] ( chip_controller data_out_to_core[12] ) + USE SIGNAL ;
- - data_out_to_core\[13\] ( chip_controller data_out_to_core[13] ) + USE SIGNAL ;
- - data_out_to_core\[14\] ( chip_controller data_out_to_core[14] ) + USE SIGNAL ;
- - data_out_to_core\[15\] ( chip_controller data_out_to_core[15] ) + USE SIGNAL ;
- - data_out_to_core\[16\] ( chip_controller data_out_to_core[16] ) + USE SIGNAL ;
- - data_out_to_core\[17\] ( chip_controller data_out_to_core[17] ) + USE SIGNAL ;
- - data_out_to_core\[18\] ( chip_controller data_out_to_core[18] ) + USE SIGNAL ;
- - data_out_to_core\[19\] ( chip_controller data_out_to_core[19] ) + USE SIGNAL ;
- - data_out_to_core\[1\] ( chip_controller data_out_to_core[1] ) + USE SIGNAL ;
- - data_out_to_core\[20\] ( chip_controller data_out_to_core[20] ) + USE SIGNAL ;
- - data_out_to_core\[21\] ( chip_controller data_out_to_core[21] ) + USE SIGNAL ;
- - data_out_to_core\[22\] ( chip_controller data_out_to_core[22] ) + USE SIGNAL ;
- - data_out_to_core\[23\] ( chip_controller data_out_to_core[23] ) + USE SIGNAL ;
- - data_out_to_core\[24\] ( chip_controller data_out_to_core[24] ) + USE SIGNAL ;
- - data_out_to_core\[25\] ( chip_controller data_out_to_core[25] ) + USE SIGNAL ;
- - data_out_to_core\[26\] ( chip_controller data_out_to_core[26] ) + USE SIGNAL ;
- - data_out_to_core\[27\] ( chip_controller data_out_to_core[27] ) + USE SIGNAL ;
- - data_out_to_core\[28\] ( chip_controller data_out_to_core[28] ) + USE SIGNAL ;
- - data_out_to_core\[29\] ( chip_controller data_out_to_core[29] ) + USE SIGNAL ;
- - data_out_to_core\[2\] ( chip_controller data_out_to_core[2] ) + USE SIGNAL ;
- - data_out_to_core\[30\] ( chip_controller data_out_to_core[30] ) + USE SIGNAL ;
- - data_out_to_core\[31\] ( chip_controller data_out_to_core[31] ) + USE SIGNAL ;
- - data_out_to_core\[3\] ( chip_controller data_out_to_core[3] ) + USE SIGNAL ;
- - data_out_to_core\[4\] ( chip_controller data_out_to_core[4] ) + USE SIGNAL ;
- - data_out_to_core\[5\] ( chip_controller data_out_to_core[5] ) + USE SIGNAL ;
- - data_out_to_core\[6\] ( chip_controller data_out_to_core[6] ) + USE SIGNAL ;
- - data_out_to_core\[7\] ( chip_controller data_out_to_core[7] ) + USE SIGNAL ;
- - data_out_to_core\[8\] ( chip_controller data_out_to_core[8] ) + USE SIGNAL ;
- - data_out_to_core\[9\] ( chip_controller data_out_to_core[9] ) + USE SIGNAL ;
+ + ROUTED met3 ( 599380 2302140 0 ) ( 606970 * )
+ NEW met2 ( 606970 2299250 ) ( * 2302140 )
+ NEW met1 ( 606970 2299250 ) ( 607430 * )
+ NEW met1 ( 607430 2298910 ) ( * 2299250 )
+ NEW met2 ( 1460730 1910970 ) ( * 2298910 )
+ NEW met1 ( 607430 2298910 ) ( 1460730 * )
+ NEW met2 ( 1490170 1909780 ) ( * 1910970 )
+ NEW met3 ( 1490170 1909780 ) ( 1500060 * 0 )
+ NEW met1 ( 1460730 1910970 ) ( 1490170 * )
+ NEW met2 ( 606970 2302140 ) M2M3_PR_M
+ NEW met1 ( 606970 2299250 ) M1M2_PR
+ NEW met1 ( 1460730 1910970 ) M1M2_PR
+ NEW met1 ( 1460730 2298910 ) M1M2_PR
+ NEW met1 ( 1490170 1910970 ) M1M2_PR
+ NEW met2 ( 1490170 1909780 ) M2M3_PR_M ;
+ - data_out_to_core\[0\] ( core0 read_interactive_value[0] ) ( chip_controller data_out_to_core[0] ) + USE SIGNAL
+ + ROUTED met2 ( 225630 2300100 0 ) ( 227010 * )
+ NEW met2 ( 227010 261970 ) ( * 2300100 )
+ NEW met2 ( 1283630 260780 ) ( * 261970 )
+ NEW met1 ( 227010 261970 ) ( 1283630 * )
+ NEW met3 ( 1283630 260780 ) ( 1300420 * 0 )
+ NEW met1 ( 227010 261970 ) M1M2_PR
+ NEW met1 ( 1283630 261970 ) M1M2_PR
+ NEW met2 ( 1283630 260780 ) M2M3_PR_M ;
+ - data_out_to_core\[10\] ( core0 read_interactive_value[10] ) ( chip_controller data_out_to_core[10] ) + USE SIGNAL
+ + ROUTED met2 ( 1549970 190570 ) ( * 200260 0 )
+ NEW met2 ( 673210 190570 ) ( * 2730710 )
+ NEW met2 ( 275310 2699260 0 ) ( 275770 * )
+ NEW met2 ( 275770 2699260 ) ( * 2730710 )
+ NEW met1 ( 275770 2730710 ) ( 673210 * )
+ NEW met1 ( 673210 190570 ) ( 1549970 * )
+ NEW met1 ( 673210 190570 ) M1M2_PR
+ NEW met1 ( 673210 2730710 ) M1M2_PR
+ NEW met1 ( 1549970 190570 ) M1M2_PR
+ NEW met1 ( 275770 2730710 ) M1M2_PR ;
+ - data_out_to_core\[11\] ( core0 read_interactive_value[11] ) ( chip_controller data_out_to_core[11] ) + USE SIGNAL
+ + ROUTED met1 ( 291410 2283950 ) ( 296010 * )
+ NEW met2 ( 291410 2283950 ) ( * 2300100 0 )
+ NEW met2 ( 296010 1777010 ) ( * 2283950 )
+ NEW met3 ( 2799100 452540 0 ) ( 2814970 * )
+ NEW met2 ( 2814970 449650 ) ( * 452540 )
+ NEW met1 ( 2814970 449650 ) ( 2843490 * )
+ NEW met1 ( 296010 1777010 ) ( 2843490 * )
+ NEW met2 ( 2843490 449650 ) ( * 1777010 )
+ NEW met1 ( 296010 1777010 ) M1M2_PR
+ NEW met1 ( 296010 2283950 ) M1M2_PR
+ NEW met1 ( 291410 2283950 ) M1M2_PR
+ NEW met2 ( 2814970 452540 ) M2M3_PR_M
+ NEW met1 ( 2814970 449650 ) M1M2_PR
+ NEW met1 ( 2843490 449650 ) M1M2_PR
+ NEW met1 ( 2843490 1777010 ) M1M2_PR ;
+ - data_out_to_core\[12\] ( core0 read_interactive_value[12] ) ( chip_controller data_out_to_core[12] ) + USE SIGNAL
+ + ROUTED met2 ( 1578030 200770 ) ( * 200940 )
+ NEW met2 ( 1578030 200940 ) ( 1579870 * 0 )
+ NEW met3 ( 599380 2374220 0 ) ( 607430 * )
+ NEW met2 ( 607430 2374050 ) ( * 2374220 )
+ NEW met1 ( 1128150 200770 ) ( 1578030 * )
+ NEW met1 ( 607430 2374050 ) ( 1128150 * )
+ NEW met2 ( 1128150 200770 ) ( * 2374050 )
+ NEW met1 ( 1578030 200770 ) M1M2_PR
+ NEW met2 ( 607430 2374220 ) M2M3_PR_M
+ NEW met1 ( 607430 2374050 ) M1M2_PR
+ NEW met1 ( 1128150 200770 ) M1M2_PR
+ NEW met1 ( 1128150 2374050 ) M1M2_PR ;
+ - data_out_to_core\[13\] ( core0 read_interactive_value[13] ) ( chip_controller data_out_to_core[13] ) + USE SIGNAL
+ + ROUTED met3 ( 197110 2389860 ) ( 200100 * )
+ NEW met3 ( 200100 2389180 0 ) ( * 2389860 )
+ NEW met2 ( 1683830 1699660 ) ( 1684290 * 0 )
+ NEW met1 ( 197110 1796390 ) ( 1683830 * )
+ NEW met2 ( 1683830 1699660 ) ( * 1796390 )
+ NEW met2 ( 197110 1796390 ) ( * 2389860 )
+ NEW met1 ( 197110 1796390 ) M1M2_PR
+ NEW met2 ( 197110 2389860 ) M2M3_PR_M
+ NEW met1 ( 1683830 1796390 ) M1M2_PR ;
+ - data_out_to_core\[14\] ( core0 read_interactive_value[14] ) ( chip_controller data_out_to_core[14] ) + USE SIGNAL
+ + ROUTED met2 ( 299230 2699940 ) ( 299690 * 0 )
+ NEW met2 ( 299230 2699940 ) ( * 2728330 )
+ NEW met2 ( 1655770 187170 ) ( * 200260 0 )
+ NEW met2 ( 1274890 187170 ) ( * 2728330 )
+ NEW met1 ( 299230 2728330 ) ( 1274890 * )
+ NEW met1 ( 1274890 187170 ) ( 1655770 * )
+ NEW met1 ( 299230 2728330 ) M1M2_PR
+ NEW met1 ( 1274890 187170 ) M1M2_PR
+ NEW met1 ( 1274890 2728330 ) M1M2_PR
+ NEW met1 ( 1655770 187170 ) M1M2_PR ;
+ - data_out_to_core\[15\] ( core0 read_interactive_value[15] ) ( chip_controller data_out_to_core[15] ) + USE SIGNAL
+ + ROUTED met2 ( 306590 2699260 0 ) ( 307970 * )
+ NEW met2 ( 307970 2699260 ) ( * 2725780 )
+ NEW met2 ( 1259250 188190 ) ( * 2725780 )
+ NEW met3 ( 307970 2725780 ) ( 1259250 * )
+ NEW met2 ( 1701310 188190 ) ( * 200260 0 )
+ NEW met1 ( 1259250 188190 ) ( 1701310 * )
+ NEW met2 ( 307970 2725780 ) M2M3_PR_M
+ NEW met1 ( 1259250 188190 ) M1M2_PR
+ NEW met2 ( 1259250 2725780 ) M2M3_PR_M
+ NEW met1 ( 1701310 188190 ) M1M2_PR ;
+ - data_out_to_core\[16\] ( core0 read_interactive_value[16] ) ( chip_controller data_out_to_core[16] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2399380 0 ) ( 607430 * )
+ NEW met2 ( 607430 2395810 ) ( * 2399380 )
+ NEW li1 ( 607430 2394450 ) ( * 2395810 )
+ NEW met2 ( 1349410 1730770 ) ( * 2394450 )
+ NEW met2 ( 1759270 1699660 0 ) ( * 1730770 )
+ NEW met1 ( 1349410 1730770 ) ( 1759270 * )
+ NEW met1 ( 607430 2394450 ) ( 1349410 * )
+ NEW met1 ( 1349410 1730770 ) M1M2_PR
+ NEW met1 ( 1759270 1730770 ) M1M2_PR
+ NEW met2 ( 607430 2399380 ) M2M3_PR_M
+ NEW li1 ( 607430 2395810 ) L1M1_PR_MR
+ NEW met1 ( 607430 2395810 ) M1M2_PR
+ NEW li1 ( 607430 2394450 ) L1M1_PR_MR
+ NEW met1 ( 1349410 2394450 ) M1M2_PR
+ NEW met1 ( 607430 2395810 ) RECT ( -355 -70 0 70 ) ;
+ - data_out_to_core\[17\] ( core0 read_interactive_value[17] ) ( chip_controller data_out_to_core[17] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2406180 0 ) ( 607430 * )
+ NEW met2 ( 607430 2406010 ) ( * 2406180 )
+ NEW met2 ( 1283630 666740 ) ( * 669290 )
+ NEW met1 ( 607430 2406010 ) ( 618930 * )
+ NEW met1 ( 618930 669290 ) ( 1283630 * )
+ NEW met3 ( 1283630 666740 ) ( 1300420 * 0 )
+ NEW met2 ( 618930 669290 ) ( * 2406010 )
+ NEW met2 ( 607430 2406180 ) M2M3_PR_M
+ NEW met1 ( 607430 2406010 ) M1M2_PR
+ NEW met1 ( 1283630 669290 ) M1M2_PR
+ NEW met2 ( 1283630 666740 ) M2M3_PR_M
+ NEW met1 ( 618930 669290 ) M1M2_PR
+ NEW met1 ( 618930 2406010 ) M1M2_PR ;
+ - data_out_to_core\[18\] ( core0 read_interactive_value[18] ) ( chip_controller data_out_to_core[18] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2415020 0 ) ( 607430 * )
+ NEW met2 ( 607430 2415020 ) ( * 2415190 )
+ NEW met1 ( 607430 2415190 ) ( 1315830 * )
+ NEW met1 ( 1315830 1730430 ) ( 1778130 * )
+ NEW met2 ( 1315830 1730430 ) ( * 2415190 )
+ NEW met2 ( 1778130 1699660 0 ) ( * 1730430 )
+ NEW met2 ( 607430 2415020 ) M2M3_PR_M
+ NEW met1 ( 607430 2415190 ) M1M2_PR
+ NEW met1 ( 1315830 1730430 ) M1M2_PR
+ NEW met1 ( 1315830 2415190 ) M1M2_PR
+ NEW met1 ( 1778130 1730430 ) M1M2_PR ;
+ - data_out_to_core\[19\] ( core0 read_interactive_value[19] ) ( chip_controller data_out_to_core[19] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 557260 0 ) ( 2812670 * )
+ NEW met2 ( 2812670 553010 ) ( * 557260 )
+ NEW met1 ( 344310 1749130 ) ( 2836590 * )
+ NEW met2 ( 341550 2260660 ) ( 344310 * )
+ NEW met2 ( 341550 2260660 ) ( * 2300100 )
+ NEW met2 ( 340170 2300100 0 ) ( 341550 * )
+ NEW met2 ( 344310 1749130 ) ( * 2260660 )
+ NEW met1 ( 2812670 553010 ) ( 2836590 * )
+ NEW met2 ( 2836590 553010 ) ( * 1749130 )
+ NEW met2 ( 2812670 557260 ) M2M3_PR_M
+ NEW met1 ( 2812670 553010 ) M1M2_PR
+ NEW met1 ( 344310 1749130 ) M1M2_PR
+ NEW met1 ( 2836590 1749130 ) M1M2_PR
+ NEW met1 ( 2836590 553010 ) M1M2_PR ;
+ - data_out_to_core\[1\] ( core0 read_interactive_value[1] ) ( chip_controller data_out_to_core[1] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 296140 ) ( * 296650 )
+ NEW met2 ( 217810 296650 ) ( * 2297890 )
+ NEW met1 ( 217810 296650 ) ( 1283630 * )
+ NEW met3 ( 1283630 296140 ) ( 1300420 * 0 )
+ NEW met3 ( 200100 2313020 0 ) ( * 2313700 )
+ NEW met3 ( 190670 2313700 ) ( 200100 * )
+ NEW met2 ( 190670 2297890 ) ( * 2313700 )
+ NEW met1 ( 190670 2297890 ) ( 217810 * )
+ NEW met1 ( 217810 296650 ) M1M2_PR
+ NEW met1 ( 1283630 296650 ) M1M2_PR
+ NEW met2 ( 1283630 296140 ) M2M3_PR_M
+ NEW met1 ( 217810 2297890 ) M1M2_PR
+ NEW met2 ( 190670 2313700 ) M2M3_PR_M
+ NEW met1 ( 190670 2297890 ) M1M2_PR ;
+ - data_out_to_core\[20\] ( core0 read_interactive_value[20] ) ( chip_controller data_out_to_core[20] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 737460 ) ( * 737970 )
+ NEW met2 ( 349830 737970 ) ( * 2256300 )
+ NEW met2 ( 347990 2256300 ) ( 349830 * )
+ NEW met2 ( 347990 2256300 ) ( * 2300100 )
+ NEW met2 ( 347070 2300100 0 ) ( 347990 * )
+ NEW met1 ( 349830 737970 ) ( 1283630 * )
+ NEW met3 ( 1283630 737460 ) ( 1300420 * 0 )
+ NEW met1 ( 1283630 737970 ) M1M2_PR
+ NEW met2 ( 1283630 737460 ) M2M3_PR_M
+ NEW met1 ( 349830 737970 ) M1M2_PR ;
+ - data_out_to_core\[21\] ( core0 read_interactive_value[21] ) ( chip_controller data_out_to_core[21] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 608940 0 ) ( 2803470 * )
+ NEW met1 ( 2803470 1107210 ) ( 2804850 * )
+ NEW met2 ( 2803470 608940 ) ( * 1107210 )
+ NEW met2 ( 345230 2699940 ) ( 346610 * 0 )
+ NEW met2 ( 345230 2699940 ) ( * 2739890 )
+ NEW met1 ( 345230 2739890 ) ( 1487410 * )
+ NEW met2 ( 1487410 1703910 ) ( * 2739890 )
+ NEW met1 ( 1487410 1703910 ) ( 2803470 * )
+ NEW met1 ( 2803470 1148690 ) ( 2804850 * )
+ NEW met2 ( 2803470 1148690 ) ( * 1703910 )
+ NEW met2 ( 2804850 1107210 ) ( * 1148690 )
+ NEW met2 ( 2803470 608940 ) M2M3_PR_M
+ NEW met1 ( 2803470 1107210 ) M1M2_PR
+ NEW met1 ( 2804850 1107210 ) M1M2_PR
+ NEW met1 ( 2803470 1703910 ) M1M2_PR
+ NEW met1 ( 345230 2739890 ) M1M2_PR
+ NEW met1 ( 1487410 1703910 ) M1M2_PR
+ NEW met1 ( 1487410 2739890 ) M1M2_PR
+ NEW met1 ( 2803470 1148690 ) M1M2_PR
+ NEW met1 ( 2804850 1148690 ) M1M2_PR ;
+ - data_out_to_core\[22\] ( core0 read_interactive_value[22] ) ( chip_controller data_out_to_core[22] ) + USE SIGNAL
+ + ROUTED met2 ( 1267070 188530 ) ( * 2726460 )
+ NEW met2 ( 353510 2699260 0 ) ( 354890 * )
+ NEW met2 ( 354890 2699260 ) ( * 2726460 )
+ NEW met3 ( 354890 2726460 ) ( 1267070 * )
+ NEW met2 ( 1792390 188530 ) ( * 200260 0 )
+ NEW met1 ( 1267070 188530 ) ( 1792390 * )
+ NEW met1 ( 1267070 188530 ) M1M2_PR
+ NEW met2 ( 1267070 2726460 ) M2M3_PR_M
+ NEW met2 ( 354890 2726460 ) M2M3_PR_M
+ NEW met1 ( 1792390 188530 ) M1M2_PR ;
+ - data_out_to_core\[23\] ( core0 read_interactive_value[23] ) ( chip_controller data_out_to_core[23] ) + USE SIGNAL
+ + ROUTED met2 ( 1473610 1712750 ) ( * 2726970 )
+ NEW met2 ( 1946490 1699660 0 ) ( * 1712750 )
+ NEW met2 ( 360870 2699260 0 ) ( 361790 * )
+ NEW met2 ( 361790 2699260 ) ( * 2726970 )
+ NEW met1 ( 361790 2726970 ) ( 1473610 * )
+ NEW met1 ( 1473610 1712750 ) ( 1946490 * )
+ NEW met1 ( 1473610 2726970 ) M1M2_PR
+ NEW met1 ( 1473610 1712750 ) M1M2_PR
+ NEW met1 ( 1946490 1712750 ) M1M2_PR
+ NEW met1 ( 361790 2726970 ) M1M2_PR ;
+ - data_out_to_core\[24\] ( core0 read_interactive_value[24] ) ( chip_controller data_out_to_core[24] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 772820 ) ( * 779450 )
+ NEW met2 ( 763370 779450 ) ( * 2731050 )
+ NEW met2 ( 367770 2699260 0 ) ( 368690 * )
+ NEW met2 ( 368690 2699260 ) ( * 2731050 )
+ NEW met1 ( 368690 2731050 ) ( 763370 * )
+ NEW met1 ( 763370 779450 ) ( 1283630 * )
+ NEW met3 ( 1283630 772820 ) ( 1300420 * 0 )
+ NEW met1 ( 763370 779450 ) M1M2_PR
+ NEW met1 ( 763370 2731050 ) M1M2_PR
+ NEW met1 ( 1283630 779450 ) M1M2_PR
+ NEW met2 ( 1283630 772820 ) M2M3_PR_M
+ NEW met1 ( 368690 2731050 ) M1M2_PR ;
+ - data_out_to_core\[25\] ( core0 read_interactive_value[25] ) ( chip_controller data_out_to_core[25] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 790500 ) ( * 793390 )
+ NEW met2 ( 956570 793390 ) ( * 2729010 )
+ NEW met2 ( 370990 2699260 0 ) ( 371910 * )
+ NEW met2 ( 371910 2699260 ) ( * 2729010 )
+ NEW met1 ( 371910 2729010 ) ( 956570 * )
+ NEW met1 ( 956570 793390 ) ( 1283630 * )
+ NEW met3 ( 1283630 790500 ) ( 1300420 * 0 )
+ NEW met1 ( 956570 793390 ) M1M2_PR
+ NEW met1 ( 956570 2729010 ) M1M2_PR
+ NEW met1 ( 1283630 793390 ) M1M2_PR
+ NEW met2 ( 1283630 790500 ) M2M3_PR_M
+ NEW met1 ( 371910 2729010 ) M1M2_PR ;
+ - data_out_to_core\[26\] ( core0 read_interactive_value[26] ) ( chip_controller data_out_to_core[26] ) + USE SIGNAL
+ + ROUTED met2 ( 1865990 202980 ) ( 1867830 * 0 )
+ NEW met2 ( 1865990 202810 ) ( * 202980 )
+ NEW li1 ( 1865990 202810 ) ( * 205190 )
+ NEW met1 ( 396750 2285310 ) ( * 2285650 )
+ NEW met1 ( 451950 205190 ) ( 1865990 * )
+ NEW met2 ( 370530 2285310 ) ( * 2300100 0 )
+ NEW met1 ( 370530 2285310 ) ( 396750 * )
+ NEW li1 ( 436310 2285650 ) ( * 2286330 )
+ NEW met1 ( 436310 2286330 ) ( 451950 * )
+ NEW met1 ( 396750 2285650 ) ( 436310 * )
+ NEW met2 ( 451950 205190 ) ( * 2286330 )
+ NEW li1 ( 1865990 202810 ) L1M1_PR_MR
+ NEW met1 ( 1865990 202810 ) M1M2_PR
+ NEW li1 ( 1865990 205190 ) L1M1_PR_MR
+ NEW met1 ( 451950 205190 ) M1M2_PR
+ NEW met1 ( 370530 2285310 ) M1M2_PR
+ NEW li1 ( 436310 2285650 ) L1M1_PR_MR
+ NEW li1 ( 436310 2286330 ) L1M1_PR_MR
+ NEW met1 ( 451950 2286330 ) M1M2_PR
+ NEW met1 ( 1865990 202810 ) RECT ( -355 -70 0 70 ) ;
+ - data_out_to_core\[27\] ( core0 read_interactive_value[27] ) ( chip_controller data_out_to_core[27] ) + USE SIGNAL
+ + ROUTED met2 ( 103270 848470 ) ( * 2470270 )
+ NEW met2 ( 189750 2470270 ) ( * 2473500 )
+ NEW met3 ( 189750 2473500 ) ( 200100 * )
+ NEW met3 ( 200100 2472820 0 ) ( * 2473500 )
+ NEW met2 ( 1283630 843540 ) ( * 848470 )
+ NEW met1 ( 103270 2470270 ) ( 189750 * )
+ NEW met1 ( 103270 848470 ) ( 1283630 * )
+ NEW met3 ( 1283630 843540 ) ( 1300420 * 0 )
+ NEW met1 ( 103270 848470 ) M1M2_PR
+ NEW met1 ( 103270 2470270 ) M1M2_PR
+ NEW met1 ( 189750 2470270 ) M1M2_PR
+ NEW met2 ( 189750 2473500 ) M2M3_PR_M
+ NEW met1 ( 1283630 848470 ) M1M2_PR
+ NEW met2 ( 1283630 843540 ) M2M3_PR_M ;
+ - data_out_to_core\[28\] ( core0 read_interactive_value[28] ) ( chip_controller data_out_to_core[28] ) + USE SIGNAL
+ + ROUTED met3 ( 192050 2478940 ) ( 200100 * )
+ NEW met3 ( 200100 2478260 0 ) ( * 2478940 )
+ NEW met3 ( 2799100 731340 0 ) ( 2814970 * )
+ NEW met2 ( 2814970 725390 ) ( * 731340 )
+ NEW met1 ( 2814970 725390 ) ( 2844410 * )
+ NEW met1 ( 192050 1797750 ) ( 2844410 * )
+ NEW met2 ( 2844410 725390 ) ( * 1797750 )
+ NEW met2 ( 192050 1797750 ) ( * 2478940 )
+ NEW met1 ( 192050 1797750 ) M1M2_PR
+ NEW met2 ( 192050 2478940 ) M2M3_PR_M
+ NEW met2 ( 2814970 731340 ) M2M3_PR_M
+ NEW met1 ( 2814970 725390 ) M1M2_PR
+ NEW met1 ( 2844410 725390 ) M1M2_PR
+ NEW met1 ( 2844410 1797750 ) M1M2_PR ;
+ - data_out_to_core\[29\] ( core0 read_interactive_value[29] ) ( chip_controller data_out_to_core[29] ) + USE SIGNAL
+ + ROUTED met2 ( 1942350 201620 ) ( * 201790 )
+ NEW met2 ( 1942350 201620 ) ( 1943730 * 0 )
+ NEW met1 ( 1122170 201790 ) ( 1942350 * )
+ NEW met2 ( 1122170 201790 ) ( * 2464150 )
+ NEW met3 ( 599380 2466020 0 ) ( 608350 * )
+ NEW met2 ( 608350 2464150 ) ( * 2466020 )
+ NEW met1 ( 608350 2464150 ) ( 1122170 * )
+ NEW met1 ( 1942350 201790 ) M1M2_PR
+ NEW met1 ( 1122170 201790 ) M1M2_PR
+ NEW met1 ( 1122170 2464150 ) M1M2_PR
+ NEW met2 ( 608350 2466020 ) M2M3_PR_M
+ NEW met1 ( 608350 2464150 ) M1M2_PR ;
+ - data_out_to_core\[2\] ( core0 read_interactive_value[2] ) ( chip_controller data_out_to_core[2] ) + USE SIGNAL
+ + ROUTED met2 ( 216890 2699940 ) ( 217810 * 0 )
+ NEW met2 ( 216890 2699940 ) ( * 2713030 )
+ NEW met2 ( 115230 206380 ) ( * 2713030 )
+ NEW met3 ( 2799100 260100 0 ) ( 2808990 * )
+ NEW met2 ( 2808990 206380 ) ( * 260100 )
+ NEW met1 ( 115230 2713030 ) ( 216890 * )
+ NEW met3 ( 115230 206380 ) ( 2808990 * )
+ NEW met2 ( 115230 206380 ) M2M3_PR_M
+ NEW met1 ( 115230 2713030 ) M1M2_PR
+ NEW met1 ( 216890 2713030 ) M1M2_PR
+ NEW met2 ( 2808990 206380 ) M2M3_PR_M
+ NEW met2 ( 2808990 260100 ) M2M3_PR_M ;
+ - data_out_to_core\[30\] ( core0 read_interactive_value[30] ) ( chip_controller data_out_to_core[30] ) + USE SIGNAL
+ + ROUTED met2 ( 391690 2278340 ) ( 393070 * )
+ NEW met2 ( 391690 2278340 ) ( * 2300100 )
+ NEW met2 ( 390770 2300100 0 ) ( 391690 * )
+ NEW met2 ( 393070 917490 ) ( * 2278340 )
+ NEW met2 ( 1283630 914260 ) ( * 917490 )
+ NEW met1 ( 393070 917490 ) ( 1283630 * )
+ NEW met3 ( 1283630 914260 ) ( 1300420 * 0 )
+ NEW met1 ( 393070 917490 ) M1M2_PR
+ NEW met1 ( 1283630 917490 ) M1M2_PR
+ NEW met2 ( 1283630 914260 ) M2M3_PR_M ;
+ - data_out_to_core\[31\] ( core0 read_interactive_value[31] ) ( chip_controller data_out_to_core[31] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2478260 0 ) ( 607430 * )
+ NEW met2 ( 607430 2477750 ) ( * 2478260 )
+ NEW met2 ( 1093650 202130 ) ( * 2477750 )
+ NEW met2 ( 1987430 202130 ) ( * 202300 )
+ NEW met2 ( 1987430 202300 ) ( 1989270 * 0 )
+ NEW met1 ( 1093650 202130 ) ( 1987430 * )
+ NEW met1 ( 607430 2477750 ) ( 1093650 * )
+ NEW met1 ( 1093650 202130 ) M1M2_PR
+ NEW met2 ( 607430 2478260 ) M2M3_PR_M
+ NEW met1 ( 607430 2477750 ) M1M2_PR
+ NEW met1 ( 1093650 2477750 ) M1M2_PR
+ NEW met1 ( 1987430 202130 ) M1M2_PR ;
+ - data_out_to_core\[3\] ( core0 read_interactive_value[3] ) ( chip_controller data_out_to_core[3] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 402220 ) ( * 406810 )
+ NEW met2 ( 614330 2322370 ) ( * 2322540 )
+ NEW met1 ( 614330 2322370 ) ( 618470 * )
+ NEW met3 ( 599380 2322540 0 ) ( 614330 * )
+ NEW met1 ( 618470 406810 ) ( 1283630 * )
+ NEW met3 ( 1283630 402220 ) ( 1300420 * 0 )
+ NEW met2 ( 618470 406810 ) ( * 2322370 )
+ NEW met1 ( 1283630 406810 ) M1M2_PR
+ NEW met2 ( 1283630 402220 ) M2M3_PR_M
+ NEW met1 ( 618470 406810 ) M1M2_PR
+ NEW met2 ( 614330 2322540 ) M2M3_PR_M
+ NEW met1 ( 614330 2322370 ) M1M2_PR
+ NEW met1 ( 618470 2322370 ) M1M2_PR ;
+ - data_out_to_core\[4\] ( core0 read_interactive_value[4] ) ( chip_controller data_out_to_core[4] ) + USE SIGNAL
+ + ROUTED met2 ( 1382990 193460 ) ( * 200260 0 )
+ NEW met3 ( 203780 193460 ) ( 1382990 * )
+ NEW met3 ( 201940 2327300 ) ( * 2327980 0 )
+ NEW met4 ( 201940 2327300 ) ( 203780 * )
+ NEW met4 ( 203780 193460 ) ( * 2327300 )
+ NEW met3 ( 203780 193460 ) M3M4_PR_M
+ NEW met2 ( 1382990 193460 ) M2M3_PR_M
+ NEW met3 ( 201940 2327300 ) M3M4_PR_M ;
+ - data_out_to_core\[5\] ( core0 read_interactive_value[5] ) ( chip_controller data_out_to_core[5] ) + USE SIGNAL
+ + ROUTED met2 ( 1442330 202980 ) ( 1443710 * 0 )
+ NEW met2 ( 1442330 202810 ) ( * 202980 )
+ NEW li1 ( 1442330 202810 ) ( * 206550 )
+ NEW met2 ( 307050 206550 ) ( * 2290750 )
+ NEW met1 ( 307050 206550 ) ( 1442330 * )
+ NEW met2 ( 255990 2290750 ) ( * 2300100 0 )
+ NEW met1 ( 255990 2290750 ) ( 307050 * )
+ NEW met1 ( 307050 206550 ) M1M2_PR
+ NEW li1 ( 1442330 202810 ) L1M1_PR_MR
+ NEW met1 ( 1442330 202810 ) M1M2_PR
+ NEW li1 ( 1442330 206550 ) L1M1_PR_MR
+ NEW met1 ( 307050 2290750 ) M1M2_PR
+ NEW met1 ( 255990 2290750 ) M1M2_PR
+ NEW met1 ( 1442330 202810 ) RECT ( -355 -70 0 70 ) ;
+ - data_out_to_core\[6\] ( core0 read_interactive_value[6] ) ( chip_controller data_out_to_core[6] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2344300 0 ) ( 607430 * )
+ NEW met2 ( 607430 2339710 ) ( * 2344300 )
+ NEW met2 ( 1472230 200260 ) ( * 200430 )
+ NEW met2 ( 1472230 200260 ) ( 1474070 * 0 )
+ NEW met1 ( 607430 2339710 ) ( 1107450 * )
+ NEW met1 ( 1107450 200430 ) ( 1472230 * )
+ NEW met2 ( 1107450 200430 ) ( * 2339710 )
+ NEW met2 ( 607430 2344300 ) M2M3_PR_M
+ NEW met1 ( 607430 2339710 ) M1M2_PR
+ NEW met1 ( 1472230 200430 ) M1M2_PR
+ NEW met1 ( 1107450 200430 ) M1M2_PR
+ NEW met1 ( 1107450 2339710 ) M1M2_PR ;
+ - data_out_to_core\[7\] ( core0 read_interactive_value[7] ) ( chip_controller data_out_to_core[7] ) + USE SIGNAL
+ + ROUTED met1 ( 188830 2340050 ) ( 192970 * )
+ NEW met2 ( 192970 2340050 ) ( * 2341580 )
+ NEW met3 ( 192970 2341580 ) ( 201020 * )
+ NEW met3 ( 201020 2341580 ) ( * 2342260 0 )
+ NEW met2 ( 1283630 455090 ) ( * 455260 )
+ NEW met2 ( 251850 455090 ) ( * 2300270 )
+ NEW met1 ( 251850 455090 ) ( 1283630 * )
+ NEW met3 ( 1283630 455260 ) ( 1300420 * 0 )
+ NEW met1 ( 188830 2300610 ) ( 198950 * )
+ NEW met1 ( 198950 2300270 ) ( * 2300610 )
+ NEW met2 ( 188830 2300610 ) ( * 2340050 )
+ NEW met1 ( 198950 2300270 ) ( 251850 * )
+ NEW met1 ( 188830 2340050 ) M1M2_PR
+ NEW met1 ( 192970 2340050 ) M1M2_PR
+ NEW met2 ( 192970 2341580 ) M2M3_PR_M
+ NEW met1 ( 1283630 455090 ) M1M2_PR
+ NEW met2 ( 1283630 455260 ) M2M3_PR_M
+ NEW met1 ( 251850 455090 ) M1M2_PR
+ NEW met1 ( 251850 2300270 ) M1M2_PR
+ NEW met1 ( 188830 2300610 ) M1M2_PR ;
+ - data_out_to_core\[8\] ( core0 read_interactive_value[8] ) ( chip_controller data_out_to_core[8] ) + USE SIGNAL
+ + ROUTED met3 ( 186300 2351780 ) ( 200100 * )
+ NEW met3 ( 200100 2351100 0 ) ( * 2351780 )
+ NEW met3 ( 2799100 347820 0 ) ( 2811290 * )
+ NEW met2 ( 2811290 347820 ) ( * 351730 )
+ NEW met1 ( 2811290 351730 ) ( 2850390 * )
+ NEW met3 ( 186300 1805060 ) ( 2850390 * )
+ NEW met2 ( 2850390 351730 ) ( * 1805060 )
+ NEW met4 ( 186300 1805060 ) ( * 2351780 )
+ NEW met3 ( 186300 2351780 ) M3M4_PR_M
+ NEW met3 ( 186300 1805060 ) M3M4_PR_M
+ NEW met2 ( 2811290 347820 ) M2M3_PR_M
+ NEW met1 ( 2811290 351730 ) M1M2_PR
+ NEW met1 ( 2850390 351730 ) M1M2_PR
+ NEW met2 ( 2850390 1805060 ) M2M3_PR_M ;
+ - data_out_to_core\[9\] ( core0 read_interactive_value[9] ) ( chip_controller data_out_to_core[9] ) + USE SIGNAL
+ + ROUTED met2 ( 281290 2287010 ) ( * 2300100 0 )
+ NEW met2 ( 376510 1778710 ) ( * 2287010 )
+ NEW met1 ( 281290 2287010 ) ( 376510 * )
+ NEW met2 ( 1625410 1699660 ) ( 1627710 * 0 )
+ NEW met1 ( 376510 1778710 ) ( 1625410 * )
+ NEW met2 ( 1625410 1699660 ) ( * 1778710 )
+ NEW met1 ( 281290 2287010 ) M1M2_PR
+ NEW met1 ( 376510 1778710 ) M1M2_PR
+ NEW met1 ( 376510 2287010 ) M1M2_PR
+ NEW met1 ( 1625410 1778710 ) M1M2_PR ;
- data_to_core_mem\[0\] ( chip_controller data_to_core_mem[0] ) + USE SIGNAL ;
- data_to_core_mem\[10\] ( chip_controller data_to_core_mem[10] ) + USE SIGNAL ;
- data_to_core_mem\[11\] ( chip_controller data_to_core_mem[11] ) + USE SIGNAL ;
@@ -8213,911 +10774,1300 @@
- data_to_core_mem\[8\] ( chip_controller data_to_core_mem[8] ) + USE SIGNAL ;
- data_to_core_mem\[9\] ( chip_controller data_to_core_mem[9] ) + USE SIGNAL ;
- din0_to_sram\[0\] ( custom_sram d[0] ) ( chip_controller din0_to_sram[0] ) + USE SIGNAL
- + ROUTED met2 ( 1476830 1803530 ) ( * 1814750 )
- NEW met2 ( 1705910 1803530 ) ( * 1803700 )
- NEW met2 ( 1705910 1803700 ) ( 1707750 * 0 )
- NEW met1 ( 1476830 1803530 ) ( 1705910 * )
- NEW met3 ( 599380 1820020 0 ) ( 613870 * )
- NEW met2 ( 613870 1814750 ) ( * 1820020 )
- NEW met1 ( 613870 1814750 ) ( 1476830 * )
- NEW met1 ( 1476830 1814750 ) M1M2_PR
- NEW met1 ( 1476830 1803530 ) M1M2_PR
- NEW met1 ( 1705910 1803530 ) M1M2_PR
- NEW met2 ( 613870 1820020 ) M2M3_PR_M
- NEW met1 ( 613870 1814750 ) M1M2_PR ;
+ + ROUTED met3 ( 1488330 2042380 ) ( 1500060 * 0 )
+ NEW met1 ( 201250 2273410 ) ( 1488330 * )
+ NEW met2 ( 1488330 2042380 ) ( * 2273410 )
+ NEW met3 ( 199180 2299420 ) ( 201250 * )
+ NEW met3 ( 199180 2299420 ) ( * 2303500 )
+ NEW met3 ( 199180 2303500 ) ( 201020 * )
+ NEW met3 ( 201020 2303500 ) ( * 2304180 0 )
+ NEW met2 ( 201250 2273410 ) ( * 2299420 )
+ NEW met1 ( 201250 2273410 ) M1M2_PR
+ NEW met2 ( 1488330 2042380 ) M2M3_PR_M
+ NEW met1 ( 1488330 2273410 ) M1M2_PR
+ NEW met2 ( 201250 2299420 ) M2M3_PR_M ;
- din0_to_sram\[10\] ( custom_sram d[10] ) ( chip_controller din0_to_sram[10] ) + USE SIGNAL
- + ROUTED met3 ( 599380 1879180 0 ) ( 607890 * )
- NEW met2 ( 607890 1879180 ) ( * 1883430 )
- NEW met2 ( 866870 1883430 ) ( * 2401250 )
- NEW met2 ( 1490170 2401250 ) ( * 2406860 )
- NEW met3 ( 1490170 2406860 ) ( 1500060 * 0 )
- NEW met1 ( 866870 2401250 ) ( 1490170 * )
- NEW met1 ( 607890 1883430 ) ( 866870 * )
- NEW met1 ( 866870 2401250 ) M1M2_PR
- NEW met2 ( 607890 1879180 ) M2M3_PR_M
- NEW met1 ( 607890 1883430 ) M1M2_PR
- NEW met1 ( 866870 1883430 ) M1M2_PR
- NEW met1 ( 1490170 2401250 ) M1M2_PR
- NEW met2 ( 1490170 2406860 ) M2M3_PR_M ;
+ + ROUTED met2 ( 277150 2699260 0 ) ( 278530 * )
+ NEW met2 ( 278530 2699260 ) ( * 2700790 )
+ NEW li1 ( 585350 2700790 ) ( * 2704530 )
+ NEW met1 ( 278530 2700790 ) ( 585350 * )
+ NEW met2 ( 1490170 2483700 ) ( * 2483870 )
+ NEW met3 ( 1490170 2483700 ) ( 1500060 * 0 )
+ NEW met1 ( 605130 2483870 ) ( 1490170 * )
+ NEW met1 ( 585350 2704530 ) ( 605130 * )
+ NEW met2 ( 605130 2483870 ) ( * 2704530 )
+ NEW met1 ( 278530 2700790 ) M1M2_PR
+ NEW li1 ( 585350 2700790 ) L1M1_PR_MR
+ NEW li1 ( 585350 2704530 ) L1M1_PR_MR
+ NEW met1 ( 605130 2483870 ) M1M2_PR
+ NEW met1 ( 1490170 2483870 ) M1M2_PR
+ NEW met2 ( 1490170 2483700 ) M2M3_PR_M
+ NEW met1 ( 605130 2704530 ) M1M2_PR ;
- din0_to_sram\[11\] ( custom_sram d[11] ) ( chip_controller din0_to_sram[11] ) + USE SIGNAL
- + ROUTED met3 ( 599380 1885300 0 ) ( 608350 * )
- NEW met2 ( 608350 1885300 ) ( * 1890570 )
- NEW met1 ( 608350 1890570 ) ( 942770 * )
- NEW met2 ( 942770 1890570 ) ( * 2546430 )
- NEW met2 ( 1487410 2546430 ) ( * 2549660 )
- NEW met3 ( 1487410 2549660 ) ( 1500060 * 0 )
- NEW met1 ( 942770 2546430 ) ( 1487410 * )
- NEW met2 ( 608350 1885300 ) M2M3_PR_M
- NEW met1 ( 608350 1890570 ) M1M2_PR
- NEW met1 ( 942770 1890570 ) M1M2_PR
- NEW met1 ( 942770 2546430 ) M1M2_PR
- NEW met1 ( 1487410 2546430 ) M1M2_PR
- NEW met2 ( 1487410 2549660 ) M2M3_PR_M ;
+ + ROUTED met1 ( 1164030 2241790 ) ( 1177830 * )
+ NEW met2 ( 1177830 2211190 ) ( * 2241790 )
+ NEW met3 ( 198950 2374220 ) ( 201020 * )
+ NEW met3 ( 201020 2374220 ) ( * 2374900 0 )
+ NEW met2 ( 1164030 2241790 ) ( * 2301290 )
+ NEW met2 ( 1247750 2162910 ) ( * 2211190 )
+ NEW met1 ( 1343430 1997670 ) ( 1357690 * )
+ NEW met2 ( 1357690 1900770 ) ( * 1997670 )
+ NEW met2 ( 1343430 1997670 ) ( * 2083690 )
+ NEW met2 ( 1469470 1849090 ) ( * 1873230 )
+ NEW met1 ( 1177830 2211190 ) ( 1247750 * )
+ NEW met1 ( 1469470 1849090 ) ( 1495690 * )
+ NEW met1 ( 1328250 2083690 ) ( 1343430 * )
+ NEW met1 ( 1247750 2162910 ) ( 1328250 * )
+ NEW met2 ( 1328250 2083690 ) ( * 2162910 )
+ NEW met2 ( 1414730 1887170 ) ( * 1900770 )
+ NEW met1 ( 1414730 1887170 ) ( 1428530 * )
+ NEW met2 ( 1428530 1873230 ) ( * 1887170 )
+ NEW met1 ( 1357690 1900770 ) ( 1414730 * )
+ NEW met1 ( 1428530 1873230 ) ( 1469470 * )
+ NEW met2 ( 1495690 1808630 ) ( * 1849090 )
+ NEW met1 ( 1495690 1808630 ) ( 2695830 * )
+ NEW li1 ( 198950 2301290 ) ( * 2308770 )
+ NEW met2 ( 198950 2308770 ) ( * 2374220 )
+ NEW met1 ( 198950 2301290 ) ( 1164030 * )
+ NEW met2 ( 2695830 2415000 ) ( 2697210 * )
+ NEW met3 ( 2696750 2294660 ) ( 2697670 * )
+ NEW met2 ( 2695830 2294660 ) ( 2696750 * )
+ NEW met2 ( 2695830 2294660 ) ( * 2415000 )
+ NEW met2 ( 2697210 2415000 ) ( * 2435700 )
+ NEW met2 ( 2697210 2435700 ) ( 2698130 * )
+ NEW met2 ( 2698130 2435700 ) ( * 2484000 )
+ NEW met2 ( 2697210 2484000 ) ( 2698130 * )
+ NEW met2 ( 2695830 2221800 ) ( 2697670 * )
+ NEW met2 ( 2697670 2221800 ) ( * 2294660 )
+ NEW met2 ( 2696290 2105620 ) ( 2696750 * )
+ NEW met2 ( 2696750 2105620 ) ( * 2107660 )
+ NEW met2 ( 2695830 2107660 ) ( 2696750 * )
+ NEW met2 ( 2695830 2107660 ) ( * 2221800 )
+ NEW met3 ( 2696980 2509540 ) ( 2697210 * )
+ NEW met3 ( 2696980 2509540 ) ( * 2512260 0 )
+ NEW met2 ( 2697210 2484000 ) ( * 2509540 )
+ NEW met2 ( 2696290 2104500 ) ( * 2105620 )
+ NEW met2 ( 2696290 2104500 ) ( 2697670 * )
+ NEW met2 ( 2697670 2042400 ) ( * 2104500 )
+ NEW met2 ( 2695830 2042400 ) ( 2697670 * )
+ NEW met2 ( 2695830 2028600 ) ( * 2042400 )
+ NEW met2 ( 2695830 2028600 ) ( 2696750 * )
+ NEW met2 ( 2696750 1987200 ) ( * 2028600 )
+ NEW met2 ( 2695830 1940380 ) ( 2697210 * )
+ NEW met2 ( 2697210 1940380 ) ( * 1987200 )
+ NEW met2 ( 2696750 1987200 ) ( 2697210 * )
+ NEW met2 ( 2695830 1808630 ) ( * 1940380 )
+ NEW met1 ( 1164030 2241790 ) M1M2_PR
+ NEW met1 ( 1177830 2241790 ) M1M2_PR
+ NEW met1 ( 1177830 2211190 ) M1M2_PR
+ NEW met1 ( 1247750 2211190 ) M1M2_PR
+ NEW met1 ( 1469470 1849090 ) M1M2_PR
+ NEW met2 ( 198950 2374220 ) M2M3_PR_M
+ NEW met1 ( 1164030 2301290 ) M1M2_PR
+ NEW met1 ( 1247750 2162910 ) M1M2_PR
+ NEW met1 ( 1357690 1900770 ) M1M2_PR
+ NEW met1 ( 1343430 1997670 ) M1M2_PR
+ NEW met1 ( 1357690 1997670 ) M1M2_PR
+ NEW met1 ( 1343430 2083690 ) M1M2_PR
+ NEW met1 ( 1469470 1873230 ) M1M2_PR
+ NEW met1 ( 2695830 1808630 ) M1M2_PR
+ NEW met1 ( 1495690 1849090 ) M1M2_PR
+ NEW met1 ( 1328250 2083690 ) M1M2_PR
+ NEW met1 ( 1328250 2162910 ) M1M2_PR
+ NEW met1 ( 1414730 1900770 ) M1M2_PR
+ NEW met1 ( 1414730 1887170 ) M1M2_PR
+ NEW met1 ( 1428530 1887170 ) M1M2_PR
+ NEW met1 ( 1428530 1873230 ) M1M2_PR
+ NEW met1 ( 1495690 1808630 ) M1M2_PR
+ NEW li1 ( 198950 2308770 ) L1M1_PR_MR
+ NEW met1 ( 198950 2308770 ) M1M2_PR
+ NEW li1 ( 198950 2301290 ) L1M1_PR_MR
+ NEW met2 ( 2697670 2294660 ) M2M3_PR_M
+ NEW met2 ( 2696750 2294660 ) M2M3_PR_M
+ NEW met2 ( 2697210 2509540 ) M2M3_PR_M
+ NEW met1 ( 198950 2308770 ) RECT ( -355 -70 0 70 ) ;
- din0_to_sram\[12\] ( custom_sram d[12] ) ( chip_controller din0_to_sram[12] ) + USE SIGNAL
- + ROUTED met2 ( 687010 1794690 ) ( * 2691270 )
- NEW met2 ( 1490170 2691270 ) ( * 2692460 )
- NEW met3 ( 1490170 2692460 ) ( 1500060 * 0 )
- NEW met1 ( 687010 2691270 ) ( 1490170 * )
- NEW met2 ( 275770 1794690 ) ( * 1800300 0 )
- NEW met1 ( 275770 1794690 ) ( 687010 * )
- NEW met1 ( 687010 2691270 ) M1M2_PR
- NEW met1 ( 687010 1794690 ) M1M2_PR
- NEW met1 ( 1490170 2691270 ) M1M2_PR
- NEW met2 ( 1490170 2692460 ) M2M3_PR_M
- NEW met1 ( 275770 1794690 ) M1M2_PR ;
+ + ROUTED met2 ( 287730 2699260 0 ) ( 288650 * )
+ NEW met2 ( 288650 2699260 ) ( * 2716430 )
+ NEW li1 ( 492430 2712350 ) ( * 2716430 )
+ NEW met2 ( 1269830 2797690 ) ( * 2815030 )
+ NEW met2 ( 1342510 3094850 ) ( * 3100290 )
+ NEW met1 ( 1342510 3100290 ) ( 1357690 * )
+ NEW met1 ( 1362750 3192090 ) ( 1372870 * )
+ NEW met1 ( 1435430 3278450 ) ( 1469930 * )
+ NEW met2 ( 1469930 3278450 ) ( * 3289670 )
+ NEW met3 ( 2697900 2738700 ) ( 2698130 * )
+ NEW met3 ( 2697900 2737340 0 ) ( * 2738700 )
+ NEW met2 ( 2694910 2801260 ) ( 2698130 * )
+ NEW met2 ( 1169550 2744650 ) ( * 2755530 )
+ NEW met1 ( 1169550 2755530 ) ( 1180130 * )
+ NEW met2 ( 1180130 2755530 ) ( * 2780690 )
+ NEW met1 ( 1357690 3132590 ) ( 1362750 * )
+ NEW met2 ( 1357690 3100290 ) ( * 3132590 )
+ NEW met2 ( 1362750 3132590 ) ( * 3192090 )
+ NEW met2 ( 1372870 3192090 ) ( * 3229830 )
+ NEW met2 ( 1435430 3264340 ) ( * 3278450 )
+ NEW met2 ( 2698130 2738700 ) ( * 2801260 )
+ NEW met2 ( 2694910 2801260 ) ( * 3289670 )
+ NEW met1 ( 288650 2716430 ) ( 492430 * )
+ NEW met2 ( 524170 2712350 ) ( * 2732580 )
+ NEW met2 ( 524170 2732580 ) ( 525090 * )
+ NEW met1 ( 492430 2712350 ) ( 524170 * )
+ NEW met1 ( 1193930 2797690 ) ( 1269830 * )
+ NEW met1 ( 1269830 2815030 ) ( 1290300 * )
+ NEW met1 ( 1290300 2815030 ) ( * 2815370 )
+ NEW met1 ( 1290300 2815370 ) ( 1293750 * )
+ NEW met1 ( 1307550 3008490 ) ( 1321350 * )
+ NEW met1 ( 1328710 3083970 ) ( 1333770 * )
+ NEW met2 ( 1333770 3083970 ) ( * 3094850 )
+ NEW met1 ( 1333770 3094850 ) ( 1342510 * )
+ NEW met1 ( 1469930 3289670 ) ( 2694910 * )
+ NEW met2 ( 525090 2732580 ) ( * 2744650 )
+ NEW met1 ( 525090 2744650 ) ( 1169550 * )
+ NEW met1 ( 1180130 2780690 ) ( 1193700 * )
+ NEW met1 ( 1193700 2780690 ) ( * 2781030 )
+ NEW met1 ( 1193700 2781030 ) ( 1193930 * )
+ NEW met2 ( 1193930 2781030 ) ( * 2797690 )
+ NEW met1 ( 1293750 2859910 ) ( 1307550 * )
+ NEW met2 ( 1293750 2815370 ) ( * 2859910 )
+ NEW met2 ( 1307550 2859910 ) ( * 3008490 )
+ NEW met1 ( 1321350 3049630 ) ( 1328710 * )
+ NEW met2 ( 1321350 3008490 ) ( * 3049630 )
+ NEW met2 ( 1328710 3049630 ) ( * 3083970 )
+ NEW met2 ( 1390810 3229830 ) ( * 3242750 )
+ NEW met1 ( 1390810 3242750 ) ( 1394030 * )
+ NEW met1 ( 1394030 3242750 ) ( * 3243090 )
+ NEW met1 ( 1394030 3243090 ) ( 1400930 * )
+ NEW met2 ( 1400930 3243090 ) ( * 3256690 )
+ NEW met1 ( 1400930 3256690 ) ( 1414730 * )
+ NEW met1 ( 1414730 3256690 ) ( * 3257030 )
+ NEW met1 ( 1414730 3257030 ) ( 1434970 * )
+ NEW met2 ( 1434970 3257030 ) ( * 3264340 )
+ NEW met1 ( 1372870 3229830 ) ( 1390810 * )
+ NEW met2 ( 1434970 3264340 ) ( 1435430 * )
+ NEW met1 ( 288650 2716430 ) M1M2_PR
+ NEW li1 ( 492430 2716430 ) L1M1_PR_MR
+ NEW li1 ( 492430 2712350 ) L1M1_PR_MR
+ NEW met1 ( 1269830 2797690 ) M1M2_PR
+ NEW met1 ( 1269830 2815030 ) M1M2_PR
+ NEW met1 ( 1342510 3094850 ) M1M2_PR
+ NEW met1 ( 1342510 3100290 ) M1M2_PR
+ NEW met1 ( 1357690 3100290 ) M1M2_PR
+ NEW met1 ( 1362750 3192090 ) M1M2_PR
+ NEW met1 ( 1372870 3192090 ) M1M2_PR
+ NEW met1 ( 1435430 3278450 ) M1M2_PR
+ NEW met1 ( 1469930 3278450 ) M1M2_PR
+ NEW met1 ( 1469930 3289670 ) M1M2_PR
+ NEW met2 ( 2698130 2738700 ) M2M3_PR_M
+ NEW met1 ( 2694910 3289670 ) M1M2_PR
+ NEW met1 ( 1169550 2744650 ) M1M2_PR
+ NEW met1 ( 1169550 2755530 ) M1M2_PR
+ NEW met1 ( 1180130 2755530 ) M1M2_PR
+ NEW met1 ( 1180130 2780690 ) M1M2_PR
+ NEW met1 ( 1357690 3132590 ) M1M2_PR
+ NEW met1 ( 1362750 3132590 ) M1M2_PR
+ NEW met1 ( 1372870 3229830 ) M1M2_PR
+ NEW met1 ( 524170 2712350 ) M1M2_PR
+ NEW met1 ( 1193930 2797690 ) M1M2_PR
+ NEW met1 ( 1293750 2815370 ) M1M2_PR
+ NEW met1 ( 1307550 3008490 ) M1M2_PR
+ NEW met1 ( 1321350 3008490 ) M1M2_PR
+ NEW met1 ( 1328710 3083970 ) M1M2_PR
+ NEW met1 ( 1333770 3083970 ) M1M2_PR
+ NEW met1 ( 1333770 3094850 ) M1M2_PR
+ NEW met1 ( 525090 2744650 ) M1M2_PR
+ NEW met1 ( 1193930 2781030 ) M1M2_PR
+ NEW met1 ( 1293750 2859910 ) M1M2_PR
+ NEW met1 ( 1307550 2859910 ) M1M2_PR
+ NEW met1 ( 1321350 3049630 ) M1M2_PR
+ NEW met1 ( 1328710 3049630 ) M1M2_PR
+ NEW met1 ( 1390810 3229830 ) M1M2_PR
+ NEW met1 ( 1390810 3242750 ) M1M2_PR
+ NEW met1 ( 1400930 3243090 ) M1M2_PR
+ NEW met1 ( 1400930 3256690 ) M1M2_PR
+ NEW met1 ( 1434970 3257030 ) M1M2_PR ;
- din0_to_sram\[13\] ( custom_sram d[13] ) ( chip_controller din0_to_sram[13] ) + USE SIGNAL
- + ROUTED met1 ( 296470 2208810 ) ( 318090 * )
- NEW li1 ( 318090 2208810 ) ( * 2211190 )
- NEW li1 ( 572470 2210170 ) ( * 2211190 )
- NEW met1 ( 572470 2210170 ) ( 586730 * )
- NEW met1 ( 1370110 2118030 ) ( 1384370 * )
- NEW met3 ( 2699740 2512260 0 ) ( 2711930 * )
- NEW met2 ( 296470 2199460 0 ) ( * 2208810 )
- NEW li1 ( 586730 2198270 ) ( * 2199630 )
- NEW met2 ( 586730 2199630 ) ( * 2210170 )
- NEW met2 ( 1384370 2004470 ) ( * 2118030 )
- NEW met2 ( 1354470 2166310 ) ( * 2198270 )
- NEW met1 ( 1354470 2166310 ) ( 1370110 * )
- NEW met2 ( 1370110 2118030 ) ( * 2166310 )
- NEW met1 ( 1446470 1876630 ) ( 1460730 * )
- NEW met2 ( 1460730 1830390 ) ( * 1876630 )
- NEW met2 ( 1446470 1876630 ) ( * 2004470 )
- NEW met2 ( 2696290 1806930 ) ( * 1809820 )
- NEW met2 ( 2695830 1809820 ) ( 2696290 * )
- NEW met2 ( 2695830 2401200 ) ( 2696750 * )
- NEW met2 ( 2695830 1809820 ) ( * 2401200 )
- NEW met1 ( 2696750 2460410 ) ( 2711930 * )
- NEW met2 ( 2696750 2401200 ) ( * 2460410 )
- NEW met2 ( 2711930 2460410 ) ( * 2512260 )
- NEW met1 ( 318090 2211190 ) ( 572470 * )
- NEW met1 ( 1460730 1830390 ) ( 1483730 * )
- NEW met1 ( 586730 2198270 ) ( 1354470 * )
- NEW met1 ( 1384370 2004470 ) ( 1446470 * )
- NEW met2 ( 1483730 1806930 ) ( * 1830390 )
- NEW met1 ( 1483730 1806930 ) ( 2696290 * )
- NEW met1 ( 296470 2208810 ) M1M2_PR
- NEW li1 ( 318090 2208810 ) L1M1_PR_MR
- NEW li1 ( 318090 2211190 ) L1M1_PR_MR
- NEW li1 ( 572470 2211190 ) L1M1_PR_MR
- NEW li1 ( 572470 2210170 ) L1M1_PR_MR
- NEW met1 ( 586730 2210170 ) M1M2_PR
- NEW met1 ( 1370110 2118030 ) M1M2_PR
- NEW met1 ( 1384370 2118030 ) M1M2_PR
- NEW met1 ( 1460730 1830390 ) M1M2_PR
- NEW met2 ( 2711930 2512260 ) M2M3_PR_M
- NEW li1 ( 586730 2199630 ) L1M1_PR_MR
- NEW met1 ( 586730 2199630 ) M1M2_PR
- NEW li1 ( 586730 2198270 ) L1M1_PR_MR
- NEW met1 ( 1384370 2004470 ) M1M2_PR
- NEW met1 ( 1354470 2198270 ) M1M2_PR
- NEW met1 ( 1354470 2166310 ) M1M2_PR
- NEW met1 ( 1370110 2166310 ) M1M2_PR
- NEW met1 ( 1446470 1876630 ) M1M2_PR
- NEW met1 ( 1460730 1876630 ) M1M2_PR
- NEW met1 ( 1446470 2004470 ) M1M2_PR
- NEW met1 ( 2696290 1806930 ) M1M2_PR
- NEW met1 ( 2696750 2460410 ) M1M2_PR
- NEW met1 ( 2711930 2460410 ) M1M2_PR
- NEW met1 ( 1483730 1830390 ) M1M2_PR
- NEW met1 ( 1483730 1806930 ) M1M2_PR
- NEW met1 ( 586730 2199630 ) RECT ( -355 -70 0 70 ) ;
+ + ROUTED met2 ( 304750 2297210 ) ( * 2300100 0 )
+ NEW met3 ( 1489710 2527900 ) ( 1500060 * 0 )
+ NEW met1 ( 304750 2297210 ) ( 1489710 * )
+ NEW met2 ( 1489710 2297210 ) ( * 2527900 )
+ NEW met1 ( 304750 2297210 ) M1M2_PR
+ NEW met2 ( 1489710 2527900 ) M2M3_PR_M
+ NEW met1 ( 1489710 2297210 ) M1M2_PR ;
- din0_to_sram\[14\] ( custom_sram d[14] ) ( chip_controller din0_to_sram[14] ) + USE SIGNAL
- + ROUTED met2 ( 188370 1890910 ) ( * 1896860 )
- NEW met3 ( 188370 1896860 ) ( 200100 * 0 )
- NEW met1 ( 171810 1890910 ) ( 188370 * )
- NEW met2 ( 2169130 1786190 ) ( * 1800300 0 )
- NEW met1 ( 171810 1786190 ) ( 2169130 * )
- NEW met2 ( 171810 1786190 ) ( * 1890910 )
- NEW met1 ( 188370 1890910 ) M1M2_PR
- NEW met2 ( 188370 1896860 ) M2M3_PR_M
- NEW met1 ( 171810 1786190 ) M1M2_PR
- NEW met1 ( 171810 1890910 ) M1M2_PR
- NEW met1 ( 2169130 1786190 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2385780 0 ) ( 607430 * )
+ NEW met2 ( 607430 2380850 ) ( * 2385780 )
+ NEW met2 ( 1383910 1789250 ) ( * 2380510 )
+ NEW met2 ( 2029290 1789250 ) ( * 1800300 0 )
+ NEW met1 ( 607430 2380850 ) ( 614100 * )
+ NEW met1 ( 614100 2380510 ) ( * 2380850 )
+ NEW met1 ( 614100 2380510 ) ( 1383910 * )
+ NEW met1 ( 1383910 1789250 ) ( 2029290 * )
+ NEW met2 ( 607430 2385780 ) M2M3_PR_M
+ NEW met1 ( 607430 2380850 ) M1M2_PR
+ NEW met1 ( 1383910 1789250 ) M1M2_PR
+ NEW met1 ( 1383910 2380510 ) M1M2_PR
+ NEW met1 ( 2029290 1789250 ) M1M2_PR ;
- din0_to_sram\[15\] ( custom_sram d[15] ) ( chip_controller din0_to_sram[15] ) + USE SIGNAL
- + ROUTED met2 ( 307970 1792310 ) ( * 1800300 0 )
- NEW met1 ( 331430 1792310 ) ( * 1792650 )
- NEW met1 ( 307970 1792310 ) ( 331430 * )
- NEW met2 ( 2261590 1792650 ) ( * 1800300 0 )
- NEW met1 ( 331430 1792650 ) ( 2261590 * )
- NEW met1 ( 307970 1792310 ) M1M2_PR
- NEW met1 ( 2261590 1792650 ) M1M2_PR ;
+ + ROUTED met2 ( 308430 2699260 0 ) ( 309810 * )
+ NEW met2 ( 309810 2699260 ) ( * 2704190 )
+ NEW met2 ( 1490170 2659820 ) ( * 2663390 )
+ NEW met3 ( 1490170 2659820 ) ( 1500060 * 0 )
+ NEW met1 ( 600990 2663390 ) ( 1490170 * )
+ NEW met1 ( 309810 2704190 ) ( 600990 * )
+ NEW met2 ( 600990 2663390 ) ( * 2704190 )
+ NEW met1 ( 309810 2704190 ) M1M2_PR
+ NEW met1 ( 600990 2663390 ) M1M2_PR
+ NEW met1 ( 1490170 2663390 ) M1M2_PR
+ NEW met2 ( 1490170 2659820 ) M2M3_PR_M
+ NEW met1 ( 600990 2704190 ) M1M2_PR ;
- din0_to_sram\[16\] ( custom_sram d[16] ) ( chip_controller din0_to_sram[16] ) + USE SIGNAL
- + ROUTED met1 ( 313030 2211530 ) ( 317170 * )
- NEW met2 ( 313030 2199460 0 ) ( * 2211530 )
- NEW met2 ( 317170 2211530 ) ( * 3308030 )
- NEW met2 ( 2100130 3299700 0 ) ( * 3308030 )
- NEW met1 ( 317170 3308030 ) ( 2100130 * )
- NEW met1 ( 313030 2211530 ) M1M2_PR
- NEW met1 ( 317170 2211530 ) M1M2_PR
- NEW met1 ( 317170 3308030 ) M1M2_PR
- NEW met1 ( 2100130 3308030 ) M1M2_PR ;
+ + ROUTED met2 ( 191130 2447660 ) ( 191590 * )
+ NEW met2 ( 191590 2414340 ) ( * 2447660 )
+ NEW met3 ( 191590 2414340 ) ( 200100 * )
+ NEW met3 ( 200100 2412980 0 ) ( * 2414340 )
+ NEW met2 ( 191130 2447660 ) ( * 2642700 )
+ NEW met2 ( 189750 2685660 ) ( 190210 * )
+ NEW met2 ( 190210 2642700 ) ( * 2685660 )
+ NEW met2 ( 190210 2642700 ) ( 191130 * )
+ NEW met2 ( 189750 2685660 ) ( * 2698750 )
+ NEW met2 ( 1490170 2698750 ) ( * 2704020 )
+ NEW met3 ( 1490170 2704020 ) ( 1500060 * 0 )
+ NEW met1 ( 189750 2698750 ) ( 1490170 * )
+ NEW met2 ( 191590 2414340 ) M2M3_PR_M
+ NEW met1 ( 189750 2698750 ) M1M2_PR
+ NEW met1 ( 1490170 2698750 ) M1M2_PR
+ NEW met2 ( 1490170 2704020 ) M2M3_PR_M ;
- din0_to_sram\[17\] ( custom_sram d[17] ) ( chip_controller din0_to_sram[17] ) + USE SIGNAL
- + ROUTED met1 ( 320850 2214250 ) ( 324070 * )
- NEW met2 ( 2214210 3299700 0 ) ( * 3307350 )
- NEW met2 ( 320850 2199460 0 ) ( * 2214250 )
- NEW met2 ( 324070 2214250 ) ( * 3307350 )
- NEW met1 ( 324070 3307350 ) ( 2214210 * )
- NEW met1 ( 320850 2214250 ) M1M2_PR
- NEW met1 ( 324070 2214250 ) M1M2_PR
- NEW met1 ( 324070 3307350 ) M1M2_PR
- NEW met1 ( 2214210 3307350 ) M1M2_PR ;
+ + ROUTED met3 ( 2699740 2887620 0 ) ( 2711930 * )
+ NEW met2 ( 2711930 2887620 ) ( * 3292050 )
+ NEW met1 ( 1499830 3292050 ) ( 2711930 * )
+ NEW met2 ( 326830 2290750 ) ( * 2300100 0 )
+ NEW met1 ( 326830 2290750 ) ( 1499830 * )
+ NEW met2 ( 1499830 2290750 ) ( * 3292050 )
+ NEW met2 ( 2711930 2887620 ) M2M3_PR_M
+ NEW met1 ( 2711930 3292050 ) M1M2_PR
+ NEW met1 ( 1499830 3292050 ) M1M2_PR
+ NEW met1 ( 326830 2290750 ) M1M2_PR
+ NEW met1 ( 1499830 2290750 ) M1M2_PR ;
- din0_to_sram\[18\] ( custom_sram d[18] ) ( chip_controller din0_to_sram[18] ) + USE SIGNAL
- + ROUTED met3 ( 2696980 2734620 ) ( * 2737340 0 )
- NEW met3 ( 600300 1799620 ) ( * 1800300 )
- NEW met3 ( 600300 1800300 ) ( 601220 * )
- NEW met4 ( 2691460 1805060 ) ( * 2642700 )
- NEW met4 ( 2691460 2642700 ) ( 2696980 * )
- NEW met4 ( 2696980 2642700 ) ( * 2734620 )
- NEW met1 ( 329130 2208130 ) ( 372600 * )
- NEW met1 ( 372600 2208130 ) ( * 2208470 )
- NEW met1 ( 372600 2208470 ) ( 462530 * )
- NEW met2 ( 329130 2199460 0 ) ( * 2208130 )
- NEW met2 ( 462530 2205580 ) ( * 2208470 )
- NEW met3 ( 534980 1799620 ) ( 600300 * )
- NEW met3 ( 462530 2205580 ) ( 534980 * )
- NEW met4 ( 534980 1799620 ) ( * 2205580 )
- NEW met3 ( 601220 1800300 ) ( * 1805060 )
- NEW met3 ( 601220 1805060 ) ( 2691460 * )
- NEW met3 ( 2696980 2734620 ) M3M4_PR_M
- NEW met3 ( 2691460 1805060 ) M3M4_PR_M
- NEW met1 ( 329130 2208130 ) M1M2_PR
- NEW met1 ( 462530 2208470 ) M1M2_PR
- NEW met2 ( 462530 2205580 ) M2M3_PR_M
- NEW met3 ( 534980 1799620 ) M3M4_PR_M
- NEW met3 ( 534980 2205580 ) M3M4_PR_M ;
+ + ROUTED met3 ( 185150 2424540 ) ( 200100 * )
+ NEW met3 ( 200100 2423860 0 ) ( * 2424540 )
+ NEW met2 ( 2239510 3298850 ) ( * 3299020 )
+ NEW met2 ( 2239510 3299020 ) ( 2240890 * 0 )
+ NEW met2 ( 185150 2424540 ) ( * 3298850 )
+ NEW met1 ( 185150 3298850 ) ( 2239510 * )
+ NEW met2 ( 185150 2424540 ) M2M3_PR_M
+ NEW met1 ( 185150 3298850 ) M1M2_PR
+ NEW met1 ( 2239510 3298850 ) M1M2_PR ;
- din0_to_sram\[19\] ( custom_sram d[19] ) ( chip_controller din0_to_sram[19] ) + USE SIGNAL
- + ROUTED li1 ( 362250 1787890 ) ( 362710 * )
- NEW li1 ( 362250 1787890 ) ( * 1788570 )
- NEW met1 ( 348910 1788570 ) ( 362250 * )
- NEW li1 ( 348910 1788230 ) ( * 1788570 )
- NEW li1 ( 347990 1788230 ) ( 348910 * )
- NEW li1 ( 347990 1788230 ) ( * 1792310 )
- NEW met1 ( 340170 1792310 ) ( 347990 * )
- NEW li1 ( 340170 1792310 ) ( * 1793670 )
- NEW met1 ( 328210 1793670 ) ( 340170 * )
- NEW met2 ( 328210 1793670 ) ( * 1800300 0 )
- NEW met1 ( 362710 1787890 ) ( 721510 * )
- NEW met2 ( 721510 1787890 ) ( * 2974150 )
- NEW met2 ( 1485110 2974150 ) ( * 2978060 )
- NEW met3 ( 1485110 2978060 ) ( 1500060 * 0 )
- NEW met1 ( 721510 2974150 ) ( 1485110 * )
- NEW li1 ( 362710 1787890 ) L1M1_PR_MR
- NEW li1 ( 362250 1788570 ) L1M1_PR_MR
- NEW li1 ( 348910 1788570 ) L1M1_PR_MR
- NEW li1 ( 347990 1792310 ) L1M1_PR_MR
- NEW li1 ( 340170 1792310 ) L1M1_PR_MR
- NEW li1 ( 340170 1793670 ) L1M1_PR_MR
- NEW met1 ( 328210 1793670 ) M1M2_PR
- NEW met1 ( 721510 1787890 ) M1M2_PR
- NEW met1 ( 721510 2974150 ) M1M2_PR
- NEW met1 ( 1485110 2974150 ) M1M2_PR
- NEW met2 ( 1485110 2978060 ) M2M3_PR_M ;
+ + ROUTED met3 ( 599380 2419780 0 ) ( 607430 * )
+ NEW met2 ( 607430 2419780 ) ( * 2421310 )
+ NEW met1 ( 607430 2421310 ) ( * 2421650 )
+ NEW met2 ( 983710 2421650 ) ( * 2836110 )
+ NEW met1 ( 607430 2421650 ) ( 983710 * )
+ NEW met2 ( 1490170 2836110 ) ( * 2836620 )
+ NEW met3 ( 1490170 2836620 ) ( 1500060 * 0 )
+ NEW met1 ( 983710 2836110 ) ( 1490170 * )
+ NEW met2 ( 607430 2419780 ) M2M3_PR_M
+ NEW met1 ( 607430 2421310 ) M1M2_PR
+ NEW met1 ( 983710 2421650 ) M1M2_PR
+ NEW met1 ( 983710 2836110 ) M1M2_PR
+ NEW met1 ( 1490170 2836110 ) M1M2_PR
+ NEW met2 ( 1490170 2836620 ) M2M3_PR_M ;
- din0_to_sram\[1\] ( custom_sram d[1] ) ( chip_controller din0_to_sram[1] ) + USE SIGNAL
- + ROUTED met3 ( 2699740 1837700 0 ) ( 2711930 * )
- NEW met2 ( 213210 1792650 ) ( * 1800300 0 )
- NEW li1 ( 287270 1792650 ) ( * 1793670 )
- NEW met2 ( 2711930 1797750 ) ( * 1837700 )
- NEW li1 ( 251850 1792650 ) ( * 1793670 )
- NEW met1 ( 213210 1792650 ) ( 251850 * )
- NEW met1 ( 251850 1793670 ) ( 287270 * )
- NEW met2 ( 329590 1792650 ) ( * 1797750 )
- NEW met1 ( 287270 1792650 ) ( 329590 * )
- NEW met1 ( 329590 1797750 ) ( 2711930 * )
- NEW met2 ( 2711930 1837700 ) M2M3_PR_M
- NEW met1 ( 213210 1792650 ) M1M2_PR
- NEW li1 ( 287270 1793670 ) L1M1_PR_MR
- NEW li1 ( 287270 1792650 ) L1M1_PR_MR
- NEW met1 ( 2711930 1797750 ) M1M2_PR
- NEW li1 ( 251850 1792650 ) L1M1_PR_MR
- NEW li1 ( 251850 1793670 ) L1M1_PR_MR
- NEW met1 ( 329590 1792650 ) M1M2_PR
- NEW met1 ( 329590 1797750 ) M1M2_PR ;
+ + ROUTED met2 ( 227470 2297550 ) ( * 2300100 0 )
+ NEW met2 ( 1445550 2297550 ) ( * 3308710 )
+ NEW met2 ( 1605630 3299700 0 ) ( * 3308710 )
+ NEW met1 ( 1445550 3308710 ) ( 1605630 * )
+ NEW met1 ( 227470 2297550 ) ( 1445550 * )
+ NEW met1 ( 1445550 3308710 ) M1M2_PR
+ NEW met1 ( 227470 2297550 ) M1M2_PR
+ NEW met1 ( 1445550 2297550 ) M1M2_PR
+ NEW met1 ( 1605630 3308710 ) M1M2_PR ;
- din0_to_sram\[20\] ( custom_sram d[20] ) ( chip_controller din0_to_sram[20] ) + USE SIGNAL
- + ROUTED met1 ( 338790 2208470 ) ( 344770 * )
- NEW met2 ( 338790 2199460 0 ) ( * 2208470 )
- NEW met2 ( 344770 2208470 ) ( * 3043170 )
- NEW met2 ( 1486950 3043170 ) ( * 3049460 )
- NEW met3 ( 1486950 3049460 ) ( 1500060 * 0 )
- NEW met1 ( 344770 3043170 ) ( 1486950 * )
- NEW met1 ( 338790 2208470 ) M1M2_PR
- NEW met1 ( 344770 2208470 ) M1M2_PR
- NEW met1 ( 344770 3043170 ) M1M2_PR
- NEW met1 ( 1486950 3043170 ) M1M2_PR
- NEW met2 ( 1486950 3049460 ) M2M3_PR_M ;
+ + ROUTED met2 ( 349830 2278340 ) ( 350750 * )
+ NEW met2 ( 349830 2278340 ) ( * 2300100 )
+ NEW met2 ( 348450 2300100 0 ) ( 349830 * )
+ NEW met2 ( 350750 1792990 ) ( * 2278340 )
+ NEW met2 ( 2382110 1792990 ) ( * 1800300 0 )
+ NEW met1 ( 350750 1792990 ) ( 2382110 * )
+ NEW met1 ( 350750 1792990 ) M1M2_PR
+ NEW met1 ( 2382110 1792990 ) M1M2_PR ;
- din0_to_sram\[21\] ( custom_sram d[21] ) ( chip_controller din0_to_sram[21] ) + USE SIGNAL
- + ROUTED met3 ( 196650 1944460 ) ( 200100 * 0 )
- NEW met2 ( 2400050 1786530 ) ( * 1800300 0 )
- NEW met1 ( 196650 1786530 ) ( 2400050 * )
- NEW met2 ( 196650 1786530 ) ( * 1944460 )
- NEW met2 ( 196650 1944460 ) M2M3_PR_M
- NEW met1 ( 196650 1786530 ) M1M2_PR
- NEW met1 ( 2400050 1786530 ) M1M2_PR ;
+ + ROUTED met2 ( 1295590 2435250 ) ( * 2877590 )
+ NEW met2 ( 1490170 2877590 ) ( * 2880820 )
+ NEW met3 ( 1490170 2880820 ) ( 1500060 * 0 )
+ NEW met1 ( 1295590 2877590 ) ( 1490170 * )
+ NEW met3 ( 599380 2429300 0 ) ( * 2430660 )
+ NEW met3 ( 599380 2430660 ) ( 606970 * )
+ NEW met2 ( 606970 2430660 ) ( * 2433380 )
+ NEW met2 ( 606970 2433380 ) ( 607430 * )
+ NEW met2 ( 607430 2433380 ) ( * 2435250 )
+ NEW met1 ( 607430 2435250 ) ( 1295590 * )
+ NEW met1 ( 1295590 2435250 ) M1M2_PR
+ NEW met1 ( 1295590 2877590 ) M1M2_PR
+ NEW met1 ( 1490170 2877590 ) M1M2_PR
+ NEW met2 ( 1490170 2880820 ) M2M3_PR_M
+ NEW met2 ( 606970 2430660 ) M2M3_PR_M
+ NEW met1 ( 607430 2435250 ) M1M2_PR ;
- din0_to_sram\[22\] ( custom_sram d[22] ) ( chip_controller din0_to_sram[22] ) + USE SIGNAL
- + ROUTED met2 ( 1156210 1809310 ) ( * 1945990 )
- NEW met3 ( 2699740 3037220 0 ) ( 2712390 * )
- NEW met2 ( 2712390 1809310 ) ( * 3037220 )
- NEW met1 ( 1156210 1809310 ) ( 2712390 * )
- NEW met3 ( 599380 1949900 0 ) ( 608810 * )
- NEW met2 ( 608810 1945990 ) ( * 1949900 )
- NEW met1 ( 608810 1945990 ) ( 1156210 * )
- NEW met1 ( 1156210 1945990 ) M1M2_PR
- NEW met1 ( 1156210 1809310 ) M1M2_PR
- NEW met1 ( 2712390 1809310 ) M1M2_PR
- NEW met2 ( 2712390 3037220 ) M2M3_PR_M
- NEW met2 ( 608810 1949900 ) M2M3_PR_M
- NEW met1 ( 608810 1945990 ) M1M2_PR ;
+ + ROUTED met3 ( 1488790 2925020 ) ( 1500060 * 0 )
+ NEW met2 ( 358570 2296530 ) ( * 2300100 0 )
+ NEW met1 ( 358570 2296530 ) ( 1488790 * )
+ NEW met2 ( 1488790 2296530 ) ( * 2925020 )
+ NEW met2 ( 1488790 2925020 ) M2M3_PR_M
+ NEW met1 ( 358570 2296530 ) M1M2_PR
+ NEW met1 ( 1488790 2296530 ) M1M2_PR ;
- din0_to_sram\[23\] ( custom_sram d[23] ) ( chip_controller din0_to_sram[23] ) + USE SIGNAL
- + ROUTED met2 ( 2328750 3299700 0 ) ( * 3308710 )
- NEW met1 ( 618930 3308710 ) ( 2328750 * )
- NEW met3 ( 599380 1954660 0 ) ( 607890 * )
- NEW met2 ( 607890 1954660 ) ( * 1955170 )
- NEW met1 ( 607890 1955170 ) ( 618930 * )
- NEW met2 ( 618930 1955170 ) ( * 3308710 )
- NEW met1 ( 2328750 3308710 ) M1M2_PR
- NEW met1 ( 618930 3308710 ) M1M2_PR
- NEW met2 ( 607890 1954660 ) M2M3_PR_M
- NEW met1 ( 607890 1955170 ) M1M2_PR
- NEW met1 ( 618930 1955170 ) M1M2_PR ;
+ + ROUTED met2 ( 192510 2444940 ) ( * 2449190 )
+ NEW met3 ( 192510 2444940 ) ( 200100 * )
+ NEW met3 ( 200100 2444260 0 ) ( * 2444940 )
+ NEW met1 ( 179170 2449190 ) ( 192510 * )
+ NEW met2 ( 2451110 3298340 ) ( * 3298510 )
+ NEW met2 ( 2451110 3298340 ) ( 2452950 * 0 )
+ NEW met1 ( 179170 3298510 ) ( 2451110 * )
+ NEW met2 ( 179170 2449190 ) ( * 3298510 )
+ NEW met1 ( 192510 2449190 ) M1M2_PR
+ NEW met2 ( 192510 2444940 ) M2M3_PR_M
+ NEW met1 ( 179170 2449190 ) M1M2_PR
+ NEW met1 ( 179170 3298510 ) M1M2_PR
+ NEW met1 ( 2451110 3298510 ) M1M2_PR ;
- din0_to_sram\[24\] ( custom_sram d[24] ) ( chip_controller din0_to_sram[24] ) + USE SIGNAL
- + ROUTED met2 ( 188370 1953130 ) ( * 1958740 )
- NEW met3 ( 188370 1958740 ) ( 200100 * 0 )
- NEW met1 ( 141450 1953130 ) ( 188370 * )
- NEW met2 ( 141450 1786870 ) ( * 1953130 )
- NEW met2 ( 2492510 1786870 ) ( * 1800300 0 )
- NEW met1 ( 141450 1786870 ) ( 2492510 * )
- NEW met1 ( 188370 1953130 ) M1M2_PR
- NEW met2 ( 188370 1958740 ) M2M3_PR_M
- NEW met1 ( 141450 1953130 ) M1M2_PR
- NEW met1 ( 141450 1786870 ) M1M2_PR
- NEW met1 ( 2492510 1786870 ) M1M2_PR ;
+ + ROUTED met3 ( 1488330 3012740 ) ( 1500060 * 0 )
+ NEW met2 ( 365470 2296190 ) ( * 2300100 0 )
+ NEW met1 ( 365470 2296190 ) ( 1488330 * )
+ NEW met2 ( 1488330 2296190 ) ( * 3012740 )
+ NEW met2 ( 1488330 3012740 ) M2M3_PR_M
+ NEW met1 ( 365470 2296190 ) M1M2_PR
+ NEW met1 ( 1488330 2296190 ) M1M2_PR ;
- din0_to_sram\[25\] ( custom_sram d[25] ) ( chip_controller din0_to_sram[25] ) + USE SIGNAL
- + ROUTED met2 ( 2385790 3299700 0 ) ( * 3308370 )
- NEW met1 ( 619390 3308370 ) ( 2385790 * )
- NEW met3 ( 599380 1969620 0 ) ( 607890 * )
- NEW met2 ( 607890 1969620 ) ( * 1969790 )
- NEW met1 ( 607890 1969790 ) ( 619390 * )
- NEW met2 ( 619390 1969790 ) ( * 3308370 )
- NEW met1 ( 619390 3308370 ) M1M2_PR
- NEW met1 ( 2385790 3308370 ) M1M2_PR
- NEW met2 ( 607890 1969620 ) M2M3_PR_M
- NEW met1 ( 607890 1969790 ) M1M2_PR
- NEW met1 ( 619390 1969790 ) M1M2_PR ;
+ + ROUTED met2 ( 372830 2699260 0 ) ( 374210 * )
+ NEW met2 ( 374210 2699260 ) ( * 2716770 )
+ NEW met1 ( 374210 2716770 ) ( 379270 * )
+ NEW met2 ( 2523330 3299700 0 ) ( * 3305650 )
+ NEW met2 ( 379270 2716770 ) ( * 3305650 )
+ NEW met1 ( 379270 3305650 ) ( 2523330 * )
+ NEW met1 ( 374210 2716770 ) M1M2_PR
+ NEW met1 ( 379270 2716770 ) M1M2_PR
+ NEW met1 ( 379270 3305650 ) M1M2_PR
+ NEW met1 ( 2523330 3305650 ) M1M2_PR ;
- din0_to_sram\[26\] ( custom_sram d[26] ) ( chip_controller din0_to_sram[26] ) + USE SIGNAL
- + ROUTED met2 ( 2442830 3299700 0 ) ( * 3305650 )
- NEW met1 ( 366390 2213910 ) ( 371450 * )
- NEW met1 ( 371450 3305650 ) ( 2442830 * )
- NEW met2 ( 366390 2199460 0 ) ( * 2213910 )
- NEW met2 ( 371450 2213910 ) ( * 3305650 )
- NEW met1 ( 2442830 3305650 ) M1M2_PR
- NEW met1 ( 366390 2213910 ) M1M2_PR
- NEW met1 ( 371450 2213910 ) M1M2_PR
- NEW met1 ( 371450 3305650 ) M1M2_PR ;
+ + ROUTED met2 ( 371910 2295850 ) ( * 2300100 0 )
+ NEW met1 ( 371910 2295850 ) ( 1487870 * )
+ NEW met3 ( 1487870 3145340 ) ( 1500060 * 0 )
+ NEW met2 ( 1487870 2295850 ) ( * 3145340 )
+ NEW met1 ( 371910 2295850 ) M1M2_PR
+ NEW met1 ( 1487870 2295850 ) M1M2_PR
+ NEW met2 ( 1487870 3145340 ) M2M3_PR_M ;
- din0_to_sram\[27\] ( custom_sram d[27] ) ( chip_controller din0_to_sram[27] ) + USE SIGNAL
- + ROUTED met2 ( 1349410 1790610 ) ( * 2223090 )
- NEW met2 ( 2538510 1790610 ) ( * 1800300 0 )
- NEW met1 ( 369610 2223090 ) ( 1349410 * )
- NEW met2 ( 369610 2199460 0 ) ( * 2223090 )
- NEW met1 ( 1349410 1790610 ) ( 2538510 * )
- NEW met1 ( 1349410 2223090 ) M1M2_PR
- NEW met1 ( 1349410 1790610 ) M1M2_PR
- NEW met1 ( 2538510 1790610 ) M1M2_PR
- NEW met1 ( 369610 2223090 ) M1M2_PR ;
+ + ROUTED met2 ( 1487870 3188010 ) ( * 3189540 )
+ NEW met3 ( 1487870 3189540 ) ( 1500060 * 0 )
+ NEW met1 ( 1298810 3188010 ) ( 1487870 * )
+ NEW met2 ( 1298810 2463130 ) ( * 3188010 )
+ NEW met3 ( 599380 2456500 0 ) ( * 2457180 )
+ NEW met3 ( 599380 2457180 ) ( 606970 * )
+ NEW met2 ( 606970 2457180 ) ( * 2459900 )
+ NEW met2 ( 606970 2459900 ) ( 607430 * )
+ NEW met2 ( 607430 2459900 ) ( * 2462790 )
+ NEW met1 ( 607430 2462790 ) ( * 2463130 )
+ NEW met1 ( 607430 2463130 ) ( 1298810 * )
+ NEW met1 ( 1298810 3188010 ) M1M2_PR
+ NEW met1 ( 1487870 3188010 ) M1M2_PR
+ NEW met2 ( 1487870 3189540 ) M2M3_PR_M
+ NEW met1 ( 1298810 2463130 ) M1M2_PR
+ NEW met2 ( 606970 2457180 ) M2M3_PR_M
+ NEW met1 ( 607430 2462790 ) M1M2_PR ;
- din0_to_sram\[28\] ( custom_sram d[28] ) ( chip_controller din0_to_sram[28] ) + USE SIGNAL
- + ROUTED met2 ( 376050 2199460 0 ) ( 377430 * )
- NEW met2 ( 377430 2199460 ) ( * 2224110 )
- NEW met2 ( 2630970 1790950 ) ( * 1800300 0 )
- NEW met1 ( 377430 2224110 ) ( 1211410 * )
- NEW met2 ( 1211410 1790950 ) ( * 2224110 )
- NEW met1 ( 1211410 1790950 ) ( 2630970 * )
- NEW met1 ( 377430 2224110 ) M1M2_PR
- NEW met1 ( 2630970 1790950 ) M1M2_PR
- NEW met1 ( 1211410 2224110 ) M1M2_PR
- NEW met1 ( 1211410 1790950 ) M1M2_PR ;
+ + ROUTED met1 ( 190670 2704530 ) ( 217350 * )
+ NEW met3 ( 192050 2480980 ) ( 200100 * )
+ NEW met3 ( 200100 2480300 0 ) ( * 2480980 )
+ NEW met2 ( 190670 2666620 ) ( 192050 * )
+ NEW met2 ( 190670 2666620 ) ( * 2704530 )
+ NEW met2 ( 192050 2480980 ) ( * 2666620 )
+ NEW met2 ( 217350 2704530 ) ( * 3229490 )
+ NEW met2 ( 1490170 3229490 ) ( * 3233740 )
+ NEW met3 ( 1490170 3233740 ) ( 1500060 * 0 )
+ NEW met1 ( 217350 3229490 ) ( 1490170 * )
+ NEW met1 ( 190670 2704530 ) M1M2_PR
+ NEW met1 ( 217350 2704530 ) M1M2_PR
+ NEW met2 ( 192050 2480980 ) M2M3_PR_M
+ NEW met1 ( 217350 3229490 ) M1M2_PR
+ NEW met1 ( 1490170 3229490 ) M1M2_PR
+ NEW met2 ( 1490170 3233740 ) M2M3_PR_M ;
- din0_to_sram\[29\] ( custom_sram d[29] ) ( chip_controller din0_to_sram[29] ) + USE SIGNAL
- + ROUTED met1 ( 192970 1959930 ) ( 199870 * )
- NEW met3 ( 192970 1987980 ) ( 200100 * 0 )
- NEW met2 ( 192970 1959930 ) ( * 1987980 )
- NEW met2 ( 2676970 1787550 ) ( * 1800300 0 )
- NEW met1 ( 198490 1787550 ) ( 2676970 * )
- NEW met2 ( 199870 1849200 ) ( * 1959930 )
- NEW met1 ( 198490 1824270 ) ( * 1825290 )
- NEW met2 ( 198490 1825290 ) ( * 1843140 )
- NEW met2 ( 198490 1843140 ) ( 199410 * )
- NEW met2 ( 199410 1843140 ) ( * 1849200 )
- NEW met2 ( 199410 1849200 ) ( 199870 * )
- NEW met2 ( 198490 1787550 ) ( * 1824270 )
- NEW met1 ( 192970 1959930 ) M1M2_PR
- NEW met1 ( 199870 1959930 ) M1M2_PR
- NEW met1 ( 198490 1787550 ) M1M2_PR
- NEW met2 ( 192970 1987980 ) M2M3_PR_M
- NEW met1 ( 2676970 1787550 ) M1M2_PR
- NEW met1 ( 198490 1824270 ) M1M2_PR
- NEW met1 ( 198490 1825290 ) M1M2_PR ;
+ + ROUTED met2 ( 2594170 3299700 0 ) ( * 3306330 )
+ NEW met1 ( 618930 3306330 ) ( 2594170 * )
+ NEW met3 ( 599380 2467380 0 ) ( 608350 * )
+ NEW met2 ( 608350 2467380 ) ( * 2467550 )
+ NEW met1 ( 608350 2467550 ) ( 618930 * )
+ NEW met2 ( 618930 2467550 ) ( * 3306330 )
+ NEW met1 ( 618930 3306330 ) M1M2_PR
+ NEW met1 ( 2594170 3306330 ) M1M2_PR
+ NEW met2 ( 608350 2467380 ) M2M3_PR_M
+ NEW met1 ( 608350 2467550 ) M1M2_PR
+ NEW met1 ( 618930 2467550 ) M1M2_PR ;
- din0_to_sram\[2\] ( custom_sram d[2] ) ( chip_controller din0_to_sram[2] ) + USE SIGNAL
- + ROUTED met2 ( 199870 1798940 ) ( 200330 * )
- NEW met2 ( 200330 1791970 ) ( * 1798940 )
- NEW met2 ( 1753750 1791290 ) ( * 1800300 0 )
- NEW met1 ( 251850 1791290 ) ( * 1791970 )
- NEW met1 ( 200330 1791970 ) ( 251850 * )
- NEW met1 ( 251850 1791290 ) ( 1753750 * )
- NEW met1 ( 192510 1801150 ) ( 199870 * )
- NEW met2 ( 192510 1801150 ) ( * 1817980 )
- NEW met3 ( 192510 1817980 ) ( 200100 * 0 )
- NEW met2 ( 199870 1798940 ) ( * 1801150 )
- NEW met1 ( 200330 1791970 ) M1M2_PR
- NEW met1 ( 1753750 1791290 ) M1M2_PR
- NEW met1 ( 199870 1801150 ) M1M2_PR
- NEW met1 ( 192510 1801150 ) M1M2_PR
- NEW met2 ( 192510 1817980 ) M2M3_PR_M ;
+ + ROUTED met2 ( 219650 2699260 0 ) ( 220570 * )
+ NEW met2 ( 220570 2699260 ) ( * 2732070 )
+ NEW met2 ( 1460270 2180250 ) ( * 2732070 )
+ NEW met1 ( 220570 2732070 ) ( 1460270 * )
+ NEW met2 ( 1484190 2174980 ) ( * 2180250 )
+ NEW met3 ( 1484190 2174980 ) ( 1500060 * 0 )
+ NEW met1 ( 1460270 2180250 ) ( 1484190 * )
+ NEW met1 ( 220570 2732070 ) M1M2_PR
+ NEW met1 ( 1460270 2732070 ) M1M2_PR
+ NEW met1 ( 1460270 2180250 ) M1M2_PR
+ NEW met1 ( 1484190 2180250 ) M1M2_PR
+ NEW met2 ( 1484190 2174980 ) M2M3_PR_M ;
- din0_to_sram\[30\] ( custom_sram d[30] ) ( chip_controller din0_to_sram[30] ) + USE SIGNAL
- + ROUTED met2 ( 2557370 3299700 0 ) ( * 3307010 )
- NEW met1 ( 619850 3307010 ) ( 2557370 * )
- NEW met1 ( 608350 1998010 ) ( 619850 * )
- NEW met2 ( 619850 1998010 ) ( * 3307010 )
- NEW met2 ( 608350 1994100 ) ( * 1998010 )
- NEW met3 ( 599380 1994100 0 ) ( 608350 * )
- NEW met1 ( 608350 1998010 ) M1M2_PR
- NEW met1 ( 619850 3307010 ) M1M2_PR
- NEW met1 ( 2557370 3307010 ) M1M2_PR
- NEW met1 ( 619850 1998010 ) M1M2_PR
- NEW met2 ( 608350 1994100 ) M2M3_PR_M ;
+ + ROUTED met1 ( 393990 2283950 ) ( 399510 * )
+ NEW met2 ( 393990 2283950 ) ( * 2300100 0 )
+ NEW met2 ( 399510 1787890 ) ( * 2283950 )
+ NEW met2 ( 2664550 1787890 ) ( * 1800300 0 )
+ NEW met1 ( 399510 1787890 ) ( 2664550 * )
+ NEW met1 ( 399510 1787890 ) M1M2_PR
+ NEW met1 ( 399510 2283950 ) M1M2_PR
+ NEW met1 ( 393990 2283950 ) M1M2_PR
+ NEW met1 ( 2664550 1787890 ) M1M2_PR ;
- din0_to_sram\[31\] ( custom_sram d[31] ) ( chip_controller din0_to_sram[31] ) + USE SIGNAL
- + ROUTED met2 ( 374670 1794350 ) ( * 1800300 0 )
- NEW met2 ( 2705030 1794350 ) ( * 2256300 )
- NEW met2 ( 2705030 2256300 ) ( 2705490 * )
- NEW met2 ( 2705030 2401200 ) ( 2705490 * )
- NEW met2 ( 2705490 2256300 ) ( * 2401200 )
- NEW met2 ( 2705030 2401200 ) ( * 2546100 )
- NEW met2 ( 2705030 2546100 ) ( 2705490 * )
- NEW met2 ( 2705030 2691000 ) ( 2705490 * )
- NEW met2 ( 2705490 2546100 ) ( * 2691000 )
- NEW met3 ( 2699740 3262300 0 ) ( 2705030 * )
- NEW met2 ( 2705030 2691000 ) ( * 3262300 )
- NEW met1 ( 374670 1794350 ) ( 2705030 * )
- NEW met1 ( 374670 1794350 ) M1M2_PR
- NEW met1 ( 2705030 1794350 ) M1M2_PR
- NEW met2 ( 2705030 3262300 ) M2M3_PR_M ;
+ + ROUTED met3 ( 599380 2479620 0 ) ( 608350 * )
+ NEW met2 ( 608350 2479620 ) ( * 2483530 )
+ NEW met2 ( 1383910 2483530 ) ( * 3288990 )
+ NEW met3 ( 2699740 3262300 0 ) ( 2714230 * )
+ NEW met2 ( 2714230 3262300 ) ( * 3288990 )
+ NEW met1 ( 1383910 3288990 ) ( 2714230 * )
+ NEW met1 ( 608350 2483530 ) ( 1383910 * )
+ NEW met1 ( 1383910 3288990 ) M1M2_PR
+ NEW met1 ( 2714230 3288990 ) M1M2_PR
+ NEW met2 ( 608350 2479620 ) M2M3_PR_M
+ NEW met1 ( 608350 2483530 ) M1M2_PR
+ NEW met1 ( 1383910 2483530 ) M1M2_PR
+ NEW met2 ( 2714230 3262300 ) M2M3_PR_M ;
- din0_to_sram\[3\] ( custom_sram d[3] ) ( chip_controller din0_to_sram[3] ) + USE SIGNAL
- + ROUTED met2 ( 1246370 1807610 ) ( * 1835490 )
- NEW met3 ( 2699740 1912500 0 ) ( 2714690 * )
- NEW met2 ( 2714690 1807610 ) ( * 1912500 )
- NEW met1 ( 1246370 1807610 ) ( 2714690 * )
- NEW met3 ( 599380 1838380 0 ) ( 613870 * )
- NEW met2 ( 613870 1835490 ) ( * 1838380 )
- NEW met1 ( 613870 1835490 ) ( 1246370 * )
- NEW met1 ( 1246370 1835490 ) M1M2_PR
- NEW met1 ( 1246370 1807610 ) M1M2_PR
- NEW met1 ( 2714690 1807610 ) M1M2_PR
- NEW met2 ( 2714690 1912500 ) M2M3_PR_M
- NEW met2 ( 613870 1838380 ) M2M3_PR_M
- NEW met1 ( 613870 1835490 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2323900 0 ) ( 606970 * )
+ NEW met2 ( 606970 2318970 ) ( * 2323900 )
+ NEW met2 ( 709090 2221730 ) ( * 2318970 )
+ NEW met1 ( 606970 2318970 ) ( 709090 * )
+ NEW met2 ( 1490170 2218500 ) ( * 2221730 )
+ NEW met3 ( 1490170 2218500 ) ( 1500060 * 0 )
+ NEW met1 ( 709090 2221730 ) ( 1490170 * )
+ NEW met2 ( 606970 2323900 ) M2M3_PR_M
+ NEW met1 ( 606970 2318970 ) M1M2_PR
+ NEW met1 ( 709090 2221730 ) M1M2_PR
+ NEW met1 ( 709090 2318970 ) M1M2_PR
+ NEW met1 ( 1490170 2221730 ) M1M2_PR
+ NEW met2 ( 1490170 2218500 ) M2M3_PR_M ;
- din0_to_sram\[4\] ( custom_sram d[4] ) ( chip_controller din0_to_sram[4] ) + USE SIGNAL
- + ROUTED met1 ( 192510 2225130 ) ( 1500750 * )
- NEW met2 ( 1699930 3299700 0 ) ( * 3305310 )
- NEW met1 ( 1500750 3305310 ) ( 1699930 * )
- NEW met2 ( 1500750 2225130 ) ( * 3305310 )
- NEW met3 ( 192510 1836340 ) ( 200100 * 0 )
- NEW met2 ( 192510 1836340 ) ( * 2225130 )
- NEW met1 ( 192510 2225130 ) M1M2_PR
- NEW met1 ( 1500750 2225130 ) M1M2_PR
- NEW met1 ( 1500750 3305310 ) M1M2_PR
- NEW met1 ( 1699930 3305310 ) M1M2_PR
- NEW met2 ( 192510 1836340 ) M2M3_PR_M ;
+ + ROUTED met2 ( 1676010 1788570 ) ( * 1800300 0 )
+ NEW met2 ( 238970 2699260 0 ) ( 239890 * )
+ NEW met2 ( 239890 2699260 ) ( * 2726630 )
+ NEW met1 ( 239890 2726630 ) ( 1425770 * )
+ NEW met2 ( 1425770 1788570 ) ( * 2726630 )
+ NEW met1 ( 1425770 1788570 ) ( 1676010 * )
+ NEW met1 ( 1676010 1788570 ) M1M2_PR
+ NEW met1 ( 239890 2726630 ) M1M2_PR
+ NEW met1 ( 1425770 2726630 ) M1M2_PR
+ NEW met1 ( 1425770 1788570 ) M1M2_PR ;
- din0_to_sram\[5\] ( custom_sram d[5] ) ( chip_controller din0_to_sram[5] ) + USE SIGNAL
- + ROUTED met3 ( 599380 1851980 0 ) ( 607430 * )
- NEW met2 ( 607430 1851980 ) ( * 1854190 )
- NEW met2 ( 1756970 3299700 0 ) ( * 3309730 )
- NEW met1 ( 607430 1854190 ) ( 618010 * )
- NEW met1 ( 618010 3309730 ) ( 1756970 * )
- NEW met2 ( 618010 1854190 ) ( * 3309730 )
- NEW met2 ( 607430 1851980 ) M2M3_PR_M
- NEW met1 ( 607430 1854190 ) M1M2_PR
- NEW met1 ( 1756970 3309730 ) M1M2_PR
- NEW met1 ( 618010 1854190 ) M1M2_PR
- NEW met1 ( 618010 3309730 ) M1M2_PR ;
+ + ROUTED met2 ( 1746850 1792310 ) ( * 1800300 0 )
+ NEW met2 ( 261510 1792310 ) ( * 2256300 )
+ NEW met2 ( 260130 2256300 ) ( 261510 * )
+ NEW met2 ( 260130 2256300 ) ( * 2287860 )
+ NEW met2 ( 258750 2287860 ) ( 260130 * )
+ NEW met2 ( 258750 2287860 ) ( * 2300100 )
+ NEW met2 ( 257830 2300100 0 ) ( 258750 * )
+ NEW met1 ( 261510 1792310 ) ( 1746850 * )
+ NEW met1 ( 1746850 1792310 ) M1M2_PR
+ NEW met1 ( 261510 1792310 ) M1M2_PR ;
- din0_to_sram\[6\] ( custom_sram d[6] ) ( chip_controller din0_to_sram[6] ) + USE SIGNAL
- + ROUTED met3 ( 2697670 2059380 ) ( 2697900 * )
- NEW met3 ( 2697900 2059380 ) ( * 2062100 0 )
- NEW met2 ( 572930 2204730 ) ( * 2213230 )
- NEW met2 ( 1349870 2180250 ) ( * 2204730 )
- NEW met1 ( 1349870 2180250 ) ( 1362750 * )
- NEW met2 ( 1362750 2012630 ) ( * 2180250 )
- NEW met2 ( 1466710 1824950 ) ( * 1921510 )
- NEW met2 ( 2697670 1808290 ) ( * 2059380 )
- NEW met1 ( 236210 2213230 ) ( 572930 * )
- NEW met2 ( 1391270 1956700 ) ( 1391730 * )
- NEW met2 ( 1391730 1943950 ) ( * 1956700 )
- NEW met1 ( 1391730 1943950 ) ( 1421630 * )
- NEW met2 ( 1421630 1921510 ) ( * 1943950 )
- NEW met1 ( 1421630 1921510 ) ( 1466710 * )
- NEW met1 ( 1466710 1824950 ) ( 1503970 * )
- NEW met2 ( 236210 2199460 0 ) ( * 2213230 )
- NEW met1 ( 572930 2204730 ) ( 1349870 * )
- NEW met1 ( 1362750 2012630 ) ( 1391270 * )
- NEW met2 ( 1391270 1956700 ) ( * 2012630 )
- NEW met2 ( 1503970 1808290 ) ( * 1824950 )
- NEW met1 ( 1503970 1808290 ) ( 2697670 * )
- NEW met1 ( 572930 2213230 ) M1M2_PR
- NEW met1 ( 1466710 1824950 ) M1M2_PR
- NEW met1 ( 1466710 1921510 ) M1M2_PR
- NEW met2 ( 2697670 2059380 ) M2M3_PR_M
- NEW met1 ( 572930 2204730 ) M1M2_PR
- NEW met1 ( 1362750 2012630 ) M1M2_PR
- NEW met1 ( 1349870 2204730 ) M1M2_PR
- NEW met1 ( 1349870 2180250 ) M1M2_PR
- NEW met1 ( 1362750 2180250 ) M1M2_PR
- NEW met1 ( 2697670 1808290 ) M1M2_PR
- NEW met1 ( 236210 2213230 ) M1M2_PR
- NEW met1 ( 1391730 1943950 ) M1M2_PR
- NEW met1 ( 1421630 1943950 ) M1M2_PR
- NEW met1 ( 1421630 1921510 ) M1M2_PR
- NEW met1 ( 1503970 1824950 ) M1M2_PR
- NEW met1 ( 1391270 2012630 ) M1M2_PR
- NEW met1 ( 1503970 1808290 ) M1M2_PR ;
+ + ROUTED met2 ( 2712850 1810330 ) ( * 2062100 )
+ NEW met1 ( 264270 2283950 ) ( 267950 * )
+ NEW met2 ( 264270 2283950 ) ( * 2300100 0 )
+ NEW met2 ( 267950 1810330 ) ( * 2283950 )
+ NEW met1 ( 267950 1810330 ) ( 2712850 * )
+ NEW met3 ( 2699740 2062100 0 ) ( 2712850 * )
+ NEW met2 ( 2712850 2062100 ) M2M3_PR_M
+ NEW met1 ( 2712850 1810330 ) M1M2_PR
+ NEW met1 ( 267950 1810330 ) M1M2_PR
+ NEW met1 ( 267950 2283950 ) M1M2_PR
+ NEW met1 ( 264270 2283950 ) M1M2_PR ;
- din0_to_sram\[7\] ( custom_sram d[7] ) ( chip_controller din0_to_sram[7] ) + USE SIGNAL
- + ROUTED met3 ( 2698590 2210340 ) ( 2698820 * )
- NEW met3 ( 2698820 2210340 ) ( * 2212380 0 )
- NEW met2 ( 2698590 1794010 ) ( * 2210340 )
- NEW met2 ( 247710 1794010 ) ( * 1800300 0 )
- NEW met1 ( 247710 1794010 ) ( 2698590 * )
- NEW met2 ( 2698590 2210340 ) M2M3_PR_M
- NEW met1 ( 2698590 1794010 ) M1M2_PR
- NEW met1 ( 247710 1794010 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2352460 0 ) ( 607430 * )
+ NEW met2 ( 607430 2352460 ) ( * 2352630 )
+ NEW met1 ( 607430 2352630 ) ( 618010 * )
+ NEW met2 ( 1817230 3299700 0 ) ( * 3307350 )
+ NEW met1 ( 618010 3307350 ) ( 1817230 * )
+ NEW met2 ( 618010 2352630 ) ( * 3307350 )
+ NEW met2 ( 607430 2352460 ) M2M3_PR_M
+ NEW met1 ( 607430 2352630 ) M1M2_PR
+ NEW met1 ( 618010 2352630 ) M1M2_PR
+ NEW met1 ( 618010 3307350 ) M1M2_PR
+ NEW met1 ( 1817230 3307350 ) M1M2_PR ;
- din0_to_sram\[8\] ( custom_sram d[8] ) ( chip_controller din0_to_sram[8] ) + USE SIGNAL
- + ROUTED met3 ( 498410 2201500 ) ( 513820 * )
- NEW met2 ( 498410 2201500 ) ( * 2210850 )
- NEW met4 ( 513820 1796220 ) ( * 2201500 )
- NEW li1 ( 2696750 1804550 ) ( * 1811010 )
- NEW met1 ( 2696750 2194530 ) ( 2711930 * )
- NEW met2 ( 2696750 1811010 ) ( * 2194530 )
- NEW met3 ( 2699740 2287180 0 ) ( 2711930 * )
- NEW met2 ( 2711930 2194530 ) ( * 2287180 )
- NEW met1 ( 259210 2210850 ) ( 498410 * )
- NEW met2 ( 259210 2199460 0 ) ( * 2210850 )
- NEW met3 ( 513820 1796220 ) ( 600070 * )
- NEW met2 ( 600070 1796220 ) ( * 1804550 )
- NEW met1 ( 600070 1804550 ) ( 2696750 * )
- NEW met1 ( 498410 2210850 ) M1M2_PR
- NEW met3 ( 513820 1796220 ) M3M4_PR_M
- NEW met2 ( 498410 2201500 ) M2M3_PR_M
- NEW met3 ( 513820 2201500 ) M3M4_PR_M
- NEW met2 ( 600070 1796220 ) M2M3_PR_M
- NEW li1 ( 2696750 1804550 ) L1M1_PR_MR
- NEW li1 ( 2696750 1811010 ) L1M1_PR_MR
- NEW met1 ( 2696750 1811010 ) M1M2_PR
- NEW met1 ( 2696750 2194530 ) M1M2_PR
- NEW met1 ( 2711930 2194530 ) M1M2_PR
- NEW met2 ( 2711930 2287180 ) M2M3_PR_M
- NEW met1 ( 259210 2210850 ) M1M2_PR
- NEW met1 ( 600070 1804550 ) M1M2_PR
- NEW met1 ( 2696750 1811010 ) RECT ( -355 -70 0 70 ) ;
+ + ROUTED met3 ( 2699740 2212380 0 ) ( 2711930 * )
+ NEW met2 ( 276230 2287350 ) ( * 2300100 0 )
+ NEW met2 ( 1499830 1821600 ) ( 1500290 * )
+ NEW met2 ( 1499830 1809310 ) ( * 1821600 )
+ NEW met1 ( 276230 2287350 ) ( 1500290 * )
+ NEW met2 ( 1500290 1821600 ) ( * 2287350 )
+ NEW met1 ( 1499830 1809310 ) ( 2711930 * )
+ NEW met2 ( 2711930 1809310 ) ( * 2212380 )
+ NEW met2 ( 2711930 2212380 ) M2M3_PR_M
+ NEW met1 ( 276230 2287350 ) M1M2_PR
+ NEW met1 ( 2711930 1809310 ) M1M2_PR
+ NEW met1 ( 1499830 1809310 ) M1M2_PR
+ NEW met1 ( 1500290 2287350 ) M1M2_PR ;
- din0_to_sram\[9\] ( custom_sram d[9] ) ( chip_controller din0_to_sram[9] ) + USE SIGNAL
- + ROUTED met3 ( 599380 1871700 0 ) ( 607890 * )
- NEW met2 ( 607890 1871700 ) ( * 1876630 )
- NEW met2 ( 1985590 3299700 0 ) ( * 3309390 )
- NEW met1 ( 618470 3309390 ) ( 1985590 * )
- NEW met1 ( 607890 1876630 ) ( 618470 * )
- NEW met2 ( 618470 1876630 ) ( * 3309390 )
- NEW met2 ( 607890 1871700 ) M2M3_PR_M
- NEW met1 ( 607890 1876630 ) M1M2_PR
- NEW met1 ( 618470 3309390 ) M1M2_PR
- NEW met1 ( 1985590 3309390 ) M1M2_PR
- NEW met1 ( 618470 1876630 ) M1M2_PR ;
+ + ROUTED met2 ( 1958450 3299700 0 ) ( * 3307010 )
+ NEW met3 ( 599380 2357220 0 ) ( 607430 * )
+ NEW met2 ( 607430 2357220 ) ( * 2357390 )
+ NEW met1 ( 617090 3307010 ) ( 1958450 * )
+ NEW met1 ( 607430 2357390 ) ( 617090 * )
+ NEW met2 ( 617090 2357390 ) ( * 3307010 )
+ NEW met1 ( 1958450 3307010 ) M1M2_PR
+ NEW met2 ( 607430 2357220 ) M2M3_PR_M
+ NEW met1 ( 607430 2357390 ) M1M2_PR
+ NEW met1 ( 617090 3307010 ) M1M2_PR
+ NEW met1 ( 617090 2357390 ) M1M2_PR ;
- dout0_to_sram\[0\] ( custom_sram q[0] ) ( chip_controller dout0_to_sram[0] ) + USE SIGNAL
- + ROUTED met2 ( 1528810 3299700 0 ) ( * 3310070 )
- NEW met1 ( 617550 3310070 ) ( 1528810 * )
- NEW met3 ( 599380 1822060 0 ) ( 607430 * )
- NEW met2 ( 607430 1822060 ) ( * 1826310 )
- NEW met1 ( 607430 1826310 ) ( 617550 * )
- NEW met2 ( 617550 1826310 ) ( * 3310070 )
- NEW met1 ( 617550 3310070 ) M1M2_PR
- NEW met1 ( 1528810 3310070 ) M1M2_PR
- NEW met2 ( 607430 1822060 ) M2M3_PR_M
- NEW met1 ( 607430 1826310 ) M1M2_PR
- NEW met1 ( 617550 1826310 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2308260 0 ) ( 607430 * )
+ NEW met2 ( 607430 2308260 ) ( * 2308430 )
+ NEW met2 ( 1535250 3299700 0 ) ( * 3307690 )
+ NEW met1 ( 607430 2308430 ) ( 620770 * )
+ NEW met1 ( 620770 3307690 ) ( 1535250 * )
+ NEW met2 ( 620770 2308430 ) ( * 3307690 )
+ NEW met2 ( 607430 2308260 ) M2M3_PR_M
+ NEW met1 ( 607430 2308430 ) M1M2_PR
+ NEW met1 ( 1535250 3307690 ) M1M2_PR
+ NEW met1 ( 620770 2308430 ) M1M2_PR
+ NEW met1 ( 620770 3307690 ) M1M2_PR ;
- dout0_to_sram\[10\] ( custom_sram q[10] ) ( chip_controller dout0_to_sram[10] ) + USE SIGNAL
- + ROUTED met2 ( 593630 1784830 ) ( * 1790270 )
- NEW met2 ( 1938670 1790270 ) ( * 1800300 0 )
- NEW met2 ( 261970 1784830 ) ( * 1800300 )
- NEW met2 ( 261510 1800300 0 ) ( 261970 * )
- NEW met1 ( 261970 1784830 ) ( 593630 * )
- NEW met1 ( 593630 1790270 ) ( 1938670 * )
- NEW met1 ( 593630 1784830 ) M1M2_PR
- NEW met1 ( 593630 1790270 ) M1M2_PR
- NEW met1 ( 1938670 1790270 ) M1M2_PR
- NEW met1 ( 261970 1784830 ) M1M2_PR ;
+ + ROUTED met2 ( 278990 2699260 0 ) ( 280370 * )
+ NEW met2 ( 280370 2699260 ) ( * 2718470 )
+ NEW li1 ( 490130 2718130 ) ( * 2718810 )
+ NEW met1 ( 490130 2718810 ) ( 493810 * )
+ NEW met1 ( 493810 2718130 ) ( * 2718810 )
+ NEW met1 ( 493810 2718130 ) ( 510830 * )
+ NEW li1 ( 510830 2718130 ) ( * 2718810 )
+ NEW met1 ( 510830 2718810 ) ( 511750 * )
+ NEW met2 ( 511750 2718810 ) ( * 2734450 )
+ NEW met2 ( 1248670 2987750 ) ( * 3001860 )
+ NEW met2 ( 1248670 3001860 ) ( 1249130 * )
+ NEW met2 ( 1249130 3001860 ) ( * 3015630 )
+ NEW met1 ( 1249130 3015630 ) ( 1259250 * )
+ NEW met1 ( 1459350 3208750 ) ( 1466710 * )
+ NEW met1 ( 1259250 3063570 ) ( 1269830 * )
+ NEW met1 ( 1269830 3063570 ) ( * 3063910 )
+ NEW met1 ( 1269830 3063910 ) ( 1283630 * )
+ NEW met2 ( 1283630 3063910 ) ( * 3073770 )
+ NEW met2 ( 1259250 3015630 ) ( * 3063570 )
+ NEW met2 ( 1443710 3153330 ) ( * 3167270 )
+ NEW met1 ( 1443710 3167270 ) ( 1459350 * )
+ NEW met2 ( 1459350 3167270 ) ( * 3208750 )
+ NEW met1 ( 1466710 3224730 ) ( 1469930 * )
+ NEW met2 ( 1469930 3224730 ) ( * 3250230 )
+ NEW met1 ( 1469930 3250230 ) ( 1483270 * )
+ NEW met2 ( 1466710 3208750 ) ( * 3224730 )
+ NEW met2 ( 1483270 3250230 ) ( * 3277430 )
+ NEW met1 ( 280370 2718470 ) ( 324300 * )
+ NEW met1 ( 324300 2718130 ) ( * 2718470 )
+ NEW met1 ( 324300 2718130 ) ( 490130 * )
+ NEW met1 ( 511750 2734450 ) ( 524630 * )
+ NEW met1 ( 1217850 2890850 ) ( 1224750 * )
+ NEW met1 ( 1239010 2987750 ) ( 1248670 * )
+ NEW met1 ( 1490630 3277430 ) ( * 3277770 )
+ NEW met2 ( 1490630 3277770 ) ( * 3290690 )
+ NEW met1 ( 1483270 3277430 ) ( 1490630 * )
+ NEW met1 ( 1490630 3290690 ) ( 2694450 * )
+ NEW met2 ( 524630 2734450 ) ( * 2744310 )
+ NEW met2 ( 1207730 2744310 ) ( * 2751110 )
+ NEW met1 ( 1207730 2751110 ) ( 1217850 * )
+ NEW met1 ( 524630 2744310 ) ( 1207730 * )
+ NEW met2 ( 1217850 2751110 ) ( * 2890850 )
+ NEW met1 ( 1224750 2935730 ) ( 1228430 * )
+ NEW met2 ( 1228430 2935730 ) ( * 2947970 )
+ NEW met1 ( 1228430 2947970 ) ( 1239010 * )
+ NEW met2 ( 1224750 2890850 ) ( * 2935730 )
+ NEW met2 ( 1239010 2947970 ) ( * 2987750 )
+ NEW met1 ( 1283630 3073770 ) ( 1411050 * )
+ NEW met1 ( 1435200 3153330 ) ( 1443710 * )
+ NEW met1 ( 1411050 3132590 ) ( 1421630 * )
+ NEW met2 ( 1421630 3132590 ) ( * 3152990 )
+ NEW met1 ( 1421630 3152990 ) ( 1435200 * )
+ NEW met1 ( 1435200 3152990 ) ( * 3153330 )
+ NEW met2 ( 1411050 3073770 ) ( * 3132590 )
+ NEW met3 ( 2697670 2440180 ) ( 2697900 * )
+ NEW met3 ( 2697900 2437460 0 ) ( * 2440180 )
+ NEW met2 ( 2695370 2483700 ) ( 2697670 * )
+ NEW met2 ( 2697670 2440180 ) ( * 2483700 )
+ NEW met2 ( 2695370 2483700 ) ( * 2490900 )
+ NEW met2 ( 2695370 2490900 ) ( 2695830 * )
+ NEW met2 ( 2695830 2490900 ) ( * 2511600 )
+ NEW met2 ( 2694450 2559900 ) ( * 3290690 )
+ NEW met2 ( 2694450 2559900 ) ( 2696750 * )
+ NEW met2 ( 2696750 2553740 ) ( * 2559900 )
+ NEW met3 ( 2696750 2553740 ) ( 2696980 * )
+ NEW met3 ( 2696980 2552380 ) ( * 2553740 )
+ NEW met3 ( 2696750 2552380 ) ( 2696980 * )
+ NEW met2 ( 2696290 2552380 ) ( 2696750 * )
+ NEW met2 ( 2696290 2511600 ) ( * 2552380 )
+ NEW met2 ( 2695830 2511600 ) ( 2696290 * )
+ NEW met1 ( 280370 2718470 ) M1M2_PR
+ NEW li1 ( 490130 2718130 ) L1M1_PR_MR
+ NEW li1 ( 490130 2718810 ) L1M1_PR_MR
+ NEW li1 ( 510830 2718130 ) L1M1_PR_MR
+ NEW li1 ( 510830 2718810 ) L1M1_PR_MR
+ NEW met1 ( 511750 2718810 ) M1M2_PR
+ NEW met1 ( 511750 2734450 ) M1M2_PR
+ NEW met1 ( 1248670 2987750 ) M1M2_PR
+ NEW met1 ( 1249130 3015630 ) M1M2_PR
+ NEW met1 ( 1259250 3015630 ) M1M2_PR
+ NEW met1 ( 1459350 3208750 ) M1M2_PR
+ NEW met1 ( 1466710 3208750 ) M1M2_PR
+ NEW met1 ( 1483270 3277430 ) M1M2_PR
+ NEW met1 ( 2694450 3290690 ) M1M2_PR
+ NEW met1 ( 1259250 3063570 ) M1M2_PR
+ NEW met1 ( 1283630 3063910 ) M1M2_PR
+ NEW met1 ( 1283630 3073770 ) M1M2_PR
+ NEW met1 ( 1443710 3153330 ) M1M2_PR
+ NEW met1 ( 1443710 3167270 ) M1M2_PR
+ NEW met1 ( 1459350 3167270 ) M1M2_PR
+ NEW met1 ( 1466710 3224730 ) M1M2_PR
+ NEW met1 ( 1469930 3224730 ) M1M2_PR
+ NEW met1 ( 1469930 3250230 ) M1M2_PR
+ NEW met1 ( 1483270 3250230 ) M1M2_PR
+ NEW met1 ( 524630 2734450 ) M1M2_PR
+ NEW met1 ( 1217850 2890850 ) M1M2_PR
+ NEW met1 ( 1224750 2890850 ) M1M2_PR
+ NEW met1 ( 1239010 2987750 ) M1M2_PR
+ NEW met1 ( 1490630 3277770 ) M1M2_PR
+ NEW met1 ( 1490630 3290690 ) M1M2_PR
+ NEW met1 ( 524630 2744310 ) M1M2_PR
+ NEW met1 ( 1207730 2744310 ) M1M2_PR
+ NEW met1 ( 1207730 2751110 ) M1M2_PR
+ NEW met1 ( 1217850 2751110 ) M1M2_PR
+ NEW met1 ( 1224750 2935730 ) M1M2_PR
+ NEW met1 ( 1228430 2935730 ) M1M2_PR
+ NEW met1 ( 1228430 2947970 ) M1M2_PR
+ NEW met1 ( 1239010 2947970 ) M1M2_PR
+ NEW met1 ( 1411050 3073770 ) M1M2_PR
+ NEW met1 ( 1411050 3132590 ) M1M2_PR
+ NEW met1 ( 1421630 3132590 ) M1M2_PR
+ NEW met1 ( 1421630 3152990 ) M1M2_PR
+ NEW met2 ( 2697670 2440180 ) M2M3_PR_M
+ NEW met2 ( 2696750 2553740 ) M2M3_PR_M
+ NEW met2 ( 2696750 2552380 ) M2M3_PR_M ;
- dout0_to_sram\[11\] ( custom_sram q[11] ) ( chip_controller dout0_to_sram[11] ) + USE SIGNAL
- + ROUTED met2 ( 286810 2199460 0 ) ( 287730 * )
- NEW met2 ( 287730 2199460 ) ( * 2223770 )
- NEW met1 ( 287730 2223770 ) ( 1142410 * )
- NEW met2 ( 1142410 1788230 ) ( * 2223770 )
- NEW met2 ( 1984670 1788230 ) ( * 1800300 0 )
- NEW met1 ( 1142410 1788230 ) ( 1984670 * )
- NEW met1 ( 287730 2223770 ) M1M2_PR
- NEW met1 ( 1142410 2223770 ) M1M2_PR
- NEW met1 ( 1142410 1788230 ) M1M2_PR
- NEW met1 ( 1984670 1788230 ) M1M2_PR ;
+ + ROUTED met1 ( 1460270 1842290 ) ( 1470850 * )
+ NEW met2 ( 1470850 1831070 ) ( * 1842290 )
+ NEW met3 ( 599380 2371500 0 ) ( 607430 * )
+ NEW met2 ( 607430 2368610 ) ( * 2371500 )
+ NEW met1 ( 607430 2367930 ) ( * 2368610 )
+ NEW met1 ( 606970 2367930 ) ( 607430 * )
+ NEW met1 ( 606970 2367250 ) ( * 2367930 )
+ NEW met1 ( 606970 2367250 ) ( 607430 * )
+ NEW met1 ( 607430 2366910 ) ( * 2367250 )
+ NEW met1 ( 1440490 2106470 ) ( 1448770 * )
+ NEW met2 ( 1448770 2097460 ) ( * 2106470 )
+ NEW met2 ( 1448770 2097460 ) ( 1449230 * )
+ NEW met2 ( 1449230 2083690 ) ( * 2097460 )
+ NEW met1 ( 1449230 2083690 ) ( 1460270 * )
+ NEW met2 ( 1460270 1842290 ) ( * 2083690 )
+ NEW met2 ( 1440490 2106470 ) ( * 2268990 )
+ NEW met1 ( 2698130 2560030 ) ( 2705030 * )
+ NEW met2 ( 2705030 2560030 ) ( * 2587740 )
+ NEW met3 ( 2699740 2587740 0 ) ( 2705030 * )
+ NEW met1 ( 1470850 1831070 ) ( 1486030 * )
+ NEW met1 ( 1435200 2268990 ) ( 1440490 * )
+ NEW met1 ( 1426230 2270350 ) ( 1435200 * )
+ NEW met1 ( 1435200 2268990 ) ( * 2270350 )
+ NEW met1 ( 1407830 2366570 ) ( * 2366910 )
+ NEW met1 ( 1407830 2366570 ) ( 1414730 * )
+ NEW met2 ( 1414730 2359770 ) ( * 2366570 )
+ NEW met1 ( 1414730 2359770 ) ( 1426230 * )
+ NEW met1 ( 607430 2366910 ) ( 1407830 * )
+ NEW met2 ( 1426230 2270350 ) ( * 2359770 )
+ NEW met1 ( 1486030 1817470 ) ( 1504890 * )
+ NEW met2 ( 1504890 1803530 ) ( * 1817470 )
+ NEW met2 ( 1486030 1817470 ) ( * 1831070 )
+ NEW met1 ( 1504890 1803530 ) ( 2694910 * )
+ NEW met2 ( 2693990 2428800 ) ( 2694910 * )
+ NEW met2 ( 2694910 2318400 ) ( * 2428800 )
+ NEW met2 ( 2693070 2318400 ) ( 2694910 * )
+ NEW met2 ( 2693990 2428800 ) ( * 2463300 )
+ NEW met2 ( 2693530 2463300 ) ( 2693990 * )
+ NEW met2 ( 2692150 2255900 ) ( 2693070 * )
+ NEW met2 ( 2693070 2255900 ) ( * 2318400 )
+ NEW met2 ( 2693530 2553000 ) ( 2697210 * )
+ NEW met2 ( 2697210 2553000 ) ( * 2559690 )
+ NEW met1 ( 2697210 2559690 ) ( 2698130 * )
+ NEW met2 ( 2693530 2463300 ) ( * 2553000 )
+ NEW met1 ( 2698130 2559690 ) ( * 2560030 )
+ NEW met2 ( 2692150 2076900 ) ( * 2255900 )
+ NEW met2 ( 2692150 2076900 ) ( 2693530 * )
+ NEW met2 ( 2693530 2028600 ) ( * 2076900 )
+ NEW met2 ( 2692150 2028600 ) ( 2693530 * )
+ NEW met2 ( 2692150 1966900 ) ( 2695370 * )
+ NEW met2 ( 2695370 1962820 ) ( * 1966900 )
+ NEW met2 ( 2695370 1962820 ) ( 2696750 * )
+ NEW met3 ( 2696750 1962820 ) ( 2698130 * )
+ NEW met2 ( 2698130 1941740 ) ( * 1962820 )
+ NEW met3 ( 2696750 1941740 ) ( 2698130 * )
+ NEW met2 ( 2694910 1941740 ) ( 2696750 * )
+ NEW met2 ( 2692150 1966900 ) ( * 2028600 )
+ NEW met2 ( 2694910 1803530 ) ( * 1941740 )
+ NEW met1 ( 1460270 1842290 ) M1M2_PR
+ NEW met1 ( 1470850 1842290 ) M1M2_PR
+ NEW met1 ( 1470850 1831070 ) M1M2_PR
+ NEW met2 ( 607430 2371500 ) M2M3_PR_M
+ NEW met1 ( 607430 2368610 ) M1M2_PR
+ NEW met1 ( 1440490 2106470 ) M1M2_PR
+ NEW met1 ( 1448770 2106470 ) M1M2_PR
+ NEW met1 ( 1449230 2083690 ) M1M2_PR
+ NEW met1 ( 1460270 2083690 ) M1M2_PR
+ NEW met1 ( 1440490 2268990 ) M1M2_PR
+ NEW met1 ( 2694910 1803530 ) M1M2_PR
+ NEW met1 ( 2705030 2560030 ) M1M2_PR
+ NEW met2 ( 2705030 2587740 ) M2M3_PR_M
+ NEW met1 ( 1486030 1831070 ) M1M2_PR
+ NEW met1 ( 1426230 2270350 ) M1M2_PR
+ NEW met1 ( 1414730 2366570 ) M1M2_PR
+ NEW met1 ( 1414730 2359770 ) M1M2_PR
+ NEW met1 ( 1426230 2359770 ) M1M2_PR
+ NEW met1 ( 1486030 1817470 ) M1M2_PR
+ NEW met1 ( 1504890 1817470 ) M1M2_PR
+ NEW met1 ( 1504890 1803530 ) M1M2_PR
+ NEW met1 ( 2697210 2559690 ) M1M2_PR
+ NEW met2 ( 2696750 1962820 ) M2M3_PR_M
+ NEW met2 ( 2698130 1962820 ) M2M3_PR_M
+ NEW met2 ( 2698130 1941740 ) M2M3_PR_M
+ NEW met2 ( 2696750 1941740 ) M2M3_PR_M ;
- dout0_to_sram\[12\] ( custom_sram q[12] ) ( chip_controller dout0_to_sram[12] ) + USE SIGNAL
- + ROUTED met3 ( 599380 1889380 0 ) ( 608810 * )
- NEW met2 ( 608810 1883770 ) ( * 1889380 )
- NEW met2 ( 1191170 1803870 ) ( * 1883770 )
- NEW met2 ( 2028830 1803700 ) ( 2030670 * 0 )
- NEW met2 ( 2028830 1803530 ) ( * 1803700 )
- NEW met1 ( 608810 1883770 ) ( 1191170 * )
- NEW met1 ( 1191170 1803870 ) ( 1966500 * )
- NEW met1 ( 1966500 1803530 ) ( * 1803870 )
- NEW met1 ( 1966500 1803530 ) ( 2028830 * )
- NEW met2 ( 608810 1889380 ) M2M3_PR_M
- NEW met1 ( 608810 1883770 ) M1M2_PR
- NEW met1 ( 1191170 1803870 ) M1M2_PR
- NEW met1 ( 1191170 1883770 ) M1M2_PR
- NEW met1 ( 2028830 1803530 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2375580 ) ( * 2376260 0 )
+ NEW met3 ( 599380 2375580 ) ( 606970 * )
+ NEW met2 ( 606970 2373710 ) ( * 2375580 )
+ NEW met2 ( 1480510 1788910 ) ( * 2373710 )
+ NEW met1 ( 606970 2373710 ) ( 1480510 * )
+ NEW met2 ( 1888070 1788910 ) ( * 1800300 0 )
+ NEW met1 ( 1480510 1788910 ) ( 1888070 * )
+ NEW met2 ( 606970 2375580 ) M2M3_PR_M
+ NEW met1 ( 606970 2373710 ) M1M2_PR
+ NEW met1 ( 1480510 1788910 ) M1M2_PR
+ NEW met1 ( 1480510 2373710 ) M1M2_PR
+ NEW met1 ( 1888070 1788910 ) M1M2_PR ;
- dout0_to_sram\[13\] ( custom_sram q[13] ) ( chip_controller dout0_to_sram[13] ) + USE SIGNAL
- + ROUTED met2 ( 298310 2199460 0 ) ( * 2223430 )
- NEW met2 ( 1163110 1788910 ) ( * 2223430 )
- NEW met2 ( 2123130 1788910 ) ( * 1800300 0 )
- NEW met1 ( 298310 2223430 ) ( 1163110 * )
- NEW met1 ( 1163110 1788910 ) ( 2123130 * )
- NEW met1 ( 298310 2223430 ) M1M2_PR
- NEW met1 ( 1163110 2223430 ) M1M2_PR
- NEW met1 ( 1163110 1788910 ) M1M2_PR
- NEW met1 ( 2123130 1788910 ) M1M2_PR ;
+ + ROUTED met1 ( 1260630 2429130 ) ( 1275350 * )
+ NEW met1 ( 1275350 2725610 ) ( 1279950 * )
+ NEW met1 ( 1342050 3095530 ) ( 1349410 * )
+ NEW met2 ( 1349410 3095530 ) ( * 3112190 )
+ NEW met1 ( 1349410 3112190 ) ( 1355850 * )
+ NEW met3 ( 2697210 2814860 ) ( 2697900 * )
+ NEW met3 ( 2697900 2812140 0 ) ( * 2814860 )
+ NEW met2 ( 306590 2284290 ) ( * 2300100 0 )
+ NEW li1 ( 381570 2283950 ) ( * 2287010 )
+ NEW met1 ( 381570 2287010 ) ( 407790 * )
+ NEW met2 ( 407790 2287010 ) ( * 2295170 )
+ NEW met1 ( 1254190 2387990 ) ( 1260630 * )
+ NEW met2 ( 1254190 2295170 ) ( * 2387990 )
+ NEW met2 ( 1260630 2387990 ) ( * 2429130 )
+ NEW met2 ( 1275350 2429130 ) ( * 2725610 )
+ NEW met2 ( 1279950 2725610 ) ( * 2860930 )
+ NEW met2 ( 1342050 3029230 ) ( * 3095530 )
+ NEW met1 ( 1355850 3152990 ) ( 1366430 * )
+ NEW met1 ( 1366430 3152990 ) ( * 3153330 )
+ NEW met1 ( 1366430 3153330 ) ( 1376550 * )
+ NEW met2 ( 1355850 3112190 ) ( * 3152990 )
+ NEW met2 ( 1376550 3153330 ) ( * 3197870 )
+ NEW met2 ( 1440490 3240030 ) ( * 3249890 )
+ NEW met1 ( 1440490 3249890 ) ( 1463030 * )
+ NEW met1 ( 1463030 3249890 ) ( * 3250570 )
+ NEW met1 ( 1463030 3250570 ) ( 1473150 * )
+ NEW met2 ( 1473150 3250570 ) ( * 3289330 )
+ NEW met2 ( 2695370 2884200 ) ( 2697210 * )
+ NEW met2 ( 2697210 2814860 ) ( * 2884200 )
+ NEW met2 ( 2695370 2884200 ) ( * 3289330 )
+ NEW met1 ( 1308010 2918730 ) ( 1314450 * )
+ NEW met1 ( 1314450 3008150 ) ( 1325030 * )
+ NEW met1 ( 1325030 3008150 ) ( * 3008490 )
+ NEW met1 ( 1325030 3008490 ) ( 1331930 * )
+ NEW met1 ( 1376550 3197870 ) ( 1406910 * )
+ NEW met1 ( 1473150 3289330 ) ( 2695370 * )
+ NEW met1 ( 306590 2284290 ) ( 324300 * )
+ NEW met1 ( 324300 2283950 ) ( * 2284290 )
+ NEW met1 ( 324300 2283950 ) ( 381570 * )
+ NEW met1 ( 407790 2295170 ) ( 1254190 * )
+ NEW met2 ( 1296510 2860930 ) ( * 2871130 )
+ NEW met1 ( 1296510 2871130 ) ( 1308010 * )
+ NEW met1 ( 1279950 2860930 ) ( 1296510 * )
+ NEW met2 ( 1308010 2871130 ) ( * 2918730 )
+ NEW met2 ( 1314450 2918730 ) ( * 3008150 )
+ NEW met2 ( 1331930 3008490 ) ( * 3029230 )
+ NEW met1 ( 1331930 3029230 ) ( 1342050 * )
+ NEW met1 ( 1406910 3230170 ) ( 1414730 * )
+ NEW met2 ( 1414730 3230170 ) ( * 3240030 )
+ NEW met2 ( 1406910 3197870 ) ( * 3230170 )
+ NEW met1 ( 1414730 3240030 ) ( 1440490 * )
+ NEW met1 ( 1260630 2429130 ) M1M2_PR
+ NEW met1 ( 1275350 2429130 ) M1M2_PR
+ NEW met1 ( 1275350 2725610 ) M1M2_PR
+ NEW met1 ( 1279950 2725610 ) M1M2_PR
+ NEW met1 ( 1342050 3095530 ) M1M2_PR
+ NEW met1 ( 1349410 3095530 ) M1M2_PR
+ NEW met1 ( 1349410 3112190 ) M1M2_PR
+ NEW met1 ( 1355850 3112190 ) M1M2_PR
+ NEW met1 ( 1376550 3197870 ) M1M2_PR
+ NEW met1 ( 1473150 3289330 ) M1M2_PR
+ NEW met2 ( 2697210 2814860 ) M2M3_PR_M
+ NEW met1 ( 2695370 3289330 ) M1M2_PR
+ NEW met1 ( 306590 2284290 ) M1M2_PR
+ NEW li1 ( 381570 2283950 ) L1M1_PR_MR
+ NEW li1 ( 381570 2287010 ) L1M1_PR_MR
+ NEW met1 ( 407790 2287010 ) M1M2_PR
+ NEW met1 ( 407790 2295170 ) M1M2_PR
+ NEW met1 ( 1254190 2295170 ) M1M2_PR
+ NEW met1 ( 1254190 2387990 ) M1M2_PR
+ NEW met1 ( 1260630 2387990 ) M1M2_PR
+ NEW met1 ( 1279950 2860930 ) M1M2_PR
+ NEW met1 ( 1342050 3029230 ) M1M2_PR
+ NEW met1 ( 1355850 3152990 ) M1M2_PR
+ NEW met1 ( 1376550 3153330 ) M1M2_PR
+ NEW met1 ( 1440490 3240030 ) M1M2_PR
+ NEW met1 ( 1440490 3249890 ) M1M2_PR
+ NEW met1 ( 1473150 3250570 ) M1M2_PR
+ NEW met1 ( 1308010 2918730 ) M1M2_PR
+ NEW met1 ( 1314450 2918730 ) M1M2_PR
+ NEW met1 ( 1314450 3008150 ) M1M2_PR
+ NEW met1 ( 1331930 3008490 ) M1M2_PR
+ NEW met1 ( 1406910 3197870 ) M1M2_PR
+ NEW met1 ( 1296510 2860930 ) M1M2_PR
+ NEW met1 ( 1296510 2871130 ) M1M2_PR
+ NEW met1 ( 1308010 2871130 ) M1M2_PR
+ NEW met1 ( 1331930 3029230 ) M1M2_PR
+ NEW met1 ( 1406910 3230170 ) M1M2_PR
+ NEW met1 ( 1414730 3230170 ) M1M2_PR
+ NEW met1 ( 1414730 3240030 ) M1M2_PR ;
- dout0_to_sram\[14\] ( custom_sram q[14] ) ( chip_controller dout0_to_sram[14] ) + USE SIGNAL
- + ROUTED met1 ( 304750 2214590 ) ( 310270 * )
- NEW met2 ( 304750 2199460 0 ) ( * 2214590 )
- NEW met2 ( 310270 2214590 ) ( * 2760290 )
- NEW met2 ( 1490170 2760290 ) ( * 2763860 )
- NEW met3 ( 1490170 2763860 ) ( 1500060 * 0 )
- NEW met1 ( 310270 2760290 ) ( 1490170 * )
- NEW met1 ( 304750 2214590 ) M1M2_PR
- NEW met1 ( 310270 2214590 ) M1M2_PR
- NEW met1 ( 310270 2760290 ) M1M2_PR
- NEW met1 ( 1490170 2760290 ) M1M2_PR
- NEW met2 ( 1490170 2763860 ) M2M3_PR_M ;
+ + ROUTED met3 ( 599380 2387140 0 ) ( 607430 * )
+ NEW met2 ( 607430 2386970 ) ( * 2387140 )
+ NEW met1 ( 607430 2386970 ) ( 935410 * )
+ NEW met2 ( 935410 2386970 ) ( * 2566830 )
+ NEW met2 ( 1490170 2566830 ) ( * 2572100 )
+ NEW met3 ( 1490170 2572100 ) ( 1500060 * 0 )
+ NEW met1 ( 935410 2566830 ) ( 1490170 * )
+ NEW met2 ( 607430 2387140 ) M2M3_PR_M
+ NEW met1 ( 607430 2386970 ) M1M2_PR
+ NEW met1 ( 935410 2386970 ) M1M2_PR
+ NEW met1 ( 935410 2566830 ) M1M2_PR
+ NEW met1 ( 1490170 2566830 ) M1M2_PR
+ NEW met2 ( 1490170 2572100 ) M2M3_PR_M ;
- dout0_to_sram\[15\] ( custom_sram q[15] ) ( chip_controller dout0_to_sram[15] ) + USE SIGNAL
- + ROUTED met2 ( 2043090 3299700 0 ) ( * 3307690 )
- NEW met3 ( 195270 1901620 ) ( 200100 * 0 )
- NEW met2 ( 195270 1901620 ) ( * 3307690 )
- NEW met1 ( 195270 3307690 ) ( 2043090 * )
- NEW met1 ( 195270 3307690 ) M1M2_PR
- NEW met1 ( 2043090 3307690 ) M1M2_PR
- NEW met2 ( 195270 1901620 ) M2M3_PR_M ;
+ + ROUTED met3 ( 599380 2393260 0 ) ( 607430 * )
+ NEW met2 ( 607430 2390540 ) ( * 2393260 )
+ NEW met2 ( 606970 2390540 ) ( 607430 * )
+ NEW met2 ( 606970 2387820 ) ( * 2390540 )
+ NEW met2 ( 606970 2387820 ) ( 607430 * )
+ NEW met2 ( 607430 2387650 ) ( * 2387820 )
+ NEW met2 ( 1466710 1794350 ) ( * 2387650 )
+ NEW met1 ( 607430 2387650 ) ( 1466710 * )
+ NEW met2 ( 2099670 1794350 ) ( * 1800300 0 )
+ NEW met1 ( 1466710 1794350 ) ( 2099670 * )
+ NEW met2 ( 607430 2393260 ) M2M3_PR_M
+ NEW met1 ( 607430 2387650 ) M1M2_PR
+ NEW met1 ( 1466710 1794350 ) M1M2_PR
+ NEW met1 ( 1466710 2387650 ) M1M2_PR
+ NEW met1 ( 2099670 1794350 ) M1M2_PR ;
- dout0_to_sram\[16\] ( custom_sram q[16] ) ( chip_controller dout0_to_sram[16] ) + USE SIGNAL
- + ROUTED met2 ( 2157170 3299700 0 ) ( * 3306670 )
- NEW met3 ( 195730 1907060 ) ( 200100 * 0 )
- NEW met2 ( 195730 1907060 ) ( * 3306670 )
- NEW met1 ( 195730 3306670 ) ( 2157170 * )
- NEW met1 ( 195730 3306670 ) M1M2_PR
- NEW met1 ( 2157170 3306670 ) M1M2_PR
- NEW met2 ( 195730 1907060 ) M2M3_PR_M ;
+ + ROUTED met3 ( 599380 2401420 0 ) ( 607430 * )
+ NEW met2 ( 607430 2401250 ) ( * 2401420 )
+ NEW met2 ( 1440030 1803190 ) ( * 2401250 )
+ NEW met1 ( 607430 2401250 ) ( 1440030 * )
+ NEW met2 ( 2168670 1803020 ) ( * 1803190 )
+ NEW met2 ( 2168670 1803020 ) ( 2170510 * 0 )
+ NEW met1 ( 1440030 1803190 ) ( 2168670 * )
+ NEW met2 ( 607430 2401420 ) M2M3_PR_M
+ NEW met1 ( 607430 2401250 ) M1M2_PR
+ NEW met1 ( 1440030 2401250 ) M1M2_PR
+ NEW met1 ( 1440030 1803190 ) M1M2_PR
+ NEW met1 ( 2168670 1803190 ) M1M2_PR ;
- dout0_to_sram\[17\] ( custom_sram q[17] ) ( chip_controller dout0_to_sram[17] ) + USE SIGNAL
- + ROUTED met2 ( 322690 2199460 0 ) ( 323610 * )
- NEW met2 ( 323610 2199460 ) ( * 2905130 )
- NEW met2 ( 1487870 2905130 ) ( * 2906660 )
- NEW met3 ( 1487870 2906660 ) ( 1500060 * 0 )
- NEW met1 ( 323610 2905130 ) ( 1487870 * )
- NEW met1 ( 323610 2905130 ) M1M2_PR
- NEW met1 ( 1487870 2905130 ) M1M2_PR
- NEW met2 ( 1487870 2906660 ) M2M3_PR_M ;
+ + ROUTED met2 ( 320850 2699260 0 ) ( 321770 * )
+ NEW met2 ( 321770 2699260 ) ( * 2717790 )
+ NEW met1 ( 321770 2717790 ) ( 324070 * )
+ NEW met2 ( 324070 2717790 ) ( * 2787830 )
+ NEW met2 ( 1490170 2787830 ) ( * 2792420 )
+ NEW met3 ( 1490170 2792420 ) ( 1500060 * 0 )
+ NEW met1 ( 324070 2787830 ) ( 1490170 * )
+ NEW met1 ( 321770 2717790 ) M1M2_PR
+ NEW met1 ( 324070 2717790 ) M1M2_PR
+ NEW met1 ( 324070 2787830 ) M1M2_PR
+ NEW met1 ( 1490170 2787830 ) M1M2_PR
+ NEW met2 ( 1490170 2792420 ) M2M3_PR_M ;
- dout0_to_sram\[18\] ( custom_sram q[18] ) ( chip_controller dout0_to_sram[18] ) + USE SIGNAL
- + ROUTED met2 ( 188370 1918450 ) ( * 1920660 )
- NEW met3 ( 188370 1920660 ) ( 200100 * 0 )
- NEW met3 ( 2699740 2812140 0 ) ( 2713310 * )
- NEW met2 ( 2713310 1800810 ) ( * 2812140 )
- NEW met1 ( 178710 1918450 ) ( 188370 * )
- NEW met1 ( 178710 1800810 ) ( 2713310 * )
- NEW met2 ( 178710 1800810 ) ( * 1918450 )
- NEW met1 ( 188370 1918450 ) M1M2_PR
- NEW met2 ( 188370 1920660 ) M2M3_PR_M
- NEW met2 ( 2713310 2812140 ) M2M3_PR_M
- NEW met1 ( 2713310 1800810 ) M1M2_PR
- NEW met1 ( 178710 1918450 ) M1M2_PR
- NEW met1 ( 178710 1800810 ) M1M2_PR ;
+ + ROUTED met2 ( 2240890 1792650 ) ( * 1800300 0 )
+ NEW met1 ( 333270 2284290 ) ( 337870 * )
+ NEW met2 ( 333270 2284290 ) ( * 2300100 0 )
+ NEW met2 ( 337870 1792650 ) ( * 2284290 )
+ NEW met1 ( 337870 1792650 ) ( 2240890 * )
+ NEW met1 ( 2240890 1792650 ) M1M2_PR
+ NEW met1 ( 337870 1792650 ) M1M2_PR
+ NEW met1 ( 337870 2284290 ) M1M2_PR
+ NEW met1 ( 333270 2284290 ) M1M2_PR ;
- dout0_to_sram\[19\] ( custom_sram q[19] ) ( chip_controller dout0_to_sram[19] ) + USE SIGNAL
- + ROUTED met2 ( 188370 1925250 ) ( * 1929500 )
- NEW met3 ( 188370 1929500 ) ( 200100 * 0 )
- NEW met1 ( 155250 1925250 ) ( 188370 * )
- NEW met2 ( 155250 1792990 ) ( * 1925250 )
- NEW met2 ( 2354050 1792990 ) ( * 1800300 0 )
- NEW met1 ( 155250 1792990 ) ( 2354050 * )
- NEW met1 ( 188370 1925250 ) M1M2_PR
- NEW met2 ( 188370 1929500 ) M2M3_PR_M
- NEW met1 ( 155250 1925250 ) M1M2_PR
- NEW met1 ( 155250 1792990 ) M1M2_PR
- NEW met1 ( 2354050 1792990 ) M1M2_PR ;
+ + ROUTED met2 ( 2311730 1789590 ) ( * 1800300 0 )
+ NEW met2 ( 334650 2699260 0 ) ( 336030 * )
+ NEW met2 ( 336030 2699260 ) ( * 2727310 )
+ NEW met1 ( 336030 2727310 ) ( 1431750 * )
+ NEW met2 ( 1431750 1789590 ) ( * 2727310 )
+ NEW met1 ( 1431750 1789590 ) ( 2311730 * )
+ NEW met1 ( 2311730 1789590 ) M1M2_PR
+ NEW met1 ( 336030 2727310 ) M1M2_PR
+ NEW met1 ( 1431750 2727310 ) M1M2_PR
+ NEW met1 ( 1431750 1789590 ) M1M2_PR ;
- dout0_to_sram\[1\] ( custom_sram q[1] ) ( chip_controller dout0_to_sram[1] ) + USE SIGNAL
- + ROUTED met2 ( 646070 1828350 ) ( * 1904510 )
- NEW met2 ( 1490170 1904510 ) ( * 1907060 )
- NEW met3 ( 1490170 1907060 ) ( 1500060 * 0 )
- NEW met1 ( 646070 1904510 ) ( 1490170 * )
- NEW met3 ( 599380 1827500 0 ) ( 613870 * )
- NEW met2 ( 613870 1827500 ) ( * 1828350 )
- NEW met1 ( 613870 1828350 ) ( 646070 * )
- NEW met1 ( 646070 1828350 ) M1M2_PR
- NEW met1 ( 646070 1904510 ) M1M2_PR
- NEW met1 ( 1490170 1904510 ) M1M2_PR
- NEW met2 ( 1490170 1907060 ) M2M3_PR_M
- NEW met2 ( 613870 1827500 ) M2M3_PR_M
- NEW met1 ( 613870 1828350 ) M1M2_PR ;
+ + ROUTED met2 ( 209070 2699260 0 ) ( 210450 * )
+ NEW met2 ( 210450 2699260 ) ( * 2723570 )
+ NEW met1 ( 210450 2723570 ) ( 653430 * )
+ NEW met2 ( 1484190 2130780 ) ( * 2131970 )
+ NEW met3 ( 1484190 2130780 ) ( 1500060 * 0 )
+ NEW met1 ( 653430 2131970 ) ( 1484190 * )
+ NEW met2 ( 653430 2131970 ) ( * 2723570 )
+ NEW met1 ( 210450 2723570 ) M1M2_PR
+ NEW met1 ( 653430 2131970 ) M1M2_PR
+ NEW met1 ( 653430 2723570 ) M1M2_PR
+ NEW met1 ( 1484190 2131970 ) M1M2_PR
+ NEW met2 ( 1484190 2130780 ) M2M3_PR_M ;
- dout0_to_sram\[20\] ( custom_sram q[20] ) ( chip_controller dout0_to_sram[20] ) + USE SIGNAL
- + ROUTED met3 ( 599380 1939700 0 ) ( 612490 * )
- NEW met3 ( 2697900 2885580 ) ( 2698130 * )
- NEW met3 ( 2697900 2885580 ) ( * 2887620 0 )
- NEW met2 ( 2698130 1810330 ) ( * 2885580 )
- NEW met2 ( 612490 1810330 ) ( * 1939700 )
- NEW met1 ( 612490 1810330 ) ( 2698130 * )
- NEW met2 ( 612490 1939700 ) M2M3_PR_M
- NEW met2 ( 2698130 2885580 ) M2M3_PR_M
- NEW met1 ( 2698130 1810330 ) M1M2_PR
- NEW met1 ( 612490 1810330 ) M1M2_PR ;
+ + ROUTED met2 ( 339710 2699260 0 ) ( 340170 * )
+ NEW met2 ( 340170 2699260 ) ( * 2717790 )
+ NEW met1 ( 340170 2717790 ) ( 344770 * )
+ NEW met2 ( 2382110 3299700 0 ) ( * 3305990 )
+ NEW met1 ( 344770 3305990 ) ( 2382110 * )
+ NEW met2 ( 344770 2717790 ) ( * 3305990 )
+ NEW met1 ( 340170 2717790 ) M1M2_PR
+ NEW met1 ( 344770 2717790 ) M1M2_PR
+ NEW met1 ( 344770 3305990 ) M1M2_PR
+ NEW met1 ( 2382110 3305990 ) M1M2_PR ;
- dout0_to_sram\[21\] ( custom_sram q[21] ) ( chip_controller dout0_to_sram[21] ) + USE SIGNAL
- + ROUTED met2 ( 956110 1809650 ) ( * 1946670 )
- NEW met3 ( 2699740 2962420 0 ) ( 2712850 * )
- NEW met2 ( 2712850 1809650 ) ( * 2962420 )
- NEW met1 ( 956110 1809650 ) ( 2712850 * )
- NEW met3 ( 599380 1945820 0 ) ( 613870 * )
- NEW met2 ( 613870 1945820 ) ( * 1946670 )
- NEW met1 ( 613870 1946670 ) ( 956110 * )
- NEW met1 ( 956110 1946670 ) M1M2_PR
- NEW met1 ( 956110 1809650 ) M1M2_PR
- NEW met1 ( 2712850 1809650 ) M1M2_PR
- NEW met2 ( 2712850 2962420 ) M2M3_PR_M
- NEW met2 ( 613870 1945820 ) M2M3_PR_M
- NEW met1 ( 613870 1946670 ) M1M2_PR ;
+ + ROUTED met3 ( 2699740 3037220 0 ) ( 2712850 * )
+ NEW met2 ( 2712850 3037220 ) ( * 3290350 )
+ NEW met1 ( 1499370 3290350 ) ( 2712850 * )
+ NEW met2 ( 351670 2290410 ) ( * 2300100 0 )
+ NEW met1 ( 351670 2290410 ) ( 1499370 * )
+ NEW met2 ( 1499370 2290410 ) ( * 3290350 )
+ NEW met1 ( 2712850 3290350 ) M1M2_PR
+ NEW met2 ( 2712850 3037220 ) M2M3_PR_M
+ NEW met1 ( 1499370 3290350 ) M1M2_PR
+ NEW met1 ( 351670 2290410 ) M1M2_PR
+ NEW met1 ( 1499370 2290410 ) M1M2_PR ;
- dout0_to_sram\[22\] ( custom_sram q[22] ) ( chip_controller dout0_to_sram[22] ) + USE SIGNAL
- + ROUTED met3 ( 193430 1951940 ) ( 200100 * 0 )
- NEW met2 ( 193430 1951940 ) ( * 3118990 )
- NEW met2 ( 1490170 3118990 ) ( * 3120860 )
- NEW met3 ( 1490170 3120860 ) ( 1500060 * 0 )
- NEW met1 ( 193430 3118990 ) ( 1490170 * )
- NEW met2 ( 193430 1951940 ) M2M3_PR_M
- NEW met1 ( 193430 3118990 ) M1M2_PR
- NEW met1 ( 1490170 3118990 ) M1M2_PR
- NEW met2 ( 1490170 3120860 ) M2M3_PR_M ;
+ + ROUTED met3 ( 187910 2441540 ) ( 201020 * )
+ NEW met3 ( 201020 2441540 ) ( * 2442220 0 )
+ NEW met3 ( 2699740 3112700 0 ) ( 2713310 * )
+ NEW met1 ( 186530 2473670 ) ( 187910 * )
+ NEW met2 ( 187910 2441540 ) ( * 2473670 )
+ NEW met2 ( 186530 2473670 ) ( * 3288310 )
+ NEW met2 ( 2713310 3112700 ) ( * 3288310 )
+ NEW met1 ( 186530 3288310 ) ( 2713310 * )
+ NEW met2 ( 187910 2441540 ) M2M3_PR_M
+ NEW met1 ( 186530 3288310 ) M1M2_PR
+ NEW met2 ( 2713310 3112700 ) M2M3_PR_M
+ NEW met1 ( 2713310 3288310 ) M1M2_PR
+ NEW met1 ( 186530 2473670 ) M1M2_PR
+ NEW met1 ( 187910 2473670 ) M1M2_PR ;
- dout0_to_sram\[23\] ( custom_sram q[23] ) ( chip_controller dout0_to_sram[23] ) + USE SIGNAL
- + ROUTED met2 ( 1176910 1806250 ) ( * 1952790 )
- NEW met2 ( 2444670 1803700 ) ( 2446050 * 0 )
- NEW met2 ( 2444670 1803530 ) ( * 1803700 )
- NEW li1 ( 2444670 1803530 ) ( * 1806250 )
- NEW met1 ( 1176910 1806250 ) ( 2444670 * )
- NEW met3 ( 599380 1956020 0 ) ( 613870 * )
- NEW met2 ( 613870 1952790 ) ( * 1956020 )
- NEW met1 ( 613870 1952790 ) ( 1176910 * )
- NEW met1 ( 1176910 1952790 ) M1M2_PR
- NEW met1 ( 1176910 1806250 ) M1M2_PR
- NEW li1 ( 2444670 1803530 ) L1M1_PR_MR
- NEW met1 ( 2444670 1803530 ) M1M2_PR
- NEW li1 ( 2444670 1806250 ) L1M1_PR_MR
- NEW met2 ( 613870 1956020 ) M2M3_PR_M
- NEW met1 ( 613870 1952790 ) M1M2_PR
- NEW met1 ( 2444670 1803530 ) RECT ( -355 -70 0 70 ) ;
+ + ROUTED met2 ( 362250 2699260 0 ) ( 363630 * )
+ NEW met2 ( 363630 2699260 ) ( * 2739300 )
+ NEW met2 ( 363630 2739300 ) ( 365470 * )
+ NEW met2 ( 365470 2739300 ) ( * 2967010 )
+ NEW met2 ( 1490170 2967010 ) ( * 2968540 )
+ NEW met3 ( 1490170 2968540 ) ( 1500060 * 0 )
+ NEW met1 ( 365470 2967010 ) ( 1490170 * )
+ NEW met1 ( 365470 2967010 ) M1M2_PR
+ NEW met1 ( 1490170 2967010 ) M1M2_PR
+ NEW met2 ( 1490170 2968540 ) M2M3_PR_M ;
- dout0_to_sram\[24\] ( custom_sram q[24] ) ( chip_controller dout0_to_sram[24] ) + USE SIGNAL
- + ROUTED met3 ( 192970 1959420 ) ( 193660 * )
- NEW met3 ( 193660 1959420 ) ( * 1960100 )
- NEW met3 ( 193660 1960100 ) ( 200100 * 0 )
- NEW met3 ( 2699740 3112700 0 ) ( 2715150 * )
- NEW met2 ( 2715150 1800470 ) ( * 3112700 )
- NEW met1 ( 192970 1800470 ) ( 2715150 * )
- NEW met2 ( 192970 1800470 ) ( * 1959420 )
- NEW met2 ( 192970 1959420 ) M2M3_PR_M
- NEW met2 ( 2715150 3112700 ) M2M3_PR_M
- NEW met1 ( 192970 1800470 ) M1M2_PR
- NEW met1 ( 2715150 1800470 ) M1M2_PR ;
+ + ROUTED met3 ( 196190 2450380 ) ( 200100 * )
+ NEW met3 ( 200100 2449700 0 ) ( * 2450380 )
+ NEW met2 ( 196190 2450380 ) ( * 3056770 )
+ NEW met2 ( 1486950 3056770 ) ( * 3056940 )
+ NEW met3 ( 1486950 3056940 ) ( 1500060 * 0 )
+ NEW met1 ( 196190 3056770 ) ( 1486950 * )
+ NEW met2 ( 196190 2450380 ) M2M3_PR_M
+ NEW met1 ( 196190 3056770 ) M1M2_PR
+ NEW met1 ( 1486950 3056770 ) M1M2_PR
+ NEW met2 ( 1486950 3056940 ) M2M3_PR_M ;
- dout0_to_sram\[25\] ( custom_sram q[25] ) ( chip_controller dout0_to_sram[25] ) + USE SIGNAL
- + ROUTED met3 ( 185150 1965540 ) ( 200100 * 0 )
- NEW met3 ( 2699740 3187500 0 ) ( 2711930 * )
- NEW met2 ( 185150 1965540 ) ( * 3288310 )
- NEW met2 ( 2711930 3187500 ) ( * 3288310 )
- NEW met1 ( 185150 3288310 ) ( 2711930 * )
- NEW met2 ( 185150 1965540 ) M2M3_PR_M
- NEW met1 ( 185150 3288310 ) M1M2_PR
- NEW met2 ( 2711930 3187500 ) M2M3_PR_M
- NEW met1 ( 2711930 3288310 ) M1M2_PR ;
+ + ROUTED met3 ( 193890 2461260 ) ( 200100 * )
+ NEW met3 ( 200100 2460580 0 ) ( * 2461260 )
+ NEW met1 ( 193890 2689910 ) ( * 2690930 )
+ NEW met2 ( 193890 2461260 ) ( * 2689910 )
+ NEW met2 ( 193890 2690930 ) ( * 3098250 )
+ NEW met2 ( 1490170 3098250 ) ( * 3101140 )
+ NEW met3 ( 1490170 3101140 ) ( 1500060 * 0 )
+ NEW met1 ( 193890 3098250 ) ( 1490170 * )
+ NEW met1 ( 193890 3098250 ) M1M2_PR
+ NEW met2 ( 193890 2461260 ) M2M3_PR_M
+ NEW met1 ( 193890 2689910 ) M1M2_PR
+ NEW met1 ( 193890 2690930 ) M1M2_PR
+ NEW met1 ( 1490170 3098250 ) M1M2_PR
+ NEW met2 ( 1490170 3101140 ) M2M3_PR_M ;
- dout0_to_sram\[26\] ( custom_sram q[26] ) ( chip_controller dout0_to_sram[26] ) + USE SIGNAL
- + ROUTED met1 ( 368230 2214250 ) ( 371910 * )
- NEW met2 ( 1490170 3188010 ) ( * 3192260 )
- NEW met3 ( 1490170 3192260 ) ( 1500060 * 0 )
- NEW met1 ( 371910 3188010 ) ( 1490170 * )
- NEW met2 ( 368230 2199460 0 ) ( * 2214250 )
- NEW met2 ( 371910 2214250 ) ( * 3188010 )
- NEW met1 ( 368230 2214250 ) M1M2_PR
- NEW met1 ( 371910 2214250 ) M1M2_PR
- NEW met1 ( 371910 3188010 ) M1M2_PR
- NEW met1 ( 1490170 3188010 ) M1M2_PR
- NEW met2 ( 1490170 3192260 ) M2M3_PR_M ;
+ + ROUTED met3 ( 2699740 3187500 0 ) ( 2713770 * )
+ NEW met2 ( 373750 2290070 ) ( * 2300100 0 )
+ NEW met2 ( 2713770 3187500 ) ( * 3288650 )
+ NEW met1 ( 936330 3288650 ) ( 2713770 * )
+ NEW met1 ( 373750 2290070 ) ( 936330 * )
+ NEW met2 ( 936330 2290070 ) ( * 3288650 )
+ NEW met2 ( 2713770 3187500 ) M2M3_PR_M
+ NEW met1 ( 2713770 3288650 ) M1M2_PR
+ NEW met1 ( 373750 2290070 ) M1M2_PR
+ NEW met1 ( 936330 3288650 ) M1M2_PR
+ NEW met1 ( 936330 2290070 ) M1M2_PR ;
- dout0_to_sram\[27\] ( custom_sram q[27] ) ( chip_controller dout0_to_sram[27] ) + USE SIGNAL
- + ROUTED met2 ( 186990 1973530 ) ( * 1977100 )
- NEW met3 ( 186990 1977100 ) ( 200100 * 0 )
- NEW met2 ( 135470 1793330 ) ( * 1973530 )
- NEW met1 ( 135470 1973530 ) ( 186990 * )
- NEW met2 ( 2584510 1793330 ) ( * 1800300 0 )
- NEW met1 ( 135470 1793330 ) ( 2584510 * )
- NEW met1 ( 186990 1973530 ) M1M2_PR
- NEW met2 ( 186990 1977100 ) M2M3_PR_M
- NEW met1 ( 135470 1793330 ) M1M2_PR
- NEW met1 ( 135470 1973530 ) M1M2_PR
- NEW met1 ( 2584510 1793330 ) M1M2_PR ;
+ + ROUTED met3 ( 195730 2474180 ) ( 201020 * )
+ NEW met3 ( 201020 2474180 ) ( * 2474860 0 )
+ NEW met2 ( 2451110 1803020 ) ( 2452950 * 0 )
+ NEW met2 ( 2451110 1803020 ) ( * 1803190 )
+ NEW li1 ( 2451110 1803190 ) ( * 1806590 )
+ NEW met1 ( 195730 1806590 ) ( 2451110 * )
+ NEW met2 ( 195730 1806590 ) ( * 2474180 )
+ NEW met1 ( 195730 1806590 ) M1M2_PR
+ NEW met2 ( 195730 2474180 ) M2M3_PR_M
+ NEW li1 ( 2451110 1803190 ) L1M1_PR_MR
+ NEW met1 ( 2451110 1803190 ) M1M2_PR
+ NEW li1 ( 2451110 1806590 ) L1M1_PR_MR
+ NEW met1 ( 2451110 1803190 ) RECT ( -355 -70 0 70 ) ;
- dout0_to_sram\[28\] ( custom_sram q[28] ) ( chip_controller dout0_to_sram[28] ) + USE SIGNAL
- + ROUTED met2 ( 2500330 3299700 0 ) ( * 3310410 )
- NEW met2 ( 377890 2199460 0 ) ( 379270 * )
- NEW met2 ( 379270 2199460 ) ( * 3310410 )
- NEW met1 ( 379270 3310410 ) ( 2500330 * )
- NEW met1 ( 379270 3310410 ) M1M2_PR
- NEW met1 ( 2500330 3310410 ) M1M2_PR ;
+ + ROUTED li1 ( 387550 2698410 ) ( * 2699430 )
+ NEW met2 ( 387550 2699260 ) ( * 2699430 )
+ NEW met2 ( 386630 2699260 0 ) ( 387550 * )
+ NEW met2 ( 2523330 1789930 ) ( * 1800300 0 )
+ NEW met2 ( 1390350 1789930 ) ( * 2698410 )
+ NEW met1 ( 1390350 1789930 ) ( 2523330 * )
+ NEW met1 ( 387550 2698410 ) ( 1390350 * )
+ NEW li1 ( 387550 2698410 ) L1M1_PR_MR
+ NEW li1 ( 387550 2699430 ) L1M1_PR_MR
+ NEW met1 ( 387550 2699430 ) M1M2_PR
+ NEW met1 ( 2523330 1789930 ) M1M2_PR
+ NEW met1 ( 1390350 2698410 ) M1M2_PR
+ NEW met1 ( 1390350 1789930 ) M1M2_PR
+ NEW met1 ( 387550 2699430 ) RECT ( -355 -70 0 70 ) ;
- dout0_to_sram\[29\] ( custom_sram q[29] ) ( chip_controller dout0_to_sram[29] ) + USE SIGNAL
- + ROUTED met2 ( 646070 1993930 ) ( * 3257030 )
- NEW met2 ( 1486950 3257030 ) ( * 3263660 )
- NEW met3 ( 1486950 3263660 ) ( 1500060 * 0 )
- NEW met1 ( 646070 3257030 ) ( 1486950 * )
- NEW met3 ( 599380 1989340 0 ) ( 609730 * )
- NEW met2 ( 609730 1989340 ) ( * 1993930 )
- NEW met1 ( 609730 1993930 ) ( 646070 * )
- NEW met1 ( 646070 1993930 ) M1M2_PR
- NEW met1 ( 646070 3257030 ) M1M2_PR
- NEW met1 ( 1486950 3257030 ) M1M2_PR
- NEW met2 ( 1486950 3263660 ) M2M3_PR_M
- NEW met2 ( 609730 1989340 ) M2M3_PR_M
- NEW met1 ( 609730 1993930 ) M1M2_PR ;
+ + ROUTED met2 ( 189750 2484210 ) ( * 2485060 )
+ NEW met3 ( 189750 2485060 ) ( 201020 * )
+ NEW met3 ( 201020 2485060 ) ( * 2485740 0 )
+ NEW met2 ( 134550 1788230 ) ( * 2484210 )
+ NEW met1 ( 134550 2484210 ) ( 189750 * )
+ NEW met2 ( 2594170 1788230 ) ( * 1800300 0 )
+ NEW met1 ( 134550 1788230 ) ( 2594170 * )
+ NEW met1 ( 189750 2484210 ) M1M2_PR
+ NEW met2 ( 189750 2485060 ) M2M3_PR_M
+ NEW met1 ( 134550 1788230 ) M1M2_PR
+ NEW met1 ( 134550 2484210 ) M1M2_PR
+ NEW met1 ( 2594170 1788230 ) M1M2_PR ;
- dout0_to_sram\[2\] ( custom_sram q[2] ) ( chip_controller dout0_to_sram[2] ) + USE SIGNAL
- + ROUTED met3 ( 199180 1799620 ) ( 200790 * )
- NEW met2 ( 200790 1791630 ) ( * 1799620 )
- NEW li1 ( 251390 1791630 ) ( * 1791970 )
- NEW li1 ( 251390 1791970 ) ( 252310 * )
- NEW met1 ( 252310 1791970 ) ( 276000 * )
- NEW met1 ( 276000 1791630 ) ( * 1791970 )
- NEW met1 ( 200790 1791630 ) ( 251390 * )
- NEW met2 ( 1800210 1791630 ) ( * 1800300 0 )
- NEW met1 ( 276000 1791630 ) ( 1800210 * )
- NEW met3 ( 199180 1819340 ) ( 200100 * 0 )
- NEW met4 ( 199180 1799620 ) ( * 1819340 )
- NEW met3 ( 199180 1799620 ) M3M4_PR_M
- NEW met2 ( 200790 1799620 ) M2M3_PR_M
- NEW met1 ( 200790 1791630 ) M1M2_PR
- NEW li1 ( 251390 1791630 ) L1M1_PR_MR
- NEW li1 ( 252310 1791970 ) L1M1_PR_MR
- NEW met1 ( 1800210 1791630 ) M1M2_PR
- NEW met3 ( 199180 1819340 ) M3M4_PR_M ;
+ + ROUTED met3 ( 599380 2319140 0 ) ( 607430 * )
+ NEW met2 ( 607430 2319140 ) ( * 2319310 )
+ NEW met2 ( 1446930 1793670 ) ( * 2319310 )
+ NEW met1 ( 607430 2319310 ) ( 1446930 * )
+ NEW met2 ( 1605630 1793670 ) ( * 1800300 0 )
+ NEW met1 ( 1446930 1793670 ) ( 1605630 * )
+ NEW met2 ( 607430 2319140 ) M2M3_PR_M
+ NEW met1 ( 607430 2319310 ) M1M2_PR
+ NEW met1 ( 1446930 2319310 ) M1M2_PR
+ NEW met1 ( 1446930 1793670 ) M1M2_PR
+ NEW met1 ( 1605630 1793670 ) M1M2_PR ;
- dout0_to_sram\[30\] ( custom_sram q[30] ) ( chip_controller dout0_to_sram[30] ) + USE SIGNAL
- + ROUTED met2 ( 2614410 3299700 0 ) ( * 3306330 )
- NEW met3 ( 599380 1995460 0 ) ( 608810 * )
- NEW met2 ( 608810 1995460 ) ( * 2000050 )
- NEW met1 ( 620770 3306330 ) ( 2614410 * )
- NEW met1 ( 608810 2000050 ) ( 620770 * )
- NEW met2 ( 620770 2000050 ) ( * 3306330 )
- NEW met1 ( 2614410 3306330 ) M1M2_PR
- NEW met2 ( 608810 1995460 ) M2M3_PR_M
- NEW met1 ( 608810 2000050 ) M1M2_PR
- NEW met1 ( 620770 3306330 ) M1M2_PR
- NEW met1 ( 620770 2000050 ) M1M2_PR ;
+ + ROUTED met2 ( 395370 2699260 0 ) ( 396750 * )
+ NEW met2 ( 396750 2699260 ) ( * 2717790 )
+ NEW met1 ( 396750 2717790 ) ( 399050 * )
+ NEW met2 ( 399050 2717790 ) ( * 3305310 )
+ NEW met2 ( 2664550 3299700 0 ) ( * 3305310 )
+ NEW met1 ( 399050 3305310 ) ( 2664550 * )
+ NEW met1 ( 396750 2717790 ) M1M2_PR
+ NEW met1 ( 399050 2717790 ) M1M2_PR
+ NEW met1 ( 399050 3305310 ) M1M2_PR
+ NEW met1 ( 2664550 3305310 ) M1M2_PR ;
- dout0_to_sram\[31\] ( custom_sram q[31] ) ( chip_controller dout0_to_sram[31] ) + USE SIGNAL
- + ROUTED met3 ( 599380 1999540 0 ) ( 607430 * )
- NEW met2 ( 607430 1999540 ) ( * 1999710 )
- NEW met2 ( 2671450 3299700 0 ) ( * 3305990 )
- NEW met1 ( 620310 3305990 ) ( 2671450 * )
- NEW met1 ( 607430 1999710 ) ( 620310 * )
- NEW met2 ( 620310 1999710 ) ( * 3305990 )
- NEW met2 ( 607430 1999540 ) M2M3_PR_M
- NEW met1 ( 607430 1999710 ) M1M2_PR
- NEW met1 ( 620310 3305990 ) M1M2_PR
- NEW met1 ( 2671450 3305990 ) M1M2_PR
- NEW met1 ( 620310 1999710 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2481660 0 ) ( 607430 * )
+ NEW met2 ( 607430 2481660 ) ( * 2483190 )
+ NEW met2 ( 1370110 2483190 ) ( * 3277770 )
+ NEW met2 ( 1490170 3277770 ) ( * 3277940 )
+ NEW met3 ( 1490170 3277940 ) ( 1500060 * 0 )
+ NEW met1 ( 1370110 3277770 ) ( 1490170 * )
+ NEW met1 ( 607430 2483190 ) ( 1370110 * )
+ NEW met1 ( 1370110 3277770 ) M1M2_PR
+ NEW met2 ( 607430 2481660 ) M2M3_PR_M
+ NEW met1 ( 607430 2483190 ) M1M2_PR
+ NEW met1 ( 1370110 2483190 ) M1M2_PR
+ NEW met1 ( 1490170 3277770 ) M1M2_PR
+ NEW met2 ( 1490170 3277940 ) M2M3_PR_M ;
- dout0_to_sram\[3\] ( custom_sram q[3] ) ( chip_controller dout0_to_sram[3] ) + USE SIGNAL
- + ROUTED met2 ( 221490 2199460 0 ) ( * 2213570 )
- NEW li1 ( 541190 2213570 ) ( * 2214930 )
- NEW li1 ( 541190 2214930 ) ( 542110 * )
- NEW li1 ( 542110 2214590 ) ( * 2214930 )
- NEW met1 ( 542110 2214590 ) ( 545790 * )
- NEW met1 ( 221490 2213570 ) ( 541190 * )
- NEW met3 ( 1486950 2049860 ) ( 1500060 * 0 )
- NEW li1 ( 545790 2197930 ) ( * 2199630 )
- NEW met2 ( 545790 2199630 ) ( * 2214590 )
- NEW met1 ( 545790 2197930 ) ( 1486950 * )
- NEW met2 ( 1486950 2049860 ) ( * 2197930 )
- NEW met1 ( 221490 2213570 ) M1M2_PR
- NEW li1 ( 541190 2213570 ) L1M1_PR_MR
- NEW li1 ( 542110 2214590 ) L1M1_PR_MR
- NEW met1 ( 545790 2214590 ) M1M2_PR
- NEW met2 ( 1486950 2049860 ) M2M3_PR_M
- NEW li1 ( 545790 2199630 ) L1M1_PR_MR
- NEW met1 ( 545790 2199630 ) M1M2_PR
- NEW li1 ( 545790 2197930 ) L1M1_PR_MR
- NEW met1 ( 1486950 2197930 ) M1M2_PR
- NEW met1 ( 545790 2199630 ) RECT ( -355 -70 0 70 ) ;
+ + ROUTED met2 ( 1746850 3299700 0 ) ( * 3308370 )
+ NEW met1 ( 1321810 3308370 ) ( 1746850 * )
+ NEW met2 ( 237590 2295510 ) ( * 2300100 0 )
+ NEW met1 ( 237590 2295510 ) ( 1321810 * )
+ NEW met2 ( 1321810 2295510 ) ( * 3308370 )
+ NEW met1 ( 1746850 3308370 ) M1M2_PR
+ NEW met1 ( 1321810 3308370 ) M1M2_PR
+ NEW met1 ( 237590 2295510 ) M1M2_PR
+ NEW met1 ( 1321810 2295510 ) M1M2_PR ;
- dout0_to_sram\[4\] ( custom_sram q[4] ) ( chip_controller dout0_to_sram[4] ) + USE SIGNAL
- + ROUTED met2 ( 1844830 1803700 ) ( 1846210 * 0 )
- NEW met2 ( 1844830 1803530 ) ( * 1803700 )
- NEW li1 ( 1844830 1803530 ) ( * 1806590 )
- NEW met3 ( 599380 1845860 0 ) ( 613410 * )
- NEW met2 ( 613410 1806590 ) ( * 1845860 )
- NEW met1 ( 613410 1806590 ) ( 1844830 * )
- NEW li1 ( 1844830 1803530 ) L1M1_PR_MR
- NEW met1 ( 1844830 1803530 ) M1M2_PR
- NEW li1 ( 1844830 1806590 ) L1M1_PR_MR
- NEW met2 ( 613410 1845860 ) M2M3_PR_M
- NEW met1 ( 613410 1806590 ) M1M2_PR
- NEW met1 ( 1844830 1803530 ) RECT ( -355 -70 0 70 ) ;
+ + ROUTED li1 ( 485990 2289390 ) ( * 2291090 )
+ NEW met1 ( 485990 2291090 ) ( 510830 * )
+ NEW met2 ( 510830 2291090 ) ( * 2300270 )
+ NEW met3 ( 1483730 2306900 ) ( 1500060 * 0 )
+ NEW met2 ( 247710 2289390 ) ( * 2300100 0 )
+ NEW met1 ( 247710 2289390 ) ( 485990 * )
+ NEW met1 ( 510830 2300270 ) ( 517500 * )
+ NEW met1 ( 517500 2300270 ) ( * 2300950 )
+ NEW met1 ( 517500 2300950 ) ( 1483730 * )
+ NEW met2 ( 1483730 2300950 ) ( * 2306900 )
+ NEW li1 ( 485990 2289390 ) L1M1_PR_MR
+ NEW li1 ( 485990 2291090 ) L1M1_PR_MR
+ NEW met1 ( 510830 2291090 ) M1M2_PR
+ NEW met1 ( 510830 2300270 ) M1M2_PR
+ NEW met2 ( 1483730 2306900 ) M2M3_PR_M
+ NEW met1 ( 247710 2289390 ) M1M2_PR
+ NEW met1 ( 1483730 2300950 ) M1M2_PR ;
- dout0_to_sram\[5\] ( custom_sram q[5] ) ( chip_controller dout0_to_sram[5] ) + USE SIGNAL
- + ROUTED li1 ( 1812630 3291710 ) ( * 3296470 )
- NEW met2 ( 1812630 3296300 ) ( * 3296470 )
- NEW met2 ( 1812630 3296300 ) ( 1814470 * 0 )
- NEW met1 ( 194350 3291710 ) ( 1812630 * )
- NEW met3 ( 194350 1847220 ) ( 200100 * 0 )
- NEW met2 ( 194350 1847220 ) ( * 3291710 )
- NEW met1 ( 194350 3291710 ) M1M2_PR
- NEW li1 ( 1812630 3291710 ) L1M1_PR_MR
- NEW li1 ( 1812630 3296470 ) L1M1_PR_MR
- NEW met1 ( 1812630 3296470 ) M1M2_PR
- NEW met2 ( 194350 1847220 ) M2M3_PR_M
- NEW met1 ( 1812630 3296470 ) RECT ( -355 -70 0 70 ) ;
+ + ROUTED met3 ( 599380 2334780 0 ) ( 606970 * )
+ NEW met2 ( 606970 2332230 ) ( * 2334780 )
+ NEW met3 ( 2699740 1912500 0 ) ( 2713770 * )
+ NEW met2 ( 2713770 1809650 ) ( * 1912500 )
+ NEW met1 ( 606970 2332230 ) ( 1495230 * )
+ NEW met2 ( 1495230 1809650 ) ( * 2332230 )
+ NEW met1 ( 1495230 1809650 ) ( 2713770 * )
+ NEW met2 ( 606970 2334780 ) M2M3_PR_M
+ NEW met1 ( 606970 2332230 ) M1M2_PR
+ NEW met1 ( 2713770 1809650 ) M1M2_PR
+ NEW met2 ( 2713770 1912500 ) M2M3_PR_M
+ NEW met1 ( 1495230 2332230 ) M1M2_PR
+ NEW met1 ( 1495230 1809650 ) M1M2_PR ;
- dout0_to_sram\[6\] ( custom_sram q[6] ) ( chip_controller dout0_to_sram[6] ) + USE SIGNAL
- + ROUTED met3 ( 599380 1860820 0 ) ( 607430 * )
- NEW met2 ( 607430 1860820 ) ( * 1862690 )
- NEW met1 ( 607430 1862690 ) ( 652970 * )
- NEW met2 ( 652970 1862690 ) ( * 2263210 )
- NEW met2 ( 1490170 2263210 ) ( * 2264060 )
- NEW met3 ( 1490170 2264060 ) ( 1500060 * 0 )
- NEW met1 ( 652970 2263210 ) ( 1490170 * )
- NEW met2 ( 607430 1860820 ) M2M3_PR_M
- NEW met1 ( 607430 1862690 ) M1M2_PR
- NEW met1 ( 652970 1862690 ) M1M2_PR
- NEW met1 ( 652970 2263210 ) M1M2_PR
- NEW met1 ( 1490170 2263210 ) M1M2_PR
- NEW met2 ( 1490170 2264060 ) M2M3_PR_M ;
+ + ROUTED met4 ( 575460 1807780 ) ( * 2713540 )
+ NEW met2 ( 245870 2699260 0 ) ( 247250 * )
+ NEW met2 ( 247250 2699260 ) ( * 2713540 )
+ NEW met3 ( 247250 2713540 ) ( 575460 * )
+ NEW met3 ( 575460 1807780 ) ( 2712390 * )
+ NEW met3 ( 2699740 2137580 0 ) ( 2712390 * )
+ NEW met2 ( 2712390 1807780 ) ( * 2137580 )
+ NEW met3 ( 575460 2713540 ) M3M4_PR_M
+ NEW met3 ( 575460 1807780 ) M3M4_PR_M
+ NEW met2 ( 2712390 1807780 ) M2M3_PR_M
+ NEW met2 ( 247250 2713540 ) M2M3_PR_M
+ NEW met2 ( 2712390 2137580 ) M2M3_PR_M ;
- dout0_to_sram\[7\] ( custom_sram q[7] ) ( chip_controller dout0_to_sram[7] ) + USE SIGNAL
- + ROUTED met2 ( 1871510 3299700 0 ) ( * 3309050 )
- NEW met1 ( 248170 3309050 ) ( 1871510 * )
- NEW met2 ( 247710 2199460 0 ) ( 248170 * )
- NEW met2 ( 248170 2199460 ) ( * 3309050 )
- NEW met1 ( 248170 3309050 ) M1M2_PR
- NEW met1 ( 1871510 3309050 ) M1M2_PR ;
+ + ROUTED met3 ( 194810 2344980 ) ( 200100 * )
+ NEW met3 ( 200100 2344300 0 ) ( * 2344980 )
+ NEW met2 ( 194810 2344980 ) ( * 3291710 )
+ NEW li1 ( 1886230 3291710 ) ( * 3296810 )
+ NEW met2 ( 1886230 3296810 ) ( * 3296980 )
+ NEW met2 ( 1886230 3296980 ) ( 1888070 * 0 )
+ NEW met1 ( 194810 3291710 ) ( 1886230 * )
+ NEW met2 ( 194810 2344980 ) M2M3_PR_M
+ NEW met1 ( 194810 3291710 ) M1M2_PR
+ NEW li1 ( 1886230 3291710 ) L1M1_PR_MR
+ NEW li1 ( 1886230 3296810 ) L1M1_PR_MR
+ NEW met1 ( 1886230 3296810 ) M1M2_PR
+ NEW met1 ( 1886230 3296810 ) RECT ( -355 -70 0 70 ) ;
- dout0_to_sram\[8\] ( custom_sram q[8] ) ( chip_controller dout0_to_sram[8] ) + USE SIGNAL
- + ROUTED met3 ( 194810 1860820 ) ( 200100 * 0 )
- NEW li1 ( 1926710 3291370 ) ( * 3296470 )
- NEW met2 ( 1926710 3296300 ) ( * 3296470 )
- NEW met2 ( 1926710 3296300 ) ( 1928550 * 0 )
- NEW met2 ( 194810 1860820 ) ( * 3291370 )
- NEW met1 ( 194810 3291370 ) ( 1926710 * )
- NEW met2 ( 194810 1860820 ) M2M3_PR_M
- NEW met1 ( 194810 3291370 ) M1M2_PR
- NEW li1 ( 1926710 3291370 ) L1M1_PR_MR
- NEW li1 ( 1926710 3296470 ) L1M1_PR_MR
- NEW met1 ( 1926710 3296470 ) M1M2_PR
- NEW met1 ( 1926710 3296470 ) RECT ( -355 -70 0 70 ) ;
+ + ROUTED met2 ( 1344350 2221390 ) ( * 2235330 )
+ NEW met1 ( 1344350 2221390 ) ( 1350330 * )
+ NEW met2 ( 278070 2285310 ) ( * 2300100 0 )
+ NEW met1 ( 1350330 2101030 ) ( 1385290 * )
+ NEW met2 ( 1385290 2035410 ) ( * 2101030 )
+ NEW met2 ( 1350330 2101030 ) ( * 2221390 )
+ NEW met1 ( 1447390 1904510 ) ( 1449230 * )
+ NEW met1 ( 1449230 1904170 ) ( * 1904510 )
+ NEW met1 ( 1449230 1904170 ) ( 1465790 * )
+ NEW met2 ( 1465790 1878670 ) ( * 1904170 )
+ NEW met2 ( 1447390 1904510 ) ( * 1960950 )
+ NEW met1 ( 2701350 2090830 ) ( 2712850 * )
+ NEW met1 ( 1317670 2235330 ) ( 1344350 * )
+ NEW met1 ( 1417950 1960950 ) ( 1447390 * )
+ NEW met2 ( 1394030 2024870 ) ( * 2035410 )
+ NEW met1 ( 1394030 2024870 ) ( 1403690 * )
+ NEW met1 ( 1385290 2035410 ) ( 1394030 * )
+ NEW met1 ( 1490630 1842290 ) ( 1497530 * )
+ NEW met2 ( 1497530 1828350 ) ( * 1842290 )
+ NEW met1 ( 1497530 1828350 ) ( 1504430 * )
+ NEW met1 ( 278070 2285310 ) ( 324300 * )
+ NEW met1 ( 324300 2284970 ) ( * 2285310 )
+ NEW met2 ( 462530 2282250 ) ( * 2284970 )
+ NEW met1 ( 324300 2284970 ) ( 462530 * )
+ NEW met2 ( 1296970 2269500 ) ( * 2282250 )
+ NEW met2 ( 1296970 2269500 ) ( 1297430 * )
+ NEW met2 ( 1297430 2262530 ) ( * 2269500 )
+ NEW met1 ( 1297430 2262530 ) ( 1317670 * )
+ NEW met1 ( 462530 2282250 ) ( 1296970 * )
+ NEW met2 ( 1317670 2235330 ) ( * 2262530 )
+ NEW met1 ( 1403690 2001070 ) ( 1417950 * )
+ NEW met2 ( 1403690 2001070 ) ( * 2024870 )
+ NEW met2 ( 1417950 1960950 ) ( * 2001070 )
+ NEW met2 ( 1504430 1807950 ) ( * 1828350 )
+ NEW met2 ( 1490630 1842290 ) ( * 1869900 )
+ NEW met2 ( 1490170 1869900 ) ( * 1878670 )
+ NEW met2 ( 1490170 1869900 ) ( 1490630 * )
+ NEW met1 ( 1465790 1878670 ) ( 1490170 * )
+ NEW met1 ( 1504430 1807950 ) ( 2696290 * )
+ NEW met3 ( 2699740 2287180 0 ) ( 2712850 * )
+ NEW met2 ( 2712850 2090830 ) ( * 2287180 )
+ NEW met1 ( 2697210 2026910 ) ( 2701350 * )
+ NEW met2 ( 2701350 2026910 ) ( * 2090830 )
+ NEW met2 ( 2697210 1994100 ) ( * 2026910 )
+ NEW met2 ( 2697210 1994100 ) ( 2697670 * )
+ NEW met2 ( 2696290 1939700 ) ( 2697670 * )
+ NEW met2 ( 2696290 1807950 ) ( * 1939700 )
+ NEW met2 ( 2697670 1939700 ) ( * 1994100 )
+ NEW met1 ( 1385290 2035410 ) M1M2_PR
+ NEW met1 ( 1344350 2235330 ) M1M2_PR
+ NEW met1 ( 1344350 2221390 ) M1M2_PR
+ NEW met1 ( 1350330 2221390 ) M1M2_PR
+ NEW met1 ( 1447390 1960950 ) M1M2_PR
+ NEW met1 ( 278070 2285310 ) M1M2_PR
+ NEW met1 ( 1350330 2101030 ) M1M2_PR
+ NEW met1 ( 1385290 2101030 ) M1M2_PR
+ NEW met1 ( 1447390 1904510 ) M1M2_PR
+ NEW met1 ( 1465790 1904170 ) M1M2_PR
+ NEW met1 ( 1465790 1878670 ) M1M2_PR
+ NEW met1 ( 2696290 1807950 ) M1M2_PR
+ NEW met1 ( 2701350 2090830 ) M1M2_PR
+ NEW met1 ( 2712850 2090830 ) M1M2_PR
+ NEW met1 ( 1317670 2235330 ) M1M2_PR
+ NEW met1 ( 1417950 1960950 ) M1M2_PR
+ NEW met1 ( 1394030 2035410 ) M1M2_PR
+ NEW met1 ( 1394030 2024870 ) M1M2_PR
+ NEW met1 ( 1403690 2024870 ) M1M2_PR
+ NEW met1 ( 1490630 1842290 ) M1M2_PR
+ NEW met1 ( 1497530 1842290 ) M1M2_PR
+ NEW met1 ( 1497530 1828350 ) M1M2_PR
+ NEW met1 ( 1504430 1828350 ) M1M2_PR
+ NEW met1 ( 462530 2284970 ) M1M2_PR
+ NEW met1 ( 462530 2282250 ) M1M2_PR
+ NEW met1 ( 1296970 2282250 ) M1M2_PR
+ NEW met1 ( 1297430 2262530 ) M1M2_PR
+ NEW met1 ( 1317670 2262530 ) M1M2_PR
+ NEW met1 ( 1403690 2001070 ) M1M2_PR
+ NEW met1 ( 1417950 2001070 ) M1M2_PR
+ NEW met1 ( 1504430 1807950 ) M1M2_PR
+ NEW met1 ( 1490170 1878670 ) M1M2_PR
+ NEW met2 ( 2712850 2287180 ) M2M3_PR_M
+ NEW met1 ( 2697210 2026910 ) M1M2_PR
+ NEW met1 ( 2701350 2026910 ) M1M2_PR ;
- dout0_to_sram\[9\] ( custom_sram q[9] ) ( chip_controller dout0_to_sram[9] ) + USE SIGNAL
- + ROUTED met3 ( 599380 1873060 0 ) ( 610190 * )
- NEW met2 ( 1890830 1803700 ) ( 1892210 * 0 )
- NEW met2 ( 1890830 1803530 ) ( * 1803700 )
- NEW li1 ( 1890830 1803530 ) ( * 1805910 )
- NEW met2 ( 610190 1849200 ) ( * 1873060 )
- NEW met2 ( 609730 1849200 ) ( 610190 * )
- NEW met2 ( 609730 1805910 ) ( * 1849200 )
- NEW met1 ( 609730 1805910 ) ( 1890830 * )
- NEW met2 ( 610190 1873060 ) M2M3_PR_M
- NEW li1 ( 1890830 1803530 ) L1M1_PR_MR
- NEW met1 ( 1890830 1803530 ) M1M2_PR
- NEW li1 ( 1890830 1805910 ) L1M1_PR_MR
- NEW met1 ( 609730 1805910 ) M1M2_PR
- NEW met1 ( 1890830 1803530 ) RECT ( -355 -70 0 70 ) ;
+ + ROUTED met2 ( 2029290 3299700 0 ) ( * 3306670 )
+ NEW met3 ( 599380 2358580 0 ) ( 607430 * )
+ NEW met2 ( 607430 2358580 ) ( * 2358750 )
+ NEW met1 ( 618470 3306670 ) ( 2029290 * )
+ NEW met1 ( 607430 2358750 ) ( 618470 * )
+ NEW met2 ( 618470 2358750 ) ( * 3306670 )
+ NEW met1 ( 2029290 3306670 ) M1M2_PR
+ NEW met2 ( 607430 2358580 ) M2M3_PR_M
+ NEW met1 ( 607430 2358750 ) M1M2_PR
+ NEW met1 ( 618470 3306670 ) M1M2_PR
+ NEW met1 ( 618470 2358750 ) M1M2_PR ;
- io_in[0] ( PIN io_in[0] ) + USE SIGNAL ;
- io_in[10] ( PIN io_in[10] ) + USE SIGNAL ;
- io_in[11] ( PIN io_in[11] ) + USE SIGNAL ;
@@ -9233,939 +12183,1043 @@
- io_out[8] ( PIN io_out[8] ) + USE SIGNAL ;
- io_out[9] ( PIN io_out[9] ) + USE SIGNAL ;
- is_loading_memory_into_core ( chip_controller is_loading_memory_into_core ) + USE SIGNAL ;
- - is_mem_ready ( chip_controller ready ) + USE SIGNAL ;
- - is_mem_req ( chip_controller requested ) + USE SIGNAL ;
- - is_ready_dataout_core0 ( chip_controller is_ready_dataout_core0 ) + USE SIGNAL ;
- - is_ready_print_core0 ( chip_controller is_ready_print_core0 ) + USE SIGNAL ;
+ - is_mem_ready ( core0 is_mem_ready ) ( chip_controller ready ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 208420 ) ( * 213690 )
+ NEW met1 ( 224250 2283950 ) ( 227470 * )
+ NEW met2 ( 224250 2283950 ) ( * 2300100 0 )
+ NEW met2 ( 227470 213690 ) ( * 2283950 )
+ NEW met1 ( 227470 213690 ) ( 1283630 * )
+ NEW met3 ( 1283630 208420 ) ( 1300420 * 0 )
+ NEW met1 ( 227470 213690 ) M1M2_PR
+ NEW met1 ( 1283630 213690 ) M1M2_PR
+ NEW met2 ( 1283630 208420 ) M2M3_PR_M
+ NEW met1 ( 227470 2283950 ) M1M2_PR
+ NEW met1 ( 224250 2283950 ) M1M2_PR ;
+ - is_mem_req ( core0 is_mem_req ) ( chip_controller requested ) + USE SIGNAL
+ + ROUTED met2 ( 220570 2285990 ) ( * 2300100 0 )
+ NEW met2 ( 236670 2266950 ) ( * 2285990 )
+ NEW met1 ( 220570 2285990 ) ( 236670 * )
+ NEW met1 ( 236670 2266950 ) ( 1421630 * )
+ NEW met2 ( 1421630 1699660 0 ) ( * 2266950 )
+ NEW met1 ( 220570 2285990 ) M1M2_PR
+ NEW met1 ( 236670 2285990 ) M1M2_PR
+ NEW met1 ( 236670 2266950 ) M1M2_PR
+ NEW met1 ( 1421630 2266950 ) M1M2_PR ;
+ - is_ready_dataout_core0 ( core0 read_interactive_ready ) ( chip_controller is_ready_dataout_core0 ) + USE SIGNAL
+ + ROUTED met2 ( 215510 2289050 ) ( * 2300100 0 )
+ NEW met2 ( 471270 2267630 ) ( * 2289050 )
+ NEW met2 ( 1345730 1699660 ) ( 1346650 * 0 )
+ NEW met2 ( 1345730 1699660 ) ( * 2267630 )
+ NEW met1 ( 215510 2289050 ) ( 471270 * )
+ NEW met1 ( 471270 2267630 ) ( 1345730 * )
+ NEW met1 ( 215510 2289050 ) M1M2_PR
+ NEW met1 ( 471270 2289050 ) M1M2_PR
+ NEW met1 ( 471270 2267630 ) M1M2_PR
+ NEW met1 ( 1345730 2267630 ) M1M2_PR ;
+ - is_ready_print_core0 ( core0 is_print_done ) ( chip_controller is_ready_print_core0 ) + USE SIGNAL
+ + ROUTED met2 ( 212290 2285650 ) ( * 2300100 0 )
+ NEW met2 ( 239430 2267290 ) ( * 2285650 )
+ NEW met1 ( 212290 2285650 ) ( 239430 * )
+ NEW met2 ( 1400930 1699660 ) ( 1402770 * 0 )
+ NEW met1 ( 239430 2267290 ) ( 1400930 * )
+ NEW met2 ( 1400930 1699660 ) ( * 2267290 )
+ NEW met1 ( 212290 2285650 ) M1M2_PR
+ NEW met1 ( 239430 2285650 ) M1M2_PR
+ NEW met1 ( 239430 2267290 ) M1M2_PR
+ NEW met1 ( 1400930 2267290 ) M1M2_PR ;
- la_data_in[0] ( PIN la_data_in[0] ) ( chip_controller la_data_in[0] ) + USE SIGNAL
- + ROUTED met2 ( 207230 2199460 0 ) ( * 2208130 )
- NEW met1 ( 207230 2208130 ) ( 227930 * )
- NEW met2 ( 227930 2205410 ) ( * 2208130 )
- NEW met2 ( 628130 82800 ) ( 629510 * )
- NEW met2 ( 629510 2380 0 ) ( * 82800 )
- NEW met1 ( 227930 2205410 ) ( 628130 * )
- NEW met2 ( 628130 82800 ) ( * 2205410 )
- NEW met1 ( 207230 2208130 ) M1M2_PR
- NEW met1 ( 227930 2208130 ) M1M2_PR
- NEW met1 ( 227930 2205410 ) M1M2_PR
- NEW met1 ( 628130 2205410 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2309620 0 ) ( 606510 * )
+ NEW met2 ( 606510 2305370 ) ( * 2309620 )
+ NEW met2 ( 629510 2380 0 ) ( * 17340 )
+ NEW met2 ( 628130 17340 ) ( 629510 * )
+ NEW met1 ( 606510 2305370 ) ( 628130 * )
+ NEW met2 ( 628130 17340 ) ( * 2305370 )
+ NEW met2 ( 606510 2309620 ) M2M3_PR_M
+ NEW met1 ( 606510 2305370 ) M1M2_PR
+ NEW met1 ( 628130 2305370 ) M1M2_PR ;
- la_data_in[100] ( PIN la_data_in[100] ) ( chip_controller la_data_in[100] ) + USE SIGNAL
- + ROUTED met2 ( 2402810 2380 0 ) ( * 14790 )
- NEW met1 ( 2397750 14790 ) ( 2402810 * )
- NEW met2 ( 542570 1785170 ) ( * 1800300 0 )
- NEW met1 ( 542570 1785170 ) ( 2397750 * )
- NEW met2 ( 2397750 14790 ) ( * 1785170 )
- NEW met1 ( 2402810 14790 ) M1M2_PR
- NEW met1 ( 2397750 14790 ) M1M2_PR
- NEW met1 ( 542570 1785170 ) M1M2_PR
- NEW met1 ( 2397750 1785170 ) M1M2_PR ;
+ + ROUTED met2 ( 189750 2622590 ) ( * 2623100 )
+ NEW met3 ( 189750 2623100 ) ( 200100 * )
+ NEW met3 ( 200100 2622420 0 ) ( * 2623100 )
+ NEW met2 ( 116150 51850 ) ( * 2622590 )
+ NEW met2 ( 2402810 2380 0 ) ( * 51850 )
+ NEW met1 ( 116150 2622590 ) ( 189750 * )
+ NEW met1 ( 116150 51850 ) ( 2402810 * )
+ NEW met1 ( 116150 2622590 ) M1M2_PR
+ NEW met1 ( 189750 2622590 ) M1M2_PR
+ NEW met2 ( 189750 2623100 ) M2M3_PR_M
+ NEW met1 ( 116150 51850 ) M1M2_PR
+ NEW met1 ( 2402810 51850 ) M1M2_PR ;
- la_data_in[101] ( PIN la_data_in[101] ) ( chip_controller la_data_in[101] ) + USE SIGNAL
- + ROUTED met2 ( 2420290 2380 0 ) ( * 14620 )
- NEW met2 ( 1245910 14620 ) ( * 2204220 )
- NEW met3 ( 1245910 14620 ) ( 2420290 * )
- NEW met2 ( 534290 2199460 0 ) ( * 2204220 )
- NEW met3 ( 534290 2204220 ) ( 1245910 * )
- NEW met2 ( 1245910 14620 ) M2M3_PR_M
- NEW met2 ( 2420290 14620 ) M2M3_PR_M
- NEW met2 ( 1245910 2204220 ) M2M3_PR_M
- NEW met2 ( 534290 2204220 ) M2M3_PR_M ;
+ + ROUTED met2 ( 2420290 2380 0 ) ( * 30090 )
+ NEW met2 ( 548550 2699260 0 ) ( 549930 * )
+ NEW met2 ( 549930 2699260 ) ( * 2727820 )
+ NEW met3 ( 549930 2727820 ) ( 1302950 * )
+ NEW met1 ( 1302950 30090 ) ( 2420290 * )
+ NEW met2 ( 1302950 30090 ) ( * 2727820 )
+ NEW met1 ( 2420290 30090 ) M1M2_PR
+ NEW met2 ( 549930 2727820 ) M2M3_PR_M
+ NEW met1 ( 1302950 30090 ) M1M2_PR
+ NEW met2 ( 1302950 2727820 ) M2M3_PR_M ;
- la_data_in[102] ( PIN la_data_in[102] ) ( chip_controller la_data_in[102] ) + USE SIGNAL
- + ROUTED met2 ( 2438230 2380 0 ) ( * 16830 )
- NEW met1 ( 2377050 16830 ) ( 2438230 * )
- NEW met2 ( 546710 1785850 ) ( * 1800300 0 )
- NEW met1 ( 546710 1785850 ) ( 2377050 * )
- NEW met2 ( 2377050 16830 ) ( * 1785850 )
- NEW met1 ( 2438230 16830 ) M1M2_PR
- NEW met1 ( 2377050 16830 ) M1M2_PR
- NEW met1 ( 546710 1785850 ) M1M2_PR
- NEW met1 ( 2377050 1785850 ) M1M2_PR ;
+ + ROUTED met2 ( 2438230 2380 0 ) ( * 3060 )
+ NEW met2 ( 2437310 3060 ) ( 2438230 * )
+ NEW met2 ( 2437310 2380 ) ( * 3060 )
+ NEW met2 ( 2435930 2380 ) ( 2437310 * )
+ NEW met3 ( 599380 2648260 0 ) ( 607430 * )
+ NEW met2 ( 607430 2644010 ) ( * 2648260 )
+ NEW met2 ( 2435930 2380 ) ( * 52190 )
+ NEW met1 ( 607430 2644010 ) ( 734850 * )
+ NEW met2 ( 734850 52190 ) ( * 2644010 )
+ NEW met1 ( 734850 52190 ) ( 2435930 * )
+ NEW met2 ( 607430 2648260 ) M2M3_PR_M
+ NEW met1 ( 607430 2644010 ) M1M2_PR
+ NEW met1 ( 2435930 52190 ) M1M2_PR
+ NEW met1 ( 734850 52190 ) M1M2_PR
+ NEW met1 ( 734850 2644010 ) M1M2_PR ;
- la_data_in[103] ( PIN la_data_in[103] ) ( chip_controller la_data_in[103] ) + USE SIGNAL
- + ROUTED met2 ( 865950 18700 ) ( * 2199290 )
- NEW met2 ( 2455710 2380 0 ) ( * 18700 )
- NEW met3 ( 865950 18700 ) ( 2455710 * )
- NEW met1 ( 539810 2199290 ) ( * 2199630 )
- NEW met2 ( 539810 2199460 ) ( * 2199630 )
- NEW met2 ( 538890 2199460 0 ) ( 539810 * )
- NEW met1 ( 539810 2199290 ) ( 865950 * )
- NEW met2 ( 865950 18700 ) M2M3_PR_M
- NEW met1 ( 865950 2199290 ) M1M2_PR
- NEW met2 ( 2455710 18700 ) M2M3_PR_M
- NEW met1 ( 539810 2199630 ) M1M2_PR ;
+ + ROUTED met2 ( 553610 2699260 0 ) ( 554990 * )
+ NEW met2 ( 554990 2699260 ) ( * 2704020 )
+ NEW met2 ( 2455710 2380 0 ) ( * 30430 )
+ NEW met1 ( 1299730 30430 ) ( 2455710 * )
+ NEW met2 ( 1299730 30430 ) ( * 2704020 )
+ NEW met3 ( 554990 2704020 ) ( 1299730 * )
+ NEW met2 ( 554990 2704020 ) M2M3_PR_M
+ NEW met1 ( 1299730 30430 ) M1M2_PR
+ NEW met2 ( 1299730 2704020 ) M2M3_PR_M
+ NEW met1 ( 2455710 30430 ) M1M2_PR ;
- la_data_in[104] ( PIN la_data_in[104] ) ( chip_controller la_data_in[104] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2155260 0 ) ( 607430 * )
- NEW met2 ( 607430 2153390 ) ( * 2155260 )
- NEW met2 ( 1252810 33150 ) ( * 2153390 )
- NEW met1 ( 607430 2153390 ) ( 1252810 * )
- NEW met2 ( 2473650 2380 0 ) ( * 33150 )
- NEW met1 ( 1252810 33150 ) ( 2473650 * )
- NEW met2 ( 607430 2155260 ) M2M3_PR_M
- NEW met1 ( 607430 2153390 ) M1M2_PR
- NEW met1 ( 1252810 33150 ) M1M2_PR
- NEW met1 ( 1252810 2153390 ) M1M2_PR
- NEW met1 ( 2473650 33150 ) M1M2_PR ;
+ + ROUTED met2 ( 189750 2629390 ) ( * 2629900 )
+ NEW met3 ( 189750 2629900 ) ( 200100 * )
+ NEW met3 ( 200100 2629220 0 ) ( * 2629900 )
+ NEW met2 ( 115690 106930 ) ( * 2629390 )
+ NEW met1 ( 115690 2629390 ) ( 189750 * )
+ NEW met1 ( 115690 106930 ) ( 2470430 * )
+ NEW met2 ( 2470430 82800 ) ( * 106930 )
+ NEW met2 ( 2470430 82800 ) ( 2473650 * )
+ NEW met2 ( 2473650 2380 0 ) ( * 82800 )
+ NEW met1 ( 115690 106930 ) M1M2_PR
+ NEW met1 ( 115690 2629390 ) M1M2_PR
+ NEW met1 ( 189750 2629390 ) M1M2_PR
+ NEW met2 ( 189750 2629900 ) M2M3_PR_M
+ NEW met1 ( 2470430 106930 ) M1M2_PR ;
- la_data_in[105] ( PIN la_data_in[105] ) ( chip_controller la_data_in[105] ) + USE SIGNAL
- + ROUTED met1 ( 180550 2145910 ) ( 190670 * )
- NEW met2 ( 190670 2145910 ) ( * 2150500 )
- NEW met3 ( 190670 2150500 ) ( 200100 * 0 )
- NEW met1 ( 180550 58650 ) ( 2491130 * )
- NEW met2 ( 2491130 2380 0 ) ( * 58650 )
- NEW met2 ( 180550 58650 ) ( * 2145910 )
- NEW met1 ( 180550 2145910 ) M1M2_PR
- NEW met1 ( 190670 2145910 ) M1M2_PR
- NEW met2 ( 190670 2150500 ) M2M3_PR_M
- NEW met1 ( 180550 58650 ) M1M2_PR
- NEW met1 ( 2491130 58650 ) M1M2_PR ;
+ + ROUTED met2 ( 187910 2629050 ) ( * 2632620 )
+ NEW met3 ( 187910 2632620 ) ( 201020 * )
+ NEW met3 ( 201020 2632620 ) ( * 2633300 0 )
+ NEW met2 ( 110170 51510 ) ( * 2629050 )
+ NEW met1 ( 110170 2629050 ) ( 187910 * )
+ NEW met1 ( 110170 51510 ) ( 2491130 * )
+ NEW met2 ( 2491130 2380 0 ) ( * 51510 )
+ NEW met1 ( 110170 2629050 ) M1M2_PR
+ NEW met1 ( 187910 2629050 ) M1M2_PR
+ NEW met2 ( 187910 2632620 ) M2M3_PR_M
+ NEW met1 ( 110170 51510 ) M1M2_PR
+ NEW met1 ( 2491130 51510 ) M1M2_PR ;
- la_data_in[106] ( PIN la_data_in[106] ) ( chip_controller la_data_in[106] ) + USE SIGNAL
- + ROUTED met2 ( 2509070 2380 0 ) ( * 18020 )
- NEW met3 ( 852150 18020 ) ( 2509070 * )
- NEW met2 ( 540730 2199460 0 ) ( * 2205580 )
- NEW met3 ( 540730 2205580 ) ( 852150 * )
- NEW met2 ( 852150 18020 ) ( * 2205580 )
- NEW met2 ( 2509070 18020 ) M2M3_PR_M
- NEW met2 ( 852150 18020 ) M2M3_PR_M
- NEW met2 ( 540730 2205580 ) M2M3_PR_M
- NEW met2 ( 852150 2205580 ) M2M3_PR_M ;
+ + ROUTED met2 ( 2509070 2380 0 ) ( * 3060 )
+ NEW met2 ( 2508150 3060 ) ( 2509070 * )
+ NEW met2 ( 2508150 2380 ) ( * 3060 )
+ NEW met2 ( 2506770 2380 ) ( 2508150 * )
+ NEW met2 ( 2504930 82800 ) ( 2506770 * )
+ NEW met2 ( 2506770 2380 ) ( * 82800 )
+ NEW met2 ( 2504930 82800 ) ( * 182750 )
+ NEW met1 ( 565110 182750 ) ( 2504930 * )
+ NEW met2 ( 563730 2300100 0 ) ( 565110 * )
+ NEW met2 ( 565110 182750 ) ( * 2300100 )
+ NEW met1 ( 2504930 182750 ) M1M2_PR
+ NEW met1 ( 565110 182750 ) M1M2_PR ;
- la_data_in[107] ( PIN la_data_in[107] ) ( chip_controller la_data_in[107] ) + USE SIGNAL
- + ROUTED met2 ( 2527010 2380 0 ) ( * 19380 )
- NEW met2 ( 1066050 19380 ) ( * 2215780 )
- NEW met3 ( 543950 2215780 ) ( 1066050 * )
- NEW met3 ( 1066050 19380 ) ( 2527010 * )
- NEW met2 ( 543950 2199460 0 ) ( * 2215780 )
- NEW met2 ( 1066050 19380 ) M2M3_PR_M
- NEW met2 ( 1066050 2215780 ) M2M3_PR_M
- NEW met2 ( 2527010 19380 ) M2M3_PR_M
- NEW met2 ( 543950 2215780 ) M2M3_PR_M ;
+ + ROUTED met3 ( 599380 2657780 0 ) ( 607430 * )
+ NEW met2 ( 607430 2657610 ) ( * 2657780 )
+ NEW met2 ( 2527010 2380 0 ) ( * 52870 )
+ NEW met1 ( 607430 2657610 ) ( 831450 * )
+ NEW met2 ( 831450 52870 ) ( * 2657610 )
+ NEW met1 ( 831450 52870 ) ( 2527010 * )
+ NEW met2 ( 607430 2657780 ) M2M3_PR_M
+ NEW met1 ( 607430 2657610 ) M1M2_PR
+ NEW met1 ( 2527010 52870 ) M1M2_PR
+ NEW met1 ( 831450 52870 ) M1M2_PR
+ NEW met1 ( 831450 2657610 ) M1M2_PR ;
- la_data_in[108] ( PIN la_data_in[108] ) ( chip_controller la_data_in[108] ) + USE SIGNAL
- + ROUTED met3 ( 183310 2159340 ) ( 200100 * 0 )
+ + ROUTED met2 ( 189290 2636190 ) ( * 2641460 )
+ NEW met3 ( 189290 2641460 ) ( 201020 * )
+ NEW met3 ( 201020 2641460 ) ( * 2642140 0 )
NEW met2 ( 2539430 82800 ) ( 2544490 * )
NEW met2 ( 2544490 2380 0 ) ( * 82800 )
- NEW met2 ( 2539430 82800 ) ( * 1777010 )
- NEW met1 ( 183310 1777010 ) ( 2539430 * )
- NEW met2 ( 183310 1777010 ) ( * 2159340 )
- NEW met2 ( 183310 2159340 ) M2M3_PR_M
- NEW met1 ( 183310 1777010 ) M1M2_PR
- NEW met1 ( 2539430 1777010 ) M1M2_PR ;
+ NEW met2 ( 2539430 82800 ) ( * 176630 )
+ NEW met1 ( 174110 2636190 ) ( 189290 * )
+ NEW met1 ( 174110 176630 ) ( 2539430 * )
+ NEW met2 ( 174110 176630 ) ( * 2636190 )
+ NEW met1 ( 189290 2636190 ) M1M2_PR
+ NEW met2 ( 189290 2641460 ) M2M3_PR_M
+ NEW met1 ( 2539430 176630 ) M1M2_PR
+ NEW met1 ( 174110 2636190 ) M1M2_PR
+ NEW met1 ( 174110 176630 ) M1M2_PR ;
- la_data_in[109] ( PIN la_data_in[109] ) ( chip_controller la_data_in[109] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2171580 0 ) ( 607430 * )
- NEW met2 ( 607430 2166650 ) ( * 2171580 )
+ + ROUTED met2 ( 109710 113730 ) ( * 2643670 )
+ NEW met2 ( 189290 2643670 ) ( * 2646220 )
+ NEW met3 ( 189290 2646220 ) ( 200100 * )
+ NEW met3 ( 200100 2645540 0 ) ( * 2646220 )
NEW met2 ( 2562430 2380 0 ) ( * 3060 )
NEW met2 ( 2561510 3060 ) ( 2562430 * )
NEW met2 ( 2561510 2380 ) ( * 3060 )
NEW met2 ( 2560130 2380 ) ( 2561510 * )
- NEW met1 ( 607430 2166650 ) ( 734850 * )
- NEW met2 ( 734850 65450 ) ( * 2166650 )
- NEW met1 ( 734850 65450 ) ( 2560130 * )
- NEW met2 ( 2560130 2380 ) ( * 65450 )
- NEW met2 ( 607430 2171580 ) M2M3_PR_M
- NEW met1 ( 607430 2166650 ) M1M2_PR
- NEW met1 ( 734850 65450 ) M1M2_PR
- NEW met1 ( 734850 2166650 ) M1M2_PR
- NEW met1 ( 2560130 65450 ) M1M2_PR ;
+ NEW met1 ( 109710 113730 ) ( 2560130 * )
+ NEW met1 ( 109710 2643670 ) ( 189290 * )
+ NEW met2 ( 2560130 2380 ) ( * 113730 )
+ NEW met1 ( 109710 113730 ) M1M2_PR
+ NEW met1 ( 109710 2643670 ) M1M2_PR
+ NEW met1 ( 189290 2643670 ) M1M2_PR
+ NEW met2 ( 189290 2646220 ) M2M3_PR_M
+ NEW met1 ( 2560130 113730 ) M1M2_PR ;
- la_data_in[10] ( PIN la_data_in[10] ) ( chip_controller la_data_in[10] ) + USE SIGNAL
- + ROUTED met2 ( 278530 2199460 0 ) ( * 2209830 )
- NEW met2 ( 801090 82800 ) ( 806610 * )
- NEW met2 ( 806610 2380 0 ) ( * 82800 )
- NEW met2 ( 801090 82800 ) ( * 2207110 )
- NEW li1 ( 536590 2208470 ) ( * 2209830 )
- NEW met1 ( 536590 2208470 ) ( 542570 * )
- NEW met1 ( 542570 2208470 ) ( * 2208810 )
- NEW met1 ( 542570 2208810 ) ( 554070 * )
- NEW met2 ( 554070 2208810 ) ( * 2211020 )
- NEW met2 ( 554070 2211020 ) ( 555450 * )
- NEW met1 ( 278530 2209830 ) ( 536590 * )
- NEW met2 ( 555450 2207110 ) ( * 2211020 )
- NEW met1 ( 555450 2207110 ) ( 801090 * )
- NEW met1 ( 278530 2209830 ) M1M2_PR
- NEW met1 ( 801090 2207110 ) M1M2_PR
- NEW li1 ( 536590 2209830 ) L1M1_PR_MR
- NEW li1 ( 536590 2208470 ) L1M1_PR_MR
- NEW met1 ( 554070 2208810 ) M1M2_PR
- NEW met1 ( 555450 2207110 ) M1M2_PR ;
+ + ROUTED met2 ( 280830 2699260 0 ) ( 281750 * )
+ NEW met2 ( 281750 2699260 ) ( * 2708950 )
+ NEW met1 ( 800630 58310 ) ( 806610 * )
+ NEW met2 ( 806610 2380 0 ) ( * 58310 )
+ NEW met2 ( 800630 58310 ) ( * 2708950 )
+ NEW met1 ( 281750 2708950 ) ( 800630 * )
+ NEW met1 ( 281750 2708950 ) M1M2_PR
+ NEW met1 ( 800630 2708950 ) M1M2_PR
+ NEW met1 ( 800630 58310 ) M1M2_PR
+ NEW met1 ( 806610 58310 ) M1M2_PR ;
- la_data_in[110] ( PIN la_data_in[110] ) ( chip_controller la_data_in[110] ) + USE SIGNAL
- + ROUTED met2 ( 1176450 20060 ) ( * 2192830 )
- NEW met2 ( 2579910 2380 0 ) ( * 20060 )
- NEW met3 ( 1176450 20060 ) ( 2579910 * )
- NEW li1 ( 547630 2192830 ) ( * 2199630 )
- NEW met2 ( 547630 2199460 ) ( * 2199630 )
- NEW met2 ( 547170 2199460 0 ) ( 547630 * )
- NEW met1 ( 547630 2192830 ) ( 1176450 * )
- NEW met2 ( 1176450 20060 ) M2M3_PR_M
- NEW met1 ( 1176450 2192830 ) M1M2_PR
- NEW met2 ( 2579910 20060 ) M2M3_PR_M
- NEW li1 ( 547630 2192830 ) L1M1_PR_MR
- NEW li1 ( 547630 2199630 ) L1M1_PR_MR
- NEW met1 ( 547630 2199630 ) M1M2_PR
- NEW met1 ( 547630 2199630 ) RECT ( -355 -70 0 70 ) ;
+ + ROUTED met2 ( 665850 18020 ) ( * 2705380 )
+ NEW met2 ( 564190 2699260 0 ) ( 565110 * )
+ NEW met2 ( 565110 2699260 ) ( * 2705380 )
+ NEW met2 ( 2579910 2380 0 ) ( * 18020 )
+ NEW met3 ( 665850 18020 ) ( 2579910 * )
+ NEW met3 ( 565110 2705380 ) ( 665850 * )
+ NEW met2 ( 665850 18020 ) M2M3_PR_M
+ NEW met2 ( 665850 2705380 ) M2M3_PR_M
+ NEW met2 ( 565110 2705380 ) M2M3_PR_M
+ NEW met2 ( 2579910 18020 ) M2M3_PR_M ;
- la_data_in[111] ( PIN la_data_in[111] ) ( chip_controller la_data_in[111] ) + USE SIGNAL
- + ROUTED met2 ( 2597850 2380 0 ) ( * 17340 )
- NEW met3 ( 645150 17340 ) ( 2597850 * )
- NEW met2 ( 550390 2199460 0 ) ( * 2201500 )
- NEW met3 ( 550390 2201500 ) ( 645150 * )
- NEW met2 ( 645150 17340 ) ( * 2201500 )
- NEW met2 ( 2597850 17340 ) M2M3_PR_M
- NEW met2 ( 645150 17340 ) M2M3_PR_M
- NEW met2 ( 550390 2201500 ) M2M3_PR_M
- NEW met2 ( 645150 2201500 ) M2M3_PR_M ;
+ + ROUTED met2 ( 187910 2642990 ) ( * 2646900 )
+ NEW met3 ( 187910 2646900 ) ( 201020 * )
+ NEW met3 ( 201020 2646900 ) ( * 2647580 0 )
+ NEW met2 ( 2595090 82800 ) ( 2597850 * )
+ NEW met2 ( 2597850 2380 0 ) ( * 82800 )
+ NEW met2 ( 2595090 82800 ) ( * 183260 )
+ NEW met3 ( 173650 183260 ) ( 2595090 * )
+ NEW met1 ( 173650 2642990 ) ( 187910 * )
+ NEW met2 ( 173650 183260 ) ( * 2642990 )
+ NEW met2 ( 2595090 183260 ) M2M3_PR_M
+ NEW met1 ( 187910 2642990 ) M1M2_PR
+ NEW met2 ( 187910 2646900 ) M2M3_PR_M
+ NEW met2 ( 173650 183260 ) M2M3_PR_M
+ NEW met1 ( 173650 2642990 ) M1M2_PR ;
- la_data_in[112] ( PIN la_data_in[112] ) ( chip_controller la_data_in[112] ) + USE SIGNAL
- + ROUTED met2 ( 2615330 2380 0 ) ( * 24310 )
- NEW met1 ( 565570 24310 ) ( 2615330 * )
- NEW met2 ( 564190 1786700 ) ( 565570 * )
- NEW met2 ( 564190 1786700 ) ( * 1800300 )
- NEW met2 ( 562810 1800300 0 ) ( 564190 * )
- NEW met2 ( 565570 24310 ) ( * 1786700 )
- NEW met1 ( 2615330 24310 ) M1M2_PR
- NEW met1 ( 565570 24310 ) M1M2_PR ;
+ + ROUTED met2 ( 116610 58650 ) ( * 2649790 )
+ NEW met2 ( 189290 2649790 ) ( * 2651660 )
+ NEW met3 ( 189290 2651660 ) ( 200100 * )
+ NEW met3 ( 200100 2650980 0 ) ( * 2651660 )
+ NEW met2 ( 2615330 2380 0 ) ( * 58650 )
+ NEW met1 ( 116610 2649790 ) ( 189290 * )
+ NEW met1 ( 116610 58650 ) ( 2615330 * )
+ NEW met1 ( 116610 58650 ) M1M2_PR
+ NEW met1 ( 116610 2649790 ) M1M2_PR
+ NEW met1 ( 189290 2649790 ) M1M2_PR
+ NEW met2 ( 189290 2651660 ) M2M3_PR_M
+ NEW met1 ( 2615330 58650 ) M1M2_PR ;
- la_data_in[113] ( PIN la_data_in[113] ) ( chip_controller la_data_in[113] ) + USE SIGNAL
+ ROUTED met2 ( 2633270 2380 0 ) ( * 3060 )
NEW met2 ( 2632350 3060 ) ( 2633270 * )
NEW met2 ( 2632350 2380 ) ( * 3060 )
NEW met2 ( 2630970 2380 ) ( 2632350 * )
- NEW met3 ( 599380 2176340 0 ) ( 607430 * )
- NEW met2 ( 607430 2174470 ) ( * 2176340 )
- NEW met2 ( 776250 72250 ) ( * 2174470 )
- NEW met2 ( 2630970 2380 ) ( * 72250 )
- NEW met1 ( 607430 2174470 ) ( 776250 * )
- NEW met1 ( 776250 72250 ) ( 2630970 * )
- NEW met2 ( 607430 2176340 ) M2M3_PR_M
- NEW met1 ( 607430 2174470 ) M1M2_PR
- NEW met1 ( 776250 72250 ) M1M2_PR
- NEW met1 ( 776250 2174470 ) M1M2_PR
- NEW met1 ( 2630970 72250 ) M1M2_PR ;
+ NEW met2 ( 189750 2657610 ) ( * 2657780 )
+ NEW met3 ( 189750 2657780 ) ( 201020 * )
+ NEW met3 ( 201020 2657780 ) ( * 2658460 0 )
+ NEW met2 ( 2629130 82800 ) ( 2630970 * )
+ NEW met2 ( 2630970 2380 ) ( * 82800 )
+ NEW met2 ( 2629130 82800 ) ( * 176290 )
+ NEW met1 ( 167210 2657610 ) ( 189750 * )
+ NEW met1 ( 167210 176290 ) ( 2629130 * )
+ NEW met2 ( 167210 176290 ) ( * 2657610 )
+ NEW met1 ( 189750 2657610 ) M1M2_PR
+ NEW met2 ( 189750 2657780 ) M2M3_PR_M
+ NEW met1 ( 2629130 176290 ) M1M2_PR
+ NEW met1 ( 167210 176290 ) M1M2_PR
+ NEW met1 ( 167210 2657610 ) M1M2_PR ;
- la_data_in[114] ( PIN la_data_in[114] ) ( chip_controller la_data_in[114] ) + USE SIGNAL
- + ROUTED met2 ( 1438650 15300 ) ( * 2192490 )
- NEW met2 ( 2650750 2380 0 ) ( * 15300 )
- NEW met3 ( 1438650 15300 ) ( 2650750 * )
- NEW li1 ( 560970 2192490 ) ( * 2199630 )
- NEW met2 ( 560970 2199460 ) ( * 2199630 )
- NEW met2 ( 560050 2199460 0 ) ( 560970 * )
- NEW met1 ( 560970 2192490 ) ( 1438650 * )
- NEW met2 ( 1438650 15300 ) M2M3_PR_M
- NEW met1 ( 1438650 2192490 ) M1M2_PR
- NEW met2 ( 2650750 15300 ) M2M3_PR_M
- NEW li1 ( 560970 2192490 ) L1M1_PR_MR
- NEW li1 ( 560970 2199630 ) L1M1_PR_MR
- NEW met1 ( 560970 2199630 ) M1M2_PR
- NEW met1 ( 560970 2199630 ) RECT ( -355 -70 0 70 ) ;
+ + ROUTED met2 ( 569250 2699260 0 ) ( 570630 * )
+ NEW met2 ( 570630 2699260 ) ( * 2704700 )
+ NEW met3 ( 570630 2704700 ) ( 586270 * )
+ NEW met2 ( 586270 2701980 ) ( * 2704700 )
+ NEW met2 ( 686550 17340 ) ( * 2701980 )
+ NEW met2 ( 2650750 2380 0 ) ( * 17340 )
+ NEW met3 ( 686550 17340 ) ( 2650750 * )
+ NEW met3 ( 586270 2701980 ) ( 686550 * )
+ NEW met2 ( 570630 2704700 ) M2M3_PR_M
+ NEW met2 ( 586270 2704700 ) M2M3_PR_M
+ NEW met2 ( 586270 2701980 ) M2M3_PR_M
+ NEW met2 ( 686550 17340 ) M2M3_PR_M
+ NEW met2 ( 686550 2701980 ) M2M3_PR_M
+ NEW met2 ( 2650750 17340 ) M2M3_PR_M ;
- la_data_in[115] ( PIN la_data_in[115] ) ( chip_controller la_data_in[115] ) + USE SIGNAL
- + ROUTED met3 ( 565110 2215100 ) ( 631350 * )
- NEW met2 ( 2668690 2380 0 ) ( * 16660 )
- NEW met3 ( 631350 16660 ) ( 2668690 * )
- NEW met2 ( 565110 2199460 0 ) ( * 2215100 )
- NEW met2 ( 631350 16660 ) ( * 2215100 )
- NEW met2 ( 565110 2215100 ) M2M3_PR_M
- NEW met2 ( 631350 16660 ) M2M3_PR_M
- NEW met2 ( 631350 2215100 ) M2M3_PR_M
- NEW met2 ( 2668690 16660 ) M2M3_PR_M ;
+ + ROUTED met2 ( 577070 2300100 0 ) ( 578450 * )
+ NEW met2 ( 578450 184110 ) ( * 2300100 )
+ NEW met2 ( 2342550 17510 ) ( * 184110 )
+ NEW met1 ( 578450 184110 ) ( 2342550 * )
+ NEW met2 ( 2668690 2380 0 ) ( * 17510 )
+ NEW met1 ( 2342550 17510 ) ( 2668690 * )
+ NEW met1 ( 578450 184110 ) M1M2_PR
+ NEW met1 ( 2342550 17510 ) M1M2_PR
+ NEW met1 ( 2342550 184110 ) M1M2_PR
+ NEW met1 ( 2668690 17510 ) M1M2_PR ;
- la_data_in[116] ( PIN la_data_in[116] ) ( chip_controller la_data_in[116] ) + USE SIGNAL
- + ROUTED met3 ( 567410 2199460 ) ( 571780 * )
- NEW met2 ( 566490 2199460 0 ) ( 567410 * )
- NEW met4 ( 571780 32300 ) ( * 2199460 )
- NEW met2 ( 2686170 2380 0 ) ( * 32300 )
- NEW met3 ( 571780 32300 ) ( 2686170 * )
- NEW met3 ( 571780 32300 ) M3M4_PR_M
- NEW met3 ( 571780 2199460 ) M3M4_PR_M
- NEW met2 ( 567410 2199460 ) M2M3_PR_M
- NEW met2 ( 2686170 32300 ) M2M3_PR_M ;
+ + ROUTED li1 ( 595470 2289390 ) ( 600530 * )
+ NEW met1 ( 586270 2289390 ) ( 595470 * )
+ NEW met2 ( 586270 2288030 ) ( * 2289390 )
+ NEW met1 ( 580750 2288030 ) ( 586270 * )
+ NEW met2 ( 580750 2288030 ) ( * 2300100 0 )
+ NEW met1 ( 600530 2289390 ) ( 624450 * )
+ NEW met2 ( 624450 176970 ) ( * 2289390 )
+ NEW met2 ( 2684330 82800 ) ( 2686170 * )
+ NEW met2 ( 2686170 2380 0 ) ( * 82800 )
+ NEW met1 ( 624450 176970 ) ( 2684330 * )
+ NEW met2 ( 2684330 82800 ) ( * 176970 )
+ NEW li1 ( 600530 2289390 ) L1M1_PR_MR
+ NEW li1 ( 595470 2289390 ) L1M1_PR_MR
+ NEW met1 ( 586270 2289390 ) M1M2_PR
+ NEW met1 ( 586270 2288030 ) M1M2_PR
+ NEW met1 ( 580750 2288030 ) M1M2_PR
+ NEW met1 ( 624450 176970 ) M1M2_PR
+ NEW met1 ( 624450 2289390 ) M1M2_PR
+ NEW met1 ( 2684330 176970 ) M1M2_PR ;
- la_data_in[117] ( PIN la_data_in[117] ) ( chip_controller la_data_in[117] ) + USE SIGNAL
- + ROUTED met2 ( 2704110 2380 0 ) ( * 31620 )
- NEW met3 ( 573850 2199460 ) ( 579140 * )
- NEW met2 ( 572930 2199460 0 ) ( 573850 * )
- NEW met4 ( 579140 31620 ) ( * 2199460 )
- NEW met3 ( 579140 31620 ) ( 2704110 * )
- NEW met3 ( 579140 31620 ) M3M4_PR_M
- NEW met2 ( 2704110 31620 ) M2M3_PR_M
- NEW met3 ( 579140 2199460 ) M3M4_PR_M
- NEW met2 ( 573850 2199460 ) M2M3_PR_M ;
+ + ROUTED met2 ( 2704110 2380 0 ) ( * 3060 )
+ NEW met2 ( 2703190 3060 ) ( 2704110 * )
+ NEW met2 ( 2703190 2380 ) ( * 3060 )
+ NEW met2 ( 2701810 2380 ) ( 2703190 * )
+ NEW met2 ( 2701810 2380 ) ( * 72590 )
+ NEW met2 ( 810750 72590 ) ( * 2678010 )
+ NEW met1 ( 810750 72590 ) ( 2701810 * )
+ NEW met3 ( 599380 2678180 0 ) ( 613870 * )
+ NEW met2 ( 613870 2678010 ) ( * 2678180 )
+ NEW met1 ( 613870 2678010 ) ( 810750 * )
+ NEW met1 ( 2701810 72590 ) M1M2_PR
+ NEW met1 ( 810750 72590 ) M1M2_PR
+ NEW met1 ( 810750 2678010 ) M1M2_PR
+ NEW met2 ( 613870 2678180 ) M2M3_PR_M
+ NEW met1 ( 613870 2678010 ) M1M2_PR ;
- la_data_in[118] ( PIN la_data_in[118] ) ( chip_controller la_data_in[118] ) + USE SIGNAL
- + ROUTED met2 ( 2722050 2380 0 ) ( * 15980 )
- NEW li1 ( 577070 2196230 ) ( * 2199630 )
- NEW met2 ( 577070 2199460 ) ( * 2199630 )
- NEW met2 ( 576150 2199460 0 ) ( 577070 * )
- NEW met2 ( 1480510 15980 ) ( * 2196230 )
- NEW met3 ( 1480510 15980 ) ( 2722050 * )
- NEW met1 ( 577070 2196230 ) ( 1480510 * )
- NEW met2 ( 1480510 15980 ) M2M3_PR_M
- NEW met2 ( 2722050 15980 ) M2M3_PR_M
- NEW li1 ( 577070 2196230 ) L1M1_PR_MR
- NEW li1 ( 577070 2199630 ) L1M1_PR_MR
- NEW met1 ( 577070 2199630 ) M1M2_PR
- NEW met1 ( 1480510 2196230 ) M1M2_PR
- NEW met1 ( 577070 2199630 ) RECT ( -355 -70 0 70 ) ;
+ + ROUTED met2 ( 2722050 2380 0 ) ( * 17170 )
+ NEW met2 ( 585810 183770 ) ( * 2300100 0 )
+ NEW met1 ( 585810 183770 ) ( 2377050 * )
+ NEW met1 ( 2377050 17170 ) ( 2722050 * )
+ NEW met2 ( 2377050 17170 ) ( * 183770 )
+ NEW met1 ( 585810 183770 ) M1M2_PR
+ NEW met1 ( 2722050 17170 ) M1M2_PR
+ NEW met1 ( 2377050 17170 ) M1M2_PR
+ NEW met1 ( 2377050 183770 ) M1M2_PR ;
- la_data_in[119] ( PIN la_data_in[119] ) ( chip_controller la_data_in[119] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2185180 0 ) ( 607890 * )
- NEW met2 ( 607890 2180590 ) ( * 2185180 )
- NEW met2 ( 2739530 2380 0 ) ( * 32130 )
- NEW met1 ( 1232110 32130 ) ( 2739530 * )
- NEW met1 ( 607890 2180590 ) ( 1232110 * )
- NEW met2 ( 1232110 32130 ) ( * 2180590 )
- NEW met2 ( 607890 2185180 ) M2M3_PR_M
- NEW met1 ( 607890 2180590 ) M1M2_PR
- NEW met1 ( 1232110 32130 ) M1M2_PR
- NEW met1 ( 2739530 32130 ) M1M2_PR
- NEW met1 ( 1232110 2180590 ) M1M2_PR ;
+ + ROUTED met2 ( 577990 2699260 0 ) ( 579370 * )
+ NEW met2 ( 579370 2699260 ) ( * 2718980 )
+ NEW met3 ( 579370 2718980 ) ( 1303870 * )
+ NEW met2 ( 2739530 2380 0 ) ( * 32470 )
+ NEW met1 ( 1303870 32470 ) ( 2739530 * )
+ NEW met2 ( 1303870 32470 ) ( * 2718980 )
+ NEW met2 ( 579370 2718980 ) M2M3_PR_M
+ NEW met1 ( 1303870 32470 ) M1M2_PR
+ NEW met2 ( 1303870 2718980 ) M2M3_PR_M
+ NEW met1 ( 2739530 32470 ) M1M2_PR ;
- la_data_in[11] ( PIN la_data_in[11] ) ( chip_controller la_data_in[11] ) + USE SIGNAL
- + ROUTED met1 ( 288190 2214250 ) ( 310730 * )
- NEW met1 ( 310730 2214250 ) ( * 2214590 )
- NEW met2 ( 288190 2199460 0 ) ( * 2214250 )
- NEW met2 ( 566030 2206430 ) ( * 2213570 )
- NEW li1 ( 541650 2213570 ) ( * 2214590 )
- NEW met1 ( 310730 2214590 ) ( 541650 * )
- NEW met1 ( 541650 2213570 ) ( 566030 * )
- NEW met2 ( 824550 2380 0 ) ( * 3060 )
- NEW met2 ( 823630 3060 ) ( 824550 * )
- NEW met2 ( 823630 2380 ) ( * 3060 )
- NEW met2 ( 822250 2380 ) ( 823630 * )
- NEW met2 ( 821330 82800 ) ( 822250 * )
- NEW met2 ( 822250 2380 ) ( * 82800 )
- NEW met1 ( 566030 2206430 ) ( 821330 * )
- NEW met2 ( 821330 82800 ) ( * 2206430 )
- NEW met1 ( 288190 2214250 ) M1M2_PR
- NEW met1 ( 566030 2213570 ) M1M2_PR
- NEW met1 ( 566030 2206430 ) M1M2_PR
- NEW li1 ( 541650 2214590 ) L1M1_PR_MR
- NEW li1 ( 541650 2213570 ) L1M1_PR_MR
- NEW met1 ( 821330 2206430 ) M1M2_PR ;
+ + ROUTED met1 ( 293250 2284290 ) ( 296470 * )
+ NEW met2 ( 293250 2284290 ) ( * 2300100 0 )
+ NEW met2 ( 296470 26350 ) ( * 2284290 )
+ NEW met2 ( 824550 2380 0 ) ( * 26350 )
+ NEW met1 ( 296470 26350 ) ( 824550 * )
+ NEW met1 ( 296470 26350 ) M1M2_PR
+ NEW met1 ( 296470 2284290 ) M1M2_PR
+ NEW met1 ( 293250 2284290 ) M1M2_PR
+ NEW met1 ( 824550 26350 ) M1M2_PR ;
- la_data_in[120] ( PIN la_data_in[120] ) ( chip_controller la_data_in[120] ) + USE SIGNAL
- + ROUTED met2 ( 586270 23970 ) ( * 1773300 )
- NEW met2 ( 584430 1773300 ) ( 586270 * )
- NEW met2 ( 584430 1773300 ) ( * 1800300 )
- NEW met2 ( 583050 1800300 0 ) ( 584430 * )
- NEW met2 ( 2757470 2380 0 ) ( * 23970 )
- NEW met1 ( 586270 23970 ) ( 2757470 * )
- NEW met1 ( 586270 23970 ) M1M2_PR
- NEW met1 ( 2757470 23970 ) M1M2_PR ;
+ + ROUTED met1 ( 595930 2289390 ) ( 600070 * )
+ NEW met2 ( 595930 2289390 ) ( * 2300100 0 )
+ NEW met2 ( 600070 24310 ) ( * 2289390 )
+ NEW met2 ( 2757470 2380 0 ) ( * 24310 )
+ NEW met1 ( 600070 24310 ) ( 2757470 * )
+ NEW met1 ( 600070 24310 ) M1M2_PR
+ NEW met1 ( 600070 2289390 ) M1M2_PR
+ NEW met1 ( 595930 2289390 ) M1M2_PR
+ NEW met1 ( 2757470 24310 ) M1M2_PR ;
- la_data_in[121] ( PIN la_data_in[121] ) ( chip_controller la_data_in[121] ) + USE SIGNAL
- + ROUTED met3 ( 184230 2186540 ) ( 200100 * 0 )
- NEW met1 ( 184230 1769870 ) ( 2774030 * )
- NEW met2 ( 2774030 82800 ) ( 2774950 * )
- NEW met2 ( 2774950 2380 0 ) ( * 82800 )
- NEW met2 ( 2774030 82800 ) ( * 1769870 )
- NEW met2 ( 184230 1769870 ) ( * 2186540 )
- NEW met1 ( 184230 1769870 ) M1M2_PR
- NEW met2 ( 184230 2186540 ) M2M3_PR_M
- NEW met1 ( 2774030 1769870 ) M1M2_PR ;
+ + ROUTED met3 ( 581210 2701980 ) ( 585580 * )
+ NEW met2 ( 581210 2699260 ) ( * 2701980 )
+ NEW met2 ( 579830 2699260 0 ) ( 581210 * )
+ NEW met4 ( 585580 31620 ) ( * 2701980 )
+ NEW met2 ( 2774950 2380 0 ) ( * 31620 )
+ NEW met3 ( 585580 31620 ) ( 2774950 * )
+ NEW met3 ( 585580 31620 ) M3M4_PR_M
+ NEW met3 ( 585580 2701980 ) M3M4_PR_M
+ NEW met2 ( 581210 2701980 ) M2M3_PR_M
+ NEW met2 ( 2774950 31620 ) M2M3_PR_M ;
- la_data_in[122] ( PIN la_data_in[122] ) ( chip_controller la_data_in[122] ) + USE SIGNAL
- + ROUTED met2 ( 2792890 2380 0 ) ( * 30940 )
- NEW met3 ( 583510 2199460 ) ( 585580 * )
- NEW met2 ( 583050 2199460 0 ) ( 583510 * )
- NEW met4 ( 585580 30940 ) ( * 2199460 )
- NEW met3 ( 585580 30940 ) ( 2792890 * )
- NEW met3 ( 585580 30940 ) M3M4_PR_M
- NEW met2 ( 2792890 30940 ) M2M3_PR_M
- NEW met3 ( 585580 2199460 ) M3M4_PR_M
- NEW met2 ( 583510 2199460 ) M2M3_PR_M ;
+ + ROUTED met2 ( 96370 92990 ) ( * 2677670 )
+ NEW met2 ( 187910 2677670 ) ( * 2681580 )
+ NEW met3 ( 187910 2681580 ) ( 201020 * )
+ NEW met3 ( 201020 2681580 ) ( * 2682260 0 )
+ NEW met2 ( 2787830 82800 ) ( * 92990 )
+ NEW met2 ( 2787830 82800 ) ( 2792890 * )
+ NEW met2 ( 2792890 2380 0 ) ( * 82800 )
+ NEW met1 ( 96370 92990 ) ( 2787830 * )
+ NEW met1 ( 96370 2677670 ) ( 187910 * )
+ NEW met1 ( 96370 92990 ) M1M2_PR
+ NEW met1 ( 2787830 92990 ) M1M2_PR
+ NEW met1 ( 96370 2677670 ) M1M2_PR
+ NEW met1 ( 187910 2677670 ) M1M2_PR
+ NEW met2 ( 187910 2681580 ) M2M3_PR_M ;
- la_data_in[123] ( PIN la_data_in[123] ) ( chip_controller la_data_in[123] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2191300 0 ) ( 607890 * )
- NEW met2 ( 607890 2188750 ) ( * 2191300 )
- NEW met2 ( 893550 79390 ) ( * 2188750 )
- NEW met2 ( 2810370 2380 0 ) ( * 79390 )
- NEW met1 ( 607890 2188750 ) ( 893550 * )
- NEW met1 ( 893550 79390 ) ( 2810370 * )
- NEW met2 ( 607890 2191300 ) M2M3_PR_M
- NEW met1 ( 607890 2188750 ) M1M2_PR
- NEW met1 ( 893550 79390 ) M1M2_PR
- NEW met1 ( 893550 2188750 ) M1M2_PR
- NEW met1 ( 2810370 79390 ) M1M2_PR ;
+ + ROUTED li1 ( 591330 2697730 ) ( * 2699430 )
+ NEW met2 ( 591330 2699260 ) ( * 2699430 )
+ NEW met2 ( 590410 2699260 0 ) ( 591330 * )
+ NEW met2 ( 2810370 2380 0 ) ( * 16660 )
+ NEW met3 ( 755550 16660 ) ( 2810370 * )
+ NEW met2 ( 755550 16660 ) ( * 2697730 )
+ NEW met1 ( 591330 2697730 ) ( 755550 * )
+ NEW li1 ( 591330 2697730 ) L1M1_PR_MR
+ NEW li1 ( 591330 2699430 ) L1M1_PR_MR
+ NEW met1 ( 591330 2699430 ) M1M2_PR
+ NEW met2 ( 2810370 16660 ) M2M3_PR_M
+ NEW met2 ( 755550 16660 ) M2M3_PR_M
+ NEW met1 ( 755550 2697730 ) M1M2_PR
+ NEW met1 ( 591330 2699430 ) RECT ( -355 -70 0 70 ) ;
- la_data_in[124] ( PIN la_data_in[124] ) ( chip_controller la_data_in[124] ) + USE SIGNAL
+ ROUTED met2 ( 2828310 2380 0 ) ( * 3060 )
NEW met2 ( 2827390 3060 ) ( 2828310 * )
NEW met2 ( 2827390 2380 ) ( * 3060 )
NEW met2 ( 2826010 2380 ) ( 2827390 * )
- NEW met3 ( 599380 2194700 0 ) ( 604900 * )
- NEW met3 ( 604900 2194700 ) ( * 2195380 )
- NEW met3 ( 604900 2195380 ) ( 607890 * )
- NEW met2 ( 607890 2195380 ) ( * 2200310 )
- NEW met2 ( 1072950 66130 ) ( * 2200310 )
- NEW met2 ( 2826010 2380 ) ( * 66130 )
- NEW met1 ( 607890 2200310 ) ( 1072950 * )
- NEW met1 ( 1072950 66130 ) ( 2826010 * )
- NEW met2 ( 607890 2195380 ) M2M3_PR_M
- NEW met1 ( 607890 2200310 ) M1M2_PR
- NEW met1 ( 1072950 66130 ) M1M2_PR
- NEW met1 ( 1072950 2200310 ) M1M2_PR
- NEW met1 ( 2826010 66130 ) M1M2_PR ;
+ NEW met2 ( 2822790 82800 ) ( 2826010 * )
+ NEW met2 ( 2826010 2380 ) ( * 82800 )
+ NEW met2 ( 2822790 82800 ) ( * 134470 )
+ NEW met2 ( 852610 134470 ) ( * 2685150 )
+ NEW met1 ( 852610 134470 ) ( 2822790 * )
+ NEW met3 ( 599380 2687700 0 ) ( 609270 * )
+ NEW met2 ( 609270 2685150 ) ( * 2687700 )
+ NEW met1 ( 609270 2685150 ) ( 852610 * )
+ NEW met1 ( 2822790 134470 ) M1M2_PR
+ NEW met1 ( 852610 134470 ) M1M2_PR
+ NEW met1 ( 852610 2685150 ) M1M2_PR
+ NEW met2 ( 609270 2687700 ) M2M3_PR_M
+ NEW met1 ( 609270 2685150 ) M1M2_PR ;
- la_data_in[125] ( PIN la_data_in[125] ) ( chip_controller la_data_in[125] ) + USE SIGNAL
- + ROUTED met2 ( 595010 1783810 ) ( * 1800300 0 )
- NEW met2 ( 2845790 2380 0 ) ( * 3060 )
+ + ROUTED met2 ( 2845790 2380 0 ) ( * 3060 )
NEW met2 ( 2844870 3060 ) ( 2845790 * )
NEW met2 ( 2844870 2380 ) ( * 3060 )
NEW met2 ( 2843490 2380 ) ( 2844870 * )
+ NEW met2 ( 715070 1800470 ) ( * 2696030 )
NEW met2 ( 2843030 82800 ) ( 2843490 * )
NEW met2 ( 2843490 2380 ) ( * 82800 )
- NEW met1 ( 595010 1783810 ) ( 2843030 * )
- NEW met2 ( 2843030 82800 ) ( * 1783810 )
- NEW met1 ( 595010 1783810 ) M1M2_PR
- NEW met1 ( 2843030 1783810 ) M1M2_PR ;
+ NEW met1 ( 715070 1800470 ) ( 2843030 * )
+ NEW met2 ( 2843030 82800 ) ( * 1800470 )
+ NEW met3 ( 599380 2692460 0 ) ( 613410 * )
+ NEW met2 ( 613410 2692460 ) ( * 2696030 )
+ NEW met1 ( 613410 2696030 ) ( 715070 * )
+ NEW met1 ( 715070 2696030 ) M1M2_PR
+ NEW met1 ( 715070 1800470 ) M1M2_PR
+ NEW met1 ( 2843030 1800470 ) M1M2_PR
+ NEW met2 ( 613410 2692460 ) M2M3_PR_M
+ NEW met1 ( 613410 2696030 ) M1M2_PR ;
- la_data_in[126] ( PIN la_data_in[126] ) ( chip_controller la_data_in[126] ) + USE SIGNAL
- + ROUTED met2 ( 599150 1784830 ) ( * 1800300 0 )
- NEW met2 ( 2863730 2380 0 ) ( * 17170 )
- NEW met1 ( 2466750 17170 ) ( 2863730 * )
- NEW met1 ( 599150 1784830 ) ( 2466750 * )
- NEW met2 ( 2466750 17170 ) ( * 1784830 )
- NEW met1 ( 599150 1784830 ) M1M2_PR
- NEW met1 ( 2466750 17170 ) M1M2_PR
- NEW met1 ( 2863730 17170 ) M1M2_PR
- NEW met1 ( 2466750 1784830 ) M1M2_PR ;
+ + ROUTED met2 ( 598690 2278340 ) ( 599610 * )
+ NEW met2 ( 598690 2278340 ) ( * 2300100 )
+ NEW met2 ( 597310 2300100 0 ) ( 598690 * )
+ NEW met2 ( 599610 23970 ) ( * 2278340 )
+ NEW met2 ( 2863730 2380 0 ) ( * 23970 )
+ NEW met1 ( 599610 23970 ) ( 2863730 * )
+ NEW met1 ( 599610 23970 ) M1M2_PR
+ NEW met1 ( 2863730 23970 ) M1M2_PR ;
- la_data_in[127] ( PIN la_data_in[127] ) ( chip_controller la_data_in[127] ) + USE SIGNAL
- + ROUTED met2 ( 596850 2200820 ) ( 599610 * )
- NEW met2 ( 596850 2199460 ) ( * 2200820 )
- NEW met2 ( 595930 2199460 0 ) ( 596850 * )
- NEW met2 ( 2881670 2380 0 ) ( * 30770 )
- NEW met1 ( 599610 30770 ) ( 2881670 * )
- NEW met2 ( 599610 30770 ) ( * 2200820 )
- NEW met1 ( 599610 30770 ) M1M2_PR
- NEW met1 ( 2881670 30770 ) M1M2_PR ;
+ + ROUTED met3 ( 183540 2695180 ) ( 200100 * )
+ NEW met3 ( 200100 2694500 0 ) ( * 2695180 )
+ NEW met2 ( 2881670 2380 0 ) ( * 3060 )
+ NEW met2 ( 2880750 3060 ) ( 2881670 * )
+ NEW met2 ( 2880750 2380 ) ( * 3060 )
+ NEW met2 ( 2879370 2380 ) ( 2880750 * )
+ NEW met2 ( 2877530 82800 ) ( 2879370 * )
+ NEW met2 ( 2879370 2380 ) ( * 82800 )
+ NEW met3 ( 183540 1804380 ) ( 2877530 * )
+ NEW met2 ( 2877530 82800 ) ( * 1804380 )
+ NEW met4 ( 183540 1804380 ) ( * 2695180 )
+ NEW met3 ( 183540 2695180 ) M3M4_PR_M
+ NEW met3 ( 183540 1804380 ) M3M4_PR_M
+ NEW met2 ( 2877530 1804380 ) M2M3_PR_M ;
- la_data_in[12] ( PIN la_data_in[12] ) ( chip_controller la_data_in[12] ) + USE SIGNAL
- + ROUTED met2 ( 277610 1789250 ) ( * 1800300 0 )
- NEW met2 ( 842030 2380 0 ) ( * 26690 )
- NEW met1 ( 355350 26690 ) ( 842030 * )
- NEW met1 ( 277610 1789250 ) ( 355350 * )
- NEW met2 ( 355350 26690 ) ( * 1789250 )
- NEW met1 ( 277610 1789250 ) M1M2_PR
- NEW met1 ( 355350 26690 ) M1M2_PR
- NEW met1 ( 842030 26690 ) M1M2_PR
- NEW met1 ( 355350 1789250 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2377620 0 ) ( 607430 * )
+ NEW met2 ( 607430 2375410 ) ( * 2377620 )
+ NEW met2 ( 842030 2380 0 ) ( * 34500 )
+ NEW met2 ( 842030 34500 ) ( 842490 * )
+ NEW met1 ( 607430 2375410 ) ( 842490 * )
+ NEW met2 ( 842490 34500 ) ( * 2375410 )
+ NEW met2 ( 607430 2377620 ) M2M3_PR_M
+ NEW met1 ( 607430 2375410 ) M1M2_PR
+ NEW met1 ( 842490 2375410 ) M1M2_PR ;
- la_data_in[13] ( PIN la_data_in[13] ) ( chip_controller la_data_in[13] ) + USE SIGNAL
- + ROUTED met3 ( 599380 1894140 0 ) ( 607890 * )
- NEW met2 ( 607890 1890910 ) ( * 1894140 )
+ + ROUTED met3 ( 185150 2390540 ) ( 201020 * )
+ NEW met3 ( 201020 2390540 ) ( * 2391220 0 )
NEW met2 ( 855830 82800 ) ( 859970 * )
NEW met2 ( 859970 2380 0 ) ( * 82800 )
- NEW met2 ( 855830 82800 ) ( * 1890910 )
- NEW met1 ( 607890 1890910 ) ( 855830 * )
- NEW met2 ( 607890 1894140 ) M2M3_PR_M
- NEW met1 ( 607890 1890910 ) M1M2_PR
- NEW met1 ( 855830 1890910 ) M1M2_PR ;
+ NEW met2 ( 855830 82800 ) ( * 2293130 )
+ NEW met1 ( 185150 2331210 ) ( * 2331890 )
+ NEW met1 ( 181470 2331210 ) ( 185150 * )
+ NEW met2 ( 181470 2293130 ) ( * 2331210 )
+ NEW met2 ( 185150 2331890 ) ( * 2390540 )
+ NEW met1 ( 181470 2293130 ) ( 855830 * )
+ NEW met2 ( 185150 2390540 ) M2M3_PR_M
+ NEW met1 ( 855830 2293130 ) M1M2_PR
+ NEW met1 ( 185150 2331890 ) M1M2_PR
+ NEW met1 ( 181470 2331210 ) M1M2_PR
+ NEW met1 ( 181470 2293130 ) M1M2_PR ;
- la_data_in[14] ( PIN la_data_in[14] ) ( chip_controller la_data_in[14] ) + USE SIGNAL
- + ROUTED met2 ( 877450 2380 0 ) ( * 23630 )
- NEW met2 ( 296010 1787890 ) ( * 1800300 0 )
- NEW met1 ( 362250 23630 ) ( 877450 * )
- NEW met1 ( 296010 1787890 ) ( 362250 * )
- NEW met2 ( 362250 23630 ) ( * 1787890 )
- NEW met1 ( 877450 23630 ) M1M2_PR
- NEW met1 ( 296010 1787890 ) M1M2_PR
- NEW met1 ( 362250 23630 ) M1M2_PR
- NEW met1 ( 362250 1787890 ) M1M2_PR ;
+ + ROUTED met3 ( 182850 2402780 ) ( 200100 * )
+ NEW met3 ( 200100 2402100 0 ) ( * 2402780 )
+ NEW met2 ( 876530 82800 ) ( 877450 * )
+ NEW met2 ( 877450 2380 0 ) ( * 82800 )
+ NEW met2 ( 876530 82800 ) ( * 2293470 )
+ NEW met3 ( 181010 2332060 ) ( 182850 * )
+ NEW met2 ( 181010 2293470 ) ( * 2332060 )
+ NEW met2 ( 182850 2332060 ) ( * 2402780 )
+ NEW met1 ( 181010 2293470 ) ( 876530 * )
+ NEW met2 ( 182850 2402780 ) M2M3_PR_M
+ NEW met1 ( 876530 2293470 ) M1M2_PR
+ NEW met2 ( 182850 2332060 ) M2M3_PR_M
+ NEW met2 ( 181010 2332060 ) M2M3_PR_M
+ NEW met1 ( 181010 2293470 ) M1M2_PR ;
- la_data_in[15] ( PIN la_data_in[15] ) ( chip_controller la_data_in[15] ) + USE SIGNAL
- + ROUTED met1 ( 477250 2211870 ) ( * 2212210 )
- NEW met1 ( 477250 2211870 ) ( 489670 * )
- NEW li1 ( 489670 2211870 ) ( * 2212550 )
- NEW li1 ( 489670 2212550 ) ( 491050 * )
- NEW li1 ( 491050 2212210 ) ( * 2212550 )
- NEW met1 ( 491050 2212210 ) ( 507150 * )
- NEW met2 ( 895390 2380 0 ) ( * 3060 )
+ + ROUTED met2 ( 895390 2380 0 ) ( * 3060 )
NEW met2 ( 894470 3060 ) ( 895390 * )
NEW met2 ( 894470 2380 ) ( * 3060 )
NEW met2 ( 893090 2380 ) ( 894470 * )
- NEW met2 ( 309350 2199460 0 ) ( * 2212210 )
- NEW met2 ( 507150 2205750 ) ( * 2212210 )
+ NEW met3 ( 599380 2394620 0 ) ( 607430 * )
+ NEW met2 ( 607430 2394620 ) ( * 2395130 )
NEW met2 ( 890330 82800 ) ( 893090 * )
NEW met2 ( 893090 2380 ) ( * 82800 )
- NEW met2 ( 890330 82800 ) ( * 2205750 )
- NEW met1 ( 309350 2212210 ) ( 477250 * )
- NEW met1 ( 507150 2205750 ) ( 890330 * )
- NEW met1 ( 309350 2212210 ) M1M2_PR
- NEW li1 ( 489670 2211870 ) L1M1_PR_MR
- NEW li1 ( 491050 2212210 ) L1M1_PR_MR
- NEW met1 ( 507150 2212210 ) M1M2_PR
- NEW met1 ( 507150 2205750 ) M1M2_PR
- NEW met1 ( 890330 2205750 ) M1M2_PR ;
+ NEW met2 ( 890330 82800 ) ( * 2395130 )
+ NEW met1 ( 607430 2395130 ) ( 890330 * )
+ NEW met2 ( 607430 2394620 ) M2M3_PR_M
+ NEW met1 ( 607430 2395130 ) M1M2_PR
+ NEW met1 ( 890330 2395130 ) M1M2_PR ;
- la_data_in[16] ( PIN la_data_in[16] ) ( chip_controller la_data_in[16] ) + USE SIGNAL
- + ROUTED met1 ( 197110 1795710 ) ( 197570 * )
- NEW met2 ( 197570 1775990 ) ( * 1795710 )
- NEW met3 ( 197110 1908420 ) ( 200100 * 0 )
+ + ROUTED met3 ( 599380 2402780 0 ) ( 607430 * )
+ NEW met2 ( 607430 2401930 ) ( * 2402780 )
NEW met2 ( 912870 2380 0 ) ( * 3060 )
NEW met2 ( 911950 3060 ) ( 912870 * )
NEW met2 ( 911950 2380 ) ( * 3060 )
NEW met2 ( 911030 2380 ) ( 911950 * )
- NEW met1 ( 197570 1775990 ) ( 911030 * )
- NEW met2 ( 911030 2380 ) ( * 1775990 )
- NEW li1 ( 197110 1795710 ) ( * 1801490 )
- NEW met2 ( 197110 1801490 ) ( * 1908420 )
- NEW li1 ( 197110 1795710 ) L1M1_PR_MR
- NEW met1 ( 197570 1795710 ) M1M2_PR
- NEW met1 ( 197570 1775990 ) M1M2_PR
- NEW met2 ( 197110 1908420 ) M2M3_PR_M
- NEW met1 ( 911030 1775990 ) M1M2_PR
- NEW li1 ( 197110 1801490 ) L1M1_PR_MR
- NEW met1 ( 197110 1801490 ) M1M2_PR
- NEW met1 ( 197110 1801490 ) RECT ( -355 -70 0 70 ) ;
+ NEW met1 ( 607430 2401930 ) ( 911030 * )
+ NEW met2 ( 911030 2380 ) ( * 2401930 )
+ NEW met2 ( 607430 2402780 ) M2M3_PR_M
+ NEW met1 ( 607430 2401930 ) M1M2_PR
+ NEW met1 ( 911030 2401930 ) M1M2_PR ;
- la_data_in[17] ( PIN la_data_in[17] ) ( chip_controller la_data_in[17] ) + USE SIGNAL
- + ROUTED met2 ( 324070 2199460 0 ) ( * 2203370 )
+ + ROUTED met2 ( 322230 2699260 0 ) ( 322690 * )
+ NEW met2 ( 322690 2699260 ) ( * 2718130 )
+ NEW met1 ( 318550 2718130 ) ( 322690 * )
+ NEW met2 ( 318550 2718130 ) ( * 2744990 )
NEW met2 ( 930810 2380 0 ) ( * 16830 )
NEW met1 ( 921150 16830 ) ( 930810 * )
- NEW met1 ( 324070 2203370 ) ( 921150 * )
- NEW met2 ( 921150 16830 ) ( * 2203370 )
- NEW met1 ( 324070 2203370 ) M1M2_PR
+ NEW met1 ( 318550 2744990 ) ( 921150 * )
+ NEW met2 ( 921150 16830 ) ( * 2744990 )
+ NEW met1 ( 322690 2718130 ) M1M2_PR
+ NEW met1 ( 318550 2718130 ) M1M2_PR
+ NEW met1 ( 318550 2744990 ) M1M2_PR
NEW met1 ( 930810 16830 ) M1M2_PR
NEW met1 ( 921150 16830 ) M1M2_PR
- NEW met1 ( 921150 2203370 ) M1M2_PR ;
+ NEW met1 ( 921150 2744990 ) M1M2_PR ;
- la_data_in[18] ( PIN la_data_in[18] ) ( chip_controller la_data_in[18] ) + USE SIGNAL
- + ROUTED met3 ( 599380 1926100 0 ) ( 607430 * )
- NEW met2 ( 607430 1925930 ) ( * 1926100 )
- NEW met2 ( 948750 2380 0 ) ( * 3060 )
- NEW met2 ( 947830 3060 ) ( 948750 * )
- NEW met2 ( 947830 2380 ) ( * 3060 )
- NEW met2 ( 946450 2380 ) ( 947830 * )
- NEW met1 ( 607430 1925930 ) ( 945530 * )
- NEW met2 ( 945530 82800 ) ( 946450 * )
- NEW met2 ( 946450 2380 ) ( * 82800 )
- NEW met2 ( 945530 82800 ) ( * 1925930 )
- NEW met2 ( 607430 1926100 ) M2M3_PR_M
- NEW met1 ( 607430 1925930 ) M1M2_PR
- NEW met1 ( 945530 1925930 ) M1M2_PR ;
+ + ROUTED met2 ( 327750 2699260 0 ) ( 328670 * )
+ NEW met2 ( 328670 2699260 ) ( * 2706570 )
+ NEW met2 ( 948750 2380 0 ) ( * 16830 )
+ NEW met1 ( 941850 16830 ) ( 948750 * )
+ NEW met2 ( 941850 16830 ) ( * 2706570 )
+ NEW met1 ( 328670 2706570 ) ( 941850 * )
+ NEW met1 ( 328670 2706570 ) M1M2_PR
+ NEW met1 ( 948750 16830 ) M1M2_PR
+ NEW met1 ( 941850 16830 ) M1M2_PR
+ NEW met1 ( 941850 2706570 ) M1M2_PR ;
- la_data_in[19] ( PIN la_data_in[19] ) ( chip_controller la_data_in[19] ) + USE SIGNAL
- + ROUTED met3 ( 184690 1930860 ) ( 200100 * 0 )
- NEW met2 ( 966230 2380 0 ) ( * 26350 )
- NEW met1 ( 184690 26350 ) ( 966230 * )
- NEW met2 ( 184690 26350 ) ( * 1930860 )
- NEW met1 ( 184690 26350 ) M1M2_PR
- NEW met2 ( 184690 1930860 ) M2M3_PR_M
- NEW met1 ( 966230 26350 ) M1M2_PR ;
+ + ROUTED met2 ( 966230 2380 0 ) ( * 24990 )
+ NEW met1 ( 344770 24990 ) ( 966230 * )
+ NEW met2 ( 342930 2278340 ) ( 344770 * )
+ NEW met2 ( 342930 2278340 ) ( * 2300100 )
+ NEW met2 ( 342010 2300100 0 ) ( 342930 * )
+ NEW met2 ( 344770 24990 ) ( * 2278340 )
+ NEW met1 ( 966230 24990 ) M1M2_PR
+ NEW met1 ( 344770 24990 ) M1M2_PR ;
- la_data_in[1] ( PIN la_data_in[1] ) ( chip_controller la_data_in[1] ) + USE SIGNAL
- + ROUTED met1 ( 215050 1787210 ) ( 220570 * )
- NEW met2 ( 215050 1787210 ) ( * 1800300 0 )
- NEW met2 ( 220570 31450 ) ( * 1787210 )
- NEW met2 ( 646990 2380 0 ) ( * 31450 )
- NEW met1 ( 220570 31450 ) ( 646990 * )
- NEW met1 ( 220570 31450 ) M1M2_PR
- NEW met1 ( 220570 1787210 ) M1M2_PR
- NEW met1 ( 215050 1787210 ) M1M2_PR
- NEW met1 ( 646990 31450 ) M1M2_PR ;
+ + ROUTED met2 ( 210910 2699260 0 ) ( 212290 * )
+ NEW met2 ( 212290 2699260 ) ( * 2712010 )
+ NEW met2 ( 241270 2709970 ) ( * 2712010 )
+ NEW met1 ( 212290 2712010 ) ( 241270 * )
+ NEW met1 ( 641930 58990 ) ( 646990 * )
+ NEW met2 ( 646990 2380 0 ) ( * 58990 )
+ NEW met2 ( 641930 58990 ) ( * 2709970 )
+ NEW met1 ( 241270 2709970 ) ( 641930 * )
+ NEW met1 ( 212290 2712010 ) M1M2_PR
+ NEW met1 ( 241270 2712010 ) M1M2_PR
+ NEW met1 ( 241270 2709970 ) M1M2_PR
+ NEW met1 ( 641930 2709970 ) M1M2_PR
+ NEW met1 ( 641930 58990 ) M1M2_PR
+ NEW met1 ( 646990 58990 ) M1M2_PR ;
- la_data_in[20] ( PIN la_data_in[20] ) ( chip_controller la_data_in[20] ) + USE SIGNAL
- + ROUTED met3 ( 193660 1937660 ) ( 200100 * 0 )
- NEW met2 ( 980030 82800 ) ( 984170 * )
- NEW met2 ( 984170 2380 0 ) ( * 82800 )
- NEW met2 ( 980030 82800 ) ( * 1776500 )
- NEW met3 ( 193660 1776500 ) ( 980030 * )
- NEW met4 ( 193660 1776500 ) ( * 1937660 )
- NEW met3 ( 193660 1937660 ) M3M4_PR_M
- NEW met3 ( 193660 1776500 ) M3M4_PR_M
- NEW met2 ( 980030 1776500 ) M2M3_PR_M ;
+ + ROUTED met1 ( 181470 2429130 ) ( 187910 * )
+ NEW met2 ( 187910 2429130 ) ( * 2432700 )
+ NEW met3 ( 187910 2432700 ) ( 201020 * )
+ NEW met3 ( 201020 2432700 ) ( * 2433380 0 )
+ NEW met2 ( 984170 2380 0 ) ( * 34500 )
+ NEW met2 ( 980030 34500 ) ( 984170 * )
+ NEW met2 ( 980030 34500 ) ( * 2293810 )
+ NEW met1 ( 179630 2331890 ) ( 181470 * )
+ NEW met2 ( 179630 2308940 ) ( * 2331890 )
+ NEW met2 ( 179170 2308940 ) ( 179630 * )
+ NEW met2 ( 179170 2307410 ) ( * 2308940 )
+ NEW met1 ( 179170 2307410 ) ( 183310 * )
+ NEW met2 ( 183310 2293810 ) ( * 2307410 )
+ NEW met2 ( 181470 2331890 ) ( * 2429130 )
+ NEW met1 ( 183310 2293810 ) ( 980030 * )
+ NEW met1 ( 181470 2429130 ) M1M2_PR
+ NEW met1 ( 187910 2429130 ) M1M2_PR
+ NEW met2 ( 187910 2432700 ) M2M3_PR_M
+ NEW met1 ( 980030 2293810 ) M1M2_PR
+ NEW met1 ( 181470 2331890 ) M1M2_PR
+ NEW met1 ( 179630 2331890 ) M1M2_PR
+ NEW met1 ( 179170 2307410 ) M1M2_PR
+ NEW met1 ( 183310 2307410 ) M1M2_PR
+ NEW met1 ( 183310 2293810 ) M1M2_PR ;
- la_data_in[21] ( PIN la_data_in[21] ) ( chip_controller la_data_in[21] ) + USE SIGNAL
- + ROUTED met2 ( 1001650 2380 0 ) ( * 30090 )
- NEW met1 ( 337870 30090 ) ( 1001650 * )
- NEW met2 ( 336490 1800300 0 ) ( 337870 * )
- NEW met2 ( 337870 30090 ) ( * 1800300 )
- NEW met1 ( 337870 30090 ) M1M2_PR
- NEW met1 ( 1001650 30090 ) M1M2_PR ;
+ + ROUTED met2 ( 190210 2436100 ) ( * 2436270 )
+ NEW met3 ( 190210 2436100 ) ( 201020 * )
+ NEW met3 ( 201020 2436100 ) ( * 2436780 0 )
+ NEW met1 ( 173190 2436270 ) ( 190210 * )
+ NEW met2 ( 1000730 82800 ) ( 1001650 * )
+ NEW met2 ( 1001650 2380 0 ) ( * 82800 )
+ NEW met1 ( 173190 2282590 ) ( 1000730 * )
+ NEW met2 ( 1000730 82800 ) ( * 2282590 )
+ NEW met2 ( 173190 2282590 ) ( * 2436270 )
+ NEW met1 ( 190210 2436270 ) M1M2_PR
+ NEW met2 ( 190210 2436100 ) M2M3_PR_M
+ NEW met1 ( 173190 2436270 ) M1M2_PR
+ NEW met1 ( 173190 2282590 ) M1M2_PR
+ NEW met1 ( 1000730 2282590 ) M1M2_PR ;
- la_data_in[22] ( PIN la_data_in[22] ) ( chip_controller la_data_in[22] ) + USE SIGNAL
- + ROUTED met2 ( 1019590 2380 0 ) ( * 30430 )
- NEW met1 ( 344770 30430 ) ( 1019590 * )
- NEW met1 ( 342470 1787210 ) ( 344770 * )
- NEW met2 ( 342470 1787210 ) ( * 1800300 0 )
- NEW met2 ( 344770 30430 ) ( * 1787210 )
- NEW met1 ( 344770 30430 ) M1M2_PR
- NEW met1 ( 1019590 30430 ) M1M2_PR
- NEW met1 ( 344770 1787210 ) M1M2_PR
- NEW met1 ( 342470 1787210 ) M1M2_PR ;
+ + ROUTED met2 ( 355350 2699260 0 ) ( 356730 * )
+ NEW met2 ( 356730 2699260 ) ( * 2706230 )
+ NEW met2 ( 1019590 2380 0 ) ( * 16830 )
+ NEW met1 ( 1010850 16830 ) ( 1019590 * )
+ NEW met2 ( 1010850 16830 ) ( * 2706230 )
+ NEW met1 ( 356730 2706230 ) ( 1010850 * )
+ NEW met1 ( 356730 2706230 ) M1M2_PR
+ NEW met1 ( 1019590 16830 ) M1M2_PR
+ NEW met1 ( 1010850 16830 ) M1M2_PR
+ NEW met1 ( 1010850 2706230 ) M1M2_PR ;
- la_data_in[23] ( PIN la_data_in[23] ) ( chip_controller la_data_in[23] ) + USE SIGNAL
- + ROUTED met3 ( 185150 1955340 ) ( 200100 * 0 )
- NEW met2 ( 1037070 2380 0 ) ( * 26010 )
- NEW met1 ( 185150 26010 ) ( 1037070 * )
- NEW met2 ( 185150 26010 ) ( * 1955340 )
- NEW met1 ( 185150 26010 ) M1M2_PR
- NEW met2 ( 185150 1955340 ) M2M3_PR_M
- NEW met1 ( 1037070 26010 ) M1M2_PR ;
+ + ROUTED met2 ( 1037070 2380 0 ) ( * 3060 )
+ NEW met2 ( 1036150 3060 ) ( 1037070 * )
+ NEW met2 ( 1036150 2380 ) ( * 3060 )
+ NEW met2 ( 1035230 2380 ) ( 1036150 * )
+ NEW met2 ( 1035230 2380 ) ( * 2436610 )
+ NEW met3 ( 599380 2438820 0 ) ( 608350 * )
+ NEW met2 ( 608350 2436610 ) ( * 2438820 )
+ NEW met1 ( 608350 2436610 ) ( 1035230 * )
+ NEW met1 ( 1035230 2436610 ) M1M2_PR
+ NEW met2 ( 608350 2438820 ) M2M3_PR_M
+ NEW met1 ( 608350 2436610 ) M1M2_PR ;
- la_data_in[24] ( PIN la_data_in[24] ) ( chip_controller la_data_in[24] ) + USE SIGNAL
- + ROUTED met2 ( 1055010 2380 0 ) ( * 48110 )
- NEW met2 ( 1049030 48300 ) ( * 1960610 )
- NEW met2 ( 1048570 48110 ) ( * 48300 )
- NEW met1 ( 1048570 48110 ) ( 1055010 * )
- NEW met2 ( 1048570 48300 ) ( 1049030 * )
- NEW met3 ( 599380 1962140 0 ) ( 613870 * )
- NEW met2 ( 613870 1960610 ) ( * 1962140 )
- NEW met1 ( 613870 1960610 ) ( 1049030 * )
- NEW met1 ( 1049030 1960610 ) M1M2_PR
- NEW met1 ( 1055010 48110 ) M1M2_PR
- NEW met1 ( 1048570 48110 ) M1M2_PR
- NEW met2 ( 613870 1962140 ) M2M3_PR_M
- NEW met1 ( 613870 1960610 ) M1M2_PR ;
+ + ROUTED met2 ( 1055010 2380 0 ) ( * 15810 )
+ NEW met2 ( 369150 2699260 0 ) ( 370530 * )
+ NEW met2 ( 370530 2699260 ) ( * 2705550 )
+ NEW met1 ( 1045350 15810 ) ( 1055010 * )
+ NEW met2 ( 1045350 15810 ) ( * 2705550 )
+ NEW met1 ( 370530 2705550 ) ( 1045350 * )
+ NEW met1 ( 1055010 15810 ) M1M2_PR
+ NEW met1 ( 370530 2705550 ) M1M2_PR
+ NEW met1 ( 1045350 15810 ) M1M2_PR
+ NEW met1 ( 1045350 2705550 ) M1M2_PR ;
- la_data_in[25] ( PIN la_data_in[25] ) ( chip_controller la_data_in[25] ) + USE SIGNAL
- + ROUTED met3 ( 186070 1966900 ) ( 200100 * 0 )
- NEW met2 ( 1069730 82800 ) ( 1072490 * )
+ + ROUTED met2 ( 1069730 82800 ) ( 1072490 * )
NEW met2 ( 1072490 2380 0 ) ( * 82800 )
- NEW met2 ( 1069730 82800 ) ( * 1781770 )
- NEW met1 ( 186070 1781770 ) ( 1069730 * )
- NEW met2 ( 186070 1781770 ) ( * 1966900 )
- NEW met1 ( 186070 1781770 ) M1M2_PR
- NEW met2 ( 186070 1966900 ) M2M3_PR_M
- NEW met1 ( 1069730 1781770 ) M1M2_PR ;
+ NEW met2 ( 1069730 82800 ) ( * 2442730 )
+ NEW met3 ( 599380 2448340 0 ) ( 607430 * )
+ NEW met2 ( 607430 2442730 ) ( * 2448340 )
+ NEW met1 ( 607430 2442730 ) ( 1069730 * )
+ NEW met1 ( 1069730 2442730 ) M1M2_PR
+ NEW met2 ( 607430 2448340 ) M2M3_PR_M
+ NEW met1 ( 607430 2442730 ) M1M2_PR ;
- la_data_in[26] ( PIN la_data_in[26] ) ( chip_controller la_data_in[26] ) + USE SIGNAL
- + ROUTED met2 ( 1090430 2380 0 ) ( * 25330 )
- NEW met2 ( 188830 1973700 ) ( * 1973870 )
- NEW met3 ( 188830 1973700 ) ( 200100 * 0 )
- NEW met1 ( 178250 25330 ) ( 1090430 * )
- NEW met1 ( 178250 1973870 ) ( 188830 * )
- NEW met2 ( 178250 25330 ) ( * 1973870 )
- NEW met1 ( 1090430 25330 ) M1M2_PR
- NEW met1 ( 188830 1973870 ) M1M2_PR
- NEW met2 ( 188830 1973700 ) M2M3_PR_M
- NEW met1 ( 178250 25330 ) M1M2_PR
- NEW met1 ( 178250 1973870 ) M1M2_PR ;
+ + ROUTED met2 ( 376510 2699260 0 ) ( 377430 * )
+ NEW met2 ( 377430 2699260 ) ( * 2705210 )
+ NEW met2 ( 1090430 2380 0 ) ( * 16830 )
+ NEW met1 ( 1079850 16830 ) ( 1090430 * )
+ NEW met2 ( 1079850 16830 ) ( * 2705210 )
+ NEW met1 ( 377430 2705210 ) ( 1079850 * )
+ NEW met1 ( 377430 2705210 ) M1M2_PR
+ NEW met1 ( 1090430 16830 ) M1M2_PR
+ NEW met1 ( 1079850 16830 ) M1M2_PR
+ NEW met1 ( 1079850 2705210 ) M1M2_PR ;
- la_data_in[27] ( PIN la_data_in[27] ) ( chip_controller la_data_in[27] ) + USE SIGNAL
- + ROUTED met2 ( 1107910 2380 0 ) ( * 19210 )
- NEW met1 ( 624450 19210 ) ( 1107910 * )
- NEW met2 ( 371450 2199460 0 ) ( * 2207790 )
- NEW met1 ( 371450 2207790 ) ( 624450 * )
- NEW met2 ( 624450 19210 ) ( * 2207790 )
- NEW met1 ( 624450 19210 ) M1M2_PR
- NEW met1 ( 1107910 19210 ) M1M2_PR
- NEW met1 ( 371450 2207790 ) M1M2_PR
- NEW met1 ( 624450 2207790 ) M1M2_PR ;
+ + ROUTED met2 ( 190210 2470610 ) ( * 2476220 )
+ NEW met3 ( 190210 2476220 ) ( 201020 * )
+ NEW met3 ( 201020 2476220 ) ( * 2476900 0 )
+ NEW met2 ( 1107910 2380 0 ) ( * 3060 )
+ NEW met2 ( 1106990 3060 ) ( 1107910 * )
+ NEW met2 ( 1106990 2380 ) ( * 3060 )
+ NEW met2 ( 1105610 2380 ) ( 1106990 * )
+ NEW met1 ( 170430 2470610 ) ( 190210 * )
+ NEW met1 ( 170430 53210 ) ( 1105610 * )
+ NEW met2 ( 1105610 2380 ) ( * 53210 )
+ NEW met2 ( 170430 53210 ) ( * 2470610 )
+ NEW met1 ( 190210 2470610 ) M1M2_PR
+ NEW met2 ( 190210 2476220 ) M2M3_PR_M
+ NEW met1 ( 170430 53210 ) M1M2_PR
+ NEW met1 ( 170430 2470610 ) M1M2_PR
+ NEW met1 ( 1105610 53210 ) M1M2_PR ;
- la_data_in[28] ( PIN la_data_in[28] ) ( chip_controller la_data_in[28] ) + USE SIGNAL
- + ROUTED met2 ( 1124930 82800 ) ( 1125850 * )
- NEW met2 ( 1125850 2380 0 ) ( * 82800 )
- NEW met2 ( 1124930 82800 ) ( * 1980330 )
- NEW met3 ( 599380 1983220 0 ) ( 613410 * )
- NEW met2 ( 613410 1980330 ) ( * 1983220 )
- NEW met1 ( 613410 1980330 ) ( 1124930 * )
- NEW met1 ( 1124930 1980330 ) M1M2_PR
- NEW met2 ( 613410 1983220 ) M2M3_PR_M
- NEW met1 ( 613410 1980330 ) M1M2_PR ;
+ + ROUTED met2 ( 189750 2477410 ) ( * 2481660 )
+ NEW met3 ( 189750 2481660 ) ( 201020 * )
+ NEW met3 ( 201020 2481660 ) ( * 2482340 0 )
+ NEW met1 ( 176870 2477410 ) ( 189750 * )
+ NEW met1 ( 176870 60010 ) ( 1125850 * )
+ NEW met2 ( 1125850 2380 0 ) ( * 60010 )
+ NEW met2 ( 176870 60010 ) ( * 2477410 )
+ NEW met1 ( 189750 2477410 ) M1M2_PR
+ NEW met2 ( 189750 2481660 ) M2M3_PR_M
+ NEW met1 ( 176870 60010 ) M1M2_PR
+ NEW met1 ( 176870 2477410 ) M1M2_PR
+ NEW met1 ( 1125850 60010 ) M1M2_PR ;
- la_data_in[29] ( PIN la_data_in[29] ) ( chip_controller la_data_in[29] ) + USE SIGNAL
- + ROUTED met1 ( 181010 1987470 ) ( 186990 * )
- NEW met2 ( 186990 1987470 ) ( * 1989340 )
- NEW met3 ( 186990 1989340 ) ( 200100 * 0 )
- NEW met2 ( 1143790 2380 0 ) ( * 3060 )
+ + ROUTED met2 ( 1143790 2380 0 ) ( * 3060 )
NEW met2 ( 1142870 3060 ) ( 1143790 * )
NEW met2 ( 1142870 2380 ) ( * 3060 )
NEW met2 ( 1141490 2380 ) ( 1142870 * )
NEW met2 ( 1138730 82800 ) ( 1141490 * )
NEW met2 ( 1141490 2380 ) ( * 82800 )
- NEW met1 ( 181010 1776330 ) ( 1138730 * )
- NEW met2 ( 1138730 82800 ) ( * 1776330 )
- NEW met2 ( 181010 1776330 ) ( * 1987470 )
- NEW met1 ( 181010 1776330 ) M1M2_PR
- NEW met1 ( 181010 1987470 ) M1M2_PR
- NEW met1 ( 186990 1987470 ) M1M2_PR
- NEW met2 ( 186990 1989340 ) M2M3_PR_M
- NEW met1 ( 1138730 1776330 ) M1M2_PR ;
+ NEW met2 ( 1138730 82800 ) ( * 2463810 )
+ NEW met3 ( 599380 2468740 0 ) ( 607430 * )
+ NEW met2 ( 607430 2464490 ) ( * 2468740 )
+ NEW met1 ( 607430 2463810 ) ( * 2464490 )
+ NEW met1 ( 607430 2463810 ) ( 1138730 * )
+ NEW met1 ( 1138730 2463810 ) M1M2_PR
+ NEW met2 ( 607430 2468740 ) M2M3_PR_M
+ NEW met1 ( 607430 2464490 ) M1M2_PR ;
- la_data_in[2] ( PIN la_data_in[2] ) ( chip_controller la_data_in[2] ) + USE SIGNAL
+ ROUTED met2 ( 662630 82800 ) ( 664930 * )
NEW met2 ( 664930 2380 0 ) ( * 82800 )
- NEW met2 ( 662630 82800 ) ( * 1780750 )
- NEW met1 ( 197110 1780750 ) ( 662630 * )
- NEW met3 ( 197110 1800980 ) ( 197340 * )
- NEW met3 ( 197340 1800980 ) ( * 1802340 )
- NEW met3 ( 197340 1802340 ) ( 198030 * )
- NEW met2 ( 198030 1802340 ) ( * 1821380 )
- NEW met3 ( 198030 1821380 ) ( 200100 * 0 )
- NEW met2 ( 197110 1780750 ) ( * 1800980 )
- NEW met1 ( 197110 1780750 ) M1M2_PR
- NEW met1 ( 662630 1780750 ) M1M2_PR
- NEW met2 ( 197110 1800980 ) M2M3_PR_M
- NEW met2 ( 198030 1802340 ) M2M3_PR_M
- NEW met2 ( 198030 1821380 ) M2M3_PR_M ;
+ NEW met2 ( 662630 82800 ) ( * 2291430 )
+ NEW met3 ( 201020 2321860 ) ( * 2322540 0 )
+ NEW met3 ( 186530 2321860 ) ( 201020 * )
+ NEW met2 ( 186070 2321860 ) ( 186530 * )
+ NEW met2 ( 186070 2291430 ) ( * 2321860 )
+ NEW met1 ( 186070 2291430 ) ( 662630 * )
+ NEW met1 ( 662630 2291430 ) M1M2_PR
+ NEW met2 ( 186530 2321860 ) M2M3_PR_M
+ NEW met1 ( 186070 2291430 ) M1M2_PR ;
- la_data_in[30] ( PIN la_data_in[30] ) ( chip_controller la_data_in[30] ) + USE SIGNAL
- + ROUTED met2 ( 1161270 2380 0 ) ( * 3060 )
+ + ROUTED met2 ( 397210 2699260 0 ) ( 398590 * )
+ NEW met2 ( 398590 2699260 ) ( * 2718470 )
+ NEW met1 ( 398590 2718470 ) ( 415150 * )
+ NEW met2 ( 1161270 2380 0 ) ( * 3060 )
NEW met2 ( 1160350 3060 ) ( 1161270 * )
NEW met2 ( 1160350 2380 ) ( * 3060 )
NEW met2 ( 1159430 2380 ) ( 1160350 * )
- NEW met1 ( 181470 1994270 ) ( 188830 * )
- NEW met2 ( 188830 1994270 ) ( * 1996140 )
- NEW met3 ( 188830 1996140 ) ( 200100 * 0 )
- NEW met2 ( 1159430 2380 ) ( * 1782110 )
- NEW met1 ( 181470 1782110 ) ( 1159430 * )
- NEW met2 ( 181470 1782110 ) ( * 1994270 )
- NEW met1 ( 181470 1782110 ) M1M2_PR
- NEW met1 ( 181470 1994270 ) M1M2_PR
- NEW met1 ( 188830 1994270 ) M1M2_PR
- NEW met2 ( 188830 1996140 ) M2M3_PR_M
- NEW met1 ( 1159430 1782110 ) M1M2_PR ;
+ NEW met2 ( 415150 2718470 ) ( * 2742950 )
+ NEW met2 ( 1159430 2380 ) ( * 2742950 )
+ NEW met1 ( 415150 2742950 ) ( 1159430 * )
+ NEW met1 ( 398590 2718470 ) M1M2_PR
+ NEW met1 ( 415150 2718470 ) M1M2_PR
+ NEW met1 ( 415150 2742950 ) M1M2_PR
+ NEW met1 ( 1159430 2742950 ) M1M2_PR ;
- la_data_in[31] ( PIN la_data_in[31] ) ( chip_controller la_data_in[31] ) + USE SIGNAL
- + ROUTED met2 ( 1179210 2380 0 ) ( * 24990 )
- NEW met2 ( 188830 2001070 ) ( * 2002940 )
- NEW met3 ( 188830 2002940 ) ( 200100 * 0 )
- NEW met1 ( 173650 24990 ) ( 1179210 * )
- NEW met1 ( 173650 2001070 ) ( 188830 * )
- NEW met2 ( 173650 24990 ) ( * 2001070 )
- NEW met1 ( 1179210 24990 ) M1M2_PR
- NEW met1 ( 188830 2001070 ) M1M2_PR
- NEW met2 ( 188830 2002940 ) M2M3_PR_M
- NEW met1 ( 173650 24990 ) M1M2_PR
- NEW met1 ( 173650 2001070 ) M1M2_PR ;
+ + ROUTED met2 ( 1179210 2380 0 ) ( * 24650 )
+ NEW met1 ( 402270 2283950 ) ( 406870 * )
+ NEW met2 ( 402270 2283950 ) ( * 2300100 0 )
+ NEW met2 ( 406870 24650 ) ( * 2283950 )
+ NEW met1 ( 406870 24650 ) ( 1179210 * )
+ NEW met1 ( 406870 24650 ) M1M2_PR
+ NEW met1 ( 1179210 24650 ) M1M2_PR
+ NEW met1 ( 406870 2283950 ) M1M2_PR
+ NEW met1 ( 402270 2283950 ) M1M2_PR ;
- la_data_in[32] ( PIN la_data_in[32] ) ( chip_controller la_data_in[32] ) + USE SIGNAL
- + ROUTED met2 ( 390770 2199460 0 ) ( * 2202350 )
- NEW met2 ( 1190250 20570 ) ( * 2202350 )
- NEW met2 ( 1196690 2380 0 ) ( * 20570 )
- NEW met1 ( 1190250 20570 ) ( 1196690 * )
- NEW met1 ( 390770 2202350 ) ( 1190250 * )
- NEW met1 ( 1190250 20570 ) M1M2_PR
- NEW met1 ( 390770 2202350 ) M1M2_PR
- NEW met1 ( 1190250 2202350 ) M1M2_PR
- NEW met1 ( 1196690 20570 ) M1M2_PR ;
+ + ROUTED met1 ( 407330 2284290 ) ( 413770 * )
+ NEW met2 ( 407330 2284290 ) ( * 2300100 0 )
+ NEW met2 ( 413770 25670 ) ( * 2284290 )
+ NEW met2 ( 1196690 2380 0 ) ( * 25670 )
+ NEW met1 ( 413770 25670 ) ( 1196690 * )
+ NEW met1 ( 413770 25670 ) M1M2_PR
+ NEW met1 ( 413770 2284290 ) M1M2_PR
+ NEW met1 ( 407330 2284290 ) M1M2_PR
+ NEW met1 ( 1196690 25670 ) M1M2_PR ;
- la_data_in[33] ( PIN la_data_in[33] ) ( chip_controller la_data_in[33] ) + USE SIGNAL
- + ROUTED met2 ( 384790 1800300 0 ) ( 386170 * )
- NEW met2 ( 386170 34170 ) ( * 1800300 )
- NEW met2 ( 1214630 2380 0 ) ( * 34170 )
- NEW met1 ( 386170 34170 ) ( 1214630 * )
- NEW met1 ( 386170 34170 ) M1M2_PR
- NEW met1 ( 1214630 34170 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2491180 0 ) ( 608350 * )
+ NEW met2 ( 608350 2491180 ) ( * 2492030 )
+ NEW met1 ( 608350 2492030 ) ( 1214630 * )
+ NEW met2 ( 1214630 2380 0 ) ( * 2492030 )
+ NEW met2 ( 608350 2491180 ) M2M3_PR_M
+ NEW met1 ( 608350 2492030 ) M1M2_PR
+ NEW met1 ( 1214630 2492030 ) M1M2_PR ;
- la_data_in[34] ( PIN la_data_in[34] ) ( chip_controller la_data_in[34] ) + USE SIGNAL
- + ROUTED met1 ( 387090 1788570 ) ( 392610 * )
- NEW met2 ( 387090 1788570 ) ( * 1800300 0 )
- NEW met2 ( 392610 32130 ) ( * 1788570 )
- NEW met2 ( 1232110 2380 0 ) ( * 15980 )
- NEW met2 ( 1231650 15980 ) ( 1232110 * )
- NEW met2 ( 1231650 15980 ) ( * 32130 )
- NEW met1 ( 392610 32130 ) ( 1231650 * )
- NEW met1 ( 392610 32130 ) M1M2_PR
- NEW met1 ( 392610 1788570 ) M1M2_PR
- NEW met1 ( 387090 1788570 ) M1M2_PR
- NEW met1 ( 1231650 32130 ) M1M2_PR ;
+ + ROUTED met2 ( 190210 2491350 ) ( * 2495940 )
+ NEW met3 ( 190210 2495940 ) ( 201020 * )
+ NEW met3 ( 201020 2495940 ) ( * 2496620 0 )
+ NEW met2 ( 1232110 2380 0 ) ( * 3060 )
+ NEW met2 ( 1231190 3060 ) ( 1232110 * )
+ NEW met2 ( 1231190 2380 ) ( * 3060 )
+ NEW met2 ( 1229810 2380 ) ( 1231190 * )
+ NEW met1 ( 175030 2491350 ) ( 190210 * )
+ NEW met2 ( 1228430 82800 ) ( 1229810 * )
+ NEW met2 ( 1229810 2380 ) ( * 82800 )
+ NEW met1 ( 175030 2280890 ) ( 1228430 * )
+ NEW met2 ( 1228430 82800 ) ( * 2280890 )
+ NEW met2 ( 175030 2280890 ) ( * 2491350 )
+ NEW met1 ( 190210 2491350 ) M1M2_PR
+ NEW met2 ( 190210 2495940 ) M2M3_PR_M
+ NEW met1 ( 175030 2280890 ) M1M2_PR
+ NEW met1 ( 175030 2491350 ) M1M2_PR
+ NEW met1 ( 1228430 2280890 ) M1M2_PR ;
- la_data_in[35] ( PIN la_data_in[35] ) ( chip_controller la_data_in[35] ) + USE SIGNAL
- + ROUTED met2 ( 1250050 2380 0 ) ( * 33150 )
- NEW met1 ( 388930 1787210 ) ( 393070 * )
- NEW met2 ( 388930 1787210 ) ( * 1800300 0 )
- NEW met2 ( 393070 33150 ) ( * 1787210 )
- NEW met1 ( 393070 33150 ) ( 1250050 * )
- NEW met1 ( 393070 33150 ) M1M2_PR
- NEW met1 ( 1250050 33150 ) M1M2_PR
- NEW met1 ( 393070 1787210 ) M1M2_PR
- NEW met1 ( 388930 1787210 ) M1M2_PR ;
+ + ROUTED met3 ( 183770 2500020 ) ( 201020 * )
+ NEW met3 ( 201020 2500020 ) ( * 2500700 0 )
+ NEW met2 ( 1249130 82800 ) ( 1250050 * )
+ NEW met2 ( 1250050 2380 0 ) ( * 82800 )
+ NEW met2 ( 1249130 82800 ) ( * 2280550 )
+ NEW met1 ( 183310 2280550 ) ( 1249130 * )
+ NEW met2 ( 183310 2280550 ) ( * 2283900 )
+ NEW met2 ( 183310 2283900 ) ( 183770 * )
+ NEW met2 ( 183770 2283900 ) ( * 2500020 )
+ NEW met2 ( 183770 2500020 ) M2M3_PR_M
+ NEW met1 ( 183310 2280550 ) M1M2_PR
+ NEW met1 ( 1249130 2280550 ) M1M2_PR ;
- la_data_in[36] ( PIN la_data_in[36] ) ( chip_controller la_data_in[36] ) + USE SIGNAL
- + ROUTED met2 ( 1267530 2380 0 ) ( * 14620 )
- NEW met2 ( 1265690 14620 ) ( 1267530 * )
- NEW met3 ( 599380 2013140 0 ) ( 608810 * )
- NEW met2 ( 608810 2008210 ) ( * 2013140 )
+ + ROUTED met2 ( 1267530 2380 0 ) ( * 13940 )
+ NEW met2 ( 1265690 13940 ) ( 1267530 * )
+ NEW met3 ( 599380 2495940 0 ) ( 607430 * )
+ NEW met2 ( 607430 2493220 ) ( * 2495940 )
+ NEW met2 ( 606970 2493220 ) ( 607430 * )
+ NEW met2 ( 606970 2491860 ) ( * 2493220 )
+ NEW met2 ( 606970 2491860 ) ( 607430 * )
+ NEW met2 ( 607430 2491350 ) ( * 2491860 )
NEW met2 ( 1262930 82800 ) ( 1265690 * )
- NEW met2 ( 1265690 14620 ) ( * 82800 )
- NEW met2 ( 1262930 82800 ) ( * 2008210 )
- NEW met1 ( 608810 2008210 ) ( 1262930 * )
- NEW met2 ( 608810 2013140 ) M2M3_PR_M
- NEW met1 ( 608810 2008210 ) M1M2_PR
- NEW met1 ( 1262930 2008210 ) M1M2_PR ;
+ NEW met2 ( 1265690 13940 ) ( * 82800 )
+ NEW met2 ( 1262930 82800 ) ( * 2491350 )
+ NEW met1 ( 607430 2491350 ) ( 1262930 * )
+ NEW met2 ( 607430 2495940 ) M2M3_PR_M
+ NEW met1 ( 607430 2491350 ) M1M2_PR
+ NEW met1 ( 1262930 2491350 ) M1M2_PR ;
- la_data_in[37] ( PIN la_data_in[37] ) ( chip_controller la_data_in[37] ) + USE SIGNAL
- + ROUTED met2 ( 1285470 2380 0 ) ( * 16830 )
- NEW met1 ( 1279950 16830 ) ( 1285470 * )
- NEW met2 ( 399050 2199460 0 ) ( * 2202010 )
- NEW met2 ( 1279950 16830 ) ( * 2202010 )
- NEW met1 ( 399050 2202010 ) ( 1279950 * )
- NEW met1 ( 1285470 16830 ) M1M2_PR
- NEW met1 ( 1279950 16830 ) M1M2_PR
- NEW met1 ( 399050 2202010 ) M1M2_PR
- NEW met1 ( 1279950 2202010 ) M1M2_PR ;
+ + ROUTED met2 ( 411010 2699260 0 ) ( 412390 * )
+ NEW met2 ( 412390 2699260 ) ( * 2709290 )
+ NEW met2 ( 1285470 2380 0 ) ( * 16490 )
+ NEW met1 ( 1255570 16490 ) ( 1285470 * )
+ NEW li1 ( 1255570 16490 ) ( * 19890 )
+ NEW met2 ( 872850 19890 ) ( * 2709290 )
+ NEW met1 ( 872850 19890 ) ( 1255570 * )
+ NEW met1 ( 412390 2709290 ) ( 872850 * )
+ NEW met1 ( 412390 2709290 ) M1M2_PR
+ NEW met1 ( 872850 19890 ) M1M2_PR
+ NEW met1 ( 872850 2709290 ) M1M2_PR
+ NEW met1 ( 1285470 16490 ) M1M2_PR
+ NEW li1 ( 1255570 16490 ) L1M1_PR_MR
+ NEW li1 ( 1255570 19890 ) L1M1_PR_MR ;
- la_data_in[38] ( PIN la_data_in[38] ) ( chip_controller la_data_in[38] ) + USE SIGNAL
- + ROUTED met2 ( 402270 2199460 0 ) ( * 2208130 )
- NEW li1 ( 568790 2198610 ) ( * 2199630 )
- NEW met1 ( 568790 2198610 ) ( 594090 * )
- NEW li1 ( 594090 2198610 ) ( * 2200310 )
- NEW met1 ( 594090 2200310 ) ( 607430 * )
- NEW li1 ( 607430 2199970 ) ( * 2200310 )
- NEW li1 ( 607430 2199970 ) ( 612030 * )
- NEW li1 ( 612030 2198610 ) ( * 2199970 )
- NEW met2 ( 568790 2199630 ) ( * 2208130 )
- NEW met1 ( 402270 2208130 ) ( 568790 * )
- NEW met2 ( 1303410 2380 0 ) ( * 17340 )
- NEW met2 ( 1300190 17340 ) ( 1303410 * )
- NEW met2 ( 1297430 82800 ) ( 1300190 * )
- NEW met2 ( 1300190 17340 ) ( * 82800 )
- NEW met1 ( 612030 2198610 ) ( 1297430 * )
- NEW met2 ( 1297430 82800 ) ( * 2198610 )
- NEW met1 ( 402270 2208130 ) M1M2_PR
- NEW met1 ( 568790 2208130 ) M1M2_PR
- NEW li1 ( 568790 2199630 ) L1M1_PR_MR
- NEW met1 ( 568790 2199630 ) M1M2_PR
- NEW li1 ( 568790 2198610 ) L1M1_PR_MR
- NEW li1 ( 594090 2198610 ) L1M1_PR_MR
- NEW li1 ( 594090 2200310 ) L1M1_PR_MR
- NEW li1 ( 607430 2200310 ) L1M1_PR_MR
- NEW li1 ( 612030 2198610 ) L1M1_PR_MR
- NEW met1 ( 1297430 2198610 ) M1M2_PR
- NEW met1 ( 568790 2199630 ) RECT ( -355 -70 0 70 ) ;
+ + ROUTED met2 ( 418830 2284460 ) ( 419750 * )
+ NEW met2 ( 419750 2284460 ) ( * 2300100 )
+ NEW met2 ( 419750 2300100 ) ( 420670 * 0 )
+ NEW met2 ( 418830 23630 ) ( * 2284460 )
+ NEW met2 ( 1303410 2380 0 ) ( * 23630 )
+ NEW met1 ( 418830 23630 ) ( 1303410 * )
+ NEW met1 ( 418830 23630 ) M1M2_PR
+ NEW met1 ( 1303410 23630 ) M1M2_PR ;
- la_data_in[39] ( PIN la_data_in[39] ) ( chip_controller la_data_in[39] ) + USE SIGNAL
- + ROUTED met2 ( 188830 2015010 ) ( * 2020620 )
- NEW met3 ( 188830 2020620 ) ( 200100 * 0 )
- NEW met1 ( 175030 2015010 ) ( 188830 * )
- NEW met2 ( 1318130 82800 ) ( 1320890 * )
- NEW met2 ( 1320890 2380 0 ) ( * 82800 )
- NEW met1 ( 175030 1779050 ) ( 1318130 * )
- NEW met2 ( 1318130 82800 ) ( * 1779050 )
- NEW met2 ( 175030 1779050 ) ( * 2015010 )
- NEW met1 ( 188830 2015010 ) M1M2_PR
- NEW met2 ( 188830 2020620 ) M2M3_PR_M
- NEW met1 ( 175030 2015010 ) M1M2_PR
- NEW met1 ( 175030 1779050 ) M1M2_PR
- NEW met1 ( 1318130 1779050 ) M1M2_PR ;
+ + ROUTED met2 ( 414690 2699260 0 ) ( 416070 * )
+ NEW met2 ( 416070 2699260 ) ( * 2704870 )
+ NEW met2 ( 1320890 2380 0 ) ( * 15810 )
+ NEW met1 ( 1294210 15810 ) ( 1320890 * )
+ NEW li1 ( 1294210 15810 ) ( * 18870 )
+ NEW met1 ( 652050 18870 ) ( 1294210 * )
+ NEW met2 ( 652050 18870 ) ( * 2704870 )
+ NEW met1 ( 416070 2704870 ) ( 652050 * )
+ NEW met1 ( 416070 2704870 ) M1M2_PR
+ NEW met1 ( 652050 18870 ) M1M2_PR
+ NEW met1 ( 652050 2704870 ) M1M2_PR
+ NEW met1 ( 1320890 15810 ) M1M2_PR
+ NEW li1 ( 1294210 15810 ) L1M1_PR_MR
+ NEW li1 ( 1294210 18870 ) L1M1_PR_MR ;
- la_data_in[3] ( PIN la_data_in[3] ) ( chip_controller la_data_in[3] ) + USE SIGNAL
- + ROUTED met2 ( 682410 2380 0 ) ( * 31110 )
- NEW met1 ( 234370 31110 ) ( 682410 * )
- NEW met1 ( 229310 1787210 ) ( 234370 * )
- NEW met2 ( 229310 1787210 ) ( * 1800300 0 )
- NEW met2 ( 234370 31110 ) ( * 1787210 )
- NEW met1 ( 682410 31110 ) M1M2_PR
- NEW met1 ( 234370 31110 ) M1M2_PR
- NEW met1 ( 234370 1787210 ) M1M2_PR
- NEW met1 ( 229310 1787210 ) M1M2_PR ;
+ + ROUTED met2 ( 682410 2380 0 ) ( * 27370 )
+ NEW met1 ( 241270 27370 ) ( 682410 * )
+ NEW met2 ( 240350 2278340 ) ( 241270 * )
+ NEW met2 ( 240350 2278340 ) ( * 2300100 )
+ NEW met2 ( 239430 2300100 0 ) ( 240350 * )
+ NEW met2 ( 241270 27370 ) ( * 2278340 )
+ NEW met1 ( 682410 27370 ) M1M2_PR
+ NEW met1 ( 241270 27370 ) M1M2_PR ;
- la_data_in[40] ( PIN la_data_in[40] ) ( chip_controller la_data_in[40] ) + USE SIGNAL
- + ROUTED met2 ( 408710 2199460 0 ) ( * 2208810 )
- NEW met2 ( 496570 2204390 ) ( * 2208810 )
- NEW met2 ( 1338830 2380 0 ) ( * 2204390 )
- NEW met1 ( 408710 2208810 ) ( 496570 * )
- NEW met1 ( 496570 2204390 ) ( 1338830 * )
- NEW met1 ( 408710 2208810 ) M1M2_PR
- NEW met1 ( 496570 2208810 ) M1M2_PR
- NEW met1 ( 496570 2204390 ) M1M2_PR
- NEW met1 ( 1338830 2204390 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2502060 0 ) ( 607430 * )
+ NEW met2 ( 607430 2499170 ) ( * 2502060 )
+ NEW met2 ( 1338830 2380 0 ) ( * 17340 )
+ NEW met2 ( 1338830 17340 ) ( 1339290 * )
+ NEW met2 ( 1339290 17340 ) ( * 86870 )
+ NEW met1 ( 607430 2499170 ) ( 1232110 * )
+ NEW met1 ( 1232110 86870 ) ( 1339290 * )
+ NEW met2 ( 1232110 86870 ) ( * 2499170 )
+ NEW met2 ( 607430 2502060 ) M2M3_PR_M
+ NEW met1 ( 607430 2499170 ) M1M2_PR
+ NEW met1 ( 1339290 86870 ) M1M2_PR
+ NEW met1 ( 1232110 86870 ) M1M2_PR
+ NEW met1 ( 1232110 2499170 ) M1M2_PR ;
- la_data_in[41] ( PIN la_data_in[41] ) ( chip_controller la_data_in[41] ) + USE SIGNAL
- + ROUTED met2 ( 188370 2022150 ) ( * 2027420 )
- NEW met3 ( 188370 2027420 ) ( 200100 * 0 )
+ + ROUTED met3 ( 599380 2504780 0 ) ( 607430 * )
+ NEW met2 ( 607430 2504780 ) ( * 2504950 )
NEW met2 ( 1356310 2380 0 ) ( * 3060 )
NEW met2 ( 1355390 3060 ) ( 1356310 * )
NEW met2 ( 1355390 2380 ) ( * 3060 )
NEW met2 ( 1354010 2380 ) ( 1355390 * )
+ NEW met2 ( 1253270 180370 ) ( * 2504950 )
NEW met2 ( 1352630 82800 ) ( 1354010 * )
NEW met2 ( 1354010 2380 ) ( * 82800 )
- NEW met2 ( 1352630 82800 ) ( * 1772590 )
- NEW met1 ( 175950 2022150 ) ( 188370 * )
- NEW met1 ( 175950 1772590 ) ( 1352630 * )
- NEW met2 ( 175950 1772590 ) ( * 2022150 )
- NEW met1 ( 188370 2022150 ) M1M2_PR
- NEW met2 ( 188370 2027420 ) M2M3_PR_M
- NEW met1 ( 1352630 1772590 ) M1M2_PR
- NEW met1 ( 175950 1772590 ) M1M2_PR
- NEW met1 ( 175950 2022150 ) M1M2_PR ;
+ NEW met2 ( 1352630 82800 ) ( * 180370 )
+ NEW met1 ( 607430 2504950 ) ( 1253270 * )
+ NEW met1 ( 1253270 180370 ) ( 1352630 * )
+ NEW met2 ( 607430 2504780 ) M2M3_PR_M
+ NEW met1 ( 607430 2504950 ) M1M2_PR
+ NEW met1 ( 1253270 180370 ) M1M2_PR
+ NEW met1 ( 1253270 2504950 ) M1M2_PR
+ NEW met1 ( 1352630 180370 ) M1M2_PR ;
- la_data_in[42] ( PIN la_data_in[42] ) ( chip_controller la_data_in[42] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2020620 0 ) ( 608350 * )
- NEW met2 ( 608350 2015010 ) ( * 2020620 )
- NEW met2 ( 1373330 82800 ) ( 1374250 * )
- NEW met2 ( 1374250 2380 0 ) ( * 82800 )
- NEW met2 ( 1373330 82800 ) ( * 2015010 )
- NEW met1 ( 608350 2015010 ) ( 1373330 * )
- NEW met2 ( 608350 2020620 ) M2M3_PR_M
- NEW met1 ( 608350 2015010 ) M1M2_PR
- NEW met1 ( 1373330 2015010 ) M1M2_PR ;
+ + ROUTED met2 ( 1374250 2380 0 ) ( * 27030 )
+ NEW met1 ( 434470 27030 ) ( 1374250 * )
+ NEW met2 ( 434470 2283100 ) ( 434930 * )
+ NEW met2 ( 434930 2283100 ) ( * 2284290 )
+ NEW met1 ( 429410 2284290 ) ( 434930 * )
+ NEW met2 ( 429410 2284290 ) ( * 2300100 0 )
+ NEW met2 ( 434470 27030 ) ( * 2283100 )
+ NEW met1 ( 1374250 27030 ) M1M2_PR
+ NEW met1 ( 434470 27030 ) M1M2_PR
+ NEW met1 ( 434930 2284290 ) M1M2_PR
+ NEW met1 ( 429410 2284290 ) M1M2_PR ;
- la_data_in[43] ( PIN la_data_in[43] ) ( chip_controller la_data_in[43] ) + USE SIGNAL
- + ROUTED met2 ( 188830 2028610 ) ( * 2032180 )
- NEW met3 ( 188830 2032180 ) ( 200100 * 0 )
- NEW met1 ( 175490 2028610 ) ( 188830 * )
- NEW met2 ( 1391730 2380 0 ) ( * 17340 )
- NEW met2 ( 1389890 17340 ) ( 1391730 * )
- NEW met2 ( 1387130 82800 ) ( 1389890 * )
- NEW met2 ( 1389890 17340 ) ( * 82800 )
- NEW met1 ( 175490 1780070 ) ( 1387130 * )
- NEW met2 ( 1387130 82800 ) ( * 1780070 )
- NEW met2 ( 175490 1780070 ) ( * 2028610 )
- NEW met1 ( 188830 2028610 ) M1M2_PR
- NEW met2 ( 188830 2032180 ) M2M3_PR_M
- NEW met1 ( 175490 2028610 ) M1M2_PR
- NEW met1 ( 175490 1780070 ) M1M2_PR
- NEW met1 ( 1387130 1780070 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2508180 0 ) ( 607890 * )
+ NEW met2 ( 607890 2506310 ) ( * 2508180 )
+ NEW met1 ( 607890 2506310 ) ( 742670 * )
+ NEW met2 ( 742670 173910 ) ( * 2506310 )
+ NEW met2 ( 1387130 82800 ) ( 1391730 * )
+ NEW met2 ( 1391730 2380 0 ) ( * 82800 )
+ NEW met1 ( 742670 173910 ) ( 1387130 * )
+ NEW met2 ( 1387130 82800 ) ( * 173910 )
+ NEW met2 ( 607890 2508180 ) M2M3_PR_M
+ NEW met1 ( 607890 2506310 ) M1M2_PR
+ NEW met1 ( 742670 2506310 ) M1M2_PR
+ NEW met1 ( 742670 173910 ) M1M2_PR
+ NEW met1 ( 1387130 173910 ) M1M2_PR ;
- la_data_in[44] ( PIN la_data_in[44] ) ( chip_controller la_data_in[44] ) + USE SIGNAL
- + ROUTED met2 ( 188830 2035580 ) ( * 2035750 )
- NEW met3 ( 188830 2035580 ) ( 200100 * 0 )
- NEW met1 ( 176410 2035750 ) ( 188830 * )
- NEW met2 ( 1409670 2380 0 ) ( * 3060 )
- NEW met2 ( 1408750 3060 ) ( 1409670 * )
- NEW met2 ( 1408750 2380 ) ( * 3060 )
- NEW met2 ( 1407830 2380 ) ( 1408750 * )
- NEW met1 ( 176410 1772250 ) ( 1407830 * )
- NEW met2 ( 1407830 2380 ) ( * 1772250 )
- NEW met2 ( 176410 1772250 ) ( * 2035750 )
- NEW met1 ( 188830 2035750 ) M1M2_PR
- NEW met2 ( 188830 2035580 ) M2M3_PR_M
- NEW met1 ( 176410 1772250 ) M1M2_PR
- NEW met1 ( 176410 2035750 ) M1M2_PR
- NEW met1 ( 1407830 1772250 ) M1M2_PR ;
+ + ROUTED met2 ( 1409670 2380 0 ) ( * 26690 )
+ NEW met1 ( 434010 26690 ) ( 1409670 * )
+ NEW met2 ( 432630 2300100 0 ) ( 434010 * )
+ NEW met2 ( 434010 26690 ) ( * 2300100 )
+ NEW met1 ( 434010 26690 ) M1M2_PR
+ NEW met1 ( 1409670 26690 ) M1M2_PR ;
- la_data_in[45] ( PIN la_data_in[45] ) ( chip_controller la_data_in[45] ) + USE SIGNAL
- + ROUTED met1 ( 415150 1788570 ) ( 420210 * )
- NEW met2 ( 415150 1788570 ) ( * 1800300 0 )
- NEW met2 ( 420210 33830 ) ( * 1788570 )
- NEW met2 ( 1427150 2380 0 ) ( * 33830 )
- NEW met1 ( 420210 33830 ) ( 1427150 * )
- NEW met1 ( 420210 33830 ) M1M2_PR
- NEW met1 ( 420210 1788570 ) M1M2_PR
- NEW met1 ( 415150 1788570 ) M1M2_PR
- NEW met1 ( 1427150 33830 ) M1M2_PR ;
+ + ROUTED met2 ( 879750 19210 ) ( * 2709630 )
+ NEW met2 ( 428490 2699260 0 ) ( 429870 * )
+ NEW met2 ( 429870 2699260 ) ( * 2709630 )
+ NEW met2 ( 1427150 2380 0 ) ( * 19210 )
+ NEW met1 ( 879750 19210 ) ( 1427150 * )
+ NEW met1 ( 429870 2709630 ) ( 879750 * )
+ NEW met1 ( 879750 19210 ) M1M2_PR
+ NEW met1 ( 879750 2709630 ) M1M2_PR
+ NEW met1 ( 429870 2709630 ) M1M2_PR
+ NEW met1 ( 1427150 19210 ) M1M2_PR ;
- la_data_in[46] ( PIN la_data_in[46] ) ( chip_controller la_data_in[46] ) + USE SIGNAL
- + ROUTED met2 ( 1445090 2380 0 ) ( * 33490 )
- NEW met2 ( 419290 1800300 0 ) ( 420670 * )
- NEW met2 ( 420670 33490 ) ( * 1800300 )
- NEW met1 ( 420670 33490 ) ( 1445090 * )
- NEW met1 ( 420670 33490 ) M1M2_PR
- NEW met1 ( 1445090 33490 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2519060 0 ) ( 607430 * )
+ NEW met2 ( 607430 2518890 ) ( * 2519060 )
+ NEW met2 ( 797410 167790 ) ( * 2518890 )
+ NEW met2 ( 1442330 82800 ) ( 1445090 * )
+ NEW met2 ( 1445090 2380 0 ) ( * 82800 )
+ NEW met2 ( 1442330 82800 ) ( * 167790 )
+ NEW met1 ( 607430 2518890 ) ( 797410 * )
+ NEW met1 ( 797410 167790 ) ( 1442330 * )
+ NEW met2 ( 607430 2519060 ) M2M3_PR_M
+ NEW met1 ( 607430 2518890 ) M1M2_PR
+ NEW met1 ( 797410 2518890 ) M1M2_PR
+ NEW met1 ( 797410 167790 ) M1M2_PR
+ NEW met1 ( 1442330 167790 ) M1M2_PR ;
- la_data_in[47] ( PIN la_data_in[47] ) ( chip_controller la_data_in[47] ) + USE SIGNAL
- + ROUTED met2 ( 1463030 2380 0 ) ( * 27370 )
- NEW met1 ( 438610 27370 ) ( 1463030 * )
- NEW met1 ( 423430 1789250 ) ( 438610 * )
- NEW met2 ( 423430 1789250 ) ( * 1800300 0 )
- NEW met2 ( 438610 27370 ) ( * 1789250 )
- NEW met1 ( 1463030 27370 ) M1M2_PR
- NEW met1 ( 438610 27370 ) M1M2_PR
- NEW met1 ( 438610 1789250 ) M1M2_PR
- NEW met1 ( 423430 1789250 ) M1M2_PR ;
+ + ROUTED met2 ( 190210 2512430 ) ( * 2518380 )
+ NEW met3 ( 190210 2518380 ) ( 199180 * )
+ NEW met3 ( 199180 2518380 ) ( * 2519060 )
+ NEW met3 ( 199180 2519060 ) ( 200100 * )
+ NEW met3 ( 200100 2518380 0 ) ( * 2519060 )
+ NEW met2 ( 1463030 2380 0 ) ( * 60350 )
+ NEW met1 ( 163990 2512430 ) ( 190210 * )
+ NEW met1 ( 163990 60350 ) ( 1463030 * )
+ NEW met2 ( 163990 60350 ) ( * 2512430 )
+ NEW met1 ( 190210 2512430 ) M1M2_PR
+ NEW met2 ( 190210 2518380 ) M2M3_PR_M
+ NEW met1 ( 1463030 60350 ) M1M2_PR
+ NEW met1 ( 163990 2512430 ) M1M2_PR
+ NEW met1 ( 163990 60350 ) M1M2_PR ;
- la_data_in[48] ( PIN la_data_in[48] ) ( chip_controller la_data_in[48] ) + USE SIGNAL
- + ROUTED met1 ( 182390 2036090 ) ( 192970 * )
- NEW met2 ( 192970 2036090 ) ( * 2042380 )
- NEW met3 ( 192970 2042380 ) ( 200100 * 0 )
- NEW met2 ( 1480510 2380 0 ) ( * 3060 )
- NEW met2 ( 1479590 3060 ) ( 1480510 * )
- NEW met2 ( 1479590 2380 ) ( * 3060 )
- NEW met2 ( 1478210 2380 ) ( 1479590 * )
- NEW met2 ( 1476830 82800 ) ( 1478210 * )
- NEW met2 ( 1478210 2380 ) ( * 82800 )
- NEW met2 ( 1476830 82800 ) ( * 1779390 )
- NEW met1 ( 182390 1779390 ) ( 1476830 * )
- NEW met2 ( 182390 1779390 ) ( * 2036090 )
- NEW met1 ( 182390 2036090 ) M1M2_PR
- NEW met1 ( 192970 2036090 ) M1M2_PR
- NEW met2 ( 192970 2042380 ) M2M3_PR_M
- NEW met1 ( 182390 1779390 ) M1M2_PR
- NEW met1 ( 1476830 1779390 ) M1M2_PR ;
+ + ROUTED met2 ( 1480510 2380 0 ) ( * 26010 )
+ NEW met1 ( 441370 26010 ) ( 1480510 * )
+ NEW met1 ( 439530 2283950 ) ( 441370 * )
+ NEW met2 ( 439530 2283950 ) ( * 2300100 0 )
+ NEW met2 ( 441370 26010 ) ( * 2283950 )
+ NEW met1 ( 1480510 26010 ) M1M2_PR
+ NEW met1 ( 441370 26010 ) M1M2_PR
+ NEW met1 ( 441370 2283950 ) M1M2_PR
+ NEW met1 ( 439530 2283950 ) M1M2_PR ;
- la_data_in[49] ( PIN la_data_in[49] ) ( chip_controller la_data_in[49] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2032860 0 ) ( 608350 * )
- NEW met2 ( 608350 2028610 ) ( * 2032860 )
- NEW met1 ( 608350 2028610 ) ( 1497530 * )
- NEW met2 ( 1497530 82800 ) ( 1498450 * )
- NEW met2 ( 1498450 2380 0 ) ( * 82800 )
- NEW met2 ( 1497530 82800 ) ( * 2028610 )
- NEW met2 ( 608350 2032860 ) M2M3_PR_M
- NEW met1 ( 608350 2028610 ) M1M2_PR
- NEW met1 ( 1497530 2028610 ) M1M2_PR ;
+ + ROUTED met2 ( 1280410 16150 ) ( * 2709460 )
+ NEW met2 ( 440910 2699260 0 ) ( 441370 * )
+ NEW met2 ( 441370 2699260 ) ( * 2709460 )
+ NEW met2 ( 1498450 2380 0 ) ( * 16150 )
+ NEW met1 ( 1280410 16150 ) ( 1498450 * )
+ NEW met3 ( 441370 2709460 ) ( 1280410 * )
+ NEW met1 ( 1280410 16150 ) M1M2_PR
+ NEW met2 ( 1280410 2709460 ) M2M3_PR_M
+ NEW met2 ( 441370 2709460 ) M2M3_PR_M
+ NEW met1 ( 1498450 16150 ) M1M2_PR ;
- la_data_in[4] ( PIN la_data_in[4] ) ( chip_controller la_data_in[4] ) + USE SIGNAL
+ ROUTED met2 ( 700350 2380 0 ) ( * 3060 )
NEW met2 ( 699430 3060 ) ( 700350 * )
NEW met2 ( 699430 2380 ) ( * 3060 )
NEW met2 ( 698050 2380 ) ( 699430 * )
- NEW met2 ( 286810 486370 ) ( * 1792310 )
NEW met2 ( 697130 82800 ) ( 698050 * )
NEW met2 ( 698050 2380 ) ( * 82800 )
- NEW met2 ( 697130 82800 ) ( * 486370 )
- NEW met1 ( 286810 486370 ) ( 697130 * )
- NEW met2 ( 233450 1792310 ) ( * 1800300 0 )
- NEW met1 ( 233450 1792310 ) ( 286810 * )
- NEW met1 ( 286810 486370 ) M1M2_PR
- NEW met1 ( 697130 486370 ) M1M2_PR
- NEW met1 ( 286810 1792310 ) M1M2_PR
- NEW met1 ( 233450 1792310 ) M1M2_PR ;
+ NEW met2 ( 697130 82800 ) ( * 2291770 )
+ NEW met3 ( 200100 2329340 0 ) ( * 2330020 )
+ NEW met3 ( 186530 2330020 ) ( 200100 * )
+ NEW met2 ( 185610 2330020 ) ( 186530 * )
+ NEW met2 ( 185610 2291770 ) ( * 2330020 )
+ NEW met1 ( 185610 2291770 ) ( 697130 * )
+ NEW met1 ( 697130 2291770 ) M1M2_PR
+ NEW met2 ( 186530 2330020 ) M2M3_PR_M
+ NEW met1 ( 185610 2291770 ) M1M2_PR ;
- la_data_in[50] ( PIN la_data_in[50] ) ( chip_controller la_data_in[50] ) + USE SIGNAL
- + ROUTED met2 ( 188370 2042550 ) ( * 2049180 )
- NEW met3 ( 188370 2049180 ) ( 200100 * 0 )
- NEW met1 ( 176870 2042550 ) ( 188370 * )
- NEW met1 ( 176870 1771910 ) ( 1511330 * )
- NEW met2 ( 1511330 82800 ) ( 1515930 * )
- NEW met2 ( 1515930 2380 0 ) ( * 82800 )
- NEW met2 ( 1511330 82800 ) ( * 1771910 )
- NEW met2 ( 176870 1771910 ) ( * 2042550 )
- NEW met1 ( 188370 2042550 ) M1M2_PR
- NEW met2 ( 188370 2049180 ) M2M3_PR_M
- NEW met1 ( 176870 1771910 ) M1M2_PR
- NEW met1 ( 176870 2042550 ) M1M2_PR
- NEW met1 ( 1511330 1771910 ) M1M2_PR ;
+ + ROUTED met2 ( 1515930 2380 0 ) ( * 25330 )
+ NEW met1 ( 448270 25330 ) ( 1515930 * )
+ NEW met1 ( 442750 2284290 ) ( 448270 * )
+ NEW met2 ( 442750 2284290 ) ( * 2300100 0 )
+ NEW met2 ( 448270 25330 ) ( * 2284290 )
+ NEW met1 ( 448270 25330 ) M1M2_PR
+ NEW met1 ( 1515930 25330 ) M1M2_PR
+ NEW met1 ( 448270 2284290 ) M1M2_PR
+ NEW met1 ( 442750 2284290 ) M1M2_PR ;
- la_data_in[51] ( PIN la_data_in[51] ) ( chip_controller la_data_in[51] ) + USE SIGNAL
+ ROUTED met2 ( 1533870 2380 0 ) ( * 3060 )
NEW met2 ( 1532950 3060 ) ( 1533870 * )
NEW met2 ( 1532950 2380 ) ( * 3060 )
NEW met2 ( 1532030 2380 ) ( 1532950 * )
- NEW met2 ( 1532030 2380 ) ( * 1773270 )
- NEW met1 ( 439070 1773270 ) ( 1532030 * )
- NEW met1 ( 431250 1787210 ) ( 439070 * )
- NEW met2 ( 431250 1787210 ) ( * 1800300 0 )
- NEW met2 ( 439070 1773270 ) ( * 1787210 )
- NEW met1 ( 1532030 1773270 ) M1M2_PR
- NEW met1 ( 439070 1773270 ) M1M2_PR
- NEW met1 ( 439070 1787210 ) M1M2_PR
- NEW met1 ( 431250 1787210 ) M1M2_PR ;
+ NEW met2 ( 1532030 2380 ) ( * 181050 )
+ NEW met1 ( 466210 181050 ) ( 1532030 * )
+ NEW met1 ( 445970 2285310 ) ( 466210 * )
+ NEW met2 ( 445970 2285310 ) ( * 2300100 0 )
+ NEW met2 ( 466210 181050 ) ( * 2285310 )
+ NEW met1 ( 1532030 181050 ) M1M2_PR
+ NEW met1 ( 466210 181050 ) M1M2_PR
+ NEW met1 ( 466210 2285310 ) M1M2_PR
+ NEW met1 ( 445970 2285310 ) M1M2_PR ;
- la_data_in[52] ( PIN la_data_in[52] ) ( chip_controller la_data_in[52] ) + USE SIGNAL
+ ROUTED met2 ( 1551350 2380 0 ) ( * 3060 )
NEW met2 ( 1550430 3060 ) ( 1551350 * )
@@ -10173,1213 +13227,1294 @@
NEW met2 ( 1549050 2380 ) ( 1550430 * )
NEW met2 ( 1545830 82800 ) ( 1549050 * )
NEW met2 ( 1549050 2380 ) ( * 82800 )
- NEW met2 ( 1545830 82800 ) ( * 1772930 )
- NEW met1 ( 441370 1772930 ) ( 1545830 * )
- NEW met1 ( 437690 1788570 ) ( 441370 * )
- NEW met2 ( 437690 1788570 ) ( * 1800300 0 )
- NEW met2 ( 441370 1772930 ) ( * 1788570 )
- NEW met1 ( 1545830 1772930 ) M1M2_PR
- NEW met1 ( 441370 1772930 ) M1M2_PR
- NEW met1 ( 441370 1788570 ) M1M2_PR
- NEW met1 ( 437690 1788570 ) M1M2_PR ;
+ NEW met2 ( 1545830 82800 ) ( * 181390 )
+ NEW met1 ( 454710 181390 ) ( 1545830 * )
+ NEW met2 ( 453790 2278340 ) ( 454710 * )
+ NEW met2 ( 453790 2278340 ) ( * 2300100 )
+ NEW met2 ( 452870 2300100 0 ) ( 453790 * )
+ NEW met2 ( 454710 181390 ) ( * 2278340 )
+ NEW met1 ( 1545830 181390 ) M1M2_PR
+ NEW met1 ( 454710 181390 ) M1M2_PR ;
- la_data_in[53] ( PIN la_data_in[53] ) ( chip_controller la_data_in[53] ) + USE SIGNAL
- + ROUTED met2 ( 1569290 2380 0 ) ( * 14450 )
- NEW met1 ( 1494310 14450 ) ( 1569290 * )
- NEW met2 ( 429870 2199460 0 ) ( * 2202180 )
- NEW met3 ( 429870 2202180 ) ( 1494310 * )
- NEW met2 ( 1494310 14450 ) ( * 2202180 )
- NEW met1 ( 1569290 14450 ) M1M2_PR
- NEW met1 ( 1494310 14450 ) M1M2_PR
- NEW met2 ( 429870 2202180 ) M2M3_PR_M
- NEW met2 ( 1494310 2202180 ) M2M3_PR_M ;
+ + ROUTED met3 ( 599380 2534700 0 ) ( 607890 * )
+ NEW met2 ( 607890 2532830 ) ( * 2534700 )
+ NEW met2 ( 894470 174250 ) ( * 2532830 )
+ NEW met2 ( 1566530 82800 ) ( 1569290 * )
+ NEW met2 ( 1569290 2380 0 ) ( * 82800 )
+ NEW met2 ( 1566530 82800 ) ( * 174250 )
+ NEW met1 ( 607890 2532830 ) ( 894470 * )
+ NEW met1 ( 894470 174250 ) ( 1566530 * )
+ NEW met2 ( 607890 2534700 ) M2M3_PR_M
+ NEW met1 ( 607890 2532830 ) M1M2_PR
+ NEW met1 ( 894470 2532830 ) M1M2_PR
+ NEW met1 ( 894470 174250 ) M1M2_PR
+ NEW met1 ( 1566530 174250 ) M1M2_PR ;
- la_data_in[54] ( PIN la_data_in[54] ) ( chip_controller la_data_in[54] ) + USE SIGNAL
- + ROUTED met2 ( 1586770 2380 0 ) ( * 14110 )
- NEW met1 ( 1501670 14110 ) ( 1586770 * )
- NEW li1 ( 434010 2192150 ) ( * 2199630 )
- NEW met2 ( 434010 2199460 ) ( * 2199630 )
- NEW met2 ( 433090 2199460 0 ) ( 434010 * )
- NEW met1 ( 434010 2192150 ) ( 1501670 * )
- NEW met2 ( 1501670 14110 ) ( * 2192150 )
- NEW met1 ( 1501670 14110 ) M1M2_PR
- NEW met1 ( 1586770 14110 ) M1M2_PR
- NEW li1 ( 434010 2192150 ) L1M1_PR_MR
- NEW li1 ( 434010 2199630 ) L1M1_PR_MR
- NEW met1 ( 434010 2199630 ) M1M2_PR
- NEW met1 ( 1501670 2192150 ) M1M2_PR
- NEW met1 ( 434010 2199630 ) RECT ( -355 -70 0 70 ) ;
+ + ROUTED met2 ( 452870 2699260 0 ) ( 454250 * )
+ NEW met2 ( 454250 2699260 ) ( * 2721530 )
+ NEW met1 ( 1293750 14450 ) ( 1333310 * )
+ NEW li1 ( 1333310 14450 ) ( * 16490 )
+ NEW met1 ( 454250 2721530 ) ( 1293750 * )
+ NEW met2 ( 1586770 2380 0 ) ( * 16490 )
+ NEW met1 ( 1333310 16490 ) ( 1586770 * )
+ NEW met2 ( 1293750 14450 ) ( * 2721530 )
+ NEW met1 ( 454250 2721530 ) M1M2_PR
+ NEW met1 ( 1293750 14450 ) M1M2_PR
+ NEW li1 ( 1333310 14450 ) L1M1_PR_MR
+ NEW li1 ( 1333310 16490 ) L1M1_PR_MR
+ NEW met1 ( 1293750 2721530 ) M1M2_PR
+ NEW met1 ( 1586770 16490 ) M1M2_PR ;
- la_data_in[55] ( PIN la_data_in[55] ) ( chip_controller la_data_in[55] ) + USE SIGNAL
- + ROUTED met2 ( 188830 2049350 ) ( * 2054620 )
- NEW met3 ( 188830 2054620 ) ( 200100 * 0 )
- NEW met1 ( 171350 2049350 ) ( 188830 * )
- NEW met2 ( 1604710 2380 0 ) ( * 3060 )
+ + ROUTED met2 ( 1604710 2380 0 ) ( * 3060 )
NEW met2 ( 1603790 3060 ) ( 1604710 * )
NEW met2 ( 1603790 2380 ) ( * 3060 )
NEW met2 ( 1602410 2380 ) ( 1603790 * )
- NEW met1 ( 171350 66470 ) ( 1602410 * )
- NEW met2 ( 1602410 2380 ) ( * 66470 )
- NEW met2 ( 171350 66470 ) ( * 2049350 )
- NEW met1 ( 188830 2049350 ) M1M2_PR
- NEW met2 ( 188830 2054620 ) M2M3_PR_M
- NEW met1 ( 171350 2049350 ) M1M2_PR
- NEW met1 ( 171350 66470 ) M1M2_PR
- NEW met1 ( 1602410 66470 ) M1M2_PR ;
+ NEW met2 ( 465750 168470 ) ( * 2256300 )
+ NEW met2 ( 465290 2256300 ) ( 465750 * )
+ NEW met2 ( 465290 2256300 ) ( * 2284290 )
+ NEW met1 ( 461150 2284290 ) ( 465290 * )
+ NEW met2 ( 461150 2284290 ) ( * 2300100 0 )
+ NEW met2 ( 1601030 82800 ) ( 1602410 * )
+ NEW met2 ( 1602410 2380 ) ( * 82800 )
+ NEW met1 ( 465750 168470 ) ( 1601030 * )
+ NEW met2 ( 1601030 82800 ) ( * 168470 )
+ NEW met1 ( 465750 168470 ) M1M2_PR
+ NEW met1 ( 465290 2284290 ) M1M2_PR
+ NEW met1 ( 461150 2284290 ) M1M2_PR
+ NEW met1 ( 1601030 168470 ) M1M2_PR ;
- la_data_in[56] ( PIN la_data_in[56] ) ( chip_controller la_data_in[56] ) + USE SIGNAL
- + ROUTED met2 ( 188830 2056660 ) ( * 2056830 )
- NEW met3 ( 188830 2056660 ) ( 200100 * 0 )
- NEW met1 ( 167210 2056830 ) ( 188830 * )
- NEW met2 ( 1622190 2380 0 ) ( * 24650 )
- NEW met1 ( 167210 24650 ) ( 1622190 * )
- NEW met2 ( 167210 24650 ) ( * 2056830 )
- NEW met1 ( 188830 2056830 ) M1M2_PR
- NEW met2 ( 188830 2056660 ) M2M3_PR_M
- NEW met1 ( 167210 24650 ) M1M2_PR
- NEW met1 ( 167210 2056830 ) M1M2_PR
- NEW met1 ( 1622190 24650 ) M1M2_PR ;
+ + ROUTED met1 ( 468970 129710 ) ( 1622190 * )
+ NEW met2 ( 467590 2284460 ) ( 468970 * )
+ NEW met2 ( 467590 2284460 ) ( * 2300100 )
+ NEW met2 ( 466210 2300100 0 ) ( 467590 * )
+ NEW met2 ( 468970 129710 ) ( * 2284460 )
+ NEW met2 ( 1622190 2380 0 ) ( * 129710 )
+ NEW met1 ( 468970 129710 ) M1M2_PR
+ NEW met1 ( 1622190 129710 ) M1M2_PR ;
- la_data_in[57] ( PIN la_data_in[57] ) ( chip_controller la_data_in[57] ) + USE SIGNAL
- + ROUTED met2 ( 187910 2056490 ) ( * 2061420 )
- NEW met3 ( 187910 2061420 ) ( 200100 * 0 )
+ + ROUTED met3 ( 599380 2536740 0 ) ( 609270 * )
+ NEW met2 ( 609270 2532490 ) ( * 2536740 )
+ NEW met2 ( 901370 168130 ) ( * 2532490 )
NEW met2 ( 1635530 82800 ) ( 1640130 * )
NEW met2 ( 1640130 2380 0 ) ( * 82800 )
- NEW met2 ( 1635530 82800 ) ( * 1765450 )
- NEW met1 ( 168590 2056490 ) ( 187910 * )
- NEW met1 ( 168590 1765450 ) ( 1635530 * )
- NEW met2 ( 168590 1765450 ) ( * 2056490 )
- NEW met1 ( 187910 2056490 ) M1M2_PR
- NEW met2 ( 187910 2061420 ) M2M3_PR_M
- NEW met1 ( 1635530 1765450 ) M1M2_PR
- NEW met1 ( 168590 1765450 ) M1M2_PR
- NEW met1 ( 168590 2056490 ) M1M2_PR ;
+ NEW met2 ( 1635530 82800 ) ( * 168130 )
+ NEW met1 ( 609270 2532490 ) ( 901370 * )
+ NEW met1 ( 901370 168130 ) ( 1635530 * )
+ NEW met2 ( 609270 2536740 ) M2M3_PR_M
+ NEW met1 ( 609270 2532490 ) M1M2_PR
+ NEW met1 ( 901370 2532490 ) M1M2_PR
+ NEW met1 ( 901370 168130 ) M1M2_PR
+ NEW met1 ( 1635530 168130 ) M1M2_PR ;
- la_data_in[58] ( PIN la_data_in[58] ) ( chip_controller la_data_in[58] ) + USE SIGNAL
- + ROUTED met2 ( 1658070 2380 0 ) ( * 15470 )
- NEW met1 ( 1494770 15470 ) ( 1658070 * )
- NEW li1 ( 443670 2194870 ) ( * 2199630 )
- NEW met2 ( 443670 2199460 ) ( * 2199630 )
- NEW met2 ( 442750 2199460 0 ) ( 443670 * )
- NEW met1 ( 443670 2194870 ) ( 1494770 * )
- NEW met2 ( 1494770 15470 ) ( * 2194870 )
- NEW met1 ( 1658070 15470 ) M1M2_PR
- NEW met1 ( 1494770 15470 ) M1M2_PR
- NEW li1 ( 443670 2194870 ) L1M1_PR_MR
- NEW li1 ( 443670 2199630 ) L1M1_PR_MR
- NEW met1 ( 443670 2199630 ) M1M2_PR
- NEW met1 ( 1494770 2194870 ) M1M2_PR
- NEW met1 ( 443670 2199630 ) RECT ( -355 -70 0 70 ) ;
+ + ROUTED met2 ( 1658070 2380 0 ) ( * 17510 )
+ NEW met2 ( 707710 17510 ) ( * 2695690 )
+ NEW li1 ( 462070 2695690 ) ( * 2699430 )
+ NEW met2 ( 462070 2699260 ) ( * 2699430 )
+ NEW met2 ( 461610 2699260 0 ) ( 462070 * )
+ NEW met1 ( 707710 17510 ) ( 1658070 * )
+ NEW met1 ( 462070 2695690 ) ( 707710 * )
+ NEW met1 ( 707710 17510 ) M1M2_PR
+ NEW met1 ( 707710 2695690 ) M1M2_PR
+ NEW met1 ( 1658070 17510 ) M1M2_PR
+ NEW li1 ( 462070 2695690 ) L1M1_PR_MR
+ NEW li1 ( 462070 2699430 ) L1M1_PR_MR
+ NEW met1 ( 462070 2699430 ) M1M2_PR
+ NEW met1 ( 462070 2699430 ) RECT ( -355 -70 0 70 ) ;
- la_data_in[59] ( PIN la_data_in[59] ) ( chip_controller la_data_in[59] ) + USE SIGNAL
+ ROUTED met2 ( 1675550 2380 0 ) ( * 3060 )
NEW met2 ( 1674630 3060 ) ( 1675550 * )
NEW met2 ( 1674630 2380 ) ( * 3060 )
NEW met2 ( 1673250 2380 ) ( 1674630 * )
- NEW met2 ( 188830 2063460 ) ( * 2063630 )
- NEW met3 ( 188830 2063460 ) ( 200100 * 0 )
+ NEW met2 ( 474030 2278340 ) ( 475870 * )
+ NEW met2 ( 474030 2278340 ) ( * 2300100 )
+ NEW met2 ( 473110 2300100 0 ) ( 474030 * )
+ NEW met2 ( 475870 175270 ) ( * 2278340 )
NEW met2 ( 1670030 82800 ) ( 1673250 * )
NEW met2 ( 1673250 2380 ) ( * 82800 )
- NEW met2 ( 1670030 82800 ) ( * 1771570 )
- NEW met1 ( 168130 1771570 ) ( 1670030 * )
- NEW met1 ( 168130 2063630 ) ( 188830 * )
- NEW met2 ( 168130 1771570 ) ( * 2063630 )
- NEW met1 ( 1670030 1771570 ) M1M2_PR
- NEW met1 ( 188830 2063630 ) M1M2_PR
- NEW met2 ( 188830 2063460 ) M2M3_PR_M
- NEW met1 ( 168130 1771570 ) M1M2_PR
- NEW met1 ( 168130 2063630 ) M1M2_PR ;
+ NEW met2 ( 1670030 82800 ) ( * 175270 )
+ NEW met1 ( 475870 175270 ) ( 1670030 * )
+ NEW met1 ( 475870 175270 ) M1M2_PR
+ NEW met1 ( 1670030 175270 ) M1M2_PR ;
- la_data_in[5] ( PIN la_data_in[5] ) ( chip_controller la_data_in[5] ) + USE SIGNAL
- + ROUTED met2 ( 717830 2380 0 ) ( * 17340 )
- NEW met2 ( 717830 17340 ) ( 718290 * )
- NEW met1 ( 241270 100130 ) ( 718290 * )
- NEW met2 ( 241270 100130 ) ( * 1773300 )
- NEW met2 ( 240810 1773300 ) ( 241270 * )
- NEW met2 ( 240810 1773300 ) ( * 1800300 )
- NEW met2 ( 239430 1800300 0 ) ( 240810 * )
- NEW met2 ( 718290 17340 ) ( * 100130 )
- NEW met1 ( 241270 100130 ) M1M2_PR
- NEW met1 ( 718290 100130 ) M1M2_PR ;
+ + ROUTED met2 ( 189290 2332230 ) ( * 2332740 )
+ NEW met3 ( 189290 2332740 ) ( 201020 * )
+ NEW met3 ( 201020 2332740 ) ( * 2333420 0 )
+ NEW met1 ( 179170 2332230 ) ( 189290 * )
+ NEW met2 ( 717830 2380 0 ) ( * 2292110 )
+ NEW met1 ( 178250 2312170 ) ( 179170 * )
+ NEW met2 ( 178250 2292110 ) ( * 2312170 )
+ NEW met2 ( 179170 2312170 ) ( * 2332230 )
+ NEW met1 ( 178250 2292110 ) ( 717830 * )
+ NEW met1 ( 189290 2332230 ) M1M2_PR
+ NEW met2 ( 189290 2332740 ) M2M3_PR_M
+ NEW met1 ( 179170 2332230 ) M1M2_PR
+ NEW met1 ( 717830 2292110 ) M1M2_PR
+ NEW met1 ( 179170 2312170 ) M1M2_PR
+ NEW met1 ( 178250 2312170 ) M1M2_PR
+ NEW met1 ( 178250 2292110 ) M1M2_PR ;
- la_data_in[60] ( PIN la_data_in[60] ) ( chip_controller la_data_in[60] ) + USE SIGNAL
- + ROUTED met2 ( 461610 1779730 ) ( * 1800300 0 )
- NEW met2 ( 1690730 82800 ) ( 1693490 * )
- NEW met2 ( 1693490 2380 0 ) ( * 82800 )
- NEW met1 ( 461610 1779730 ) ( 1690730 * )
- NEW met2 ( 1690730 82800 ) ( * 1779730 )
- NEW met1 ( 461610 1779730 ) M1M2_PR
- NEW met1 ( 1690730 1779730 ) M1M2_PR ;
+ + ROUTED met2 ( 672750 17170 ) ( * 2729180 )
+ NEW met2 ( 464830 2699260 0 ) ( 466210 * )
+ NEW met2 ( 466210 2699260 ) ( * 2729180 )
+ NEW met3 ( 466210 2729180 ) ( 672750 * )
+ NEW met2 ( 1693490 2380 0 ) ( * 17170 )
+ NEW met1 ( 672750 17170 ) ( 1693490 * )
+ NEW met1 ( 672750 17170 ) M1M2_PR
+ NEW met2 ( 672750 2729180 ) M2M3_PR_M
+ NEW met2 ( 466210 2729180 ) M2M3_PR_M
+ NEW met1 ( 1693490 17170 ) M1M2_PR ;
- la_data_in[61] ( PIN la_data_in[61] ) ( chip_controller la_data_in[61] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2051220 0 ) ( 608350 * )
- NEW met2 ( 608350 2049690 ) ( * 2051220 )
- NEW met1 ( 608350 2049690 ) ( 1045350 * )
- NEW met2 ( 1710970 2380 0 ) ( * 30430 )
- NEW met1 ( 1045350 30430 ) ( 1710970 * )
- NEW met2 ( 1045350 30430 ) ( * 2049690 )
- NEW met2 ( 608350 2051220 ) M2M3_PR_M
- NEW met1 ( 608350 2049690 ) M1M2_PR
- NEW met1 ( 1045350 30430 ) M1M2_PR
- NEW met1 ( 1045350 2049690 ) M1M2_PR
- NEW met1 ( 1710970 30430 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2548980 0 ) ( 607890 * )
+ NEW met2 ( 607890 2547450 ) ( * 2548980 )
+ NEW met2 ( 956110 161330 ) ( * 2547450 )
+ NEW met1 ( 607890 2547450 ) ( 956110 * )
+ NEW met1 ( 1704990 58310 ) ( 1710970 * )
+ NEW met2 ( 1710970 2380 0 ) ( * 58310 )
+ NEW met1 ( 956110 161330 ) ( 1704990 * )
+ NEW met2 ( 1704990 58310 ) ( * 161330 )
+ NEW met2 ( 607890 2548980 ) M2M3_PR_M
+ NEW met1 ( 607890 2547450 ) M1M2_PR
+ NEW met1 ( 956110 161330 ) M1M2_PR
+ NEW met1 ( 956110 2547450 ) M1M2_PR
+ NEW met1 ( 1704990 58310 ) M1M2_PR
+ NEW met1 ( 1710970 58310 ) M1M2_PR
+ NEW met1 ( 1704990 161330 ) M1M2_PR ;
- la_data_in[62] ( PIN la_data_in[62] ) ( chip_controller la_data_in[62] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2053940 0 ) ( 607890 * )
- NEW met2 ( 607890 2050030 ) ( * 2053940 )
- NEW met2 ( 1728910 2380 0 ) ( * 3060 )
+ + ROUTED met2 ( 1728910 2380 0 ) ( * 3060 )
NEW met2 ( 1727990 3060 ) ( 1728910 * )
NEW met2 ( 1727990 2380 ) ( * 3060 )
NEW met2 ( 1726610 2380 ) ( 1727990 * )
- NEW met2 ( 900910 293590 ) ( * 2050030 )
+ NEW met1 ( 473570 2283950 ) ( * 2284630 )
+ NEW met1 ( 473570 2284630 ) ( 478170 * )
+ NEW met2 ( 478170 2284630 ) ( * 2300100 0 )
NEW met2 ( 1725230 82800 ) ( 1726610 * )
NEW met2 ( 1726610 2380 ) ( * 82800 )
- NEW met2 ( 1725230 82800 ) ( * 293590 )
- NEW met1 ( 607890 2050030 ) ( 900910 * )
- NEW met1 ( 900910 293590 ) ( 1725230 * )
- NEW met2 ( 607890 2053940 ) M2M3_PR_M
- NEW met1 ( 607890 2050030 ) M1M2_PR
- NEW met1 ( 900910 293590 ) M1M2_PR
- NEW met1 ( 900910 2050030 ) M1M2_PR
- NEW met1 ( 1725230 293590 ) M1M2_PR ;
+ NEW met2 ( 1725230 82800 ) ( * 164050 )
+ NEW met2 ( 468510 164050 ) ( * 2283950 )
+ NEW met1 ( 468510 2283950 ) ( 473570 * )
+ NEW met1 ( 468510 164050 ) ( 1725230 * )
+ NEW met1 ( 478170 2284630 ) M1M2_PR
+ NEW met1 ( 1725230 164050 ) M1M2_PR
+ NEW met1 ( 468510 164050 ) M1M2_PR
+ NEW met1 ( 468510 2283950 ) M1M2_PR ;
- la_data_in[63] ( PIN la_data_in[63] ) ( chip_controller la_data_in[63] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2057340 0 ) ( 607430 * )
- NEW met2 ( 607430 2056830 ) ( * 2057340 )
- NEW met2 ( 1746390 2380 0 ) ( * 23290 )
- NEW met2 ( 990610 23290 ) ( * 2056830 )
- NEW met1 ( 607430 2056830 ) ( 990610 * )
- NEW met1 ( 990610 23290 ) ( 1746390 * )
- NEW met2 ( 607430 2057340 ) M2M3_PR_M
- NEW met1 ( 607430 2056830 ) M1M2_PR
- NEW met1 ( 990610 23290 ) M1M2_PR
- NEW met1 ( 990610 2056830 ) M1M2_PR
- NEW met1 ( 1746390 23290 ) M1M2_PR ;
+ + ROUTED met2 ( 189750 2539630 ) ( * 2540820 )
+ NEW met3 ( 189750 2540820 ) ( 200100 * )
+ NEW met3 ( 200100 2540140 0 ) ( * 2540820 )
+ NEW met2 ( 1746390 2380 0 ) ( * 34500 )
+ NEW met2 ( 1745930 34500 ) ( 1746390 * )
+ NEW met2 ( 1745930 34500 ) ( * 163370 )
+ NEW met1 ( 169970 2539630 ) ( 189750 * )
+ NEW met1 ( 169970 163370 ) ( 1745930 * )
+ NEW met2 ( 169970 163370 ) ( * 2539630 )
+ NEW met1 ( 189750 2539630 ) M1M2_PR
+ NEW met2 ( 189750 2540820 ) M2M3_PR_M
+ NEW met1 ( 1745930 163370 ) M1M2_PR
+ NEW met1 ( 169970 2539630 ) M1M2_PR
+ NEW met1 ( 169970 163370 ) M1M2_PR ;
- la_data_in[64] ( PIN la_data_in[64] ) ( chip_controller la_data_in[64] ) + USE SIGNAL
- + ROUTED met1 ( 471730 1787210 ) ( 475870 * )
- NEW met2 ( 471730 1787210 ) ( * 1800300 0 )
- NEW met2 ( 475870 40970 ) ( * 1787210 )
- NEW met2 ( 1764330 2380 0 ) ( * 40970 )
- NEW met1 ( 475870 40970 ) ( 1764330 * )
- NEW met1 ( 475870 40970 ) M1M2_PR
- NEW met1 ( 475870 1787210 ) M1M2_PR
- NEW met1 ( 471730 1787210 ) M1M2_PR
- NEW met1 ( 1764330 40970 ) M1M2_PR ;
+ + ROUTED met2 ( 189290 2539970 ) ( * 2543540 )
+ NEW met3 ( 189290 2543540 ) ( 201020 * )
+ NEW met3 ( 201020 2543540 ) ( * 2544220 0 )
+ NEW met2 ( 1759730 82800 ) ( 1764330 * )
+ NEW met2 ( 1764330 2380 0 ) ( * 82800 )
+ NEW met2 ( 1759730 82800 ) ( * 169490 )
+ NEW met1 ( 163070 2539970 ) ( 189290 * )
+ NEW met1 ( 163070 169490 ) ( 1759730 * )
+ NEW met2 ( 163070 169490 ) ( * 2539970 )
+ NEW met1 ( 189290 2539970 ) M1M2_PR
+ NEW met2 ( 189290 2543540 ) M2M3_PR_M
+ NEW met1 ( 1759730 169490 ) M1M2_PR
+ NEW met1 ( 163070 2539970 ) M1M2_PR
+ NEW met1 ( 163070 169490 ) M1M2_PR ;
- la_data_in[65] ( PIN la_data_in[65] ) ( chip_controller la_data_in[65] ) + USE SIGNAL
- + ROUTED met2 ( 188370 2070090 ) ( * 2073660 )
- NEW met3 ( 188370 2073660 ) ( 200100 * 0 )
- NEW met1 ( 177790 2070090 ) ( 188370 * )
- NEW met2 ( 1780430 82800 ) ( 1781810 * )
- NEW met2 ( 1781810 2380 0 ) ( * 82800 )
- NEW met1 ( 177790 1783130 ) ( 1780430 * )
- NEW met2 ( 1780430 82800 ) ( * 1783130 )
- NEW met2 ( 177790 1783130 ) ( * 2070090 )
- NEW met1 ( 188370 2070090 ) M1M2_PR
- NEW met2 ( 188370 2073660 ) M2M3_PR_M
- NEW met1 ( 177790 1783130 ) M1M2_PR
- NEW met1 ( 177790 2070090 ) M1M2_PR
- NEW met1 ( 1780430 1783130 ) M1M2_PR ;
+ + ROUTED met2 ( 477250 2699260 0 ) ( 478630 * )
+ NEW met2 ( 478630 2699260 ) ( * 2706060 )
+ NEW met2 ( 1781810 2380 0 ) ( * 19890 )
+ NEW met1 ( 1300190 19890 ) ( 1781810 * )
+ NEW met2 ( 1300190 19890 ) ( * 2706060 )
+ NEW met3 ( 478630 2706060 ) ( 1300190 * )
+ NEW met2 ( 478630 2706060 ) M2M3_PR_M
+ NEW met1 ( 1300190 19890 ) M1M2_PR
+ NEW met2 ( 1300190 2706060 ) M2M3_PR_M
+ NEW met1 ( 1781810 19890 ) M1M2_PR ;
- la_data_in[66] ( PIN la_data_in[66] ) ( chip_controller la_data_in[66] ) + USE SIGNAL
- + ROUTED met2 ( 1799750 2380 0 ) ( * 19890 )
- NEW met1 ( 1100550 19890 ) ( 1799750 * )
- NEW met2 ( 459310 2199460 0 ) ( * 2204900 )
- NEW met3 ( 459310 2204900 ) ( 1100550 * )
- NEW met2 ( 1100550 19890 ) ( * 2204900 )
- NEW met1 ( 1100550 19890 ) M1M2_PR
- NEW met1 ( 1799750 19890 ) M1M2_PR
- NEW met2 ( 459310 2204900 ) M2M3_PR_M
- NEW met2 ( 1100550 2204900 ) M2M3_PR_M ;
+ + ROUTED met2 ( 484150 2699260 0 ) ( 485530 * )
+ NEW met2 ( 485530 2699260 ) ( * 2737510 )
+ NEW met2 ( 900450 17850 ) ( * 2737510 )
+ NEW met1 ( 485530 2737510 ) ( 900450 * )
+ NEW met2 ( 1799750 2380 0 ) ( * 17850 )
+ NEW met1 ( 900450 17850 ) ( 1799750 * )
+ NEW met1 ( 485530 2737510 ) M1M2_PR
+ NEW met1 ( 900450 17850 ) M1M2_PR
+ NEW met1 ( 900450 2737510 ) M1M2_PR
+ NEW met1 ( 1799750 17850 ) M1M2_PR ;
- la_data_in[67] ( PIN la_data_in[67] ) ( chip_controller la_data_in[67] ) + USE SIGNAL
- + ROUTED met2 ( 1817690 2380 0 ) ( * 16150 )
- NEW met1 ( 1501210 16150 ) ( 1817690 * )
- NEW li1 ( 462990 2195210 ) ( * 2199630 )
- NEW met2 ( 462990 2199460 ) ( * 2199630 )
- NEW met2 ( 462530 2199460 0 ) ( 462990 * )
- NEW met1 ( 462990 2195210 ) ( 1501210 * )
- NEW met2 ( 1501210 16150 ) ( * 2195210 )
- NEW met1 ( 1501210 16150 ) M1M2_PR
- NEW met1 ( 1817690 16150 ) M1M2_PR
- NEW li1 ( 462990 2195210 ) L1M1_PR_MR
- NEW li1 ( 462990 2199630 ) L1M1_PR_MR
- NEW met1 ( 462990 2199630 ) M1M2_PR
- NEW met1 ( 1501210 2195210 ) M1M2_PR
- NEW met1 ( 462990 2199630 ) RECT ( -355 -70 0 70 ) ;
+ + ROUTED met2 ( 489670 2283100 ) ( 490130 * )
+ NEW met2 ( 490130 2283100 ) ( * 2284630 )
+ NEW met1 ( 484610 2284630 ) ( 490130 * )
+ NEW met2 ( 484610 2284630 ) ( * 2300100 0 )
+ NEW met2 ( 489670 33830 ) ( * 2283100 )
+ NEW met2 ( 1817690 2380 0 ) ( * 33830 )
+ NEW met1 ( 489670 33830 ) ( 1817690 * )
+ NEW met1 ( 489670 33830 ) M1M2_PR
+ NEW met1 ( 490130 2284630 ) M1M2_PR
+ NEW met1 ( 484610 2284630 ) M1M2_PR
+ NEW met1 ( 1817690 33830 ) M1M2_PR ;
- la_data_in[68] ( PIN la_data_in[68] ) ( chip_controller la_data_in[68] ) + USE SIGNAL
- + ROUTED met2 ( 1835170 2380 0 ) ( * 33660 )
- NEW met3 ( 463910 2214420 ) ( 555220 * )
- NEW met3 ( 555220 33660 ) ( 1835170 * )
- NEW met2 ( 463910 2199460 0 ) ( * 2214420 )
- NEW met4 ( 555220 33660 ) ( * 2214420 )
- NEW met2 ( 1835170 33660 ) M2M3_PR_M
- NEW met2 ( 463910 2214420 ) M2M3_PR_M
- NEW met3 ( 555220 33660 ) M3M4_PR_M
- NEW met3 ( 555220 2214420 ) M3M4_PR_M ;
+ + ROUTED met2 ( 1835170 2380 0 ) ( * 23290 )
+ NEW met3 ( 599380 2564620 0 ) ( 608350 * )
+ NEW met2 ( 608350 2560710 ) ( * 2564620 )
+ NEW met2 ( 976810 23290 ) ( * 2560710 )
+ NEW met1 ( 976810 23290 ) ( 1835170 * )
+ NEW met1 ( 608350 2560710 ) ( 976810 * )
+ NEW met1 ( 976810 23290 ) M1M2_PR
+ NEW met1 ( 1835170 23290 ) M1M2_PR
+ NEW met2 ( 608350 2564620 ) M2M3_PR_M
+ NEW met1 ( 608350 2560710 ) M1M2_PR
+ NEW met1 ( 976810 2560710 ) M1M2_PR ;
- la_data_in[69] ( PIN la_data_in[69] ) ( chip_controller la_data_in[69] ) + USE SIGNAL
+ ROUTED met2 ( 1853110 2380 0 ) ( * 3060 )
NEW met2 ( 1852190 3060 ) ( 1853110 * )
NEW met2 ( 1852190 2380 ) ( * 3060 )
NEW met2 ( 1850810 2380 ) ( 1852190 * )
- NEW met2 ( 186990 2077230 ) ( * 2081820 )
- NEW met3 ( 186990 2081820 ) ( 200100 * 0 )
+ NEW met3 ( 599380 2569380 0 ) ( 607890 * )
+ NEW met2 ( 607890 2567850 ) ( * 2569380 )
NEW met2 ( 1849430 82800 ) ( 1850810 * )
NEW met2 ( 1850810 2380 ) ( * 82800 )
- NEW met2 ( 1849430 82800 ) ( * 1764430 )
- NEW met1 ( 169510 1764430 ) ( 1849430 * )
- NEW met1 ( 169510 2077230 ) ( 186990 * )
- NEW met2 ( 169510 1764430 ) ( * 2077230 )
- NEW met1 ( 1849430 1764430 ) M1M2_PR
- NEW met1 ( 186990 2077230 ) M1M2_PR
- NEW met2 ( 186990 2081820 ) M2M3_PR_M
- NEW met1 ( 169510 1764430 ) M1M2_PR
- NEW met1 ( 169510 2077230 ) M1M2_PR ;
+ NEW met2 ( 1849430 82800 ) ( * 161670 )
+ NEW met1 ( 607890 2567850 ) ( 1032010 * )
+ NEW met2 ( 1032010 161670 ) ( * 2567850 )
+ NEW met1 ( 1032010 161670 ) ( 1849430 * )
+ NEW met2 ( 607890 2569380 ) M2M3_PR_M
+ NEW met1 ( 607890 2567850 ) M1M2_PR
+ NEW met1 ( 1849430 161670 ) M1M2_PR
+ NEW met1 ( 1032010 161670 ) M1M2_PR
+ NEW met1 ( 1032010 2567850 ) M1M2_PR ;
- la_data_in[6] ( PIN la_data_in[6] ) ( chip_controller la_data_in[6] ) + USE SIGNAL
- + ROUTED met2 ( 489670 2206770 ) ( * 2210510 )
- NEW met1 ( 238050 2210510 ) ( 489670 * )
- NEW met2 ( 238050 2199460 0 ) ( * 2210510 )
- NEW met2 ( 735770 2380 0 ) ( * 34500 )
- NEW met2 ( 731630 34500 ) ( 735770 * )
- NEW met1 ( 489670 2206770 ) ( 731630 * )
- NEW met2 ( 731630 34500 ) ( * 2206770 )
- NEW met1 ( 489670 2210510 ) M1M2_PR
- NEW met1 ( 489670 2206770 ) M1M2_PR
- NEW met1 ( 238050 2210510 ) M1M2_PR
- NEW met1 ( 731630 2206770 ) M1M2_PR ;
+ + ROUTED met2 ( 735770 2380 0 ) ( * 34170 )
+ NEW met1 ( 268870 34170 ) ( 735770 * )
+ NEW met1 ( 266110 2284290 ) ( 268870 * )
+ NEW met2 ( 266110 2284290 ) ( * 2300100 0 )
+ NEW met2 ( 268870 34170 ) ( * 2284290 )
+ NEW met1 ( 268870 34170 ) M1M2_PR
+ NEW met1 ( 735770 34170 ) M1M2_PR
+ NEW met1 ( 268870 2284290 ) M1M2_PR
+ NEW met1 ( 266110 2284290 ) M1M2_PR ;
- la_data_in[70] ( PIN la_data_in[70] ) ( chip_controller la_data_in[70] ) + USE SIGNAL
- + ROUTED met1 ( 490130 1788570 ) ( 496570 * )
- NEW met2 ( 490130 1788570 ) ( * 1800300 0 )
- NEW met2 ( 496570 40290 ) ( * 1788570 )
- NEW met1 ( 496570 40290 ) ( 1870590 * )
- NEW met2 ( 1870590 2380 0 ) ( * 40290 )
- NEW met1 ( 496570 40290 ) M1M2_PR
- NEW met1 ( 496570 1788570 ) M1M2_PR
- NEW met1 ( 490130 1788570 ) M1M2_PR
- NEW met1 ( 1870590 40290 ) M1M2_PR ;
+ + ROUTED met1 ( 492890 2277830 ) ( 496570 * )
+ NEW met2 ( 492890 2277830 ) ( * 2300100 )
+ NEW met2 ( 491510 2300100 0 ) ( 492890 * )
+ NEW met2 ( 496570 33490 ) ( * 2277830 )
+ NEW met2 ( 1870590 2380 0 ) ( * 33490 )
+ NEW met1 ( 496570 33490 ) ( 1870590 * )
+ NEW met1 ( 496570 33490 ) M1M2_PR
+ NEW met1 ( 496570 2277830 ) M1M2_PR
+ NEW met1 ( 492890 2277830 ) M1M2_PR
+ NEW met1 ( 1870590 33490 ) M1M2_PR ;
- la_data_in[71] ( PIN la_data_in[71] ) ( chip_controller la_data_in[71] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2072300 0 ) ( 607430 * )
- NEW met2 ( 607430 2070090 ) ( * 2072300 )
- NEW met2 ( 1888530 2380 0 ) ( * 14620 )
- NEW met2 ( 1886690 14620 ) ( 1888530 * )
- NEW met1 ( 607430 2070090 ) ( 1121250 * )
- NEW met2 ( 1121250 79730 ) ( * 2070090 )
- NEW met1 ( 1121250 79730 ) ( 1886690 * )
- NEW met2 ( 1886690 14620 ) ( * 79730 )
- NEW met2 ( 607430 2072300 ) M2M3_PR_M
- NEW met1 ( 607430 2070090 ) M1M2_PR
- NEW met1 ( 1121250 79730 ) M1M2_PR
- NEW met1 ( 1121250 2070090 ) M1M2_PR
- NEW met1 ( 1886690 79730 ) M1M2_PR ;
+ + ROUTED met1 ( 498410 2283950 ) ( 503470 * )
+ NEW met2 ( 498410 2283950 ) ( * 2300100 0 )
+ NEW met2 ( 503470 33150 ) ( * 2283950 )
+ NEW met2 ( 1888530 2380 0 ) ( * 33150 )
+ NEW met1 ( 503470 33150 ) ( 1888530 * )
+ NEW met1 ( 503470 33150 ) M1M2_PR
+ NEW met1 ( 503470 2283950 ) M1M2_PR
+ NEW met1 ( 498410 2283950 ) M1M2_PR
+ NEW met1 ( 1888530 33150 ) M1M2_PR ;
- la_data_in[72] ( PIN la_data_in[72] ) ( chip_controller la_data_in[72] ) + USE SIGNAL
- + ROUTED met3 ( 475180 2199460 ) ( 475870 * )
- NEW met2 ( 475410 2199460 0 ) ( 475870 * )
- NEW met4 ( 475180 32980 ) ( * 2199460 )
- NEW met2 ( 1906010 2380 0 ) ( * 32980 )
- NEW met3 ( 475180 32980 ) ( 1906010 * )
- NEW met3 ( 475180 32980 ) M3M4_PR_M
- NEW met3 ( 475180 2199460 ) M3M4_PR_M
- NEW met2 ( 475870 2199460 ) M2M3_PR_M
- NEW met2 ( 1906010 32980 ) M2M3_PR_M ;
+ + ROUTED met2 ( 503010 32810 ) ( * 2300100 0 )
+ NEW met2 ( 1906010 2380 0 ) ( * 32810 )
+ NEW met1 ( 503010 32810 ) ( 1906010 * )
+ NEW met1 ( 503010 32810 ) M1M2_PR
+ NEW met1 ( 1906010 32810 ) M1M2_PR ;
- la_data_in[73] ( PIN la_data_in[73] ) ( chip_controller la_data_in[73] ) + USE SIGNAL
- + ROUTED met2 ( 1923950 2380 0 ) ( * 32810 )
- NEW met3 ( 599380 2073660 0 ) ( 607890 * )
- NEW met2 ( 607890 2070430 ) ( * 2073660 )
- NEW met1 ( 645610 32810 ) ( 1923950 * )
- NEW met1 ( 607890 2070430 ) ( 645610 * )
- NEW met2 ( 645610 32810 ) ( * 2070430 )
- NEW met1 ( 1923950 32810 ) M1M2_PR
- NEW met2 ( 607890 2073660 ) M2M3_PR_M
- NEW met1 ( 607890 2070430 ) M1M2_PR
- NEW met1 ( 645610 32810 ) M1M2_PR
- NEW met1 ( 645610 2070430 ) M1M2_PR ;
+ + ROUTED met2 ( 491050 2699260 0 ) ( 492430 * )
+ NEW met2 ( 492430 2699260 ) ( * 2706740 )
+ NEW met2 ( 1923950 2380 0 ) ( * 14620 )
+ NEW met2 ( 1303410 24820 ) ( 1303870 * )
+ NEW met2 ( 1303870 14620 ) ( * 24820 )
+ NEW met3 ( 1303870 14620 ) ( 1923950 * )
+ NEW met2 ( 1303410 24820 ) ( * 2706740 )
+ NEW met3 ( 492430 2706740 ) ( 1303410 * )
+ NEW met2 ( 492430 2706740 ) M2M3_PR_M
+ NEW met2 ( 1923950 14620 ) M2M3_PR_M
+ NEW met2 ( 1303870 14620 ) M2M3_PR_M
+ NEW met2 ( 1303410 2706740 ) M2M3_PR_M ;
- la_data_in[74] ( PIN la_data_in[74] ) ( chip_controller la_data_in[74] ) + USE SIGNAL
+ ROUTED met2 ( 1941430 2380 0 ) ( * 3060 )
NEW met2 ( 1940510 3060 ) ( 1941430 * )
NEW met2 ( 1940510 2380 ) ( * 3060 )
NEW met2 ( 1939130 2380 ) ( 1940510 * )
- NEW met3 ( 599380 2077060 0 ) ( 607430 * )
- NEW met2 ( 607430 2077060 ) ( * 2077570 )
- NEW met2 ( 1939130 2380 ) ( * 1769530 )
- NEW met1 ( 1411510 1769530 ) ( 1939130 * )
- NEW met1 ( 607430 2077570 ) ( 1411510 * )
- NEW met2 ( 1411510 1769530 ) ( * 2077570 )
- NEW met1 ( 1939130 1769530 ) M1M2_PR
- NEW met2 ( 607430 2077060 ) M2M3_PR_M
- NEW met1 ( 607430 2077570 ) M1M2_PR
- NEW met1 ( 1411510 1769530 ) M1M2_PR
- NEW met1 ( 1411510 2077570 ) M1M2_PR ;
+ NEW met3 ( 599380 2580940 0 ) ( 607890 * )
+ NEW met2 ( 607890 2580940 ) ( * 2581790 )
+ NEW met2 ( 1066510 158270 ) ( * 2581790 )
+ NEW met2 ( 1939130 2380 ) ( * 158270 )
+ NEW met1 ( 607890 2581790 ) ( 1066510 * )
+ NEW met1 ( 1066510 158270 ) ( 1939130 * )
+ NEW met2 ( 607890 2580940 ) M2M3_PR_M
+ NEW met1 ( 607890 2581790 ) M1M2_PR
+ NEW met1 ( 1066510 158270 ) M1M2_PR
+ NEW met1 ( 1066510 2581790 ) M1M2_PR
+ NEW met1 ( 1939130 158270 ) M1M2_PR ;
- la_data_in[75] ( PIN la_data_in[75] ) ( chip_controller la_data_in[75] ) + USE SIGNAL
- + ROUTED met2 ( 1959370 2380 0 ) ( * 23630 )
- NEW met3 ( 599380 2079780 0 ) ( 607430 * )
- NEW met2 ( 607430 2078250 ) ( * 2079780 )
- NEW met1 ( 942310 23630 ) ( 1959370 * )
- NEW met1 ( 607430 2078250 ) ( 942310 * )
- NEW met2 ( 942310 23630 ) ( * 2078250 )
- NEW met1 ( 1959370 23630 ) M1M2_PR
- NEW met2 ( 607430 2079780 ) M2M3_PR_M
- NEW met1 ( 607430 2078250 ) M1M2_PR
- NEW met1 ( 942310 23630 ) M1M2_PR
- NEW met1 ( 942310 2078250 ) M1M2_PR ;
+ + ROUTED met2 ( 493350 2699940 ) ( 494730 * 0 )
+ NEW met2 ( 493350 2699940 ) ( * 2718130 )
+ NEW met1 ( 490590 2718130 ) ( 493350 * )
+ NEW met2 ( 1959370 2380 0 ) ( * 28050 )
+ NEW met2 ( 490590 2718130 ) ( * 2747710 )
+ NEW met1 ( 1301110 28050 ) ( 1959370 * )
+ NEW met1 ( 490590 2747710 ) ( 1301110 * )
+ NEW met2 ( 1301110 28050 ) ( * 2747710 )
+ NEW met1 ( 493350 2718130 ) M1M2_PR
+ NEW met1 ( 490590 2718130 ) M1M2_PR
+ NEW met1 ( 1959370 28050 ) M1M2_PR
+ NEW met1 ( 490590 2747710 ) M1M2_PR
+ NEW met1 ( 1301110 28050 ) M1M2_PR
+ NEW met1 ( 1301110 2747710 ) M1M2_PR ;
- la_data_in[76] ( PIN la_data_in[76] ) ( chip_controller la_data_in[76] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2082500 0 ) ( 607890 * )
- NEW met2 ( 607890 2077910 ) ( * 2082500 )
- NEW met2 ( 1356310 1772590 ) ( * 2077910 )
- NEW met1 ( 1356310 1772590 ) ( 1973630 * )
- NEW met1 ( 607890 2077910 ) ( 1356310 * )
+ + ROUTED met3 ( 599380 2588420 0 ) ( 607430 * )
+ NEW met2 ( 607430 2588250 ) ( * 2588420 )
+ NEW met2 ( 1073410 157930 ) ( * 2588250 )
+ NEW met1 ( 607430 2588250 ) ( 1073410 * )
NEW met2 ( 1973630 82800 ) ( 1976850 * )
NEW met2 ( 1976850 2380 0 ) ( * 82800 )
- NEW met2 ( 1973630 82800 ) ( * 1772590 )
- NEW met1 ( 1356310 1772590 ) M1M2_PR
- NEW met2 ( 607890 2082500 ) M2M3_PR_M
- NEW met1 ( 607890 2077910 ) M1M2_PR
- NEW met1 ( 1356310 2077910 ) M1M2_PR
- NEW met1 ( 1973630 1772590 ) M1M2_PR ;
+ NEW met1 ( 1073410 157930 ) ( 1973630 * )
+ NEW met2 ( 1973630 82800 ) ( * 157930 )
+ NEW met2 ( 607430 2588420 ) M2M3_PR_M
+ NEW met1 ( 607430 2588250 ) M1M2_PR
+ NEW met1 ( 1073410 157930 ) M1M2_PR
+ NEW met1 ( 1073410 2588250 ) M1M2_PR
+ NEW met1 ( 1973630 157930 ) M1M2_PR ;
- la_data_in[77] ( PIN la_data_in[77] ) ( chip_controller la_data_in[77] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2087260 0 ) ( 608350 * )
- NEW met2 ( 608350 2084030 ) ( * 2087260 )
- NEW met1 ( 608350 2084030 ) ( 1390810 * )
- NEW met2 ( 1390810 1780070 ) ( * 2084030 )
- NEW met2 ( 1994790 2380 0 ) ( * 34500 )
- NEW met2 ( 1994330 34500 ) ( 1994790 * )
- NEW met1 ( 1390810 1780070 ) ( 1994330 * )
- NEW met2 ( 1994330 34500 ) ( * 1780070 )
- NEW met2 ( 608350 2087260 ) M2M3_PR_M
- NEW met1 ( 608350 2084030 ) M1M2_PR
- NEW met1 ( 1390810 1780070 ) M1M2_PR
- NEW met1 ( 1390810 2084030 ) M1M2_PR
- NEW met1 ( 1994330 1780070 ) M1M2_PR ;
+ + ROUTED met2 ( 186990 2560710 ) ( * 2565300 )
+ NEW met3 ( 186990 2565300 ) ( 201020 * )
+ NEW met3 ( 201020 2565300 ) ( * 2565980 0 )
+ NEW met1 ( 149730 86190 ) ( 1994790 * )
+ NEW met2 ( 149730 86190 ) ( * 2560710 )
+ NEW met1 ( 149730 2560710 ) ( 186990 * )
+ NEW met2 ( 1994790 2380 0 ) ( * 86190 )
+ NEW met1 ( 186990 2560710 ) M1M2_PR
+ NEW met2 ( 186990 2565300 ) M2M3_PR_M
+ NEW met1 ( 149730 86190 ) M1M2_PR
+ NEW met1 ( 1994790 86190 ) M1M2_PR
+ NEW met1 ( 149730 2560710 ) M1M2_PR ;
- la_data_in[78] ( PIN la_data_in[78] ) ( chip_controller la_data_in[78] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2090660 0 ) ( 607890 * )
- NEW met2 ( 607890 2084710 ) ( * 2090660 )
- NEW met2 ( 866410 26690 ) ( * 2084710 )
- NEW met2 ( 2012730 2380 0 ) ( * 26690 )
- NEW met1 ( 866410 26690 ) ( 2012730 * )
- NEW met1 ( 607890 2084710 ) ( 866410 * )
- NEW met1 ( 866410 26690 ) M1M2_PR
- NEW met2 ( 607890 2090660 ) M2M3_PR_M
- NEW met1 ( 607890 2084710 ) M1M2_PR
- NEW met1 ( 866410 2084710 ) M1M2_PR
- NEW met1 ( 2012730 26690 ) M1M2_PR ;
+ + ROUTED met2 ( 186990 2567510 ) ( * 2568700 )
+ NEW met3 ( 186990 2568700 ) ( 201020 * )
+ NEW met3 ( 201020 2568700 ) ( * 2569380 0 )
+ NEW met1 ( 159850 2567510 ) ( 186990 * )
+ NEW met1 ( 159850 59330 ) ( 2012730 * )
+ NEW met2 ( 2012730 2380 0 ) ( * 59330 )
+ NEW met2 ( 159850 59330 ) ( * 2567510 )
+ NEW met1 ( 186990 2567510 ) M1M2_PR
+ NEW met2 ( 186990 2568700 ) M2M3_PR_M
+ NEW met1 ( 159850 59330 ) M1M2_PR
+ NEW met1 ( 159850 2567510 ) M1M2_PR
+ NEW met1 ( 2012730 59330 ) M1M2_PR ;
- la_data_in[79] ( PIN la_data_in[79] ) ( chip_controller la_data_in[79] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2093380 0 ) ( 608350 * )
- NEW met2 ( 608350 2090830 ) ( * 2093380 )
- NEW met2 ( 2028830 82800 ) ( 2030210 * )
- NEW met2 ( 2030210 2380 0 ) ( * 82800 )
- NEW met2 ( 2028830 82800 ) ( * 1775990 )
- NEW met1 ( 608350 2090830 ) ( 1321810 * )
- NEW met2 ( 1321810 1775990 ) ( * 2090830 )
- NEW met1 ( 1321810 1775990 ) ( 2028830 * )
- NEW met2 ( 608350 2093380 ) M2M3_PR_M
- NEW met1 ( 608350 2090830 ) M1M2_PR
- NEW met1 ( 2028830 1775990 ) M1M2_PR
- NEW met1 ( 1321810 1775990 ) M1M2_PR
- NEW met1 ( 1321810 2090830 ) M1M2_PR ;
+ + ROUTED met2 ( 2030210 2380 0 ) ( * 32130 )
+ NEW met1 ( 513130 2284630 ) ( 517270 * )
+ NEW met2 ( 513130 2284630 ) ( * 2300100 0 )
+ NEW met2 ( 517270 32130 ) ( * 2284630 )
+ NEW met1 ( 517270 32130 ) ( 2030210 * )
+ NEW met1 ( 517270 32130 ) M1M2_PR
+ NEW met1 ( 2030210 32130 ) M1M2_PR
+ NEW met1 ( 517270 2284630 ) M1M2_PR
+ NEW met1 ( 513130 2284630 ) M1M2_PR ;
- la_data_in[7] ( PIN la_data_in[7] ) ( chip_controller la_data_in[7] ) + USE SIGNAL
- + ROUTED met3 ( 195730 1858780 ) ( 200100 * 0 )
- NEW met1 ( 195730 1768850 ) ( 752330 * )
+ + ROUTED met2 ( 497030 2703510 ) ( * 2715750 )
+ NEW met2 ( 252770 2699260 0 ) ( 254150 * )
+ NEW met2 ( 254150 2699260 ) ( * 2715750 )
+ NEW met1 ( 254150 2715750 ) ( 497030 * )
+ NEW li1 ( 541650 2702830 ) ( * 2703510 )
+ NEW met1 ( 497030 2703510 ) ( 541650 * )
NEW met2 ( 752330 82800 ) ( 753250 * )
NEW met2 ( 753250 2380 0 ) ( * 82800 )
- NEW met2 ( 752330 82800 ) ( * 1768850 )
- NEW met2 ( 195730 1768850 ) ( * 1858780 )
- NEW met1 ( 195730 1768850 ) M1M2_PR
- NEW met2 ( 195730 1858780 ) M2M3_PR_M
- NEW met1 ( 752330 1768850 ) M1M2_PR ;
+ NEW met2 ( 752330 82800 ) ( * 2702830 )
+ NEW met1 ( 541650 2702830 ) ( 752330 * )
+ NEW met1 ( 497030 2715750 ) M1M2_PR
+ NEW met1 ( 497030 2703510 ) M1M2_PR
+ NEW met1 ( 254150 2715750 ) M1M2_PR
+ NEW li1 ( 541650 2703510 ) L1M1_PR_MR
+ NEW li1 ( 541650 2702830 ) L1M1_PR_MR
+ NEW met1 ( 752330 2702830 ) M1M2_PR ;
- la_data_in[80] ( PIN la_data_in[80] ) ( chip_controller la_data_in[80] ) + USE SIGNAL
- + ROUTED met2 ( 188830 2098310 ) ( * 2100860 )
- NEW met3 ( 188830 2100860 ) ( 200100 * 0 )
- NEW met2 ( 2048150 2380 0 ) ( * 39610 )
- NEW met1 ( 167670 2098310 ) ( 188830 * )
- NEW met1 ( 167670 39610 ) ( 2048150 * )
- NEW met2 ( 167670 39610 ) ( * 2098310 )
- NEW met1 ( 188830 2098310 ) M1M2_PR
- NEW met2 ( 188830 2100860 ) M2M3_PR_M
- NEW met1 ( 2048150 39610 ) M1M2_PR
- NEW met1 ( 167670 39610 ) M1M2_PR
- NEW met1 ( 167670 2098310 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2596580 0 ) ( 607430 * )
+ NEW met2 ( 607430 2595050 ) ( * 2596580 )
+ NEW met2 ( 2048150 2380 0 ) ( * 27370 )
+ NEW met2 ( 1155750 27370 ) ( * 2595050 )
+ NEW met1 ( 607430 2595050 ) ( 1155750 * )
+ NEW met1 ( 1155750 27370 ) ( 2048150 * )
+ NEW met2 ( 607430 2596580 ) M2M3_PR_M
+ NEW met1 ( 607430 2595050 ) M1M2_PR
+ NEW met1 ( 1155750 27370 ) M1M2_PR
+ NEW met1 ( 1155750 2595050 ) M1M2_PR
+ NEW met1 ( 2048150 27370 ) M1M2_PR ;
- la_data_in[81] ( PIN la_data_in[81] ) ( chip_controller la_data_in[81] ) + USE SIGNAL
- + ROUTED li1 ( 577530 2209490 ) ( * 2211190 )
- NEW met1 ( 577530 2211190 ) ( 604210 * )
- NEW met2 ( 499790 2199460 0 ) ( * 2208810 )
- NEW li1 ( 542110 2208810 ) ( * 2209490 )
- NEW met1 ( 499790 2208810 ) ( 542110 * )
- NEW met1 ( 542110 2209490 ) ( 577530 * )
- NEW met2 ( 2065630 2380 0 ) ( * 3060 )
- NEW met2 ( 2064710 3060 ) ( 2065630 * )
- NEW met2 ( 2064710 2380 ) ( * 3060 )
- NEW met2 ( 2063330 2380 ) ( 2064710 * )
- NEW li1 ( 2063330 1803530 ) ( * 1805230 )
- NEW met2 ( 2063330 2380 ) ( * 1803530 )
- NEW met1 ( 604210 1805230 ) ( 2063330 * )
- NEW met2 ( 604210 1805230 ) ( * 2211190 )
- NEW met1 ( 499790 2208810 ) M1M2_PR
- NEW li1 ( 577530 2209490 ) L1M1_PR_MR
- NEW li1 ( 577530 2211190 ) L1M1_PR_MR
- NEW met1 ( 604210 2211190 ) M1M2_PR
- NEW li1 ( 542110 2208810 ) L1M1_PR_MR
- NEW li1 ( 542110 2209490 ) L1M1_PR_MR
- NEW li1 ( 2063330 1805230 ) L1M1_PR_MR
- NEW li1 ( 2063330 1803530 ) L1M1_PR_MR
- NEW met1 ( 2063330 1803530 ) M1M2_PR
- NEW met1 ( 604210 1805230 ) M1M2_PR
- NEW met1 ( 2063330 1803530 ) RECT ( 0 -70 355 70 ) ;
+ + ROUTED met2 ( 516810 31790 ) ( * 2300100 0 )
+ NEW met2 ( 2065630 2380 0 ) ( * 31790 )
+ NEW met1 ( 516810 31790 ) ( 2065630 * )
+ NEW met1 ( 516810 31790 ) M1M2_PR
+ NEW met1 ( 2065630 31790 ) M1M2_PR ;
- la_data_in[82] ( PIN la_data_in[82] ) ( chip_controller la_data_in[82] ) + USE SIGNAL
- + ROUTED met1 ( 506230 1787210 ) ( 510370 * )
- NEW met2 ( 506230 1787210 ) ( * 1800300 0 )
- NEW met2 ( 510370 1765110 ) ( * 1787210 )
- NEW met2 ( 2052750 17850 ) ( * 1765110 )
- NEW met1 ( 510370 1765110 ) ( 2052750 * )
- NEW met2 ( 2083570 2380 0 ) ( * 17850 )
- NEW met1 ( 2052750 17850 ) ( 2083570 * )
- NEW met1 ( 510370 1765110 ) M1M2_PR
- NEW met1 ( 2052750 17850 ) M1M2_PR
- NEW met1 ( 2052750 1765110 ) M1M2_PR
- NEW met1 ( 510370 1787210 ) M1M2_PR
- NEW met1 ( 506230 1787210 ) M1M2_PR
- NEW met1 ( 2083570 17850 ) M1M2_PR ;
+ + ROUTED met2 ( 510830 2699940 ) ( 512210 * 0 )
+ NEW met2 ( 510830 2699940 ) ( * 2748390 )
+ NEW met2 ( 2083570 2380 0 ) ( * 28390 )
+ NEW met1 ( 1300650 28390 ) ( 2083570 * )
+ NEW met1 ( 510830 2748390 ) ( 1300650 * )
+ NEW met2 ( 1300650 28390 ) ( * 2748390 )
+ NEW met1 ( 510830 2748390 ) M1M2_PR
+ NEW met1 ( 1300650 28390 ) M1M2_PR
+ NEW met1 ( 2083570 28390 ) M1M2_PR
+ NEW met1 ( 1300650 2748390 ) M1M2_PR ;
- la_data_in[83] ( PIN la_data_in[83] ) ( chip_controller la_data_in[83] ) + USE SIGNAL
- + ROUTED met2 ( 503010 2199460 0 ) ( * 2210850 )
- NEW met1 ( 503010 2210850 ) ( 810750 * )
- NEW met2 ( 810750 40630 ) ( * 2210850 )
- NEW met1 ( 810750 40630 ) ( 2101050 * )
- NEW met2 ( 2101050 2380 0 ) ( * 40630 )
- NEW met1 ( 503010 2210850 ) M1M2_PR
- NEW met1 ( 810750 2210850 ) M1M2_PR
- NEW met1 ( 810750 40630 ) M1M2_PR
- NEW met1 ( 2101050 40630 ) M1M2_PR ;
+ + ROUTED met2 ( 2101050 2380 0 ) ( * 31450 )
+ NEW met1 ( 524170 31450 ) ( 2101050 * )
+ NEW met1 ( 520030 2284630 ) ( 524170 * )
+ NEW met2 ( 520030 2284630 ) ( * 2300100 0 )
+ NEW met2 ( 524170 31450 ) ( * 2284630 )
+ NEW met1 ( 524170 31450 ) M1M2_PR
+ NEW met1 ( 2101050 31450 ) M1M2_PR
+ NEW met1 ( 524170 2284630 ) M1M2_PR
+ NEW met1 ( 520030 2284630 ) M1M2_PR ;
- la_data_in[84] ( PIN la_data_in[84] ) ( chip_controller la_data_in[84] ) + USE SIGNAL
- + ROUTED met3 ( 182850 2113100 ) ( 200100 * 0 )
- NEW met2 ( 2118990 2380 0 ) ( * 34500 )
- NEW met2 ( 2118990 34500 ) ( 2119450 * )
- NEW met2 ( 2119450 34500 ) ( * 1798430 )
- NEW met1 ( 182850 1798430 ) ( 2119450 * )
- NEW met2 ( 182850 1798430 ) ( * 2113100 )
- NEW met2 ( 182850 2113100 ) M2M3_PR_M
- NEW met1 ( 182850 1798430 ) M1M2_PR
- NEW met1 ( 2119450 1798430 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2607460 0 ) ( 608350 * )
+ NEW met2 ( 608350 2602530 ) ( * 2607460 )
+ NEW met2 ( 2118990 2380 0 ) ( * 29410 )
+ NEW met1 ( 608350 2602530 ) ( 1100550 * )
+ NEW met1 ( 1100550 29410 ) ( 2118990 * )
+ NEW met2 ( 1100550 29410 ) ( * 2602530 )
+ NEW met2 ( 608350 2607460 ) M2M3_PR_M
+ NEW met1 ( 608350 2602530 ) M1M2_PR
+ NEW met1 ( 2118990 29410 ) M1M2_PR
+ NEW met1 ( 1100550 29410 ) M1M2_PR
+ NEW met1 ( 1100550 2602530 ) M1M2_PR ;
- la_data_in[85] ( PIN la_data_in[85] ) ( chip_controller la_data_in[85] ) + USE SIGNAL
- + ROUTED met2 ( 2136470 2380 0 ) ( * 32470 )
- NEW met3 ( 599380 2102220 0 ) ( 607890 * )
- NEW met2 ( 607890 2098310 ) ( * 2102220 )
- NEW met1 ( 652510 32470 ) ( 2136470 * )
- NEW met1 ( 607890 2098310 ) ( 652510 * )
- NEW met2 ( 652510 32470 ) ( * 2098310 )
- NEW met1 ( 2136470 32470 ) M1M2_PR
- NEW met2 ( 607890 2102220 ) M2M3_PR_M
- NEW met1 ( 607890 2098310 ) M1M2_PR
- NEW met1 ( 652510 32470 ) M1M2_PR
- NEW met1 ( 652510 2098310 ) M1M2_PR ;
+ + ROUTED met2 ( 2136470 2380 0 ) ( * 30770 )
+ NEW met2 ( 188830 2581110 ) ( * 2585020 )
+ NEW met3 ( 188830 2585020 ) ( 201020 * )
+ NEW met3 ( 201020 2585020 ) ( * 2585700 0 )
+ NEW met1 ( 174570 30770 ) ( 2136470 * )
+ NEW met1 ( 174570 2581110 ) ( 188830 * )
+ NEW met2 ( 174570 30770 ) ( * 2581110 )
+ NEW met1 ( 2136470 30770 ) M1M2_PR
+ NEW met1 ( 188830 2581110 ) M1M2_PR
+ NEW met2 ( 188830 2585020 ) M2M3_PR_M
+ NEW met1 ( 174570 30770 ) M1M2_PR
+ NEW met1 ( 174570 2581110 ) M1M2_PR ;
- la_data_in[86] ( PIN la_data_in[86] ) ( chip_controller la_data_in[86] ) + USE SIGNAL
- + ROUTED met2 ( 512210 1778370 ) ( * 1800300 0 )
- NEW met2 ( 2153030 82800 ) ( 2154410 * )
- NEW met2 ( 2154410 2380 0 ) ( * 82800 )
- NEW met2 ( 2153030 82800 ) ( * 1778370 )
- NEW met1 ( 512210 1778370 ) ( 2153030 * )
- NEW met1 ( 512210 1778370 ) M1M2_PR
- NEW met1 ( 2153030 1778370 ) M1M2_PR ;
+ + ROUTED met2 ( 2154410 2380 0 ) ( * 31110 )
+ NEW met1 ( 531070 31110 ) ( 2154410 * )
+ NEW met1 ( 528310 2284290 ) ( 531070 * )
+ NEW met2 ( 528310 2284290 ) ( * 2300100 0 )
+ NEW met2 ( 531070 31110 ) ( * 2284290 )
+ NEW met1 ( 2154410 31110 ) M1M2_PR
+ NEW met1 ( 531070 31110 ) M1M2_PR
+ NEW met1 ( 531070 2284290 ) M1M2_PR
+ NEW met1 ( 528310 2284290 ) M1M2_PR ;
- la_data_in[87] ( PIN la_data_in[87] ) ( chip_controller la_data_in[87] ) + USE SIGNAL
- + ROUTED met2 ( 508070 2199460 0 ) ( * 2209490 )
- NEW met1 ( 541650 2209490 ) ( * 2209830 )
- NEW met1 ( 508070 2209490 ) ( 541650 * )
- NEW met1 ( 541650 2209830 ) ( 941850 * )
- NEW met2 ( 941390 82800 ) ( 941850 * )
- NEW met2 ( 941390 41310 ) ( * 82800 )
- NEW met2 ( 941850 82800 ) ( * 2209830 )
- NEW met1 ( 941390 41310 ) ( 2172350 * )
- NEW met2 ( 2172350 2380 0 ) ( * 41310 )
- NEW met1 ( 508070 2209490 ) M1M2_PR
- NEW met1 ( 941850 2209830 ) M1M2_PR
- NEW met1 ( 941390 41310 ) M1M2_PR
- NEW met1 ( 2172350 41310 ) M1M2_PR ;
+ + ROUTED met2 ( 514050 2699940 ) ( 515430 * 0 )
+ NEW met2 ( 514050 2699940 ) ( * 2718130 )
+ NEW met1 ( 511290 2718130 ) ( 514050 * )
+ NEW met2 ( 511290 2718130 ) ( * 2748050 )
+ NEW met2 ( 2172350 2380 0 ) ( * 28730 )
+ NEW met1 ( 1301570 28730 ) ( 2172350 * )
+ NEW met1 ( 511290 2748050 ) ( 1301570 * )
+ NEW met2 ( 1301570 28730 ) ( * 2748050 )
+ NEW met1 ( 514050 2718130 ) M1M2_PR
+ NEW met1 ( 511290 2718130 ) M1M2_PR
+ NEW met1 ( 511290 2748050 ) M1M2_PR
+ NEW met1 ( 1301570 28730 ) M1M2_PR
+ NEW met1 ( 2172350 28730 ) M1M2_PR
+ NEW met1 ( 1301570 2748050 ) M1M2_PR ;
- la_data_in[88] ( PIN la_data_in[88] ) ( chip_controller la_data_in[88] ) + USE SIGNAL
- + ROUTED met1 ( 523710 1771230 ) ( 2087250 * )
- NEW met2 ( 2189830 2380 0 ) ( * 17850 )
- NEW met1 ( 2087710 17850 ) ( 2189830 * )
- NEW met2 ( 523710 1771230 ) ( * 1773300 )
- NEW met2 ( 521870 1773300 ) ( 523710 * )
- NEW met2 ( 521870 1773300 ) ( * 1800300 )
- NEW met2 ( 520490 1800300 0 ) ( 521870 * )
- NEW met2 ( 2087250 82800 ) ( 2087710 * )
- NEW met2 ( 2087710 17850 ) ( * 82800 )
- NEW met2 ( 2087250 82800 ) ( * 1771230 )
- NEW met1 ( 523710 1771230 ) M1M2_PR
- NEW met1 ( 2087710 17850 ) M1M2_PR
- NEW met1 ( 2087250 1771230 ) M1M2_PR
- NEW met1 ( 2189830 17850 ) M1M2_PR ;
+ + ROUTED met2 ( 1286850 29070 ) ( * 2748730 )
+ NEW met2 ( 517730 2699940 ) ( 519110 * 0 )
+ NEW met2 ( 2189830 2380 0 ) ( * 29070 )
+ NEW met1 ( 1286850 29070 ) ( 2189830 * )
+ NEW met2 ( 517730 2699940 ) ( * 2748730 )
+ NEW met1 ( 517730 2748730 ) ( 1286850 * )
+ NEW met1 ( 1286850 29070 ) M1M2_PR
+ NEW met1 ( 1286850 2748730 ) M1M2_PR
+ NEW met1 ( 2189830 29070 ) M1M2_PR
+ NEW met1 ( 517730 2748730 ) M1M2_PR ;
- la_data_in[89] ( PIN la_data_in[89] ) ( chip_controller la_data_in[89] ) + USE SIGNAL
- + ROUTED met2 ( 2207770 2380 0 ) ( * 17170 )
- NEW met1 ( 2197650 17170 ) ( 2207770 * )
- NEW met1 ( 524170 1764770 ) ( 2197650 * )
- NEW met2 ( 522330 1800300 0 ) ( 524170 * )
- NEW met2 ( 524170 1764770 ) ( * 1800300 )
- NEW met2 ( 2197650 17170 ) ( * 1764770 )
- NEW met1 ( 524170 1764770 ) M1M2_PR
- NEW met1 ( 2207770 17170 ) M1M2_PR
- NEW met1 ( 2197650 17170 ) M1M2_PR
- NEW met1 ( 2197650 1764770 ) M1M2_PR ;
+ + ROUTED met2 ( 186990 2595220 ) ( * 2595390 )
+ NEW met3 ( 186990 2595220 ) ( 200100 * )
+ NEW met3 ( 200100 2594540 0 ) ( * 2595220 )
+ NEW met1 ( 146510 2595390 ) ( 186990 * )
+ NEW met2 ( 2207770 2380 0 ) ( * 17850 )
+ NEW met1 ( 2201330 17850 ) ( 2207770 * )
+ NEW met2 ( 146510 72250 ) ( * 2595390 )
+ NEW met1 ( 146510 72250 ) ( 2201330 * )
+ NEW met2 ( 2201330 17850 ) ( * 72250 )
+ NEW met1 ( 186990 2595390 ) M1M2_PR
+ NEW met2 ( 186990 2595220 ) M2M3_PR_M
+ NEW met1 ( 146510 2595390 ) M1M2_PR
+ NEW met1 ( 2207770 17850 ) M1M2_PR
+ NEW met1 ( 2201330 17850 ) M1M2_PR
+ NEW met1 ( 146510 72250 ) M1M2_PR
+ NEW met1 ( 2201330 72250 ) M1M2_PR ;
- la_data_in[8] ( PIN la_data_in[8] ) ( chip_controller la_data_in[8] ) + USE SIGNAL
- + ROUTED met2 ( 771190 2380 0 ) ( * 17510 )
- NEW met1 ( 624910 17850 ) ( 662400 * )
- NEW met1 ( 662400 17510 ) ( * 17850 )
- NEW met1 ( 662400 17510 ) ( 771190 * )
- NEW met2 ( 260590 2199460 0 ) ( * 2204050 )
- NEW met1 ( 260590 2204050 ) ( 624910 * )
- NEW met2 ( 624910 17850 ) ( * 2204050 )
- NEW met1 ( 771190 17510 ) M1M2_PR
- NEW met1 ( 624910 17850 ) M1M2_PR
- NEW met1 ( 260590 2204050 ) M1M2_PR
- NEW met1 ( 624910 2204050 ) M1M2_PR ;
+ + ROUTED met2 ( 771190 2380 0 ) ( * 3060 )
+ NEW met2 ( 770270 3060 ) ( 771190 * )
+ NEW met2 ( 770270 2380 ) ( * 3060 )
+ NEW met2 ( 768890 2380 ) ( 770270 * )
+ NEW met2 ( 766130 82800 ) ( 768890 * )
+ NEW met2 ( 768890 2380 ) ( * 82800 )
+ NEW met2 ( 766130 82800 ) ( * 2702490 )
+ NEW met2 ( 261510 2699260 0 ) ( 261970 * )
+ NEW met2 ( 261970 2699260 ) ( * 2713710 )
+ NEW met2 ( 462530 2702490 ) ( * 2713710 )
+ NEW met1 ( 261970 2713710 ) ( 462530 * )
+ NEW met1 ( 462530 2702490 ) ( 766130 * )
+ NEW met1 ( 766130 2702490 ) M1M2_PR
+ NEW met1 ( 261970 2713710 ) M1M2_PR
+ NEW met1 ( 462530 2713710 ) M1M2_PR
+ NEW met1 ( 462530 2702490 ) M1M2_PR ;
- la_data_in[90] ( PIN la_data_in[90] ) ( chip_controller la_data_in[90] ) + USE SIGNAL
- + ROUTED met2 ( 186990 2118370 ) ( * 2124660 )
- NEW met3 ( 186990 2124660 ) ( 200100 * 0 )
- NEW met2 ( 2225250 2380 0 ) ( * 38930 )
- NEW met1 ( 164450 2118370 ) ( 186990 * )
- NEW met1 ( 164450 38930 ) ( 2225250 * )
- NEW met2 ( 164450 38930 ) ( * 2118370 )
- NEW met1 ( 186990 2118370 ) M1M2_PR
- NEW met2 ( 186990 2124660 ) M2M3_PR_M
- NEW met1 ( 2225250 38930 ) M1M2_PR
- NEW met1 ( 164450 2118370 ) M1M2_PR
- NEW met1 ( 164450 38930 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2619700 0 ) ( 607430 * )
+ NEW met2 ( 607430 2615790 ) ( * 2619700 )
+ NEW met2 ( 2225250 2380 0 ) ( * 26350 )
+ NEW met2 ( 1245450 26350 ) ( * 2615790 )
+ NEW met1 ( 607430 2615790 ) ( 1245450 * )
+ NEW met1 ( 1245450 26350 ) ( 2225250 * )
+ NEW met2 ( 607430 2619700 ) M2M3_PR_M
+ NEW met1 ( 607430 2615790 ) M1M2_PR
+ NEW met1 ( 1245450 26350 ) M1M2_PR
+ NEW met1 ( 1245450 2615790 ) M1M2_PR
+ NEW met1 ( 2225250 26350 ) M1M2_PR ;
- la_data_in[91] ( PIN la_data_in[91] ) ( chip_controller la_data_in[91] ) + USE SIGNAL
- + ROUTED met2 ( 2243190 2380 0 ) ( * 1778030 )
- NEW met2 ( 524630 1778030 ) ( * 1800300 0 )
- NEW met1 ( 524630 1778030 ) ( 2243190 * )
- NEW met1 ( 2243190 1778030 ) M1M2_PR
- NEW met1 ( 524630 1778030 ) M1M2_PR ;
+ + ROUTED met2 ( 2243190 2380 0 ) ( * 16490 )
+ NEW met1 ( 2218350 16490 ) ( 2243190 * )
+ NEW met2 ( 2218350 16490 ) ( * 177990 )
+ NEW met2 ( 537050 177990 ) ( * 2300100 0 )
+ NEW met1 ( 537050 177990 ) ( 2218350 * )
+ NEW met1 ( 2243190 16490 ) M1M2_PR
+ NEW met1 ( 2218350 16490 ) M1M2_PR
+ NEW met1 ( 2218350 177990 ) M1M2_PR
+ NEW met1 ( 537050 177990 ) M1M2_PR ;
- la_data_in[92] ( PIN la_data_in[92] ) ( chip_controller la_data_in[92] ) + USE SIGNAL
- + ROUTED met1 ( 528310 1790270 ) ( 530610 * )
- NEW met2 ( 528310 1790270 ) ( * 1800300 0 )
- NEW met2 ( 530610 46750 ) ( * 1790270 )
- NEW met1 ( 530610 46750 ) ( 2260670 * )
- NEW met2 ( 2260670 2380 0 ) ( * 46750 )
- NEW met1 ( 530610 46750 ) M1M2_PR
- NEW met1 ( 530610 1790270 ) M1M2_PR
- NEW met1 ( 528310 1790270 ) M1M2_PR
- NEW met1 ( 2260670 46750 ) M1M2_PR ;
+ + ROUTED met2 ( 189750 2602190 ) ( * 2602700 )
+ NEW met3 ( 189750 2602700 ) ( 200100 * )
+ NEW met3 ( 200100 2602020 0 ) ( * 2602700 )
+ NEW met1 ( 167670 2602190 ) ( 189750 * )
+ NEW met2 ( 2260670 2380 0 ) ( * 3060 )
+ NEW met2 ( 2259750 3060 ) ( 2260670 * )
+ NEW met2 ( 2259750 2380 ) ( * 3060 )
+ NEW met2 ( 2258370 2380 ) ( 2259750 * )
+ NEW met1 ( 167670 66130 ) ( 2258370 * )
+ NEW met2 ( 2258370 2380 ) ( * 66130 )
+ NEW met2 ( 167670 66130 ) ( * 2602190 )
+ NEW met1 ( 189750 2602190 ) M1M2_PR
+ NEW met2 ( 189750 2602700 ) M2M3_PR_M
+ NEW met1 ( 167670 2602190 ) M1M2_PR
+ NEW met1 ( 167670 66130 ) M1M2_PR
+ NEW met1 ( 2258370 66130 ) M1M2_PR ;
- la_data_in[93] ( PIN la_data_in[93] ) ( chip_controller la_data_in[93] ) + USE SIGNAL
- + ROUTED met2 ( 529690 1800300 ) ( 530610 * 0 )
- NEW met2 ( 529690 46410 ) ( * 1800300 )
- NEW met1 ( 529690 46410 ) ( 2278610 * )
- NEW met2 ( 2278610 2380 0 ) ( * 46410 )
- NEW met1 ( 529690 46410 ) M1M2_PR
- NEW met1 ( 2278610 46410 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2626500 0 ) ( 608350 * )
+ NEW met2 ( 608350 2622590 ) ( * 2626500 )
+ NEW met1 ( 608350 2622590 ) ( 1121250 * )
+ NEW met2 ( 2278610 2380 0 ) ( * 24990 )
+ NEW met1 ( 1121250 24990 ) ( 2278610 * )
+ NEW met2 ( 1121250 24990 ) ( * 2622590 )
+ NEW met2 ( 608350 2626500 ) M2M3_PR_M
+ NEW met1 ( 608350 2622590 ) M1M2_PR
+ NEW met1 ( 1121250 24990 ) M1M2_PR
+ NEW met1 ( 1121250 2622590 ) M1M2_PR
+ NEW met1 ( 2278610 24990 ) M1M2_PR ;
- la_data_in[94] ( PIN la_data_in[94] ) ( chip_controller la_data_in[94] ) + USE SIGNAL
- + ROUTED met3 ( 519570 2210340 ) ( 921610 * )
- NEW met1 ( 921610 1744030 ) ( 2291030 * )
- NEW met2 ( 519570 2199460 0 ) ( * 2210340 )
- NEW met2 ( 921610 1744030 ) ( * 2210340 )
+ + ROUTED met2 ( 189750 2608820 ) ( * 2608990 )
+ NEW met3 ( 189750 2608820 ) ( 201020 * )
+ NEW met3 ( 201020 2608820 ) ( * 2609500 0 )
+ NEW met1 ( 149270 2608990 ) ( 189750 * )
+ NEW met2 ( 149270 162350 ) ( * 2608990 )
NEW met2 ( 2291030 82800 ) ( 2296090 * )
NEW met2 ( 2296090 2380 0 ) ( * 82800 )
- NEW met2 ( 2291030 82800 ) ( * 1744030 )
- NEW met2 ( 519570 2210340 ) M2M3_PR_M
- NEW met1 ( 921610 1744030 ) M1M2_PR
- NEW met2 ( 921610 2210340 ) M2M3_PR_M
- NEW met1 ( 2291030 1744030 ) M1M2_PR ;
+ NEW met1 ( 149270 162350 ) ( 2291030 * )
+ NEW met2 ( 2291030 82800 ) ( * 162350 )
+ NEW met1 ( 189750 2608990 ) M1M2_PR
+ NEW met2 ( 189750 2608820 ) M2M3_PR_M
+ NEW met1 ( 149270 2608990 ) M1M2_PR
+ NEW met1 ( 149270 162350 ) M1M2_PR
+ NEW met1 ( 2291030 162350 ) M1M2_PR ;
- la_data_in[95] ( PIN la_data_in[95] ) ( chip_controller la_data_in[95] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2130780 0 ) ( 607890 * )
- NEW met2 ( 607890 2125850 ) ( * 2130780 )
- NEW met2 ( 2314030 2380 0 ) ( * 26350 )
- NEW met1 ( 607890 2125850 ) ( 1141950 * )
- NEW met1 ( 1141950 26350 ) ( 2314030 * )
- NEW met2 ( 1141950 26350 ) ( * 2125850 )
- NEW met2 ( 607890 2130780 ) M2M3_PR_M
- NEW met1 ( 607890 2125850 ) M1M2_PR
- NEW met1 ( 2314030 26350 ) M1M2_PR
- NEW met1 ( 1141950 26350 ) M1M2_PR
- NEW met1 ( 1141950 2125850 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2632620 0 ) ( 608810 * )
+ NEW met2 ( 608810 2629390 ) ( * 2632620 )
+ NEW met2 ( 2314030 2380 0 ) ( * 25670 )
+ NEW met2 ( 1266610 25670 ) ( * 2629390 )
+ NEW met1 ( 608810 2629390 ) ( 1266610 * )
+ NEW met1 ( 1266610 25670 ) ( 2314030 * )
+ NEW met2 ( 608810 2632620 ) M2M3_PR_M
+ NEW met1 ( 608810 2629390 ) M1M2_PR
+ NEW met1 ( 1266610 25670 ) M1M2_PR
+ NEW met1 ( 1266610 2629390 ) M1M2_PR
+ NEW met1 ( 2314030 25670 ) M1M2_PR ;
- la_data_in[96] ( PIN la_data_in[96] ) ( chip_controller la_data_in[96] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2136900 0 ) ( 607430 * )
- NEW met2 ( 607430 2133330 ) ( * 2136900 )
+ + ROUTED met2 ( 189750 2615450 ) ( * 2616300 )
+ NEW met3 ( 189750 2616300 ) ( 201020 * )
+ NEW met3 ( 201020 2616300 ) ( * 2616980 0 )
NEW met2 ( 2331510 2380 0 ) ( * 3060 )
NEW met2 ( 2330590 3060 ) ( 2331510 * )
NEW met2 ( 2330590 2380 ) ( * 3060 )
NEW met2 ( 2329210 2380 ) ( 2330590 * )
- NEW met2 ( 2325990 82800 ) ( * 86190 )
NEW met2 ( 2325990 82800 ) ( 2329210 * )
NEW met2 ( 2329210 2380 ) ( * 82800 )
- NEW met1 ( 607430 2133330 ) ( 756010 * )
- NEW met1 ( 756010 86190 ) ( 2325990 * )
- NEW met2 ( 756010 86190 ) ( * 2133330 )
- NEW met2 ( 607430 2136900 ) M2M3_PR_M
- NEW met1 ( 607430 2133330 ) M1M2_PR
- NEW met1 ( 2325990 86190 ) M1M2_PR
- NEW met1 ( 756010 86190 ) M1M2_PR
- NEW met1 ( 756010 2133330 ) M1M2_PR ;
+ NEW met2 ( 2325990 82800 ) ( * 169150 )
+ NEW met1 ( 154790 2615450 ) ( 189750 * )
+ NEW met2 ( 154790 169150 ) ( * 2615450 )
+ NEW met1 ( 154790 169150 ) ( 2325990 * )
+ NEW met1 ( 189750 2615450 ) M1M2_PR
+ NEW met2 ( 189750 2616300 ) M2M3_PR_M
+ NEW met1 ( 2325990 169150 ) M1M2_PR
+ NEW met1 ( 154790 2615450 ) M1M2_PR
+ NEW met1 ( 154790 169150 ) M1M2_PR ;
- la_data_in[97] ( PIN la_data_in[97] ) ( chip_controller la_data_in[97] ) + USE SIGNAL
- + ROUTED met2 ( 189290 2132650 ) ( * 2138940 )
- NEW met3 ( 189290 2138940 ) ( 200100 * 0 )
- NEW met2 ( 2349450 2380 0 ) ( * 38590 )
- NEW met1 ( 174110 2132650 ) ( 189290 * )
- NEW met1 ( 174110 38590 ) ( 2349450 * )
- NEW met2 ( 174110 38590 ) ( * 2132650 )
- NEW met1 ( 189290 2132650 ) M1M2_PR
- NEW met2 ( 189290 2138940 ) M2M3_PR_M
- NEW met1 ( 2349450 38590 ) M1M2_PR
- NEW met1 ( 174110 2132650 ) M1M2_PR
- NEW met1 ( 174110 38590 ) M1M2_PR ;
+ + ROUTED met2 ( 2346230 82800 ) ( * 100130 )
+ NEW met2 ( 2346230 82800 ) ( 2349450 * )
+ NEW met2 ( 2349450 2380 0 ) ( * 82800 )
+ NEW met1 ( 555450 100130 ) ( 2346230 * )
+ NEW met2 ( 555450 100130 ) ( * 2256300 )
+ NEW met2 ( 554990 2256300 ) ( 555450 * )
+ NEW met2 ( 554990 2256300 ) ( * 2284630 )
+ NEW met1 ( 545330 2284630 ) ( 554990 * )
+ NEW met2 ( 545330 2284630 ) ( * 2300100 0 )
+ NEW met1 ( 2346230 100130 ) M1M2_PR
+ NEW met1 ( 555450 100130 ) M1M2_PR
+ NEW met1 ( 554990 2284630 ) M1M2_PR
+ NEW met1 ( 545330 2284630 ) M1M2_PR ;
- la_data_in[98] ( PIN la_data_in[98] ) ( chip_controller la_data_in[98] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2141660 0 ) ( 607430 * )
- NEW met2 ( 607430 2139110 ) ( * 2141660 )
- NEW met2 ( 1162650 26010 ) ( * 2139110 )
- NEW met1 ( 607430 2139110 ) ( 1162650 * )
- NEW met2 ( 2367390 2380 0 ) ( * 26010 )
- NEW met1 ( 1162650 26010 ) ( 2367390 * )
- NEW met2 ( 607430 2141660 ) M2M3_PR_M
- NEW met1 ( 607430 2139110 ) M1M2_PR
- NEW met1 ( 1162650 26010 ) M1M2_PR
- NEW met1 ( 1162650 2139110 ) M1M2_PR
- NEW met1 ( 2367390 26010 ) M1M2_PR ;
+ + ROUTED met2 ( 2252850 82800 ) ( 2253310 * )
+ NEW met2 ( 2253310 17850 ) ( * 82800 )
+ NEW met2 ( 2252850 82800 ) ( * 184450 )
+ NEW met1 ( 551770 184450 ) ( 2252850 * )
+ NEW met2 ( 2367390 2380 0 ) ( * 17850 )
+ NEW met1 ( 2253310 17850 ) ( 2367390 * )
+ NEW met2 ( 549930 2285140 ) ( 551770 * )
+ NEW met2 ( 549930 2285140 ) ( * 2300100 )
+ NEW met2 ( 548550 2300100 0 ) ( 549930 * )
+ NEW met2 ( 551770 184450 ) ( * 2285140 )
+ NEW met1 ( 2253310 17850 ) M1M2_PR
+ NEW met1 ( 2252850 184450 ) M1M2_PR
+ NEW met1 ( 551770 184450 ) M1M2_PR
+ NEW met1 ( 2367390 17850 ) M1M2_PR ;
- la_data_in[99] ( PIN la_data_in[99] ) ( chip_controller la_data_in[99] ) + USE SIGNAL
- + ROUTED met3 ( 530610 2211020 ) ( 914250 * )
- NEW met2 ( 2384870 2380 0 ) ( * 3060 )
- NEW met2 ( 2383950 3060 ) ( 2384870 * )
- NEW met2 ( 2383950 2380 ) ( * 3060 )
- NEW met2 ( 2382570 2380 ) ( 2383950 * )
- NEW met1 ( 914250 1743350 ) ( 2380730 * )
- NEW met2 ( 530610 2199460 0 ) ( * 2211020 )
- NEW met2 ( 914250 1743350 ) ( * 2211020 )
- NEW met2 ( 2380730 82800 ) ( 2382570 * )
- NEW met2 ( 2382570 2380 ) ( * 82800 )
- NEW met2 ( 2380730 82800 ) ( * 1743350 )
- NEW met2 ( 530610 2211020 ) M2M3_PR_M
- NEW met1 ( 914250 1743350 ) M1M2_PR
- NEW met2 ( 914250 2211020 ) M2M3_PR_M
- NEW met1 ( 2380730 1743350 ) M1M2_PR ;
+ + ROUTED met2 ( 1287310 29750 ) ( * 2749070 )
+ NEW met2 ( 538430 2699940 ) ( 539810 * 0 )
+ NEW met2 ( 2384870 2380 0 ) ( * 29750 )
+ NEW met1 ( 1287310 29750 ) ( 2384870 * )
+ NEW met2 ( 538430 2699940 ) ( * 2749070 )
+ NEW met1 ( 538430 2749070 ) ( 1287310 * )
+ NEW met1 ( 1287310 29750 ) M1M2_PR
+ NEW met1 ( 1287310 2749070 ) M1M2_PR
+ NEW met1 ( 2384870 29750 ) M1M2_PR
+ NEW met1 ( 538430 2749070 ) M1M2_PR ;
- la_data_in[9] ( PIN la_data_in[9] ) ( chip_controller la_data_in[9] ) + USE SIGNAL
- + ROUTED met3 ( 197570 1867620 ) ( 200100 * 0 )
+ + ROUTED met3 ( 599380 2359940 0 ) ( * 2360620 )
+ NEW met3 ( 599380 2360620 ) ( 606970 * )
+ NEW met2 ( 606970 2360620 ) ( * 2361130 )
NEW met2 ( 786830 82800 ) ( 789130 * )
NEW met2 ( 789130 2380 0 ) ( * 82800 )
- NEW met2 ( 786830 82800 ) ( * 1796390 )
- NEW met1 ( 197570 1796390 ) ( 786830 * )
- NEW met2 ( 197570 1796390 ) ( * 1867620 )
- NEW met2 ( 197570 1867620 ) M2M3_PR_M
- NEW met1 ( 197570 1796390 ) M1M2_PR
- NEW met1 ( 786830 1796390 ) M1M2_PR ;
+ NEW met2 ( 786830 82800 ) ( * 2361130 )
+ NEW met1 ( 606970 2361130 ) ( 786830 * )
+ NEW met2 ( 606970 2360620 ) M2M3_PR_M
+ NEW met1 ( 606970 2361130 ) M1M2_PR
+ NEW met1 ( 786830 2361130 ) M1M2_PR ;
- la_data_out[0] ( PIN la_data_out[0] ) ( chip_controller la_data_out[0] ) + USE SIGNAL
- + ROUTED met3 ( 599380 1823420 0 ) ( 610190 * )
- NEW met2 ( 610190 1823250 ) ( * 1823420 )
- NEW met1 ( 610190 1823250 ) ( 635030 * )
- NEW met2 ( 635030 2380 0 ) ( * 1823250 )
- NEW met2 ( 610190 1823420 ) M2M3_PR_M
- NEW met1 ( 610190 1823250 ) M1M2_PR
- NEW met1 ( 635030 1823250 ) M1M2_PR ;
+ + ROUTED met2 ( 202170 2699260 0 ) ( 203090 * )
+ NEW met2 ( 203090 2699260 ) ( * 2713710 )
+ NEW met2 ( 251850 2710310 ) ( * 2713710 )
+ NEW met1 ( 203090 2713710 ) ( 251850 * )
+ NEW met1 ( 251850 2710310 ) ( 635030 * )
+ NEW met2 ( 635030 2380 0 ) ( * 2710310 )
+ NEW met1 ( 203090 2713710 ) M1M2_PR
+ NEW met1 ( 251850 2713710 ) M1M2_PR
+ NEW met1 ( 251850 2710310 ) M1M2_PR
+ NEW met1 ( 635030 2710310 ) M1M2_PR ;
- la_data_out[100] ( PIN la_data_out[100] ) ( chip_controller la_data_out[100] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2144380 0 ) ( 607890 * )
- NEW met2 ( 607890 2139450 ) ( * 2144380 )
- NEW met2 ( 983250 362270 ) ( * 2139450 )
- NEW met2 ( 2408790 2380 0 ) ( * 362270 )
- NEW met1 ( 607890 2139450 ) ( 983250 * )
- NEW met1 ( 983250 362270 ) ( 2408790 * )
- NEW met2 ( 607890 2144380 ) M2M3_PR_M
- NEW met1 ( 607890 2139450 ) M1M2_PR
- NEW met1 ( 983250 2139450 ) M1M2_PR
- NEW met1 ( 983250 362270 ) M1M2_PR
- NEW met1 ( 2408790 362270 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2643500 0 ) ( 607430 * )
+ NEW met2 ( 607430 2642990 ) ( * 2643500 )
+ NEW met2 ( 2408330 82800 ) ( 2408790 * )
+ NEW met2 ( 2408790 2380 0 ) ( * 82800 )
+ NEW met2 ( 2408330 82800 ) ( * 142970 )
+ NEW met1 ( 607430 2642990 ) ( 1114810 * )
+ NEW met2 ( 1114810 142970 ) ( * 2642990 )
+ NEW met1 ( 1114810 142970 ) ( 2408330 * )
+ NEW met2 ( 607430 2643500 ) M2M3_PR_M
+ NEW met1 ( 607430 2642990 ) M1M2_PR
+ NEW met1 ( 2408330 142970 ) M1M2_PR
+ NEW met1 ( 1114810 142970 ) M1M2_PR
+ NEW met1 ( 1114810 2642990 ) M1M2_PR ;
- la_data_out[101] ( PIN la_data_out[101] ) ( chip_controller la_data_out[101] ) + USE SIGNAL
+ ROUTED met2 ( 2426270 2380 0 ) ( * 3060 )
NEW met2 ( 2425350 3060 ) ( 2426270 * )
NEW met2 ( 2425350 2380 ) ( * 3060 )
NEW met2 ( 2423970 2380 ) ( 2425350 * )
+ NEW met3 ( 599380 2646900 0 ) ( 608810 * )
+ NEW met2 ( 608810 2643330 ) ( * 2646900 )
NEW met2 ( 2422130 82800 ) ( 2423970 * )
NEW met2 ( 2423970 2380 ) ( * 82800 )
- NEW met2 ( 2422130 82800 ) ( * 1766130 )
- NEW met3 ( 535670 2209660 ) ( 1011310 * )
- NEW met1 ( 1011310 1766130 ) ( 2422130 * )
- NEW met2 ( 535670 2199460 0 ) ( * 2209660 )
- NEW met2 ( 1011310 1766130 ) ( * 2209660 )
- NEW met1 ( 2422130 1766130 ) M1M2_PR
- NEW met2 ( 535670 2209660 ) M2M3_PR_M
- NEW met1 ( 1011310 1766130 ) M1M2_PR
- NEW met2 ( 1011310 2209660 ) M2M3_PR_M ;
+ NEW met2 ( 2422130 82800 ) ( * 149090 )
+ NEW met1 ( 608810 2643330 ) ( 934950 * )
+ NEW met2 ( 934950 149090 ) ( * 2643330 )
+ NEW met1 ( 934950 149090 ) ( 2422130 * )
+ NEW met2 ( 608810 2646900 ) M2M3_PR_M
+ NEW met1 ( 608810 2643330 ) M1M2_PR
+ NEW met1 ( 2422130 149090 ) M1M2_PR
+ NEW met1 ( 934950 149090 ) M1M2_PR
+ NEW met1 ( 934950 2643330 ) M1M2_PR ;
- la_data_out[102] ( PIN la_data_out[102] ) ( chip_controller la_data_out[102] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2150500 0 ) ( 607430 * )
- NEW met2 ( 607430 2146590 ) ( * 2150500 )
- NEW met2 ( 666770 1757290 ) ( * 2146590 )
+ + ROUTED met3 ( 599380 2649620 0 ) ( 607430 * )
+ NEW met2 ( 607430 2649620 ) ( * 2650470 )
NEW met2 ( 2442830 82800 ) ( 2444210 * )
NEW met2 ( 2444210 2380 0 ) ( * 82800 )
- NEW met2 ( 2442830 82800 ) ( * 1757290 )
- NEW met1 ( 607430 2146590 ) ( 666770 * )
- NEW met1 ( 666770 1757290 ) ( 2442830 * )
- NEW met2 ( 607430 2150500 ) M2M3_PR_M
- NEW met1 ( 607430 2146590 ) M1M2_PR
- NEW met1 ( 666770 1757290 ) M1M2_PR
- NEW met1 ( 666770 2146590 ) M1M2_PR
- NEW met1 ( 2442830 1757290 ) M1M2_PR ;
+ NEW met2 ( 2442830 82800 ) ( * 149430 )
+ NEW met1 ( 607430 2650470 ) ( 1141950 * )
+ NEW met2 ( 1141950 149430 ) ( * 2650470 )
+ NEW met1 ( 1141950 149430 ) ( 2442830 * )
+ NEW met2 ( 607430 2649620 ) M2M3_PR_M
+ NEW met1 ( 607430 2650470 ) M1M2_PR
+ NEW met1 ( 2442830 149430 ) M1M2_PR
+ NEW met1 ( 1141950 149430 ) M1M2_PR
+ NEW met1 ( 1141950 2650470 ) M1M2_PR ;
- la_data_out[103] ( PIN la_data_out[103] ) ( chip_controller la_data_out[103] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2151860 0 ) ( 608350 * )
- NEW met2 ( 608350 2146250 ) ( * 2151860 )
- NEW met2 ( 900450 31790 ) ( * 2146250 )
- NEW met1 ( 608350 2146250 ) ( 900450 * )
- NEW met2 ( 2461690 2380 0 ) ( * 31790 )
- NEW met1 ( 900450 31790 ) ( 2461690 * )
- NEW met2 ( 608350 2151860 ) M2M3_PR_M
- NEW met1 ( 608350 2146250 ) M1M2_PR
- NEW met1 ( 900450 31790 ) M1M2_PR
- NEW met1 ( 900450 2146250 ) M1M2_PR
- NEW met1 ( 2461690 31790 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2653020 0 ) ( 607890 * )
+ NEW met2 ( 607890 2650130 ) ( * 2653020 )
+ NEW met2 ( 1190710 24650 ) ( * 2650130 )
+ NEW met2 ( 2461690 2380 0 ) ( * 24650 )
+ NEW met1 ( 1190710 24650 ) ( 2461690 * )
+ NEW met1 ( 607890 2650130 ) ( 1190710 * )
+ NEW met1 ( 1190710 24650 ) M1M2_PR
+ NEW met2 ( 607890 2653020 ) M2M3_PR_M
+ NEW met1 ( 607890 2650130 ) M1M2_PR
+ NEW met1 ( 1190710 2650130 ) M1M2_PR
+ NEW met1 ( 2461690 24650 ) M1M2_PR ;
- la_data_out[104] ( PIN la_data_out[104] ) ( chip_controller la_data_out[104] ) + USE SIGNAL
- + ROUTED met1 ( 552690 1790270 ) ( 558670 * )
- NEW met2 ( 552690 1790270 ) ( * 1800300 0 )
- NEW met2 ( 558670 46070 ) ( * 1790270 )
- NEW met1 ( 558670 46070 ) ( 2479630 * )
- NEW met2 ( 2479630 2380 0 ) ( * 46070 )
- NEW met1 ( 558670 46070 ) M1M2_PR
- NEW met1 ( 558670 1790270 ) M1M2_PR
- NEW met1 ( 552690 1790270 ) M1M2_PR
- NEW met1 ( 2479630 46070 ) M1M2_PR ;
+ + ROUTED met2 ( 188370 2630070 ) ( * 2630580 )
+ NEW met3 ( 188370 2630580 ) ( 201020 * )
+ NEW met3 ( 201020 2630580 ) ( * 2631260 0 )
+ NEW met1 ( 140530 2630070 ) ( 188370 * )
+ NEW met2 ( 2479630 2380 0 ) ( * 3060 )
+ NEW met2 ( 2478710 3060 ) ( 2479630 * )
+ NEW met2 ( 2478710 2380 ) ( * 3060 )
+ NEW met2 ( 2477330 2380 ) ( 2478710 * )
+ NEW met2 ( 140530 65790 ) ( * 2630070 )
+ NEW met1 ( 140530 65790 ) ( 2477330 * )
+ NEW met2 ( 2477330 2380 ) ( * 65790 )
+ NEW met1 ( 188370 2630070 ) M1M2_PR
+ NEW met2 ( 188370 2630580 ) M2M3_PR_M
+ NEW met1 ( 140530 2630070 ) M1M2_PR
+ NEW met1 ( 140530 65790 ) M1M2_PR
+ NEW met1 ( 2477330 65790 ) M1M2_PR ;
- la_data_out[105] ( PIN la_data_out[105] ) ( chip_controller la_data_out[105] ) + USE SIGNAL
- + ROUTED met1 ( 554530 1787210 ) ( 558210 * )
- NEW met2 ( 554530 1787210 ) ( * 1800300 0 )
- NEW met2 ( 558210 45730 ) ( * 1787210 )
- NEW met1 ( 558210 45730 ) ( 2497110 * )
- NEW met2 ( 2497110 2380 0 ) ( * 45730 )
- NEW met1 ( 558210 45730 ) M1M2_PR
- NEW met1 ( 558210 1787210 ) M1M2_PR
- NEW met1 ( 554530 1787210 ) M1M2_PR
- NEW met1 ( 2497110 45730 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2654380 0 ) ( 608810 * )
+ NEW met2 ( 608810 2649790 ) ( * 2654380 )
+ NEW met2 ( 2497110 2380 0 ) ( * 34170 )
+ NEW met1 ( 1211410 34170 ) ( 2497110 * )
+ NEW met1 ( 608810 2649790 ) ( 1211410 * )
+ NEW met2 ( 1211410 34170 ) ( * 2649790 )
+ NEW met2 ( 608810 2654380 ) M2M3_PR_M
+ NEW met1 ( 608810 2649790 ) M1M2_PR
+ NEW met1 ( 1211410 34170 ) M1M2_PR
+ NEW met1 ( 2497110 34170 ) M1M2_PR
+ NEW met1 ( 1211410 2649790 ) M1M2_PR ;
- la_data_out[106] ( PIN la_data_out[106] ) ( chip_controller la_data_out[106] ) + USE SIGNAL
- + ROUTED met2 ( 2515050 2380 0 ) ( * 17340 )
- NEW met2 ( 2514590 17340 ) ( 2515050 * )
- NEW met2 ( 2514590 17340 ) ( * 45390 )
- NEW met2 ( 556830 1800300 0 ) ( 557750 * )
- NEW met2 ( 557750 45390 ) ( * 1800300 )
- NEW met1 ( 557750 45390 ) ( 2514590 * )
- NEW met1 ( 2514590 45390 ) M1M2_PR
- NEW met1 ( 557750 45390 ) M1M2_PR ;
+ + ROUTED met2 ( 1287770 43690 ) ( * 2743290 )
+ NEW met2 ( 2515050 2380 0 ) ( * 43690 )
+ NEW met2 ( 559130 2699260 0 ) ( 559590 * )
+ NEW met2 ( 559590 2699260 ) ( * 2743290 )
+ NEW met1 ( 559590 2743290 ) ( 1287770 * )
+ NEW met1 ( 1287770 43690 ) ( 2515050 * )
+ NEW met1 ( 1287770 43690 ) M1M2_PR
+ NEW met1 ( 1287770 2743290 ) M1M2_PR
+ NEW met1 ( 2515050 43690 ) M1M2_PR
+ NEW met1 ( 559590 2743290 ) M1M2_PR ;
- la_data_out[107] ( PIN la_data_out[107] ) ( chip_controller la_data_out[107] ) + USE SIGNAL
- + ROUTED met2 ( 187910 2153050 ) ( * 2155940 )
- NEW met3 ( 187910 2155940 ) ( 200100 * 0 )
- NEW met2 ( 2532530 2380 0 ) ( * 34500 )
- NEW met2 ( 2532530 34500 ) ( 2533450 * )
- NEW met2 ( 2533450 34500 ) ( * 1798090 )
- NEW met1 ( 169970 2153050 ) ( 187910 * )
- NEW met1 ( 169970 1798090 ) ( 2533450 * )
- NEW met2 ( 169970 1798090 ) ( * 2153050 )
- NEW met1 ( 187910 2153050 ) M1M2_PR
- NEW met2 ( 187910 2155940 ) M2M3_PR_M
- NEW met1 ( 2533450 1798090 ) M1M2_PR
- NEW met1 ( 169970 2153050 ) M1M2_PR
- NEW met1 ( 169970 1798090 ) M1M2_PR ;
+ + ROUTED met2 ( 2532530 2380 0 ) ( * 38930 )
+ NEW met2 ( 565570 38930 ) ( * 2300100 0 )
+ NEW met1 ( 565570 38930 ) ( 2532530 * )
+ NEW met1 ( 2532530 38930 ) M1M2_PR
+ NEW met1 ( 565570 38930 ) M1M2_PR ;
- la_data_out[108] ( PIN la_data_out[108] ) ( chip_controller la_data_out[108] ) + USE SIGNAL
- + ROUTED met2 ( 189750 2159850 ) ( * 2160700 )
- NEW met3 ( 189750 2160700 ) ( 200100 * 0 )
- NEW met1 ( 164910 2159850 ) ( 189750 * )
- NEW met1 ( 164910 37910 ) ( 2550470 * )
- NEW met2 ( 2550470 2380 0 ) ( * 37910 )
- NEW met2 ( 164910 37910 ) ( * 2159850 )
- NEW met1 ( 189750 2159850 ) M1M2_PR
- NEW met2 ( 189750 2160700 ) M2M3_PR_M
- NEW met1 ( 164910 37910 ) M1M2_PR
- NEW met1 ( 164910 2159850 ) M1M2_PR
- NEW met1 ( 2550470 37910 ) M1M2_PR ;
+ + ROUTED met2 ( 189750 2643330 ) ( * 2643500 )
+ NEW met3 ( 189750 2643500 ) ( 201020 * )
+ NEW met3 ( 201020 2643500 ) ( * 2644180 0 )
+ NEW met2 ( 2550470 2380 0 ) ( * 3060 )
+ NEW met2 ( 2549550 3060 ) ( 2550470 * )
+ NEW met2 ( 2549550 2380 ) ( * 3060 )
+ NEW met2 ( 2548170 2380 ) ( 2549550 * )
+ NEW met1 ( 160770 2643330 ) ( 189750 * )
+ NEW met1 ( 160770 65450 ) ( 2548170 * )
+ NEW met2 ( 2548170 2380 ) ( * 65450 )
+ NEW met2 ( 160770 65450 ) ( * 2643330 )
+ NEW met1 ( 189750 2643330 ) M1M2_PR
+ NEW met2 ( 189750 2643500 ) M2M3_PR_M
+ NEW met1 ( 160770 65450 ) M1M2_PR
+ NEW met1 ( 160770 2643330 ) M1M2_PR
+ NEW met1 ( 2548170 65450 ) M1M2_PR ;
- la_data_out[109] ( PIN la_data_out[109] ) ( chip_controller la_data_out[109] ) + USE SIGNAL
- + ROUTED met2 ( 189290 2160190 ) ( * 2162740 )
- NEW met3 ( 189290 2162740 ) ( 200100 * 0 )
- NEW met1 ( 163070 1755930 ) ( 2567030 * )
- NEW met1 ( 163070 2160190 ) ( 189290 * )
- NEW met2 ( 2567030 82800 ) ( 2567950 * )
- NEW met2 ( 2567950 2380 0 ) ( * 82800 )
- NEW met2 ( 2567030 82800 ) ( * 1755930 )
- NEW met2 ( 163070 1755930 ) ( * 2160190 )
- NEW met1 ( 189290 2160190 ) M1M2_PR
- NEW met2 ( 189290 2162740 ) M2M3_PR_M
- NEW met1 ( 163070 1755930 ) M1M2_PR
- NEW met1 ( 2567030 1755930 ) M1M2_PR
- NEW met1 ( 163070 2160190 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2662540 0 ) ( 609270 * )
+ NEW met2 ( 609270 2656930 ) ( * 2662540 )
+ NEW met1 ( 609270 2656930 ) ( 1204510 * )
+ NEW met2 ( 1204510 53210 ) ( * 2656930 )
+ NEW met1 ( 1204510 53210 ) ( 2567950 * )
+ NEW met2 ( 2567950 2380 0 ) ( * 53210 )
+ NEW met2 ( 609270 2662540 ) M2M3_PR_M
+ NEW met1 ( 609270 2656930 ) M1M2_PR
+ NEW met1 ( 1204510 53210 ) M1M2_PR
+ NEW met1 ( 1204510 2656930 ) M1M2_PR
+ NEW met1 ( 2567950 53210 ) M1M2_PR ;
- la_data_out[10] ( PIN la_data_out[10] ) ( chip_controller la_data_out[10] ) + USE SIGNAL
- + ROUTED met3 ( 599380 1880540 0 ) ( 607430 * )
- NEW met2 ( 607430 1876970 ) ( * 1880540 )
+ + ROUTED met2 ( 191130 2360110 ) ( * 2365380 )
+ NEW met3 ( 191130 2365380 ) ( 201020 * )
+ NEW met3 ( 201020 2365380 ) ( * 2366060 0 )
NEW met2 ( 812590 2380 0 ) ( * 3060 )
NEW met2 ( 811670 3060 ) ( 812590 * )
NEW met2 ( 811670 2380 ) ( * 3060 )
NEW met2 ( 810290 2380 ) ( 811670 * )
+ NEW met1 ( 178250 2360110 ) ( 191130 * )
NEW met2 ( 807530 82800 ) ( 810290 * )
NEW met2 ( 810290 2380 ) ( * 82800 )
- NEW met1 ( 607430 1876970 ) ( 807530 * )
- NEW met2 ( 807530 82800 ) ( * 1876970 )
- NEW met2 ( 607430 1880540 ) M2M3_PR_M
- NEW met1 ( 607430 1876970 ) M1M2_PR
- NEW met1 ( 807530 1876970 ) M1M2_PR ;
+ NEW met2 ( 807530 82800 ) ( * 2292450 )
+ NEW li1 ( 178250 2306730 ) ( * 2312850 )
+ NEW met1 ( 178250 2306730 ) ( 179170 * )
+ NEW met2 ( 179170 2292450 ) ( * 2306730 )
+ NEW met2 ( 178250 2312850 ) ( * 2360110 )
+ NEW met1 ( 179170 2292450 ) ( 807530 * )
+ NEW met1 ( 191130 2360110 ) M1M2_PR
+ NEW met2 ( 191130 2365380 ) M2M3_PR_M
+ NEW met1 ( 178250 2360110 ) M1M2_PR
+ NEW met1 ( 807530 2292450 ) M1M2_PR
+ NEW li1 ( 178250 2312850 ) L1M1_PR_MR
+ NEW met1 ( 178250 2312850 ) M1M2_PR
+ NEW li1 ( 178250 2306730 ) L1M1_PR_MR
+ NEW met1 ( 179170 2306730 ) M1M2_PR
+ NEW met1 ( 179170 2292450 ) M1M2_PR
+ NEW met1 ( 178250 2312850 ) RECT ( -355 -70 0 70 ) ;
- la_data_out[110] ( PIN la_data_out[110] ) ( chip_controller la_data_out[110] ) + USE SIGNAL
- + ROUTED met2 ( 189290 2166650 ) ( * 2168180 )
- NEW met3 ( 189290 2168180 ) ( 200100 * 0 )
- NEW met1 ( 162610 2166650 ) ( 189290 * )
- NEW met2 ( 2581290 82800 ) ( 2585890 * )
- NEW met2 ( 2585890 2380 0 ) ( * 82800 )
- NEW met1 ( 162610 1797410 ) ( 2581290 * )
- NEW met2 ( 2581290 82800 ) ( * 1797410 )
- NEW met2 ( 162610 1797410 ) ( * 2166650 )
- NEW met1 ( 189290 2166650 ) M1M2_PR
- NEW met2 ( 189290 2168180 ) M2M3_PR_M
- NEW met1 ( 162610 1797410 ) M1M2_PR
- NEW met1 ( 162610 2166650 ) M1M2_PR
- NEW met1 ( 2581290 1797410 ) M1M2_PR ;
+ + ROUTED met2 ( 566030 2699260 0 ) ( 566490 * )
+ NEW met2 ( 566490 2699260 ) ( * 2743630 )
+ NEW met2 ( 1273050 44370 ) ( * 2743630 )
+ NEW met1 ( 566490 2743630 ) ( 1273050 * )
+ NEW met1 ( 1273050 44370 ) ( 2585890 * )
+ NEW met2 ( 2585890 2380 0 ) ( * 44370 )
+ NEW met1 ( 566490 2743630 ) M1M2_PR
+ NEW met1 ( 1273050 44370 ) M1M2_PR
+ NEW met1 ( 1273050 2743630 ) M1M2_PR
+ NEW met1 ( 2585890 44370 ) M1M2_PR ;
- la_data_out[111] ( PIN la_data_out[111] ) ( chip_controller la_data_out[111] ) + USE SIGNAL
+ ROUTED met2 ( 2603830 2380 0 ) ( * 3060 )
NEW met2 ( 2602910 3060 ) ( 2603830 * )
NEW met2 ( 2602910 2380 ) ( * 3060 )
NEW met2 ( 2601530 2380 ) ( 2602910 * )
- NEW met2 ( 887110 1763750 ) ( * 2211700 )
- NEW met2 ( 2601530 2380 ) ( * 1763750 )
- NEW met3 ( 551770 2211700 ) ( 887110 * )
- NEW met1 ( 887110 1763750 ) ( 2601530 * )
- NEW met2 ( 551770 2199460 0 ) ( * 2211700 )
- NEW met1 ( 887110 1763750 ) M1M2_PR
- NEW met2 ( 887110 2211700 ) M2M3_PR_M
- NEW met1 ( 2601530 1763750 ) M1M2_PR
- NEW met2 ( 551770 2211700 ) M2M3_PR_M ;
+ NEW met2 ( 983250 156230 ) ( * 2671550 )
+ NEW met2 ( 2601530 2380 ) ( * 156230 )
+ NEW met1 ( 983250 156230 ) ( 2601530 * )
+ NEW met3 ( 599380 2670700 0 ) ( 613870 * )
+ NEW met2 ( 613870 2670700 ) ( * 2671550 )
+ NEW met1 ( 613870 2671550 ) ( 983250 * )
+ NEW met1 ( 983250 156230 ) M1M2_PR
+ NEW met1 ( 983250 2671550 ) M1M2_PR
+ NEW met1 ( 2601530 156230 ) M1M2_PR
+ NEW met2 ( 613870 2670700 ) M2M3_PR_M
+ NEW met1 ( 613870 2671550 ) M1M2_PR ;
- la_data_out[112] ( PIN la_data_out[112] ) ( chip_controller la_data_out[112] ) + USE SIGNAL
- + ROUTED li1 ( 587190 2208810 ) ( * 2210170 )
- NEW met2 ( 2621310 2380 0 ) ( * 31450 )
- NEW met2 ( 976350 31450 ) ( * 2210170 )
- NEW met1 ( 554990 2208810 ) ( 587190 * )
- NEW met1 ( 587190 2210170 ) ( 976350 * )
- NEW met1 ( 976350 31450 ) ( 2621310 * )
- NEW met2 ( 554990 2199460 0 ) ( * 2208810 )
- NEW li1 ( 587190 2208810 ) L1M1_PR_MR
- NEW li1 ( 587190 2210170 ) L1M1_PR_MR
- NEW met1 ( 976350 31450 ) M1M2_PR
- NEW met1 ( 976350 2210170 ) M1M2_PR
- NEW met1 ( 2621310 31450 ) M1M2_PR
- NEW met1 ( 554990 2208810 ) M1M2_PR ;
+ + ROUTED met2 ( 2621310 2380 0 ) ( * 30940 )
+ NEW met2 ( 187910 2650810 ) ( * 2652340 )
+ NEW met3 ( 187910 2652340 ) ( 201020 * )
+ NEW met3 ( 201020 2652340 ) ( * 2653020 0 )
+ NEW met3 ( 146970 30940 ) ( 2621310 * )
+ NEW met2 ( 146970 30940 ) ( * 2650810 )
+ NEW met1 ( 146970 2650810 ) ( 187910 * )
+ NEW met2 ( 2621310 30940 ) M2M3_PR_M
+ NEW met1 ( 187910 2650810 ) M1M2_PR
+ NEW met2 ( 187910 2652340 ) M2M3_PR_M
+ NEW met2 ( 146970 30940 ) M2M3_PR_M
+ NEW met1 ( 146970 2650810 ) M1M2_PR ;
- la_data_out[113] ( PIN la_data_out[113] ) ( chip_controller la_data_out[113] ) + USE SIGNAL
- + ROUTED met2 ( 2639250 2380 0 ) ( * 18190 )
- NEW met3 ( 191130 2171580 ) ( 200100 * 0 )
- NEW met2 ( 2508150 18190 ) ( * 1797580 )
- NEW met1 ( 2508150 18190 ) ( 2639250 * )
- NEW met3 ( 191130 1797580 ) ( 2508150 * )
- NEW met2 ( 191130 1797580 ) ( * 2171580 )
- NEW met1 ( 2508150 18190 ) M1M2_PR
- NEW met1 ( 2639250 18190 ) M1M2_PR
- NEW met2 ( 191130 1797580 ) M2M3_PR_M
- NEW met2 ( 191130 2171580 ) M2M3_PR_M
- NEW met2 ( 2508150 1797580 ) M2M3_PR_M ;
+ + ROUTED met1 ( 575230 2277830 ) ( 579370 * )
+ NEW met2 ( 575230 2277830 ) ( * 2300100 )
+ NEW met2 ( 573850 2300100 0 ) ( 575230 * )
+ NEW met2 ( 579370 38590 ) ( * 2277830 )
+ NEW met2 ( 2639250 2380 0 ) ( * 38590 )
+ NEW met1 ( 579370 38590 ) ( 2639250 * )
+ NEW met1 ( 579370 38590 ) M1M2_PR
+ NEW met1 ( 579370 2277830 ) M1M2_PR
+ NEW met1 ( 575230 2277830 ) M1M2_PR
+ NEW met1 ( 2639250 38590 ) M1M2_PR ;
- la_data_out[114] ( PIN la_data_out[114] ) ( chip_controller la_data_out[114] ) + USE SIGNAL
- + ROUTED met2 ( 571090 1800300 0 ) ( 572470 * )
- NEW met2 ( 572470 45050 ) ( * 1800300 )
- NEW met1 ( 572470 45050 ) ( 2656730 * )
- NEW met2 ( 2656730 2380 0 ) ( * 45050 )
- NEW met1 ( 572470 45050 ) M1M2_PR
- NEW met1 ( 2656730 45050 ) M1M2_PR ;
+ + ROUTED met2 ( 578910 2278340 ) ( 579370 * )
+ NEW met2 ( 579370 2278340 ) ( * 2288030 )
+ NEW met1 ( 575690 2288030 ) ( 579370 * )
+ NEW met2 ( 575690 2288030 ) ( * 2300100 0 )
+ NEW met2 ( 578910 38250 ) ( * 2278340 )
+ NEW met1 ( 578910 38250 ) ( 2656730 * )
+ NEW met2 ( 2656730 2380 0 ) ( * 38250 )
+ NEW met1 ( 578910 38250 ) M1M2_PR
+ NEW met1 ( 579370 2288030 ) M1M2_PR
+ NEW met1 ( 575690 2288030 ) M1M2_PR
+ NEW met1 ( 2656730 38250 ) M1M2_PR ;
- la_data_out[115] ( PIN la_data_out[115] ) ( chip_controller la_data_out[115] ) + USE SIGNAL
- + ROUTED met3 ( 190210 2172940 ) ( 200100 * 0 )
- NEW met2 ( 2674670 2380 0 ) ( * 17510 )
- NEW met1 ( 2363250 17510 ) ( 2674670 * )
- NEW met3 ( 190210 1798260 ) ( 2363250 * )
- NEW met2 ( 2363250 17510 ) ( * 1798260 )
- NEW met2 ( 190210 1798260 ) ( * 2172940 )
- NEW met2 ( 190210 1798260 ) M2M3_PR_M
- NEW met2 ( 190210 2172940 ) M2M3_PR_M
- NEW met1 ( 2363250 17510 ) M1M2_PR
- NEW met1 ( 2674670 17510 ) M1M2_PR
- NEW met2 ( 2363250 1798260 ) M2M3_PR_M ;
+ + ROUTED met2 ( 2674670 2380 0 ) ( * 3060 )
+ NEW met2 ( 2673750 3060 ) ( 2674670 * )
+ NEW met2 ( 2673750 2380 ) ( * 3060 )
+ NEW met2 ( 2672370 2380 ) ( 2673750 * )
+ NEW met2 ( 1225210 60010 ) ( * 2670870 )
+ NEW met1 ( 1225210 60010 ) ( 2672370 * )
+ NEW met2 ( 2672370 2380 ) ( * 60010 )
+ NEW met3 ( 599380 2676820 0 ) ( 610650 * )
+ NEW met2 ( 610650 2670870 ) ( * 2676820 )
+ NEW met1 ( 610650 2670870 ) ( 1225210 * )
+ NEW met1 ( 1225210 60010 ) M1M2_PR
+ NEW met1 ( 1225210 2670870 ) M1M2_PR
+ NEW met1 ( 2672370 60010 ) M1M2_PR
+ NEW met2 ( 610650 2676820 ) M2M3_PR_M
+ NEW met1 ( 610650 2670870 ) M1M2_PR ;
- la_data_out[116] ( PIN la_data_out[116] ) ( chip_controller la_data_out[116] ) + USE SIGNAL
- + ROUTED met1 ( 568330 2213570 ) ( 571550 * )
- NEW met2 ( 571550 2213570 ) ( * 2213740 )
- NEW met2 ( 571550 2213740 ) ( 573390 * )
- NEW met2 ( 573390 2213230 ) ( * 2213740 )
- NEW met2 ( 568330 2199460 0 ) ( * 2213570 )
- NEW met2 ( 2691230 82800 ) ( 2692150 * )
- NEW met2 ( 2692150 2380 0 ) ( * 82800 )
- NEW met2 ( 2691230 82800 ) ( * 1756610 )
- NEW met1 ( 573390 2213230 ) ( 625370 * )
- NEW met1 ( 625370 1756610 ) ( 2691230 * )
- NEW met2 ( 625370 1756610 ) ( * 2213230 )
- NEW met1 ( 568330 2213570 ) M1M2_PR
- NEW met1 ( 571550 2213570 ) M1M2_PR
- NEW met1 ( 573390 2213230 ) M1M2_PR
- NEW met1 ( 2691230 1756610 ) M1M2_PR
- NEW met1 ( 625370 1756610 ) M1M2_PR
- NEW met1 ( 625370 2213230 ) M1M2_PR ;
+ + ROUTED met2 ( 573390 2699940 ) ( 574770 * 0 )
+ NEW met2 ( 573390 2699940 ) ( * 2743970 )
+ NEW met2 ( 1273510 48110 ) ( * 2743970 )
+ NEW met2 ( 2692150 2380 0 ) ( * 48110 )
+ NEW met1 ( 573390 2743970 ) ( 1273510 * )
+ NEW met1 ( 1273510 48110 ) ( 2692150 * )
+ NEW met1 ( 573390 2743970 ) M1M2_PR
+ NEW met1 ( 1273510 48110 ) M1M2_PR
+ NEW met1 ( 1273510 2743970 ) M1M2_PR
+ NEW met1 ( 2692150 48110 ) M1M2_PR ;
- la_data_out[117] ( PIN la_data_out[117] ) ( chip_controller la_data_out[117] ) + USE SIGNAL
- + ROUTED met2 ( 2710090 2380 0 ) ( * 17850 )
- NEW met3 ( 191590 2176340 ) ( 200100 * 0 )
- NEW met1 ( 2356350 17850 ) ( 2710090 * )
- NEW met3 ( 191590 1798940 ) ( 2356350 * )
- NEW met2 ( 2356350 17850 ) ( * 1798940 )
- NEW met2 ( 191590 1798940 ) ( * 2176340 )
- NEW met1 ( 2710090 17850 ) M1M2_PR
- NEW met2 ( 191590 1798940 ) M2M3_PR_M
- NEW met2 ( 191590 2176340 ) M2M3_PR_M
- NEW met1 ( 2356350 17850 ) M1M2_PR
- NEW met2 ( 2356350 1798940 ) M2M3_PR_M ;
+ + ROUTED met2 ( 1162650 73270 ) ( * 2677330 )
+ NEW met2 ( 2710090 2380 0 ) ( * 73270 )
+ NEW met1 ( 1162650 73270 ) ( 2710090 * )
+ NEW met3 ( 599380 2679540 0 ) ( 609270 * )
+ NEW met2 ( 609270 2677330 ) ( * 2679540 )
+ NEW met1 ( 609270 2677330 ) ( 1162650 * )
+ NEW met1 ( 1162650 73270 ) M1M2_PR
+ NEW met1 ( 1162650 2677330 ) M1M2_PR
+ NEW met1 ( 2710090 73270 ) M1M2_PR
+ NEW met2 ( 609270 2679540 ) M2M3_PR_M
+ NEW met1 ( 609270 2677330 ) M1M2_PR ;
- la_data_out[118] ( PIN la_data_out[118] ) ( chip_controller la_data_out[118] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2183820 0 ) ( 607430 * )
- NEW met2 ( 607430 2181270 ) ( * 2183820 )
- NEW met2 ( 686550 39270 ) ( * 2181270 )
- NEW met2 ( 2727570 2380 0 ) ( * 39270 )
- NEW met1 ( 607430 2181270 ) ( 686550 * )
- NEW met1 ( 686550 39270 ) ( 2727570 * )
- NEW met2 ( 607430 2183820 ) M2M3_PR_M
- NEW met1 ( 607430 2181270 ) M1M2_PR
- NEW met1 ( 686550 39270 ) M1M2_PR
- NEW met1 ( 686550 2181270 ) M1M2_PR
- NEW met1 ( 2727570 39270 ) M1M2_PR ;
+ + ROUTED met2 ( 2727570 2380 0 ) ( * 52530 )
+ NEW met2 ( 1025110 52530 ) ( * 2677670 )
+ NEW met1 ( 1025110 52530 ) ( 2727570 * )
+ NEW met3 ( 599380 2681580 0 ) ( 613410 * )
+ NEW met2 ( 613410 2677670 ) ( * 2681580 )
+ NEW met1 ( 613410 2677670 ) ( 1025110 * )
+ NEW met1 ( 2727570 52530 ) M1M2_PR
+ NEW met1 ( 1025110 52530 ) M1M2_PR
+ NEW met1 ( 1025110 2677670 ) M1M2_PR
+ NEW met2 ( 613410 2681580 ) M2M3_PR_M
+ NEW met1 ( 613410 2677670 ) M1M2_PR ;
- la_data_out[119] ( PIN la_data_out[119] ) ( chip_controller la_data_out[119] ) + USE SIGNAL
- + ROUTED met2 ( 189750 2180590 ) ( * 2181780 )
- NEW met3 ( 189750 2181780 ) ( 200100 * 0 )
- NEW met2 ( 2745510 2380 0 ) ( * 3060 )
- NEW met2 ( 2744590 3060 ) ( 2745510 * )
- NEW met2 ( 2744590 2380 ) ( * 3060 )
- NEW met2 ( 2743210 2380 ) ( 2744590 * )
- NEW met1 ( 170430 2180590 ) ( 189750 * )
- NEW met2 ( 2739530 82800 ) ( 2743210 * )
- NEW met2 ( 2743210 2380 ) ( * 82800 )
- NEW met3 ( 170430 1796900 ) ( 2739530 * )
- NEW met2 ( 2739530 82800 ) ( * 1796900 )
- NEW met2 ( 170430 1796900 ) ( * 2180590 )
- NEW met1 ( 189750 2180590 ) M1M2_PR
- NEW met2 ( 189750 2181780 ) M2M3_PR_M
- NEW met2 ( 170430 1796900 ) M2M3_PR_M
- NEW met1 ( 170430 2180590 ) M1M2_PR
- NEW met2 ( 2739530 1796900 ) M2M3_PR_M ;
+ + ROUTED met1 ( 589030 2288030 ) ( 593170 * )
+ NEW met2 ( 589030 2288030 ) ( * 2300100 0 )
+ NEW met2 ( 593170 37910 ) ( * 2288030 )
+ NEW met1 ( 593170 37910 ) ( 2745510 * )
+ NEW met2 ( 2745510 2380 0 ) ( * 37910 )
+ NEW met1 ( 593170 37910 ) M1M2_PR
+ NEW met1 ( 593170 2288030 ) M1M2_PR
+ NEW met1 ( 589030 2288030 ) M1M2_PR
+ NEW met1 ( 2745510 37910 ) M1M2_PR ;
- la_data_out[11] ( PIN la_data_out[11] ) ( chip_controller la_data_out[11] ) + USE SIGNAL
- + ROUTED met3 ( 188370 1879860 ) ( 200100 * 0 )
+ + ROUTED met2 ( 310730 2278510 ) ( * 2284630 )
+ NEW met1 ( 294630 2284630 ) ( 310730 * )
+ NEW met2 ( 294630 2284630 ) ( * 2300100 0 )
NEW met2 ( 828230 82800 ) ( 830530 * )
NEW met2 ( 830530 2380 0 ) ( * 82800 )
- NEW met1 ( 188830 1796730 ) ( 828230 * )
- NEW met2 ( 828230 82800 ) ( * 1796730 )
- NEW met2 ( 188370 1826820 ) ( 188830 * )
- NEW met2 ( 188370 1826820 ) ( * 1879860 )
- NEW met2 ( 188830 1796730 ) ( * 1826820 )
- NEW met1 ( 188830 1796730 ) M1M2_PR
- NEW met2 ( 188370 1879860 ) M2M3_PR_M
- NEW met1 ( 828230 1796730 ) M1M2_PR ;
+ NEW met1 ( 310730 2278510 ) ( 828230 * )
+ NEW met2 ( 828230 82800 ) ( * 2278510 )
+ NEW met1 ( 310730 2278510 ) M1M2_PR
+ NEW met1 ( 310730 2284630 ) M1M2_PR
+ NEW met1 ( 294630 2284630 ) M1M2_PR
+ NEW met1 ( 828230 2278510 ) M1M2_PR ;
- la_data_out[120] ( PIN la_data_out[120] ) ( chip_controller la_data_out[120] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2187220 0 ) ( 608350 * )
- NEW met2 ( 608350 2180930 ) ( * 2187220 )
- NEW met1 ( 608350 2180930 ) ( 831450 * )
- NEW met2 ( 831450 58990 ) ( * 2180930 )
- NEW met1 ( 831450 58990 ) ( 2763450 * )
- NEW met2 ( 2763450 2380 0 ) ( * 58990 )
- NEW met2 ( 608350 2187220 ) M2M3_PR_M
- NEW met1 ( 608350 2180930 ) M1M2_PR
- NEW met1 ( 831450 58990 ) M1M2_PR
- NEW met1 ( 831450 2180930 ) M1M2_PR
- NEW met1 ( 2763450 58990 ) M1M2_PR ;
+ + ROUTED met3 ( 185380 2674100 ) ( 201020 * )
+ NEW met3 ( 201020 2674100 ) ( * 2674780 0 )
+ NEW met2 ( 2760230 82800 ) ( 2763450 * )
+ NEW met2 ( 2763450 2380 0 ) ( * 82800 )
+ NEW met3 ( 185380 175780 ) ( 2760230 * )
+ NEW met2 ( 2760230 82800 ) ( * 175780 )
+ NEW met4 ( 185380 175780 ) ( * 2674100 )
+ NEW met3 ( 185380 175780 ) M3M4_PR_M
+ NEW met3 ( 185380 2674100 ) M3M4_PR_M
+ NEW met2 ( 2760230 175780 ) M2M3_PR_M ;
- la_data_out[121] ( PIN la_data_out[121] ) ( chip_controller la_data_out[121] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2188580 0 ) ( 607430 * )
- NEW met2 ( 607430 2188580 ) ( * 2189430 )
- NEW met2 ( 673210 99790 ) ( * 2189430 )
- NEW met2 ( 2780930 2380 0 ) ( * 17340 )
- NEW met2 ( 2780930 17340 ) ( 2781390 * )
- NEW met1 ( 673210 99790 ) ( 2781390 * )
- NEW met1 ( 607430 2189430 ) ( 673210 * )
- NEW met2 ( 2781390 17340 ) ( * 99790 )
- NEW met1 ( 673210 99790 ) M1M2_PR
- NEW met2 ( 607430 2188580 ) M2M3_PR_M
- NEW met1 ( 607430 2189430 ) M1M2_PR
- NEW met1 ( 673210 2189430 ) M1M2_PR
- NEW met1 ( 2781390 99790 ) M1M2_PR ;
+ + ROUTED met2 ( 581670 2699260 0 ) ( 583050 * )
+ NEW met2 ( 583050 2699260 ) ( * 2703340 )
+ NEW met2 ( 1274430 47770 ) ( * 2703340 )
+ NEW met1 ( 1274430 47770 ) ( 2780930 * )
+ NEW met2 ( 2780930 2380 0 ) ( * 47770 )
+ NEW met3 ( 583050 2703340 ) ( 1274430 * )
+ NEW met2 ( 583050 2703340 ) M2M3_PR_M
+ NEW met2 ( 1274430 2703340 ) M2M3_PR_M
+ NEW met1 ( 1274430 47770 ) M1M2_PR
+ NEW met1 ( 2780930 47770 ) M1M2_PR ;
- la_data_out[122] ( PIN la_data_out[122] ) ( chip_controller la_data_out[122] ) + USE SIGNAL
- + ROUTED met1 ( 587190 1787210 ) ( 593170 * )
- NEW met2 ( 587190 1787210 ) ( * 1800300 0 )
- NEW met2 ( 593170 44710 ) ( * 1787210 )
- NEW met2 ( 2798870 2380 0 ) ( * 44710 )
- NEW met1 ( 593170 44710 ) ( 2798870 * )
- NEW met1 ( 593170 44710 ) M1M2_PR
- NEW met1 ( 593170 1787210 ) M1M2_PR
- NEW met1 ( 587190 1787210 ) M1M2_PR
- NEW met1 ( 2798870 44710 ) M1M2_PR ;
+ + ROUTED met2 ( 584890 2699260 0 ) ( 585810 * )
+ NEW met2 ( 585810 2699260 ) ( * 2707420 )
+ NEW met2 ( 1273970 47430 ) ( * 2707420 )
+ NEW met2 ( 2798870 2380 0 ) ( * 47430 )
+ NEW met1 ( 1273970 47430 ) ( 2798870 * )
+ NEW met3 ( 585810 2707420 ) ( 1273970 * )
+ NEW met2 ( 585810 2707420 ) M2M3_PR_M
+ NEW met2 ( 1273970 2707420 ) M2M3_PR_M
+ NEW met1 ( 1273970 47430 ) M1M2_PR
+ NEW met1 ( 2798870 47430 ) M1M2_PR ;
- la_data_out[123] ( PIN la_data_out[123] ) ( chip_controller la_data_out[123] ) + USE SIGNAL
- + ROUTED met2 ( 2816350 2380 0 ) ( * 31110 )
- NEW met3 ( 599380 2192660 0 ) ( 608810 * )
- NEW met2 ( 608810 2189090 ) ( * 2192660 )
- NEW met2 ( 707250 31110 ) ( * 2189090 )
- NEW met1 ( 707250 31110 ) ( 2816350 * )
- NEW met1 ( 608810 2189090 ) ( 707250 * )
- NEW met1 ( 707250 31110 ) M1M2_PR
- NEW met1 ( 2816350 31110 ) M1M2_PR
- NEW met2 ( 608810 2192660 ) M2M3_PR_M
- NEW met1 ( 608810 2189090 ) M1M2_PR
- NEW met1 ( 707250 2189090 ) M1M2_PR ;
+ + ROUTED met2 ( 592250 2699260 0 ) ( 593170 * )
+ NEW met2 ( 593170 2699260 ) ( * 2703850 )
+ NEW met2 ( 2816350 2380 0 ) ( * 58990 )
+ NEW met1 ( 617550 59670 ) ( 647450 * )
+ NEW li1 ( 647450 58990 ) ( * 59670 )
+ NEW met1 ( 647450 58990 ) ( 2816350 * )
+ NEW met2 ( 593630 2703850 ) ( * 2712180 )
+ NEW met3 ( 593630 2712180 ) ( 594780 * )
+ NEW met3 ( 594780 2712180 ) ( * 2712860 )
+ NEW met3 ( 594780 2712860 ) ( 617550 * )
+ NEW met1 ( 593170 2703850 ) ( 593630 * )
+ NEW met2 ( 617550 59670 ) ( * 2712860 )
+ NEW met1 ( 593170 2703850 ) M1M2_PR
+ NEW met1 ( 2816350 58990 ) M1M2_PR
+ NEW met1 ( 617550 59670 ) M1M2_PR
+ NEW li1 ( 647450 59670 ) L1M1_PR_MR
+ NEW li1 ( 647450 58990 ) L1M1_PR_MR
+ NEW met1 ( 593630 2703850 ) M1M2_PR
+ NEW met2 ( 593630 2712180 ) M2M3_PR_M
+ NEW met2 ( 617550 2712860 ) M2M3_PR_M ;
- la_data_out[124] ( PIN la_data_out[124] ) ( chip_controller la_data_out[124] ) + USE SIGNAL
- + ROUTED met2 ( 586270 2199460 0 ) ( * 2211530 )
- NEW met2 ( 762450 1735870 ) ( * 2211190 )
+ + ROUTED met2 ( 189290 2684470 ) ( * 2689740 )
+ NEW met3 ( 189290 2689740 ) ( 200100 * )
+ NEW met3 ( 200100 2689060 0 ) ( * 2689740 )
NEW met2 ( 2829230 82800 ) ( 2834290 * )
NEW met2 ( 2834290 2380 0 ) ( * 82800 )
- NEW met2 ( 2829230 82800 ) ( * 1735870 )
- NEW met1 ( 586270 2211530 ) ( 614100 * )
- NEW met1 ( 614100 2211190 ) ( * 2211530 )
- NEW met1 ( 614100 2211190 ) ( 762450 * )
- NEW met1 ( 762450 1735870 ) ( 2829230 * )
- NEW met1 ( 586270 2211530 ) M1M2_PR
- NEW met1 ( 762450 1735870 ) M1M2_PR
- NEW met1 ( 762450 2211190 ) M1M2_PR
- NEW met1 ( 2829230 1735870 ) M1M2_PR ;
+ NEW met2 ( 2829230 82800 ) ( * 1804890 )
+ NEW met1 ( 169050 2684470 ) ( 189290 * )
+ NEW met1 ( 169050 1804890 ) ( 2829230 * )
+ NEW met2 ( 169050 1804890 ) ( * 2684470 )
+ NEW met1 ( 189290 2684470 ) M1M2_PR
+ NEW met2 ( 189290 2689740 ) M2M3_PR_M
+ NEW met1 ( 2829230 1804890 ) M1M2_PR
+ NEW met1 ( 169050 1804890 ) M1M2_PR
+ NEW met1 ( 169050 2684470 ) M1M2_PR ;
- la_data_out[125] ( PIN la_data_out[125] ) ( chip_controller la_data_out[125] ) + USE SIGNAL
- + ROUTED met2 ( 587650 2199460 0 ) ( * 2208810 )
- NEW met1 ( 587650 2208810 ) ( 646530 * )
- NEW met1 ( 646530 1735530 ) ( 2849930 * )
- NEW met2 ( 646530 1735530 ) ( * 2208810 )
+ + ROUTED met3 ( 200100 2691100 0 ) ( * 2692460 )
+ NEW met3 ( 199870 2692460 ) ( 200100 * )
+ NEW met2 ( 199870 2692460 ) ( * 2694670 )
+ NEW met2 ( 1322270 1723630 ) ( * 2694670 )
NEW met2 ( 2849930 82800 ) ( 2851770 * )
NEW met2 ( 2851770 2380 0 ) ( * 82800 )
- NEW met2 ( 2849930 82800 ) ( * 1735530 )
- NEW met1 ( 587650 2208810 ) M1M2_PR
- NEW met1 ( 646530 1735530 ) M1M2_PR
- NEW met1 ( 646530 2208810 ) M1M2_PR
- NEW met1 ( 2849930 1735530 ) M1M2_PR ;
+ NEW met1 ( 1322270 1723630 ) ( 2849930 * )
+ NEW met2 ( 2849930 82800 ) ( * 1723630 )
+ NEW met1 ( 199870 2694670 ) ( 1322270 * )
+ NEW met2 ( 199870 2692460 ) M2M3_PR_M
+ NEW met1 ( 199870 2694670 ) M1M2_PR
+ NEW met1 ( 1322270 2694670 ) M1M2_PR
+ NEW met1 ( 1322270 1723630 ) M1M2_PR
+ NEW met1 ( 2849930 1723630 ) M1M2_PR ;
- la_data_out[126] ( PIN la_data_out[126] ) ( chip_controller la_data_out[126] ) + USE SIGNAL
- + ROUTED met3 ( 199410 2196740 ) ( 200100 * 0 )
- NEW met2 ( 199410 2196740 ) ( * 2200310 )
- NEW met2 ( 593630 2200310 ) ( * 2200820 )
- NEW met2 ( 790050 1763410 ) ( * 2200820 )
+ + ROUTED met2 ( 1356310 1710370 ) ( * 2692970 )
NEW met2 ( 2869710 2380 0 ) ( * 3060 )
NEW met2 ( 2868790 3060 ) ( 2869710 * )
NEW met2 ( 2868790 2380 ) ( * 3060 )
NEW met2 ( 2867410 2380 ) ( 2868790 * )
- NEW met1 ( 790050 1763410 ) ( 2864190 * )
- NEW met1 ( 199410 2200310 ) ( 593630 * )
- NEW met3 ( 593630 2200820 ) ( 790050 * )
- NEW met2 ( 2864190 82800 ) ( 2867410 * )
+ NEW met2 ( 2863730 82800 ) ( 2867410 * )
NEW met2 ( 2867410 2380 ) ( * 82800 )
- NEW met2 ( 2864190 82800 ) ( * 1763410 )
- NEW met1 ( 790050 1763410 ) M1M2_PR
- NEW met2 ( 199410 2196740 ) M2M3_PR_M
- NEW met1 ( 199410 2200310 ) M1M2_PR
- NEW met1 ( 593630 2200310 ) M1M2_PR
- NEW met2 ( 593630 2200820 ) M2M3_PR_M
- NEW met2 ( 790050 2200820 ) M2M3_PR_M
- NEW met1 ( 2864190 1763410 ) M1M2_PR ;
+ NEW met1 ( 1356310 1710370 ) ( 2863730 * )
+ NEW met2 ( 2863730 82800 ) ( * 1710370 )
+ NEW met3 ( 599380 2695860 0 ) ( 613870 * )
+ NEW met2 ( 613870 2692970 ) ( * 2695860 )
+ NEW met1 ( 613870 2692970 ) ( 1356310 * )
+ NEW met1 ( 1356310 2692970 ) M1M2_PR
+ NEW met1 ( 1356310 1710370 ) M1M2_PR
+ NEW met1 ( 2863730 1710370 ) M1M2_PR
+ NEW met2 ( 613870 2695860 ) M2M3_PR_M
+ NEW met1 ( 613870 2692970 ) M1M2_PR ;
- la_data_out[127] ( PIN la_data_out[127] ) ( chip_controller la_data_out[127] ) + USE SIGNAL
- + ROUTED met1 ( 598230 2199630 ) ( 611110 * )
- NEW met2 ( 598230 2199460 ) ( * 2199630 )
- NEW met2 ( 597310 2199460 0 ) ( 598230 * )
- NEW met2 ( 2887190 2380 0 ) ( * 38250 )
- NEW met1 ( 611110 38250 ) ( 2887190 * )
- NEW met2 ( 611110 38250 ) ( * 2199630 )
- NEW met1 ( 611110 38250 ) M1M2_PR
- NEW met1 ( 611110 2199630 ) M1M2_PR
- NEW met1 ( 598230 2199630 ) M1M2_PR
- NEW met1 ( 2887190 38250 ) M1M2_PR ;
+ + ROUTED met2 ( 188830 2691270 ) ( * 2695860 )
+ NEW met3 ( 188830 2695860 ) ( 201020 * )
+ NEW met3 ( 201020 2695860 ) ( * 2696540 0 )
+ NEW met2 ( 2887190 2380 0 ) ( * 3060 )
+ NEW met2 ( 2886270 3060 ) ( 2887190 * )
+ NEW met2 ( 2886270 2380 ) ( * 3060 )
+ NEW met2 ( 2884890 2380 ) ( 2886270 * )
+ NEW met2 ( 2884430 82800 ) ( 2884890 * )
+ NEW met2 ( 2884890 2380 ) ( * 82800 )
+ NEW met2 ( 2884430 82800 ) ( * 1797410 )
+ NEW met1 ( 175950 2691270 ) ( 188830 * )
+ NEW met1 ( 175950 1797410 ) ( 2884430 * )
+ NEW met2 ( 175950 1797410 ) ( * 2691270 )
+ NEW met1 ( 188830 2691270 ) M1M2_PR
+ NEW met2 ( 188830 2695860 ) M2M3_PR_M
+ NEW met1 ( 2884430 1797410 ) M1M2_PR
+ NEW met1 ( 175950 2691270 ) M1M2_PR
+ NEW met1 ( 175950 1797410 ) M1M2_PR ;
- la_data_out[12] ( PIN la_data_out[12] ) ( chip_controller la_data_out[12] ) + USE SIGNAL
- + ROUTED met3 ( 195270 1888020 ) ( 200100 * 0 )
- NEW met2 ( 848010 2380 0 ) ( * 17340 )
- NEW met2 ( 844790 17340 ) ( 848010 * )
- NEW met2 ( 842030 82800 ) ( 844790 * )
- NEW met2 ( 844790 17340 ) ( * 82800 )
- NEW met1 ( 195270 1797070 ) ( 842030 * )
- NEW met2 ( 842030 82800 ) ( * 1797070 )
- NEW met2 ( 195270 1797070 ) ( * 1888020 )
- NEW met1 ( 195270 1797070 ) M1M2_PR
- NEW met2 ( 195270 1888020 ) M2M3_PR_M
- NEW met1 ( 842030 1797070 ) M1M2_PR ;
+ + ROUTED met2 ( 289110 2699260 0 ) ( 289570 * )
+ NEW met2 ( 289570 2699260 ) ( * 2707250 )
+ NEW met1 ( 842030 58310 ) ( 848010 * )
+ NEW met2 ( 848010 2380 0 ) ( * 58310 )
+ NEW met2 ( 842030 58310 ) ( * 2707250 )
+ NEW met1 ( 289570 2707250 ) ( 842030 * )
+ NEW met1 ( 289570 2707250 ) M1M2_PR
+ NEW met1 ( 842030 2707250 ) M1M2_PR
+ NEW met1 ( 842030 58310 ) M1M2_PR
+ NEW met1 ( 848010 58310 ) M1M2_PR ;
- la_data_out[13] ( PIN la_data_out[13] ) ( chip_controller la_data_out[13] ) + USE SIGNAL
- + ROUTED met2 ( 865950 2380 0 ) ( * 17340 )
- NEW met2 ( 865490 17340 ) ( 865950 * )
- NEW met1 ( 290030 1787210 ) ( 296470 * )
- NEW met2 ( 290030 1787210 ) ( * 1800300 0 )
- NEW met2 ( 296470 48110 ) ( * 1787210 )
- NEW met2 ( 865490 17340 ) ( * 48110 )
- NEW met1 ( 296470 48110 ) ( 865490 * )
- NEW met1 ( 296470 48110 ) M1M2_PR
- NEW met1 ( 296470 1787210 ) M1M2_PR
- NEW met1 ( 290030 1787210 ) M1M2_PR
- NEW met1 ( 865490 48110 ) M1M2_PR ;
+ + ROUTED met2 ( 296010 2699940 ) ( 296470 * 0 )
+ NEW met2 ( 296010 2699940 ) ( * 2714050 )
+ NEW met2 ( 396290 2702150 ) ( * 2714050 )
+ NEW met2 ( 865950 2380 0 ) ( * 3060 )
+ NEW met2 ( 865030 3060 ) ( 865950 * )
+ NEW met2 ( 865030 2380 ) ( * 3060 )
+ NEW met2 ( 863650 2380 ) ( 865030 * )
+ NEW met2 ( 862730 82800 ) ( 863650 * )
+ NEW met2 ( 863650 2380 ) ( * 82800 )
+ NEW met2 ( 862730 82800 ) ( * 2702150 )
+ NEW met1 ( 296010 2714050 ) ( 396290 * )
+ NEW met1 ( 396290 2702150 ) ( 862730 * )
+ NEW met1 ( 296010 2714050 ) M1M2_PR
+ NEW met1 ( 396290 2714050 ) M1M2_PR
+ NEW met1 ( 396290 2702150 ) M1M2_PR
+ NEW met1 ( 862730 2702150 ) M1M2_PR ;
- la_data_out[14] ( PIN la_data_out[14] ) ( chip_controller la_data_out[14] ) + USE SIGNAL
- + ROUTED met2 ( 883430 2380 0 ) ( * 19550 )
- NEW met2 ( 306130 2199460 0 ) ( * 2206090 )
- NEW met1 ( 631810 19550 ) ( 883430 * )
- NEW met1 ( 306130 2206090 ) ( 631810 * )
- NEW met2 ( 631810 19550 ) ( * 2206090 )
- NEW met1 ( 883430 19550 ) M1M2_PR
- NEW met1 ( 306130 2206090 ) M1M2_PR
- NEW met1 ( 631810 19550 ) M1M2_PR
- NEW met1 ( 631810 2206090 ) M1M2_PR ;
+ + ROUTED met2 ( 311650 2290750 ) ( * 2300100 0 )
+ NEW met2 ( 883430 2380 0 ) ( * 2278850 )
+ NEW met2 ( 326370 2278850 ) ( * 2290750 )
+ NEW met1 ( 311650 2290750 ) ( 326370 * )
+ NEW met1 ( 326370 2278850 ) ( 883430 * )
+ NEW met1 ( 311650 2290750 ) M1M2_PR
+ NEW met1 ( 883430 2278850 ) M1M2_PR
+ NEW met1 ( 326370 2290750 ) M1M2_PR
+ NEW met1 ( 326370 2278850 ) M1M2_PR ;
- la_data_out[15] ( PIN la_data_out[15] ) ( chip_controller la_data_out[15] ) + USE SIGNAL
- + ROUTED met2 ( 310270 47770 ) ( * 1800300 0 )
- NEW met2 ( 901370 2380 0 ) ( * 47770 )
- NEW met1 ( 310270 47770 ) ( 901370 * )
- NEW met1 ( 310270 47770 ) M1M2_PR
- NEW met1 ( 901370 47770 ) M1M2_PR ;
+ + ROUTED met2 ( 901370 2380 0 ) ( * 17340 )
+ NEW met2 ( 899990 17340 ) ( 901370 * )
+ NEW met3 ( 599380 2395980 ) ( * 2396660 0 )
+ NEW met3 ( 599380 2395980 ) ( 606970 * )
+ NEW met2 ( 606970 2394790 ) ( * 2395980 )
+ NEW met2 ( 897230 82800 ) ( 899990 * )
+ NEW met2 ( 899990 17340 ) ( * 82800 )
+ NEW met2 ( 897230 82800 ) ( * 2394790 )
+ NEW met1 ( 606970 2394790 ) ( 897230 * )
+ NEW met2 ( 606970 2395980 ) M2M3_PR_M
+ NEW met1 ( 606970 2394790 ) M1M2_PR
+ NEW met1 ( 897230 2394790 ) M1M2_PR ;
- la_data_out[16] ( PIN la_data_out[16] ) ( chip_controller la_data_out[16] ) + USE SIGNAL
- + ROUTED met3 ( 186990 1910460 ) ( 200100 * 0 )
- NEW met1 ( 186990 1766130 ) ( 917930 * )
+ + ROUTED met2 ( 191130 2415700 ) ( * 2416210 )
+ NEW met3 ( 191130 2415700 ) ( 200100 * )
+ NEW met3 ( 200100 2415020 0 ) ( * 2415700 )
+ NEW met1 ( 171810 2416210 ) ( 191130 * )
NEW met2 ( 917930 82800 ) ( 918850 * )
NEW met2 ( 918850 2380 0 ) ( * 82800 )
- NEW met2 ( 917930 82800 ) ( * 1766130 )
- NEW met2 ( 186990 1766130 ) ( * 1910460 )
- NEW met1 ( 186990 1766130 ) M1M2_PR
- NEW met2 ( 186990 1910460 ) M2M3_PR_M
- NEW met1 ( 917930 1766130 ) M1M2_PR ;
+ NEW met1 ( 171810 2282930 ) ( 917930 * )
+ NEW met2 ( 917930 82800 ) ( * 2282930 )
+ NEW met2 ( 171810 2282930 ) ( * 2416210 )
+ NEW met1 ( 191130 2416210 ) M1M2_PR
+ NEW met2 ( 191130 2415700 ) M2M3_PR_M
+ NEW met1 ( 171810 2416210 ) M1M2_PR
+ NEW met1 ( 171810 2282930 ) M1M2_PR
+ NEW met1 ( 917930 2282930 ) M1M2_PR ;
- la_data_out[17] ( PIN la_data_out[17] ) ( chip_controller la_data_out[17] ) + USE SIGNAL
- + ROUTED met3 ( 187450 1915900 ) ( 200100 * 0 )
- NEW met2 ( 936790 2380 0 ) ( * 3060 )
+ + ROUTED met2 ( 936790 2380 0 ) ( * 3060 )
NEW met2 ( 935870 3060 ) ( 936790 * )
NEW met2 ( 935870 2380 ) ( * 3060 )
NEW met2 ( 934490 2380 ) ( 935870 * )
- NEW met1 ( 187450 1769190 ) ( 931730 * )
+ NEW met2 ( 328210 2276130 ) ( * 2300100 0 )
NEW met2 ( 931730 82800 ) ( 934490 * )
NEW met2 ( 934490 2380 ) ( * 82800 )
- NEW met2 ( 931730 82800 ) ( * 1769190 )
- NEW met2 ( 187450 1769190 ) ( * 1915900 )
- NEW met1 ( 187450 1769190 ) M1M2_PR
- NEW met2 ( 187450 1915900 ) M2M3_PR_M
- NEW met1 ( 931730 1769190 ) M1M2_PR ;
+ NEW met1 ( 328210 2276130 ) ( 931730 * )
+ NEW met2 ( 931730 82800 ) ( * 2276130 )
+ NEW met1 ( 328210 2276130 ) M1M2_PR
+ NEW met1 ( 931730 2276130 ) M1M2_PR ;
- la_data_out[18] ( PIN la_data_out[18] ) ( chip_controller la_data_out[18] ) + USE SIGNAL
- + ROUTED met3 ( 599380 1927460 0 ) ( 607890 * )
- NEW met2 ( 607890 1925590 ) ( * 1927460 )
+ + ROUTED met3 ( 599380 2417060 0 ) ( 607430 * )
+ NEW met2 ( 607430 2415870 ) ( * 2417060 )
NEW met2 ( 954270 2380 0 ) ( * 3060 )
NEW met2 ( 953350 3060 ) ( 954270 * )
NEW met2 ( 953350 2380 ) ( * 3060 )
NEW met2 ( 952430 2380 ) ( 953350 * )
- NEW met2 ( 952430 2380 ) ( * 1925590 )
- NEW met1 ( 607890 1925590 ) ( 952430 * )
- NEW met2 ( 607890 1927460 ) M2M3_PR_M
- NEW met1 ( 607890 1925590 ) M1M2_PR
- NEW met1 ( 952430 1925590 ) M1M2_PR ;
+ NEW met2 ( 952430 2380 ) ( * 2415870 )
+ NEW met1 ( 607430 2415870 ) ( 952430 * )
+ NEW met2 ( 607430 2417060 ) M2M3_PR_M
+ NEW met1 ( 607430 2415870 ) M1M2_PR
+ NEW met1 ( 952430 2415870 ) M1M2_PR ;
- la_data_out[19] ( PIN la_data_out[19] ) ( chip_controller la_data_out[19] ) + USE SIGNAL
- + ROUTED met2 ( 972210 2380 0 ) ( * 19550 )
- NEW met2 ( 886650 19550 ) ( * 2197250 )
- NEW met1 ( 886650 19550 ) ( 972210 * )
- NEW met1 ( 372600 2197250 ) ( * 2199630 )
- NEW met1 ( 334650 2199630 ) ( 372600 * )
- NEW met2 ( 334650 2199460 ) ( * 2199630 )
- NEW met2 ( 334190 2199460 0 ) ( 334650 * )
- NEW met1 ( 372600 2197250 ) ( 886650 * )
- NEW met1 ( 886650 19550 ) M1M2_PR
- NEW met1 ( 972210 19550 ) M1M2_PR
- NEW met1 ( 886650 2197250 ) M1M2_PR
- NEW met1 ( 334650 2199630 ) M1M2_PR ;
+ + ROUTED met1 ( 966230 58310 ) ( 972210 * )
+ NEW met2 ( 972210 2380 0 ) ( * 58310 )
+ NEW met2 ( 966230 58310 ) ( * 2279190 )
+ NEW met2 ( 358110 2279190 ) ( * 2290070 )
+ NEW met1 ( 343390 2290070 ) ( 358110 * )
+ NEW met2 ( 343390 2290070 ) ( * 2300100 0 )
+ NEW met1 ( 358110 2279190 ) ( 966230 * )
+ NEW met1 ( 966230 58310 ) M1M2_PR
+ NEW met1 ( 972210 58310 ) M1M2_PR
+ NEW met1 ( 966230 2279190 ) M1M2_PR
+ NEW met1 ( 358110 2279190 ) M1M2_PR
+ NEW met1 ( 358110 2290070 ) M1M2_PR
+ NEW met1 ( 343390 2290070 ) M1M2_PR ;
- la_data_out[1] ( PIN la_data_out[1] ) ( chip_controller la_data_out[1] ) + USE SIGNAL
- + ROUTED met2 ( 217350 1791290 ) ( * 1800300 0 )
- NEW met1 ( 217350 1791290 ) ( 238050 * )
- NEW met2 ( 238050 40630 ) ( * 1791290 )
- NEW met1 ( 238050 40630 ) ( 652970 * )
- NEW met2 ( 652970 2380 0 ) ( * 40630 )
- NEW met1 ( 217350 1791290 ) M1M2_PR
- NEW met1 ( 238050 40630 ) M1M2_PR
- NEW met1 ( 238050 1791290 ) M1M2_PR
- NEW met1 ( 652970 40630 ) M1M2_PR ;
+ + ROUTED met2 ( 652970 2380 0 ) ( * 17340 )
+ NEW met2 ( 651590 17340 ) ( 652970 * )
+ NEW met2 ( 648830 82800 ) ( 651590 * )
+ NEW met2 ( 651590 17340 ) ( * 82800 )
+ NEW met1 ( 184690 2278170 ) ( 648830 * )
+ NEW met2 ( 648830 82800 ) ( * 2278170 )
+ NEW met3 ( 184690 2316420 ) ( 201020 * )
+ NEW met3 ( 201020 2316420 ) ( * 2317100 0 )
+ NEW met2 ( 184690 2278170 ) ( * 2316420 )
+ NEW met1 ( 184690 2278170 ) M1M2_PR
+ NEW met1 ( 648830 2278170 ) M1M2_PR
+ NEW met2 ( 184690 2316420 ) M2M3_PR_M ;
- la_data_out[20] ( PIN la_data_out[20] ) ( chip_controller la_data_out[20] ) + USE SIGNAL
- + ROUTED met2 ( 989690 2380 0 ) ( * 73270 )
- NEW met2 ( 330510 1800300 0 ) ( 330970 * )
- NEW met2 ( 330970 73270 ) ( * 1800300 )
- NEW met1 ( 330970 73270 ) ( 989690 * )
- NEW met1 ( 989690 73270 ) M1M2_PR
- NEW met1 ( 330970 73270 ) M1M2_PR ;
+ + ROUTED met2 ( 986930 82800 ) ( 989690 * )
+ NEW met2 ( 989690 2380 0 ) ( * 82800 )
+ NEW met2 ( 986930 82800 ) ( * 2279530 )
+ NEW met2 ( 350290 2279530 ) ( * 2300100 0 )
+ NEW met1 ( 350290 2279530 ) ( 986930 * )
+ NEW met1 ( 986930 2279530 ) M1M2_PR
+ NEW met1 ( 350290 2279530 ) M1M2_PR ;
- la_data_out[21] ( PIN la_data_out[21] ) ( chip_controller la_data_out[21] ) + USE SIGNAL
- + ROUTED met2 ( 955650 19890 ) ( * 2203030 )
- NEW met2 ( 1007630 2380 0 ) ( * 19890 )
- NEW met1 ( 955650 19890 ) ( 1007630 * )
- NEW met2 ( 340630 2199460 0 ) ( * 2203030 )
- NEW met1 ( 340630 2203030 ) ( 955650 * )
- NEW met1 ( 955650 19890 ) M1M2_PR
- NEW met1 ( 955650 2203030 ) M1M2_PR
- NEW met1 ( 1007630 19890 ) M1M2_PR
- NEW met1 ( 340630 2203030 ) M1M2_PR ;
+ + ROUTED met2 ( 350290 2699260 0 ) ( 351670 * )
+ NEW met2 ( 351670 2699260 ) ( * 2705890 )
+ NEW met2 ( 1007630 2380 0 ) ( * 2705890 )
+ NEW met1 ( 351670 2705890 ) ( 1007630 * )
+ NEW met1 ( 351670 2705890 ) M1M2_PR
+ NEW met1 ( 1007630 2705890 ) M1M2_PR ;
- la_data_out[22] ( PIN la_data_out[22] ) ( chip_controller la_data_out[22] ) + USE SIGNAL
- + ROUTED met2 ( 1021430 82800 ) ( 1025570 * )
- NEW met2 ( 1025570 2380 0 ) ( * 82800 )
- NEW met2 ( 1021430 82800 ) ( * 1946330 )
- NEW met3 ( 599380 1951260 0 ) ( 613410 * )
- NEW met2 ( 613410 1946330 ) ( * 1951260 )
- NEW met1 ( 613410 1946330 ) ( 1021430 * )
- NEW met1 ( 1021430 1946330 ) M1M2_PR
- NEW met2 ( 613410 1951260 ) M2M3_PR_M
- NEW met1 ( 613410 1946330 ) M1M2_PR ;
+ + ROUTED li1 ( 484610 2701470 ) ( * 2702830 )
+ NEW met2 ( 357190 2699260 0 ) ( 358570 * )
+ NEW met2 ( 358570 2699260 ) ( * 2713370 )
+ NEW met2 ( 436310 2702830 ) ( * 2713370 )
+ NEW met1 ( 358570 2713370 ) ( 436310 * )
+ NEW met1 ( 436310 2702830 ) ( 484610 * )
+ NEW met2 ( 1025570 2380 0 ) ( * 14620 )
+ NEW met2 ( 1024190 14620 ) ( 1025570 * )
+ NEW met2 ( 1021430 82800 ) ( 1024190 * )
+ NEW met2 ( 1024190 14620 ) ( * 82800 )
+ NEW met2 ( 1021430 82800 ) ( * 2701470 )
+ NEW met1 ( 484610 2701470 ) ( 1021430 * )
+ NEW li1 ( 484610 2702830 ) L1M1_PR_MR
+ NEW li1 ( 484610 2701470 ) L1M1_PR_MR
+ NEW met1 ( 358570 2713370 ) M1M2_PR
+ NEW met1 ( 436310 2713370 ) M1M2_PR
+ NEW met1 ( 436310 2702830 ) M1M2_PR
+ NEW met1 ( 1021430 2701470 ) M1M2_PR ;
- la_data_out[23] ( PIN la_data_out[23] ) ( chip_controller la_data_out[23] ) + USE SIGNAL
- + ROUTED li1 ( 476790 2211870 ) ( * 2212550 )
- NEW met1 ( 476790 2212550 ) ( 506690 * )
- NEW met2 ( 506690 2199970 ) ( * 2212550 )
- NEW met1 ( 351670 2211870 ) ( 476790 * )
- NEW met2 ( 351670 2199460 0 ) ( * 2211870 )
+ + ROUTED met2 ( 190210 2443070 ) ( * 2446300 )
+ NEW met3 ( 190210 2446300 ) ( 200100 * )
+ NEW met3 ( 200100 2445620 0 ) ( * 2446300 )
+ NEW met1 ( 172270 2443070 ) ( 190210 * )
NEW met2 ( 1042130 82800 ) ( 1043050 * )
NEW met2 ( 1043050 2380 0 ) ( * 82800 )
- NEW met1 ( 506690 2199970 ) ( 1042130 * )
- NEW met2 ( 1042130 82800 ) ( * 2199970 )
- NEW li1 ( 476790 2211870 ) L1M1_PR_MR
- NEW li1 ( 476790 2212550 ) L1M1_PR_MR
- NEW met1 ( 506690 2212550 ) M1M2_PR
- NEW met1 ( 506690 2199970 ) M1M2_PR
- NEW met1 ( 351670 2211870 ) M1M2_PR
- NEW met1 ( 1042130 2199970 ) M1M2_PR ;
+ NEW met1 ( 172270 2281910 ) ( 1042130 * )
+ NEW met2 ( 1042130 82800 ) ( * 2281910 )
+ NEW met2 ( 172270 2281910 ) ( * 2443070 )
+ NEW met1 ( 190210 2443070 ) M1M2_PR
+ NEW met2 ( 190210 2446300 ) M2M3_PR_M
+ NEW met1 ( 172270 2443070 ) M1M2_PR
+ NEW met1 ( 172270 2281910 ) M1M2_PR
+ NEW met1 ( 1042130 2281910 ) M1M2_PR ;
- la_data_out[24] ( PIN la_data_out[24] ) ( chip_controller la_data_out[24] ) + USE SIGNAL
+ ROUTED met2 ( 1060990 2380 0 ) ( * 3060 )
NEW met2 ( 1060070 3060 ) ( 1060990 * )
@@ -11387,2981 +14522,4767 @@
NEW met2 ( 1058690 2380 ) ( 1060070 * )
NEW met2 ( 1055930 82800 ) ( 1058690 * )
NEW met2 ( 1058690 2380 ) ( * 82800 )
- NEW met2 ( 1055930 82800 ) ( * 1960270 )
- NEW met3 ( 599380 1963500 0 ) ( 608350 * )
- NEW met2 ( 608350 1960270 ) ( * 1963500 )
- NEW met1 ( 608350 1960270 ) ( 1055930 * )
- NEW met1 ( 1055930 1960270 ) M1M2_PR
- NEW met2 ( 608350 1963500 ) M2M3_PR_M
- NEW met1 ( 608350 1960270 ) M1M2_PR ;
+ NEW met2 ( 1055930 82800 ) ( * 2443070 )
+ NEW met3 ( 599380 2444940 0 ) ( 608350 * )
+ NEW met2 ( 608350 2443070 ) ( * 2444940 )
+ NEW met1 ( 608350 2443070 ) ( 1055930 * )
+ NEW met1 ( 1055930 2443070 ) M1M2_PR
+ NEW met2 ( 608350 2444940 ) M2M3_PR_M
+ NEW met1 ( 608350 2443070 ) M1M2_PR ;
- la_data_out[25] ( PIN la_data_out[25] ) ( chip_controller la_data_out[25] ) + USE SIGNAL
+ ROUTED met2 ( 1078470 2380 0 ) ( * 3060 )
NEW met2 ( 1077550 3060 ) ( 1078470 * )
NEW met2 ( 1077550 2380 ) ( * 3060 )
NEW met2 ( 1076630 2380 ) ( 1077550 * )
- NEW met2 ( 1076630 2380 ) ( * 1966730 )
- NEW met3 ( 599380 1970980 0 ) ( 613870 * )
- NEW met2 ( 613870 1966730 ) ( * 1970980 )
- NEW met1 ( 613870 1966730 ) ( 1076630 * )
- NEW met1 ( 1076630 1966730 ) M1M2_PR
- NEW met2 ( 613870 1970980 ) M2M3_PR_M
- NEW met1 ( 613870 1966730 ) M1M2_PR ;
+ NEW met2 ( 189750 2457010 ) ( * 2462620 )
+ NEW met3 ( 189750 2462620 ) ( 200100 * )
+ NEW met3 ( 200100 2461940 0 ) ( * 2462620 )
+ NEW met2 ( 1076630 2380 ) ( * 2281570 )
+ NEW met1 ( 161230 2457010 ) ( 189750 * )
+ NEW met1 ( 161230 2281570 ) ( 1076630 * )
+ NEW met2 ( 161230 2281570 ) ( * 2457010 )
+ NEW met1 ( 189750 2457010 ) M1M2_PR
+ NEW met2 ( 189750 2462620 ) M2M3_PR_M
+ NEW met1 ( 1076630 2281570 ) M1M2_PR
+ NEW met1 ( 161230 2281570 ) M1M2_PR
+ NEW met1 ( 161230 2457010 ) M1M2_PR ;
- la_data_out[26] ( PIN la_data_out[26] ) ( chip_controller la_data_out[26] ) + USE SIGNAL
- + ROUTED met1 ( 1090430 58310 ) ( 1096410 * )
- NEW met2 ( 1096410 2380 0 ) ( * 58310 )
- NEW met2 ( 1090430 58310 ) ( * 1974210 )
- NEW met3 ( 599380 1974380 0 ) ( 613870 * )
- NEW met2 ( 613870 1974210 ) ( * 1974380 )
- NEW met1 ( 613870 1974210 ) ( 1090430 * )
- NEW met1 ( 1090430 58310 ) M1M2_PR
- NEW met1 ( 1096410 58310 ) M1M2_PR
- NEW met1 ( 1090430 1974210 ) M1M2_PR
- NEW met2 ( 613870 1974380 ) M2M3_PR_M
- NEW met1 ( 613870 1974210 ) M1M2_PR ;
+ + ROUTED met2 ( 1090890 82800 ) ( 1096410 * )
+ NEW met2 ( 1096410 2380 0 ) ( * 82800 )
+ NEW met2 ( 1090890 82800 ) ( * 2449530 )
+ NEW met3 ( 599380 2454460 0 ) ( 607430 * )
+ NEW met2 ( 607430 2449530 ) ( * 2454460 )
+ NEW met1 ( 607430 2449530 ) ( 1090890 * )
+ NEW met1 ( 1090890 2449530 ) M1M2_PR
+ NEW met2 ( 607430 2454460 ) M2M3_PR_M
+ NEW met1 ( 607430 2449530 ) M1M2_PR ;
- la_data_out[27] ( PIN la_data_out[27] ) ( chip_controller la_data_out[27] ) + USE SIGNAL
+ ROUTED met2 ( 1111130 82800 ) ( 1113890 * )
NEW met2 ( 1113890 2380 0 ) ( * 82800 )
- NEW met2 ( 1111130 82800 ) ( * 1980670 )
- NEW met3 ( 599380 1980500 0 ) ( 613870 * )
- NEW met2 ( 613870 1980500 ) ( * 1980670 )
- NEW met1 ( 613870 1980670 ) ( 1111130 * )
- NEW met1 ( 1111130 1980670 ) M1M2_PR
- NEW met2 ( 613870 1980500 ) M2M3_PR_M
- NEW met1 ( 613870 1980670 ) M1M2_PR ;
+ NEW met2 ( 1111130 82800 ) ( * 2457010 )
+ NEW met3 ( 599380 2457860 0 ) ( 608350 * )
+ NEW met2 ( 608350 2457010 ) ( * 2457860 )
+ NEW met1 ( 608350 2457010 ) ( 1111130 * )
+ NEW met1 ( 1111130 2457010 ) M1M2_PR
+ NEW met2 ( 608350 2457860 ) M2M3_PR_M
+ NEW met1 ( 608350 2457010 ) M1M2_PR ;
- la_data_out[28] ( PIN la_data_out[28] ) ( chip_controller la_data_out[28] ) + USE SIGNAL
- + ROUTED met1 ( 187910 1798770 ) ( 201250 * )
- NEW li1 ( 201250 1798770 ) ( * 1799450 )
- NEW met3 ( 187910 1980500 ) ( 200100 * 0 )
- NEW met1 ( 201250 1799450 ) ( 1131830 * )
- NEW met2 ( 1131830 2380 0 ) ( * 1799450 )
- NEW met2 ( 187910 1798770 ) ( * 1980500 )
- NEW met1 ( 187910 1798770 ) M1M2_PR
- NEW li1 ( 201250 1798770 ) L1M1_PR_MR
- NEW li1 ( 201250 1799450 ) L1M1_PR_MR
- NEW met2 ( 187910 1980500 ) M2M3_PR_M
- NEW met1 ( 1131830 1799450 ) M1M2_PR ;
+ + ROUTED met2 ( 388470 2699260 0 ) ( 389850 * )
+ NEW met2 ( 389850 2699260 ) ( * 2712010 )
+ NEW met2 ( 445050 2701130 ) ( * 2712010 )
+ NEW met1 ( 389850 2712010 ) ( 445050 * )
+ NEW met2 ( 1131830 2380 0 ) ( * 2701130 )
+ NEW met1 ( 445050 2701130 ) ( 1131830 * )
+ NEW met1 ( 389850 2712010 ) M1M2_PR
+ NEW met1 ( 445050 2712010 ) M1M2_PR
+ NEW met1 ( 445050 2701130 ) M1M2_PR
+ NEW met1 ( 1131830 2701130 ) M1M2_PR ;
- la_data_out[29] ( PIN la_data_out[29] ) ( chip_controller la_data_out[29] ) + USE SIGNAL
- + ROUTED met2 ( 376050 1793500 ) ( * 1793670 )
- NEW met2 ( 376050 1793500 ) ( 376510 * )
- NEW met2 ( 376510 47090 ) ( * 1793500 )
- NEW met2 ( 1149310 2380 0 ) ( * 47090 )
- NEW met2 ( 368690 1793670 ) ( * 1800300 0 )
- NEW met1 ( 368690 1793670 ) ( 376050 * )
- NEW met1 ( 376510 47090 ) ( 1149310 * )
- NEW met1 ( 376510 47090 ) M1M2_PR
- NEW met1 ( 376050 1793670 ) M1M2_PR
- NEW met1 ( 1149310 47090 ) M1M2_PR
- NEW met1 ( 368690 1793670 ) M1M2_PR ;
+ + ROUTED met2 ( 392150 2699260 0 ) ( 393070 * )
+ NEW met2 ( 393070 2699260 ) ( * 2708610 )
+ NEW met2 ( 1149310 2380 0 ) ( * 3060 )
+ NEW met2 ( 1148390 3060 ) ( 1149310 * )
+ NEW met2 ( 1148390 2380 ) ( * 3060 )
+ NEW met2 ( 1147010 2380 ) ( 1148390 * )
+ NEW met2 ( 1145630 82800 ) ( 1147010 * )
+ NEW met2 ( 1147010 2380 ) ( * 82800 )
+ NEW met2 ( 1145630 82800 ) ( * 2708610 )
+ NEW met1 ( 393070 2708610 ) ( 1145630 * )
+ NEW met1 ( 393070 2708610 ) M1M2_PR
+ NEW met1 ( 1145630 2708610 ) M1M2_PR ;
- la_data_out[2] ( PIN la_data_out[2] ) ( chip_controller la_data_out[2] ) + USE SIGNAL
- + ROUTED met2 ( 669530 82800 ) ( 670910 * )
+ + ROUTED met2 ( 221490 2699260 0 ) ( 222870 * )
+ NEW met2 ( 222870 2699260 ) ( * 2713030 )
+ NEW met2 ( 669530 82800 ) ( 670910 * )
NEW met2 ( 670910 2380 0 ) ( * 82800 )
- NEW met2 ( 669530 82800 ) ( * 1828690 )
- NEW met3 ( 599380 1832260 0 ) ( 609270 * )
- NEW met2 ( 609270 1828690 ) ( * 1832260 )
- NEW met1 ( 609270 1828690 ) ( 669530 * )
- NEW met1 ( 669530 1828690 ) M1M2_PR
- NEW met2 ( 609270 1832260 ) M2M3_PR_M
- NEW met1 ( 609270 1828690 ) M1M2_PR ;
+ NEW met2 ( 669530 82800 ) ( * 2703170 )
+ NEW met2 ( 448730 2703170 ) ( * 2713030 )
+ NEW met1 ( 222870 2713030 ) ( 448730 * )
+ NEW met1 ( 448730 2703170 ) ( 669530 * )
+ NEW met1 ( 222870 2713030 ) M1M2_PR
+ NEW met1 ( 669530 2703170 ) M1M2_PR
+ NEW met1 ( 448730 2713030 ) M1M2_PR
+ NEW met1 ( 448730 2703170 ) M1M2_PR ;
- la_data_out[30] ( PIN la_data_out[30] ) ( chip_controller la_data_out[30] ) + USE SIGNAL
- + ROUTED met2 ( 386170 2199460 0 ) ( * 2202690 )
+ + ROUTED met2 ( 395830 2275110 ) ( * 2300100 0 )
NEW met2 ( 1166330 82800 ) ( 1167250 * )
NEW met2 ( 1167250 2380 0 ) ( * 82800 )
- NEW met2 ( 1166330 82800 ) ( * 2202690 )
- NEW met1 ( 386170 2202690 ) ( 1166330 * )
- NEW met1 ( 386170 2202690 ) M1M2_PR
- NEW met1 ( 1166330 2202690 ) M1M2_PR ;
+ NEW met2 ( 1166330 82800 ) ( * 2275110 )
+ NEW met1 ( 395830 2275110 ) ( 1166330 * )
+ NEW met1 ( 395830 2275110 ) M1M2_PR
+ NEW met1 ( 1166330 2275110 ) M1M2_PR ;
- la_data_out[31] ( PIN la_data_out[31] ) ( chip_controller la_data_out[31] ) + USE SIGNAL
+ ROUTED met2 ( 1185190 2380 0 ) ( * 3060 )
NEW met2 ( 1184270 3060 ) ( 1185190 * )
NEW met2 ( 1184270 2380 ) ( * 3060 )
NEW met2 ( 1182890 2380 ) ( 1184270 * )
- NEW met2 ( 396750 1786700 ) ( 397210 * )
- NEW met2 ( 396750 1786700 ) ( * 1789590 )
- NEW met1 ( 376970 1789590 ) ( 396750 * )
- NEW met2 ( 376970 1789590 ) ( * 1800300 0 )
- NEW met2 ( 397210 60350 ) ( * 1786700 )
- NEW met2 ( 1182890 2380 ) ( * 60350 )
- NEW met1 ( 397210 60350 ) ( 1182890 * )
- NEW met1 ( 397210 60350 ) M1M2_PR
- NEW met1 ( 396750 1789590 ) M1M2_PR
- NEW met1 ( 376970 1789590 ) M1M2_PR
- NEW met1 ( 1182890 60350 ) M1M2_PR ;
+ NEW met2 ( 189750 2491690 ) ( * 2491860 )
+ NEW met3 ( 189750 2491860 ) ( 200100 * )
+ NEW met3 ( 200100 2491180 0 ) ( * 2491860 )
+ NEW met2 ( 1180130 82800 ) ( 1182890 * )
+ NEW met2 ( 1182890 2380 ) ( * 82800 )
+ NEW met2 ( 1180130 82800 ) ( * 2294490 )
+ NEW met1 ( 168130 2491690 ) ( 189750 * )
+ NEW met2 ( 168130 2294490 ) ( * 2491690 )
+ NEW met1 ( 168130 2294490 ) ( 1180130 * )
+ NEW met1 ( 189750 2491690 ) M1M2_PR
+ NEW met2 ( 189750 2491860 ) M2M3_PR_M
+ NEW met1 ( 1180130 2294490 ) M1M2_PR
+ NEW met1 ( 168130 2491690 ) M1M2_PR
+ NEW met1 ( 168130 2294490 ) M1M2_PR ;
- la_data_out[32] ( PIN la_data_out[32] ) ( chip_controller la_data_out[32] ) + USE SIGNAL
- + ROUTED met2 ( 188830 2008380 ) ( * 2008550 )
- NEW met3 ( 188830 2008380 ) ( 200100 * 0 )
+ + ROUTED met3 ( 599380 2486420 0 ) ( 607430 * )
+ NEW met2 ( 607430 2484890 ) ( * 2486420 )
NEW met2 ( 1202670 2380 0 ) ( * 3060 )
NEW met2 ( 1201750 3060 ) ( 1202670 * )
NEW met2 ( 1201750 2380 ) ( * 3060 )
NEW met2 ( 1200830 2380 ) ( 1201750 * )
- NEW met1 ( 161230 1762050 ) ( 1200830 * )
- NEW met1 ( 161230 2008550 ) ( 188830 * )
- NEW met2 ( 1200830 2380 ) ( * 1762050 )
- NEW met2 ( 161230 1762050 ) ( * 2008550 )
- NEW met1 ( 188830 2008550 ) M1M2_PR
- NEW met2 ( 188830 2008380 ) M2M3_PR_M
- NEW met1 ( 161230 1762050 ) M1M2_PR
- NEW met1 ( 1200830 1762050 ) M1M2_PR
- NEW met1 ( 161230 2008550 ) M1M2_PR ;
+ NEW met1 ( 607430 2484890 ) ( 1200830 * )
+ NEW met2 ( 1200830 2380 ) ( * 2484890 )
+ NEW met2 ( 607430 2486420 ) M2M3_PR_M
+ NEW met1 ( 607430 2484890 ) M1M2_PR
+ NEW met1 ( 1200830 2484890 ) M1M2_PR ;
- la_data_out[33] ( PIN la_data_out[33] ) ( chip_controller la_data_out[33] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2004300 0 ) ( 607430 * )
- NEW met2 ( 607430 2001070 ) ( * 2004300 )
- NEW met1 ( 1214630 58310 ) ( 1220610 * )
- NEW met2 ( 1220610 2380 0 ) ( * 58310 )
- NEW met1 ( 607430 2001070 ) ( 1214630 * )
- NEW met2 ( 1214630 58310 ) ( * 2001070 )
- NEW met2 ( 607430 2004300 ) M2M3_PR_M
- NEW met1 ( 607430 2001070 ) M1M2_PR
- NEW met1 ( 1214630 58310 ) M1M2_PR
- NEW met1 ( 1220610 58310 ) M1M2_PR
- NEW met1 ( 1214630 2001070 ) M1M2_PR ;
+ + ROUTED met2 ( 188370 2491010 ) ( * 2495260 )
+ NEW met3 ( 188370 2495260 ) ( 200100 * )
+ NEW met3 ( 200100 2494580 0 ) ( * 2495260 )
+ NEW met2 ( 1220610 2380 0 ) ( * 32470 )
+ NEW met1 ( 143750 32470 ) ( 1220610 * )
+ NEW met2 ( 143750 32470 ) ( * 2491010 )
+ NEW met1 ( 143750 2491010 ) ( 188370 * )
+ NEW met1 ( 188370 2491010 ) M1M2_PR
+ NEW met2 ( 188370 2495260 ) M2M3_PR_M
+ NEW met1 ( 143750 32470 ) M1M2_PR
+ NEW met1 ( 1220610 32470 ) M1M2_PR
+ NEW met1 ( 143750 2491010 ) M1M2_PR ;
- la_data_out[34] ( PIN la_data_out[34] ) ( chip_controller la_data_out[34] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2009060 0 ) ( 607430 * )
- NEW met2 ( 607430 2008890 ) ( * 2009060 )
- NEW met2 ( 1235330 82800 ) ( 1238090 * )
- NEW met2 ( 1238090 2380 0 ) ( * 82800 )
- NEW met1 ( 607430 2008890 ) ( 1235330 * )
- NEW met2 ( 1235330 82800 ) ( * 2008890 )
- NEW met2 ( 607430 2009060 ) M2M3_PR_M
- NEW met1 ( 607430 2008890 ) M1M2_PR
- NEW met1 ( 1235330 2008890 ) M1M2_PR ;
+ + ROUTED met2 ( 410550 2284630 ) ( * 2300100 0 )
+ NEW li1 ( 473110 2284630 ) ( 474030 * )
+ NEW li1 ( 474030 2284290 ) ( * 2284630 )
+ NEW met1 ( 410550 2284630 ) ( 473110 * )
+ NEW met1 ( 517730 2284290 ) ( * 2284970 )
+ NEW met1 ( 517730 2284970 ) ( 527850 * )
+ NEW met1 ( 474030 2284290 ) ( 517730 * )
+ NEW met2 ( 527850 54230 ) ( * 2284970 )
+ NEW met1 ( 527850 54230 ) ( 1238090 * )
+ NEW met2 ( 1238090 2380 0 ) ( * 54230 )
+ NEW met1 ( 410550 2284630 ) M1M2_PR
+ NEW li1 ( 473110 2284630 ) L1M1_PR_MR
+ NEW li1 ( 474030 2284290 ) L1M1_PR_MR
+ NEW met1 ( 527850 54230 ) M1M2_PR
+ NEW met1 ( 527850 2284970 ) M1M2_PR
+ NEW met1 ( 1238090 54230 ) M1M2_PR ;
- la_data_out[35] ( PIN la_data_out[35] ) ( chip_controller la_data_out[35] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2011780 0 ) ( 608350 * )
- NEW met2 ( 608350 2008550 ) ( * 2011780 )
- NEW met2 ( 1256030 2380 0 ) ( * 34500 )
- NEW met2 ( 1256030 34500 ) ( 1256490 * )
- NEW met2 ( 1256490 34500 ) ( * 2008550 )
- NEW met1 ( 608350 2008550 ) ( 1256490 * )
- NEW met2 ( 608350 2011780 ) M2M3_PR_M
- NEW met1 ( 608350 2008550 ) M1M2_PR
- NEW met1 ( 1256490 2008550 ) M1M2_PR ;
+ + ROUTED met2 ( 190210 2497810 ) ( * 2502740 )
+ NEW met3 ( 190210 2502740 ) ( 200100 * )
+ NEW met3 ( 200100 2502060 0 ) ( * 2502740 )
+ NEW met2 ( 1256030 2380 0 ) ( * 17340 )
+ NEW met2 ( 1256030 17340 ) ( 1256490 * )
+ NEW met2 ( 1256490 17340 ) ( * 2273750 )
+ NEW met1 ( 161690 2497810 ) ( 190210 * )
+ NEW met1 ( 161690 2273750 ) ( 1256490 * )
+ NEW met2 ( 161690 2273750 ) ( * 2497810 )
+ NEW met1 ( 190210 2497810 ) M1M2_PR
+ NEW met2 ( 190210 2502740 ) M2M3_PR_M
+ NEW met1 ( 1256490 2273750 ) M1M2_PR
+ NEW met1 ( 161690 2497810 ) M1M2_PR
+ NEW met1 ( 161690 2273750 ) M1M2_PR ;
- la_data_out[36] ( PIN la_data_out[36] ) ( chip_controller la_data_out[36] ) + USE SIGNAL
- + ROUTED met2 ( 1273510 2380 0 ) ( * 15470 )
- NEW met1 ( 1266150 15470 ) ( 1273510 * )
- NEW li1 ( 398130 2196910 ) ( * 2199630 )
- NEW met2 ( 398130 2199460 ) ( * 2199630 )
- NEW met2 ( 397210 2199460 0 ) ( 398130 * )
- NEW met2 ( 1266150 15470 ) ( * 2196910 )
- NEW met1 ( 398130 2196910 ) ( 1266150 * )
- NEW met1 ( 1273510 15470 ) M1M2_PR
- NEW met1 ( 1266150 15470 ) M1M2_PR
- NEW li1 ( 398130 2196910 ) L1M1_PR_MR
- NEW li1 ( 398130 2199630 ) L1M1_PR_MR
- NEW met1 ( 398130 2199630 ) M1M2_PR
- NEW met1 ( 1266150 2196910 ) M1M2_PR
- NEW met1 ( 398130 2199630 ) RECT ( -355 -70 0 70 ) ;
+ + ROUTED met2 ( 407790 2699260 0 ) ( 408710 * )
+ NEW met2 ( 408710 2699260 ) ( * 2712350 )
+ NEW met2 ( 474490 2708270 ) ( * 2712350 )
+ NEW met2 ( 1273510 2380 0 ) ( * 3060 )
+ NEW met2 ( 1272590 3060 ) ( 1273510 * )
+ NEW met2 ( 1272590 2380 ) ( * 3060 )
+ NEW met2 ( 1271210 2380 ) ( 1272590 * )
+ NEW met2 ( 1269830 82800 ) ( 1271210 * )
+ NEW met2 ( 1271210 2380 ) ( * 82800 )
+ NEW met2 ( 1269830 82800 ) ( * 2708270 )
+ NEW met1 ( 408710 2712350 ) ( 474490 * )
+ NEW met1 ( 474490 2708270 ) ( 1269830 * )
+ NEW met1 ( 408710 2712350 ) M1M2_PR
+ NEW met1 ( 474490 2712350 ) M1M2_PR
+ NEW met1 ( 474490 2708270 ) M1M2_PR
+ NEW met1 ( 1269830 2708270 ) M1M2_PR ;
- la_data_out[37] ( PIN la_data_out[37] ) ( chip_controller la_data_out[37] ) + USE SIGNAL
- + ROUTED met2 ( 400890 2199460 0 ) ( * 2201670 )
+ + ROUTED met2 ( 417450 2274770 ) ( * 2300100 0 )
NEW met2 ( 1290530 82800 ) ( 1291450 * )
NEW met2 ( 1291450 2380 0 ) ( * 82800 )
- NEW met1 ( 400890 2201670 ) ( 1290530 * )
- NEW met2 ( 1290530 82800 ) ( * 2201670 )
- NEW met1 ( 400890 2201670 ) M1M2_PR
- NEW met1 ( 1290530 2201670 ) M1M2_PR ;
+ NEW met1 ( 417450 2274770 ) ( 1290530 * )
+ NEW met2 ( 1290530 82800 ) ( * 2274770 )
+ NEW met1 ( 417450 2274770 ) M1M2_PR
+ NEW met1 ( 1290530 2274770 ) M1M2_PR ;
- la_data_out[38] ( PIN la_data_out[38] ) ( chip_controller la_data_out[38] ) + USE SIGNAL
- + ROUTED li1 ( 404570 2196570 ) ( * 2199630 )
- NEW met2 ( 404570 2199460 ) ( * 2199630 )
- NEW met2 ( 404110 2199460 0 ) ( 404570 * )
- NEW met2 ( 1308930 2380 0 ) ( * 16830 )
- NEW met1 ( 1293750 16830 ) ( 1308930 * )
- NEW met1 ( 404570 2196570 ) ( 1293750 * )
- NEW met2 ( 1293750 16830 ) ( * 2196570 )
- NEW li1 ( 404570 2196570 ) L1M1_PR_MR
- NEW li1 ( 404570 2199630 ) L1M1_PR_MR
- NEW met1 ( 404570 2199630 ) M1M2_PR
- NEW met1 ( 1308930 16830 ) M1M2_PR
- NEW met1 ( 1293750 16830 ) M1M2_PR
- NEW met1 ( 1293750 2196570 ) M1M2_PR
- NEW met1 ( 404570 2199630 ) RECT ( -355 -70 0 70 ) ;
+ + ROUTED met2 ( 420210 61030 ) ( * 2285140 )
+ NEW met2 ( 421130 2285140 ) ( * 2300100 )
+ NEW met2 ( 421130 2300100 ) ( 422510 * 0 )
+ NEW met2 ( 420210 2285140 ) ( 421130 * )
+ NEW met1 ( 420210 61030 ) ( 1308930 * )
+ NEW met2 ( 1308930 2380 0 ) ( * 61030 )
+ NEW met1 ( 420210 61030 ) M1M2_PR
+ NEW met1 ( 1308930 61030 ) M1M2_PR ;
- la_data_out[39] ( PIN la_data_out[39] ) ( chip_controller la_data_out[39] ) + USE SIGNAL
- + ROUTED met2 ( 188830 2021980 ) ( * 2022490 )
- NEW met3 ( 188830 2021980 ) ( 200100 * 0 )
- NEW met1 ( 163990 2022490 ) ( 188830 * )
- NEW met2 ( 1326870 2380 0 ) ( * 3060 )
- NEW met2 ( 1325950 3060 ) ( 1326870 * )
- NEW met2 ( 1325950 2380 ) ( * 3060 )
- NEW met2 ( 1325030 2380 ) ( 1325950 * )
- NEW met1 ( 163990 86530 ) ( 1325030 * )
- NEW met2 ( 1325030 2380 ) ( * 86530 )
- NEW met2 ( 163990 86530 ) ( * 2022490 )
- NEW met1 ( 188830 2022490 ) M1M2_PR
- NEW met2 ( 188830 2021980 ) M2M3_PR_M
- NEW met1 ( 163990 86530 ) M1M2_PR
- NEW met1 ( 163990 2022490 ) M1M2_PR
- NEW met1 ( 1325030 86530 ) M1M2_PR ;
+ + ROUTED met2 ( 416530 2699260 0 ) ( 416990 * )
+ NEW met2 ( 416990 2699260 ) ( * 2699940 )
+ NEW met2 ( 1326870 2380 0 ) ( * 18870 )
+ NEW met1 ( 1294670 18870 ) ( 1326870 * )
+ NEW met2 ( 1294670 18870 ) ( * 2699940 )
+ NEW met3 ( 416990 2699940 ) ( 1294670 * )
+ NEW met2 ( 416990 2699940 ) M2M3_PR_M
+ NEW met1 ( 1326870 18870 ) M1M2_PR
+ NEW met1 ( 1294670 18870 ) M1M2_PR
+ NEW met2 ( 1294670 2699940 ) M2M3_PR_M ;
- la_data_out[3] ( PIN la_data_out[3] ) ( chip_controller la_data_out[3] ) + USE SIGNAL
- + ROUTED met2 ( 688390 2380 0 ) ( * 3060 )
+ + ROUTED met3 ( 599380 2325940 0 ) ( 607430 * )
+ NEW met2 ( 607430 2325940 ) ( * 2326450 )
+ NEW met2 ( 688390 2380 0 ) ( * 3060 )
NEW met2 ( 687470 3060 ) ( 688390 * )
NEW met2 ( 687470 2380 ) ( * 3060 )
NEW met2 ( 686090 2380 ) ( 687470 * )
NEW met2 ( 683330 82800 ) ( 686090 * )
NEW met2 ( 686090 2380 ) ( * 82800 )
- NEW met2 ( 683330 82800 ) ( * 1781090 )
- NEW met1 ( 199410 1781090 ) ( 683330 * )
- NEW met3 ( 199410 1829540 ) ( 200100 * 0 )
- NEW met2 ( 199410 1781090 ) ( * 1829540 )
- NEW met1 ( 199410 1781090 ) M1M2_PR
- NEW met1 ( 683330 1781090 ) M1M2_PR
- NEW met2 ( 199410 1829540 ) M2M3_PR_M ;
+ NEW met2 ( 683330 82800 ) ( * 2326450 )
+ NEW met1 ( 607430 2326450 ) ( 683330 * )
+ NEW met2 ( 607430 2325940 ) M2M3_PR_M
+ NEW met1 ( 607430 2326450 ) M1M2_PR
+ NEW met1 ( 683330 2326450 ) M1M2_PR ;
- la_data_out[40] ( PIN la_data_out[40] ) ( chip_controller la_data_out[40] ) + USE SIGNAL
- + ROUTED met2 ( 1344350 2380 0 ) ( * 3060 )
- NEW met2 ( 1343430 3060 ) ( 1344350 * )
- NEW met2 ( 1343430 2380 ) ( * 3060 )
- NEW met2 ( 1342050 2380 ) ( 1343430 * )
- NEW met1 ( 397210 1787210 ) ( 403650 * )
- NEW met2 ( 397210 1787210 ) ( * 1800300 0 )
- NEW met2 ( 403650 865810 ) ( * 1787210 )
- NEW met2 ( 1339290 82800 ) ( 1342050 * )
- NEW met2 ( 1342050 2380 ) ( * 82800 )
- NEW met2 ( 1339290 82800 ) ( * 865810 )
- NEW met1 ( 403650 865810 ) ( 1339290 * )
- NEW met1 ( 403650 865810 ) M1M2_PR
- NEW met1 ( 1339290 865810 ) M1M2_PR
- NEW met1 ( 403650 1787210 ) M1M2_PR
- NEW met1 ( 397210 1787210 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2503420 0 ) ( 609270 * )
+ NEW met2 ( 609270 2498830 ) ( * 2503420 )
+ NEW met2 ( 776710 147730 ) ( * 2498830 )
+ NEW met1 ( 1338830 58310 ) ( 1344350 * )
+ NEW met2 ( 1344350 2380 0 ) ( * 58310 )
+ NEW met2 ( 1338830 58310 ) ( * 147730 )
+ NEW met1 ( 609270 2498830 ) ( 776710 * )
+ NEW met1 ( 776710 147730 ) ( 1338830 * )
+ NEW met2 ( 609270 2503420 ) M2M3_PR_M
+ NEW met1 ( 609270 2498830 ) M1M2_PR
+ NEW met1 ( 776710 2498830 ) M1M2_PR
+ NEW met1 ( 776710 147730 ) M1M2_PR
+ NEW met1 ( 1338830 58310 ) M1M2_PR
+ NEW met1 ( 1344350 58310 ) M1M2_PR
+ NEW met1 ( 1338830 147730 ) M1M2_PR ;
- la_data_out[41] ( PIN la_data_out[41] ) ( chip_controller la_data_out[41] ) + USE SIGNAL
- + ROUTED met2 ( 1362290 2380 0 ) ( * 16830 )
- NEW met1 ( 1355850 16830 ) ( 1362290 * )
- NEW met2 ( 410550 2199460 0 ) ( * 2201330 )
- NEW met2 ( 1355850 16830 ) ( * 2201330 )
- NEW met1 ( 410550 2201330 ) ( 1355850 * )
- NEW met1 ( 1362290 16830 ) M1M2_PR
- NEW met1 ( 1355850 16830 ) M1M2_PR
- NEW met1 ( 410550 2201330 ) M1M2_PR
- NEW met1 ( 1355850 2201330 ) M1M2_PR ;
+ + ROUTED met2 ( 1362290 2380 0 ) ( * 61710 )
+ NEW met1 ( 452410 2285650 ) ( * 2286330 )
+ NEW met1 ( 449190 2285650 ) ( 452410 * )
+ NEW li1 ( 444130 2285650 ) ( 449190 * )
+ NEW met1 ( 436770 2285650 ) ( 444130 * )
+ NEW li1 ( 436770 2285650 ) ( * 2286670 )
+ NEW li1 ( 435390 2286670 ) ( 436770 * )
+ NEW met1 ( 427110 2286670 ) ( 435390 * )
+ NEW met2 ( 427110 2286670 ) ( * 2300100 )
+ NEW met2 ( 425730 2300100 0 ) ( 427110 * )
+ NEW met1 ( 452410 2286330 ) ( 825010 * )
+ NEW met2 ( 825010 61710 ) ( * 2286330 )
+ NEW met1 ( 825010 61710 ) ( 1362290 * )
+ NEW met1 ( 1362290 61710 ) M1M2_PR
+ NEW li1 ( 449190 2285650 ) L1M1_PR_MR
+ NEW li1 ( 444130 2285650 ) L1M1_PR_MR
+ NEW li1 ( 436770 2285650 ) L1M1_PR_MR
+ NEW li1 ( 435390 2286670 ) L1M1_PR_MR
+ NEW met1 ( 427110 2286670 ) M1M2_PR
+ NEW met1 ( 825010 61710 ) M1M2_PR
+ NEW met1 ( 825010 2286330 ) M1M2_PR ;
- la_data_out[42] ( PIN la_data_out[42] ) ( chip_controller la_data_out[42] ) + USE SIGNAL
- + ROUTED met1 ( 181930 2028950 ) ( 186990 * )
- NEW met2 ( 186990 2028780 ) ( * 2028950 )
- NEW met3 ( 186990 2028780 ) ( 200100 * 0 )
- NEW met1 ( 181930 1799450 ) ( 199410 * )
- NEW li1 ( 199410 1798430 ) ( * 1799450 )
- NEW li1 ( 199410 1798430 ) ( 201710 * )
- NEW li1 ( 201710 1798430 ) ( * 1798770 )
- NEW met2 ( 1380230 2380 0 ) ( * 1798770 )
- NEW met1 ( 201710 1798770 ) ( 1380230 * )
- NEW met2 ( 181930 1799450 ) ( * 2028950 )
- NEW met1 ( 181930 2028950 ) M1M2_PR
- NEW met1 ( 186990 2028950 ) M1M2_PR
- NEW met2 ( 186990 2028780 ) M2M3_PR_M
- NEW met1 ( 181930 1799450 ) M1M2_PR
- NEW li1 ( 199410 1799450 ) L1M1_PR_MR
- NEW li1 ( 201710 1798770 ) L1M1_PR_MR
- NEW met1 ( 1380230 1798770 ) M1M2_PR ;
+ + ROUTED met2 ( 1380230 2380 0 ) ( * 17340 )
+ NEW met2 ( 1380230 17340 ) ( 1380690 * )
+ NEW met2 ( 866870 108970 ) ( * 2286670 )
+ NEW met2 ( 1380690 17340 ) ( * 108970 )
+ NEW met1 ( 866870 108970 ) ( 1380690 * )
+ NEW li1 ( 449190 2286670 ) ( * 2289730 )
+ NEW met1 ( 432170 2289730 ) ( 449190 * )
+ NEW met2 ( 432170 2289730 ) ( * 2300100 )
+ NEW met2 ( 430790 2300100 0 ) ( 432170 * )
+ NEW met1 ( 449190 2286670 ) ( 866870 * )
+ NEW met1 ( 866870 108970 ) M1M2_PR
+ NEW met1 ( 1380690 108970 ) M1M2_PR
+ NEW met1 ( 866870 2286670 ) M1M2_PR
+ NEW li1 ( 449190 2286670 ) L1M1_PR_MR
+ NEW li1 ( 449190 2289730 ) L1M1_PR_MR
+ NEW met1 ( 432170 2289730 ) M1M2_PR ;
- la_data_out[43] ( PIN la_data_out[43] ) ( chip_controller la_data_out[43] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2024020 0 ) ( 608350 * )
- NEW met2 ( 608350 2021810 ) ( * 2024020 )
- NEW met2 ( 1397710 2380 0 ) ( * 3060 )
- NEW met2 ( 1396790 3060 ) ( 1397710 * )
- NEW met2 ( 1396790 2380 ) ( * 3060 )
- NEW met2 ( 1395410 2380 ) ( 1396790 * )
- NEW met1 ( 608350 2021810 ) ( 1394030 * )
- NEW met2 ( 1394030 82800 ) ( 1395410 * )
- NEW met2 ( 1395410 2380 ) ( * 82800 )
- NEW met2 ( 1394030 82800 ) ( * 2021810 )
- NEW met2 ( 608350 2024020 ) M2M3_PR_M
- NEW met1 ( 608350 2021810 ) M1M2_PR
- NEW met1 ( 1394030 2021810 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2509540 0 ) ( 609270 * )
+ NEW met2 ( 609270 2505290 ) ( * 2509540 )
+ NEW met2 ( 1170470 27710 ) ( * 2505290 )
+ NEW met1 ( 609270 2505290 ) ( 1170470 * )
+ NEW met2 ( 1397710 2380 0 ) ( * 27710 )
+ NEW met1 ( 1170470 27710 ) ( 1397710 * )
+ NEW met2 ( 609270 2509540 ) M2M3_PR_M
+ NEW met1 ( 609270 2505290 ) M1M2_PR
+ NEW met1 ( 1170470 27710 ) M1M2_PR
+ NEW met1 ( 1170470 2505290 ) M1M2_PR
+ NEW met1 ( 1397710 27710 ) M1M2_PR ;
- la_data_out[44] ( PIN la_data_out[44] ) ( chip_controller la_data_out[44] ) + USE SIGNAL
- + ROUTED li1 ( 416070 2195890 ) ( * 2199630 )
- NEW met2 ( 416070 2199460 ) ( * 2199630 )
- NEW met2 ( 415150 2199460 0 ) ( 416070 * )
- NEW met2 ( 1415650 2380 0 ) ( * 16830 )
- NEW met1 ( 1411050 16830 ) ( 1415650 * )
- NEW met1 ( 416070 2195890 ) ( 1411050 * )
- NEW met2 ( 1411050 16830 ) ( * 2195890 )
- NEW li1 ( 416070 2195890 ) L1M1_PR_MR
- NEW li1 ( 416070 2199630 ) L1M1_PR_MR
- NEW met1 ( 416070 2199630 ) M1M2_PR
- NEW met1 ( 1415650 16830 ) M1M2_PR
- NEW met1 ( 1411050 16830 ) M1M2_PR
- NEW met1 ( 1411050 2195890 ) M1M2_PR
- NEW met1 ( 416070 2199630 ) RECT ( -355 -70 0 70 ) ;
+ + ROUTED met2 ( 1252810 22950 ) ( * 2511750 )
+ NEW met2 ( 614330 2511750 ) ( * 2512940 )
+ NEW met3 ( 599380 2512940 0 ) ( 614330 * )
+ NEW met1 ( 614330 2511750 ) ( 1252810 * )
+ NEW met2 ( 1415650 2380 0 ) ( * 22950 )
+ NEW met1 ( 1252810 22950 ) ( 1415650 * )
+ NEW met1 ( 1252810 22950 ) M1M2_PR
+ NEW met1 ( 1252810 2511750 ) M1M2_PR
+ NEW met2 ( 614330 2512940 ) M2M3_PR_M
+ NEW met1 ( 614330 2511750 ) M1M2_PR
+ NEW met1 ( 1415650 22950 ) M1M2_PR ;
- la_data_out[45] ( PIN la_data_out[45] ) ( chip_controller la_data_out[45] ) + USE SIGNAL
- + ROUTED met2 ( 416990 2199460 0 ) ( * 2212890 )
- NEW met2 ( 476330 2199630 ) ( * 2212550 )
- NEW met1 ( 428030 2212550 ) ( * 2212890 )
- NEW met1 ( 416990 2212890 ) ( 428030 * )
- NEW met1 ( 428030 2212550 ) ( 476330 * )
- NEW met2 ( 1433130 2380 0 ) ( * 17340 )
- NEW met2 ( 1431290 17340 ) ( 1433130 * )
- NEW met1 ( 476330 2199630 ) ( 517500 * )
- NEW met1 ( 517500 2197590 ) ( * 2199630 )
- NEW met2 ( 1428530 82800 ) ( 1431290 * )
- NEW met2 ( 1431290 17340 ) ( * 82800 )
- NEW met1 ( 517500 2197590 ) ( 1428530 * )
- NEW met2 ( 1428530 82800 ) ( * 2197590 )
- NEW met1 ( 416990 2212890 ) M1M2_PR
- NEW met1 ( 476330 2212550 ) M1M2_PR
- NEW met1 ( 476330 2199630 ) M1M2_PR
- NEW met1 ( 1428530 2197590 ) M1M2_PR ;
+ + ROUTED met2 ( 189290 2512770 ) ( * 2516340 )
+ NEW met3 ( 189290 2516340 ) ( 201020 * )
+ NEW met3 ( 201020 2516340 ) ( * 2517020 0 )
+ NEW met1 ( 135470 2512770 ) ( 189290 * )
+ NEW met2 ( 135470 149770 ) ( * 2512770 )
+ NEW met2 ( 1428530 82800 ) ( 1433130 * )
+ NEW met2 ( 1433130 2380 0 ) ( * 82800 )
+ NEW met1 ( 135470 149770 ) ( 1428530 * )
+ NEW met2 ( 1428530 82800 ) ( * 149770 )
+ NEW met1 ( 189290 2512770 ) M1M2_PR
+ NEW met2 ( 189290 2516340 ) M2M3_PR_M
+ NEW met1 ( 135470 2512770 ) M1M2_PR
+ NEW met1 ( 135470 149770 ) M1M2_PR
+ NEW met1 ( 1428530 149770 ) M1M2_PR ;
- la_data_out[46] ( PIN la_data_out[46] ) ( chip_controller la_data_out[46] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2028780 0 ) ( 607430 * )
- NEW met2 ( 607430 2028780 ) ( * 2028950 )
+ + ROUTED met3 ( 599380 2521100 0 ) ( 607890 * )
+ NEW met2 ( 607890 2519230 ) ( * 2521100 )
NEW met2 ( 1451070 2380 0 ) ( * 3060 )
NEW met2 ( 1450150 3060 ) ( 1451070 * )
NEW met2 ( 1450150 2380 ) ( * 3060 )
NEW met2 ( 1449230 2380 ) ( 1450150 * )
- NEW met2 ( 1449230 2380 ) ( * 2028950 )
- NEW met1 ( 607430 2028950 ) ( 1449230 * )
- NEW met2 ( 607430 2028780 ) M2M3_PR_M
- NEW met1 ( 607430 2028950 ) M1M2_PR
- NEW met1 ( 1449230 2028950 ) M1M2_PR ;
+ NEW met2 ( 1449230 2380 ) ( * 67150 )
+ NEW met1 ( 607890 2519230 ) ( 721510 * )
+ NEW met2 ( 721510 67150 ) ( * 2519230 )
+ NEW met1 ( 721510 67150 ) ( 1449230 * )
+ NEW met2 ( 607890 2521100 ) M2M3_PR_M
+ NEW met1 ( 607890 2519230 ) M1M2_PR
+ NEW met1 ( 1449230 67150 ) M1M2_PR
+ NEW met1 ( 721510 2519230 ) M1M2_PR
+ NEW met1 ( 721510 67150 ) M1M2_PR ;
- la_data_out[47] ( PIN la_data_out[47] ) ( chip_controller la_data_out[47] ) + USE SIGNAL
- + ROUTED met2 ( 1468550 2380 0 ) ( * 16490 )
- NEW met1 ( 1459350 16490 ) ( 1468550 * )
- NEW met2 ( 418370 2199460 0 ) ( * 2202860 )
- NEW met2 ( 1459350 16490 ) ( * 2202860 )
- NEW met3 ( 418370 2202860 ) ( 1459350 * )
- NEW met1 ( 1468550 16490 ) M1M2_PR
- NEW met1 ( 1459350 16490 ) M1M2_PR
- NEW met2 ( 418370 2202860 ) M2M3_PR_M
- NEW met2 ( 1459350 2202860 ) M2M3_PR_M ;
+ + ROUTED met2 ( 1468550 2380 0 ) ( * 18530 )
+ NEW met2 ( 762450 18530 ) ( * 2738530 )
+ NEW met2 ( 433550 2699260 0 ) ( 434010 * )
+ NEW met2 ( 434010 2699260 ) ( * 2738530 )
+ NEW met1 ( 434010 2738530 ) ( 762450 * )
+ NEW met1 ( 762450 18530 ) ( 1468550 * )
+ NEW met1 ( 762450 18530 ) M1M2_PR
+ NEW met1 ( 762450 2738530 ) M1M2_PR
+ NEW met1 ( 1468550 18530 ) M1M2_PR
+ NEW met1 ( 434010 2738530 ) M1M2_PR ;
- la_data_out[48] ( PIN la_data_out[48] ) ( chip_controller la_data_out[48] ) + USE SIGNAL
- + ROUTED li1 ( 420670 2194530 ) ( * 2199630 )
- NEW met2 ( 420670 2199460 ) ( * 2199630 )
- NEW met2 ( 420210 2199460 0 ) ( 420670 * )
- NEW met2 ( 1480050 16150 ) ( * 2194530 )
- NEW met2 ( 1486490 2380 0 ) ( * 16150 )
- NEW met1 ( 1480050 16150 ) ( 1486490 * )
- NEW met1 ( 420670 2194530 ) ( 1480050 * )
- NEW met1 ( 1480050 16150 ) M1M2_PR
- NEW li1 ( 420670 2194530 ) L1M1_PR_MR
- NEW li1 ( 420670 2199630 ) L1M1_PR_MR
- NEW met1 ( 420670 2199630 ) M1M2_PR
- NEW met1 ( 1480050 2194530 ) M1M2_PR
- NEW met1 ( 1486490 16150 ) M1M2_PR
- NEW met1 ( 420670 2199630 ) RECT ( -355 -70 0 70 ) ;
+ + ROUTED met2 ( 437230 2699260 0 ) ( 438610 * )
+ NEW met2 ( 438610 2699260 ) ( * 2715070 )
+ NEW met2 ( 741750 41310 ) ( * 2715070 )
+ NEW met1 ( 741750 41310 ) ( 1486490 * )
+ NEW met2 ( 1486490 2380 0 ) ( * 41310 )
+ NEW met1 ( 438610 2715070 ) ( 741750 * )
+ NEW met1 ( 438610 2715070 ) M1M2_PR
+ NEW met1 ( 741750 2715070 ) M1M2_PR
+ NEW met1 ( 741750 41310 ) M1M2_PR
+ NEW met1 ( 1486490 41310 ) M1M2_PR ;
- la_data_out[49] ( PIN la_data_out[49] ) ( chip_controller la_data_out[49] ) + USE SIGNAL
- + ROUTED met2 ( 186990 2042890 ) ( * 2045780 )
- NEW met3 ( 186990 2045780 ) ( 200100 * 0 )
- NEW met1 ( 151570 2042890 ) ( 186990 * )
- NEW met2 ( 1503970 2380 0 ) ( * 25670 )
- NEW met1 ( 151570 25670 ) ( 1503970 * )
- NEW met2 ( 151570 25670 ) ( * 2042890 )
- NEW met1 ( 186990 2042890 ) M1M2_PR
- NEW met2 ( 186990 2045780 ) M2M3_PR_M
- NEW met1 ( 151570 25670 ) M1M2_PR
- NEW met1 ( 151570 2042890 ) M1M2_PR
- NEW met1 ( 1503970 25670 ) M1M2_PR ;
+ + ROUTED met2 ( 186990 2518550 ) ( * 2519740 )
+ NEW met3 ( 186990 2519740 ) ( 201020 * )
+ NEW met3 ( 201020 2519740 ) ( * 2520420 0 )
+ NEW met1 ( 157090 2518550 ) ( 186990 * )
+ NEW met1 ( 157090 184790 ) ( 1497990 * )
+ NEW met2 ( 157090 184790 ) ( * 2518550 )
+ NEW met1 ( 1497990 58310 ) ( 1503970 * )
+ NEW met2 ( 1503970 2380 0 ) ( * 58310 )
+ NEW met2 ( 1497990 58310 ) ( * 184790 )
+ NEW met1 ( 186990 2518550 ) M1M2_PR
+ NEW met2 ( 186990 2519740 ) M2M3_PR_M
+ NEW met1 ( 157090 184790 ) M1M2_PR
+ NEW met1 ( 157090 2518550 ) M1M2_PR
+ NEW met1 ( 1497990 184790 ) M1M2_PR
+ NEW met1 ( 1497990 58310 ) M1M2_PR
+ NEW met1 ( 1503970 58310 ) M1M2_PR ;
- la_data_out[4] ( PIN la_data_out[4] ) ( chip_controller la_data_out[4] ) + USE SIGNAL
+ ROUTED met2 ( 704030 82800 ) ( 706330 * )
NEW met2 ( 706330 2380 0 ) ( * 82800 )
- NEW met2 ( 704030 82800 ) ( * 1842630 )
- NEW met3 ( 599380 1847220 0 ) ( 610190 * )
- NEW met2 ( 610190 1842630 ) ( * 1847220 )
- NEW met1 ( 610190 1842630 ) ( 704030 * )
- NEW met1 ( 704030 1842630 ) M1M2_PR
- NEW met2 ( 610190 1847220 ) M2M3_PR_M
- NEW met1 ( 610190 1842630 ) M1M2_PR ;
+ NEW met2 ( 704030 82800 ) ( * 2218330 )
+ NEW met1 ( 273010 2218330 ) ( 704030 * )
+ NEW met1 ( 249550 2284630 ) ( 273010 * )
+ NEW met2 ( 249550 2284630 ) ( * 2300100 0 )
+ NEW met2 ( 273010 2218330 ) ( * 2284630 )
+ NEW met1 ( 704030 2218330 ) M1M2_PR
+ NEW met1 ( 273010 2218330 ) M1M2_PR
+ NEW met1 ( 273010 2284630 ) M1M2_PR
+ NEW met1 ( 249550 2284630 ) M1M2_PR ;
- la_data_out[50] ( PIN la_data_out[50] ) ( chip_controller la_data_out[50] ) + USE SIGNAL
- + ROUTED met2 ( 1521910 2380 0 ) ( * 15130 )
- NEW met1 ( 1500750 15130 ) ( 1521910 * )
- NEW met2 ( 425270 2199460 0 ) ( * 2206260 )
- NEW met3 ( 425270 2206260 ) ( 1500750 * )
- NEW met2 ( 1500750 15130 ) ( * 2206260 )
- NEW met1 ( 1521910 15130 ) M1M2_PR
- NEW met1 ( 1500750 15130 ) M1M2_PR
- NEW met2 ( 425270 2206260 ) M2M3_PR_M
- NEW met2 ( 1500750 2206260 ) M2M3_PR_M ;
+ + ROUTED met1 ( 444590 2283950 ) ( 447810 * )
+ NEW met2 ( 444590 2283950 ) ( * 2300100 0 )
+ NEW met2 ( 447810 40630 ) ( * 2283950 )
+ NEW met1 ( 447810 40630 ) ( 1521910 * )
+ NEW met2 ( 1521910 2380 0 ) ( * 40630 )
+ NEW met1 ( 447810 40630 ) M1M2_PR
+ NEW met1 ( 447810 2283950 ) M1M2_PR
+ NEW met1 ( 444590 2283950 ) M1M2_PR
+ NEW met1 ( 1521910 40630 ) M1M2_PR ;
- la_data_out[51] ( PIN la_data_out[51] ) ( chip_controller la_data_out[51] ) + USE SIGNAL
- + ROUTED met2 ( 1539850 2380 0 ) ( * 27030 )
- NEW met1 ( 445050 27030 ) ( 1539850 * )
- NEW met3 ( 433550 1787380 ) ( 445050 * )
- NEW met2 ( 433550 1787380 ) ( * 1800300 0 )
- NEW met2 ( 445050 27030 ) ( * 1787380 )
- NEW met1 ( 1539850 27030 ) M1M2_PR
- NEW met1 ( 445050 27030 ) M1M2_PR
- NEW met2 ( 445050 1787380 ) M2M3_PR_M
- NEW met2 ( 433550 1787380 ) M2M3_PR_M ;
+ + ROUTED met2 ( 1539850 2380 0 ) ( * 40290 )
+ NEW met2 ( 447350 2300100 ) ( 447810 * 0 )
+ NEW met2 ( 447350 40290 ) ( * 2300100 )
+ NEW met1 ( 447350 40290 ) ( 1539850 * )
+ NEW met1 ( 1539850 40290 ) M1M2_PR
+ NEW met1 ( 447350 40290 ) M1M2_PR ;
- la_data_out[52] ( PIN la_data_out[52] ) ( chip_controller la_data_out[52] ) + USE SIGNAL
- + ROUTED met2 ( 1552730 82800 ) ( 1557330 * )
- NEW met2 ( 1557330 2380 0 ) ( * 82800 )
- NEW met2 ( 1552730 82800 ) ( * 1758990 )
- NEW met1 ( 445970 1758990 ) ( 1552730 * )
- NEW met1 ( 439530 1787210 ) ( 445970 * )
- NEW met2 ( 439530 1787210 ) ( * 1800300 0 )
- NEW met2 ( 445970 1758990 ) ( * 1787210 )
- NEW met1 ( 1552730 1758990 ) M1M2_PR
- NEW met1 ( 445970 1758990 ) M1M2_PR
- NEW met1 ( 445970 1787210 ) M1M2_PR
- NEW met1 ( 439530 1787210 ) M1M2_PR ;
+ + ROUTED met2 ( 1557330 2380 0 ) ( * 39950 )
+ NEW met2 ( 454250 2300100 0 ) ( 455170 * )
+ NEW met2 ( 455170 39950 ) ( * 2300100 )
+ NEW met1 ( 455170 39950 ) ( 1557330 * )
+ NEW met1 ( 1557330 39950 ) M1M2_PR
+ NEW met1 ( 455170 39950 ) M1M2_PR ;
- la_data_out[53] ( PIN la_data_out[53] ) ( chip_controller la_data_out[53] ) + USE SIGNAL
- + ROUTED met2 ( 1575270 2380 0 ) ( * 14790 )
- NEW met1 ( 1493850 14790 ) ( 1575270 * )
- NEW met1 ( 431710 2221390 ) ( 1493850 * )
- NEW met2 ( 431710 2199460 0 ) ( * 2221390 )
- NEW met2 ( 1493850 14790 ) ( * 2221390 )
- NEW met1 ( 1575270 14790 ) M1M2_PR
- NEW met1 ( 431710 2221390 ) M1M2_PR
- NEW met1 ( 1493850 14790 ) M1M2_PR
- NEW met1 ( 1493850 2221390 ) M1M2_PR ;
+ + ROUTED li1 ( 492890 2717110 ) ( * 2718470 )
+ NEW li1 ( 492890 2717110 ) ( 493810 * )
+ NEW met2 ( 1575270 2380 0 ) ( * 3060 )
+ NEW met2 ( 1574350 3060 ) ( 1575270 * )
+ NEW met2 ( 1574350 2380 ) ( * 3060 )
+ NEW met2 ( 1573430 2380 ) ( 1574350 * )
+ NEW met2 ( 687010 60690 ) ( * 2717110 )
+ NEW met2 ( 1573430 2380 ) ( * 60690 )
+ NEW met2 ( 449190 2699260 0 ) ( 450570 * )
+ NEW met2 ( 450570 2699260 ) ( * 2718470 )
+ NEW met1 ( 450570 2718470 ) ( 492890 * )
+ NEW met1 ( 687010 60690 ) ( 1573430 * )
+ NEW met1 ( 493810 2717110 ) ( 687010 * )
+ NEW li1 ( 492890 2718470 ) L1M1_PR_MR
+ NEW li1 ( 493810 2717110 ) L1M1_PR_MR
+ NEW met1 ( 687010 2717110 ) M1M2_PR
+ NEW met1 ( 687010 60690 ) M1M2_PR
+ NEW met1 ( 1573430 60690 ) M1M2_PR
+ NEW met1 ( 450570 2718470 ) M1M2_PR ;
- la_data_out[54] ( PIN la_data_out[54] ) ( chip_controller la_data_out[54] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2043740 0 ) ( 607430 * )
- NEW met2 ( 607430 2042550 ) ( * 2043740 )
- NEW met1 ( 607430 2042550 ) ( 1204510 * )
+ + ROUTED met1 ( 493350 2716770 ) ( * 2717110 )
+ NEW met2 ( 886650 158610 ) ( * 2716770 )
+ NEW met2 ( 454710 2699260 0 ) ( 455170 * )
+ NEW met2 ( 455170 2699260 ) ( * 2717110 )
+ NEW met1 ( 455170 2717110 ) ( 493350 * )
NEW met2 ( 1592750 2380 0 ) ( * 3060 )
NEW met2 ( 1591830 3060 ) ( 1592750 * )
NEW met2 ( 1591830 2380 ) ( * 3060 )
NEW met2 ( 1590450 2380 ) ( 1591830 * )
- NEW met1 ( 1204510 1759330 ) ( 1587230 * )
- NEW met2 ( 1204510 1759330 ) ( * 2042550 )
NEW met2 ( 1587230 82800 ) ( 1590450 * )
NEW met2 ( 1590450 2380 ) ( * 82800 )
- NEW met2 ( 1587230 82800 ) ( * 1759330 )
- NEW met2 ( 607430 2043740 ) M2M3_PR_M
- NEW met1 ( 607430 2042550 ) M1M2_PR
- NEW met1 ( 1204510 1759330 ) M1M2_PR
- NEW met1 ( 1204510 2042550 ) M1M2_PR
- NEW met1 ( 1587230 1759330 ) M1M2_PR ;
+ NEW met1 ( 886650 158610 ) ( 1587230 * )
+ NEW met2 ( 1587230 82800 ) ( * 158610 )
+ NEW met1 ( 493350 2716770 ) ( 886650 * )
+ NEW met1 ( 886650 2716770 ) M1M2_PR
+ NEW met1 ( 886650 158610 ) M1M2_PR
+ NEW met1 ( 455170 2717110 ) M1M2_PR
+ NEW met1 ( 1587230 158610 ) M1M2_PR ;
- la_data_out[55] ( PIN la_data_out[55] ) ( chip_controller la_data_out[55] ) + USE SIGNAL
- + ROUTED met1 ( 452410 1758650 ) ( 1607930 * )
- NEW met1 ( 447810 1787210 ) ( 452410 * )
- NEW met2 ( 447810 1787210 ) ( * 1800300 0 )
- NEW met2 ( 452410 1758650 ) ( * 1787210 )
+ + ROUTED met2 ( 189750 2526540 ) ( * 2526710 )
+ NEW met3 ( 189750 2526540 ) ( 200100 * )
+ NEW met3 ( 200100 2525860 0 ) ( * 2526540 )
+ NEW met1 ( 142370 2526710 ) ( 189750 * )
+ NEW met2 ( 142370 163710 ) ( * 2526710 )
NEW met2 ( 1607930 82800 ) ( 1610690 * )
NEW met2 ( 1610690 2380 0 ) ( * 82800 )
- NEW met2 ( 1607930 82800 ) ( * 1758650 )
- NEW met1 ( 452410 1758650 ) M1M2_PR
- NEW met1 ( 1607930 1758650 ) M1M2_PR
- NEW met1 ( 452410 1787210 ) M1M2_PR
- NEW met1 ( 447810 1787210 ) M1M2_PR ;
+ NEW met1 ( 142370 163710 ) ( 1607930 * )
+ NEW met2 ( 1607930 82800 ) ( * 163710 )
+ NEW met1 ( 189750 2526710 ) M1M2_PR
+ NEW met2 ( 189750 2526540 ) M2M3_PR_M
+ NEW met1 ( 142370 2526710 ) M1M2_PR
+ NEW met1 ( 142370 163710 ) M1M2_PR
+ NEW met1 ( 1607930 163710 ) M1M2_PR ;
- la_data_out[56] ( PIN la_data_out[56] ) ( chip_controller la_data_out[56] ) + USE SIGNAL
- + ROUTED met2 ( 188370 2057170 ) ( * 2058020 )
- NEW met3 ( 188370 2058020 ) ( 200100 * 0 )
- NEW met1 ( 156630 2057170 ) ( 188370 * )
- NEW met2 ( 1628170 2380 0 ) ( * 15810 )
- NEW met1 ( 1621730 15810 ) ( 1628170 * )
- NEW met1 ( 156630 1765790 ) ( 1621730 * )
- NEW met2 ( 156630 1765790 ) ( * 2057170 )
- NEW met2 ( 1621730 15810 ) ( * 1765790 )
- NEW met1 ( 188370 2057170 ) M1M2_PR
- NEW met2 ( 188370 2058020 ) M2M3_PR_M
- NEW met1 ( 156630 1765790 ) M1M2_PR
- NEW met1 ( 156630 2057170 ) M1M2_PR
- NEW met1 ( 1628170 15810 ) M1M2_PR
- NEW met1 ( 1621730 15810 ) M1M2_PR
- NEW met1 ( 1621730 1765790 ) M1M2_PR ;
+ + ROUTED met2 ( 188370 2526370 ) ( * 2527220 )
+ NEW met3 ( 188370 2527220 ) ( 201020 * )
+ NEW met3 ( 201020 2527220 ) ( * 2527900 0 )
+ NEW met1 ( 135930 2526370 ) ( 188370 * )
+ NEW met2 ( 1628170 2380 0 ) ( * 16830 )
+ NEW met1 ( 1621730 16830 ) ( 1628170 * )
+ NEW met2 ( 135930 156570 ) ( * 2526370 )
+ NEW met1 ( 135930 156570 ) ( 1621730 * )
+ NEW met2 ( 1621730 16830 ) ( * 156570 )
+ NEW met1 ( 188370 2526370 ) M1M2_PR
+ NEW met2 ( 188370 2527220 ) M2M3_PR_M
+ NEW met1 ( 135930 2526370 ) M1M2_PR
+ NEW met1 ( 1628170 16830 ) M1M2_PR
+ NEW met1 ( 1621730 16830 ) M1M2_PR
+ NEW met1 ( 135930 156570 ) M1M2_PR
+ NEW met1 ( 1621730 156570 ) M1M2_PR ;
- la_data_out[57] ( PIN la_data_out[57] ) ( chip_controller la_data_out[57] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2045100 0 ) ( 607890 * )
- NEW met2 ( 607890 2042890 ) ( * 2045100 )
+ + ROUTED met2 ( 189290 2526030 ) ( * 2530620 )
+ NEW met3 ( 189290 2530620 ) ( 201020 * )
+ NEW met3 ( 201020 2530620 ) ( * 2531300 0 )
NEW met2 ( 1646110 2380 0 ) ( * 3060 )
NEW met2 ( 1645190 3060 ) ( 1646110 * )
NEW met2 ( 1645190 2380 ) ( * 3060 )
NEW met2 ( 1643810 2380 ) ( 1645190 * )
- NEW met2 ( 1642430 82800 ) ( * 113730 )
+ NEW met2 ( 128570 142290 ) ( * 2526030 )
NEW met2 ( 1642430 82800 ) ( 1643810 * )
NEW met2 ( 1643810 2380 ) ( * 82800 )
- NEW met1 ( 607890 2042890 ) ( 934950 * )
- NEW met1 ( 934950 113730 ) ( 1642430 * )
- NEW met2 ( 934950 113730 ) ( * 2042890 )
- NEW met2 ( 607890 2045100 ) M2M3_PR_M
- NEW met1 ( 607890 2042890 ) M1M2_PR
- NEW met1 ( 1642430 113730 ) M1M2_PR
- NEW met1 ( 934950 113730 ) M1M2_PR
- NEW met1 ( 934950 2042890 ) M1M2_PR ;
+ NEW met2 ( 1642430 82800 ) ( * 142290 )
+ NEW met1 ( 128570 2526030 ) ( 189290 * )
+ NEW met1 ( 128570 142290 ) ( 1642430 * )
+ NEW met1 ( 128570 2526030 ) M1M2_PR
+ NEW met1 ( 189290 2526030 ) M1M2_PR
+ NEW met2 ( 189290 2530620 ) M2M3_PR_M
+ NEW met1 ( 128570 142290 ) M1M2_PR
+ NEW met1 ( 1642430 142290 ) M1M2_PR ;
- la_data_out[58] ( PIN la_data_out[58] ) ( chip_controller la_data_out[58] ) + USE SIGNAL
- + ROUTED met2 ( 1663590 2380 0 ) ( * 15810 )
- NEW met1 ( 1659450 15810 ) ( 1663590 * )
- NEW met2 ( 1659450 15810 ) ( * 1758310 )
- NEW met1 ( 462070 1758310 ) ( 1659450 * )
- NEW met1 ( 455630 1787210 ) ( 462070 * )
- NEW met2 ( 455630 1787210 ) ( * 1800300 0 )
- NEW met2 ( 462070 1758310 ) ( * 1787210 )
- NEW met1 ( 1663590 15810 ) M1M2_PR
- NEW met1 ( 1659450 15810 ) M1M2_PR
- NEW met1 ( 1659450 1758310 ) M1M2_PR
- NEW met1 ( 462070 1758310 ) M1M2_PR
- NEW met1 ( 462070 1787210 ) M1M2_PR
- NEW met1 ( 455630 1787210 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2539460 0 ) ( 607430 * )
+ NEW met2 ( 607430 2539460 ) ( * 2539970 )
+ NEW met2 ( 990150 37570 ) ( * 2539970 )
+ NEW met2 ( 1663590 2380 0 ) ( * 37570 )
+ NEW met1 ( 607430 2539970 ) ( 990150 * )
+ NEW met1 ( 990150 37570 ) ( 1663590 * )
+ NEW met2 ( 607430 2539460 ) M2M3_PR_M
+ NEW met1 ( 607430 2539970 ) M1M2_PR
+ NEW met1 ( 990150 2539970 ) M1M2_PR
+ NEW met1 ( 990150 37570 ) M1M2_PR
+ NEW met1 ( 1663590 37570 ) M1M2_PR ;
- la_data_out[59] ( PIN la_data_out[59] ) ( chip_controller la_data_out[59] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2047820 0 ) ( 608350 * )
- NEW met2 ( 608350 2043230 ) ( * 2047820 )
- NEW met1 ( 608350 2043230 ) ( 845710 * )
- NEW met1 ( 845710 1752530 ) ( 1676930 * )
- NEW met2 ( 845710 1752530 ) ( * 2043230 )
+ + ROUTED met3 ( 599380 2541500 0 ) ( 609730 * )
+ NEW met2 ( 609730 2539290 ) ( * 2541500 )
+ NEW met2 ( 1259710 173230 ) ( * 2539290 )
+ NEW met1 ( 609730 2539290 ) ( 1259710 * )
NEW met2 ( 1676930 82800 ) ( 1681530 * )
NEW met2 ( 1681530 2380 0 ) ( * 82800 )
- NEW met2 ( 1676930 82800 ) ( * 1752530 )
- NEW met2 ( 608350 2047820 ) M2M3_PR_M
- NEW met1 ( 608350 2043230 ) M1M2_PR
- NEW met1 ( 845710 1752530 ) M1M2_PR
- NEW met1 ( 845710 2043230 ) M1M2_PR
- NEW met1 ( 1676930 1752530 ) M1M2_PR ;
+ NEW met1 ( 1259710 173230 ) ( 1676930 * )
+ NEW met2 ( 1676930 82800 ) ( * 173230 )
+ NEW met2 ( 609730 2541500 ) M2M3_PR_M
+ NEW met1 ( 609730 2539290 ) M1M2_PR
+ NEW met1 ( 1259710 2539290 ) M1M2_PR
+ NEW met1 ( 1259710 173230 ) M1M2_PR
+ NEW met1 ( 1676930 173230 ) M1M2_PR ;
- la_data_out[5] ( PIN la_data_out[5] ) ( chip_controller la_data_out[5] ) + USE SIGNAL
- + ROUTED met1 ( 231610 2212890 ) ( 234830 * )
- NEW met2 ( 234830 2212890 ) ( * 2219010 )
- NEW met2 ( 723810 2380 0 ) ( * 17850 )
- NEW met1 ( 717830 17850 ) ( 723810 * )
- NEW met1 ( 234830 2219010 ) ( 717830 * )
- NEW met2 ( 231610 2199460 0 ) ( * 2212890 )
- NEW met2 ( 717830 17850 ) ( * 2219010 )
- NEW met1 ( 231610 2212890 ) M1M2_PR
- NEW met1 ( 234830 2212890 ) M1M2_PR
- NEW met1 ( 234830 2219010 ) M1M2_PR
- NEW met1 ( 723810 17850 ) M1M2_PR
- NEW met1 ( 717830 17850 ) M1M2_PR
- NEW met1 ( 717830 2219010 ) M1M2_PR ;
+ + ROUTED met2 ( 260590 2278340 ) ( 261970 * )
+ NEW met2 ( 260590 2278340 ) ( * 2300100 )
+ NEW met2 ( 259210 2300100 0 ) ( 260590 * )
+ NEW met2 ( 261970 39270 ) ( * 2278340 )
+ NEW met1 ( 261970 39270 ) ( 723810 * )
+ NEW met2 ( 723810 2380 0 ) ( * 39270 )
+ NEW met1 ( 261970 39270 ) M1M2_PR
+ NEW met1 ( 723810 39270 ) M1M2_PR ;
- la_data_out[60] ( PIN la_data_out[60] ) ( chip_controller la_data_out[60] ) + USE SIGNAL
- + ROUTED met1 ( 447810 2213910 ) ( 1010850 * )
+ + ROUTED met3 ( 599380 2546260 0 ) ( 608350 * )
+ NEW met2 ( 608350 2546260 ) ( * 2547790 )
NEW met2 ( 1699470 2380 0 ) ( * 3060 )
NEW met2 ( 1698550 3060 ) ( 1699470 * )
NEW met2 ( 1698550 2380 ) ( * 3060 )
NEW met2 ( 1697630 2380 ) ( 1698550 * )
- NEW met1 ( 1010850 1730770 ) ( 1697630 * )
- NEW met2 ( 447810 2199460 0 ) ( * 2213910 )
- NEW met2 ( 1010850 1730770 ) ( * 2213910 )
- NEW met2 ( 1697630 2380 ) ( * 1730770 )
- NEW met1 ( 447810 2213910 ) M1M2_PR
- NEW met1 ( 1010850 1730770 ) M1M2_PR
- NEW met1 ( 1010850 2213910 ) M1M2_PR
- NEW met1 ( 1697630 1730770 ) M1M2_PR ;
+ NEW met1 ( 608350 2547790 ) ( 721970 * )
+ NEW met2 ( 721970 151130 ) ( * 2547790 )
+ NEW met1 ( 721970 151130 ) ( 1697630 * )
+ NEW met2 ( 1697630 2380 ) ( * 151130 )
+ NEW met2 ( 608350 2546260 ) M2M3_PR_M
+ NEW met1 ( 608350 2547790 ) M1M2_PR
+ NEW met1 ( 721970 151130 ) M1M2_PR
+ NEW met1 ( 721970 2547790 ) M1M2_PR
+ NEW met1 ( 1697630 151130 ) M1M2_PR ;
- la_data_out[61] ( PIN la_data_out[61] ) ( chip_controller la_data_out[61] ) + USE SIGNAL
- + ROUTED met2 ( 187910 2063290 ) ( * 2066860 )
- NEW met3 ( 187910 2066860 ) ( 200100 * 0 )
+ + ROUTED met2 ( 470350 2699260 0 ) ( 471730 * )
+ NEW met2 ( 471730 2699260 ) ( * 2714050 )
+ NEW met1 ( 471730 2714050 ) ( 494730 * )
+ NEW li1 ( 494730 2714050 ) ( * 2716430 )
+ NEW met2 ( 700350 122910 ) ( * 2716430 )
NEW met2 ( 1716950 2380 0 ) ( * 3060 )
NEW met2 ( 1716030 3060 ) ( 1716950 * )
NEW met2 ( 1716030 2380 ) ( * 3060 )
NEW met2 ( 1714650 2380 ) ( 1716030 * )
- NEW met1 ( 177330 2063290 ) ( 187910 * )
+ NEW met1 ( 700350 122910 ) ( 1711430 * )
+ NEW met2 ( 1711430 82800 ) ( * 122910 )
NEW met2 ( 1711430 82800 ) ( 1714650 * )
NEW met2 ( 1714650 2380 ) ( * 82800 )
- NEW met1 ( 177330 1782790 ) ( 1711430 * )
- NEW met2 ( 1711430 82800 ) ( * 1782790 )
- NEW met2 ( 177330 1782790 ) ( * 2063290 )
- NEW met1 ( 187910 2063290 ) M1M2_PR
- NEW met2 ( 187910 2066860 ) M2M3_PR_M
- NEW met1 ( 177330 1782790 ) M1M2_PR
- NEW met1 ( 177330 2063290 ) M1M2_PR
- NEW met1 ( 1711430 1782790 ) M1M2_PR ;
+ NEW met1 ( 494730 2716430 ) ( 700350 * )
+ NEW met1 ( 471730 2714050 ) M1M2_PR
+ NEW li1 ( 494730 2714050 ) L1M1_PR_MR
+ NEW li1 ( 494730 2716430 ) L1M1_PR_MR
+ NEW met1 ( 700350 122910 ) M1M2_PR
+ NEW met1 ( 700350 2716430 ) M1M2_PR
+ NEW met1 ( 1711430 122910 ) M1M2_PR ;
- la_data_out[62] ( PIN la_data_out[62] ) ( chip_controller la_data_out[62] ) + USE SIGNAL
- + ROUTED met2 ( 1732130 82800 ) ( 1734890 * )
+ + ROUTED met2 ( 189290 2533170 ) ( * 2538100 )
+ NEW met3 ( 189290 2538100 ) ( 201020 * )
+ NEW met3 ( 201020 2538100 ) ( * 2538780 0 )
+ NEW met2 ( 1732130 82800 ) ( 1734890 * )
NEW met2 ( 1734890 2380 0 ) ( * 82800 )
- NEW met2 ( 1732130 82800 ) ( * 1751170 )
- NEW met1 ( 468970 1751170 ) ( 1732130 * )
- NEW met2 ( 468050 1800300 0 ) ( 468970 * )
- NEW met2 ( 468970 1751170 ) ( * 1800300 )
- NEW met1 ( 1732130 1751170 ) M1M2_PR
- NEW met1 ( 468970 1751170 ) M1M2_PR ;
+ NEW met2 ( 1732130 82800 ) ( * 169830 )
+ NEW met1 ( 148350 2533170 ) ( 189290 * )
+ NEW met2 ( 148350 169830 ) ( * 2533170 )
+ NEW met1 ( 148350 169830 ) ( 1732130 * )
+ NEW met1 ( 189290 2533170 ) M1M2_PR
+ NEW met2 ( 189290 2538100 ) M2M3_PR_M
+ NEW met1 ( 1732130 169830 ) M1M2_PR
+ NEW met1 ( 148350 2533170 ) M1M2_PR
+ NEW met1 ( 148350 169830 ) M1M2_PR ;
- la_data_out[63] ( PIN la_data_out[63] ) ( chip_controller la_data_out[63] ) + USE SIGNAL
- + ROUTED met2 ( 1752370 2380 0 ) ( * 10030 )
- NEW met1 ( 1745930 10030 ) ( 1752370 * )
- NEW met1 ( 469890 1788570 ) ( 475410 * )
- NEW met2 ( 469890 1788570 ) ( * 1800300 0 )
- NEW met2 ( 475410 1757970 ) ( * 1788570 )
- NEW met2 ( 1745930 10030 ) ( * 1757970 )
- NEW met1 ( 475410 1757970 ) ( 1745930 * )
- NEW met1 ( 475410 1757970 ) M1M2_PR
- NEW met1 ( 1752370 10030 ) M1M2_PR
- NEW met1 ( 1745930 10030 ) M1M2_PR
- NEW met1 ( 1745930 1757970 ) M1M2_PR
- NEW met1 ( 475410 1788570 ) M1M2_PR
- NEW met1 ( 469890 1788570 ) M1M2_PR ;
+ + ROUTED met2 ( 190210 2539290 ) ( * 2541500 )
+ NEW met3 ( 190210 2541500 ) ( 201020 * )
+ NEW met3 ( 201020 2541500 ) ( * 2542180 0 )
+ NEW met2 ( 129490 107610 ) ( * 2539290 )
+ NEW met1 ( 1746390 58310 ) ( 1752370 * )
+ NEW met2 ( 1746390 58310 ) ( * 107610 )
+ NEW met2 ( 1752370 2380 0 ) ( * 58310 )
+ NEW met1 ( 129490 2539290 ) ( 190210 * )
+ NEW met1 ( 129490 107610 ) ( 1746390 * )
+ NEW met1 ( 129490 107610 ) M1M2_PR
+ NEW met1 ( 129490 2539290 ) M1M2_PR
+ NEW met1 ( 190210 2539290 ) M1M2_PR
+ NEW met2 ( 190210 2541500 ) M2M3_PR_M
+ NEW met1 ( 1746390 107610 ) M1M2_PR
+ NEW met1 ( 1746390 58310 ) M1M2_PR
+ NEW met1 ( 1752370 58310 ) M1M2_PR ;
- la_data_out[64] ( PIN la_data_out[64] ) ( chip_controller la_data_out[64] ) + USE SIGNAL
- + ROUTED met2 ( 1770310 2380 0 ) ( * 3060 )
+ + ROUTED met2 ( 473570 2699260 0 ) ( 474950 * )
+ NEW met2 ( 474950 2699260 ) ( * 2715410 )
+ NEW met2 ( 1770310 2380 0 ) ( * 3060 )
NEW met2 ( 1769390 3060 ) ( 1770310 * )
NEW met2 ( 1769390 2380 ) ( * 3060 )
NEW met2 ( 1768010 2380 ) ( 1769390 * )
- NEW met1 ( 474030 1789250 ) ( 507610 * )
- NEW met2 ( 474030 1789250 ) ( * 1800300 0 )
- NEW met2 ( 507610 1751510 ) ( * 1789250 )
NEW met2 ( 1766630 82800 ) ( 1768010 * )
NEW met2 ( 1768010 2380 ) ( * 82800 )
- NEW met2 ( 1766630 82800 ) ( * 1751510 )
- NEW met1 ( 507610 1751510 ) ( 1766630 * )
- NEW met1 ( 507610 1751510 ) M1M2_PR
- NEW met1 ( 1766630 1751510 ) M1M2_PR
- NEW met1 ( 507610 1789250 ) M1M2_PR
- NEW met1 ( 474030 1789250 ) M1M2_PR ;
+ NEW met2 ( 1766630 82800 ) ( * 150450 )
+ NEW met2 ( 756010 150450 ) ( * 2715410 )
+ NEW met1 ( 756010 150450 ) ( 1766630 * )
+ NEW met1 ( 474950 2715410 ) ( 756010 * )
+ NEW met1 ( 474950 2715410 ) M1M2_PR
+ NEW met1 ( 1766630 150450 ) M1M2_PR
+ NEW met1 ( 756010 2715410 ) M1M2_PR
+ NEW met1 ( 756010 150450 ) M1M2_PR ;
- la_data_out[65] ( PIN la_data_out[65] ) ( chip_controller la_data_out[65] ) + USE SIGNAL
- + ROUTED met2 ( 188830 2070430 ) ( * 2075020 )
- NEW met3 ( 188830 2075020 ) ( 200100 * 0 )
- NEW met1 ( 157090 1750490 ) ( 1787790 * )
- NEW met2 ( 157090 1750490 ) ( * 2070430 )
- NEW met1 ( 157090 2070430 ) ( 188830 * )
- NEW met2 ( 1787790 2380 0 ) ( * 1750490 )
- NEW met1 ( 188830 2070430 ) M1M2_PR
- NEW met2 ( 188830 2075020 ) M2M3_PR_M
- NEW met1 ( 157090 1750490 ) M1M2_PR
- NEW met1 ( 1787790 1750490 ) M1M2_PR
- NEW met1 ( 157090 2070430 ) M1M2_PR ;
+ + ROUTED met2 ( 483230 2288710 ) ( * 2300100 0 )
+ NEW met2 ( 708170 143990 ) ( * 2284630 )
+ NEW li1 ( 555910 2284630 ) ( * 2288710 )
+ NEW met1 ( 483230 2288710 ) ( 555910 * )
+ NEW met1 ( 555910 2284630 ) ( 708170 * )
+ NEW met1 ( 708170 143990 ) ( 1787790 * )
+ NEW met2 ( 1787790 2380 0 ) ( * 143990 )
+ NEW met1 ( 483230 2288710 ) M1M2_PR
+ NEW met1 ( 708170 143990 ) M1M2_PR
+ NEW met1 ( 708170 2284630 ) M1M2_PR
+ NEW li1 ( 555910 2288710 ) L1M1_PR_MR
+ NEW li1 ( 555910 2284630 ) L1M1_PR_MR
+ NEW met1 ( 1787790 143990 ) M1M2_PR ;
- la_data_out[66] ( PIN la_data_out[66] ) ( chip_controller la_data_out[66] ) + USE SIGNAL
- + ROUTED met2 ( 477710 1793670 ) ( * 1800300 0 )
- NEW met1 ( 534750 1750830 ) ( 1801130 * )
- NEW met2 ( 534750 1750830 ) ( * 1773300 )
- NEW met2 ( 534290 1773300 ) ( * 1793670 )
- NEW met2 ( 534290 1773300 ) ( 534750 * )
- NEW met1 ( 477710 1793670 ) ( 534290 * )
+ + ROUTED met2 ( 485990 2699260 0 ) ( 487370 * )
+ NEW met2 ( 487370 2699260 ) ( * 2713030 )
+ NEW met1 ( 487370 2713030 ) ( 514510 * )
+ NEW li1 ( 514510 2713030 ) ( * 2718130 )
+ NEW met1 ( 735310 122230 ) ( 1801130 * )
+ NEW met2 ( 735310 122230 ) ( * 2718130 )
+ NEW met2 ( 1801130 82800 ) ( * 122230 )
NEW met2 ( 1801130 82800 ) ( 1805730 * )
NEW met2 ( 1805730 2380 0 ) ( * 82800 )
- NEW met2 ( 1801130 82800 ) ( * 1750830 )
- NEW met1 ( 477710 1793670 ) M1M2_PR
- NEW met1 ( 534750 1750830 ) M1M2_PR
- NEW met1 ( 1801130 1750830 ) M1M2_PR
- NEW met1 ( 534290 1793670 ) M1M2_PR ;
+ NEW met1 ( 514510 2718130 ) ( 735310 * )
+ NEW met1 ( 487370 2713030 ) M1M2_PR
+ NEW li1 ( 514510 2713030 ) L1M1_PR_MR
+ NEW li1 ( 514510 2718130 ) L1M1_PR_MR
+ NEW met1 ( 735310 122230 ) M1M2_PR
+ NEW met1 ( 735310 2718130 ) M1M2_PR
+ NEW met1 ( 1801130 122230 ) M1M2_PR ;
- la_data_out[67] ( PIN la_data_out[67] ) ( chip_controller la_data_out[67] ) + USE SIGNAL
- + ROUTED met2 ( 187910 2077910 ) ( * 2078420 )
- NEW met3 ( 187910 2078420 ) ( 200100 * 0 )
+ + ROUTED met2 ( 486450 2289390 ) ( * 2300100 0 )
+ NEW met2 ( 797870 115430 ) ( * 2285990 )
+ NEW met2 ( 1821830 82800 ) ( * 115430 )
NEW met2 ( 1821830 82800 ) ( 1823210 * )
NEW met2 ( 1823210 2380 0 ) ( * 82800 )
- NEW met2 ( 1821830 82800 ) ( * 1770890 )
- NEW met1 ( 161690 1770890 ) ( 1821830 * )
- NEW met1 ( 161690 2077910 ) ( 187910 * )
- NEW met2 ( 161690 1770890 ) ( * 2077910 )
- NEW met1 ( 1821830 1770890 ) M1M2_PR
- NEW met1 ( 187910 2077910 ) M1M2_PR
- NEW met2 ( 187910 2078420 ) M2M3_PR_M
- NEW met1 ( 161690 1770890 ) M1M2_PR
- NEW met1 ( 161690 2077910 ) M1M2_PR ;
+ NEW met1 ( 797870 115430 ) ( 1821830 * )
+ NEW li1 ( 561430 2285990 ) ( * 2289390 )
+ NEW met1 ( 486450 2289390 ) ( 561430 * )
+ NEW met1 ( 561430 2285990 ) ( 797870 * )
+ NEW met1 ( 797870 115430 ) M1M2_PR
+ NEW met1 ( 1821830 115430 ) M1M2_PR
+ NEW met1 ( 486450 2289390 ) M1M2_PR
+ NEW met1 ( 797870 2285990 ) M1M2_PR
+ NEW li1 ( 561430 2289390 ) L1M1_PR_MR
+ NEW li1 ( 561430 2285990 ) L1M1_PR_MR ;
- la_data_out[68] ( PIN la_data_out[68] ) ( chip_controller la_data_out[68] ) + USE SIGNAL
+ ROUTED met2 ( 1841150 2380 0 ) ( * 3060 )
NEW met2 ( 1840230 3060 ) ( 1841150 * )
NEW met2 ( 1840230 2380 ) ( * 3060 )
NEW met2 ( 1838850 2380 ) ( 1840230 * )
+ NEW met3 ( 599380 2566660 0 ) ( 608810 * )
+ NEW met2 ( 608810 2561050 ) ( * 2566660 )
NEW met2 ( 1835630 82800 ) ( 1838850 * )
NEW met2 ( 1838850 2380 ) ( * 82800 )
- NEW met2 ( 1835630 82800 ) ( * 1752190 )
- NEW met1 ( 465750 2214250 ) ( 907350 * )
- NEW met1 ( 907350 1752190 ) ( 1835630 * )
- NEW met2 ( 465750 2199460 0 ) ( * 2214250 )
- NEW met2 ( 907350 1752190 ) ( * 2214250 )
- NEW met1 ( 1835630 1752190 ) M1M2_PR
- NEW met1 ( 465750 2214250 ) M1M2_PR
- NEW met1 ( 907350 1752190 ) M1M2_PR
- NEW met1 ( 907350 2214250 ) M1M2_PR ;
+ NEW met2 ( 1835630 82800 ) ( * 150790 )
+ NEW met1 ( 608810 2561050 ) ( 831910 * )
+ NEW met2 ( 831910 150790 ) ( * 2561050 )
+ NEW met1 ( 831910 150790 ) ( 1835630 * )
+ NEW met2 ( 608810 2566660 ) M2M3_PR_M
+ NEW met1 ( 608810 2561050 ) M1M2_PR
+ NEW met1 ( 1835630 150790 ) M1M2_PR
+ NEW met1 ( 831910 150790 ) M1M2_PR
+ NEW met1 ( 831910 2561050 ) M1M2_PR ;
- la_data_out[69] ( PIN la_data_out[69] ) ( chip_controller la_data_out[69] ) + USE SIGNAL
+ ROUTED met2 ( 1858630 2380 0 ) ( * 3060 )
NEW met2 ( 1857710 3060 ) ( 1858630 * )
NEW met2 ( 1857710 2380 ) ( * 3060 )
NEW met2 ( 1856330 2380 ) ( 1857710 * )
- NEW met2 ( 511290 1788570 ) ( * 1788740 )
- NEW met3 ( 487370 1788740 ) ( 511290 * )
- NEW met2 ( 487370 1788740 ) ( * 1800300 )
- NEW met2 ( 485990 1800300 0 ) ( 487370 * )
- NEW met2 ( 1856330 2380 ) ( * 66810 )
- NEW met1 ( 511290 1788570 ) ( 617550 * )
- NEW met2 ( 617550 66810 ) ( * 1788570 )
- NEW met1 ( 617550 66810 ) ( 1856330 * )
- NEW met1 ( 511290 1788570 ) M1M2_PR
- NEW met2 ( 511290 1788740 ) M2M3_PR_M
- NEW met2 ( 487370 1788740 ) M2M3_PR_M
- NEW met1 ( 1856330 66810 ) M1M2_PR
- NEW met1 ( 617550 66810 ) M1M2_PR
- NEW met1 ( 617550 1788570 ) M1M2_PR ;
+ NEW met2 ( 189290 2547110 ) ( * 2551700 )
+ NEW met3 ( 189290 2551700 ) ( 200100 * )
+ NEW met3 ( 200100 2551020 0 ) ( * 2551700 )
+ NEW met2 ( 1856330 2380 ) ( * 135150 )
+ NEW met2 ( 136390 135150 ) ( * 2547110 )
+ NEW met1 ( 136390 2547110 ) ( 189290 * )
+ NEW met1 ( 136390 135150 ) ( 1856330 * )
+ NEW met1 ( 189290 2547110 ) M1M2_PR
+ NEW met2 ( 189290 2551700 ) M2M3_PR_M
+ NEW met1 ( 1856330 135150 ) M1M2_PR
+ NEW met1 ( 136390 135150 ) M1M2_PR
+ NEW met1 ( 136390 2547110 ) M1M2_PR ;
- la_data_out[6] ( PIN la_data_out[6] ) ( chip_controller la_data_out[6] ) + USE SIGNAL
- + ROUTED met2 ( 284970 2211190 ) ( * 2219690 )
- NEW met1 ( 239430 2211190 ) ( 284970 * )
+ + ROUTED met3 ( 599380 2346340 0 ) ( 607430 * )
+ NEW met2 ( 607430 2346170 ) ( * 2346340 )
NEW met2 ( 741750 2380 0 ) ( * 3060 )
NEW met2 ( 740830 3060 ) ( 741750 * )
NEW met2 ( 740830 2380 ) ( * 3060 )
NEW met2 ( 739450 2380 ) ( 740830 * )
- NEW met1 ( 284970 2219690 ) ( 738530 * )
- NEW met2 ( 239430 2199460 0 ) ( * 2211190 )
+ NEW met1 ( 607430 2346170 ) ( 738530 * )
NEW met2 ( 738530 82800 ) ( 739450 * )
NEW met2 ( 739450 2380 ) ( * 82800 )
- NEW met2 ( 738530 82800 ) ( * 2219690 )
- NEW met1 ( 284970 2211190 ) M1M2_PR
- NEW met1 ( 284970 2219690 ) M1M2_PR
- NEW met1 ( 239430 2211190 ) M1M2_PR
- NEW met1 ( 738530 2219690 ) M1M2_PR ;
+ NEW met2 ( 738530 82800 ) ( * 2346170 )
+ NEW met2 ( 607430 2346340 ) M2M3_PR_M
+ NEW met1 ( 607430 2346170 ) M1M2_PR
+ NEW met1 ( 738530 2346170 ) M1M2_PR ;
- la_data_out[70] ( PIN la_data_out[70] ) ( chip_controller la_data_out[70] ) + USE SIGNAL
- + ROUTED met1 ( 468970 2212890 ) ( 1135510 * )
- NEW met2 ( 1876570 2380 0 ) ( * 16830 )
- NEW met1 ( 1870130 16830 ) ( 1876570 * )
- NEW met2 ( 468970 2199460 0 ) ( * 2212890 )
- NEW met2 ( 1135510 1799450 ) ( * 2212890 )
- NEW met1 ( 1135510 1799450 ) ( 1870130 * )
- NEW met2 ( 1870130 16830 ) ( * 1799450 )
- NEW met1 ( 468970 2212890 ) M1M2_PR
- NEW met1 ( 1135510 2212890 ) M1M2_PR
- NEW met1 ( 1876570 16830 ) M1M2_PR
- NEW met1 ( 1870130 16830 ) M1M2_PR
- NEW met1 ( 1135510 1799450 ) M1M2_PR
- NEW met1 ( 1870130 1799450 ) M1M2_PR ;
+ + ROUTED met2 ( 493350 2285990 ) ( * 2300100 0 )
+ NEW met2 ( 1876570 2380 0 ) ( * 17510 )
+ NEW met1 ( 1870130 17510 ) ( 1876570 * )
+ NEW li1 ( 541650 2284970 ) ( * 2285990 )
+ NEW met1 ( 493350 2285990 ) ( 541650 * )
+ NEW met1 ( 541650 2284970 ) ( 728410 * )
+ NEW met2 ( 728410 150110 ) ( * 2284970 )
+ NEW met1 ( 728410 150110 ) ( 1870130 * )
+ NEW met2 ( 1870130 17510 ) ( * 150110 )
+ NEW met1 ( 493350 2285990 ) M1M2_PR
+ NEW met1 ( 1876570 17510 ) M1M2_PR
+ NEW met1 ( 1870130 17510 ) M1M2_PR
+ NEW li1 ( 541650 2285990 ) L1M1_PR_MR
+ NEW li1 ( 541650 2284970 ) L1M1_PR_MR
+ NEW met1 ( 728410 150110 ) M1M2_PR
+ NEW met1 ( 728410 2284970 ) M1M2_PR
+ NEW met1 ( 1870130 150110 ) M1M2_PR ;
- la_data_out[71] ( PIN la_data_out[71] ) ( chip_controller la_data_out[71] ) + USE SIGNAL
- + ROUTED met1 ( 491970 1787210 ) ( 496110 * )
- NEW met2 ( 491970 1787210 ) ( * 1800300 0 )
- NEW met2 ( 496110 1762390 ) ( * 1787210 )
- NEW met2 ( 1894510 2380 0 ) ( * 15470 )
- NEW met1 ( 1887150 15470 ) ( 1894510 * )
- NEW met1 ( 496110 1762390 ) ( 1887150 * )
- NEW met2 ( 1887150 15470 ) ( * 1762390 )
- NEW met1 ( 496110 1762390 ) M1M2_PR
- NEW met1 ( 496110 1787210 ) M1M2_PR
- NEW met1 ( 491970 1787210 ) M1M2_PR
- NEW met1 ( 1894510 15470 ) M1M2_PR
- NEW met1 ( 1887150 15470 ) M1M2_PR
- NEW met1 ( 1887150 1762390 ) M1M2_PR ;
+ + ROUTED met2 ( 499790 2289900 ) ( * 2300100 0 )
+ NEW met2 ( 1894510 2380 0 ) ( * 3060 )
+ NEW met2 ( 1893590 3060 ) ( 1894510 * )
+ NEW met2 ( 1893590 2380 ) ( * 3060 )
+ NEW met2 ( 1892210 2380 ) ( 1893590 * )
+ NEW met3 ( 499790 2289900 ) ( 756470 * )
+ NEW met2 ( 756470 143650 ) ( * 2289900 )
+ NEW met2 ( 1890830 82800 ) ( 1892210 * )
+ NEW met2 ( 1892210 2380 ) ( * 82800 )
+ NEW met1 ( 756470 143650 ) ( 1890830 * )
+ NEW met2 ( 1890830 82800 ) ( * 143650 )
+ NEW met2 ( 499790 2289900 ) M2M3_PR_M
+ NEW met1 ( 756470 143650 ) M1M2_PR
+ NEW met2 ( 756470 2289900 ) M2M3_PR_M
+ NEW met1 ( 1890830 143650 ) M1M2_PR ;
- la_data_out[72] ( PIN la_data_out[72] ) ( chip_controller la_data_out[72] ) + USE SIGNAL
- + ROUTED met1 ( 478170 2212210 ) ( 490590 * )
- NEW li1 ( 490590 2210510 ) ( * 2212210 )
- NEW met2 ( 477250 2199460 0 ) ( 478170 * )
- NEW met2 ( 478170 2199460 ) ( * 2212210 )
- NEW met1 ( 490590 2210510 ) ( 811210 * )
- NEW met1 ( 811210 1745050 ) ( 1911990 * )
- NEW met2 ( 811210 1745050 ) ( * 2210510 )
- NEW met2 ( 1911990 2380 0 ) ( * 1745050 )
- NEW met1 ( 478170 2212210 ) M1M2_PR
- NEW li1 ( 490590 2212210 ) L1M1_PR_MR
- NEW li1 ( 490590 2210510 ) L1M1_PR_MR
- NEW met1 ( 811210 1745050 ) M1M2_PR
- NEW met1 ( 811210 2210510 ) M1M2_PR
- NEW met1 ( 1911990 1745050 ) M1M2_PR ;
+ + ROUTED met2 ( 189290 2553740 ) ( * 2553910 )
+ NEW met3 ( 189290 2553740 ) ( 200100 * )
+ NEW met3 ( 200100 2553060 0 ) ( * 2553740 )
+ NEW met2 ( 142830 177650 ) ( * 2553910 )
+ NEW met1 ( 142830 2553910 ) ( 189290 * )
+ NEW met2 ( 1911990 2380 0 ) ( * 34500 )
+ NEW met2 ( 1911530 34500 ) ( 1911990 * )
+ NEW met1 ( 142830 177650 ) ( 1911530 * )
+ NEW met2 ( 1911530 34500 ) ( * 177650 )
+ NEW met1 ( 189290 2553910 ) M1M2_PR
+ NEW met2 ( 189290 2553740 ) M2M3_PR_M
+ NEW met1 ( 142830 177650 ) M1M2_PR
+ NEW met1 ( 142830 2553910 ) M1M2_PR
+ NEW met1 ( 1911530 177650 ) M1M2_PR ;
- la_data_out[73] ( PIN la_data_out[73] ) ( chip_controller la_data_out[73] ) + USE SIGNAL
- + ROUTED met2 ( 1929930 2380 0 ) ( * 17340 )
- NEW met2 ( 1928090 17340 ) ( 1929930 * )
- NEW li1 ( 510830 1787210 ) ( * 1788570 )
- NEW met1 ( 497030 1788570 ) ( 510830 * )
- NEW met2 ( 497030 1788570 ) ( * 1789420 )
- NEW met2 ( 495650 1789420 ) ( 497030 * )
- NEW met2 ( 495650 1789420 ) ( * 1800300 )
- NEW met2 ( 494270 1800300 0 ) ( 495650 * )
- NEW met2 ( 1925330 82800 ) ( 1928090 * )
- NEW met2 ( 1928090 17340 ) ( * 82800 )
- NEW met2 ( 1925330 82800 ) ( * 1743690 )
- NEW met1 ( 541650 1743690 ) ( 1925330 * )
- NEW li1 ( 526010 1785850 ) ( * 1787210 )
- NEW met1 ( 526010 1785850 ) ( 541650 * )
- NEW met1 ( 510830 1787210 ) ( 526010 * )
- NEW met2 ( 541650 1743690 ) ( * 1785850 )
- NEW met1 ( 1925330 1743690 ) M1M2_PR
- NEW li1 ( 510830 1787210 ) L1M1_PR_MR
- NEW li1 ( 510830 1788570 ) L1M1_PR_MR
- NEW met1 ( 497030 1788570 ) M1M2_PR
- NEW met1 ( 541650 1743690 ) M1M2_PR
- NEW li1 ( 526010 1787210 ) L1M1_PR_MR
- NEW li1 ( 526010 1785850 ) L1M1_PR_MR
- NEW met1 ( 541650 1785850 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2577540 0 ) ( 607890 * )
+ NEW met2 ( 607890 2574650 ) ( * 2577540 )
+ NEW met2 ( 1080770 164730 ) ( * 2574650 )
+ NEW met2 ( 1925330 82800 ) ( 1929930 * )
+ NEW met2 ( 1929930 2380 0 ) ( * 82800 )
+ NEW met2 ( 1925330 82800 ) ( * 164730 )
+ NEW met1 ( 607890 2574650 ) ( 1080770 * )
+ NEW met1 ( 1080770 164730 ) ( 1925330 * )
+ NEW met2 ( 607890 2577540 ) M2M3_PR_M
+ NEW met1 ( 607890 2574650 ) M1M2_PR
+ NEW met1 ( 1080770 164730 ) M1M2_PR
+ NEW met1 ( 1080770 2574650 ) M1M2_PR
+ NEW met1 ( 1925330 164730 ) M1M2_PR ;
- la_data_out[74] ( PIN la_data_out[74] ) ( chip_controller la_data_out[74] ) + USE SIGNAL
- + ROUTED met2 ( 496110 1791460 ) ( * 1800300 0 )
+ + ROUTED met3 ( 599380 2582300 0 ) ( 607430 * )
+ NEW met2 ( 607430 2582130 ) ( * 2582300 )
NEW met2 ( 1946030 82800 ) ( 1947410 * )
NEW met2 ( 1947410 2380 0 ) ( * 82800 )
- NEW met2 ( 1946030 82800 ) ( * 1744370 )
- NEW met1 ( 618010 1744370 ) ( 1946030 * )
- NEW met3 ( 496110 1791460 ) ( 618010 * )
- NEW met2 ( 618010 1744370 ) ( * 1791460 )
- NEW met1 ( 1946030 1744370 ) M1M2_PR
- NEW met2 ( 496110 1791460 ) M2M3_PR_M
- NEW met1 ( 618010 1744370 ) M1M2_PR
- NEW met2 ( 618010 1791460 ) M2M3_PR_M ;
+ NEW met2 ( 1946030 82800 ) ( * 144670 )
+ NEW met1 ( 607430 2582130 ) ( 921610 * )
+ NEW met2 ( 921610 144670 ) ( * 2582130 )
+ NEW met1 ( 921610 144670 ) ( 1946030 * )
+ NEW met2 ( 607430 2582300 ) M2M3_PR_M
+ NEW met1 ( 607430 2582130 ) M1M2_PR
+ NEW met1 ( 1946030 144670 ) M1M2_PR
+ NEW met1 ( 921610 144670 ) M1M2_PR
+ NEW met1 ( 921610 2582130 ) M1M2_PR ;
- la_data_out[75] ( PIN la_data_out[75] ) ( chip_controller la_data_out[75] ) + USE SIGNAL
- + ROUTED met2 ( 1965350 2380 0 ) ( * 3060 )
+ + ROUTED met2 ( 496110 2699940 ) ( 496570 * 0 )
+ NEW met2 ( 496110 2699940 ) ( * 2714730 )
+ NEW met2 ( 1965350 2380 0 ) ( * 3060 )
NEW met2 ( 1964430 3060 ) ( 1965350 * )
NEW met2 ( 1964430 2380 ) ( * 3060 )
NEW met2 ( 1963050 2380 ) ( 1964430 * )
- NEW met2 ( 483690 2199460 0 ) ( * 2208470 )
- NEW met2 ( 1190710 1776330 ) ( * 2214590 )
NEW met2 ( 1959830 82800 ) ( 1963050 * )
NEW met2 ( 1963050 2380 ) ( * 82800 )
- NEW met2 ( 1959830 82800 ) ( * 1776330 )
- NEW met2 ( 536130 2208470 ) ( * 2211700 )
- NEW met3 ( 536130 2211700 ) ( 546250 * )
- NEW met2 ( 546250 2211700 ) ( * 2214590 )
- NEW met1 ( 483690 2208470 ) ( 536130 * )
- NEW met1 ( 546250 2214590 ) ( 1190710 * )
- NEW met1 ( 1190710 1776330 ) ( 1959830 * )
- NEW met1 ( 483690 2208470 ) M1M2_PR
- NEW met1 ( 1190710 2214590 ) M1M2_PR
- NEW met1 ( 1190710 1776330 ) M1M2_PR
- NEW met1 ( 1959830 1776330 ) M1M2_PR
- NEW met1 ( 536130 2208470 ) M1M2_PR
- NEW met2 ( 536130 2211700 ) M2M3_PR_M
- NEW met2 ( 546250 2211700 ) M2M3_PR_M
- NEW met1 ( 546250 2214590 ) M1M2_PR ;
+ NEW met2 ( 1959830 82800 ) ( * 157250 )
+ NEW met2 ( 811210 157250 ) ( * 2714730 )
+ NEW met1 ( 811210 157250 ) ( 1959830 * )
+ NEW met1 ( 496110 2714730 ) ( 811210 * )
+ NEW met1 ( 496110 2714730 ) M1M2_PR
+ NEW met1 ( 1959830 157250 ) M1M2_PR
+ NEW met1 ( 811210 2714730 ) M1M2_PR
+ NEW met1 ( 811210 157250 ) M1M2_PR ;
- la_data_out[76] ( PIN la_data_out[76] ) ( chip_controller la_data_out[76] ) + USE SIGNAL
- + ROUTED met2 ( 186990 2090830 ) ( * 2094060 )
- NEW met3 ( 186990 2094060 ) ( 200100 * 0 )
+ + ROUTED met2 ( 189750 2561390 ) ( * 2562580 )
+ NEW met3 ( 189750 2562580 ) ( 200100 * )
+ NEW met3 ( 200100 2561900 0 ) ( * 2562580 )
NEW met2 ( 1982830 2380 0 ) ( * 3060 )
NEW met2 ( 1981910 3060 ) ( 1982830 * )
NEW met2 ( 1981910 2380 ) ( * 3060 )
NEW met2 ( 1980530 2380 ) ( 1981910 * )
- NEW met1 ( 169050 2090830 ) ( 186990 * )
- NEW met1 ( 169050 1777690 ) ( 1980530 * )
- NEW met2 ( 1980530 2380 ) ( * 1777690 )
- NEW met2 ( 169050 1777690 ) ( * 2090830 )
- NEW met1 ( 186990 2090830 ) M1M2_PR
- NEW met2 ( 186990 2094060 ) M2M3_PR_M
- NEW met1 ( 169050 1777690 ) M1M2_PR
- NEW met1 ( 169050 2090830 ) M1M2_PR
- NEW met1 ( 1980530 1777690 ) M1M2_PR ;
+ NEW met1 ( 163530 183430 ) ( 1980530 * )
+ NEW met1 ( 163530 2561390 ) ( 189750 * )
+ NEW met2 ( 1980530 2380 ) ( * 183430 )
+ NEW met2 ( 163530 183430 ) ( * 2561390 )
+ NEW met1 ( 189750 2561390 ) M1M2_PR
+ NEW met2 ( 189750 2562580 ) M2M3_PR_M
+ NEW met1 ( 163530 183430 ) M1M2_PR
+ NEW met1 ( 1980530 183430 ) M1M2_PR
+ NEW met1 ( 163530 2561390 ) M1M2_PR ;
- la_data_out[77] ( PIN la_data_out[77] ) ( chip_controller la_data_out[77] ) + USE SIGNAL
- + ROUTED met2 ( 490130 2199460 0 ) ( * 2211870 )
- NEW met2 ( 700350 486370 ) ( * 2211870 )
- NEW met1 ( 490130 2211870 ) ( 700350 * )
- NEW met1 ( 700350 486370 ) ( 1994790 * )
- NEW met1 ( 1994790 58310 ) ( 2000770 * )
- NEW met2 ( 2000770 2380 0 ) ( * 58310 )
- NEW met2 ( 1994790 58310 ) ( * 486370 )
- NEW met1 ( 490130 2211870 ) M1M2_PR
- NEW met1 ( 700350 486370 ) M1M2_PR
- NEW met1 ( 700350 2211870 ) M1M2_PR
- NEW met1 ( 1994790 486370 ) M1M2_PR
- NEW met1 ( 1994790 58310 ) M1M2_PR
- NEW met1 ( 2000770 58310 ) M1M2_PR ;
+ + ROUTED met2 ( 499790 2699260 0 ) ( 501170 * )
+ NEW met2 ( 501170 2699260 ) ( * 2712690 )
+ NEW met2 ( 2000770 2380 0 ) ( * 17510 )
+ NEW met1 ( 1994330 17510 ) ( 2000770 * )
+ NEW met2 ( 645150 142630 ) ( * 2712690 )
+ NEW met1 ( 645150 142630 ) ( 1994330 * )
+ NEW met2 ( 1994330 17510 ) ( * 142630 )
+ NEW met1 ( 501170 2712690 ) ( 645150 * )
+ NEW met1 ( 501170 2712690 ) M1M2_PR
+ NEW met1 ( 645150 2712690 ) M1M2_PR
+ NEW met1 ( 2000770 17510 ) M1M2_PR
+ NEW met1 ( 1994330 17510 ) M1M2_PR
+ NEW met1 ( 645150 142630 ) M1M2_PR
+ NEW met1 ( 1994330 142630 ) M1M2_PR ;
- la_data_out[78] ( PIN la_data_out[78] ) ( chip_controller la_data_out[78] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2092020 0 ) ( 607430 * )
- NEW met2 ( 607430 2091510 ) ( * 2092020 )
+ + ROUTED met3 ( 599380 2593180 0 ) ( 608350 * )
+ NEW met2 ( 608350 2588590 ) ( * 2593180 )
NEW met2 ( 2015030 82800 ) ( 2018250 * )
NEW met2 ( 2018250 2380 0 ) ( * 82800 )
- NEW met2 ( 2015030 82800 ) ( * 1737570 )
- NEW met1 ( 853070 1737570 ) ( 2015030 * )
- NEW met1 ( 607430 2091510 ) ( 853070 * )
- NEW met2 ( 853070 1737570 ) ( * 2091510 )
- NEW met1 ( 2015030 1737570 ) M1M2_PR
- NEW met2 ( 607430 2092020 ) M2M3_PR_M
- NEW met1 ( 607430 2091510 ) M1M2_PR
- NEW met1 ( 853070 1737570 ) M1M2_PR
- NEW met1 ( 853070 2091510 ) M1M2_PR ;
+ NEW met2 ( 2015030 82800 ) ( * 151470 )
+ NEW met1 ( 608350 2588590 ) ( 1046270 * )
+ NEW met2 ( 1046270 151470 ) ( * 2588590 )
+ NEW met1 ( 1046270 151470 ) ( 2015030 * )
+ NEW met2 ( 608350 2593180 ) M2M3_PR_M
+ NEW met1 ( 608350 2588590 ) M1M2_PR
+ NEW met1 ( 2015030 151470 ) M1M2_PR
+ NEW met1 ( 1046270 151470 ) M1M2_PR
+ NEW met1 ( 1046270 2588590 ) M1M2_PR ;
- la_data_out[79] ( PIN la_data_out[79] ) ( chip_controller la_data_out[79] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2094740 0 ) ( 607890 * )
- NEW met2 ( 607890 2091170 ) ( * 2094740 )
- NEW met2 ( 976810 1738250 ) ( * 2091170 )
- NEW met2 ( 2036190 2380 0 ) ( * 1738250 )
- NEW met1 ( 976810 1738250 ) ( 2036190 * )
- NEW met1 ( 607890 2091170 ) ( 976810 * )
- NEW met1 ( 976810 1738250 ) M1M2_PR
- NEW met1 ( 2036190 1738250 ) M1M2_PR
- NEW met2 ( 607890 2094740 ) M2M3_PR_M
- NEW met1 ( 607890 2091170 ) M1M2_PR
- NEW met1 ( 976810 2091170 ) M1M2_PR ;
+ + ROUTED met2 ( 503010 2699940 ) ( 503470 * 0 )
+ NEW met2 ( 503010 2699940 ) ( * 2714050 )
+ NEW met2 ( 865950 143310 ) ( * 2714050 )
+ NEW met2 ( 2036190 2380 0 ) ( * 34500 )
+ NEW met2 ( 2035730 34500 ) ( 2036190 * )
+ NEW met2 ( 2035730 34500 ) ( * 143310 )
+ NEW met1 ( 865950 143310 ) ( 2035730 * )
+ NEW met1 ( 503010 2714050 ) ( 865950 * )
+ NEW met1 ( 503010 2714050 ) M1M2_PR
+ NEW met1 ( 865950 2714050 ) M1M2_PR
+ NEW met1 ( 865950 143310 ) M1M2_PR
+ NEW met1 ( 2035730 143310 ) M1M2_PR ;
- la_data_out[7] ( PIN la_data_out[7] ) ( chip_controller la_data_out[7] ) + USE SIGNAL
- + ROUTED met2 ( 759230 2380 0 ) ( * 17340 )
- NEW met2 ( 759230 17340 ) ( 759690 * )
- NEW met2 ( 759690 17340 ) ( * 1789930 )
- NEW met2 ( 249550 1789930 ) ( * 1800300 0 )
- NEW met1 ( 249550 1789930 ) ( 759690 * )
- NEW met1 ( 759690 1789930 ) M1M2_PR
- NEW met1 ( 249550 1789930 ) M1M2_PR ;
+ + ROUTED met2 ( 759230 2380 0 ) ( * 39610 )
+ NEW met2 ( 271170 2290410 ) ( * 2300100 0 )
+ NEW met1 ( 271170 2290410 ) ( 327750 * )
+ NEW met2 ( 327750 39610 ) ( * 2290410 )
+ NEW met1 ( 327750 39610 ) ( 759230 * )
+ NEW met1 ( 759230 39610 ) M1M2_PR
+ NEW met1 ( 271170 2290410 ) M1M2_PR
+ NEW met1 ( 327750 39610 ) M1M2_PR
+ NEW met1 ( 327750 2290410 ) M1M2_PR ;
- la_data_out[80] ( PIN la_data_out[80] ) ( chip_controller la_data_out[80] ) + USE SIGNAL
- + ROUTED met2 ( 2054130 2380 0 ) ( * 25670 )
- NEW met2 ( 497950 1789590 ) ( * 1800300 0 )
- NEW met1 ( 1521450 25670 ) ( 2054130 * )
- NEW met1 ( 497950 1789590 ) ( 1521450 * )
- NEW met2 ( 1521450 25670 ) ( * 1789590 )
- NEW met1 ( 2054130 25670 ) M1M2_PR
- NEW met1 ( 497950 1789590 ) M1M2_PR
- NEW met1 ( 1521450 25670 ) M1M2_PR
- NEW met1 ( 1521450 1789590 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2597940 0 ) ( 607890 * )
+ NEW met2 ( 607890 2595390 ) ( * 2597940 )
+ NEW met2 ( 2049530 82800 ) ( 2054130 * )
+ NEW met2 ( 2054130 2380 0 ) ( * 82800 )
+ NEW met2 ( 2049530 82800 ) ( * 137530 )
+ NEW met1 ( 607890 2595390 ) ( 1004410 * )
+ NEW met2 ( 1004410 137530 ) ( * 2595390 )
+ NEW met1 ( 1004410 137530 ) ( 2049530 * )
+ NEW met2 ( 607890 2597940 ) M2M3_PR_M
+ NEW met1 ( 607890 2595390 ) M1M2_PR
+ NEW met1 ( 2049530 137530 ) M1M2_PR
+ NEW met1 ( 1004410 2595390 ) M1M2_PR
+ NEW met1 ( 1004410 137530 ) M1M2_PR ;
- la_data_out[81] ( PIN la_data_out[81] ) ( chip_controller la_data_out[81] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2098140 0 ) ( 607430 * )
- NEW met2 ( 607430 2097970 ) ( * 2098140 )
- NEW met1 ( 1024650 1738590 ) ( 2070230 * )
- NEW met1 ( 607430 2097970 ) ( 1024650 * )
- NEW met2 ( 1024650 1738590 ) ( * 2097970 )
+ + ROUTED met2 ( 508530 2699260 0 ) ( 508990 * )
+ NEW met2 ( 508990 2699260 ) ( * 2715750 )
+ NEW met2 ( 762910 137190 ) ( * 2715750 )
NEW met2 ( 2070230 82800 ) ( 2071610 * )
NEW met2 ( 2071610 2380 0 ) ( * 82800 )
- NEW met2 ( 2070230 82800 ) ( * 1738590 )
- NEW met2 ( 607430 2098140 ) M2M3_PR_M
- NEW met1 ( 607430 2097970 ) M1M2_PR
- NEW met1 ( 1024650 1738590 ) M1M2_PR
- NEW met1 ( 2070230 1738590 ) M1M2_PR
- NEW met1 ( 1024650 2097970 ) M1M2_PR ;
+ NEW met1 ( 762910 137190 ) ( 2070230 * )
+ NEW met2 ( 2070230 82800 ) ( * 137190 )
+ NEW met1 ( 508990 2715750 ) ( 762910 * )
+ NEW met1 ( 508990 2715750 ) M1M2_PR
+ NEW met1 ( 762910 2715750 ) M1M2_PR
+ NEW met1 ( 762910 137190 ) M1M2_PR
+ NEW met1 ( 2070230 137190 ) M1M2_PR ;
- la_data_out[82] ( PIN la_data_out[82] ) ( chip_controller la_data_out[82] ) + USE SIGNAL
- + ROUTED met2 ( 501630 2199460 0 ) ( * 2209150 )
- NEW met1 ( 501630 2209150 ) ( 625830 * )
+ + ROUTED met2 ( 129030 162690 ) ( * 2574650 )
+ NEW met2 ( 187910 2574650 ) ( * 2576180 )
+ NEW met3 ( 187910 2576180 ) ( 201020 * )
+ NEW met3 ( 201020 2576180 ) ( * 2576860 0 )
NEW met2 ( 2089550 2380 0 ) ( * 3060 )
NEW met2 ( 2088630 3060 ) ( 2089550 * )
NEW met2 ( 2088630 2380 ) ( * 3060 )
NEW met2 ( 2087250 2380 ) ( 2088630 * )
- NEW met2 ( 2087250 2380 ) ( * 34500 )
- NEW met2 ( 2084030 34500 ) ( 2087250 * )
- NEW li1 ( 2084030 1803530 ) ( * 1805570 )
- NEW met2 ( 2084030 34500 ) ( * 1803530 )
- NEW met1 ( 625830 1805570 ) ( 2084030 * )
- NEW met2 ( 625830 1805570 ) ( * 2209150 )
- NEW met1 ( 501630 2209150 ) M1M2_PR
- NEW met1 ( 625830 2209150 ) M1M2_PR
- NEW li1 ( 2084030 1805570 ) L1M1_PR_MR
- NEW li1 ( 2084030 1803530 ) L1M1_PR_MR
- NEW met1 ( 2084030 1803530 ) M1M2_PR
- NEW met1 ( 625830 1805570 ) M1M2_PR
- NEW met1 ( 2084030 1803530 ) RECT ( -355 -70 0 70 ) ;
+ NEW met1 ( 129030 2574650 ) ( 187910 * )
+ NEW met2 ( 2084030 82800 ) ( 2087250 * )
+ NEW met2 ( 2087250 2380 ) ( * 82800 )
+ NEW met1 ( 129030 162690 ) ( 2084030 * )
+ NEW met2 ( 2084030 82800 ) ( * 162690 )
+ NEW met1 ( 129030 162690 ) M1M2_PR
+ NEW met1 ( 129030 2574650 ) M1M2_PR
+ NEW met1 ( 187910 2574650 ) M1M2_PR
+ NEW met2 ( 187910 2576180 ) M2M3_PR_M
+ NEW met1 ( 2084030 162690 ) M1M2_PR ;
- la_data_out[83] ( PIN la_data_out[83] ) ( chip_controller la_data_out[83] ) + USE SIGNAL
- + ROUTED met2 ( 188830 2105110 ) ( * 2107660 )
- NEW met3 ( 188830 2107660 ) ( 200100 * 0 )
+ + ROUTED met2 ( 189750 2581450 ) ( * 2581620 )
+ NEW met3 ( 189750 2581620 ) ( 201020 * )
+ NEW met3 ( 201020 2581620 ) ( * 2582300 0 )
NEW met2 ( 2107030 2380 0 ) ( * 3060 )
NEW met2 ( 2106110 3060 ) ( 2107030 * )
NEW met2 ( 2106110 2380 ) ( * 3060 )
NEW met2 ( 2104730 2380 ) ( 2106110 * )
- NEW met1 ( 157550 1770210 ) ( 2104730 * )
- NEW met2 ( 157550 1770210 ) ( * 2105110 )
- NEW met1 ( 157550 2105110 ) ( 188830 * )
- NEW met2 ( 2104730 2380 ) ( * 1770210 )
- NEW met1 ( 188830 2105110 ) M1M2_PR
- NEW met2 ( 188830 2107660 ) M2M3_PR_M
- NEW met1 ( 157550 1770210 ) M1M2_PR
- NEW met1 ( 2104730 1770210 ) M1M2_PR
- NEW met1 ( 157550 2105110 ) M1M2_PR ;
+ NEW met2 ( 157550 155550 ) ( * 2581450 )
+ NEW met1 ( 157550 2581450 ) ( 189750 * )
+ NEW met1 ( 157550 155550 ) ( 2104730 * )
+ NEW met2 ( 2104730 2380 ) ( * 155550 )
+ NEW met1 ( 189750 2581450 ) M1M2_PR
+ NEW met2 ( 189750 2581620 ) M2M3_PR_M
+ NEW met1 ( 157550 155550 ) M1M2_PR
+ NEW met1 ( 157550 2581450 ) M1M2_PR
+ NEW met1 ( 2104730 155550 ) M1M2_PR ;
- la_data_out[84] ( PIN la_data_out[84] ) ( chip_controller la_data_out[84] ) + USE SIGNAL
- + ROUTED met2 ( 506230 2199460 0 ) ( 507610 * )
- NEW met2 ( 507610 2199460 ) ( * 2212210 )
- NEW met2 ( 2124970 2380 0 ) ( * 39950 )
- NEW met1 ( 507610 2212210 ) ( 714610 * )
- NEW met2 ( 714610 39950 ) ( * 2212210 )
- NEW met1 ( 714610 39950 ) ( 2124970 * )
- NEW met1 ( 507610 2212210 ) M1M2_PR
- NEW met1 ( 2124970 39950 ) M1M2_PR
- NEW met1 ( 714610 2212210 ) M1M2_PR
- NEW met1 ( 714610 39950 ) M1M2_PR ;
+ + ROUTED met2 ( 2124970 2380 0 ) ( * 17510 )
+ NEW met1 ( 2118530 17510 ) ( 2124970 * )
+ NEW met2 ( 189290 2580770 ) ( * 2584340 )
+ NEW met3 ( 189290 2584340 ) ( 200100 * )
+ NEW met3 ( 200100 2583660 0 ) ( * 2584340 )
+ NEW met2 ( 2118530 17510 ) ( * 148750 )
+ NEW met1 ( 177330 2580770 ) ( 189290 * )
+ NEW met1 ( 177330 148750 ) ( 2118530 * )
+ NEW met2 ( 177330 148750 ) ( * 2580770 )
+ NEW met1 ( 2124970 17510 ) M1M2_PR
+ NEW met1 ( 2118530 17510 ) M1M2_PR
+ NEW met1 ( 189290 2580770 ) M1M2_PR
+ NEW met2 ( 189290 2584340 ) M2M3_PR_M
+ NEW met1 ( 2118530 148750 ) M1M2_PR
+ NEW met1 ( 177330 148750 ) M1M2_PR
+ NEW met1 ( 177330 2580770 ) M1M2_PR ;
- la_data_out[85] ( PIN la_data_out[85] ) ( chip_controller la_data_out[85] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2103580 0 ) ( 608350 * )
- NEW met2 ( 608350 2097630 ) ( * 2103580 )
- NEW met2 ( 1066510 1737910 ) ( * 2097630 )
+ + ROUTED met2 ( 186990 2587910 ) ( * 2588420 )
+ NEW met3 ( 186990 2588420 ) ( 200100 * )
+ NEW met3 ( 200100 2587740 0 ) ( * 2588420 )
+ NEW met2 ( 2139230 82800 ) ( * 127670 )
NEW met2 ( 2139230 82800 ) ( 2142450 * )
NEW met2 ( 2142450 2380 0 ) ( * 82800 )
- NEW met2 ( 2139230 82800 ) ( * 1737910 )
- NEW met1 ( 1066510 1737910 ) ( 2139230 * )
- NEW met1 ( 608350 2097630 ) ( 1066510 * )
- NEW met1 ( 1066510 1737910 ) M1M2_PR
- NEW met1 ( 2139230 1737910 ) M1M2_PR
- NEW met2 ( 608350 2103580 ) M2M3_PR_M
- NEW met1 ( 608350 2097630 ) M1M2_PR
- NEW met1 ( 1066510 2097630 ) M1M2_PR ;
+ NEW met1 ( 136850 127670 ) ( 2139230 * )
+ NEW met2 ( 136850 127670 ) ( * 2587910 )
+ NEW met1 ( 136850 2587910 ) ( 186990 * )
+ NEW met1 ( 2139230 127670 ) M1M2_PR
+ NEW met1 ( 186990 2587910 ) M1M2_PR
+ NEW met2 ( 186990 2588420 ) M2M3_PR_M
+ NEW met1 ( 136850 127670 ) M1M2_PR
+ NEW met1 ( 136850 2587910 ) M1M2_PR ;
- la_data_out[86] ( PIN la_data_out[86] ) ( chip_controller la_data_out[86] ) + USE SIGNAL
- + ROUTED met2 ( 514510 1789250 ) ( * 1800300 0 )
- NEW met2 ( 2160390 2380 0 ) ( * 33490 )
- NEW met1 ( 1528350 33490 ) ( 2160390 * )
- NEW met1 ( 514510 1789250 ) ( 1528350 * )
- NEW met2 ( 1528350 33490 ) ( * 1789250 )
- NEW met1 ( 514510 1789250 ) M1M2_PR
- NEW met1 ( 1528350 33490 ) M1M2_PR
- NEW met1 ( 2160390 33490 ) M1M2_PR
- NEW met1 ( 1528350 1789250 ) M1M2_PR ;
+ + ROUTED met2 ( 530150 2300100 0 ) ( 530610 * )
+ NEW met2 ( 530610 47090 ) ( * 2300100 )
+ NEW met1 ( 530610 47090 ) ( 2160390 * )
+ NEW met2 ( 2160390 2380 0 ) ( * 47090 )
+ NEW met1 ( 530610 47090 ) M1M2_PR
+ NEW met1 ( 2160390 47090 ) M1M2_PR ;
- la_data_out[87] ( PIN la_data_out[87] ) ( chip_controller la_data_out[87] ) + USE SIGNAL
- + ROUTED met3 ( 190670 2123300 ) ( 200100 * 0 )
+ + ROUTED met3 ( 599380 2610860 0 ) ( 607890 * )
+ NEW met2 ( 607890 2608990 ) ( * 2610860 )
+ NEW met1 ( 607890 2608990 ) ( 824550 * )
NEW met2 ( 2177870 2380 0 ) ( * 3060 )
NEW met2 ( 2176950 3060 ) ( 2177870 * )
NEW met2 ( 2176950 2380 ) ( * 3060 )
NEW met2 ( 2175570 2380 ) ( 2176950 * )
- NEW met1 ( 190670 1749810 ) ( 2173730 * )
+ NEW met2 ( 824550 136850 ) ( * 2608990 )
NEW met2 ( 2173730 82800 ) ( 2175570 * )
NEW met2 ( 2175570 2380 ) ( * 82800 )
- NEW met2 ( 2173730 82800 ) ( * 1749810 )
- NEW met2 ( 190670 1749810 ) ( * 2123300 )
- NEW met1 ( 190670 1749810 ) M1M2_PR
- NEW met2 ( 190670 2123300 ) M2M3_PR_M
- NEW met1 ( 2173730 1749810 ) M1M2_PR ;
+ NEW met1 ( 824550 136850 ) ( 2173730 * )
+ NEW met2 ( 2173730 82800 ) ( * 136850 )
+ NEW met2 ( 607890 2610860 ) M2M3_PR_M
+ NEW met1 ( 607890 2608990 ) M1M2_PR
+ NEW met1 ( 824550 2608990 ) M1M2_PR
+ NEW met1 ( 824550 136850 ) M1M2_PR
+ NEW met1 ( 2173730 136850 ) M1M2_PR ;
- la_data_out[88] ( PIN la_data_out[88] ) ( chip_controller la_data_out[88] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2109700 0 ) ( 608350 * )
- NEW met2 ( 608350 2105110 ) ( * 2109700 )
- NEW met2 ( 1079850 73270 ) ( * 2105110 )
- NEW met1 ( 608350 2105110 ) ( 1079850 * )
- NEW met1 ( 1079850 73270 ) ( 2195810 * )
- NEW met2 ( 2195810 2380 0 ) ( * 73270 )
- NEW met2 ( 608350 2109700 ) M2M3_PR_M
- NEW met1 ( 608350 2105110 ) M1M2_PR
- NEW met1 ( 1079850 73270 ) M1M2_PR
- NEW met1 ( 1079850 2105110 ) M1M2_PR
- NEW met1 ( 2195810 73270 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2614940 0 ) ( 608810 * )
+ NEW met2 ( 608810 2608650 ) ( * 2614940 )
+ NEW met1 ( 608810 2608650 ) ( 1135050 * )
+ NEW met2 ( 1135050 144330 ) ( * 2608650 )
+ NEW met2 ( 2194430 82800 ) ( 2195810 * )
+ NEW met2 ( 2195810 2380 0 ) ( * 82800 )
+ NEW met1 ( 1135050 144330 ) ( 2194430 * )
+ NEW met2 ( 2194430 82800 ) ( * 144330 )
+ NEW met2 ( 608810 2614940 ) M2M3_PR_M
+ NEW met1 ( 608810 2608650 ) M1M2_PR
+ NEW met1 ( 1135050 2608650 ) M1M2_PR
+ NEW met1 ( 1135050 144330 ) M1M2_PR
+ NEW met1 ( 2194430 144330 ) M1M2_PR ;
- la_data_out[89] ( PIN la_data_out[89] ) ( chip_controller la_data_out[89] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2114460 0 ) ( 607890 * )
- NEW met2 ( 607890 2111570 ) ( * 2114460 )
- NEW met2 ( 2208230 82800 ) ( * 93330 )
- NEW met2 ( 2208230 82800 ) ( 2213290 * )
- NEW met2 ( 2213290 2380 0 ) ( * 82800 )
- NEW met1 ( 607890 2111570 ) ( 1114350 * )
- NEW met1 ( 1114350 93330 ) ( 2208230 * )
- NEW met2 ( 1114350 93330 ) ( * 2111570 )
- NEW met2 ( 607890 2114460 ) M2M3_PR_M
- NEW met1 ( 607890 2111570 ) M1M2_PR
- NEW met1 ( 2208230 93330 ) M1M2_PR
- NEW met1 ( 1114350 93330 ) M1M2_PR
- NEW met1 ( 1114350 2111570 ) M1M2_PR ;
+ + ROUTED met2 ( 2213290 2380 0 ) ( * 46750 )
+ NEW met1 ( 533370 2284970 ) ( 537970 * )
+ NEW met2 ( 533370 2284970 ) ( * 2300100 0 )
+ NEW met2 ( 537970 46750 ) ( * 2284970 )
+ NEW met1 ( 537970 46750 ) ( 2213290 * )
+ NEW met1 ( 2213290 46750 ) M1M2_PR
+ NEW met1 ( 537970 46750 ) M1M2_PR
+ NEW met1 ( 537970 2284970 ) M1M2_PR
+ NEW met1 ( 533370 2284970 ) M1M2_PR ;
- la_data_out[8] ( PIN la_data_out[8] ) ( chip_controller la_data_out[8] ) + USE SIGNAL
- + ROUTED met2 ( 777170 2380 0 ) ( * 54910 )
- NEW met1 ( 255530 1787210 ) ( 261510 * )
- NEW met2 ( 255530 1787210 ) ( * 1800300 0 )
- NEW met2 ( 261510 54570 ) ( * 1787210 )
- NEW met1 ( 261510 54570 ) ( 710700 * )
- NEW met1 ( 710700 54570 ) ( * 54910 )
- NEW met1 ( 710700 54910 ) ( 777170 * )
- NEW met1 ( 777170 54910 ) M1M2_PR
- NEW met1 ( 261510 54570 ) M1M2_PR
- NEW met1 ( 261510 1787210 ) M1M2_PR
- NEW met1 ( 255530 1787210 ) M1M2_PR ;
+ + ROUTED met2 ( 489670 2710650 ) ( * 2712690 )
+ NEW met2 ( 777170 2380 0 ) ( * 34500 )
+ NEW met2 ( 773030 34500 ) ( 777170 * )
+ NEW met2 ( 773030 34500 ) ( * 2710650 )
+ NEW met2 ( 263350 2699260 0 ) ( 264270 * )
+ NEW met2 ( 264270 2699260 ) ( * 2712690 )
+ NEW met1 ( 264270 2712690 ) ( 489670 * )
+ NEW met1 ( 489670 2710650 ) ( 773030 * )
+ NEW met1 ( 489670 2712690 ) M1M2_PR
+ NEW met1 ( 489670 2710650 ) M1M2_PR
+ NEW met1 ( 773030 2710650 ) M1M2_PR
+ NEW met1 ( 264270 2712690 ) M1M2_PR ;
- la_data_out[90] ( PIN la_data_out[90] ) ( chip_controller la_data_out[90] ) + USE SIGNAL
+ ROUTED met2 ( 2231230 2380 0 ) ( * 3060 )
NEW met2 ( 2230310 3060 ) ( 2231230 * )
NEW met2 ( 2230310 2380 ) ( * 3060 )
NEW met2 ( 2228930 2380 ) ( 2230310 * )
- NEW met2 ( 516350 2199460 0 ) ( * 2212550 )
- NEW met2 ( 673670 1778710 ) ( * 2212550 )
- NEW met2 ( 2228930 2380 ) ( * 1778710 )
- NEW met1 ( 516350 2212550 ) ( 673670 * )
- NEW met1 ( 673670 1778710 ) ( 2228930 * )
- NEW met1 ( 516350 2212550 ) M1M2_PR
- NEW met1 ( 673670 2212550 ) M1M2_PR
- NEW met1 ( 673670 1778710 ) M1M2_PR
- NEW met1 ( 2228930 1778710 ) M1M2_PR ;
+ NEW met2 ( 893550 108630 ) ( * 2716940 )
+ NEW met2 ( 2228930 2380 ) ( * 108630 )
+ NEW met2 ( 523710 2699940 ) ( 524170 * 0 )
+ NEW met2 ( 523710 2699940 ) ( * 2716940 )
+ NEW met1 ( 893550 108630 ) ( 2228930 * )
+ NEW met3 ( 523710 2716940 ) ( 893550 * )
+ NEW met1 ( 893550 108630 ) M1M2_PR
+ NEW met2 ( 893550 2716940 ) M2M3_PR_M
+ NEW met1 ( 2228930 108630 ) M1M2_PR
+ NEW met2 ( 523710 2716940 ) M2M3_PR_M ;
- la_data_out[91] ( PIN la_data_out[91] ) ( chip_controller la_data_out[91] ) + USE SIGNAL
- + ROUTED met2 ( 2249170 2380 0 ) ( * 17170 )
- NEW met1 ( 2239050 17170 ) ( 2249170 * )
- NEW met2 ( 2239050 17170 ) ( * 1764090 )
- NEW met1 ( 530150 1764090 ) ( 2239050 * )
- NEW met1 ( 526470 1787210 ) ( 530150 * )
- NEW met2 ( 526470 1787210 ) ( * 1800300 0 )
- NEW met2 ( 530150 1764090 ) ( * 1787210 )
- NEW met1 ( 2249170 17170 ) M1M2_PR
- NEW met1 ( 2239050 17170 ) M1M2_PR
- NEW met1 ( 2239050 1764090 ) M1M2_PR
- NEW met1 ( 530150 1764090 ) M1M2_PR
- NEW met1 ( 530150 1787210 ) M1M2_PR
- NEW met1 ( 526470 1787210 ) M1M2_PR ;
+ + ROUTED met2 ( 2249170 2380 0 ) ( * 46410 )
+ NEW met1 ( 538430 2284290 ) ( 544870 * )
+ NEW met2 ( 538430 2284290 ) ( * 2300100 0 )
+ NEW met2 ( 544870 46410 ) ( * 2284290 )
+ NEW met1 ( 544870 46410 ) ( 2249170 * )
+ NEW met1 ( 2249170 46410 ) M1M2_PR
+ NEW met1 ( 544870 46410 ) M1M2_PR
+ NEW met1 ( 544870 2284290 ) M1M2_PR
+ NEW met1 ( 538430 2284290 ) M1M2_PR ;
- la_data_out[92] ( PIN la_data_out[92] ) ( chip_controller la_data_out[92] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2120580 0 ) ( 607430 * )
- NEW met2 ( 607430 2118370 ) ( * 2120580 )
- NEW met2 ( 1155750 1744710 ) ( * 2118370 )
- NEW met1 ( 607430 2118370 ) ( 1155750 * )
- NEW met1 ( 1155750 1744710 ) ( 2263430 * )
+ + ROUTED met3 ( 599380 2624460 0 ) ( 607430 * )
+ NEW met2 ( 607430 2623270 ) ( * 2624460 )
+ NEW met2 ( 866410 136170 ) ( * 2623270 )
+ NEW met1 ( 607430 2623270 ) ( 866410 * )
NEW met2 ( 2263430 82800 ) ( 2266650 * )
NEW met2 ( 2266650 2380 0 ) ( * 82800 )
- NEW met2 ( 2263430 82800 ) ( * 1744710 )
- NEW met2 ( 607430 2120580 ) M2M3_PR_M
- NEW met1 ( 607430 2118370 ) M1M2_PR
- NEW met1 ( 1155750 1744710 ) M1M2_PR
- NEW met1 ( 1155750 2118370 ) M1M2_PR
- NEW met1 ( 2263430 1744710 ) M1M2_PR ;
+ NEW met1 ( 866410 136170 ) ( 2263430 * )
+ NEW met2 ( 2263430 82800 ) ( * 136170 )
+ NEW met2 ( 607430 2624460 ) M2M3_PR_M
+ NEW met1 ( 607430 2623270 ) M1M2_PR
+ NEW met1 ( 866410 2623270 ) M1M2_PR
+ NEW met1 ( 866410 136170 ) M1M2_PR
+ NEW met1 ( 2263430 136170 ) M1M2_PR ;
- la_data_out[93] ( PIN la_data_out[93] ) ( chip_controller la_data_out[93] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2125340 0 ) ( 607430 * )
- NEW met2 ( 607430 2125340 ) ( * 2125510 )
- NEW met1 ( 607430 2125510 ) ( 1210950 * )
- NEW met1 ( 1210950 100130 ) ( 2284590 * )
- NEW met2 ( 1210950 100130 ) ( * 2125510 )
- NEW met2 ( 2284590 2380 0 ) ( * 100130 )
- NEW met2 ( 607430 2125340 ) M2M3_PR_M
- NEW met1 ( 607430 2125510 ) M1M2_PR
- NEW met1 ( 1210950 100130 ) M1M2_PR
- NEW met1 ( 1210950 2125510 ) M1M2_PR
- NEW met1 ( 2284590 100130 ) M1M2_PR ;
+ + ROUTED met2 ( 188370 2601850 ) ( * 2605420 )
+ NEW met3 ( 188370 2605420 ) ( 201020 * )
+ NEW met3 ( 201020 2605420 ) ( * 2606100 0 )
+ NEW met2 ( 123510 141610 ) ( * 2601850 )
+ NEW met1 ( 123510 2601850 ) ( 188370 * )
+ NEW met2 ( 2284590 2380 0 ) ( * 34500 )
+ NEW met2 ( 2284130 34500 ) ( 2284590 * )
+ NEW met1 ( 123510 141610 ) ( 2284130 * )
+ NEW met2 ( 2284130 34500 ) ( * 141610 )
+ NEW met1 ( 123510 2601850 ) M1M2_PR
+ NEW met1 ( 188370 2601850 ) M1M2_PR
+ NEW met2 ( 188370 2605420 ) M2M3_PR_M
+ NEW met1 ( 123510 141610 ) M1M2_PR
+ NEW met1 ( 2284130 141610 ) M1M2_PR ;
- la_data_out[94] ( PIN la_data_out[94] ) ( chip_controller la_data_out[94] ) + USE SIGNAL
- + ROUTED met2 ( 612030 2183820 ) ( 613410 * )
- NEW met2 ( 613410 2183820 ) ( * 2212380 )
- NEW met3 ( 520950 2212380 ) ( 613410 * )
+ + ROUTED met2 ( 530610 2699940 ) ( 531070 * 0 )
+ NEW met2 ( 530610 2699940 ) ( * 2715580 )
NEW met2 ( 2302070 2380 0 ) ( * 3060 )
NEW met2 ( 2301150 3060 ) ( 2302070 * )
NEW met2 ( 2301150 2380 ) ( * 3060 )
NEW met2 ( 2299770 2380 ) ( 2301150 * )
- NEW met2 ( 520950 2199460 0 ) ( * 2212380 )
- NEW met1 ( 612030 59670 ) ( 2299770 * )
- NEW met2 ( 2299770 2380 ) ( * 59670 )
- NEW met2 ( 612030 59670 ) ( * 2183820 )
- NEW met2 ( 613410 2212380 ) M2M3_PR_M
- NEW met1 ( 612030 59670 ) M1M2_PR
- NEW met2 ( 520950 2212380 ) M2M3_PR_M
- NEW met1 ( 2299770 59670 ) M1M2_PR ;
+ NEW met2 ( 2297930 82800 ) ( 2299770 * )
+ NEW met2 ( 2299770 2380 ) ( * 82800 )
+ NEW met1 ( 638250 155890 ) ( 2297930 * )
+ NEW met2 ( 2297930 82800 ) ( * 155890 )
+ NEW met3 ( 530610 2715580 ) ( 638250 * )
+ NEW met2 ( 638250 155890 ) ( * 2715580 )
+ NEW met2 ( 530610 2715580 ) M2M3_PR_M
+ NEW met1 ( 638250 155890 ) M1M2_PR
+ NEW met1 ( 2297930 155890 ) M1M2_PR
+ NEW met2 ( 638250 2715580 ) M2M3_PR_M ;
- la_data_out[95] ( PIN la_data_out[95] ) ( chip_controller la_data_out[95] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2132820 0 ) ( 607430 * )
- NEW met2 ( 607430 2132310 ) ( * 2132820 )
+ + ROUTED met3 ( 599380 2633980 0 ) ( 607890 * )
+ NEW met2 ( 607890 2630070 ) ( * 2633980 )
+ NEW met2 ( 2318630 82800 ) ( * 129370 )
NEW met2 ( 2318630 82800 ) ( 2320010 * )
NEW met2 ( 2320010 2380 0 ) ( * 82800 )
- NEW met2 ( 2318630 82800 ) ( * 1745390 )
- NEW met1 ( 607430 2132310 ) ( 1335610 * )
- NEW met1 ( 1335610 1745390 ) ( 2318630 * )
- NEW met2 ( 1335610 1745390 ) ( * 2132310 )
- NEW met2 ( 607430 2132820 ) M2M3_PR_M
- NEW met1 ( 607430 2132310 ) M1M2_PR
- NEW met1 ( 2318630 1745390 ) M1M2_PR
- NEW met1 ( 1335610 1745390 ) M1M2_PR
- NEW met1 ( 1335610 2132310 ) M1M2_PR ;
+ NEW met1 ( 607890 2630070 ) ( 907350 * )
+ NEW met1 ( 907350 129370 ) ( 2318630 * )
+ NEW met2 ( 907350 129370 ) ( * 2630070 )
+ NEW met2 ( 607890 2633980 ) M2M3_PR_M
+ NEW met1 ( 607890 2630070 ) M1M2_PR
+ NEW met1 ( 2318630 129370 ) M1M2_PR
+ NEW met1 ( 907350 129370 ) M1M2_PR
+ NEW met1 ( 907350 2630070 ) M1M2_PR ;
- la_data_out[96] ( PIN la_data_out[96] ) ( chip_controller la_data_out[96] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2138940 0 ) ( 608350 * )
- NEW met2 ( 608350 2132650 ) ( * 2138940 )
+ + ROUTED met3 ( 599380 2636020 0 ) ( 607430 * )
+ NEW met2 ( 607430 2636020 ) ( * 2636530 )
+ NEW met2 ( 962550 136510 ) ( * 2636530 )
NEW met2 ( 2332430 82800 ) ( 2337490 * )
NEW met2 ( 2337490 2380 0 ) ( * 82800 )
- NEW met2 ( 2332430 82800 ) ( * 1730090 )
- NEW met1 ( 608350 2132650 ) ( 1225670 * )
- NEW met1 ( 1225670 1730090 ) ( 2332430 * )
- NEW met2 ( 1225670 1730090 ) ( * 2132650 )
- NEW met2 ( 608350 2138940 ) M2M3_PR_M
- NEW met1 ( 608350 2132650 ) M1M2_PR
- NEW met1 ( 2332430 1730090 ) M1M2_PR
- NEW met1 ( 1225670 1730090 ) M1M2_PR
- NEW met1 ( 1225670 2132650 ) M1M2_PR ;
+ NEW met2 ( 2332430 82800 ) ( * 136510 )
+ NEW met1 ( 607430 2636530 ) ( 962550 * )
+ NEW met1 ( 962550 136510 ) ( 2332430 * )
+ NEW met2 ( 607430 2636020 ) M2M3_PR_M
+ NEW met1 ( 607430 2636530 ) M1M2_PR
+ NEW met1 ( 962550 2636530 ) M1M2_PR
+ NEW met1 ( 962550 136510 ) M1M2_PR
+ NEW met1 ( 2332430 136510 ) M1M2_PR ;
- la_data_out[97] ( PIN la_data_out[97] ) ( chip_controller la_data_out[97] ) + USE SIGNAL
- + ROUTED met2 ( 2342550 20570 ) ( * 1742670 )
- NEW met1 ( 537510 1742670 ) ( 2342550 * )
- NEW met2 ( 2355430 2380 0 ) ( * 20570 )
- NEW met1 ( 2342550 20570 ) ( 2355430 * )
- NEW met2 ( 536590 1800300 0 ) ( 537510 * )
- NEW met2 ( 537510 1742670 ) ( * 1800300 )
- NEW met1 ( 2342550 20570 ) M1M2_PR
- NEW met1 ( 2342550 1742670 ) M1M2_PR
- NEW met1 ( 537510 1742670 ) M1M2_PR
- NEW met1 ( 2355430 20570 ) M1M2_PR ;
+ + ROUTED met2 ( 534750 2699260 0 ) ( 536130 * )
+ NEW met2 ( 536130 2699260 ) ( * 2717620 )
+ NEW met2 ( 2355430 2380 0 ) ( * 3060 )
+ NEW met2 ( 2354510 3060 ) ( 2355430 * )
+ NEW met2 ( 2354510 2380 ) ( * 3060 )
+ NEW met2 ( 2353130 2380 ) ( 2354510 * )
+ NEW met1 ( 652510 129030 ) ( 2353130 * )
+ NEW met2 ( 652510 129030 ) ( * 2717620 )
+ NEW met2 ( 2353130 2380 ) ( * 129030 )
+ NEW met3 ( 536130 2717620 ) ( 652510 * )
+ NEW met2 ( 536130 2717620 ) M2M3_PR_M
+ NEW met1 ( 652510 129030 ) M1M2_PR
+ NEW met2 ( 652510 2717620 ) M2M3_PR_M
+ NEW met1 ( 2353130 129030 ) M1M2_PR ;
- la_data_out[98] ( PIN la_data_out[98] ) ( chip_controller la_data_out[98] ) + USE SIGNAL
- + ROUTED met2 ( 188830 2126020 ) ( 189290 * )
- NEW met2 ( 188830 2126020 ) ( * 2140300 )
- NEW met3 ( 188830 2140300 ) ( 200100 * 0 )
- NEW met2 ( 2252850 17170 ) ( * 1784150 )
- NEW met2 ( 2372910 2380 0 ) ( * 17170 )
- NEW met1 ( 2252850 17170 ) ( 2372910 * )
- NEW met1 ( 188370 1784150 ) ( 2252850 * )
- NEW li1 ( 188370 1807270 ) ( * 1815090 )
- NEW met2 ( 188370 1815090 ) ( * 1826310 )
- NEW met1 ( 188370 1826310 ) ( 189290 * )
- NEW met1 ( 189290 1826310 ) ( * 1828010 )
- NEW met2 ( 188370 1784150 ) ( * 1807270 )
- NEW met2 ( 189290 1828010 ) ( * 2126020 )
- NEW met2 ( 188830 2140300 ) M2M3_PR_M
- NEW met1 ( 2252850 17170 ) M1M2_PR
- NEW met1 ( 188370 1784150 ) M1M2_PR
- NEW met1 ( 2252850 1784150 ) M1M2_PR
- NEW met1 ( 2372910 17170 ) M1M2_PR
- NEW li1 ( 188370 1807270 ) L1M1_PR_MR
- NEW met1 ( 188370 1807270 ) M1M2_PR
- NEW li1 ( 188370 1815090 ) L1M1_PR_MR
- NEW met1 ( 188370 1815090 ) M1M2_PR
- NEW met1 ( 188370 1826310 ) M1M2_PR
- NEW met1 ( 189290 1828010 ) M1M2_PR
- NEW met1 ( 188370 1807270 ) RECT ( -355 -70 0 70 )
- NEW met1 ( 188370 1815090 ) RECT ( -355 -70 0 70 ) ;
+ + ROUTED met3 ( 599380 2640780 0 ) ( 607890 * )
+ NEW met2 ( 607890 2636870 ) ( * 2640780 )
+ NEW met2 ( 900910 39610 ) ( * 2636870 )
+ NEW met1 ( 607890 2636870 ) ( 900910 * )
+ NEW met1 ( 900910 39610 ) ( 2372910 * )
+ NEW met2 ( 2372910 2380 0 ) ( * 39610 )
+ NEW met2 ( 607890 2640780 ) M2M3_PR_M
+ NEW met1 ( 607890 2636870 ) M1M2_PR
+ NEW met1 ( 900910 2636870 ) M1M2_PR
+ NEW met1 ( 900910 39610 ) M1M2_PR
+ NEW met1 ( 2372910 39610 ) M1M2_PR ;
- la_data_out[99] ( PIN la_data_out[99] ) ( chip_controller la_data_out[99] ) + USE SIGNAL
- + ROUTED met1 ( 189750 2118030 ) ( 192970 * )
- NEW met2 ( 192970 2118030 ) ( * 2142340 )
- NEW met3 ( 192970 2142340 ) ( 200100 * 0 )
- NEW met2 ( 2218350 18190 ) ( * 1784490 )
- NEW met2 ( 2390850 2380 0 ) ( * 18190 )
- NEW met1 ( 2218350 18190 ) ( 2390850 * )
- NEW met1 ( 189750 1784490 ) ( 2218350 * )
- NEW met2 ( 189750 1784490 ) ( * 2118030 )
- NEW met1 ( 189750 2118030 ) M1M2_PR
- NEW met1 ( 192970 2118030 ) M1M2_PR
- NEW met2 ( 192970 2142340 ) M2M3_PR_M
- NEW met1 ( 2218350 18190 ) M1M2_PR
- NEW met1 ( 189750 1784490 ) M1M2_PR
- NEW met1 ( 2218350 1784490 ) M1M2_PR
- NEW met1 ( 2390850 18190 ) M1M2_PR ;
+ + ROUTED met2 ( 189290 2615790 ) ( * 2619700 )
+ NEW met3 ( 189290 2619700 ) ( 201020 * )
+ NEW met3 ( 201020 2619700 ) ( * 2620380 0 )
+ NEW met1 ( 150190 2615790 ) ( 189290 * )
+ NEW met1 ( 150190 120870 ) ( 2387630 * )
+ NEW met2 ( 150190 120870 ) ( * 2615790 )
+ NEW met2 ( 2387630 82800 ) ( * 120870 )
+ NEW met2 ( 2387630 82800 ) ( 2390850 * )
+ NEW met2 ( 2390850 2380 0 ) ( * 82800 )
+ NEW met1 ( 189290 2615790 ) M1M2_PR
+ NEW met2 ( 189290 2619700 ) M2M3_PR_M
+ NEW met1 ( 150190 120870 ) M1M2_PR
+ NEW met1 ( 150190 2615790 ) M1M2_PR
+ NEW met1 ( 2387630 120870 ) M1M2_PR ;
- la_data_out[9] ( PIN la_data_out[9] ) ( chip_controller la_data_out[9] ) + USE SIGNAL
- + ROUTED met2 ( 793730 82800 ) ( 794650 * )
+ + ROUTED met3 ( 599380 2361980 0 ) ( 607430 * )
+ NEW met2 ( 607430 2360790 ) ( * 2361980 )
+ NEW met2 ( 793730 82800 ) ( 794650 * )
NEW met2 ( 794650 2380 0 ) ( * 82800 )
- NEW met2 ( 793730 82800 ) ( * 2220030 )
- NEW met2 ( 348450 2211870 ) ( * 2220030 )
- NEW met1 ( 270710 2211870 ) ( 348450 * )
- NEW met1 ( 348450 2220030 ) ( 793730 * )
- NEW met2 ( 270710 2199460 0 ) ( * 2211870 )
- NEW met1 ( 793730 2220030 ) M1M2_PR
- NEW met1 ( 270710 2211870 ) M1M2_PR
- NEW met1 ( 348450 2211870 ) M1M2_PR
- NEW met1 ( 348450 2220030 ) M1M2_PR ;
+ NEW met2 ( 793730 82800 ) ( * 2360790 )
+ NEW met1 ( 607430 2360790 ) ( 793730 * )
+ NEW met2 ( 607430 2361980 ) M2M3_PR_M
+ NEW met1 ( 607430 2360790 ) M1M2_PR
+ NEW met1 ( 793730 2360790 ) M1M2_PR ;
- la_oenb[0] ( PIN la_oenb[0] ) ( chip_controller la_oenb[0] ) + USE SIGNAL
- + ROUTED met2 ( 641010 2380 0 ) ( * 23290 )
- NEW met1 ( 194350 23290 ) ( 641010 * )
- NEW met3 ( 194350 1809140 ) ( 200100 * 0 )
- NEW met2 ( 194350 23290 ) ( * 1809140 )
- NEW met1 ( 194350 23290 ) M1M2_PR
- NEW met1 ( 641010 23290 ) M1M2_PR
- NEW met2 ( 194350 1809140 ) M2M3_PR_M ;
+ + ROUTED met2 ( 203550 2699940 ) ( 204010 * 0 )
+ NEW met2 ( 203550 2699940 ) ( * 2700450 )
+ NEW met2 ( 641010 2380 0 ) ( * 17340 )
+ NEW met2 ( 641010 17340 ) ( 642850 * )
+ NEW met2 ( 642850 17340 ) ( * 2700450 )
+ NEW met1 ( 203550 2700450 ) ( 642850 * )
+ NEW met1 ( 203550 2700450 ) M1M2_PR
+ NEW met1 ( 642850 2700450 ) M1M2_PR ;
- la_oenb[100] ( PIN la_oenb[100] ) ( chip_controller la_oenb[100] ) + USE SIGNAL
- + ROUTED met2 ( 189750 2139110 ) ( * 2143700 )
- NEW met3 ( 189750 2143700 ) ( 200100 * 0 )
- NEW met2 ( 2414310 2380 0 ) ( * 17170 )
- NEW met1 ( 2408330 17170 ) ( 2414310 * )
- NEW met2 ( 2408330 17170 ) ( * 1728390 )
- NEW met1 ( 148810 2139110 ) ( 189750 * )
- NEW met1 ( 148810 1728390 ) ( 2408330 * )
- NEW met2 ( 148810 1728390 ) ( * 2139110 )
- NEW met1 ( 189750 2139110 ) M1M2_PR
- NEW met2 ( 189750 2143700 ) M2M3_PR_M
- NEW met1 ( 2414310 17170 ) M1M2_PR
- NEW met1 ( 2408330 17170 ) M1M2_PR
- NEW met1 ( 2408330 1728390 ) M1M2_PR
- NEW met1 ( 148810 1728390 ) M1M2_PR
- NEW met1 ( 148810 2139110 ) M1M2_PR ;
+ + ROUTED met2 ( 2414310 2380 0 ) ( * 3060 )
+ NEW met2 ( 2413390 3060 ) ( 2414310 * )
+ NEW met2 ( 2413390 2380 ) ( * 3060 )
+ NEW met2 ( 2412010 2380 ) ( 2413390 * )
+ NEW met3 ( 599380 2644860 0 ) ( 607890 * )
+ NEW met2 ( 607890 2643670 ) ( * 2644860 )
+ NEW met2 ( 2412010 2380 ) ( * 79390 )
+ NEW met1 ( 607890 2643670 ) ( 852150 * )
+ NEW met2 ( 852150 79390 ) ( * 2643670 )
+ NEW met1 ( 852150 79390 ) ( 2412010 * )
+ NEW met2 ( 607890 2644860 ) M2M3_PR_M
+ NEW met1 ( 607890 2643670 ) M1M2_PR
+ NEW met1 ( 2412010 79390 ) M1M2_PR
+ NEW met1 ( 852150 79390 ) M1M2_PR
+ NEW met1 ( 852150 2643670 ) M1M2_PR ;
- la_oenb[101] ( PIN la_oenb[101] ) ( chip_controller la_oenb[101] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2149140 0 ) ( 607890 * )
- NEW met2 ( 607890 2145910 ) ( * 2149140 )
- NEW met2 ( 1369650 1751850 ) ( * 2145910 )
+ + ROUTED met2 ( 666310 128350 ) ( * 2714900 )
+ NEW met2 ( 2429030 82800 ) ( * 128350 )
NEW met2 ( 2429030 82800 ) ( 2432250 * )
NEW met2 ( 2432250 2380 0 ) ( * 82800 )
- NEW met2 ( 2429030 82800 ) ( * 1751850 )
- NEW met1 ( 607890 2145910 ) ( 1369650 * )
- NEW met1 ( 1369650 1751850 ) ( 2429030 * )
- NEW met2 ( 607890 2149140 ) M2M3_PR_M
- NEW met1 ( 607890 2145910 ) M1M2_PR
- NEW met1 ( 1369650 1751850 ) M1M2_PR
- NEW met1 ( 1369650 2145910 ) M1M2_PR
- NEW met1 ( 2429030 1751850 ) M1M2_PR ;
+ NEW met2 ( 550390 2699260 0 ) ( 551770 * )
+ NEW met2 ( 551770 2699260 ) ( * 2714900 )
+ NEW met1 ( 666310 128350 ) ( 2429030 * )
+ NEW met3 ( 551770 2714900 ) ( 666310 * )
+ NEW met1 ( 666310 128350 ) M1M2_PR
+ NEW met2 ( 666310 2714900 ) M2M3_PR_M
+ NEW met1 ( 2429030 128350 ) M1M2_PR
+ NEW met2 ( 551770 2714900 ) M2M3_PR_M ;
- la_oenb[102] ( PIN la_oenb[102] ) ( chip_controller la_oenb[102] ) + USE SIGNAL
- + ROUTED met2 ( 187910 2146250 ) ( * 2147100 )
- NEW met3 ( 187910 2147100 ) ( 200100 * 0 )
- NEW met1 ( 158010 2146250 ) ( 187910 * )
- NEW met1 ( 158010 1756270 ) ( 2449730 * )
- NEW met2 ( 158010 1756270 ) ( * 2146250 )
- NEW met2 ( 2449730 2380 0 ) ( * 1756270 )
- NEW met1 ( 187910 2146250 ) M1M2_PR
- NEW met2 ( 187910 2147100 ) M2M3_PR_M
- NEW met1 ( 158010 1756270 ) M1M2_PR
- NEW met1 ( 158010 2146250 ) M1M2_PR
- NEW met1 ( 2449730 1756270 ) M1M2_PR ;
+ + ROUTED met2 ( 188830 2622250 ) ( * 2625140 )
+ NEW met3 ( 188830 2625140 ) ( 201020 * )
+ NEW met3 ( 201020 2625140 ) ( * 2625820 0 )
+ NEW met1 ( 166750 2622250 ) ( 188830 * )
+ NEW met1 ( 166750 148410 ) ( 2449730 * )
+ NEW met2 ( 2449730 2380 0 ) ( * 148410 )
+ NEW met2 ( 166750 148410 ) ( * 2622250 )
+ NEW met1 ( 188830 2622250 ) M1M2_PR
+ NEW met2 ( 188830 2625140 ) M2M3_PR_M
+ NEW met1 ( 166750 2622250 ) M1M2_PR
+ NEW met1 ( 166750 148410 ) M1M2_PR
+ NEW met1 ( 2449730 148410 ) M1M2_PR ;
- la_oenb[103] ( PIN la_oenb[103] ) ( chip_controller la_oenb[103] ) + USE SIGNAL
- + ROUTED met2 ( 1928550 18870 ) ( * 1790100 )
- NEW met2 ( 2467670 2380 0 ) ( * 18870 )
- NEW met1 ( 1928550 18870 ) ( 2467670 * )
- NEW met2 ( 548550 1790100 ) ( * 1800300 0 )
- NEW met3 ( 548550 1790100 ) ( 1928550 * )
- NEW met1 ( 1928550 18870 ) M1M2_PR
- NEW met2 ( 1928550 1790100 ) M2M3_PR_M
- NEW met1 ( 2467670 18870 ) M1M2_PR
- NEW met2 ( 548550 1790100 ) M2M3_PR_M ;
+ + ROUTED met2 ( 555450 2699260 0 ) ( 556830 * )
+ NEW met2 ( 556830 2699260 ) ( * 2712860 )
+ NEW met2 ( 2467670 2380 0 ) ( * 3060 )
+ NEW met2 ( 2466750 3060 ) ( 2467670 * )
+ NEW met2 ( 2466750 2380 ) ( * 3060 )
+ NEW met2 ( 2465370 2380 ) ( 2466750 * )
+ NEW met2 ( 2463530 82800 ) ( 2465370 * )
+ NEW met2 ( 2465370 2380 ) ( * 82800 )
+ NEW met1 ( 631350 163030 ) ( 2463530 * )
+ NEW met2 ( 2463530 82800 ) ( * 163030 )
+ NEW met3 ( 556830 2712860 ) ( 593400 * )
+ NEW met3 ( 593400 2712860 ) ( * 2713540 )
+ NEW met3 ( 593400 2713540 ) ( 631350 * )
+ NEW met2 ( 631350 163030 ) ( * 2713540 )
+ NEW met2 ( 556830 2712860 ) M2M3_PR_M
+ NEW met1 ( 631350 163030 ) M1M2_PR
+ NEW met1 ( 2463530 163030 ) M1M2_PR
+ NEW met2 ( 631350 2713540 ) M2M3_PR_M ;
- la_oenb[104] ( PIN la_oenb[104] ) ( chip_controller la_oenb[104] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2156620 0 ) ( 607890 * )
- NEW met2 ( 607890 2153050 ) ( * 2156620 )
- NEW met2 ( 1439570 1772250 ) ( * 2153050 )
- NEW met1 ( 607890 2153050 ) ( 1439570 * )
- NEW met1 ( 1439570 1772250 ) ( 2484230 * )
- NEW met2 ( 2484230 82800 ) ( 2485610 * )
- NEW met2 ( 2485610 2380 0 ) ( * 82800 )
- NEW met2 ( 2484230 82800 ) ( * 1772250 )
- NEW met2 ( 607890 2156620 ) M2M3_PR_M
- NEW met1 ( 607890 2153050 ) M1M2_PR
- NEW met1 ( 1439570 1772250 ) M1M2_PR
- NEW met1 ( 1439570 2153050 ) M1M2_PR
- NEW met1 ( 2484230 1772250 ) M1M2_PR ;
+ + ROUTED met1 ( 555450 2284290 ) ( 558670 * )
+ NEW met2 ( 555450 2284290 ) ( * 2300100 0 )
+ NEW met2 ( 558670 46070 ) ( * 2284290 )
+ NEW met1 ( 558670 46070 ) ( 2485610 * )
+ NEW met2 ( 2485610 2380 0 ) ( * 46070 )
+ NEW met1 ( 558670 46070 ) M1M2_PR
+ NEW met1 ( 558670 2284290 ) M1M2_PR
+ NEW met1 ( 555450 2284290 ) M1M2_PR
+ NEW met1 ( 2485610 46070 ) M1M2_PR ;
- la_oenb[105] ( PIN la_oenb[105] ) ( chip_controller la_oenb[105] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2161380 0 ) ( 607430 * )
- NEW met2 ( 607430 2159850 ) ( * 2161380 )
- NEW met2 ( 2498030 82800 ) ( 2503090 * )
- NEW met2 ( 2503090 2380 0 ) ( * 82800 )
- NEW met2 ( 2498030 82800 ) ( * 1736890 )
- NEW met1 ( 1204050 1736890 ) ( 2498030 * )
- NEW met1 ( 607430 2159850 ) ( 1204050 * )
- NEW met2 ( 1204050 1736890 ) ( * 2159850 )
- NEW met1 ( 2498030 1736890 ) M1M2_PR
- NEW met2 ( 607430 2161380 ) M2M3_PR_M
- NEW met1 ( 607430 2159850 ) M1M2_PR
- NEW met1 ( 1204050 1736890 ) M1M2_PR
- NEW met1 ( 1204050 2159850 ) M1M2_PR ;
+ + ROUTED met2 ( 2503090 2380 0 ) ( * 45730 )
+ NEW met2 ( 558210 2300100 ) ( 558670 * 0 )
+ NEW met2 ( 558210 45730 ) ( * 2300100 )
+ NEW met1 ( 558210 45730 ) ( 2503090 * )
+ NEW met1 ( 2503090 45730 ) M1M2_PR
+ NEW met1 ( 558210 45730 ) M1M2_PR ;
- la_oenb[106] ( PIN la_oenb[106] ) ( chip_controller la_oenb[106] ) + USE SIGNAL
- + ROUTED met2 ( 2521030 2380 0 ) ( * 3060 )
+ + ROUTED met2 ( 189290 2629730 ) ( * 2635340 )
+ NEW met3 ( 189290 2635340 ) ( 200100 * )
+ NEW met3 ( 200100 2634660 0 ) ( * 2635340 )
+ NEW met2 ( 2521030 2380 0 ) ( * 3060 )
NEW met2 ( 2520110 3060 ) ( 2521030 * )
NEW met2 ( 2520110 2380 ) ( * 3060 )
NEW met2 ( 2518730 2380 ) ( 2520110 * )
- NEW met2 ( 612950 2159700 ) ( 613870 * )
- NEW met2 ( 613870 2159700 ) ( * 2213060 )
- NEW met2 ( 2518730 2380 ) ( * 1750150 )
- NEW met3 ( 542110 2213060 ) ( 613870 * )
- NEW met1 ( 612950 1750150 ) ( 2518730 * )
- NEW met2 ( 542110 2199460 0 ) ( * 2213060 )
- NEW met2 ( 612950 1750150 ) ( * 2159700 )
- NEW met1 ( 612950 1750150 ) M1M2_PR
- NEW met2 ( 613870 2213060 ) M2M3_PR_M
- NEW met1 ( 2518730 1750150 ) M1M2_PR
- NEW met2 ( 542110 2213060 ) M2M3_PR_M ;
+ NEW met2 ( 130870 120530 ) ( * 2629730 )
+ NEW met2 ( 2518730 2380 ) ( * 120530 )
+ NEW met1 ( 130870 2629730 ) ( 189290 * )
+ NEW met1 ( 130870 120530 ) ( 2518730 * )
+ NEW met1 ( 130870 120530 ) M1M2_PR
+ NEW met1 ( 130870 2629730 ) M1M2_PR
+ NEW met1 ( 189290 2629730 ) M1M2_PR
+ NEW met2 ( 189290 2635340 ) M2M3_PR_M
+ NEW met1 ( 2518730 120530 ) M1M2_PR ;
- la_oenb[107] ( PIN la_oenb[107] ) ( chip_controller la_oenb[107] ) + USE SIGNAL
- + ROUTED met2 ( 2538510 2380 0 ) ( * 3060 )
+ + ROUTED met3 ( 184460 2638060 ) ( 201020 * )
+ NEW met3 ( 201020 2638060 ) ( * 2638740 0 )
+ NEW met2 ( 2538510 2380 0 ) ( * 3060 )
NEW met2 ( 2537590 3060 ) ( 2538510 * )
NEW met2 ( 2537590 2380 ) ( * 3060 )
NEW met2 ( 2536210 2380 ) ( 2537590 * )
- NEW met3 ( 599380 2165460 0 ) ( 607890 * )
- NEW met2 ( 607890 2160190 ) ( * 2165460 )
- NEW met2 ( 990150 106930 ) ( * 2160190 )
- NEW met1 ( 2532990 58650 ) ( 2536210 * )
- NEW met2 ( 2532990 58650 ) ( * 106930 )
- NEW met2 ( 2536210 2380 ) ( * 58650 )
- NEW met1 ( 990150 106930 ) ( 2532990 * )
- NEW met1 ( 607890 2160190 ) ( 990150 * )
- NEW met1 ( 990150 106930 ) M1M2_PR
- NEW met1 ( 2532990 106930 ) M1M2_PR
- NEW met2 ( 607890 2165460 ) M2M3_PR_M
- NEW met1 ( 607890 2160190 ) M1M2_PR
- NEW met1 ( 990150 2160190 ) M1M2_PR
- NEW met1 ( 2532990 58650 ) M1M2_PR
- NEW met1 ( 2536210 58650 ) M1M2_PR ;
+ NEW met2 ( 2532530 82800 ) ( 2536210 * )
+ NEW met2 ( 2536210 2380 ) ( * 82800 )
+ NEW met2 ( 2532530 82800 ) ( * 168980 )
+ NEW met3 ( 184460 168980 ) ( 2532530 * )
+ NEW met4 ( 184460 168980 ) ( * 2638060 )
+ NEW met3 ( 184460 2638060 ) M3M4_PR_M
+ NEW met3 ( 184460 168980 ) M3M4_PR_M
+ NEW met2 ( 2532530 168980 ) M2M3_PR_M ;
- la_oenb[108] ( PIN la_oenb[108] ) ( chip_controller la_oenb[108] ) + USE SIGNAL
- + ROUTED met2 ( 666310 1742330 ) ( * 2208470 )
- NEW met1 ( 545330 2208470 ) ( 666310 * )
- NEW met1 ( 666310 1742330 ) ( 2553230 * )
- NEW met2 ( 545330 2199460 0 ) ( * 2208470 )
+ + ROUTED met3 ( 599380 2661180 0 ) ( 607890 * )
+ NEW met2 ( 607890 2657270 ) ( * 2661180 )
+ NEW met2 ( 880210 135490 ) ( * 2657270 )
+ NEW met1 ( 607890 2657270 ) ( 880210 * )
NEW met2 ( 2553230 82800 ) ( 2556450 * )
NEW met2 ( 2556450 2380 0 ) ( * 82800 )
- NEW met2 ( 2553230 82800 ) ( * 1742330 )
- NEW met1 ( 666310 1742330 ) M1M2_PR
- NEW met1 ( 666310 2208470 ) M1M2_PR
- NEW met1 ( 545330 2208470 ) M1M2_PR
- NEW met1 ( 2553230 1742330 ) M1M2_PR ;
+ NEW met1 ( 880210 135490 ) ( 2553230 * )
+ NEW met2 ( 2553230 82800 ) ( * 135490 )
+ NEW met2 ( 607890 2661180 ) M2M3_PR_M
+ NEW met1 ( 607890 2657270 ) M1M2_PR
+ NEW met1 ( 880210 135490 ) M1M2_PR
+ NEW met1 ( 880210 2657270 ) M1M2_PR
+ NEW met1 ( 2553230 135490 ) M1M2_PR ;
- la_oenb[109] ( PIN la_oenb[109] ) ( chip_controller la_oenb[109] ) + USE SIGNAL
- + ROUTED met3 ( 192050 2164780 ) ( 200100 * 0 )
- NEW met2 ( 2515050 18530 ) ( * 1783470 )
- NEW met2 ( 2573930 2380 0 ) ( * 18530 )
- NEW met1 ( 2515050 18530 ) ( 2573930 * )
- NEW met1 ( 192050 1783470 ) ( 2515050 * )
- NEW met2 ( 192050 1783470 ) ( * 2164780 )
- NEW met1 ( 2515050 18530 ) M1M2_PR
- NEW met1 ( 192050 1783470 ) M1M2_PR
- NEW met2 ( 192050 2164780 ) M2M3_PR_M
- NEW met1 ( 2515050 1783470 ) M1M2_PR
- NEW met1 ( 2573930 18530 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2663900 0 ) ( 607430 * )
+ NEW met2 ( 607430 2663900 ) ( * 2664410 )
+ NEW met2 ( 783150 121550 ) ( * 2664410 )
+ NEW met1 ( 783150 121550 ) ( 2573930 * )
+ NEW met1 ( 607430 2664410 ) ( 783150 * )
+ NEW met2 ( 2573930 2380 0 ) ( * 121550 )
+ NEW met1 ( 783150 121550 ) M1M2_PR
+ NEW met2 ( 607430 2663900 ) M2M3_PR_M
+ NEW met1 ( 607430 2664410 ) M1M2_PR
+ NEW met1 ( 783150 2664410 ) M1M2_PR
+ NEW met1 ( 2573930 121550 ) M1M2_PR ;
- la_oenb[10] ( PIN la_oenb[10] ) ( chip_controller la_oenb[10] ) + USE SIGNAL
- + ROUTED met1 ( 263810 1787210 ) ( 268870 * )
- NEW met2 ( 263810 1787210 ) ( * 1800300 0 )
- NEW met2 ( 268870 54230 ) ( * 1787210 )
- NEW met1 ( 268870 54230 ) ( 818570 * )
- NEW met2 ( 818570 2380 0 ) ( * 54230 )
- NEW met1 ( 268870 54230 ) M1M2_PR
- NEW met1 ( 268870 1787210 ) M1M2_PR
- NEW met1 ( 263810 1787210 ) M1M2_PR
- NEW met1 ( 818570 54230 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2368100 0 ) ( 607430 * )
+ NEW met2 ( 607430 2367590 ) ( * 2368100 )
+ NEW met2 ( 814430 82800 ) ( 818570 * )
+ NEW met2 ( 818570 2380 0 ) ( * 82800 )
+ NEW met1 ( 607430 2367590 ) ( 814430 * )
+ NEW met2 ( 814430 82800 ) ( * 2367590 )
+ NEW met2 ( 607430 2368100 ) M2M3_PR_M
+ NEW met1 ( 607430 2367590 ) M1M2_PR
+ NEW met1 ( 814430 2367590 ) M1M2_PR ;
- la_oenb[110] ( PIN la_oenb[110] ) ( chip_controller la_oenb[110] ) + USE SIGNAL
- + ROUTED met2 ( 188370 2166990 ) ( * 2169540 )
- NEW met3 ( 188370 2169540 ) ( 200100 * 0 )
- NEW met2 ( 2591870 2380 0 ) ( * 3060 )
- NEW met2 ( 2590950 3060 ) ( 2591870 * )
- NEW met2 ( 2590950 2380 ) ( * 3060 )
- NEW met2 ( 2589570 2380 ) ( 2590950 * )
- NEW met1 ( 150190 1735190 ) ( 2587730 * )
- NEW met2 ( 150190 1735190 ) ( * 2166990 )
- NEW met1 ( 150190 2166990 ) ( 188370 * )
- NEW met2 ( 2587730 82800 ) ( 2589570 * )
- NEW met2 ( 2589570 2380 ) ( * 82800 )
- NEW met2 ( 2587730 82800 ) ( * 1735190 )
- NEW met1 ( 188370 2166990 ) M1M2_PR
- NEW met2 ( 188370 2169540 ) M2M3_PR_M
- NEW met1 ( 150190 1735190 ) M1M2_PR
- NEW met1 ( 2587730 1735190 ) M1M2_PR
- NEW met1 ( 150190 2166990 ) M1M2_PR ;
+ + ROUTED met1 ( 568790 2284290 ) ( 572470 * )
+ NEW met2 ( 568790 2284290 ) ( * 2300100 0 )
+ NEW met2 ( 572470 45390 ) ( * 2284290 )
+ NEW met1 ( 572470 45390 ) ( 2591870 * )
+ NEW met2 ( 2591870 2380 0 ) ( * 45390 )
+ NEW met1 ( 572470 45390 ) M1M2_PR
+ NEW met1 ( 572470 2284290 ) M1M2_PR
+ NEW met1 ( 568790 2284290 ) M1M2_PR
+ NEW met1 ( 2591870 45390 ) M1M2_PR ;
- la_oenb[111] ( PIN la_oenb[111] ) ( chip_controller la_oenb[111] ) + USE SIGNAL
- + ROUTED met2 ( 2609350 2380 0 ) ( * 52190 )
- NEW met2 ( 565110 52190 ) ( * 1773300 )
- NEW met2 ( 562350 1773300 ) ( 565110 * )
- NEW met2 ( 562350 1773300 ) ( * 1800300 )
- NEW met2 ( 560970 1800300 0 ) ( 562350 * )
- NEW met1 ( 565110 52190 ) ( 2609350 * )
- NEW met1 ( 2609350 52190 ) M1M2_PR
- NEW met1 ( 565110 52190 ) M1M2_PR ;
+ + ROUTED met2 ( 189750 2650300 ) ( * 2650470 )
+ NEW met3 ( 189750 2650300 ) ( 200100 * )
+ NEW met3 ( 200100 2649620 0 ) ( * 2650300 )
+ NEW met2 ( 2608430 82800 ) ( 2609350 * )
+ NEW met2 ( 2609350 2380 0 ) ( * 82800 )
+ NEW met2 ( 2608430 82800 ) ( * 155210 )
+ NEW met2 ( 140070 155210 ) ( * 2650470 )
+ NEW met1 ( 140070 2650470 ) ( 189750 * )
+ NEW met1 ( 140070 155210 ) ( 2608430 * )
+ NEW met1 ( 189750 2650470 ) M1M2_PR
+ NEW met2 ( 189750 2650300 ) M2M3_PR_M
+ NEW met1 ( 2608430 155210 ) M1M2_PR
+ NEW met1 ( 140070 155210 ) M1M2_PR
+ NEW met1 ( 140070 2650470 ) M1M2_PR ;
- la_oenb[112] ( PIN la_oenb[112] ) ( chip_controller la_oenb[112] ) + USE SIGNAL
- + ROUTED li1 ( 572010 2210170 ) ( * 2213570 )
+ + ROUTED met2 ( 123970 162010 ) ( * 2650130 )
+ NEW met2 ( 186990 2650130 ) ( * 2654380 )
+ NEW met3 ( 186990 2654380 ) ( 201020 * )
+ NEW met3 ( 201020 2654380 ) ( * 2655060 0 )
NEW met2 ( 2622230 82800 ) ( 2627290 * )
NEW met2 ( 2627290 2380 0 ) ( * 82800 )
- NEW met2 ( 2622230 82800 ) ( * 1756950 )
- NEW met1 ( 556830 2210170 ) ( 572010 * )
- NEW met1 ( 572010 2213570 ) ( 638250 * )
- NEW met1 ( 638250 1756950 ) ( 2622230 * )
- NEW met2 ( 556830 2199460 0 ) ( * 2210170 )
- NEW met2 ( 638250 1756950 ) ( * 2213570 )
- NEW li1 ( 572010 2210170 ) L1M1_PR_MR
- NEW li1 ( 572010 2213570 ) L1M1_PR_MR
- NEW met1 ( 2622230 1756950 ) M1M2_PR
- NEW met1 ( 556830 2210170 ) M1M2_PR
- NEW met1 ( 638250 1756950 ) M1M2_PR
- NEW met1 ( 638250 2213570 ) M1M2_PR ;
+ NEW met2 ( 2622230 82800 ) ( * 162010 )
+ NEW met1 ( 123970 2650130 ) ( 186990 * )
+ NEW met1 ( 123970 162010 ) ( 2622230 * )
+ NEW met1 ( 123970 162010 ) M1M2_PR
+ NEW met1 ( 123970 2650130 ) M1M2_PR
+ NEW met1 ( 186990 2650130 ) M1M2_PR
+ NEW met2 ( 186990 2654380 ) M2M3_PR_M
+ NEW met1 ( 2622230 162010 ) M1M2_PR ;
- la_oenb[113] ( PIN la_oenb[113] ) ( chip_controller la_oenb[113] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2177700 0 ) ( 607890 * )
- NEW met2 ( 607890 2173790 ) ( * 2177700 )
+ + ROUTED met2 ( 188370 2656590 ) ( * 2659820 )
+ NEW met3 ( 188370 2659820 ) ( 201020 * )
+ NEW met3 ( 201020 2659820 ) ( * 2660500 0 )
NEW met2 ( 2645230 2380 0 ) ( * 3060 )
NEW met2 ( 2644310 3060 ) ( 2645230 * )
NEW met2 ( 2644310 2380 ) ( * 3060 )
NEW met2 ( 2642930 2380 ) ( 2644310 * )
- NEW met1 ( 1135050 1736210 ) ( 2642930 * )
- NEW met1 ( 607890 2173790 ) ( 1135050 * )
- NEW met2 ( 1135050 1736210 ) ( * 2173790 )
- NEW met2 ( 2642930 2380 ) ( * 1736210 )
- NEW met2 ( 607890 2177700 ) M2M3_PR_M
- NEW met1 ( 607890 2173790 ) M1M2_PR
- NEW met1 ( 1135050 1736210 ) M1M2_PR
- NEW met1 ( 2642930 1736210 ) M1M2_PR
- NEW met1 ( 1135050 2173790 ) M1M2_PR ;
+ NEW met3 ( 137310 182580 ) ( 2642930 * )
+ NEW met2 ( 137310 182580 ) ( * 2656590 )
+ NEW met1 ( 137310 2656590 ) ( 188370 * )
+ NEW met2 ( 2642930 2380 ) ( * 182580 )
+ NEW met1 ( 188370 2656590 ) M1M2_PR
+ NEW met2 ( 188370 2659820 ) M2M3_PR_M
+ NEW met2 ( 137310 182580 ) M2M3_PR_M
+ NEW met2 ( 2642930 182580 ) M2M3_PR_M
+ NEW met1 ( 137310 2656590 ) M1M2_PR ;
- la_oenb[114] ( PIN la_oenb[114] ) ( chip_controller la_oenb[114] ) + USE SIGNAL
- + ROUTED met3 ( 561890 2208980 ) ( 1224750 * )
- NEW met2 ( 2662710 2380 0 ) ( * 24990 )
- NEW met1 ( 1224750 24990 ) ( 2662710 * )
- NEW met2 ( 561890 2199460 0 ) ( * 2208980 )
- NEW met2 ( 1224750 24990 ) ( * 2208980 )
- NEW met2 ( 561890 2208980 ) M2M3_PR_M
- NEW met1 ( 1224750 24990 ) M1M2_PR
- NEW met2 ( 1224750 2208980 ) M2M3_PR_M
- NEW met1 ( 2662710 24990 ) M1M2_PR ;
+ + ROUTED met2 ( 955650 39270 ) ( * 2671890 )
+ NEW met1 ( 955650 39270 ) ( 2662710 * )
+ NEW met2 ( 2662710 2380 0 ) ( * 39270 )
+ NEW met3 ( 599380 2673420 0 ) ( 612030 * )
+ NEW met2 ( 612030 2671890 ) ( * 2673420 )
+ NEW met1 ( 612030 2671890 ) ( 955650 * )
+ NEW met1 ( 955650 39270 ) M1M2_PR
+ NEW met1 ( 955650 2671890 ) M1M2_PR
+ NEW met1 ( 2662710 39270 ) M1M2_PR
+ NEW met2 ( 612030 2673420 ) M2M3_PR_M
+ NEW met1 ( 612030 2671890 ) M1M2_PR ;
- la_oenb[115] ( PIN la_oenb[115] ) ( chip_controller la_oenb[115] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2179060 0 ) ( 608350 * )
- NEW met2 ( 608350 2174130 ) ( * 2179060 )
- NEW met1 ( 1121710 1729070 ) ( 2677430 * )
- NEW met1 ( 608350 2174130 ) ( 1121710 * )
- NEW met2 ( 1121710 1729070 ) ( * 2174130 )
+ + ROUTED met2 ( 130410 175950 ) ( * 2663730 )
+ NEW met2 ( 189750 2663730 ) ( * 2664580 )
+ NEW met3 ( 189750 2664580 ) ( 200100 * )
+ NEW met3 ( 200100 2663900 0 ) ( * 2664580 )
+ NEW met1 ( 130410 2663730 ) ( 189750 * )
NEW met2 ( 2677430 82800 ) ( 2680650 * )
NEW met2 ( 2680650 2380 0 ) ( * 82800 )
- NEW met2 ( 2677430 82800 ) ( * 1729070 )
- NEW met2 ( 608350 2179060 ) M2M3_PR_M
- NEW met1 ( 608350 2174130 ) M1M2_PR
- NEW met1 ( 1121710 1729070 ) M1M2_PR
- NEW met1 ( 2677430 1729070 ) M1M2_PR
- NEW met1 ( 1121710 2174130 ) M1M2_PR ;
+ NEW met1 ( 130410 175950 ) ( 2677430 * )
+ NEW met2 ( 2677430 82800 ) ( * 175950 )
+ NEW met1 ( 130410 175950 ) M1M2_PR
+ NEW met1 ( 130410 2663730 ) M1M2_PR
+ NEW met1 ( 189750 2663730 ) M1M2_PR
+ NEW met2 ( 189750 2664580 ) M2M3_PR_M
+ NEW met1 ( 2677430 175950 ) M1M2_PR ;
- la_oenb[116] ( PIN la_oenb[116] ) ( chip_controller la_oenb[116] ) + USE SIGNAL
- + ROUTED met1 ( 569710 2208130 ) ( 612950 * )
- NEW met2 ( 612950 2208000 ) ( * 2208130 )
- NEW met2 ( 611570 2208000 ) ( 612950 * )
- NEW met2 ( 569710 2199460 0 ) ( * 2208130 )
- NEW met2 ( 2698130 2380 0 ) ( * 1804890 )
- NEW met1 ( 611570 1804890 ) ( 2698130 * )
- NEW met2 ( 611570 1804890 ) ( * 2208000 )
- NEW met1 ( 569710 2208130 ) M1M2_PR
- NEW met1 ( 612950 2208130 ) M1M2_PR
- NEW met1 ( 2698130 1804890 ) M1M2_PR
- NEW met1 ( 611570 1804890 ) M1M2_PR ;
+ + ROUTED met2 ( 189290 2664070 ) ( * 2665260 )
+ NEW met3 ( 189290 2665260 ) ( 201020 * )
+ NEW met3 ( 201020 2665260 ) ( * 2665940 0 )
+ NEW met2 ( 2698130 2380 0 ) ( * 141270 )
+ NEW met2 ( 155250 141270 ) ( * 2664070 )
+ NEW met1 ( 155250 2664070 ) ( 189290 * )
+ NEW met1 ( 155250 141270 ) ( 2698130 * )
+ NEW met1 ( 189290 2664070 ) M1M2_PR
+ NEW met2 ( 189290 2665260 ) M2M3_PR_M
+ NEW met1 ( 2698130 141270 ) M1M2_PR
+ NEW met1 ( 155250 141270 ) M1M2_PR
+ NEW met1 ( 155250 2664070 ) M1M2_PR ;
- la_oenb[117] ( PIN la_oenb[117] ) ( chip_controller la_oenb[117] ) + USE SIGNAL
- + ROUTED met2 ( 2716070 2380 0 ) ( * 3060 )
- NEW met2 ( 2715150 3060 ) ( 2716070 * )
- NEW met2 ( 2715150 2380 ) ( * 3060 )
- NEW met2 ( 2713770 2380 ) ( 2715150 * )
- NEW met2 ( 188830 2173790 ) ( * 2178380 )
- NEW met3 ( 188830 2178380 ) ( 200100 * 0 )
- NEW met2 ( 2711930 82800 ) ( 2713770 * )
- NEW met2 ( 2713770 2380 ) ( * 82800 )
- NEW met2 ( 2711930 82800 ) ( * 1721590 )
- NEW met2 ( 150650 1721590 ) ( * 2173790 )
- NEW met1 ( 150650 2173790 ) ( 188830 * )
- NEW met1 ( 150650 1721590 ) ( 2711930 * )
- NEW met1 ( 188830 2173790 ) M1M2_PR
- NEW met2 ( 188830 2178380 ) M2M3_PR_M
- NEW met1 ( 2711930 1721590 ) M1M2_PR
- NEW met1 ( 150650 1721590 ) M1M2_PR
- NEW met1 ( 150650 2173790 ) M1M2_PR ;
+ + ROUTED met1 ( 582130 2284290 ) ( 586270 * )
+ NEW met2 ( 582130 2284290 ) ( * 2300100 0 )
+ NEW met2 ( 586270 45050 ) ( * 2284290 )
+ NEW met2 ( 2716070 2380 0 ) ( * 45050 )
+ NEW met1 ( 586270 45050 ) ( 2716070 * )
+ NEW met1 ( 586270 45050 ) M1M2_PR
+ NEW met1 ( 586270 2284290 ) M1M2_PR
+ NEW met1 ( 582130 2284290 ) M1M2_PR
+ NEW met1 ( 2716070 45050 ) M1M2_PR ;
- la_oenb[118] ( PIN la_oenb[118] ) ( chip_controller la_oenb[118] ) + USE SIGNAL
- + ROUTED met2 ( 579370 51850 ) ( * 1773300 )
- NEW met2 ( 578450 1773300 ) ( 579370 * )
- NEW met2 ( 578450 1773300 ) ( * 1800300 )
- NEW met2 ( 577070 1800300 0 ) ( 578450 * )
- NEW met2 ( 2733550 2380 0 ) ( * 51850 )
- NEW met1 ( 579370 51850 ) ( 2733550 * )
- NEW met1 ( 579370 51850 ) M1M2_PR
- NEW met1 ( 2733550 51850 ) M1M2_PR ;
+ + ROUTED met2 ( 189750 2670700 ) ( * 2670870 )
+ NEW met3 ( 189750 2670700 ) ( 201020 * )
+ NEW met3 ( 201020 2670700 ) ( * 2671380 0 )
+ NEW met2 ( 2732630 82800 ) ( 2733550 * )
+ NEW met2 ( 2733550 2380 0 ) ( * 82800 )
+ NEW met2 ( 2732630 82800 ) ( * 148070 )
+ NEW met1 ( 160310 2670870 ) ( 189750 * )
+ NEW met1 ( 160310 148070 ) ( 2732630 * )
+ NEW met2 ( 160310 148070 ) ( * 2670870 )
+ NEW met1 ( 189750 2670870 ) M1M2_PR
+ NEW met2 ( 189750 2670700 ) M2M3_PR_M
+ NEW met1 ( 2732630 148070 ) M1M2_PR
+ NEW met1 ( 160310 148070 ) M1M2_PR
+ NEW met1 ( 160310 2670870 ) M1M2_PR ;
- la_oenb[119] ( PIN la_oenb[119] ) ( chip_controller la_oenb[119] ) + USE SIGNAL
- + ROUTED met1 ( 577990 2209490 ) ( 613410 * )
- NEW li1 ( 613410 2208130 ) ( * 2209490 )
- NEW met2 ( 577990 2199460 0 ) ( * 2209490 )
- NEW met2 ( 1348950 25330 ) ( * 2208130 )
- NEW met1 ( 613410 2208130 ) ( 1348950 * )
- NEW met2 ( 2751490 2380 0 ) ( * 25330 )
- NEW met1 ( 1348950 25330 ) ( 2751490 * )
- NEW met1 ( 577990 2209490 ) M1M2_PR
- NEW li1 ( 613410 2209490 ) L1M1_PR_MR
- NEW li1 ( 613410 2208130 ) L1M1_PR_MR
- NEW met1 ( 1348950 25330 ) M1M2_PR
- NEW met1 ( 1348950 2208130 ) M1M2_PR
- NEW met1 ( 2751490 25330 ) M1M2_PR ;
+ + ROUTED met2 ( 591790 2278340 ) ( 592710 * )
+ NEW met2 ( 591790 2278340 ) ( * 2300100 )
+ NEW met2 ( 590870 2300100 0 ) ( 591790 * )
+ NEW met2 ( 592710 44710 ) ( * 2278340 )
+ NEW met1 ( 592710 44710 ) ( 2751490 * )
+ NEW met2 ( 2751490 2380 0 ) ( * 44710 )
+ NEW met1 ( 592710 44710 ) M1M2_PR
+ NEW met1 ( 2751490 44710 ) M1M2_PR ;
- la_oenb[11] ( PIN la_oenb[11] ) ( chip_controller la_oenb[11] ) + USE SIGNAL
- + ROUTED met3 ( 599380 1886660 0 ) ( 607430 * )
- NEW met2 ( 607430 1884110 ) ( * 1886660 )
+ + ROUTED met2 ( 190670 2373710 ) ( * 2376260 )
+ NEW met3 ( 190670 2376260 ) ( 201020 * )
+ NEW met3 ( 201020 2376260 ) ( * 2376940 0 )
+ NEW met1 ( 178710 2373710 ) ( 190670 * )
NEW met2 ( 835130 82800 ) ( 836050 * )
NEW met2 ( 836050 2380 0 ) ( * 82800 )
- NEW met1 ( 607430 1884110 ) ( 835130 * )
- NEW met2 ( 835130 82800 ) ( * 1884110 )
- NEW met2 ( 607430 1886660 ) M2M3_PR_M
- NEW met1 ( 607430 1884110 ) M1M2_PR
- NEW met1 ( 835130 1884110 ) M1M2_PR ;
+ NEW met2 ( 835130 82800 ) ( * 2292790 )
+ NEW met2 ( 178710 2292790 ) ( * 2373710 )
+ NEW met1 ( 178710 2292790 ) ( 835130 * )
+ NEW met1 ( 190670 2373710 ) M1M2_PR
+ NEW met2 ( 190670 2376260 ) M2M3_PR_M
+ NEW met1 ( 178710 2373710 ) M1M2_PR
+ NEW met1 ( 835130 2292790 ) M1M2_PR
+ NEW met1 ( 178710 2292790 ) M1M2_PR ;
- la_oenb[120] ( PIN la_oenb[120] ) ( chip_controller la_oenb[120] ) + USE SIGNAL
- + ROUTED met2 ( 187910 2180930 ) ( * 2185180 )
- NEW met3 ( 187910 2185180 ) ( 200100 * 0 )
- NEW met1 ( 149730 1749130 ) ( 2767130 * )
- NEW met2 ( 149730 1749130 ) ( * 2180930 )
- NEW met1 ( 149730 2180930 ) ( 187910 * )
+ + ROUTED met2 ( 187910 2671210 ) ( * 2676140 )
+ NEW met3 ( 187910 2676140 ) ( 201020 * )
+ NEW met3 ( 201020 2676140 ) ( * 2676820 0 )
+ NEW met2 ( 150650 168810 ) ( * 2671210 )
+ NEW met1 ( 150650 2671210 ) ( 187910 * )
NEW met2 ( 2767130 82800 ) ( 2768970 * )
NEW met2 ( 2768970 2380 0 ) ( * 82800 )
- NEW met2 ( 2767130 82800 ) ( * 1749130 )
- NEW met1 ( 187910 2180930 ) M1M2_PR
- NEW met2 ( 187910 2185180 ) M2M3_PR_M
- NEW met1 ( 149730 1749130 ) M1M2_PR
- NEW met1 ( 2767130 1749130 ) M1M2_PR
- NEW met1 ( 149730 2180930 ) M1M2_PR ;
+ NEW met1 ( 150650 168810 ) ( 2767130 * )
+ NEW met2 ( 2767130 82800 ) ( * 168810 )
+ NEW met1 ( 187910 2671210 ) M1M2_PR
+ NEW met2 ( 187910 2676140 ) M2M3_PR_M
+ NEW met1 ( 150650 168810 ) M1M2_PR
+ NEW met1 ( 150650 2671210 ) M1M2_PR
+ NEW met1 ( 2767130 168810 ) M1M2_PR ;
- la_oenb[121] ( PIN la_oenb[121] ) ( chip_controller la_oenb[121] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2189940 0 ) ( 608350 * )
- NEW met2 ( 608350 2187730 ) ( * 2189940 )
- NEW met2 ( 1383910 1779050 ) ( * 2187730 )
- NEW met2 ( 2786910 2380 0 ) ( * 17850 )
- NEW met1 ( 2780930 17850 ) ( 2786910 * )
- NEW met1 ( 608350 2187730 ) ( 1383910 * )
- NEW met1 ( 1383910 1779050 ) ( 2780930 * )
- NEW met2 ( 2780930 17850 ) ( * 1779050 )
- NEW met2 ( 608350 2189940 ) M2M3_PR_M
- NEW met1 ( 608350 2187730 ) M1M2_PR
- NEW met1 ( 1383910 1779050 ) M1M2_PR
- NEW met1 ( 1383910 2187730 ) M1M2_PR
- NEW met1 ( 2786910 17850 ) M1M2_PR
- NEW met1 ( 2780930 17850 ) M1M2_PR
- NEW met1 ( 2780930 1779050 ) M1M2_PR ;
+ + ROUTED met2 ( 583510 2699260 0 ) ( 584430 * )
+ NEW met2 ( 584430 2699260 ) ( * 2718300 )
+ NEW met2 ( 803850 114070 ) ( * 2718300 )
+ NEW met2 ( 2786910 2380 0 ) ( * 3060 )
+ NEW met2 ( 2785990 3060 ) ( 2786910 * )
+ NEW met2 ( 2785990 2380 ) ( * 3060 )
+ NEW met2 ( 2784610 2380 ) ( 2785990 * )
+ NEW met1 ( 803850 114070 ) ( 2780930 * )
+ NEW met2 ( 2780930 82800 ) ( * 114070 )
+ NEW met2 ( 2780930 82800 ) ( 2784610 * )
+ NEW met2 ( 2784610 2380 ) ( * 82800 )
+ NEW met3 ( 584430 2718300 ) ( 803850 * )
+ NEW met2 ( 584430 2718300 ) M2M3_PR_M
+ NEW met1 ( 803850 114070 ) M1M2_PR
+ NEW met2 ( 803850 2718300 ) M2M3_PR_M
+ NEW met1 ( 2780930 114070 ) M1M2_PR ;
- la_oenb[122] ( PIN la_oenb[122] ) ( chip_controller la_oenb[122] ) + USE SIGNAL
+ ROUTED met2 ( 2804390 2380 0 ) ( * 3060 )
NEW met2 ( 2803470 3060 ) ( 2804390 * )
NEW met2 ( 2803470 2380 ) ( * 3060 )
NEW met2 ( 2802090 2380 ) ( 2803470 * )
- NEW met2 ( 189750 2187390 ) ( * 2189940 )
- NEW met3 ( 189750 2189940 ) ( 200100 * 0 )
+ NEW met2 ( 187450 2678010 ) ( * 2683620 )
+ NEW met3 ( 187450 2683620 ) ( 199870 * )
+ NEW met3 ( 199870 2683620 ) ( * 2684300 )
+ NEW met3 ( 199870 2684300 ) ( 200100 * )
+ NEW met3 ( 200100 2683620 0 ) ( * 2684300 )
NEW met2 ( 2801630 82800 ) ( 2802090 * )
NEW met2 ( 2802090 2380 ) ( * 82800 )
- NEW met2 ( 2801630 82800 ) ( * 1776670 )
- NEW met1 ( 163530 2187390 ) ( 189750 * )
- NEW met1 ( 163530 1776670 ) ( 2801630 * )
- NEW met2 ( 163530 1776670 ) ( * 2187390 )
- NEW met1 ( 189750 2187390 ) M1M2_PR
- NEW met2 ( 189750 2189940 ) M2M3_PR_M
- NEW met1 ( 2801630 1776670 ) M1M2_PR
- NEW met1 ( 163530 1776670 ) M1M2_PR
- NEW met1 ( 163530 2187390 ) M1M2_PR ;
+ NEW met2 ( 141450 1804550 ) ( * 2678010 )
+ NEW met1 ( 141450 2678010 ) ( 187450 * )
+ NEW met1 ( 141450 1804550 ) ( 2801630 * )
+ NEW met2 ( 2801630 82800 ) ( * 1804550 )
+ NEW met1 ( 187450 2678010 ) M1M2_PR
+ NEW met2 ( 187450 2683620 ) M2M3_PR_M
+ NEW met1 ( 2801630 1804550 ) M1M2_PR
+ NEW met1 ( 141450 1804550 ) M1M2_PR
+ NEW met1 ( 141450 2678010 ) M1M2_PR ;
- la_oenb[123] ( PIN la_oenb[123] ) ( chip_controller la_oenb[123] ) + USE SIGNAL
- + ROUTED met2 ( 187910 2187730 ) ( * 2193340 )
- NEW met3 ( 187910 2193340 ) ( 200100 * 0 )
- NEW met2 ( 2822330 2380 0 ) ( * 1762730 )
- NEW met1 ( 149270 1762730 ) ( 2822330 * )
- NEW met2 ( 149270 1762730 ) ( * 2187730 )
- NEW met1 ( 149270 2187730 ) ( 187910 * )
- NEW met1 ( 2822330 1762730 ) M1M2_PR
- NEW met1 ( 187910 2187730 ) M1M2_PR
- NEW met2 ( 187910 2193340 ) M2M3_PR_M
- NEW met1 ( 149270 1762730 ) M1M2_PR
- NEW met1 ( 149270 2187730 ) M1M2_PR ;
+ + ROUTED met2 ( 189750 2684810 ) ( * 2684980 )
+ NEW met3 ( 189750 2684980 ) ( 201020 * )
+ NEW met3 ( 201020 2684980 ) ( * 2685660 0 )
+ NEW met2 ( 2822330 2380 0 ) ( * 1804210 )
+ NEW met2 ( 156170 1804210 ) ( * 2684810 )
+ NEW met1 ( 156170 2684810 ) ( 189750 * )
+ NEW met1 ( 156170 1804210 ) ( 2822330 * )
+ NEW met1 ( 189750 2684810 ) M1M2_PR
+ NEW met2 ( 189750 2684980 ) M2M3_PR_M
+ NEW met1 ( 2822330 1804210 ) M1M2_PR
+ NEW met1 ( 156170 1804210 ) M1M2_PR
+ NEW met1 ( 156170 2684810 ) M1M2_PR ;
- la_oenb[124] ( PIN la_oenb[124] ) ( chip_controller la_oenb[124] ) + USE SIGNAL
- + ROUTED met2 ( 592710 1800300 ) ( 593170 * 0 )
- NEW met2 ( 592710 51510 ) ( * 1800300 )
- NEW met2 ( 2840270 2380 0 ) ( * 3060 )
+ + ROUTED met2 ( 2840270 2380 0 ) ( * 3060 )
NEW met2 ( 2839350 3060 ) ( 2840270 * )
NEW met2 ( 2839350 2380 ) ( * 3060 )
NEW met2 ( 2837970 2380 ) ( 2839350 * )
- NEW met1 ( 592710 51510 ) ( 2837970 * )
- NEW met2 ( 2837970 2380 ) ( * 51510 )
- NEW met1 ( 592710 51510 ) M1M2_PR
- NEW met1 ( 2837970 51510 ) M1M2_PR ;
+ NEW met2 ( 1031550 59670 ) ( * 2684470 )
+ NEW met1 ( 1031550 59670 ) ( 2837970 * )
+ NEW met2 ( 2837970 2380 ) ( * 59670 )
+ NEW met3 ( 599380 2689060 0 ) ( 610650 * )
+ NEW met2 ( 610650 2684470 ) ( * 2689060 )
+ NEW met1 ( 610650 2684470 ) ( 1031550 * )
+ NEW met1 ( 1031550 59670 ) M1M2_PR
+ NEW met1 ( 1031550 2684470 ) M1M2_PR
+ NEW met1 ( 2837970 59670 ) M1M2_PR
+ NEW met2 ( 610650 2689060 ) M2M3_PR_M
+ NEW met1 ( 610650 2684470 ) M1M2_PR ;
- la_oenb[125] ( PIN la_oenb[125] ) ( chip_controller la_oenb[125] ) + USE SIGNAL
- + ROUTED met2 ( 589490 2199460 0 ) ( * 2213740 )
- NEW met3 ( 589490 2213740 ) ( 1404150 * )
- NEW met2 ( 1404150 47090 ) ( * 2213740 )
- NEW met1 ( 1404150 47090 ) ( 2857750 * )
- NEW met2 ( 2857750 2380 0 ) ( * 47090 )
- NEW met2 ( 589490 2213740 ) M2M3_PR_M
- NEW met2 ( 1404150 2213740 ) M2M3_PR_M
- NEW met1 ( 1404150 47090 ) M1M2_PR
- NEW met1 ( 2857750 47090 ) M1M2_PR ;
+ + ROUTED met2 ( 2856830 82800 ) ( 2857750 * )
+ NEW met2 ( 2857750 2380 0 ) ( * 82800 )
+ NEW met1 ( 625370 1785170 ) ( 2856830 * )
+ NEW met2 ( 2856830 82800 ) ( * 1785170 )
+ NEW met3 ( 596850 2712180 ) ( 625370 * )
+ NEW met2 ( 596850 2699260 ) ( * 2712180 )
+ NEW met2 ( 595470 2699260 0 ) ( 596850 * )
+ NEW met2 ( 625370 1785170 ) ( * 2712180 )
+ NEW met1 ( 625370 1785170 ) M1M2_PR
+ NEW met1 ( 2856830 1785170 ) M1M2_PR
+ NEW met2 ( 625370 2712180 ) M2M3_PR_M
+ NEW met2 ( 596850 2712180 ) M2M3_PR_M ;
- la_oenb[126] ( PIN la_oenb[126] ) ( chip_controller la_oenb[126] ) + USE SIGNAL
- + ROUTED met3 ( 593170 2200140 ) ( 603750 * )
- NEW met2 ( 593170 2199460 ) ( * 2200140 )
- NEW met2 ( 592710 2199460 0 ) ( 593170 * )
+ + ROUTED met3 ( 200100 2693140 0 ) ( * 2693820 )
+ NEW met3 ( 199410 2693820 ) ( 200100 * )
+ NEW met2 ( 199410 2693820 ) ( * 2694330 )
+ NEW met2 ( 1342510 1763410 ) ( * 2694330 )
+ NEW met1 ( 1342510 1763410 ) ( 2870630 * )
NEW met2 ( 2870630 82800 ) ( 2875690 * )
NEW met2 ( 2875690 2380 0 ) ( * 82800 )
- NEW met2 ( 2870630 82800 ) ( * 1804210 )
- NEW met1 ( 603750 1804210 ) ( 2870630 * )
- NEW met2 ( 603750 1804210 ) ( * 2200140 )
- NEW met2 ( 603750 2200140 ) M2M3_PR_M
- NEW met2 ( 593170 2200140 ) M2M3_PR_M
- NEW met1 ( 2870630 1804210 ) M1M2_PR
- NEW met1 ( 603750 1804210 ) M1M2_PR ;
+ NEW met2 ( 2870630 82800 ) ( * 1763410 )
+ NEW met1 ( 199410 2694330 ) ( 1342510 * )
+ NEW met2 ( 199410 2693820 ) M2M3_PR_M
+ NEW met1 ( 199410 2694330 ) M1M2_PR
+ NEW met1 ( 1342510 1763410 ) M1M2_PR
+ NEW met1 ( 1342510 2694330 ) M1M2_PR
+ NEW met1 ( 2870630 1763410 ) M1M2_PR ;
- la_oenb[127] ( PIN la_oenb[127] ) ( chip_controller la_oenb[127] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2198780 0 ) ( 607430 * )
- NEW met2 ( 607430 2194700 ) ( * 2198780 )
- NEW met2 ( 2893170 2380 0 ) ( * 59330 )
- NEW met3 ( 607430 2194700 ) ( 1031550 * )
- NEW met2 ( 1031550 59330 ) ( * 2194700 )
- NEW met1 ( 1031550 59330 ) ( 2893170 * )
- NEW met2 ( 607430 2198780 ) M2M3_PR_M
- NEW met2 ( 607430 2194700 ) M2M3_PR_M
- NEW met1 ( 2893170 59330 ) M1M2_PR
- NEW met1 ( 1031550 59330 ) M1M2_PR
- NEW met2 ( 1031550 2194700 ) M2M3_PR_M ;
+ + ROUTED met2 ( 599150 2288030 ) ( * 2300100 0 )
+ NEW met2 ( 1445550 1702890 ) ( * 2288030 )
+ NEW met2 ( 2891330 82800 ) ( 2893170 * )
+ NEW met2 ( 2893170 2380 0 ) ( * 82800 )
+ NEW met2 ( 2891330 82800 ) ( * 1702890 )
+ NEW met1 ( 599150 2288030 ) ( 1445550 * )
+ NEW met1 ( 1445550 1702890 ) ( 2891330 * )
+ NEW met1 ( 599150 2288030 ) M1M2_PR
+ NEW met1 ( 1445550 1702890 ) M1M2_PR
+ NEW met1 ( 1445550 2288030 ) M1M2_PR
+ NEW met1 ( 2891330 1702890 ) M1M2_PR ;
- la_oenb[12] ( PIN la_oenb[12] ) ( chip_controller la_oenb[12] ) + USE SIGNAL
- + ROUTED met3 ( 599380 1891420 0 ) ( 607430 * )
- NEW met2 ( 607430 1891250 ) ( * 1891420 )
+ + ROUTED met3 ( 198490 2384420 ) ( 200100 * )
+ NEW met3 ( 200100 2383740 0 ) ( * 2384420 )
NEW met2 ( 853990 2380 0 ) ( * 3060 )
NEW met2 ( 853070 3060 ) ( 853990 * )
NEW met2 ( 853070 2380 ) ( * 3060 )
NEW met2 ( 851690 2380 ) ( 853070 * )
NEW met2 ( 848930 82800 ) ( 851690 * )
NEW met2 ( 851690 2380 ) ( * 82800 )
- NEW met1 ( 607430 1891250 ) ( 848930 * )
- NEW met2 ( 848930 82800 ) ( * 1891250 )
- NEW met2 ( 607430 1891420 ) M2M3_PR_M
- NEW met1 ( 607430 1891250 ) M1M2_PR
- NEW met1 ( 848930 1891250 ) M1M2_PR ;
+ NEW met2 ( 848930 82800 ) ( * 2301630 )
+ NEW met1 ( 198490 2319990 ) ( 199410 * )
+ NEW li1 ( 199410 2301630 ) ( * 2319990 )
+ NEW met2 ( 198490 2319990 ) ( * 2384420 )
+ NEW met1 ( 199410 2301630 ) ( 848930 * )
+ NEW met2 ( 198490 2384420 ) M2M3_PR_M
+ NEW met1 ( 848930 2301630 ) M1M2_PR
+ NEW met1 ( 198490 2319990 ) M1M2_PR
+ NEW li1 ( 199410 2319990 ) L1M1_PR_MR
+ NEW li1 ( 199410 2301630 ) L1M1_PR_MR ;
- la_oenb[13] ( PIN la_oenb[13] ) ( chip_controller la_oenb[13] ) + USE SIGNAL
+ ROUTED met2 ( 871470 2380 0 ) ( * 3060 )
NEW met2 ( 870550 3060 ) ( 871470 * )
NEW met2 ( 870550 2380 ) ( * 3060 )
NEW met2 ( 869630 2380 ) ( 870550 * )
- NEW met2 ( 299690 2199460 0 ) ( * 2212550 )
- NEW met2 ( 869630 2380 ) ( * 2218330 )
- NEW met2 ( 352130 2212550 ) ( * 2218330 )
- NEW met1 ( 299690 2212550 ) ( 352130 * )
- NEW met1 ( 352130 2218330 ) ( 869630 * )
- NEW met1 ( 299690 2212550 ) M1M2_PR
- NEW met1 ( 869630 2218330 ) M1M2_PR
- NEW met1 ( 352130 2212550 ) M1M2_PR
- NEW met1 ( 352130 2218330 ) M1M2_PR ;
+ NEW met2 ( 191130 2387650 ) ( * 2392580 )
+ NEW met3 ( 191130 2392580 ) ( 201020 * )
+ NEW met3 ( 201020 2392580 ) ( * 2393260 0 )
+ NEW met2 ( 869630 2380 ) ( * 2283610 )
+ NEW met1 ( 164910 2387650 ) ( 191130 * )
+ NEW met1 ( 164910 2283610 ) ( 869630 * )
+ NEW met2 ( 164910 2283610 ) ( * 2387650 )
+ NEW met1 ( 191130 2387650 ) M1M2_PR
+ NEW met2 ( 191130 2392580 ) M2M3_PR_M
+ NEW met1 ( 869630 2283610 ) M1M2_PR
+ NEW met1 ( 164910 2283610 ) M1M2_PR
+ NEW met1 ( 164910 2387650 ) M1M2_PR ;
- la_oenb[14] ( PIN la_oenb[14] ) ( chip_controller la_oenb[14] ) + USE SIGNAL
- + ROUTED met2 ( 889410 2380 0 ) ( * 17340 )
- NEW met2 ( 886190 17340 ) ( 889410 * )
- NEW met3 ( 599380 1901620 0 ) ( 607430 * )
- NEW met2 ( 607430 1897710 ) ( * 1901620 )
- NEW met2 ( 883890 82800 ) ( 886190 * )
- NEW met2 ( 886190 17340 ) ( * 82800 )
- NEW met2 ( 883890 82800 ) ( * 1897710 )
- NEW met1 ( 607430 1897710 ) ( 883890 * )
- NEW met2 ( 607430 1901620 ) M2M3_PR_M
- NEW met1 ( 607430 1897710 ) M1M2_PR
- NEW met1 ( 883890 1897710 ) M1M2_PR ;
+ + ROUTED met2 ( 191130 2401250 ) ( * 2403460 )
+ NEW met3 ( 191130 2403460 ) ( 201020 * )
+ NEW met3 ( 201020 2403460 ) ( * 2404140 0 )
+ NEW met2 ( 883890 82800 ) ( 889410 * )
+ NEW met2 ( 889410 2380 0 ) ( * 82800 )
+ NEW met2 ( 883890 82800 ) ( * 2283270 )
+ NEW met1 ( 158470 2401250 ) ( 191130 * )
+ NEW met2 ( 158470 2283270 ) ( * 2401250 )
+ NEW met1 ( 158470 2283270 ) ( 883890 * )
+ NEW met1 ( 191130 2401250 ) M1M2_PR
+ NEW met2 ( 191130 2403460 ) M2M3_PR_M
+ NEW met1 ( 883890 2283270 ) M1M2_PR
+ NEW met1 ( 158470 2401250 ) M1M2_PR
+ NEW met1 ( 158470 2283270 ) M1M2_PR ;
- la_oenb[15] ( PIN la_oenb[15] ) ( chip_controller la_oenb[15] ) + USE SIGNAL
- + ROUTED met3 ( 198950 1903660 ) ( 200100 * 0 )
+ + ROUTED met1 ( 314870 2283950 ) ( 317170 * )
+ NEW met2 ( 314870 2283950 ) ( * 2300100 0 )
+ NEW met2 ( 317170 79730 ) ( * 2283950 )
NEW met2 ( 907350 2380 0 ) ( * 3060 )
NEW met2 ( 906430 3060 ) ( 907350 * )
NEW met2 ( 906430 2380 ) ( * 3060 )
NEW met2 ( 905050 2380 ) ( 906430 * )
- NEW met2 ( 904130 82800 ) ( 905050 * )
- NEW met2 ( 905050 2380 ) ( * 82800 )
- NEW met1 ( 198950 1790950 ) ( 904130 * )
- NEW met2 ( 904130 82800 ) ( * 1790950 )
- NEW met2 ( 198950 1849200 ) ( * 1903660 )
- NEW met2 ( 198030 1824780 ) ( 198950 * )
- NEW met2 ( 198030 1824780 ) ( * 1849200 )
- NEW met2 ( 198030 1849200 ) ( 198950 * )
- NEW met2 ( 198950 1790950 ) ( * 1824780 )
- NEW met1 ( 198950 1790950 ) M1M2_PR
- NEW met2 ( 198950 1903660 ) M2M3_PR_M
- NEW met1 ( 904130 1790950 ) M1M2_PR ;
+ NEW met1 ( 317170 79730 ) ( 905050 * )
+ NEW met2 ( 905050 2380 ) ( * 79730 )
+ NEW met1 ( 317170 79730 ) M1M2_PR
+ NEW met1 ( 317170 2283950 ) M1M2_PR
+ NEW met1 ( 314870 2283950 ) M1M2_PR
+ NEW met1 ( 905050 79730 ) M1M2_PR ;
- la_oenb[16] ( PIN la_oenb[16] ) ( chip_controller la_oenb[16] ) + USE SIGNAL
- + ROUTED met3 ( 193890 1912500 ) ( 200100 * 0 )
- NEW met1 ( 193890 79730 ) ( 924830 * )
- NEW met2 ( 924830 2380 0 ) ( * 79730 )
- NEW met2 ( 193890 79730 ) ( * 1912500 )
- NEW met1 ( 193890 79730 ) M1M2_PR
- NEW met2 ( 193890 1912500 ) M2M3_PR_M
- NEW met1 ( 924830 79730 ) M1M2_PR ;
+ + ROUTED met2 ( 315330 2699260 0 ) ( 316710 * )
+ NEW met2 ( 316710 2699260 ) ( * 2706910 )
+ NEW met2 ( 924830 2380 0 ) ( * 18190 )
+ NEW met1 ( 914250 18190 ) ( 924830 * )
+ NEW met2 ( 914250 18190 ) ( * 2706910 )
+ NEW met1 ( 316710 2706910 ) ( 914250 * )
+ NEW met1 ( 316710 2706910 ) M1M2_PR
+ NEW met1 ( 924830 18190 ) M1M2_PR
+ NEW met1 ( 914250 18190 ) M1M2_PR
+ NEW met1 ( 914250 2706910 ) M1M2_PR ;
- la_oenb[17] ( PIN la_oenb[17] ) ( chip_controller la_oenb[17] ) + USE SIGNAL
- + ROUTED met1 ( 320390 1787210 ) ( 324070 * )
- NEW met2 ( 320390 1787210 ) ( * 1800300 0 )
- NEW met2 ( 324070 53890 ) ( * 1787210 )
- NEW met2 ( 942770 2380 0 ) ( * 17340 )
- NEW met2 ( 941850 17340 ) ( 942770 * )
- NEW met1 ( 324070 53890 ) ( 941850 * )
- NEW met2 ( 941850 17340 ) ( * 53890 )
- NEW met1 ( 324070 53890 ) M1M2_PR
- NEW met1 ( 324070 1787210 ) M1M2_PR
- NEW met1 ( 320390 1787210 ) M1M2_PR
- NEW met1 ( 941850 53890 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2408900 0 ) ( 607430 * )
+ NEW met2 ( 607430 2408900 ) ( * 2409070 )
+ NEW met2 ( 942770 2380 0 ) ( * 15980 )
+ NEW met2 ( 941390 15980 ) ( 942770 * )
+ NEW met1 ( 607430 2409070 ) ( 938630 * )
+ NEW met2 ( 938630 82800 ) ( 941390 * )
+ NEW met2 ( 941390 15980 ) ( * 82800 )
+ NEW met2 ( 938630 82800 ) ( * 2409070 )
+ NEW met2 ( 607430 2408900 ) M2M3_PR_M
+ NEW met1 ( 607430 2409070 ) M1M2_PR
+ NEW met1 ( 938630 2409070 ) M1M2_PR ;
- la_oenb[18] ( PIN la_oenb[18] ) ( chip_controller la_oenb[18] ) + USE SIGNAL
- + ROUTED met3 ( 599380 1928820 0 ) ( 608350 * )
- NEW met2 ( 608350 1925250 ) ( * 1928820 )
+ + ROUTED met2 ( 378810 2276470 ) ( * 2285650 )
NEW met2 ( 959330 82800 ) ( 960250 * )
NEW met2 ( 960250 2380 0 ) ( * 82800 )
- NEW met2 ( 959330 82800 ) ( * 1925250 )
- NEW met1 ( 608350 1925250 ) ( 959330 * )
- NEW met2 ( 608350 1928820 ) M2M3_PR_M
- NEW met1 ( 608350 1925250 ) M1M2_PR
- NEW met1 ( 959330 1925250 ) M1M2_PR ;
+ NEW met2 ( 959330 82800 ) ( * 2276470 )
+ NEW met1 ( 353970 2285310 ) ( * 2285650 )
+ NEW met1 ( 335110 2285310 ) ( 353970 * )
+ NEW met2 ( 335110 2285310 ) ( * 2300100 0 )
+ NEW met1 ( 353970 2285650 ) ( 378810 * )
+ NEW met1 ( 378810 2276470 ) ( 959330 * )
+ NEW met1 ( 378810 2285650 ) M1M2_PR
+ NEW met1 ( 378810 2276470 ) M1M2_PR
+ NEW met1 ( 959330 2276470 ) M1M2_PR
+ NEW met1 ( 335110 2285310 ) M1M2_PR ;
- la_oenb[19] ( PIN la_oenb[19] ) ( chip_controller la_oenb[19] ) + USE SIGNAL
- + ROUTED met3 ( 599380 1934940 0 ) ( 607430 * )
- NEW met2 ( 607430 1932050 ) ( * 1934940 )
+ + ROUTED met3 ( 599380 2421140 ) ( * 2421820 0 )
+ NEW met3 ( 599380 2421140 ) ( 606970 * )
+ NEW met2 ( 606970 2415530 ) ( * 2421140 )
NEW met2 ( 978190 2380 0 ) ( * 3060 )
NEW met2 ( 977270 3060 ) ( 978190 * )
NEW met2 ( 977270 2380 ) ( * 3060 )
NEW met2 ( 975890 2380 ) ( 977270 * )
NEW met2 ( 973130 82800 ) ( 975890 * )
NEW met2 ( 975890 2380 ) ( * 82800 )
- NEW met2 ( 973130 82800 ) ( * 1932050 )
- NEW met1 ( 607430 1932050 ) ( 973130 * )
- NEW met2 ( 607430 1934940 ) M2M3_PR_M
- NEW met1 ( 607430 1932050 ) M1M2_PR
- NEW met1 ( 973130 1932050 ) M1M2_PR ;
+ NEW met2 ( 973130 82800 ) ( * 2415530 )
+ NEW met1 ( 606970 2415530 ) ( 973130 * )
+ NEW met2 ( 606970 2421140 ) M2M3_PR_M
+ NEW met1 ( 606970 2415530 ) M1M2_PR
+ NEW met1 ( 973130 2415530 ) M1M2_PR ;
- la_oenb[1] ( PIN la_oenb[1] ) ( chip_controller la_oenb[1] ) + USE SIGNAL
- + ROUTED met2 ( 211830 2199460 0 ) ( * 2203710 )
- NEW met2 ( 658950 2380 0 ) ( * 17510 )
- NEW met1 ( 652050 17510 ) ( 658950 * )
- NEW met1 ( 211830 2203710 ) ( 652050 * )
- NEW met2 ( 652050 17510 ) ( * 2203710 )
- NEW met1 ( 211830 2203710 ) M1M2_PR
- NEW met1 ( 658950 17510 ) M1M2_PR
- NEW met1 ( 652050 17510 ) M1M2_PR
- NEW met1 ( 652050 2203710 ) M1M2_PR ;
+ + ROUTED met2 ( 212750 2699260 0 ) ( 213670 * )
+ NEW met2 ( 213670 2699260 ) ( * 2714730 )
+ NEW met2 ( 491510 2700110 ) ( * 2714730 )
+ NEW met1 ( 213670 2714730 ) ( 491510 * )
+ NEW li1 ( 542110 2700110 ) ( * 2703510 )
+ NEW met1 ( 491510 2700110 ) ( 542110 * )
+ NEW met2 ( 658950 2380 0 ) ( * 3060 )
+ NEW met2 ( 658030 3060 ) ( 658950 * )
+ NEW met2 ( 658030 2380 ) ( * 3060 )
+ NEW met2 ( 656650 2380 ) ( 658030 * )
+ NEW met2 ( 655730 82800 ) ( 656650 * )
+ NEW met2 ( 656650 2380 ) ( * 82800 )
+ NEW met2 ( 655730 82800 ) ( * 2703510 )
+ NEW met1 ( 542110 2703510 ) ( 655730 * )
+ NEW met1 ( 213670 2714730 ) M1M2_PR
+ NEW met1 ( 491510 2714730 ) M1M2_PR
+ NEW met1 ( 491510 2700110 ) M1M2_PR
+ NEW li1 ( 542110 2700110 ) L1M1_PR_MR
+ NEW li1 ( 542110 2703510 ) L1M1_PR_MR
+ NEW met1 ( 655730 2703510 ) M1M2_PR ;
- la_oenb[20] ( PIN la_oenb[20] ) ( chip_controller la_oenb[20] ) + USE SIGNAL
- + ROUTED met3 ( 599380 1941060 0 ) ( 607430 * )
- NEW met2 ( 607430 1939190 ) ( * 1941060 )
+ + ROUTED met3 ( 599380 2426580 0 ) ( 607430 * )
+ NEW met2 ( 607430 2423690 ) ( * 2426580 )
NEW met2 ( 995670 2380 0 ) ( * 3060 )
NEW met2 ( 994750 3060 ) ( 995670 * )
NEW met2 ( 994750 2380 ) ( * 3060 )
NEW met2 ( 993830 2380 ) ( 994750 * )
- NEW met2 ( 993830 2380 ) ( * 1939190 )
- NEW met1 ( 607430 1939190 ) ( 993830 * )
- NEW met2 ( 607430 1941060 ) M2M3_PR_M
- NEW met1 ( 607430 1939190 ) M1M2_PR
- NEW met1 ( 993830 1939190 ) M1M2_PR ;
+ NEW met2 ( 993830 2380 ) ( * 2422330 )
+ NEW met1 ( 607430 2423690 ) ( 614100 * )
+ NEW met1 ( 614100 2422330 ) ( * 2423690 )
+ NEW met1 ( 614100 2422330 ) ( 993830 * )
+ NEW met2 ( 607430 2426580 ) M2M3_PR_M
+ NEW met1 ( 607430 2423690 ) M1M2_PR
+ NEW met1 ( 993830 2422330 ) M1M2_PR ;
- la_oenb[21] ( PIN la_oenb[21] ) ( chip_controller la_oenb[21] ) + USE SIGNAL
- + ROUTED met2 ( 188370 1945990 ) ( * 1946500 )
- NEW met3 ( 188370 1946500 ) ( 200100 * 0 )
- NEW met1 ( 172270 1945990 ) ( 188370 * )
- NEW met2 ( 1008090 82800 ) ( 1013610 * )
- NEW met2 ( 1013610 2380 0 ) ( * 82800 )
- NEW met1 ( 172270 1790610 ) ( 1008090 * )
- NEW met2 ( 1008090 82800 ) ( * 1790610 )
- NEW met2 ( 172270 1790610 ) ( * 1945990 )
- NEW met1 ( 188370 1945990 ) M1M2_PR
- NEW met2 ( 188370 1946500 ) M2M3_PR_M
- NEW met1 ( 172270 1945990 ) M1M2_PR
- NEW met1 ( 172270 1790610 ) M1M2_PR
- NEW met1 ( 1008090 1790610 ) M1M2_PR ;
+ + ROUTED met2 ( 1013610 2380 0 ) ( * 15980 )
+ NEW met2 ( 1010390 15980 ) ( 1013610 * )
+ NEW met2 ( 353510 2275790 ) ( * 2300100 0 )
+ NEW met2 ( 1008090 82800 ) ( 1010390 * )
+ NEW met2 ( 1010390 15980 ) ( * 82800 )
+ NEW met1 ( 353510 2275790 ) ( 1008090 * )
+ NEW met2 ( 1008090 82800 ) ( * 2275790 )
+ NEW met1 ( 353510 2275790 ) M1M2_PR
+ NEW met1 ( 1008090 2275790 ) M1M2_PR ;
- la_oenb[22] ( PIN la_oenb[22] ) ( chip_controller la_oenb[22] ) + USE SIGNAL
- + ROUTED met2 ( 344310 59330 ) ( * 1800300 0 )
- NEW met1 ( 344310 59330 ) ( 1031090 * )
- NEW met2 ( 1031090 2380 0 ) ( * 59330 )
- NEW met1 ( 344310 59330 ) M1M2_PR
- NEW met1 ( 1031090 59330 ) M1M2_PR ;
+ + ROUTED met2 ( 1028330 82800 ) ( 1031090 * )
+ NEW met2 ( 1031090 2380 0 ) ( * 82800 )
+ NEW met2 ( 1028330 82800 ) ( * 2429470 )
+ NEW met3 ( 599380 2432700 0 ) ( 607430 * )
+ NEW met2 ( 607430 2429470 ) ( * 2432700 )
+ NEW met1 ( 607430 2429470 ) ( 1028330 * )
+ NEW met1 ( 1028330 2429470 ) M1M2_PR
+ NEW met2 ( 607430 2432700 ) M2M3_PR_M
+ NEW met1 ( 607430 2429470 ) M1M2_PR ;
- la_oenb[23] ( PIN la_oenb[23] ) ( chip_controller la_oenb[23] ) + USE SIGNAL
+ ROUTED met2 ( 1049030 2380 0 ) ( * 34500 )
- NEW met2 ( 1049490 34500 ) ( * 61030 )
NEW met2 ( 1049030 34500 ) ( 1049490 * )
- NEW met1 ( 346610 1787210 ) ( 351210 * )
- NEW met2 ( 346610 1787210 ) ( * 1800300 0 )
- NEW met2 ( 351210 61030 ) ( * 1787210 )
- NEW met1 ( 351210 61030 ) ( 1049490 * )
- NEW met1 ( 1049490 61030 ) M1M2_PR
- NEW met1 ( 351210 61030 ) M1M2_PR
- NEW met1 ( 351210 1787210 ) M1M2_PR
- NEW met1 ( 346610 1787210 ) M1M2_PR ;
+ NEW met2 ( 1049490 34500 ) ( * 2436270 )
+ NEW met3 ( 599380 2440860 0 ) ( 607430 * )
+ NEW met2 ( 607430 2436270 ) ( * 2440860 )
+ NEW met1 ( 607430 2436270 ) ( 1049490 * )
+ NEW met1 ( 1049490 2436270 ) M1M2_PR
+ NEW met2 ( 607430 2440860 ) M2M3_PR_M
+ NEW met1 ( 607430 2436270 ) M1M2_PR ;
- la_oenb[24] ( PIN la_oenb[24] ) ( chip_controller la_oenb[24] ) + USE SIGNAL
- + ROUTED met2 ( 1066970 2380 0 ) ( * 17340 )
- NEW met2 ( 1065590 17340 ) ( 1066970 * )
+ + ROUTED met2 ( 1066970 2380 0 ) ( * 15300 )
+ NEW met2 ( 1065590 15300 ) ( 1066970 * )
+ NEW met3 ( 183310 2451740 ) ( 200100 * )
+ NEW met3 ( 200100 2451060 0 ) ( * 2451740 )
NEW met2 ( 1062830 82800 ) ( 1065590 * )
- NEW met2 ( 1065590 17340 ) ( * 82800 )
- NEW met2 ( 1062830 82800 ) ( * 1959930 )
- NEW met3 ( 599380 1964860 0 ) ( 613410 * )
- NEW met2 ( 613410 1959930 ) ( * 1964860 )
- NEW met1 ( 613410 1959930 ) ( 1062830 * )
- NEW met1 ( 1062830 1959930 ) M1M2_PR
- NEW met2 ( 613410 1964860 ) M2M3_PR_M
- NEW met1 ( 613410 1959930 ) M1M2_PR ;
+ NEW met2 ( 1065590 15300 ) ( * 82800 )
+ NEW met2 ( 1062830 82800 ) ( * 2274430 )
+ NEW met1 ( 179630 2274430 ) ( 1062830 * )
+ NEW met1 ( 179630 2308090 ) ( 183310 * )
+ NEW met2 ( 179630 2274430 ) ( * 2308090 )
+ NEW met2 ( 183310 2308090 ) ( * 2451740 )
+ NEW met1 ( 179630 2274430 ) M1M2_PR
+ NEW met2 ( 183310 2451740 ) M2M3_PR_M
+ NEW met1 ( 1062830 2274430 ) M1M2_PR
+ NEW met1 ( 179630 2308090 ) M1M2_PR
+ NEW met1 ( 183310 2308090 ) M1M2_PR ;
- la_oenb[25] ( PIN la_oenb[25] ) ( chip_controller la_oenb[25] ) + USE SIGNAL
+ ROUTED met2 ( 1083530 82800 ) ( 1084450 * )
NEW met2 ( 1084450 2380 0 ) ( * 82800 )
- NEW met2 ( 1083530 82800 ) ( * 2217990 )
- NEW met1 ( 361790 2217990 ) ( 1083530 * )
- NEW met2 ( 361790 2199460 0 ) ( * 2217990 )
- NEW met1 ( 1083530 2217990 ) M1M2_PR
- NEW met1 ( 361790 2217990 ) M1M2_PR ;
+ NEW met2 ( 1083530 82800 ) ( * 2449870 )
+ NEW met3 ( 599380 2449700 0 ) ( 608350 * )
+ NEW met2 ( 608350 2449700 ) ( * 2449870 )
+ NEW met1 ( 608350 2449870 ) ( 1083530 * )
+ NEW met1 ( 1083530 2449870 ) M1M2_PR
+ NEW met2 ( 608350 2449700 ) M2M3_PR_M
+ NEW met1 ( 608350 2449870 ) M1M2_PR ;
- la_oenb[26] ( PIN la_oenb[26] ) ( chip_controller la_oenb[26] ) + USE SIGNAL
- + ROUTED met2 ( 1102390 2380 0 ) ( * 3060 )
+ + ROUTED met2 ( 190210 2464490 ) ( * 2468060 )
+ NEW met3 ( 190210 2468060 ) ( 200100 * )
+ NEW met3 ( 200100 2467380 0 ) ( * 2468060 )
+ NEW met2 ( 1102390 2380 0 ) ( * 3060 )
NEW met2 ( 1101470 3060 ) ( 1102390 * )
NEW met2 ( 1101470 2380 ) ( * 3060 )
NEW met2 ( 1100090 2380 ) ( 1101470 * )
+ NEW met2 ( 147430 2274090 ) ( * 2464490 )
+ NEW met1 ( 147430 2464490 ) ( 190210 * )
NEW met2 ( 1097330 82800 ) ( 1100090 * )
NEW met2 ( 1100090 2380 ) ( * 82800 )
- NEW met2 ( 1097330 82800 ) ( * 1973870 )
- NEW met3 ( 599380 1975740 0 ) ( 609730 * )
- NEW met2 ( 609730 1973870 ) ( * 1975740 )
- NEW met1 ( 609730 1973870 ) ( 1097330 * )
- NEW met1 ( 1097330 1973870 ) M1M2_PR
- NEW met2 ( 609730 1975740 ) M2M3_PR_M
- NEW met1 ( 609730 1973870 ) M1M2_PR ;
+ NEW met1 ( 147430 2274090 ) ( 1097330 * )
+ NEW met2 ( 1097330 82800 ) ( * 2274090 )
+ NEW met1 ( 190210 2464490 ) M1M2_PR
+ NEW met2 ( 190210 2468060 ) M2M3_PR_M
+ NEW met1 ( 147430 2274090 ) M1M2_PR
+ NEW met1 ( 147430 2464490 ) M1M2_PR
+ NEW met1 ( 1097330 2274090 ) M1M2_PR ;
- la_oenb[27] ( PIN la_oenb[27] ) ( chip_controller la_oenb[27] ) + USE SIGNAL
+ ROUTED met2 ( 1119870 2380 0 ) ( * 3060 )
NEW met2 ( 1118950 3060 ) ( 1119870 * )
NEW met2 ( 1118950 2380 ) ( * 3060 )
NEW met2 ( 1118030 2380 ) ( 1118950 * )
- NEW met1 ( 360870 1787210 ) ( 365470 * )
- NEW met2 ( 360870 1787210 ) ( * 1800300 0 )
- NEW met2 ( 365470 60690 ) ( * 1787210 )
- NEW met1 ( 365470 60690 ) ( 1118030 * )
- NEW met2 ( 1118030 2380 ) ( * 60690 )
- NEW met1 ( 365470 60690 ) M1M2_PR
- NEW met1 ( 365470 1787210 ) M1M2_PR
- NEW met1 ( 360870 1787210 ) M1M2_PR
- NEW met1 ( 1118030 60690 ) M1M2_PR ;
+ NEW met2 ( 1118030 2380 ) ( * 2457690 )
+ NEW met3 ( 599380 2459220 0 ) ( 607430 * )
+ NEW met2 ( 607430 2457690 ) ( * 2459220 )
+ NEW met1 ( 607430 2457690 ) ( 1118030 * )
+ NEW met1 ( 1118030 2457690 ) M1M2_PR
+ NEW met2 ( 607430 2459220 ) M2M3_PR_M
+ NEW met1 ( 607430 2457690 ) M1M2_PR ;
- la_oenb[28] ( PIN la_oenb[28] ) ( chip_controller la_oenb[28] ) + USE SIGNAL
- + ROUTED met2 ( 188370 1966500 ) ( 188830 * )
- NEW met2 ( 188370 1966500 ) ( * 1982540 )
- NEW met3 ( 188370 1982540 ) ( 200100 * 0 )
+ + ROUTED li1 ( 402270 2285310 ) ( * 2286330 )
+ NEW met1 ( 383870 2286330 ) ( 402270 * )
+ NEW met2 ( 383870 2286330 ) ( * 2300100 0 )
+ NEW met1 ( 445050 2285310 ) ( * 2285650 )
+ NEW met1 ( 445050 2285650 ) ( 448730 * )
+ NEW met2 ( 448730 2275450 ) ( * 2285650 )
+ NEW met1 ( 402270 2285310 ) ( 445050 * )
NEW met2 ( 1132290 82800 ) ( 1137810 * )
NEW met2 ( 1137810 2380 0 ) ( * 82800 )
- NEW met3 ( 189290 1790780 ) ( 1132290 * )
- NEW met2 ( 1132290 82800 ) ( * 1790780 )
- NEW met2 ( 188830 1827500 ) ( 189290 * )
- NEW met2 ( 188830 1827500 ) ( * 1966500 )
- NEW met2 ( 189290 1790780 ) ( * 1827500 )
- NEW met2 ( 189290 1790780 ) M2M3_PR_M
- NEW met2 ( 188370 1982540 ) M2M3_PR_M
- NEW met2 ( 1132290 1790780 ) M2M3_PR_M ;
+ NEW met1 ( 448730 2275450 ) ( 1132290 * )
+ NEW met2 ( 1132290 82800 ) ( * 2275450 )
+ NEW li1 ( 402270 2285310 ) L1M1_PR_MR
+ NEW li1 ( 402270 2286330 ) L1M1_PR_MR
+ NEW met1 ( 383870 2286330 ) M1M2_PR
+ NEW met1 ( 448730 2285650 ) M1M2_PR
+ NEW met1 ( 448730 2275450 ) M1M2_PR
+ NEW met1 ( 1132290 2275450 ) M1M2_PR ;
- la_oenb[29] ( PIN la_oenb[29] ) ( chip_controller la_oenb[29] ) + USE SIGNAL
- + ROUTED met2 ( 187910 1987810 ) ( * 1991380 )
- NEW met3 ( 187910 1991380 ) ( 200100 * 0 )
+ + ROUTED met2 ( 187910 2484890 ) ( * 2487100 )
+ NEW met3 ( 187910 2487100 ) ( 201020 * )
+ NEW met3 ( 201020 2487100 ) ( * 2487780 0 )
NEW met2 ( 1152530 82800 ) ( 1155290 * )
NEW met2 ( 1155290 2380 0 ) ( * 82800 )
- NEW met2 ( 1152530 82800 ) ( * 1782450 )
- NEW met2 ( 156170 1782450 ) ( * 1987810 )
- NEW met1 ( 156170 1987810 ) ( 187910 * )
- NEW met1 ( 156170 1782450 ) ( 1152530 * )
- NEW met1 ( 187910 1987810 ) M1M2_PR
- NEW met2 ( 187910 1991380 ) M2M3_PR_M
- NEW met1 ( 1152530 1782450 ) M1M2_PR
- NEW met1 ( 156170 1782450 ) M1M2_PR
- NEW met1 ( 156170 1987810 ) M1M2_PR ;
+ NEW met2 ( 1152530 82800 ) ( * 2294830 )
+ NEW met2 ( 155710 2294830 ) ( * 2484890 )
+ NEW met1 ( 155710 2484890 ) ( 187910 * )
+ NEW met1 ( 155710 2294830 ) ( 1152530 * )
+ NEW met1 ( 187910 2484890 ) M1M2_PR
+ NEW met2 ( 187910 2487100 ) M2M3_PR_M
+ NEW met1 ( 1152530 2294830 ) M1M2_PR
+ NEW met1 ( 155710 2294830 ) M1M2_PR
+ NEW met1 ( 155710 2484890 ) M1M2_PR ;
- la_oenb[2] ( PIN la_oenb[2] ) ( chip_controller la_oenb[2] ) + USE SIGNAL
- + ROUTED met2 ( 676430 2380 0 ) ( * 17850 )
- NEW met1 ( 672750 17850 ) ( 676430 * )
- NEW met2 ( 216890 2199460 0 ) ( * 2219350 )
- NEW met2 ( 672750 17850 ) ( * 2219350 )
- NEW met1 ( 216890 2219350 ) ( 672750 * )
- NEW met1 ( 216890 2219350 ) M1M2_PR
- NEW met1 ( 676430 17850 ) M1M2_PR
- NEW met1 ( 672750 17850 ) M1M2_PR
- NEW met1 ( 672750 2219350 ) M1M2_PR ;
+ + ROUTED met2 ( 676430 2380 0 ) ( * 23290 )
+ NEW met1 ( 272550 23290 ) ( 676430 * )
+ NEW met1 ( 232530 2284970 ) ( 272550 * )
+ NEW met2 ( 232530 2284970 ) ( * 2300100 0 )
+ NEW met2 ( 272550 23290 ) ( * 2284970 )
+ NEW met1 ( 676430 23290 ) M1M2_PR
+ NEW met1 ( 272550 23290 ) M1M2_PR
+ NEW met1 ( 272550 2284970 ) M1M2_PR
+ NEW met1 ( 232530 2284970 ) M1M2_PR ;
- la_oenb[30] ( PIN la_oenb[30] ) ( chip_controller la_oenb[30] ) + USE SIGNAL
- + ROUTED met2 ( 1173230 2380 0 ) ( * 20910 )
- NEW met1 ( 1169550 20910 ) ( 1173230 * )
- NEW met3 ( 599380 1996820 0 ) ( 607890 * )
- NEW met2 ( 607890 1994270 ) ( * 1996820 )
- NEW met2 ( 1169550 20910 ) ( * 1994270 )
- NEW met1 ( 607890 1994270 ) ( 1169550 * )
- NEW met1 ( 1173230 20910 ) M1M2_PR
- NEW met1 ( 1169550 20910 ) M1M2_PR
- NEW met2 ( 607890 1996820 ) M2M3_PR_M
- NEW met1 ( 607890 1994270 ) M1M2_PR
- NEW met1 ( 1169550 1994270 ) M1M2_PR ;
+ + ROUTED met2 ( 1173230 2380 0 ) ( * 2470270 )
+ NEW met3 ( 599380 2473500 0 ) ( 608350 * )
+ NEW met2 ( 608350 2470270 ) ( * 2473500 )
+ NEW met1 ( 608350 2470270 ) ( 1173230 * )
+ NEW met1 ( 1173230 2470270 ) M1M2_PR
+ NEW met2 ( 608350 2473500 ) M2M3_PR_M
+ NEW met1 ( 608350 2470270 ) M1M2_PR ;
- la_oenb[31] ( PIN la_oenb[31] ) ( chip_controller la_oenb[31] ) + USE SIGNAL
+ ROUTED met2 ( 1190710 2380 0 ) ( * 3060 )
NEW met2 ( 1189790 3060 ) ( 1190710 * )
NEW met2 ( 1189790 2380 ) ( * 3060 )
NEW met2 ( 1188410 2380 ) ( 1189790 * )
- NEW met2 ( 188370 2001410 ) ( * 2004980 )
- NEW met3 ( 188370 2004980 ) ( 200100 * 0 )
+ NEW met3 ( 599380 2483020 0 ) ( 606970 * )
+ NEW met2 ( 606970 2480980 ) ( * 2483020 )
+ NEW met2 ( 606970 2480980 ) ( 607430 * )
+ NEW met2 ( 607430 2479110 ) ( * 2480980 )
+ NEW met1 ( 607430 2479110 ) ( 608350 * )
+ NEW met2 ( 608350 2477410 ) ( * 2479110 )
NEW met2 ( 1187030 82800 ) ( 1188410 * )
NEW met2 ( 1188410 2380 ) ( * 82800 )
- NEW met2 ( 1187030 82800 ) ( * 1769530 )
- NEW met1 ( 147430 1769530 ) ( 1187030 * )
- NEW met2 ( 147430 1769530 ) ( * 2001410 )
- NEW met1 ( 147430 2001410 ) ( 188370 * )
- NEW met1 ( 1187030 1769530 ) M1M2_PR
- NEW met1 ( 188370 2001410 ) M1M2_PR
- NEW met2 ( 188370 2004980 ) M2M3_PR_M
- NEW met1 ( 147430 1769530 ) M1M2_PR
- NEW met1 ( 147430 2001410 ) M1M2_PR ;
+ NEW met2 ( 1187030 82800 ) ( * 2477410 )
+ NEW met1 ( 608350 2477410 ) ( 1187030 * )
+ NEW met2 ( 606970 2483020 ) M2M3_PR_M
+ NEW met1 ( 607430 2479110 ) M1M2_PR
+ NEW met1 ( 608350 2479110 ) M1M2_PR
+ NEW met1 ( 608350 2477410 ) M1M2_PR
+ NEW met1 ( 1187030 2477410 ) M1M2_PR ;
- la_oenb[32] ( PIN la_oenb[32] ) ( chip_controller la_oenb[32] ) + USE SIGNAL
- + ROUTED met2 ( 188370 2008210 ) ( * 2009740 )
- NEW met3 ( 188370 2009740 ) ( 200100 * 0 )
- NEW met1 ( 174570 2008210 ) ( 188370 * )
+ + ROUTED met3 ( 599380 2487780 0 ) ( 608350 * )
+ NEW met2 ( 608350 2484550 ) ( * 2487780 )
NEW met2 ( 1207730 82800 ) ( 1208650 * )
NEW met2 ( 1208650 2380 0 ) ( * 82800 )
- NEW met1 ( 174570 1799110 ) ( 1207730 * )
- NEW met2 ( 1207730 82800 ) ( * 1799110 )
- NEW met2 ( 174570 1799110 ) ( * 2008210 )
- NEW met1 ( 188370 2008210 ) M1M2_PR
- NEW met2 ( 188370 2009740 ) M2M3_PR_M
- NEW met1 ( 174570 1799110 ) M1M2_PR
- NEW met1 ( 174570 2008210 ) M1M2_PR
- NEW met1 ( 1207730 1799110 ) M1M2_PR ;
+ NEW met1 ( 608350 2484550 ) ( 1207730 * )
+ NEW met2 ( 1207730 82800 ) ( * 2484550 )
+ NEW met2 ( 608350 2487780 ) M2M3_PR_M
+ NEW met1 ( 608350 2484550 ) M1M2_PR
+ NEW met1 ( 1207730 2484550 ) M1M2_PR ;
- la_oenb[33] ( PIN la_oenb[33] ) ( chip_controller la_oenb[33] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2005660 0 ) ( 607890 * )
- NEW met2 ( 607890 2001410 ) ( * 2005660 )
- NEW met2 ( 776710 54570 ) ( * 2001410 )
- NEW met2 ( 1226130 2380 0 ) ( * 17340 )
- NEW met2 ( 1224290 17340 ) ( 1226130 * )
- NEW met1 ( 607890 2001410 ) ( 776710 * )
- NEW met1 ( 776710 54570 ) ( 1224290 * )
- NEW met2 ( 1224290 17340 ) ( * 54570 )
- NEW met2 ( 607890 2005660 ) M2M3_PR_M
- NEW met1 ( 607890 2001410 ) M1M2_PR
- NEW met1 ( 776710 54570 ) M1M2_PR
- NEW met1 ( 776710 2001410 ) M1M2_PR
- NEW met1 ( 1224290 54570 ) M1M2_PR ;
+ + ROUTED met2 ( 400430 2699940 ) ( 400890 * 0 )
+ NEW met2 ( 400430 2699940 ) ( * 2742610 )
+ NEW met2 ( 1226130 2380 0 ) ( * 15980 )
+ NEW met2 ( 1224290 15980 ) ( 1226130 * )
+ NEW met2 ( 1221530 82800 ) ( 1224290 * )
+ NEW met2 ( 1224290 15980 ) ( * 82800 )
+ NEW met1 ( 400430 2742610 ) ( 1221530 * )
+ NEW met2 ( 1221530 82800 ) ( * 2742610 )
+ NEW met1 ( 400430 2742610 ) M1M2_PR
+ NEW met1 ( 1221530 2742610 ) M1M2_PR ;
- la_oenb[34] ( PIN la_oenb[34] ) ( chip_controller la_oenb[34] ) + USE SIGNAL
- + ROUTED met2 ( 1244070 2380 0 ) ( * 3060 )
+ + ROUTED met2 ( 189750 2498830 ) ( * 2499340 )
+ NEW met3 ( 189750 2499340 ) ( 200100 * )
+ NEW met3 ( 200100 2498660 0 ) ( * 2499340 )
+ NEW met2 ( 1244070 2380 0 ) ( * 3060 )
NEW met2 ( 1243150 3060 ) ( 1244070 * )
NEW met2 ( 1243150 2380 ) ( * 3060 )
NEW met2 ( 1242230 2380 ) ( 1243150 * )
- NEW met3 ( 599380 2010420 0 ) ( 607890 * )
- NEW met2 ( 607890 2009230 ) ( * 2010420 )
- NEW met2 ( 1242230 2380 ) ( * 54910 )
- NEW met1 ( 1225210 54910 ) ( 1242230 * )
- NEW met1 ( 607890 2009230 ) ( 1225210 * )
- NEW met2 ( 1225210 54910 ) ( * 2009230 )
- NEW met2 ( 607890 2010420 ) M2M3_PR_M
- NEW met1 ( 607890 2009230 ) M1M2_PR
- NEW met1 ( 1242230 54910 ) M1M2_PR
- NEW met1 ( 1225210 54910 ) M1M2_PR
- NEW met1 ( 1225210 2009230 ) M1M2_PR ;
+ NEW met2 ( 109250 210290 ) ( * 2498830 )
+ NEW met2 ( 1242230 2380 ) ( * 210290 )
+ NEW met1 ( 109250 2498830 ) ( 189750 * )
+ NEW met1 ( 109250 210290 ) ( 1242230 * )
+ NEW met1 ( 109250 210290 ) M1M2_PR
+ NEW met1 ( 109250 2498830 ) M1M2_PR
+ NEW met1 ( 189750 2498830 ) M1M2_PR
+ NEW met2 ( 189750 2499340 ) M2M3_PR_M
+ NEW met1 ( 1242230 210290 ) M1M2_PR ;
- la_oenb[35] ( PIN la_oenb[35] ) ( chip_controller la_oenb[35] ) + USE SIGNAL
- + ROUTED met2 ( 1262010 2380 0 ) ( * 16830 )
- NEW met1 ( 1245450 16830 ) ( 1262010 * )
- NEW met2 ( 395830 2199460 0 ) ( * 2217310 )
- NEW met2 ( 1245450 16830 ) ( * 2217310 )
- NEW met1 ( 395830 2217310 ) ( 1245450 * )
- NEW met1 ( 395830 2217310 ) M1M2_PR
- NEW met1 ( 1262010 16830 ) M1M2_PR
- NEW met1 ( 1245450 16830 ) M1M2_PR
- NEW met1 ( 1245450 2217310 ) M1M2_PR ;
+ + ROUTED met2 ( 403650 2699940 ) ( 404110 * 0 )
+ NEW met2 ( 403650 2699940 ) ( * 2714390 )
+ NEW met1 ( 403650 2714390 ) ( 414230 * )
+ NEW met2 ( 414230 2714390 ) ( * 2721870 )
+ NEW met2 ( 1262010 2380 0 ) ( * 19890 )
+ NEW met1 ( 1256030 19890 ) ( 1262010 * )
+ NEW met2 ( 1256030 19890 ) ( * 2721870 )
+ NEW met1 ( 414230 2721870 ) ( 1256030 * )
+ NEW met1 ( 403650 2714390 ) M1M2_PR
+ NEW met1 ( 414230 2714390 ) M1M2_PR
+ NEW met1 ( 414230 2721870 ) M1M2_PR
+ NEW met1 ( 1262010 19890 ) M1M2_PR
+ NEW met1 ( 1256030 19890 ) M1M2_PR
+ NEW met1 ( 1256030 2721870 ) M1M2_PR ;
- la_oenb[36] ( PIN la_oenb[36] ) ( chip_controller la_oenb[36] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2015180 0 ) ( 607430 * )
- NEW met2 ( 607430 2015180 ) ( * 2015690 )
- NEW met2 ( 1279490 2380 0 ) ( * 20910 )
- NEW met1 ( 1259250 20910 ) ( 1279490 * )
- NEW met2 ( 1259250 20910 ) ( * 2015690 )
- NEW met1 ( 607430 2015690 ) ( 1259250 * )
- NEW met2 ( 607430 2015180 ) M2M3_PR_M
- NEW met1 ( 607430 2015690 ) M1M2_PR
- NEW met1 ( 1279490 20910 ) M1M2_PR
- NEW met1 ( 1259250 20910 ) M1M2_PR
- NEW met1 ( 1259250 2015690 ) M1M2_PR ;
+ + ROUTED met2 ( 409170 2699260 0 ) ( 410550 * )
+ NEW met2 ( 410550 2699260 ) ( * 2714050 )
+ NEW met2 ( 1276730 82800 ) ( 1279490 * )
+ NEW met2 ( 1279490 2380 0 ) ( * 82800 )
+ NEW met2 ( 1276730 82800 ) ( * 2720510 )
+ NEW met2 ( 434470 2714050 ) ( * 2720510 )
+ NEW met1 ( 410550 2714050 ) ( 434470 * )
+ NEW met1 ( 434470 2720510 ) ( 1276730 * )
+ NEW met1 ( 410550 2714050 ) M1M2_PR
+ NEW met1 ( 1276730 2720510 ) M1M2_PR
+ NEW met1 ( 434470 2714050 ) M1M2_PR
+ NEW met1 ( 434470 2720510 ) M1M2_PR ;
- la_oenb[37] ( PIN la_oenb[37] ) ( chip_controller la_oenb[37] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2016540 0 ) ( 607890 * )
- NEW met2 ( 607890 2015350 ) ( * 2016540 )
- NEW met2 ( 1280410 25330 ) ( * 2015350 )
- NEW met1 ( 607890 2015350 ) ( 1280410 * )
- NEW met2 ( 1297430 2380 0 ) ( * 25330 )
- NEW met1 ( 1280410 25330 ) ( 1297430 * )
- NEW met2 ( 607890 2016540 ) M2M3_PR_M
- NEW met1 ( 607890 2015350 ) M1M2_PR
- NEW met1 ( 1280410 25330 ) M1M2_PR
- NEW met1 ( 1280410 2015350 ) M1M2_PR
- NEW met1 ( 1297430 25330 ) M1M2_PR ;
+ + ROUTED met2 ( 419290 2287010 ) ( * 2300100 0 )
+ NEW met1 ( 419290 2287010 ) ( 935410 * )
+ NEW met2 ( 935410 43010 ) ( * 2287010 )
+ NEW met1 ( 935410 43010 ) ( 1297430 * )
+ NEW met2 ( 1297430 2380 0 ) ( * 43010 )
+ NEW met1 ( 419290 2287010 ) M1M2_PR
+ NEW met1 ( 935410 43010 ) M1M2_PR
+ NEW met1 ( 935410 2287010 ) M1M2_PR
+ NEW met1 ( 1297430 43010 ) M1M2_PR ;
- la_oenb[38] ( PIN la_oenb[38] ) ( chip_controller la_oenb[38] ) + USE SIGNAL
- + ROUTED met1 ( 405490 2212890 ) ( 414230 * )
- NEW met2 ( 414230 2212890 ) ( * 2216970 )
- NEW met2 ( 405490 2199460 0 ) ( * 2212890 )
+ + ROUTED met3 ( 599380 2497300 0 ) ( 608350 * )
+ NEW met2 ( 608350 2492710 ) ( * 2497300 )
+ NEW met1 ( 608350 2492710 ) ( 608810 * )
+ NEW li1 ( 608810 2491690 ) ( * 2492710 )
+ NEW met2 ( 1246830 180030 ) ( * 2491690 )
NEW met2 ( 1314910 2380 0 ) ( * 3060 )
NEW met2 ( 1313990 3060 ) ( 1314910 * )
NEW met2 ( 1313990 2380 ) ( * 3060 )
NEW met2 ( 1312610 2380 ) ( 1313990 * )
- NEW met1 ( 414230 2216970 ) ( 1311230 * )
+ NEW met1 ( 1246830 180030 ) ( 1311230 * )
+ NEW met1 ( 608810 2491690 ) ( 1246830 * )
NEW met2 ( 1311230 82800 ) ( 1312610 * )
NEW met2 ( 1312610 2380 ) ( * 82800 )
- NEW met2 ( 1311230 82800 ) ( * 2216970 )
- NEW met1 ( 405490 2212890 ) M1M2_PR
- NEW met1 ( 414230 2212890 ) M1M2_PR
- NEW met1 ( 414230 2216970 ) M1M2_PR
- NEW met1 ( 1311230 2216970 ) M1M2_PR ;
+ NEW met2 ( 1311230 82800 ) ( * 180030 )
+ NEW met1 ( 1246830 180030 ) M1M2_PR
+ NEW met2 ( 608350 2497300 ) M2M3_PR_M
+ NEW met1 ( 608350 2492710 ) M1M2_PR
+ NEW li1 ( 608810 2492710 ) L1M1_PR_MR
+ NEW li1 ( 608810 2491690 ) L1M1_PR_MR
+ NEW met1 ( 1246830 2491690 ) M1M2_PR
+ NEW met1 ( 1311230 180030 ) M1M2_PR ;
- la_oenb[39] ( PIN la_oenb[39] ) ( chip_controller la_oenb[39] ) + USE SIGNAL
- + ROUTED met2 ( 187910 2021810 ) ( * 2024020 )
- NEW met3 ( 187910 2024020 ) ( 200100 * 0 )
- NEW met1 ( 141910 2021810 ) ( 187910 * )
- NEW met1 ( 141910 1737230 ) ( 1331930 * )
- NEW met2 ( 141910 1737230 ) ( * 2021810 )
- NEW met2 ( 1331930 82800 ) ( 1332850 * )
- NEW met2 ( 1332850 2380 0 ) ( * 82800 )
- NEW met2 ( 1331930 82800 ) ( * 1737230 )
- NEW met1 ( 187910 2021810 ) M1M2_PR
- NEW met2 ( 187910 2024020 ) M2M3_PR_M
- NEW met1 ( 141910 1737230 ) M1M2_PR
- NEW met1 ( 141910 2021810 ) M1M2_PR
- NEW met1 ( 1331930 1737230 ) M1M2_PR ;
+ + ROUTED met2 ( 417910 2699260 0 ) ( 419290 * )
+ NEW met2 ( 419290 2699260 ) ( * 2719490 )
+ NEW met2 ( 1332850 2380 0 ) ( * 16490 )
+ NEW met1 ( 1302490 16490 ) ( 1332850 * )
+ NEW met1 ( 419290 2719490 ) ( 1302490 * )
+ NEW met2 ( 1302490 16490 ) ( * 2719490 )
+ NEW met1 ( 419290 2719490 ) M1M2_PR
+ NEW met1 ( 1332850 16490 ) M1M2_PR
+ NEW met1 ( 1302490 16490 ) M1M2_PR
+ NEW met1 ( 1302490 2719490 ) M1M2_PR ;
- la_oenb[3] ( PIN la_oenb[3] ) ( chip_controller la_oenb[3] ) + USE SIGNAL
- + ROUTED met2 ( 223330 2199460 0 ) ( * 2209490 )
- NEW met2 ( 503470 2200990 ) ( * 2209490 )
- NEW met2 ( 690230 82800 ) ( 694370 * )
+ + ROUTED met2 ( 690230 82800 ) ( 694370 * )
NEW met2 ( 694370 2380 0 ) ( * 82800 )
- NEW met2 ( 690230 82800 ) ( * 2200990 )
- NEW met1 ( 223330 2209490 ) ( 503470 * )
- NEW met1 ( 503470 2200990 ) ( 690230 * )
- NEW met1 ( 223330 2209490 ) M1M2_PR
- NEW met1 ( 503470 2209490 ) M1M2_PR
- NEW met1 ( 503470 2200990 ) M1M2_PR
- NEW met1 ( 690230 2200990 ) M1M2_PR ;
+ NEW met2 ( 690230 82800 ) ( * 2276810 )
+ NEW met1 ( 171350 2276810 ) ( 690230 * )
+ NEW met1 ( 171350 2325430 ) ( 186530 * )
+ NEW met2 ( 186530 2325430 ) ( * 2326620 )
+ NEW met3 ( 186530 2326620 ) ( 200100 * )
+ NEW met3 ( 200100 2325940 0 ) ( * 2326620 )
+ NEW met2 ( 171350 2276810 ) ( * 2325430 )
+ NEW met1 ( 690230 2276810 ) M1M2_PR
+ NEW met1 ( 171350 2276810 ) M1M2_PR
+ NEW met1 ( 171350 2325430 ) M1M2_PR
+ NEW met1 ( 186530 2325430 ) M1M2_PR
+ NEW met2 ( 186530 2326620 ) M2M3_PR_M ;
- la_oenb[40] ( PIN la_oenb[40] ) ( chip_controller la_oenb[40] ) + USE SIGNAL
- + ROUTED met2 ( 1350330 2380 0 ) ( * 17340 )
- NEW met2 ( 1348490 17340 ) ( 1350330 * )
- NEW met2 ( 414690 1788570 ) ( * 1788740 )
- NEW met1 ( 399050 1788570 ) ( 414690 * )
- NEW met2 ( 399050 1788570 ) ( * 1800300 0 )
- NEW met2 ( 1348490 17340 ) ( * 53550 )
- NEW met2 ( 439070 1788740 ) ( * 1789250 )
- NEW met1 ( 439070 1789250 ) ( 462530 * )
- NEW met2 ( 462530 1787210 ) ( * 1789250 )
- NEW met1 ( 462530 1787210 ) ( 465750 * )
- NEW met3 ( 414690 1788740 ) ( 439070 * )
- NEW met2 ( 465750 53550 ) ( * 1787210 )
- NEW met1 ( 465750 53550 ) ( 1348490 * )
- NEW met2 ( 414690 1788740 ) M2M3_PR_M
- NEW met1 ( 414690 1788570 ) M1M2_PR
- NEW met1 ( 399050 1788570 ) M1M2_PR
- NEW met1 ( 1348490 53550 ) M1M2_PR
- NEW met1 ( 465750 53550 ) M1M2_PR
- NEW met2 ( 439070 1788740 ) M2M3_PR_M
- NEW met1 ( 439070 1789250 ) M1M2_PR
- NEW met1 ( 462530 1789250 ) M1M2_PR
- NEW met1 ( 462530 1787210 ) M1M2_PR
- NEW met1 ( 465750 1787210 ) M1M2_PR ;
+ + ROUTED met2 ( 189750 2505630 ) ( * 2508180 )
+ NEW met3 ( 189750 2508180 ) ( 200100 * )
+ NEW met3 ( 200100 2507500 0 ) ( * 2508180 )
+ NEW met2 ( 122590 156910 ) ( * 2505630 )
+ NEW met2 ( 1345730 82800 ) ( 1350330 * )
+ NEW met2 ( 1350330 2380 0 ) ( * 82800 )
+ NEW met2 ( 1345730 82800 ) ( * 156910 )
+ NEW met1 ( 122590 2505630 ) ( 189750 * )
+ NEW met1 ( 122590 156910 ) ( 1345730 * )
+ NEW met1 ( 122590 2505630 ) M1M2_PR
+ NEW met1 ( 189750 2505630 ) M1M2_PR
+ NEW met2 ( 189750 2508180 ) M2M3_PR_M
+ NEW met1 ( 122590 156910 ) M1M2_PR
+ NEW met1 ( 1345730 156910 ) M1M2_PR ;
- la_oenb[41] ( PIN la_oenb[41] ) ( chip_controller la_oenb[41] ) + USE SIGNAL
+ ROUTED met2 ( 1368270 2380 0 ) ( * 3060 )
NEW met2 ( 1367350 3060 ) ( 1368270 * )
NEW met2 ( 1367350 2380 ) ( * 3060 )
NEW met2 ( 1366430 2380 ) ( 1367350 * )
- NEW met2 ( 411930 2199460 0 ) ( * 2212550 )
- NEW met2 ( 1366430 2380 ) ( * 2216290 )
- NEW li1 ( 427570 2212550 ) ( * 2213910 )
- NEW met1 ( 427570 2213910 ) ( 441370 * )
- NEW met2 ( 441370 2213910 ) ( * 2216290 )
- NEW met1 ( 411930 2212550 ) ( 427570 * )
- NEW met1 ( 441370 2216290 ) ( 1366430 * )
- NEW met1 ( 411930 2212550 ) M1M2_PR
- NEW met1 ( 1366430 2216290 ) M1M2_PR
- NEW li1 ( 427570 2212550 ) L1M1_PR_MR
- NEW li1 ( 427570 2213910 ) L1M1_PR_MR
- NEW met1 ( 441370 2213910 ) M1M2_PR
- NEW met1 ( 441370 2216290 ) M1M2_PR ;
+ NEW met2 ( 1281330 160990 ) ( * 2287690 )
+ NEW met2 ( 1366430 2380 ) ( * 160990 )
+ NEW met2 ( 427570 2287690 ) ( * 2300100 0 )
+ NEW met1 ( 427570 2287690 ) ( 1281330 * )
+ NEW met1 ( 1281330 160990 ) ( 1366430 * )
+ NEW met1 ( 1281330 160990 ) M1M2_PR
+ NEW met1 ( 1281330 2287690 ) M1M2_PR
+ NEW met1 ( 1366430 160990 ) M1M2_PR
+ NEW met1 ( 427570 2287690 ) M1M2_PR ;
- la_oenb[42] ( PIN la_oenb[42] ) ( chip_controller la_oenb[42] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2022660 0 ) ( 607430 * )
- NEW met2 ( 607430 2022150 ) ( * 2022660 )
- NEW met2 ( 1385750 2380 0 ) ( * 22950 )
- NEW met1 ( 1335150 22950 ) ( 1385750 * )
- NEW met1 ( 607430 2022150 ) ( 1335150 * )
- NEW met2 ( 1335150 22950 ) ( * 2022150 )
- NEW met2 ( 607430 2022660 ) M2M3_PR_M
- NEW met1 ( 607430 2022150 ) M1M2_PR
- NEW met1 ( 1385750 22950 ) M1M2_PR
- NEW met1 ( 1335150 22950 ) M1M2_PR
- NEW met1 ( 1335150 2022150 ) M1M2_PR ;
+ + ROUTED met2 ( 189750 2512090 ) ( * 2513620 )
+ NEW met3 ( 189750 2513620 ) ( 200100 * )
+ NEW met3 ( 200100 2512940 0 ) ( * 2513620 )
+ NEW met2 ( 1385750 2380 0 ) ( * 18870 )
+ NEW met1 ( 1380230 18870 ) ( 1385750 * )
+ NEW met2 ( 1380230 18870 ) ( * 164390 )
+ NEW met1 ( 135010 2512090 ) ( 189750 * )
+ NEW met2 ( 135010 164390 ) ( * 2512090 )
+ NEW met1 ( 135010 164390 ) ( 1380230 * )
+ NEW met1 ( 189750 2512090 ) M1M2_PR
+ NEW met2 ( 189750 2513620 ) M2M3_PR_M
+ NEW met1 ( 1385750 18870 ) M1M2_PR
+ NEW met1 ( 1380230 18870 ) M1M2_PR
+ NEW met1 ( 1380230 164390 ) M1M2_PR
+ NEW met1 ( 135010 2512090 ) M1M2_PR
+ NEW met1 ( 135010 164390 ) M1M2_PR ;
- la_oenb[43] ( PIN la_oenb[43] ) ( chip_controller la_oenb[43] ) + USE SIGNAL
- + ROUTED li1 ( 420670 1788570 ) ( * 1789590 )
- NEW met1 ( 409170 1789590 ) ( 420670 * )
- NEW met2 ( 409170 1789590 ) ( * 1800300 0 )
- NEW met2 ( 431250 244970 ) ( * 1773300 )
- NEW met2 ( 430790 1773300 ) ( * 1788570 )
- NEW met2 ( 430790 1773300 ) ( 431250 * )
- NEW met1 ( 420670 1788570 ) ( 430790 * )
- NEW met2 ( 1400930 82800 ) ( 1403690 * )
- NEW met2 ( 1403690 2380 0 ) ( * 82800 )
- NEW met1 ( 431250 244970 ) ( 1400930 * )
- NEW met2 ( 1400930 82800 ) ( * 244970 )
- NEW li1 ( 420670 1788570 ) L1M1_PR_MR
- NEW li1 ( 420670 1789590 ) L1M1_PR_MR
- NEW met1 ( 409170 1789590 ) M1M2_PR
- NEW met1 ( 431250 244970 ) M1M2_PR
- NEW met1 ( 430790 1788570 ) M1M2_PR
- NEW met1 ( 1400930 244970 ) M1M2_PR ;
+ + ROUTED met2 ( 1266150 14790 ) ( * 2721190 )
+ NEW met2 ( 423430 2699260 0 ) ( 424350 * )
+ NEW met2 ( 424350 2699260 ) ( * 2721190 )
+ NEW met1 ( 424350 2721190 ) ( 1266150 * )
+ NEW met2 ( 1403690 2380 0 ) ( * 14790 )
+ NEW met1 ( 1266150 14790 ) ( 1403690 * )
+ NEW met1 ( 1266150 14790 ) M1M2_PR
+ NEW met1 ( 1266150 2721190 ) M1M2_PR
+ NEW met1 ( 424350 2721190 ) M1M2_PR
+ NEW met1 ( 1403690 14790 ) M1M2_PR ;
- la_oenb[44] ( PIN la_oenb[44] ) ( chip_controller la_oenb[44] ) + USE SIGNAL
- + ROUTED met1 ( 411010 1787210 ) ( 417450 * )
- NEW met2 ( 411010 1787210 ) ( * 1800300 0 )
- NEW met2 ( 417450 1730430 ) ( * 1787210 )
- NEW met1 ( 417450 1730430 ) ( 1421630 * )
- NEW met2 ( 1421630 2380 0 ) ( * 1730430 )
- NEW met1 ( 417450 1730430 ) M1M2_PR
- NEW met1 ( 417450 1787210 ) M1M2_PR
- NEW met1 ( 411010 1787210 ) M1M2_PR
- NEW met1 ( 1421630 1730430 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2514300 0 ) ( 607430 * )
+ NEW met2 ( 607430 2512090 ) ( * 2514300 )
+ NEW met1 ( 607430 2512090 ) ( 1101470 * )
+ NEW met2 ( 1101470 137870 ) ( * 2512090 )
+ NEW met2 ( 1421630 2380 0 ) ( * 34500 )
+ NEW met2 ( 1421630 34500 ) ( 1422090 * )
+ NEW met1 ( 1101470 137870 ) ( 1422090 * )
+ NEW met2 ( 1422090 34500 ) ( * 137870 )
+ NEW met2 ( 607430 2514300 ) M2M3_PR_M
+ NEW met1 ( 607430 2512090 ) M1M2_PR
+ NEW met1 ( 1101470 2512090 ) M1M2_PR
+ NEW met1 ( 1101470 137870 ) M1M2_PR
+ NEW met1 ( 1422090 137870 ) M1M2_PR ;
- la_oenb[45] ( PIN la_oenb[45] ) ( chip_controller la_oenb[45] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2026740 0 ) ( 607890 * )
- NEW met2 ( 607890 2022490 ) ( * 2026740 )
+ + ROUTED met3 ( 599380 2516340 0 ) ( 607890 * )
+ NEW met2 ( 607890 2512430 ) ( * 2516340 )
NEW met2 ( 1439110 2380 0 ) ( * 3060 )
NEW met2 ( 1438190 3060 ) ( 1439110 * )
NEW met2 ( 1438190 2380 ) ( * 3060 )
NEW met2 ( 1436810 2380 ) ( 1438190 * )
- NEW met2 ( 1435430 82800 ) ( * 120530 )
+ NEW met2 ( 1066970 130390 ) ( * 2512430 )
+ NEW met2 ( 1435430 82800 ) ( * 130390 )
NEW met2 ( 1435430 82800 ) ( 1436810 * )
NEW met2 ( 1436810 2380 ) ( * 82800 )
- NEW met1 ( 607890 2022490 ) ( 721050 * )
- NEW met1 ( 721050 120530 ) ( 1435430 * )
- NEW met2 ( 721050 120530 ) ( * 2022490 )
- NEW met2 ( 607890 2026740 ) M2M3_PR_M
- NEW met1 ( 607890 2022490 ) M1M2_PR
- NEW met1 ( 1435430 120530 ) M1M2_PR
- NEW met1 ( 721050 120530 ) M1M2_PR
- NEW met1 ( 721050 2022490 ) M1M2_PR ;
+ NEW met1 ( 607890 2512430 ) ( 1066970 * )
+ NEW met1 ( 1066970 130390 ) ( 1435430 * )
+ NEW met2 ( 607890 2516340 ) M2M3_PR_M
+ NEW met1 ( 607890 2512430 ) M1M2_PR
+ NEW met1 ( 1066970 130390 ) M1M2_PR
+ NEW met1 ( 1066970 2512430 ) M1M2_PR
+ NEW met1 ( 1435430 130390 ) M1M2_PR ;
- la_oenb[46] ( PIN la_oenb[46] ) ( chip_controller la_oenb[46] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2030140 0 ) ( 607890 * )
- NEW met2 ( 607890 2029290 ) ( * 2030140 )
- NEW met2 ( 1457050 2380 0 ) ( * 20910 )
- NEW met1 ( 1439110 20910 ) ( 1457050 * )
- NEW met2 ( 1439110 20910 ) ( * 2029290 )
- NEW met1 ( 607890 2029290 ) ( 1439110 * )
- NEW met2 ( 607890 2030140 ) M2M3_PR_M
- NEW met1 ( 607890 2029290 ) M1M2_PR
- NEW met1 ( 1457050 20910 ) M1M2_PR
- NEW met1 ( 1439110 20910 ) M1M2_PR
- NEW met1 ( 1439110 2029290 ) M1M2_PR ;
+ + ROUTED met2 ( 1457050 2380 0 ) ( * 15470 )
+ NEW met2 ( 1279950 15470 ) ( * 2720850 )
+ NEW met2 ( 432170 2699260 0 ) ( 433090 * )
+ NEW met2 ( 433090 2699260 ) ( * 2720850 )
+ NEW met1 ( 433090 2720850 ) ( 1279950 * )
+ NEW met1 ( 1279950 15470 ) ( 1457050 * )
+ NEW met1 ( 1279950 15470 ) M1M2_PR
+ NEW met1 ( 1279950 2720850 ) M1M2_PR
+ NEW met1 ( 1457050 15470 ) M1M2_PR
+ NEW met1 ( 433090 2720850 ) M1M2_PR ;
- la_oenb[47] ( PIN la_oenb[47] ) ( chip_controller la_oenb[47] ) + USE SIGNAL
- + ROUTED met2 ( 188830 2036430 ) ( * 2041020 )
- NEW met3 ( 188830 2041020 ) ( 200100 * 0 )
- NEW met2 ( 1474530 2380 0 ) ( * 14620 )
- NEW met2 ( 1472690 14620 ) ( 1474530 * )
- NEW met2 ( 1469930 82800 ) ( 1472690 * )
- NEW met2 ( 1472690 14620 ) ( * 82800 )
- NEW met2 ( 1469930 82800 ) ( * 293250 )
- NEW met1 ( 144210 2036430 ) ( 188830 * )
- NEW met1 ( 144210 293250 ) ( 1469930 * )
- NEW met2 ( 144210 293250 ) ( * 2036430 )
- NEW met1 ( 188830 2036430 ) M1M2_PR
- NEW met2 ( 188830 2041020 ) M2M3_PR_M
- NEW met1 ( 1469930 293250 ) M1M2_PR
- NEW met1 ( 144210 293250 ) M1M2_PR
- NEW met1 ( 144210 2036430 ) M1M2_PR ;
+ + ROUTED met2 ( 1474530 2380 0 ) ( * 15130 )
+ NEW met2 ( 435390 2699260 0 ) ( 436770 * )
+ NEW met2 ( 436770 2699260 ) ( * 2719830 )
+ NEW met1 ( 436770 2719830 ) ( 1302030 * )
+ NEW met1 ( 1302030 15130 ) ( 1474530 * )
+ NEW met2 ( 1302030 15130 ) ( * 2719830 )
+ NEW met1 ( 1474530 15130 ) M1M2_PR
+ NEW met1 ( 436770 2719830 ) M1M2_PR
+ NEW met1 ( 1302030 15130 ) M1M2_PR
+ NEW met1 ( 1302030 2719830 ) M1M2_PR ;
- la_oenb[48] ( PIN la_oenb[48] ) ( chip_controller la_oenb[48] ) + USE SIGNAL
- + ROUTED met2 ( 1473150 15470 ) ( * 2215270 )
- NEW met1 ( 421590 2215270 ) ( 1473150 * )
- NEW met2 ( 1492470 2380 0 ) ( * 15470 )
- NEW met1 ( 1473150 15470 ) ( 1492470 * )
- NEW met2 ( 421590 2199460 0 ) ( * 2215270 )
- NEW met1 ( 1473150 15470 ) M1M2_PR
- NEW met1 ( 1473150 2215270 ) M1M2_PR
- NEW met1 ( 421590 2215270 ) M1M2_PR
- NEW met1 ( 1492470 15470 ) M1M2_PR ;
+ + ROUTED met1 ( 492890 2716430 ) ( * 2716770 )
+ NEW met1 ( 492890 2716430 ) ( 494270 * )
+ NEW li1 ( 494270 2716430 ) ( * 2718470 )
+ NEW met2 ( 1156210 140930 ) ( * 2718470 )
+ NEW met2 ( 439070 2699260 0 ) ( 440450 * )
+ NEW met2 ( 440450 2699260 ) ( * 2716770 )
+ NEW met1 ( 440450 2716770 ) ( 492890 * )
+ NEW met2 ( 1492470 2380 0 ) ( * 3060 )
+ NEW met2 ( 1491550 3060 ) ( 1492470 * )
+ NEW met2 ( 1491550 2380 ) ( * 3060 )
+ NEW met2 ( 1490630 2380 ) ( 1491550 * )
+ NEW met1 ( 1156210 140930 ) ( 1490630 * )
+ NEW met2 ( 1490630 2380 ) ( * 140930 )
+ NEW met1 ( 494270 2718470 ) ( 1156210 * )
+ NEW li1 ( 494270 2716430 ) L1M1_PR_MR
+ NEW li1 ( 494270 2718470 ) L1M1_PR_MR
+ NEW met1 ( 1156210 2718470 ) M1M2_PR
+ NEW met1 ( 1156210 140930 ) M1M2_PR
+ NEW met1 ( 440450 2716770 ) M1M2_PR
+ NEW met1 ( 1490630 140930 ) M1M2_PR ;
- la_oenb[49] ( PIN la_oenb[49] ) ( chip_controller la_oenb[49] ) + USE SIGNAL
- + ROUTED met2 ( 188830 2043230 ) ( * 2047820 )
- NEW met3 ( 188830 2047820 ) ( 200100 * 0 )
- NEW met1 ( 144670 2043230 ) ( 188830 * )
- NEW met2 ( 1509950 2380 0 ) ( * 3060 )
- NEW met2 ( 1509030 3060 ) ( 1509950 * )
- NEW met2 ( 1509030 2380 ) ( * 3060 )
- NEW met2 ( 1507650 2380 ) ( 1509030 * )
- NEW met2 ( 144670 52530 ) ( * 2043230 )
- NEW met1 ( 144670 52530 ) ( 1507650 * )
- NEW met2 ( 1507650 2380 ) ( * 52530 )
- NEW met1 ( 188830 2043230 ) M1M2_PR
- NEW met2 ( 188830 2047820 ) M2M3_PR_M
- NEW met1 ( 144670 2043230 ) M1M2_PR
- NEW met1 ( 144670 52530 ) M1M2_PR
- NEW met1 ( 1507650 52530 ) M1M2_PR ;
+ + ROUTED met2 ( 442290 2699260 0 ) ( 443670 * )
+ NEW met2 ( 443670 2699260 ) ( * 2720170 )
+ NEW met1 ( 1294210 14110 ) ( 1321350 * )
+ NEW li1 ( 1321350 14110 ) ( * 15810 )
+ NEW met1 ( 443670 2720170 ) ( 1294210 * )
+ NEW met2 ( 1509950 2380 0 ) ( * 15810 )
+ NEW met1 ( 1321350 15810 ) ( 1509950 * )
+ NEW met2 ( 1294210 14110 ) ( * 2720170 )
+ NEW met1 ( 443670 2720170 ) M1M2_PR
+ NEW met1 ( 1294210 14110 ) M1M2_PR
+ NEW li1 ( 1321350 14110 ) L1M1_PR_MR
+ NEW li1 ( 1321350 15810 ) L1M1_PR_MR
+ NEW met1 ( 1294210 2720170 ) M1M2_PR
+ NEW met1 ( 1509950 15810 ) M1M2_PR ;
- la_oenb[4] ( PIN la_oenb[4] ) ( chip_controller la_oenb[4] ) + USE SIGNAL
- + ROUTED met2 ( 286350 39950 ) ( * 1788570 )
- NEW met2 ( 235290 1788570 ) ( * 1800300 0 )
- NEW met1 ( 235290 1788570 ) ( 286350 * )
- NEW met1 ( 286350 39950 ) ( 712310 * )
- NEW met2 ( 712310 2380 0 ) ( * 39950 )
- NEW met1 ( 286350 39950 ) M1M2_PR
- NEW met1 ( 286350 1788570 ) M1M2_PR
- NEW met1 ( 235290 1788570 ) M1M2_PR
- NEW met1 ( 712310 39950 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2328660 0 ) ( 607430 * )
+ NEW met2 ( 607430 2327130 ) ( * 2328660 )
+ NEW met1 ( 607430 2326790 ) ( * 2327130 )
+ NEW met1 ( 606970 2326790 ) ( 607430 * )
+ NEW met1 ( 606970 2326110 ) ( * 2326790 )
+ NEW met1 ( 606970 2326110 ) ( 710930 * )
+ NEW met2 ( 710930 82800 ) ( 712310 * )
+ NEW met2 ( 712310 2380 0 ) ( * 82800 )
+ NEW met2 ( 710930 82800 ) ( * 2326110 )
+ NEW met2 ( 607430 2328660 ) M2M3_PR_M
+ NEW met1 ( 607430 2327130 ) M1M2_PR
+ NEW met1 ( 710930 2326110 ) M1M2_PR ;
- la_oenb[50] ( PIN la_oenb[50] ) ( chip_controller la_oenb[50] ) + USE SIGNAL
- + ROUTED met1 ( 429410 1793670 ) ( 445510 * )
- NEW met2 ( 429410 1793670 ) ( * 1800300 0 )
- NEW met2 ( 445510 67150 ) ( * 1793670 )
- NEW met1 ( 445510 67150 ) ( 1527890 * )
- NEW met2 ( 1527890 2380 0 ) ( * 67150 )
- NEW met1 ( 445510 67150 ) M1M2_PR
- NEW met1 ( 445510 1793670 ) M1M2_PR
- NEW met1 ( 429410 1793670 ) M1M2_PR
- NEW met1 ( 1527890 67150 ) M1M2_PR ;
+ + ROUTED li1 ( 471270 2713370 ) ( * 2714050 )
+ NEW li1 ( 471270 2713370 ) ( 472190 * )
+ NEW met2 ( 873310 154870 ) ( * 2713370 )
+ NEW met2 ( 444130 2699260 0 ) ( 445510 * )
+ NEW met2 ( 445510 2699260 ) ( * 2714050 )
+ NEW met1 ( 445510 2714050 ) ( 471270 * )
+ NEW met2 ( 1525130 82800 ) ( 1527890 * )
+ NEW met2 ( 1527890 2380 0 ) ( * 82800 )
+ NEW met1 ( 873310 154870 ) ( 1525130 * )
+ NEW met2 ( 1525130 82800 ) ( * 154870 )
+ NEW met1 ( 472190 2713370 ) ( 873310 * )
+ NEW li1 ( 471270 2714050 ) L1M1_PR_MR
+ NEW li1 ( 472190 2713370 ) L1M1_PR_MR
+ NEW met1 ( 873310 2713370 ) M1M2_PR
+ NEW met1 ( 873310 154870 ) M1M2_PR
+ NEW met1 ( 445510 2714050 ) M1M2_PR
+ NEW met1 ( 1525130 154870 ) M1M2_PR ;
- la_oenb[51] ( PIN la_oenb[51] ) ( chip_controller la_oenb[51] ) + USE SIGNAL
- + ROUTED met2 ( 1545370 2380 0 ) ( * 15130 )
- NEW met1 ( 1538930 15130 ) ( 1545370 * )
- NEW met2 ( 1538930 15130 ) ( * 53210 )
- NEW met1 ( 435390 1789590 ) ( 451950 * )
- NEW met2 ( 435390 1789590 ) ( * 1800300 0 )
- NEW met2 ( 451950 53210 ) ( * 1789590 )
- NEW met1 ( 451950 53210 ) ( 1538930 * )
- NEW met1 ( 1545370 15130 ) M1M2_PR
- NEW met1 ( 1538930 15130 ) M1M2_PR
- NEW met1 ( 1538930 53210 ) M1M2_PR
- NEW met1 ( 451950 53210 ) M1M2_PR
- NEW met1 ( 451950 1789590 ) M1M2_PR
- NEW met1 ( 435390 1789590 ) M1M2_PR ;
+ + ROUTED met2 ( 1545370 2380 0 ) ( * 18530 )
+ NEW met1 ( 1538930 18530 ) ( 1545370 * )
+ NEW met2 ( 983710 54910 ) ( * 2289730 )
+ NEW met2 ( 1538930 18530 ) ( * 54910 )
+ NEW met2 ( 449650 2289730 ) ( * 2300100 0 )
+ NEW met1 ( 449650 2289730 ) ( 983710 * )
+ NEW met1 ( 983710 54910 ) ( 1538930 * )
+ NEW met1 ( 1545370 18530 ) M1M2_PR
+ NEW met1 ( 1538930 18530 ) M1M2_PR
+ NEW met1 ( 983710 54910 ) M1M2_PR
+ NEW met1 ( 983710 2289730 ) M1M2_PR
+ NEW met1 ( 1538930 54910 ) M1M2_PR
+ NEW met1 ( 449650 2289730 ) M1M2_PR ;
- la_oenb[52] ( PIN la_oenb[52] ) ( chip_controller la_oenb[52] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2038980 0 ) ( 607430 * )
- NEW met2 ( 607430 2036090 ) ( * 2038980 )
+ + ROUTED met3 ( 599380 2531980 0 ) ( 609730 * )
+ NEW met2 ( 609730 2526710 ) ( * 2531980 )
NEW met2 ( 1563310 2380 0 ) ( * 3060 )
NEW met2 ( 1562390 3060 ) ( 1563310 * )
NEW met2 ( 1562390 2380 ) ( * 3060 )
NEW met2 ( 1561010 2380 ) ( 1562390 * )
- NEW met2 ( 1559630 82800 ) ( * 127670 )
+ NEW met2 ( 790510 115770 ) ( * 2526710 )
+ NEW met2 ( 1559630 82800 ) ( * 115770 )
NEW met2 ( 1559630 82800 ) ( 1561010 * )
NEW met2 ( 1561010 2380 ) ( * 82800 )
- NEW met1 ( 607430 2036090 ) ( 741750 * )
- NEW met1 ( 741750 127670 ) ( 1559630 * )
- NEW met2 ( 741750 127670 ) ( * 2036090 )
- NEW met2 ( 607430 2038980 ) M2M3_PR_M
- NEW met1 ( 607430 2036090 ) M1M2_PR
- NEW met1 ( 1559630 127670 ) M1M2_PR
- NEW met1 ( 741750 127670 ) M1M2_PR
- NEW met1 ( 741750 2036090 ) M1M2_PR ;
+ NEW met1 ( 609730 2526710 ) ( 790510 * )
+ NEW met1 ( 790510 115770 ) ( 1559630 * )
+ NEW met2 ( 609730 2531980 ) M2M3_PR_M
+ NEW met1 ( 609730 2526710 ) M1M2_PR
+ NEW met1 ( 790510 115770 ) M1M2_PR
+ NEW met1 ( 790510 2526710 ) M1M2_PR
+ NEW met1 ( 1559630 115770 ) M1M2_PR ;
- la_oenb[53] ( PIN la_oenb[53] ) ( chip_controller la_oenb[53] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2040340 0 ) ( 607890 * )
- NEW met2 ( 607890 2035750 ) ( * 2040340 )
- NEW met2 ( 1460270 1769190 ) ( * 2035750 )
- NEW met1 ( 607890 2035750 ) ( 1460270 * )
- NEW met1 ( 1460270 1769190 ) ( 1580790 * )
+ + ROUTED met1 ( 736230 100810 ) ( 1580790 * )
+ NEW met1 ( 466670 2285310 ) ( * 2285650 )
+ NEW met1 ( 456090 2285650 ) ( 466670 * )
+ NEW met2 ( 456090 2285650 ) ( * 2300100 0 )
+ NEW met1 ( 466670 2285310 ) ( 736230 * )
+ NEW met2 ( 736230 100810 ) ( * 2285310 )
+ NEW met2 ( 1580790 82800 ) ( * 100810 )
NEW met2 ( 1580790 82800 ) ( 1581250 * )
NEW met2 ( 1581250 2380 0 ) ( * 82800 )
- NEW met2 ( 1580790 82800 ) ( * 1769190 )
- NEW met2 ( 607890 2040340 ) M2M3_PR_M
- NEW met1 ( 607890 2035750 ) M1M2_PR
- NEW met1 ( 1460270 1769190 ) M1M2_PR
- NEW met1 ( 1460270 2035750 ) M1M2_PR
- NEW met1 ( 1580790 1769190 ) M1M2_PR ;
+ NEW met1 ( 736230 100810 ) M1M2_PR
+ NEW met1 ( 1580790 100810 ) M1M2_PR
+ NEW met1 ( 456090 2285650 ) M1M2_PR
+ NEW met1 ( 736230 2285310 ) M1M2_PR ;
- la_oenb[54] ( PIN la_oenb[54] ) ( chip_controller la_oenb[54] ) + USE SIGNAL
- + ROUTED met2 ( 186990 2049690 ) ( * 2052580 )
- NEW met3 ( 186990 2052580 ) ( 200100 * 0 )
- NEW met1 ( 151110 2049690 ) ( 186990 * )
- NEW met2 ( 151110 47430 ) ( * 2049690 )
- NEW met1 ( 151110 47430 ) ( 1598730 * )
- NEW met2 ( 1598730 2380 0 ) ( * 47430 )
- NEW met1 ( 186990 2049690 ) M1M2_PR
- NEW met2 ( 186990 2052580 ) M2M3_PR_M
- NEW met1 ( 151110 2049690 ) M1M2_PR
- NEW met1 ( 151110 47430 ) M1M2_PR
- NEW met1 ( 1598730 47430 ) M1M2_PR ;
+ + ROUTED met2 ( 456550 2699260 0 ) ( 457470 * )
+ NEW met2 ( 457470 2699260 ) ( * 2722210 )
+ NEW met1 ( 457470 2722210 ) ( 1224750 * )
+ NEW met2 ( 1598730 2380 0 ) ( * 16830 )
+ NEW met1 ( 1224750 16830 ) ( 1598730 * )
+ NEW met2 ( 1224750 16830 ) ( * 2722210 )
+ NEW met1 ( 457470 2722210 ) M1M2_PR
+ NEW met1 ( 1224750 16830 ) M1M2_PR
+ NEW met1 ( 1224750 2722210 ) M1M2_PR
+ NEW met1 ( 1598730 16830 ) M1M2_PR ;
- la_oenb[55] ( PIN la_oenb[55] ) ( chip_controller la_oenb[55] ) + USE SIGNAL
- + ROUTED met2 ( 1446010 15810 ) ( * 2195550 )
- NEW met2 ( 1616670 2380 0 ) ( * 15810 )
- NEW met1 ( 1446010 15810 ) ( 1616670 * )
- NEW li1 ( 437230 2195550 ) ( * 2199630 )
- NEW met2 ( 437230 2199460 ) ( * 2199630 )
- NEW met2 ( 436310 2199460 0 ) ( 437230 * )
- NEW met1 ( 437230 2195550 ) ( 1446010 * )
- NEW met1 ( 1446010 15810 ) M1M2_PR
- NEW met1 ( 1446010 2195550 ) M1M2_PR
- NEW met1 ( 1616670 15810 ) M1M2_PR
- NEW li1 ( 437230 2195550 ) L1M1_PR_MR
- NEW li1 ( 437230 2199630 ) L1M1_PR_MR
- NEW met1 ( 437230 2199630 ) M1M2_PR
- NEW met1 ( 437230 2199630 ) RECT ( -355 -70 0 70 ) ;
+ + ROUTED met2 ( 457930 2699260 0 ) ( 459310 * )
+ NEW met2 ( 459310 2699260 ) ( * 2722550 )
+ NEW met1 ( 459310 2722550 ) ( 1210950 * )
+ NEW met2 ( 1616670 2380 0 ) ( * 20570 )
+ NEW met1 ( 1210950 20570 ) ( 1616670 * )
+ NEW met2 ( 1210950 20570 ) ( * 2722550 )
+ NEW met1 ( 459310 2722550 ) M1M2_PR
+ NEW met1 ( 1210950 20570 ) M1M2_PR
+ NEW met1 ( 1210950 2722550 ) M1M2_PR
+ NEW met1 ( 1616670 20570 ) M1M2_PR ;
- la_oenb[56] ( PIN la_oenb[56] ) ( chip_controller la_oenb[56] ) + USE SIGNAL
- + ROUTED met3 ( 185610 2060060 ) ( 200100 * 0 )
- NEW met2 ( 1634150 2380 0 ) ( * 3060 )
+ + ROUTED met2 ( 1634150 2380 0 ) ( * 3060 )
NEW met2 ( 1633230 3060 ) ( 1634150 * )
NEW met2 ( 1633230 2380 ) ( * 3060 )
NEW met2 ( 1631850 2380 ) ( 1633230 * )
- NEW met2 ( 1628630 82800 ) ( * 92990 )
- NEW met2 ( 1628630 82800 ) ( 1631850 * )
- NEW met2 ( 1631850 2380 ) ( * 82800 )
- NEW met1 ( 185610 92990 ) ( 1628630 * )
- NEW met2 ( 185610 92990 ) ( * 2060060 )
- NEW met1 ( 185610 92990 ) M1M2_PR
- NEW met2 ( 185610 2060060 ) M2M3_PR_M
- NEW met1 ( 1628630 92990 ) M1M2_PR ;
+ NEW met2 ( 777170 53890 ) ( * 2285650 )
+ NEW met2 ( 1631850 2380 ) ( * 53890 )
+ NEW met2 ( 468050 2285650 ) ( * 2300100 0 )
+ NEW met1 ( 468050 2285650 ) ( 777170 * )
+ NEW met1 ( 777170 53890 ) ( 1631850 * )
+ NEW met1 ( 777170 53890 ) M1M2_PR
+ NEW met1 ( 777170 2285650 ) M1M2_PR
+ NEW met1 ( 1631850 53890 ) M1M2_PR
+ NEW met1 ( 468050 2285650 ) M1M2_PR ;
- la_oenb[57] ( PIN la_oenb[57] ) ( chip_controller la_oenb[57] ) + USE SIGNAL
- + ROUTED li1 ( 469430 1788570 ) ( 469890 * )
- NEW li1 ( 469890 1788570 ) ( * 1790270 )
- NEW met1 ( 469890 1790270 ) ( 507150 * )
- NEW met2 ( 507150 72930 ) ( * 1790270 )
- NEW met2 ( 1652090 2380 0 ) ( * 72930 )
- NEW met2 ( 453790 1788570 ) ( * 1800300 0 )
- NEW met1 ( 453790 1788570 ) ( 469430 * )
- NEW met1 ( 507150 72930 ) ( 1652090 * )
- NEW met1 ( 507150 72930 ) M1M2_PR
- NEW li1 ( 469430 1788570 ) L1M1_PR_MR
- NEW li1 ( 469890 1790270 ) L1M1_PR_MR
- NEW met1 ( 507150 1790270 ) M1M2_PR
- NEW met1 ( 1652090 72930 ) M1M2_PR
- NEW met1 ( 453790 1788570 ) M1M2_PR ;
+ + ROUTED li1 ( 516350 2283950 ) ( * 2284970 )
+ NEW met1 ( 512670 2284970 ) ( 516350 * )
+ NEW met1 ( 512670 2284630 ) ( * 2284970 )
+ NEW met1 ( 492890 2284630 ) ( 512670 * )
+ NEW li1 ( 492890 2284630 ) ( * 2285990 )
+ NEW met1 ( 480930 2285990 ) ( 492890 * )
+ NEW li1 ( 480930 2284970 ) ( * 2285990 )
+ NEW met1 ( 469430 2284970 ) ( 480930 * )
+ NEW met2 ( 469430 2284970 ) ( * 2300100 0 )
+ NEW met2 ( 1073870 93670 ) ( * 2283950 )
+ NEW met2 ( 1649330 82800 ) ( * 93670 )
+ NEW met2 ( 1649330 82800 ) ( 1652090 * )
+ NEW met2 ( 1652090 2380 0 ) ( * 82800 )
+ NEW met1 ( 1073870 93670 ) ( 1649330 * )
+ NEW met1 ( 516350 2283950 ) ( 1073870 * )
+ NEW met1 ( 1073870 93670 ) M1M2_PR
+ NEW met1 ( 1649330 93670 ) M1M2_PR
+ NEW li1 ( 516350 2283950 ) L1M1_PR_MR
+ NEW li1 ( 516350 2284970 ) L1M1_PR_MR
+ NEW li1 ( 492890 2284630 ) L1M1_PR_MR
+ NEW li1 ( 492890 2285990 ) L1M1_PR_MR
+ NEW li1 ( 480930 2285990 ) L1M1_PR_MR
+ NEW li1 ( 480930 2284970 ) L1M1_PR_MR
+ NEW met1 ( 469430 2284970 ) M1M2_PR
+ NEW met1 ( 1073870 2283950 ) M1M2_PR ;
- la_oenb[58] ( PIN la_oenb[58] ) ( chip_controller la_oenb[58] ) + USE SIGNAL
- + ROUTED met2 ( 486450 52870 ) ( * 1789590 )
- NEW met2 ( 1669570 2380 0 ) ( * 52870 )
- NEW met2 ( 457930 1789590 ) ( * 1800300 0 )
- NEW met1 ( 457930 1789590 ) ( 486450 * )
- NEW met1 ( 486450 52870 ) ( 1669570 * )
- NEW met1 ( 486450 52870 ) M1M2_PR
- NEW met1 ( 486450 1789590 ) M1M2_PR
- NEW met1 ( 1669570 52870 ) M1M2_PR
- NEW met1 ( 457930 1789590 ) M1M2_PR ;
+ + ROUTED met2 ( 1669570 2380 0 ) ( * 20230 )
+ NEW met2 ( 463450 2699260 0 ) ( 464370 * )
+ NEW met2 ( 464370 2699260 ) ( * 2722890 )
+ NEW met1 ( 464370 2722890 ) ( 1204050 * )
+ NEW met1 ( 1204050 20230 ) ( 1669570 * )
+ NEW met2 ( 1204050 20230 ) ( * 2722890 )
+ NEW met1 ( 1669570 20230 ) M1M2_PR
+ NEW met1 ( 464370 2722890 ) M1M2_PR
+ NEW met1 ( 1204050 20230 ) M1M2_PR
+ NEW met1 ( 1204050 2722890 ) M1M2_PR ;
- la_oenb[59] ( PIN la_oenb[59] ) ( chip_controller la_oenb[59] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2049860 0 ) ( 607430 * )
- NEW met2 ( 607430 2049350 ) ( * 2049860 )
- NEW met1 ( 607430 2049350 ) ( 1431750 * )
- NEW met2 ( 1687510 2380 0 ) ( * 33830 )
- NEW met1 ( 1431750 33830 ) ( 1687510 * )
- NEW met2 ( 1431750 33830 ) ( * 2049350 )
- NEW met2 ( 607430 2049860 ) M2M3_PR_M
- NEW met1 ( 607430 2049350 ) M1M2_PR
- NEW met1 ( 1431750 33830 ) M1M2_PR
- NEW met1 ( 1431750 2049350 ) M1M2_PR
- NEW met1 ( 1687510 33830 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2542860 0 ) ( 609270 * )
+ NEW met2 ( 609270 2539630 ) ( * 2542860 )
+ NEW met1 ( 609270 2539630 ) ( 1142410 * )
+ NEW met2 ( 1142410 43350 ) ( * 2539630 )
+ NEW met1 ( 1142410 43350 ) ( 1687510 * )
+ NEW met2 ( 1687510 2380 0 ) ( * 43350 )
+ NEW met2 ( 609270 2542860 ) M2M3_PR_M
+ NEW met1 ( 609270 2539630 ) M1M2_PR
+ NEW met1 ( 1142410 2539630 ) M1M2_PR
+ NEW met1 ( 1142410 43350 ) M1M2_PR
+ NEW met1 ( 1687510 43350 ) M1M2_PR ;
- la_oenb[5] ( PIN la_oenb[5] ) ( chip_controller la_oenb[5] ) + USE SIGNAL
- + ROUTED met3 ( 599380 1853340 0 ) ( 607890 * )
- NEW met2 ( 607890 1849430 ) ( * 1853340 )
- NEW met2 ( 729790 2380 0 ) ( * 3060 )
- NEW met2 ( 728870 3060 ) ( 729790 * )
- NEW met2 ( 728870 2380 ) ( * 3060 )
- NEW met2 ( 727490 2380 ) ( 728870 * )
- NEW met1 ( 607890 1849430 ) ( 724730 * )
- NEW met2 ( 724730 82800 ) ( 727490 * )
- NEW met2 ( 727490 2380 ) ( * 82800 )
- NEW met2 ( 724730 82800 ) ( * 1849430 )
- NEW met2 ( 607890 1853340 ) M2M3_PR_M
- NEW met1 ( 607890 1849430 ) M1M2_PR
- NEW met1 ( 724730 1849430 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2336820 0 ) ( 607430 * )
+ NEW met2 ( 607430 2333930 ) ( * 2336820 )
+ NEW met1 ( 607430 2333930 ) ( 614100 * )
+ NEW met1 ( 614100 2333250 ) ( * 2333930 )
+ NEW met2 ( 729790 2380 0 ) ( * 20910 )
+ NEW met1 ( 714150 20910 ) ( 729790 * )
+ NEW met1 ( 614100 2333250 ) ( 714150 * )
+ NEW met2 ( 714150 20910 ) ( * 2333250 )
+ NEW met2 ( 607430 2336820 ) M2M3_PR_M
+ NEW met1 ( 607430 2333930 ) M1M2_PR
+ NEW met1 ( 729790 20910 ) M1M2_PR
+ NEW met1 ( 714150 20910 ) M1M2_PR
+ NEW met1 ( 714150 2333250 ) M1M2_PR ;
- la_oenb[60] ( PIN la_oenb[60] ) ( chip_controller la_oenb[60] ) + USE SIGNAL
- + ROUTED met2 ( 472650 1722610 ) ( * 1789250 )
- NEW met2 ( 463910 1789250 ) ( * 1800300 0 )
- NEW met1 ( 463910 1789250 ) ( 472650 * )
- NEW met2 ( 1704530 82800 ) ( 1704990 * )
- NEW met2 ( 1704990 2380 0 ) ( * 82800 )
- NEW met1 ( 472650 1722610 ) ( 1704530 * )
- NEW met2 ( 1704530 82800 ) ( * 1722610 )
- NEW met1 ( 472650 1722610 ) M1M2_PR
- NEW met1 ( 472650 1789250 ) M1M2_PR
- NEW met1 ( 463910 1789250 ) M1M2_PR
- NEW met1 ( 1704530 1722610 ) M1M2_PR ;
+ + ROUTED met2 ( 1190250 19550 ) ( * 2719660 )
+ NEW met2 ( 466670 2699260 0 ) ( 468050 * )
+ NEW met2 ( 468050 2699260 ) ( * 2719660 )
+ NEW met3 ( 468050 2719660 ) ( 1190250 * )
+ NEW met2 ( 1704990 2380 0 ) ( * 19550 )
+ NEW met1 ( 1190250 19550 ) ( 1704990 * )
+ NEW met1 ( 1190250 19550 ) M1M2_PR
+ NEW met2 ( 1190250 2719660 ) M2M3_PR_M
+ NEW met2 ( 468050 2719660 ) M2M3_PR_M
+ NEW met1 ( 1704990 19550 ) M1M2_PR ;
- la_oenb[61] ( PIN la_oenb[61] ) ( chip_controller la_oenb[61] ) + USE SIGNAL
- + ROUTED met2 ( 188370 2063970 ) ( * 2068220 )
- NEW met3 ( 188370 2068220 ) ( 200100 * 0 )
- NEW met2 ( 137310 60010 ) ( * 2063970 )
- NEW met1 ( 137310 2063970 ) ( 188370 * )
- NEW met1 ( 137310 60010 ) ( 1722930 * )
- NEW met2 ( 1722930 2380 0 ) ( * 60010 )
- NEW met1 ( 188370 2063970 ) M1M2_PR
- NEW met2 ( 188370 2068220 ) M2M3_PR_M
- NEW met1 ( 137310 60010 ) M1M2_PR
- NEW met1 ( 137310 2063970 ) M1M2_PR
- NEW met1 ( 1722930 60010 ) M1M2_PR ;
+ + ROUTED met2 ( 474490 2289050 ) ( * 2300100 0 )
+ NEW met1 ( 474490 2289050 ) ( 1115270 * )
+ NEW met2 ( 1115270 54570 ) ( * 2289050 )
+ NEW met1 ( 1115270 54570 ) ( 1722930 * )
+ NEW met2 ( 1722930 2380 0 ) ( * 54570 )
+ NEW met1 ( 474490 2289050 ) M1M2_PR
+ NEW met1 ( 1115270 54570 ) M1M2_PR
+ NEW met1 ( 1115270 2289050 ) M1M2_PR
+ NEW met1 ( 1722930 54570 ) M1M2_PR ;
- la_oenb[62] ( PIN la_oenb[62] ) ( chip_controller la_oenb[62] ) + USE SIGNAL
- + ROUTED met2 ( 187910 2070260 ) ( * 2070770 )
- NEW met3 ( 187910 2070260 ) ( 200100 * 0 )
- NEW met2 ( 1739030 82800 ) ( 1740410 * )
- NEW met2 ( 1740410 2380 0 ) ( * 82800 )
- NEW met2 ( 1739030 82800 ) ( * 1743010 )
- NEW met1 ( 143290 1743010 ) ( 1739030 * )
- NEW met2 ( 143290 1743010 ) ( * 2070770 )
- NEW met1 ( 143290 2070770 ) ( 187910 * )
- NEW met1 ( 1739030 1743010 ) M1M2_PR
- NEW met1 ( 187910 2070770 ) M1M2_PR
- NEW met2 ( 187910 2070260 ) M2M3_PR_M
- NEW met1 ( 143290 1743010 ) M1M2_PR
- NEW met1 ( 143290 2070770 ) M1M2_PR ;
+ + ROUTED met2 ( 479550 2288030 ) ( * 2300100 0 )
+ NEW met2 ( 583050 73610 ) ( * 2256300 )
+ NEW li1 ( 574310 2284290 ) ( * 2288030 )
+ NEW met1 ( 574310 2284290 ) ( 577530 * )
+ NEW li1 ( 577530 2284290 ) ( 579370 * )
+ NEW met1 ( 579370 2284290 ) ( 581670 * )
+ NEW met2 ( 581670 2256300 ) ( * 2284290 )
+ NEW met2 ( 581670 2256300 ) ( 583050 * )
+ NEW met2 ( 1740410 2380 0 ) ( * 73610 )
+ NEW met1 ( 479550 2288030 ) ( 574310 * )
+ NEW met1 ( 583050 73610 ) ( 1740410 * )
+ NEW met1 ( 479550 2288030 ) M1M2_PR
+ NEW met1 ( 583050 73610 ) M1M2_PR
+ NEW li1 ( 574310 2288030 ) L1M1_PR_MR
+ NEW li1 ( 574310 2284290 ) L1M1_PR_MR
+ NEW li1 ( 577530 2284290 ) L1M1_PR_MR
+ NEW li1 ( 579370 2284290 ) L1M1_PR_MR
+ NEW met1 ( 581670 2284290 ) M1M2_PR
+ NEW met1 ( 1740410 73610 ) M1M2_PR ;
- la_oenb[63] ( PIN la_oenb[63] ) ( chip_controller la_oenb[63] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2058700 0 ) ( 607890 * )
- NEW met2 ( 607890 2056490 ) ( * 2058700 )
- NEW met2 ( 1758350 2380 0 ) ( * 30090 )
- NEW met1 ( 607890 2056490 ) ( 1390350 * )
- NEW met1 ( 1390350 30090 ) ( 1758350 * )
- NEW met2 ( 1390350 30090 ) ( * 2056490 )
- NEW met2 ( 607890 2058700 ) M2M3_PR_M
- NEW met1 ( 607890 2056490 ) M1M2_PR
- NEW met1 ( 1758350 30090 ) M1M2_PR
- NEW met1 ( 1390350 30090 ) M1M2_PR
- NEW met1 ( 1390350 2056490 ) M1M2_PR ;
+ + ROUTED met2 ( 1758350 2380 0 ) ( * 3060 )
+ NEW met2 ( 1757430 3060 ) ( 1758350 * )
+ NEW met2 ( 1757430 2380 ) ( * 3060 )
+ NEW met2 ( 1756050 2380 ) ( 1757430 * )
+ NEW met3 ( 599380 2555780 0 ) ( 607430 * )
+ NEW met2 ( 607430 2553570 ) ( * 2555780 )
+ NEW met2 ( 1756050 2380 ) ( * 53550 )
+ NEW met1 ( 607430 2553570 ) ( 845250 * )
+ NEW met2 ( 845250 53550 ) ( * 2553570 )
+ NEW met1 ( 845250 53550 ) ( 1756050 * )
+ NEW met2 ( 607430 2555780 ) M2M3_PR_M
+ NEW met1 ( 607430 2553570 ) M1M2_PR
+ NEW met1 ( 1756050 53550 ) M1M2_PR
+ NEW met1 ( 845250 53550 ) M1M2_PR
+ NEW met1 ( 845250 2553570 ) M1M2_PR ;
- la_oenb[64] ( PIN la_oenb[64] ) ( chip_controller la_oenb[64] ) + USE SIGNAL
- + ROUTED met2 ( 610190 2208000 ) ( * 2214930 )
- NEW met2 ( 610190 2208000 ) ( 610650 * )
- NEW met1 ( 456090 2214930 ) ( 610190 * )
- NEW met2 ( 1776290 2380 0 ) ( * 18870 )
- NEW met1 ( 610650 18870 ) ( 1776290 * )
- NEW met2 ( 456090 2199460 0 ) ( * 2214930 )
- NEW met2 ( 610650 18870 ) ( * 2208000 )
- NEW met1 ( 610650 18870 ) M1M2_PR
- NEW met1 ( 610190 2214930 ) M1M2_PR
- NEW met1 ( 456090 2214930 ) M1M2_PR
- NEW met1 ( 1776290 18870 ) M1M2_PR ;
+ + ROUTED met1 ( 481390 2284970 ) ( 493350 * )
+ NEW met2 ( 481390 2284970 ) ( * 2300100 0 )
+ NEW met2 ( 493350 44030 ) ( * 2284970 )
+ NEW met1 ( 493350 44030 ) ( 1776290 * )
+ NEW met2 ( 1776290 2380 0 ) ( * 44030 )
+ NEW met1 ( 493350 44030 ) M1M2_PR
+ NEW met1 ( 493350 2284970 ) M1M2_PR
+ NEW met1 ( 481390 2284970 ) M1M2_PR
+ NEW met1 ( 1776290 44030 ) M1M2_PR ;
- la_oenb[65] ( PIN la_oenb[65] ) ( chip_controller la_oenb[65] ) + USE SIGNAL
- + ROUTED met1 ( 457470 2215950 ) ( 1424850 * )
- NEW met2 ( 1793770 2380 0 ) ( * 16830 )
- NEW met1 ( 1424850 16830 ) ( 1793770 * )
- NEW met2 ( 457470 2199460 0 ) ( * 2215950 )
- NEW met2 ( 1424850 16830 ) ( * 2215950 )
- NEW met1 ( 457470 2215950 ) M1M2_PR
- NEW met1 ( 1424850 16830 ) M1M2_PR
- NEW met1 ( 1424850 2215950 ) M1M2_PR
- NEW met1 ( 1793770 16830 ) M1M2_PR ;
+ + ROUTED met2 ( 479090 2699260 0 ) ( 480470 * )
+ NEW met2 ( 480470 2699260 ) ( * 2721700 )
+ NEW met2 ( 976350 18190 ) ( * 2721700 )
+ NEW met3 ( 480470 2721700 ) ( 976350 * )
+ NEW met2 ( 1793770 2380 0 ) ( * 18190 )
+ NEW met1 ( 976350 18190 ) ( 1793770 * )
+ NEW met2 ( 480470 2721700 ) M2M3_PR_M
+ NEW met1 ( 976350 18190 ) M1M2_PR
+ NEW met2 ( 976350 2721700 ) M2M3_PR_M
+ NEW met1 ( 1793770 18190 ) M1M2_PR ;
- la_oenb[66] ( PIN la_oenb[66] ) ( chip_controller la_oenb[66] ) + USE SIGNAL
- + ROUTED met1 ( 1445550 16150 ) ( 1469010 * )
- NEW met1 ( 1469010 16150 ) ( * 16490 )
- NEW met2 ( 1445550 16150 ) ( * 2215610 )
- NEW met1 ( 460690 2215610 ) ( 1445550 * )
- NEW met2 ( 1811710 2380 0 ) ( * 16490 )
- NEW met1 ( 1469010 16490 ) ( 1811710 * )
- NEW met2 ( 460690 2199460 0 ) ( * 2215610 )
- NEW met1 ( 1445550 16150 ) M1M2_PR
- NEW met1 ( 1445550 2215610 ) M1M2_PR
- NEW met1 ( 460690 2215610 ) M1M2_PR
- NEW met1 ( 1811710 16490 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2559860 0 ) ( 608350 * )
+ NEW met2 ( 608350 2553230 ) ( * 2559860 )
+ NEW met2 ( 1811710 2380 0 ) ( * 3060 )
+ NEW met2 ( 1810790 3060 ) ( 1811710 * )
+ NEW met2 ( 1810790 2380 ) ( * 3060 )
+ NEW met2 ( 1809410 2380 ) ( 1810790 * )
+ NEW met1 ( 608350 2553230 ) ( 942310 * )
+ NEW met2 ( 942310 66470 ) ( * 2553230 )
+ NEW met1 ( 942310 66470 ) ( 1809410 * )
+ NEW met2 ( 1809410 2380 ) ( * 66470 )
+ NEW met2 ( 608350 2559860 ) M2M3_PR_M
+ NEW met1 ( 608350 2553230 ) M1M2_PR
+ NEW met1 ( 942310 66470 ) M1M2_PR
+ NEW met1 ( 942310 2553230 ) M1M2_PR
+ NEW met1 ( 1809410 66470 ) M1M2_PR ;
- la_oenb[67] ( PIN la_oenb[67] ) ( chip_controller la_oenb[67] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2066180 0 ) ( 607430 * )
- NEW met2 ( 607430 2063290 ) ( * 2066180 )
- NEW met2 ( 1829190 2380 0 ) ( * 47770 )
- NEW met1 ( 607430 2063290 ) ( 1314450 * )
- NEW met2 ( 1314450 47770 ) ( * 2063290 )
- NEW met1 ( 1314450 47770 ) ( 1829190 * )
- NEW met2 ( 607430 2066180 ) M2M3_PR_M
- NEW met1 ( 607430 2063290 ) M1M2_PR
- NEW met1 ( 1829190 47770 ) M1M2_PR
- NEW met1 ( 1314450 47770 ) M1M2_PR
- NEW met1 ( 1314450 2063290 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2563260 0 ) ( 607890 * )
+ NEW met2 ( 607890 2560370 ) ( * 2563260 )
+ NEW met2 ( 997050 86530 ) ( * 2560370 )
+ NEW met2 ( 1828730 82800 ) ( * 86530 )
+ NEW met2 ( 1828730 82800 ) ( 1829190 * )
+ NEW met2 ( 1829190 2380 0 ) ( * 82800 )
+ NEW met1 ( 997050 86530 ) ( 1828730 * )
+ NEW met1 ( 607890 2560370 ) ( 997050 * )
+ NEW met1 ( 997050 86530 ) M1M2_PR
+ NEW met1 ( 1828730 86530 ) M1M2_PR
+ NEW met2 ( 607890 2563260 ) M2M3_PR_M
+ NEW met1 ( 607890 2560370 ) M1M2_PR
+ NEW met1 ( 997050 2560370 ) M1M2_PR ;
- la_oenb[68] ( PIN la_oenb[68] ) ( chip_controller la_oenb[68] ) + USE SIGNAL
- + ROUTED met2 ( 188830 2077570 ) ( * 2080460 )
- NEW met3 ( 188830 2080460 ) ( 200100 * 0 )
- NEW met2 ( 1842530 82800 ) ( 1847130 * )
- NEW met2 ( 1847130 2380 0 ) ( * 82800 )
- NEW met2 ( 1842530 82800 ) ( * 410550 )
- NEW met1 ( 158470 410550 ) ( 1842530 * )
- NEW met2 ( 158470 410550 ) ( * 2077570 )
- NEW met1 ( 158470 2077570 ) ( 188830 * )
- NEW met1 ( 1842530 410550 ) M1M2_PR
- NEW met1 ( 188830 2077570 ) M1M2_PR
- NEW met2 ( 188830 2080460 ) M2M3_PR_M
- NEW met1 ( 158470 410550 ) M1M2_PR
- NEW met1 ( 158470 2077570 ) M1M2_PR ;
+ + ROUTED met2 ( 129950 72930 ) ( * 2546770 )
+ NEW met2 ( 189750 2546770 ) ( * 2548980 )
+ NEW met3 ( 189750 2548980 ) ( 201020 * )
+ NEW met3 ( 201020 2548980 ) ( * 2549660 0 )
+ NEW met2 ( 1847130 2380 0 ) ( * 72930 )
+ NEW met1 ( 129950 2546770 ) ( 189750 * )
+ NEW met1 ( 129950 72930 ) ( 1847130 * )
+ NEW met1 ( 129950 72930 ) M1M2_PR
+ NEW met1 ( 129950 2546770 ) M1M2_PR
+ NEW met1 ( 189750 2546770 ) M1M2_PR
+ NEW met2 ( 189750 2548980 ) M2M3_PR_M
+ NEW met1 ( 1847130 72930 ) M1M2_PR ;
- la_oenb[69] ( PIN la_oenb[69] ) ( chip_controller la_oenb[69] ) + USE SIGNAL
- + ROUTED met2 ( 1864610 2380 0 ) ( * 16490 )
- NEW met1 ( 1859550 16490 ) ( 1864610 * )
- NEW met2 ( 487830 1800300 0 ) ( 489670 * )
- NEW met2 ( 489670 1729410 ) ( * 1800300 )
- NEW met2 ( 1859550 16490 ) ( * 1729410 )
- NEW met1 ( 489670 1729410 ) ( 1859550 * )
- NEW met1 ( 489670 1729410 ) M1M2_PR
- NEW met1 ( 1864610 16490 ) M1M2_PR
- NEW met1 ( 1859550 16490 ) M1M2_PR
- NEW met1 ( 1859550 1729410 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2571420 0 ) ( 608350 * )
+ NEW met2 ( 608350 2567510 ) ( * 2571420 )
+ NEW met2 ( 1052710 73950 ) ( * 2567510 )
+ NEW met2 ( 1864610 2380 0 ) ( * 73950 )
+ NEW met1 ( 608350 2567510 ) ( 1052710 * )
+ NEW met1 ( 1052710 73950 ) ( 1864610 * )
+ NEW met2 ( 608350 2571420 ) M2M3_PR_M
+ NEW met1 ( 608350 2567510 ) M1M2_PR
+ NEW met1 ( 1052710 73950 ) M1M2_PR
+ NEW met1 ( 1052710 2567510 ) M1M2_PR
+ NEW met1 ( 1864610 73950 ) M1M2_PR ;
- la_oenb[6] ( PIN la_oenb[6] ) ( chip_controller la_oenb[6] ) + USE SIGNAL
- + ROUTED met3 ( 194810 1851980 ) ( 200100 * 0 )
+ + ROUTED met3 ( 185610 2338180 ) ( 201020 * )
+ NEW met3 ( 201020 2338180 ) ( * 2338860 0 )
NEW met2 ( 745430 82800 ) ( 747730 * )
NEW met2 ( 747730 2380 0 ) ( * 82800 )
- NEW met1 ( 194810 1796050 ) ( 745430 * )
- NEW met2 ( 745430 82800 ) ( * 1796050 )
- NEW met2 ( 194810 1796050 ) ( * 1851980 )
- NEW met2 ( 194810 1851980 ) M2M3_PR_M
- NEW met1 ( 194810 1796050 ) M1M2_PR
- NEW met1 ( 745430 1796050 ) M1M2_PR ;
+ NEW met2 ( 745430 82800 ) ( * 2302650 )
+ NEW met2 ( 184230 2331380 ) ( 185610 * )
+ NEW met2 ( 184230 2302650 ) ( * 2331380 )
+ NEW met2 ( 185610 2331380 ) ( * 2338180 )
+ NEW met1 ( 184230 2302650 ) ( 745430 * )
+ NEW met2 ( 185610 2338180 ) M2M3_PR_M
+ NEW met1 ( 745430 2302650 ) M1M2_PR
+ NEW met1 ( 184230 2302650 ) M1M2_PR ;
- la_oenb[70] ( PIN la_oenb[70] ) ( chip_controller la_oenb[70] ) + USE SIGNAL
- + ROUTED met2 ( 187910 2083860 ) ( * 2084370 )
- NEW met3 ( 187910 2083860 ) ( 200100 * 0 )
+ + ROUTED met3 ( 599380 2574140 0 ) ( 607430 * )
+ NEW met2 ( 607430 2574140 ) ( * 2574310 )
+ NEW met2 ( 1086750 130050 ) ( * 2574310 )
NEW met2 ( 1882550 2380 0 ) ( * 3060 )
NEW met2 ( 1881630 3060 ) ( 1882550 * )
NEW met2 ( 1881630 2380 ) ( * 3060 )
NEW met2 ( 1880250 2380 ) ( 1881630 * )
- NEW met1 ( 142370 1757630 ) ( 1877030 * )
- NEW met2 ( 142370 1757630 ) ( * 2084370 )
- NEW met1 ( 142370 2084370 ) ( 187910 * )
+ NEW met1 ( 1086750 130050 ) ( 1877030 * )
+ NEW met1 ( 607430 2574310 ) ( 1086750 * )
+ NEW met2 ( 1877030 82800 ) ( * 130050 )
NEW met2 ( 1877030 82800 ) ( 1880250 * )
NEW met2 ( 1880250 2380 ) ( * 82800 )
- NEW met2 ( 1877030 82800 ) ( * 1757630 )
- NEW met1 ( 187910 2084370 ) M1M2_PR
- NEW met2 ( 187910 2083860 ) M2M3_PR_M
- NEW met1 ( 142370 1757630 ) M1M2_PR
- NEW met1 ( 1877030 1757630 ) M1M2_PR
- NEW met1 ( 142370 2084370 ) M1M2_PR ;
+ NEW met1 ( 1086750 130050 ) M1M2_PR
+ NEW met2 ( 607430 2574140 ) M2M3_PR_M
+ NEW met1 ( 607430 2574310 ) M1M2_PR
+ NEW met1 ( 1086750 2574310 ) M1M2_PR
+ NEW met1 ( 1877030 130050 ) M1M2_PR ;
- la_oenb[71] ( PIN la_oenb[71] ) ( chip_controller la_oenb[71] ) + USE SIGNAL
- + ROUTED met2 ( 188830 2084030 ) ( * 2085220 )
- NEW met3 ( 188830 2085220 ) ( 200100 * 0 )
+ + ROUTED met3 ( 599380 2576180 0 ) ( 608350 * )
+ NEW met2 ( 608350 2573970 ) ( * 2576180 )
NEW met2 ( 1900030 2380 0 ) ( * 3060 )
NEW met2 ( 1899110 3060 ) ( 1900030 * )
NEW met2 ( 1899110 2380 ) ( * 3060 )
NEW met2 ( 1897730 2380 ) ( 1899110 * )
- NEW met2 ( 137770 65790 ) ( * 2084030 )
- NEW met1 ( 137770 2084030 ) ( 188830 * )
- NEW met1 ( 137770 65790 ) ( 1897730 * )
- NEW met2 ( 1897730 2380 ) ( * 65790 )
- NEW met1 ( 188830 2084030 ) M1M2_PR
- NEW met2 ( 188830 2085220 ) M2M3_PR_M
- NEW met1 ( 137770 65790 ) M1M2_PR
- NEW met1 ( 137770 2084030 ) M1M2_PR
- NEW met1 ( 1897730 65790 ) M1M2_PR ;
+ NEW met1 ( 608350 2573970 ) ( 1121710 * )
+ NEW met2 ( 1121710 66810 ) ( * 2573970 )
+ NEW met1 ( 1121710 66810 ) ( 1897730 * )
+ NEW met2 ( 1897730 2380 ) ( * 66810 )
+ NEW met2 ( 608350 2576180 ) M2M3_PR_M
+ NEW met1 ( 608350 2573970 ) M1M2_PR
+ NEW met1 ( 1121710 66810 ) M1M2_PR
+ NEW met1 ( 1121710 2573970 ) M1M2_PR
+ NEW met1 ( 1897730 66810 ) M1M2_PR ;
- la_oenb[72] ( PIN la_oenb[72] ) ( chip_controller la_oenb[72] ) + USE SIGNAL
- + ROUTED met2 ( 478630 2199460 0 ) ( * 2216630 )
- NEW met2 ( 1383450 20570 ) ( * 2216630 )
- NEW met1 ( 478630 2216630 ) ( 1383450 * )
- NEW met2 ( 1917970 2380 0 ) ( * 20570 )
- NEW met1 ( 1383450 20570 ) ( 1917970 * )
- NEW met1 ( 478630 2216630 ) M1M2_PR
- NEW met1 ( 1383450 20570 ) M1M2_PR
- NEW met1 ( 1383450 2216630 ) M1M2_PR
- NEW met1 ( 1917970 20570 ) M1M2_PR ;
+ + ROUTED met2 ( 190210 2553570 ) ( * 2554420 )
+ NEW met3 ( 190210 2554420 ) ( 201020 * )
+ NEW met3 ( 201020 2554420 ) ( * 2555100 0 )
+ NEW met2 ( 143290 134810 ) ( * 2553570 )
+ NEW met1 ( 143290 2553570 ) ( 190210 * )
+ NEW met1 ( 1911990 58310 ) ( 1917970 * )
+ NEW met2 ( 1917970 2380 0 ) ( * 58310 )
+ NEW met1 ( 143290 134810 ) ( 1911990 * )
+ NEW met2 ( 1911990 58310 ) ( * 134810 )
+ NEW met1 ( 190210 2553570 ) M1M2_PR
+ NEW met2 ( 190210 2554420 ) M2M3_PR_M
+ NEW met1 ( 143290 134810 ) M1M2_PR
+ NEW met1 ( 143290 2553570 ) M1M2_PR
+ NEW met1 ( 1911990 58310 ) M1M2_PR
+ NEW met1 ( 1917970 58310 ) M1M2_PR
+ NEW met1 ( 1911990 134810 ) M1M2_PR ;
- la_oenb[73] ( PIN la_oenb[73] ) ( chip_controller la_oenb[73] ) + USE SIGNAL
- + ROUTED met2 ( 1935910 2380 0 ) ( * 20230 )
- NEW met2 ( 480470 2199460 0 ) ( * 2217650 )
- NEW met1 ( 480470 2217650 ) ( 1321350 * )
- NEW met1 ( 1321350 20230 ) ( 1935910 * )
- NEW met2 ( 1321350 20230 ) ( * 2217650 )
- NEW met1 ( 480470 2217650 ) M1M2_PR
- NEW met1 ( 1935910 20230 ) M1M2_PR
- NEW met1 ( 1321350 20230 ) M1M2_PR
- NEW met1 ( 1321350 2217650 ) M1M2_PR ;
+ + ROUTED met2 ( 1935910 2380 0 ) ( * 3060 )
+ NEW met2 ( 1934990 3060 ) ( 1935910 * )
+ NEW met2 ( 1934990 2380 ) ( * 3060 )
+ NEW met2 ( 1933610 2380 ) ( 1934990 * )
+ NEW met2 ( 506690 2289220 ) ( * 2300100 0 )
+ NEW met2 ( 1933610 2380 ) ( * 79730 )
+ NEW met3 ( 506690 2289220 ) ( 908270 * )
+ NEW met2 ( 908270 79730 ) ( * 2289220 )
+ NEW met1 ( 908270 79730 ) ( 1933610 * )
+ NEW met2 ( 506690 2289220 ) M2M3_PR_M
+ NEW met1 ( 1933610 79730 ) M1M2_PR
+ NEW met1 ( 908270 79730 ) M1M2_PR
+ NEW met2 ( 908270 2289220 ) M2M3_PR_M ;
- la_oenb[74] ( PIN la_oenb[74] ) ( chip_controller la_oenb[74] ) + USE SIGNAL
- + ROUTED met2 ( 1953390 2380 0 ) ( * 18190 )
- NEW met2 ( 481850 2199460 0 ) ( * 2220710 )
- NEW met1 ( 481850 2220710 ) ( 714150 * )
- NEW met1 ( 714150 18190 ) ( 1953390 * )
- NEW met2 ( 714150 18190 ) ( * 2220710 )
- NEW met1 ( 481850 2220710 ) M1M2_PR
- NEW met1 ( 1953390 18190 ) M1M2_PR
- NEW met1 ( 714150 18190 ) M1M2_PR
- NEW met1 ( 714150 2220710 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2583660 0 ) ( 608350 * )
+ NEW met2 ( 608350 2581450 ) ( * 2583660 )
+ NEW met2 ( 1176450 61370 ) ( * 2581450 )
+ NEW met2 ( 1953390 2380 0 ) ( * 61370 )
+ NEW met1 ( 608350 2581450 ) ( 1176450 * )
+ NEW met1 ( 1176450 61370 ) ( 1953390 * )
+ NEW met2 ( 608350 2583660 ) M2M3_PR_M
+ NEW met1 ( 608350 2581450 ) M1M2_PR
+ NEW met1 ( 1176450 61370 ) M1M2_PR
+ NEW met1 ( 1176450 2581450 ) M1M2_PR
+ NEW met1 ( 1953390 61370 ) M1M2_PR ;
- la_oenb[75] ( PIN la_oenb[75] ) ( chip_controller la_oenb[75] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2081140 0 ) ( 608350 * )
- NEW met2 ( 608350 2077230 ) ( * 2081140 )
- NEW met1 ( 1425310 1730430 ) ( 1966730 * )
- NEW met1 ( 608350 2077230 ) ( 1425310 * )
- NEW met2 ( 1425310 1730430 ) ( * 2077230 )
+ + ROUTED met2 ( 188830 2553230 ) ( * 2557820 )
+ NEW met3 ( 188830 2557820 ) ( 201020 * )
+ NEW met3 ( 201020 2557820 ) ( * 2558500 0 )
+ NEW met1 ( 170890 128010 ) ( 1966730 * )
+ NEW met1 ( 170890 2553230 ) ( 188830 * )
+ NEW met2 ( 1966730 82800 ) ( * 128010 )
NEW met2 ( 1966730 82800 ) ( 1971330 * )
NEW met2 ( 1971330 2380 0 ) ( * 82800 )
- NEW met2 ( 1966730 82800 ) ( * 1730430 )
- NEW met2 ( 608350 2081140 ) M2M3_PR_M
- NEW met1 ( 608350 2077230 ) M1M2_PR
- NEW met1 ( 1425310 1730430 ) M1M2_PR
- NEW met1 ( 1966730 1730430 ) M1M2_PR
- NEW met1 ( 1425310 2077230 ) M1M2_PR ;
+ NEW met2 ( 170890 128010 ) ( * 2553230 )
+ NEW met1 ( 188830 2553230 ) M1M2_PR
+ NEW met2 ( 188830 2557820 ) M2M3_PR_M
+ NEW met1 ( 170890 128010 ) M1M2_PR
+ NEW met1 ( 1966730 128010 ) M1M2_PR
+ NEW met1 ( 170890 2553230 ) M1M2_PR ;
- la_oenb[76] ( PIN la_oenb[76] ) ( chip_controller la_oenb[76] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2084540 0 ) ( 607430 * )
- NEW met2 ( 607430 2084370 ) ( * 2084540 )
- NEW met2 ( 1988810 2380 0 ) ( * 34170 )
- NEW met1 ( 1300650 34170 ) ( 1988810 * )
- NEW met1 ( 607430 2084370 ) ( 1300650 * )
- NEW met2 ( 1300650 34170 ) ( * 2084370 )
- NEW met2 ( 607430 2084540 ) M2M3_PR_M
- NEW met1 ( 607430 2084370 ) M1M2_PR
- NEW met1 ( 1300650 34170 ) M1M2_PR
- NEW met1 ( 1988810 34170 ) M1M2_PR
- NEW met1 ( 1300650 2084370 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2589780 0 ) ( 607890 * )
+ NEW met2 ( 607890 2587910 ) ( * 2589780 )
+ NEW met2 ( 1163110 40970 ) ( * 2587910 )
+ NEW met1 ( 607890 2587910 ) ( 1163110 * )
+ NEW met1 ( 1163110 40970 ) ( 1988810 * )
+ NEW met2 ( 1988810 2380 0 ) ( * 40970 )
+ NEW met2 ( 607890 2589780 ) M2M3_PR_M
+ NEW met1 ( 607890 2587910 ) M1M2_PR
+ NEW met1 ( 1163110 40970 ) M1M2_PR
+ NEW met1 ( 1163110 2587910 ) M1M2_PR
+ NEW met1 ( 1988810 40970 ) M1M2_PR ;
- la_oenb[77] ( PIN la_oenb[77] ) ( chip_controller la_oenb[77] ) + USE SIGNAL
- + ROUTED met2 ( 188830 2091170 ) ( * 2096100 )
- NEW met3 ( 188830 2096100 ) ( 200100 * 0 )
+ + ROUTED met2 ( 123050 183090 ) ( * 2567170 )
+ NEW met2 ( 189750 2567170 ) ( * 2568020 )
+ NEW met3 ( 189750 2568020 ) ( 200100 * )
+ NEW met3 ( 200100 2567340 0 ) ( * 2568020 )
NEW met2 ( 2006750 2380 0 ) ( * 3060 )
NEW met2 ( 2005830 3060 ) ( 2006750 * )
NEW met2 ( 2005830 2380 ) ( * 3060 )
NEW met2 ( 2004450 2380 ) ( 2005830 * )
- NEW met1 ( 162150 2091170 ) ( 188830 * )
+ NEW met1 ( 123050 183090 ) ( 2001230 * )
+ NEW met1 ( 123050 2567170 ) ( 189750 * )
NEW met2 ( 2001230 82800 ) ( 2004450 * )
NEW met2 ( 2004450 2380 ) ( * 82800 )
- NEW met1 ( 162150 1785510 ) ( 2001230 * )
- NEW met2 ( 2001230 82800 ) ( * 1785510 )
- NEW met2 ( 162150 1785510 ) ( * 2091170 )
- NEW met1 ( 188830 2091170 ) M1M2_PR
- NEW met2 ( 188830 2096100 ) M2M3_PR_M
- NEW met1 ( 162150 1785510 ) M1M2_PR
- NEW met1 ( 162150 2091170 ) M1M2_PR
- NEW met1 ( 2001230 1785510 ) M1M2_PR ;
+ NEW met2 ( 2001230 82800 ) ( * 183090 )
+ NEW met1 ( 123050 183090 ) M1M2_PR
+ NEW met1 ( 123050 2567170 ) M1M2_PR
+ NEW met1 ( 189750 2567170 ) M1M2_PR
+ NEW met2 ( 189750 2568020 ) M2M3_PR_M
+ NEW met1 ( 2001230 183090 ) M1M2_PR ;
- la_oenb[78] ( PIN la_oenb[78] ) ( chip_controller la_oenb[78] ) + USE SIGNAL
- + ROUTED met2 ( 2024230 2380 0 ) ( * 18530 )
- NEW met2 ( 491970 2199460 0 ) ( * 2220370 )
- NEW met1 ( 491970 2220370 ) ( 845250 * )
- NEW met1 ( 845250 18530 ) ( 2024230 * )
- NEW met2 ( 845250 18530 ) ( * 2220370 )
- NEW met1 ( 491970 2220370 ) M1M2_PR
- NEW met1 ( 2024230 18530 ) M1M2_PR
- NEW met1 ( 845250 18530 ) M1M2_PR
- NEW met1 ( 845250 2220370 ) M1M2_PR ;
+ + ROUTED met2 ( 2024230 2380 0 ) ( * 17170 )
+ NEW met2 ( 509910 2300100 0 ) ( 510370 * )
+ NEW met2 ( 510370 108290 ) ( * 2300100 )
+ NEW met1 ( 510370 108290 ) ( 1907850 * )
+ NEW met1 ( 1907850 17170 ) ( 2024230 * )
+ NEW met2 ( 1907850 17170 ) ( * 108290 )
+ NEW met1 ( 510370 108290 ) M1M2_PR
+ NEW met1 ( 2024230 17170 ) M1M2_PR
+ NEW met1 ( 1907850 17170 ) M1M2_PR
+ NEW met1 ( 1907850 108290 ) M1M2_PR ;
- la_oenb[79] ( PIN la_oenb[79] ) ( chip_controller la_oenb[79] ) + USE SIGNAL
- + ROUTED met2 ( 2042170 2380 0 ) ( * 17850 )
- NEW met2 ( 495650 2199460 ) ( 496570 * 0 )
- NEW met2 ( 495650 2199460 ) ( * 2216460 )
- NEW met2 ( 783150 82800 ) ( 783610 * )
- NEW met2 ( 783610 17850 ) ( * 82800 )
- NEW met2 ( 783150 82800 ) ( * 2216460 )
- NEW met3 ( 495650 2216460 ) ( 783150 * )
- NEW met1 ( 783610 17850 ) ( 2042170 * )
- NEW met2 ( 495650 2216460 ) M2M3_PR_M
- NEW met1 ( 783610 17850 ) M1M2_PR
- NEW met2 ( 783150 2216460 ) M2M3_PR_M
- NEW met1 ( 2042170 17850 ) M1M2_PR ;
+ + ROUTED met2 ( 189290 2566830 ) ( * 2573460 )
+ NEW met3 ( 189290 2573460 ) ( 200100 * )
+ NEW met3 ( 200100 2572780 0 ) ( * 2573460 )
+ NEW met1 ( 2036190 58310 ) ( 2042170 * )
+ NEW met2 ( 2036190 58310 ) ( * 121210 )
+ NEW met2 ( 2042170 2380 0 ) ( * 58310 )
+ NEW met1 ( 172730 121210 ) ( 2036190 * )
+ NEW met1 ( 172730 2566830 ) ( 189290 * )
+ NEW met2 ( 172730 121210 ) ( * 2566830 )
+ NEW met1 ( 2036190 121210 ) M1M2_PR
+ NEW met1 ( 189290 2566830 ) M1M2_PR
+ NEW met2 ( 189290 2573460 ) M2M3_PR_M
+ NEW met1 ( 2036190 58310 ) M1M2_PR
+ NEW met1 ( 2042170 58310 ) M1M2_PR
+ NEW met1 ( 172730 121210 ) M1M2_PR
+ NEW met1 ( 172730 2566830 ) M1M2_PR ;
- la_oenb[7] ( PIN la_oenb[7] ) ( chip_controller la_oenb[7] ) + USE SIGNAL
- + ROUTED met2 ( 765210 2380 0 ) ( * 18530 )
- NEW met1 ( 759230 18530 ) ( 765210 * )
- NEW met2 ( 759230 18530 ) ( * 2200650 )
- NEW met1 ( 249550 2210170 ) ( 554530 * )
- NEW met2 ( 249550 2199460 0 ) ( * 2210170 )
- NEW met2 ( 554530 2200650 ) ( * 2210170 )
- NEW met1 ( 554530 2200650 ) ( 759230 * )
- NEW met1 ( 765210 18530 ) M1M2_PR
- NEW met1 ( 759230 18530 ) M1M2_PR
- NEW met1 ( 759230 2200650 ) M1M2_PR
- NEW met1 ( 249550 2210170 ) M1M2_PR
- NEW met1 ( 554530 2210170 ) M1M2_PR
- NEW met1 ( 554530 2200650 ) M1M2_PR ;
+ + ROUTED met2 ( 190670 2339710 ) ( * 2345660 )
+ NEW met3 ( 190670 2345660 ) ( 199180 * )
+ NEW met3 ( 199180 2345660 ) ( * 2346340 )
+ NEW met3 ( 199180 2346340 ) ( 200100 * )
+ NEW met3 ( 200100 2345660 0 ) ( * 2346340 )
+ NEW met2 ( 765210 2380 0 ) ( * 17340 )
+ NEW met2 ( 761990 17340 ) ( 765210 * )
+ NEW met2 ( 759230 82800 ) ( 761990 * )
+ NEW met2 ( 761990 17340 ) ( * 82800 )
+ NEW met2 ( 759230 82800 ) ( * 2302310 )
+ NEW met1 ( 165370 2339710 ) ( 190670 * )
+ NEW met2 ( 165370 2302310 ) ( * 2339710 )
+ NEW met1 ( 165370 2302310 ) ( 759230 * )
+ NEW met1 ( 190670 2339710 ) M1M2_PR
+ NEW met2 ( 190670 2345660 ) M2M3_PR_M
+ NEW met1 ( 759230 2302310 ) M1M2_PR
+ NEW met1 ( 165370 2339710 ) M1M2_PR
+ NEW met1 ( 165370 2302310 ) M1M2_PR ;
- la_oenb[80] ( PIN la_oenb[80] ) ( chip_controller la_oenb[80] ) + USE SIGNAL
- + ROUTED met2 ( 188370 2097970 ) ( * 2102900 )
- NEW met3 ( 188370 2102900 ) ( 200100 * 0 )
- NEW met2 ( 2056430 82800 ) ( 2059650 * )
- NEW met2 ( 2059650 2380 0 ) ( * 82800 )
- NEW met2 ( 2056430 82800 ) ( * 1770550 )
- NEW met1 ( 142830 1770550 ) ( 2056430 * )
- NEW met2 ( 142830 1770550 ) ( * 2097970 )
- NEW met1 ( 142830 2097970 ) ( 188370 * )
- NEW met1 ( 2056430 1770550 ) M1M2_PR
- NEW met1 ( 188370 2097970 ) M1M2_PR
- NEW met2 ( 188370 2102900 ) M2M3_PR_M
- NEW met1 ( 142830 1770550 ) M1M2_PR
- NEW met1 ( 142830 2097970 ) M1M2_PR ;
+ + ROUTED met2 ( 504390 2699940 ) ( 504850 * 0 )
+ NEW met2 ( 504390 2699940 ) ( * 2701300 )
+ NEW met2 ( 2059650 2380 0 ) ( * 15300 )
+ NEW met3 ( 1024650 15300 ) ( 2059650 * )
+ NEW met2 ( 1024650 15300 ) ( * 2701300 )
+ NEW met3 ( 504390 2701300 ) ( 1024650 * )
+ NEW met2 ( 504390 2701300 ) M2M3_PR_M
+ NEW met2 ( 2059650 15300 ) M2M3_PR_M
+ NEW met2 ( 1024650 15300 ) M2M3_PR_M
+ NEW met2 ( 1024650 2701300 ) M2M3_PR_M ;
- la_oenb[81] ( PIN la_oenb[81] ) ( chip_controller la_oenb[81] ) + USE SIGNAL
- + ROUTED met2 ( 502090 1800300 0 ) ( 503470 * )
- NEW met2 ( 503470 1736550 ) ( * 1800300 )
- NEW met1 ( 503470 1736550 ) ( 1894050 * )
- NEW met2 ( 2077590 2380 0 ) ( * 16830 )
- NEW met1 ( 1894050 16830 ) ( 2077590 * )
- NEW met2 ( 1894050 16830 ) ( * 1736550 )
- NEW met1 ( 503470 1736550 ) M1M2_PR
- NEW met1 ( 1894050 16830 ) M1M2_PR
- NEW met1 ( 1894050 1736550 ) M1M2_PR
- NEW met1 ( 2077590 16830 ) M1M2_PR ;
+ + ROUTED met2 ( 2059650 17170 ) ( * 114750 )
+ NEW met1 ( 523250 114750 ) ( 2059650 * )
+ NEW met2 ( 2077590 2380 0 ) ( * 17170 )
+ NEW met1 ( 2059650 17170 ) ( 2077590 * )
+ NEW met1 ( 518190 2284290 ) ( 523250 * )
+ NEW met2 ( 518190 2284290 ) ( * 2300100 0 )
+ NEW met2 ( 523250 114750 ) ( * 2284290 )
+ NEW met1 ( 2059650 17170 ) M1M2_PR
+ NEW met1 ( 2059650 114750 ) M1M2_PR
+ NEW met1 ( 523250 114750 ) M1M2_PR
+ NEW met1 ( 2077590 17170 ) M1M2_PR
+ NEW met1 ( 523250 2284290 ) M1M2_PR
+ NEW met1 ( 518190 2284290 ) M1M2_PR ;
- la_oenb[82] ( PIN la_oenb[82] ) ( chip_controller la_oenb[82] ) + USE SIGNAL
- + ROUTED met2 ( 187910 2097630 ) ( * 2104260 )
- NEW met3 ( 187910 2104260 ) ( 200100 * 0 )
+ + ROUTED met2 ( 189750 2574990 ) ( * 2578900 )
+ NEW met3 ( 189750 2578900 ) ( 200100 * )
+ NEW met3 ( 200100 2578220 0 ) ( * 2578900 )
NEW met2 ( 2095070 2380 0 ) ( * 3060 )
NEW met2 ( 2094150 3060 ) ( 2095070 * )
NEW met2 ( 2094150 2380 ) ( * 3060 )
NEW met2 ( 2092770 2380 ) ( 2094150 * )
- NEW met1 ( 136390 1728730 ) ( 2090930 * )
- NEW met2 ( 136390 1728730 ) ( * 2097630 )
- NEW met1 ( 136390 2097630 ) ( 187910 * )
+ NEW met2 ( 148810 177310 ) ( * 2574990 )
+ NEW met1 ( 148810 2574990 ) ( 189750 * )
NEW met2 ( 2090930 82800 ) ( 2092770 * )
NEW met2 ( 2092770 2380 ) ( * 82800 )
- NEW met2 ( 2090930 82800 ) ( * 1728730 )
- NEW met1 ( 187910 2097630 ) M1M2_PR
- NEW met2 ( 187910 2104260 ) M2M3_PR_M
- NEW met1 ( 136390 1728730 ) M1M2_PR
- NEW met1 ( 2090930 1728730 ) M1M2_PR
- NEW met1 ( 136390 2097630 ) M1M2_PR ;
+ NEW met1 ( 148810 177310 ) ( 2090930 * )
+ NEW met2 ( 2090930 82800 ) ( * 177310 )
+ NEW met1 ( 189750 2574990 ) M1M2_PR
+ NEW met2 ( 189750 2578900 ) M2M3_PR_M
+ NEW met1 ( 148810 177310 ) M1M2_PR
+ NEW met1 ( 148810 2574990 ) M1M2_PR
+ NEW met1 ( 2090930 177310 ) M1M2_PR ;
- la_oenb[83] ( PIN la_oenb[83] ) ( chip_controller la_oenb[83] ) + USE SIGNAL
- + ROUTED met2 ( 188370 2104770 ) ( * 2109700 )
- NEW met3 ( 188370 2109700 ) ( 200100 * 0 )
+ + ROUTED met3 ( 599380 2602700 0 ) ( 607890 * )
+ NEW met2 ( 607890 2601850 ) ( * 2602700 )
+ NEW met2 ( 1170010 100470 ) ( * 2601850 )
+ NEW met2 ( 2111630 82800 ) ( * 100470 )
NEW met2 ( 2111630 82800 ) ( 2113010 * )
NEW met2 ( 2113010 2380 0 ) ( * 82800 )
- NEW met2 ( 2111630 82800 ) ( * 1721930 )
- NEW met1 ( 170890 2104770 ) ( 188370 * )
- NEW met1 ( 170890 1721930 ) ( 2111630 * )
- NEW met2 ( 170890 1721930 ) ( * 2104770 )
- NEW met1 ( 188370 2104770 ) M1M2_PR
- NEW met2 ( 188370 2109700 ) M2M3_PR_M
- NEW met1 ( 2111630 1721930 ) M1M2_PR
- NEW met1 ( 170890 1721930 ) M1M2_PR
- NEW met1 ( 170890 2104770 ) M1M2_PR ;
+ NEW met1 ( 607890 2601850 ) ( 1170010 * )
+ NEW met1 ( 1170010 100470 ) ( 2111630 * )
+ NEW met2 ( 607890 2602700 ) M2M3_PR_M
+ NEW met1 ( 607890 2601850 ) M1M2_PR
+ NEW met1 ( 1170010 100470 ) M1M2_PR
+ NEW met1 ( 1170010 2601850 ) M1M2_PR
+ NEW met1 ( 2111630 100470 ) M1M2_PR ;
- la_oenb[84] ( PIN la_oenb[84] ) ( chip_controller la_oenb[84] ) + USE SIGNAL
- + ROUTED met2 ( 188830 2111570 ) ( * 2114460 )
- NEW met3 ( 188830 2114460 ) ( 200100 * 0 )
- NEW met2 ( 2130950 2380 0 ) ( * 3060 )
- NEW met2 ( 2130030 3060 ) ( 2130950 * )
- NEW met2 ( 2130030 2380 ) ( * 3060 )
- NEW met2 ( 2128650 2380 ) ( 2130030 * )
- NEW met2 ( 2125430 82800 ) ( 2128650 * )
- NEW met2 ( 2128650 2380 ) ( * 82800 )
- NEW met2 ( 2125430 82800 ) ( * 1749470 )
- NEW met1 ( 135930 2111570 ) ( 188830 * )
- NEW met1 ( 135930 1749470 ) ( 2125430 * )
- NEW met2 ( 135930 1749470 ) ( * 2111570 )
- NEW met1 ( 188830 2111570 ) M1M2_PR
- NEW met2 ( 188830 2114460 ) M2M3_PR_M
- NEW met1 ( 2125430 1749470 ) M1M2_PR
- NEW met1 ( 135930 1749470 ) M1M2_PR
- NEW met1 ( 135930 2111570 ) M1M2_PR ;
+ + ROUTED met2 ( 513130 2699940 ) ( 513590 * 0 )
+ NEW met2 ( 513130 2699940 ) ( * 2708780 )
+ NEW met2 ( 2130950 2380 0 ) ( * 19380 )
+ NEW met2 ( 707250 19380 ) ( * 2708780 )
+ NEW met3 ( 707250 19380 ) ( 2130950 * )
+ NEW met3 ( 513130 2708780 ) ( 707250 * )
+ NEW met2 ( 513130 2708780 ) M2M3_PR_M
+ NEW met2 ( 707250 19380 ) M2M3_PR_M
+ NEW met2 ( 707250 2708780 ) M2M3_PR_M
+ NEW met2 ( 2130950 19380 ) M2M3_PR_M ;
- la_oenb[85] ( PIN la_oenb[85] ) ( chip_controller la_oenb[85] ) + USE SIGNAL
+ ROUTED met2 ( 2148430 2380 0 ) ( * 3060 )
NEW met2 ( 2147510 3060 ) ( 2148430 * )
NEW met2 ( 2147510 2380 ) ( * 3060 )
NEW met2 ( 2146130 2380 ) ( 2147510 * )
- NEW met3 ( 599380 2105620 0 ) ( 607890 * )
- NEW met2 ( 607890 2104770 ) ( * 2105620 )
- NEW met2 ( 2146130 2380 ) ( * 1722950 )
- NEW met1 ( 607890 2104770 ) ( 1404610 * )
- NEW met2 ( 1404610 1722950 ) ( * 2104770 )
- NEW met1 ( 1404610 1722950 ) ( 2146130 * )
- NEW met2 ( 607890 2105620 ) M2M3_PR_M
- NEW met1 ( 607890 2104770 ) M1M2_PR
- NEW met1 ( 2146130 1722950 ) M1M2_PR
- NEW met1 ( 1404610 1722950 ) M1M2_PR
- NEW met1 ( 1404610 2104770 ) M1M2_PR ;
+ NEW met2 ( 2146130 2380 ) ( * 107270 )
+ NEW met1 ( 523710 107270 ) ( 2146130 * )
+ NEW met2 ( 523250 2300100 0 ) ( 523710 * )
+ NEW met2 ( 523710 107270 ) ( * 2300100 )
+ NEW met1 ( 2146130 107270 ) M1M2_PR
+ NEW met1 ( 523710 107270 ) M1M2_PR ;
- la_oenb[86] ( PIN la_oenb[86] ) ( chip_controller la_oenb[86] ) + USE SIGNAL
- + ROUTED met2 ( 189750 2118710 ) ( * 2119900 )
- NEW met3 ( 189750 2119900 ) ( 200100 * 0 )
- NEW met1 ( 147890 2118710 ) ( 189750 * )
- NEW met2 ( 2166370 2380 0 ) ( * 18190 )
- NEW met1 ( 2159930 18190 ) ( 2166370 * )
- NEW met2 ( 147890 1777350 ) ( * 2118710 )
- NEW met1 ( 147890 1777350 ) ( 2159930 * )
- NEW met2 ( 2159930 18190 ) ( * 1777350 )
- NEW met1 ( 189750 2118710 ) M1M2_PR
- NEW met2 ( 189750 2119900 ) M2M3_PR_M
- NEW met1 ( 147890 2118710 ) M1M2_PR
- NEW met1 ( 2166370 18190 ) M1M2_PR
- NEW met1 ( 2159930 18190 ) M1M2_PR
- NEW met1 ( 147890 1777350 ) M1M2_PR
- NEW met1 ( 2159930 1777350 ) M1M2_PR ;
+ + ROUTED met1 ( 182390 2587570 ) ( 190210 * )
+ NEW met2 ( 190210 2587570 ) ( * 2589780 )
+ NEW met3 ( 190210 2589780 ) ( 200100 * )
+ NEW met3 ( 200100 2589100 0 ) ( * 2589780 )
+ NEW met2 ( 2166370 2380 0 ) ( * 3570 )
+ NEW met1 ( 2159930 3570 ) ( 2166370 * )
+ NEW met1 ( 182390 141950 ) ( 2159930 * )
+ NEW met2 ( 2159930 3570 ) ( * 141950 )
+ NEW met2 ( 182390 141950 ) ( * 2587570 )
+ NEW met1 ( 182390 141950 ) M1M2_PR
+ NEW met1 ( 182390 2587570 ) M1M2_PR
+ NEW met1 ( 190210 2587570 ) M1M2_PR
+ NEW met2 ( 190210 2589780 ) M2M3_PR_M
+ NEW met1 ( 2166370 3570 ) M1M2_PR
+ NEW met1 ( 2159930 3570 ) M1M2_PR
+ NEW met1 ( 2159930 141950 ) M1M2_PR ;
- la_oenb[87] ( PIN la_oenb[87] ) ( chip_controller la_oenb[87] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2106980 0 ) ( 607430 * )
- NEW met2 ( 607430 2105450 ) ( * 2106980 )
- NEW met2 ( 797410 1722270 ) ( * 2105450 )
- NEW met1 ( 607430 2105450 ) ( 797410 * )
+ + ROUTED met3 ( 599380 2612220 0 ) ( 608350 * )
+ NEW met2 ( 608350 2608310 ) ( * 2612220 )
+ NEW met1 ( 608350 2608310 ) ( 1231650 * )
+ NEW met2 ( 1231650 157590 ) ( * 2608310 )
NEW met2 ( 2180630 82800 ) ( 2183850 * )
NEW met2 ( 2183850 2380 0 ) ( * 82800 )
- NEW met1 ( 797410 1722270 ) ( 2180630 * )
- NEW met2 ( 2180630 82800 ) ( * 1722270 )
- NEW met2 ( 607430 2106980 ) M2M3_PR_M
- NEW met1 ( 607430 2105450 ) M1M2_PR
- NEW met1 ( 797410 1722270 ) M1M2_PR
- NEW met1 ( 797410 2105450 ) M1M2_PR
- NEW met1 ( 2180630 1722270 ) M1M2_PR ;
+ NEW met1 ( 1231650 157590 ) ( 2180630 * )
+ NEW met2 ( 2180630 82800 ) ( * 157590 )
+ NEW met2 ( 608350 2612220 ) M2M3_PR_M
+ NEW met1 ( 608350 2608310 ) M1M2_PR
+ NEW met1 ( 1231650 2608310 ) M1M2_PR
+ NEW met1 ( 1231650 157590 ) M1M2_PR
+ NEW met1 ( 2180630 157590 ) M1M2_PR ;
- la_oenb[88] ( PIN la_oenb[88] ) ( chip_controller la_oenb[88] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2111740 0 ) ( 607430 * )
- NEW met2 ( 607430 2111740 ) ( * 2111910 )
- NEW met2 ( 803850 134470 ) ( * 2111910 )
- NEW met1 ( 607430 2111910 ) ( 803850 * )
- NEW met1 ( 803850 134470 ) ( 2201790 * )
- NEW met2 ( 2201790 2380 0 ) ( * 134470 )
- NEW met2 ( 607430 2111740 ) M2M3_PR_M
- NEW met1 ( 607430 2111910 ) M1M2_PR
- NEW met1 ( 803850 2111910 ) M1M2_PR
- NEW met1 ( 803850 134470 ) M1M2_PR
- NEW met1 ( 2201790 134470 ) M1M2_PR ;
+ + ROUTED met2 ( 796950 20060 ) ( * 2722380 )
+ NEW met2 ( 520490 2699940 ) ( 520950 * 0 )
+ NEW met2 ( 520490 2699940 ) ( * 2722380 )
+ NEW met3 ( 520490 2722380 ) ( 796950 * )
+ NEW met2 ( 2201790 2380 0 ) ( * 20060 )
+ NEW met3 ( 796950 20060 ) ( 2201790 * )
+ NEW met2 ( 796950 20060 ) M2M3_PR_M
+ NEW met2 ( 796950 2722380 ) M2M3_PR_M
+ NEW met2 ( 520490 2722380 ) M2M3_PR_M
+ NEW met2 ( 2201790 20060 ) M2M3_PR_M ;
- la_oenb[89] ( PIN la_oenb[89] ) ( chip_controller la_oenb[89] ) + USE SIGNAL
- + ROUTED met2 ( 2219270 2380 0 ) ( * 19550 )
- NEW met2 ( 511290 2199460 0 ) ( * 2203540 )
- NEW met2 ( 1252350 19550 ) ( * 2203540 )
- NEW met1 ( 1252350 19550 ) ( 2219270 * )
- NEW met3 ( 511290 2203540 ) ( 1252350 * )
- NEW met1 ( 1252350 19550 ) M1M2_PR
- NEW met1 ( 2219270 19550 ) M1M2_PR
- NEW met2 ( 511290 2203540 ) M2M3_PR_M
- NEW met2 ( 1252350 2203540 ) M2M3_PR_M ;
+ + ROUTED met2 ( 2219270 2380 0 ) ( * 17510 )
+ NEW met2 ( 2128650 17510 ) ( * 107950 )
+ NEW met1 ( 537510 107950 ) ( 2128650 * )
+ NEW met1 ( 2128650 17510 ) ( 2219270 * )
+ NEW met1 ( 535210 2284630 ) ( 537510 * )
+ NEW met2 ( 535210 2284630 ) ( * 2300100 0 )
+ NEW met2 ( 537510 107950 ) ( * 2284630 )
+ NEW met1 ( 2128650 17510 ) M1M2_PR
+ NEW met1 ( 2128650 107950 ) M1M2_PR
+ NEW met1 ( 2219270 17510 ) M1M2_PR
+ NEW met1 ( 537510 107950 ) M1M2_PR
+ NEW met1 ( 537510 2284630 ) M1M2_PR
+ NEW met1 ( 535210 2284630 ) M1M2_PR ;
- la_oenb[8] ( PIN la_oenb[8] ) ( chip_controller la_oenb[8] ) + USE SIGNAL
- + ROUTED met2 ( 783150 2380 0 ) ( * 17850 )
- NEW met1 ( 755550 17850 ) ( 783150 * )
- NEW met1 ( 262430 2218670 ) ( 755550 * )
- NEW met2 ( 262430 2199460 0 ) ( * 2218670 )
- NEW met2 ( 755550 17850 ) ( * 2218670 )
- NEW met1 ( 783150 17850 ) M1M2_PR
- NEW met1 ( 262430 2218670 ) M1M2_PR
- NEW met1 ( 755550 17850 ) M1M2_PR
- NEW met1 ( 755550 2218670 ) M1M2_PR ;
+ + ROUTED met2 ( 783150 2380 0 ) ( * 3060 )
+ NEW met2 ( 782230 3060 ) ( 783150 * )
+ NEW met2 ( 782230 2380 ) ( * 3060 )
+ NEW met2 ( 780850 2380 ) ( 782230 * )
+ NEW met2 ( 190670 2352970 ) ( * 2353820 )
+ NEW met3 ( 190670 2353820 ) ( 200100 * )
+ NEW met3 ( 200100 2353140 0 ) ( * 2353820 )
+ NEW met2 ( 779930 82800 ) ( 780850 * )
+ NEW met2 ( 780850 2380 ) ( * 82800 )
+ NEW met2 ( 779930 82800 ) ( * 2301970 )
+ NEW met1 ( 164450 2352970 ) ( 190670 * )
+ NEW met2 ( 164450 2301970 ) ( * 2352970 )
+ NEW met1 ( 164450 2301970 ) ( 779930 * )
+ NEW met1 ( 190670 2352970 ) M1M2_PR
+ NEW met2 ( 190670 2353820 ) M2M3_PR_M
+ NEW met1 ( 779930 2301970 ) M1M2_PR
+ NEW met1 ( 164450 2352970 ) M1M2_PR
+ NEW met1 ( 164450 2301970 ) M1M2_PR ;
- la_oenb[90] ( PIN la_oenb[90] ) ( chip_controller la_oenb[90] ) + USE SIGNAL
- + ROUTED met2 ( 189750 2125510 ) ( * 2126700 )
- NEW met3 ( 189750 2126700 ) ( 200100 * 0 )
+ + ROUTED met2 ( 189750 2595050 ) ( * 2595900 )
+ NEW met3 ( 189750 2595900 ) ( 201020 * )
+ NEW met3 ( 201020 2595900 ) ( * 2596580 0 )
+ NEW met2 ( 2235830 82800 ) ( * 99790 )
NEW met2 ( 2235830 82800 ) ( 2237210 * )
NEW met2 ( 2237210 2380 0 ) ( * 82800 )
- NEW met2 ( 2235830 82800 ) ( * 1763070 )
- NEW met1 ( 143750 2125510 ) ( 189750 * )
- NEW met1 ( 143750 1763070 ) ( 2235830 * )
- NEW met2 ( 143750 1763070 ) ( * 2125510 )
- NEW met1 ( 189750 2125510 ) M1M2_PR
- NEW met2 ( 189750 2126700 ) M2M3_PR_M
- NEW met1 ( 2235830 1763070 ) M1M2_PR
- NEW met1 ( 143750 1763070 ) M1M2_PR
- NEW met1 ( 143750 2125510 ) M1M2_PR ;
+ NEW met1 ( 137770 2595050 ) ( 189750 * )
+ NEW met1 ( 137770 99790 ) ( 2235830 * )
+ NEW met2 ( 137770 99790 ) ( * 2595050 )
+ NEW met1 ( 189750 2595050 ) M1M2_PR
+ NEW met2 ( 189750 2595900 ) M2M3_PR_M
+ NEW met1 ( 2235830 99790 ) M1M2_PR
+ NEW met1 ( 137770 99790 ) M1M2_PR
+ NEW met1 ( 137770 2595050 ) M1M2_PR ;
- la_oenb[91] ( PIN la_oenb[91] ) ( chip_controller la_oenb[91] ) + USE SIGNAL
- + ROUTED met2 ( 2254690 2380 0 ) ( * 16830 )
- NEW met2 ( 665850 17170 ) ( * 2217140 )
- NEW met3 ( 517730 2217140 ) ( 665850 * )
- NEW met1 ( 665850 17170 ) ( 2159700 * )
- NEW met1 ( 2159700 16830 ) ( * 17170 )
- NEW met1 ( 2159700 16830 ) ( 2254690 * )
- NEW met2 ( 517730 2199460 0 ) ( * 2217140 )
- NEW met1 ( 665850 17170 ) M1M2_PR
- NEW met2 ( 665850 2217140 ) M2M3_PR_M
- NEW met1 ( 2254690 16830 ) M1M2_PR
- NEW met2 ( 517730 2217140 ) M2M3_PR_M ;
+ + ROUTED met2 ( 2254690 2380 0 ) ( * 17340 )
+ NEW met2 ( 2252850 17340 ) ( 2254690 * )
+ NEW met2 ( 687470 135830 ) ( * 2714220 )
+ NEW met2 ( 2252850 17340 ) ( * 34500 )
+ NEW met2 ( 2249630 34500 ) ( 2252850 * )
+ NEW met2 ( 2249630 34500 ) ( * 135830 )
+ NEW met2 ( 526010 2699260 0 ) ( 527390 * )
+ NEW met2 ( 527390 2699260 ) ( * 2714220 )
+ NEW met1 ( 687470 135830 ) ( 2249630 * )
+ NEW met3 ( 527390 2714220 ) ( 687470 * )
+ NEW met2 ( 687470 2714220 ) M2M3_PR_M
+ NEW met1 ( 687470 135830 ) M1M2_PR
+ NEW met1 ( 2249630 135830 ) M1M2_PR
+ NEW met2 ( 527390 2714220 ) M2M3_PR_M ;
- la_oenb[92] ( PIN la_oenb[92] ) ( chip_controller la_oenb[92] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2121940 0 ) ( 607890 * )
- NEW met2 ( 607890 2118710 ) ( * 2121940 )
- NEW met1 ( 607890 2118710 ) ( 1003950 * )
- NEW met2 ( 2272630 2380 0 ) ( * 3060 )
- NEW met2 ( 2271710 3060 ) ( 2272630 * )
- NEW met2 ( 2271710 2380 ) ( * 3060 )
- NEW met2 ( 2270330 2380 ) ( 2271710 * )
- NEW met2 ( 1003950 1715130 ) ( * 2118710 )
- NEW met1 ( 1003950 1715130 ) ( 2270330 * )
- NEW met2 ( 2270330 2380 ) ( * 1715130 )
- NEW met2 ( 607890 2121940 ) M2M3_PR_M
- NEW met1 ( 607890 2118710 ) M1M2_PR
- NEW met1 ( 1003950 2118710 ) M1M2_PR
- NEW met1 ( 1003950 1715130 ) M1M2_PR
- NEW met1 ( 2270330 1715130 ) M1M2_PR ;
+ + ROUTED met2 ( 2245950 17510 ) ( * 128690 )
+ NEW met1 ( 543490 128690 ) ( 2245950 * )
+ NEW met2 ( 2272630 2380 0 ) ( * 17510 )
+ NEW met1 ( 2245950 17510 ) ( 2272630 * )
+ NEW met2 ( 543490 128690 ) ( * 2256300 )
+ NEW met2 ( 541650 2256300 ) ( 543490 * )
+ NEW met2 ( 541650 2256300 ) ( * 2300100 )
+ NEW met2 ( 540270 2300100 0 ) ( 541650 * )
+ NEW met1 ( 2245950 17510 ) M1M2_PR
+ NEW met1 ( 2245950 128690 ) M1M2_PR
+ NEW met1 ( 543490 128690 ) M1M2_PR
+ NEW met1 ( 2272630 17510 ) M1M2_PR ;
- la_oenb[93] ( PIN la_oenb[93] ) ( chip_controller la_oenb[93] ) + USE SIGNAL
- + ROUTED met2 ( 189750 2132140 ) ( * 2132310 )
- NEW met3 ( 189750 2132140 ) ( 200100 * 0 )
- NEW met1 ( 136850 2132310 ) ( 189750 * )
- NEW met2 ( 2290570 2380 0 ) ( * 17850 )
- NEW met1 ( 2284130 17850 ) ( 2290570 * )
- NEW met1 ( 136850 1741990 ) ( 2284130 * )
- NEW met2 ( 136850 1741990 ) ( * 2132310 )
- NEW met2 ( 2284130 17850 ) ( * 1741990 )
- NEW met1 ( 189750 2132310 ) M1M2_PR
- NEW met2 ( 189750 2132140 ) M2M3_PR_M
- NEW met1 ( 136850 1741990 ) M1M2_PR
- NEW met1 ( 136850 2132310 ) M1M2_PR
- NEW met1 ( 2290570 17850 ) M1M2_PR
- NEW met1 ( 2284130 17850 ) M1M2_PR
- NEW met1 ( 2284130 1741990 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2627860 0 ) ( 608810 * )
+ NEW met2 ( 608810 2622930 ) ( * 2627860 )
+ NEW met2 ( 887110 115090 ) ( * 2622930 )
+ NEW met1 ( 608810 2622930 ) ( 887110 * )
+ NEW met1 ( 887110 115090 ) ( 2284590 * )
+ NEW met1 ( 2284590 58310 ) ( 2290570 * )
+ NEW met2 ( 2284590 58310 ) ( * 115090 )
+ NEW met2 ( 2290570 2380 0 ) ( * 58310 )
+ NEW met2 ( 608810 2627860 ) M2M3_PR_M
+ NEW met1 ( 608810 2622930 ) M1M2_PR
+ NEW met1 ( 887110 115090 ) M1M2_PR
+ NEW met1 ( 887110 2622930 ) M1M2_PR
+ NEW met1 ( 2284590 115090 ) M1M2_PR
+ NEW met1 ( 2284590 58310 ) M1M2_PR
+ NEW met1 ( 2290570 58310 ) M1M2_PR ;
- la_oenb[94] ( PIN la_oenb[94] ) ( chip_controller la_oenb[94] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2128060 0 ) ( 607430 * )
- NEW met2 ( 607430 2126190 ) ( * 2128060 )
+ + ROUTED met3 ( 599380 2629220 0 ) ( 607430 * )
+ NEW met2 ( 607430 2629220 ) ( * 2629730 )
+ NEW met2 ( 1252350 122570 ) ( * 2629730 )
+ NEW met2 ( 2304830 82800 ) ( * 122570 )
NEW met2 ( 2304830 82800 ) ( 2308050 * )
NEW met2 ( 2308050 2380 0 ) ( * 82800 )
- NEW met2 ( 2304830 82800 ) ( * 1729750 )
- NEW met1 ( 607430 2126190 ) ( 935410 * )
- NEW met1 ( 935410 1729750 ) ( 2304830 * )
- NEW met2 ( 935410 1729750 ) ( * 2126190 )
- NEW met2 ( 607430 2128060 ) M2M3_PR_M
- NEW met1 ( 607430 2126190 ) M1M2_PR
- NEW met1 ( 2304830 1729750 ) M1M2_PR
- NEW met1 ( 935410 1729750 ) M1M2_PR
- NEW met1 ( 935410 2126190 ) M1M2_PR ;
+ NEW met1 ( 607430 2629730 ) ( 1252350 * )
+ NEW met1 ( 1252350 122570 ) ( 2304830 * )
+ NEW met2 ( 607430 2629220 ) M2M3_PR_M
+ NEW met1 ( 607430 2629730 ) M1M2_PR
+ NEW met1 ( 1252350 122570 ) M1M2_PR
+ NEW met1 ( 1252350 2629730 ) M1M2_PR
+ NEW met1 ( 2304830 122570 ) M1M2_PR ;
- la_oenb[95] ( PIN la_oenb[95] ) ( chip_controller la_oenb[95] ) + USE SIGNAL
- + ROUTED met3 ( 599380 2134180 0 ) ( 607890 * )
- NEW met2 ( 607890 2132990 ) ( * 2134180 )
- NEW met2 ( 2325990 2380 0 ) ( * 34500 )
- NEW met2 ( 2325530 34500 ) ( 2325990 * )
- NEW met2 ( 2325530 34500 ) ( * 1714450 )
- NEW met1 ( 607890 2132990 ) ( 1032010 * )
- NEW met2 ( 1032010 1714450 ) ( * 2132990 )
- NEW met1 ( 1032010 1714450 ) ( 2325530 * )
- NEW met2 ( 607890 2134180 ) M2M3_PR_M
- NEW met1 ( 607890 2132990 ) M1M2_PR
- NEW met1 ( 2325530 1714450 ) M1M2_PR
- NEW met1 ( 1032010 2132990 ) M1M2_PR
- NEW met1 ( 1032010 1714450 ) M1M2_PR ;
+ + ROUTED met2 ( 2325990 2380 0 ) ( * 17510 )
+ NEW met1 ( 2273550 17510 ) ( 2325990 * )
+ NEW met1 ( 543950 114410 ) ( 2273550 * )
+ NEW met2 ( 543030 2278340 ) ( 543950 * )
+ NEW met2 ( 543030 2278340 ) ( * 2300100 )
+ NEW met2 ( 542110 2300100 0 ) ( 543030 * )
+ NEW met2 ( 543950 114410 ) ( * 2278340 )
+ NEW met2 ( 2273550 17510 ) ( * 114410 )
+ NEW met1 ( 2325990 17510 ) M1M2_PR
+ NEW met1 ( 543950 114410 ) M1M2_PR
+ NEW met1 ( 2273550 17510 ) M1M2_PR
+ NEW met1 ( 2273550 114410 ) M1M2_PR ;
- la_oenb[96] ( PIN la_oenb[96] ) ( chip_controller la_oenb[96] ) + USE SIGNAL
- + ROUTED met2 ( 2343470 2380 0 ) ( * 19890 )
- NEW met1 ( 1818150 19890 ) ( 2343470 * )
- NEW met1 ( 534750 1787210 ) ( 537970 * )
- NEW met2 ( 534750 1787210 ) ( * 1800300 0 )
- NEW met2 ( 537970 1714790 ) ( * 1787210 )
- NEW met1 ( 537970 1714790 ) ( 1818150 * )
- NEW met2 ( 1818150 19890 ) ( * 1714790 )
- NEW met1 ( 2343470 19890 ) M1M2_PR
- NEW met1 ( 1818150 19890 ) M1M2_PR
- NEW met1 ( 537970 1714790 ) M1M2_PR
- NEW met1 ( 537970 1787210 ) M1M2_PR
- NEW met1 ( 534750 1787210 ) M1M2_PR
- NEW met1 ( 1818150 1714790 ) M1M2_PR ;
+ + ROUTED met2 ( 2343470 2380 0 ) ( * 17170 )
+ NEW met2 ( 2156250 17170 ) ( * 93330 )
+ NEW met1 ( 544410 93330 ) ( 2156250 * )
+ NEW met1 ( 2156250 17170 ) ( 2343470 * )
+ NEW met2 ( 543490 2300100 0 ) ( 544410 * )
+ NEW met2 ( 544410 93330 ) ( * 2300100 )
+ NEW met1 ( 2156250 17170 ) M1M2_PR
+ NEW met1 ( 2156250 93330 ) M1M2_PR
+ NEW met1 ( 2343470 17170 ) M1M2_PR
+ NEW met1 ( 544410 93330 ) M1M2_PR ;
- la_oenb[97] ( PIN la_oenb[97] ) ( chip_controller la_oenb[97] ) + USE SIGNAL
- + ROUTED met2 ( 879750 17510 ) ( * 2198950 )
- NEW met2 ( 2361410 2380 0 ) ( * 17510 )
- NEW met1 ( 879750 17510 ) ( 2361410 * )
- NEW met1 ( 524630 2198950 ) ( * 2199630 )
- NEW met2 ( 524630 2199460 ) ( * 2199630 )
- NEW met2 ( 524170 2199460 0 ) ( 524630 * )
- NEW met1 ( 524630 2198950 ) ( 879750 * )
- NEW met1 ( 879750 17510 ) M1M2_PR
- NEW met1 ( 879750 2198950 ) M1M2_PR
- NEW met1 ( 2361410 17510 ) M1M2_PR
- NEW met1 ( 524630 2199630 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2638740 0 ) ( 608350 * )
+ NEW met2 ( 608350 2636190 ) ( * 2638740 )
+ NEW met2 ( 1072950 121890 ) ( * 2636190 )
+ NEW met1 ( 608350 2636190 ) ( 1072950 * )
+ NEW met1 ( 1072950 121890 ) ( 2360030 * )
+ NEW met2 ( 2360030 82800 ) ( * 121890 )
+ NEW met2 ( 2360030 82800 ) ( 2361410 * )
+ NEW met2 ( 2361410 2380 0 ) ( * 82800 )
+ NEW met2 ( 608350 2638740 ) M2M3_PR_M
+ NEW met1 ( 608350 2636190 ) M1M2_PR
+ NEW met1 ( 1072950 121890 ) M1M2_PR
+ NEW met1 ( 1072950 2636190 ) M1M2_PR
+ NEW met1 ( 2360030 121890 ) M1M2_PR ;
- la_oenb[98] ( PIN la_oenb[98] ) ( chip_controller la_oenb[98] ) + USE SIGNAL
- + ROUTED met3 ( 527390 2217820 ) ( 1231650 * )
- NEW met2 ( 2378890 2380 0 ) ( * 19210 )
- NEW met1 ( 1231190 19210 ) ( 2378890 * )
- NEW met2 ( 527390 2199460 0 ) ( * 2217820 )
- NEW met2 ( 1231190 19210 ) ( * 34500 )
- NEW met2 ( 1231190 34500 ) ( 1231650 * )
- NEW met2 ( 1231650 34500 ) ( * 2217820 )
- NEW met2 ( 527390 2217820 ) M2M3_PR_M
- NEW met1 ( 1231190 19210 ) M1M2_PR
- NEW met2 ( 1231650 2217820 ) M2M3_PR_M
- NEW met1 ( 2378890 19210 ) M1M2_PR ;
+ + ROUTED met2 ( 537510 2699940 ) ( 537970 * 0 )
+ NEW met2 ( 537510 2699940 ) ( * 2702660 )
+ NEW met2 ( 2378890 2380 0 ) ( * 18700 )
+ NEW met3 ( 721050 18700 ) ( 2378890 * )
+ NEW met2 ( 721050 18700 ) ( * 2702660 )
+ NEW met3 ( 537510 2702660 ) ( 721050 * )
+ NEW met2 ( 537510 2702660 ) M2M3_PR_M
+ NEW met2 ( 721050 18700 ) M2M3_PR_M
+ NEW met2 ( 721050 2702660 ) M2M3_PR_M
+ NEW met2 ( 2378890 18700 ) M2M3_PR_M ;
- la_oenb[99] ( PIN la_oenb[99] ) ( chip_controller la_oenb[99] ) + USE SIGNAL
- + ROUTED met2 ( 2396830 2380 0 ) ( * 3060 )
- NEW met2 ( 2395910 3060 ) ( 2396830 * )
- NEW met2 ( 2395910 2380 ) ( * 3060 )
- NEW met2 ( 2394530 2380 ) ( 2395910 * )
- NEW met1 ( 540730 1787210 ) ( 544410 * )
- NEW met2 ( 540730 1787210 ) ( * 1800300 0 )
- NEW met2 ( 544410 72590 ) ( * 1787210 )
- NEW met1 ( 544410 72590 ) ( 2394530 * )
- NEW met2 ( 2394530 2380 ) ( * 72590 )
- NEW met1 ( 544410 72590 ) M1M2_PR
- NEW met1 ( 544410 1787210 ) M1M2_PR
- NEW met1 ( 540730 1787210 ) M1M2_PR
- NEW met1 ( 2394530 72590 ) M1M2_PR ;
+ + ROUTED met2 ( 1066050 15980 ) ( * 2721020 )
+ NEW met2 ( 541650 2699260 0 ) ( 543030 * )
+ NEW met2 ( 543030 2699260 ) ( * 2721020 )
+ NEW met3 ( 543030 2721020 ) ( 1066050 * )
+ NEW met2 ( 2396830 2380 0 ) ( * 15980 )
+ NEW met3 ( 1066050 15980 ) ( 2396830 * )
+ NEW met2 ( 1066050 15980 ) M2M3_PR_M
+ NEW met2 ( 1066050 2721020 ) M2M3_PR_M
+ NEW met2 ( 543030 2721020 ) M2M3_PR_M
+ NEW met2 ( 2396830 15980 ) M2M3_PR_M ;
- la_oenb[9] ( PIN la_oenb[9] ) ( chip_controller la_oenb[9] ) + USE SIGNAL
- + ROUTED met2 ( 800630 2380 0 ) ( * 16830 )
- NEW met1 ( 796950 16830 ) ( 800630 * )
- NEW met2 ( 796950 16830 ) ( * 2224450 )
- NEW met1 ( 272090 2224450 ) ( 796950 * )
- NEW met2 ( 272090 2199460 0 ) ( * 2224450 )
- NEW met1 ( 800630 16830 ) M1M2_PR
- NEW met1 ( 796950 16830 ) M1M2_PR
- NEW met1 ( 796950 2224450 ) M1M2_PR
- NEW met1 ( 272090 2224450 ) M1M2_PR ;
- - read_data_from_mem\[0\] ( chip_controller rd_data_out[0] ) + USE SIGNAL ;
- - read_data_from_mem\[100\] ( chip_controller rd_data_out[100] ) + USE SIGNAL ;
- - read_data_from_mem\[101\] ( chip_controller rd_data_out[101] ) + USE SIGNAL ;
- - read_data_from_mem\[102\] ( chip_controller rd_data_out[102] ) + USE SIGNAL ;
- - read_data_from_mem\[103\] ( chip_controller rd_data_out[103] ) + USE SIGNAL ;
- - read_data_from_mem\[104\] ( chip_controller rd_data_out[104] ) + USE SIGNAL ;
- - read_data_from_mem\[105\] ( chip_controller rd_data_out[105] ) + USE SIGNAL ;
- - read_data_from_mem\[106\] ( chip_controller rd_data_out[106] ) + USE SIGNAL ;
- - read_data_from_mem\[107\] ( chip_controller rd_data_out[107] ) + USE SIGNAL ;
- - read_data_from_mem\[108\] ( chip_controller rd_data_out[108] ) + USE SIGNAL ;
- - read_data_from_mem\[109\] ( chip_controller rd_data_out[109] ) + USE SIGNAL ;
- - read_data_from_mem\[10\] ( chip_controller rd_data_out[10] ) + USE SIGNAL ;
- - read_data_from_mem\[110\] ( chip_controller rd_data_out[110] ) + USE SIGNAL ;
- - read_data_from_mem\[111\] ( chip_controller rd_data_out[111] ) + USE SIGNAL ;
- - read_data_from_mem\[112\] ( chip_controller rd_data_out[112] ) + USE SIGNAL ;
- - read_data_from_mem\[113\] ( chip_controller rd_data_out[113] ) + USE SIGNAL ;
- - read_data_from_mem\[114\] ( chip_controller rd_data_out[114] ) + USE SIGNAL ;
- - read_data_from_mem\[115\] ( chip_controller rd_data_out[115] ) + USE SIGNAL ;
- - read_data_from_mem\[116\] ( chip_controller rd_data_out[116] ) + USE SIGNAL ;
- - read_data_from_mem\[117\] ( chip_controller rd_data_out[117] ) + USE SIGNAL ;
- - read_data_from_mem\[118\] ( chip_controller rd_data_out[118] ) + USE SIGNAL ;
- - read_data_from_mem\[119\] ( chip_controller rd_data_out[119] ) + USE SIGNAL ;
- - read_data_from_mem\[11\] ( chip_controller rd_data_out[11] ) + USE SIGNAL ;
- - read_data_from_mem\[120\] ( chip_controller rd_data_out[120] ) + USE SIGNAL ;
- - read_data_from_mem\[121\] ( chip_controller rd_data_out[121] ) + USE SIGNAL ;
- - read_data_from_mem\[122\] ( chip_controller rd_data_out[122] ) + USE SIGNAL ;
- - read_data_from_mem\[123\] ( chip_controller rd_data_out[123] ) + USE SIGNAL ;
- - read_data_from_mem\[124\] ( chip_controller rd_data_out[124] ) + USE SIGNAL ;
- - read_data_from_mem\[125\] ( chip_controller rd_data_out[125] ) + USE SIGNAL ;
- - read_data_from_mem\[126\] ( chip_controller rd_data_out[126] ) + USE SIGNAL ;
- - read_data_from_mem\[127\] ( chip_controller rd_data_out[127] ) + USE SIGNAL ;
- - read_data_from_mem\[12\] ( chip_controller rd_data_out[12] ) + USE SIGNAL ;
- - read_data_from_mem\[13\] ( chip_controller rd_data_out[13] ) + USE SIGNAL ;
- - read_data_from_mem\[14\] ( chip_controller rd_data_out[14] ) + USE SIGNAL ;
- - read_data_from_mem\[15\] ( chip_controller rd_data_out[15] ) + USE SIGNAL ;
- - read_data_from_mem\[16\] ( chip_controller rd_data_out[16] ) + USE SIGNAL ;
- - read_data_from_mem\[17\] ( chip_controller rd_data_out[17] ) + USE SIGNAL ;
- - read_data_from_mem\[18\] ( chip_controller rd_data_out[18] ) + USE SIGNAL ;
- - read_data_from_mem\[19\] ( chip_controller rd_data_out[19] ) + USE SIGNAL ;
- - read_data_from_mem\[1\] ( chip_controller rd_data_out[1] ) + USE SIGNAL ;
- - read_data_from_mem\[20\] ( chip_controller rd_data_out[20] ) + USE SIGNAL ;
- - read_data_from_mem\[21\] ( chip_controller rd_data_out[21] ) + USE SIGNAL ;
- - read_data_from_mem\[22\] ( chip_controller rd_data_out[22] ) + USE SIGNAL ;
- - read_data_from_mem\[23\] ( chip_controller rd_data_out[23] ) + USE SIGNAL ;
- - read_data_from_mem\[24\] ( chip_controller rd_data_out[24] ) + USE SIGNAL ;
- - read_data_from_mem\[25\] ( chip_controller rd_data_out[25] ) + USE SIGNAL ;
- - read_data_from_mem\[26\] ( chip_controller rd_data_out[26] ) + USE SIGNAL ;
- - read_data_from_mem\[27\] ( chip_controller rd_data_out[27] ) + USE SIGNAL ;
- - read_data_from_mem\[28\] ( chip_controller rd_data_out[28] ) + USE SIGNAL ;
- - read_data_from_mem\[29\] ( chip_controller rd_data_out[29] ) + USE SIGNAL ;
- - read_data_from_mem\[2\] ( chip_controller rd_data_out[2] ) + USE SIGNAL ;
- - read_data_from_mem\[30\] ( chip_controller rd_data_out[30] ) + USE SIGNAL ;
- - read_data_from_mem\[31\] ( chip_controller rd_data_out[31] ) + USE SIGNAL ;
- - read_data_from_mem\[32\] ( chip_controller rd_data_out[32] ) + USE SIGNAL ;
- - read_data_from_mem\[33\] ( chip_controller rd_data_out[33] ) + USE SIGNAL ;
- - read_data_from_mem\[34\] ( chip_controller rd_data_out[34] ) + USE SIGNAL ;
- - read_data_from_mem\[35\] ( chip_controller rd_data_out[35] ) + USE SIGNAL ;
- - read_data_from_mem\[36\] ( chip_controller rd_data_out[36] ) + USE SIGNAL ;
- - read_data_from_mem\[37\] ( chip_controller rd_data_out[37] ) + USE SIGNAL ;
- - read_data_from_mem\[38\] ( chip_controller rd_data_out[38] ) + USE SIGNAL ;
- - read_data_from_mem\[39\] ( chip_controller rd_data_out[39] ) + USE SIGNAL ;
- - read_data_from_mem\[3\] ( chip_controller rd_data_out[3] ) + USE SIGNAL ;
- - read_data_from_mem\[40\] ( chip_controller rd_data_out[40] ) + USE SIGNAL ;
- - read_data_from_mem\[41\] ( chip_controller rd_data_out[41] ) + USE SIGNAL ;
- - read_data_from_mem\[42\] ( chip_controller rd_data_out[42] ) + USE SIGNAL ;
- - read_data_from_mem\[43\] ( chip_controller rd_data_out[43] ) + USE SIGNAL ;
- - read_data_from_mem\[44\] ( chip_controller rd_data_out[44] ) + USE SIGNAL ;
- - read_data_from_mem\[45\] ( chip_controller rd_data_out[45] ) + USE SIGNAL ;
- - read_data_from_mem\[46\] ( chip_controller rd_data_out[46] ) + USE SIGNAL ;
- - read_data_from_mem\[47\] ( chip_controller rd_data_out[47] ) + USE SIGNAL ;
- - read_data_from_mem\[48\] ( chip_controller rd_data_out[48] ) + USE SIGNAL ;
- - read_data_from_mem\[49\] ( chip_controller rd_data_out[49] ) + USE SIGNAL ;
- - read_data_from_mem\[4\] ( chip_controller rd_data_out[4] ) + USE SIGNAL ;
- - read_data_from_mem\[50\] ( chip_controller rd_data_out[50] ) + USE SIGNAL ;
- - read_data_from_mem\[51\] ( chip_controller rd_data_out[51] ) + USE SIGNAL ;
- - read_data_from_mem\[52\] ( chip_controller rd_data_out[52] ) + USE SIGNAL ;
- - read_data_from_mem\[53\] ( chip_controller rd_data_out[53] ) + USE SIGNAL ;
- - read_data_from_mem\[54\] ( chip_controller rd_data_out[54] ) + USE SIGNAL ;
- - read_data_from_mem\[55\] ( chip_controller rd_data_out[55] ) + USE SIGNAL ;
- - read_data_from_mem\[56\] ( chip_controller rd_data_out[56] ) + USE SIGNAL ;
- - read_data_from_mem\[57\] ( chip_controller rd_data_out[57] ) + USE SIGNAL ;
- - read_data_from_mem\[58\] ( chip_controller rd_data_out[58] ) + USE SIGNAL ;
- - read_data_from_mem\[59\] ( chip_controller rd_data_out[59] ) + USE SIGNAL ;
- - read_data_from_mem\[5\] ( chip_controller rd_data_out[5] ) + USE SIGNAL ;
- - read_data_from_mem\[60\] ( chip_controller rd_data_out[60] ) + USE SIGNAL ;
- - read_data_from_mem\[61\] ( chip_controller rd_data_out[61] ) + USE SIGNAL ;
- - read_data_from_mem\[62\] ( chip_controller rd_data_out[62] ) + USE SIGNAL ;
- - read_data_from_mem\[63\] ( chip_controller rd_data_out[63] ) + USE SIGNAL ;
- - read_data_from_mem\[64\] ( chip_controller rd_data_out[64] ) + USE SIGNAL ;
- - read_data_from_mem\[65\] ( chip_controller rd_data_out[65] ) + USE SIGNAL ;
- - read_data_from_mem\[66\] ( chip_controller rd_data_out[66] ) + USE SIGNAL ;
- - read_data_from_mem\[67\] ( chip_controller rd_data_out[67] ) + USE SIGNAL ;
- - read_data_from_mem\[68\] ( chip_controller rd_data_out[68] ) + USE SIGNAL ;
- - read_data_from_mem\[69\] ( chip_controller rd_data_out[69] ) + USE SIGNAL ;
- - read_data_from_mem\[6\] ( chip_controller rd_data_out[6] ) + USE SIGNAL ;
- - read_data_from_mem\[70\] ( chip_controller rd_data_out[70] ) + USE SIGNAL ;
- - read_data_from_mem\[71\] ( chip_controller rd_data_out[71] ) + USE SIGNAL ;
- - read_data_from_mem\[72\] ( chip_controller rd_data_out[72] ) + USE SIGNAL ;
- - read_data_from_mem\[73\] ( chip_controller rd_data_out[73] ) + USE SIGNAL ;
- - read_data_from_mem\[74\] ( chip_controller rd_data_out[74] ) + USE SIGNAL ;
- - read_data_from_mem\[75\] ( chip_controller rd_data_out[75] ) + USE SIGNAL ;
- - read_data_from_mem\[76\] ( chip_controller rd_data_out[76] ) + USE SIGNAL ;
- - read_data_from_mem\[77\] ( chip_controller rd_data_out[77] ) + USE SIGNAL ;
- - read_data_from_mem\[78\] ( chip_controller rd_data_out[78] ) + USE SIGNAL ;
- - read_data_from_mem\[79\] ( chip_controller rd_data_out[79] ) + USE SIGNAL ;
- - read_data_from_mem\[7\] ( chip_controller rd_data_out[7] ) + USE SIGNAL ;
- - read_data_from_mem\[80\] ( chip_controller rd_data_out[80] ) + USE SIGNAL ;
- - read_data_from_mem\[81\] ( chip_controller rd_data_out[81] ) + USE SIGNAL ;
- - read_data_from_mem\[82\] ( chip_controller rd_data_out[82] ) + USE SIGNAL ;
- - read_data_from_mem\[83\] ( chip_controller rd_data_out[83] ) + USE SIGNAL ;
- - read_data_from_mem\[84\] ( chip_controller rd_data_out[84] ) + USE SIGNAL ;
- - read_data_from_mem\[85\] ( chip_controller rd_data_out[85] ) + USE SIGNAL ;
- - read_data_from_mem\[86\] ( chip_controller rd_data_out[86] ) + USE SIGNAL ;
- - read_data_from_mem\[87\] ( chip_controller rd_data_out[87] ) + USE SIGNAL ;
- - read_data_from_mem\[88\] ( chip_controller rd_data_out[88] ) + USE SIGNAL ;
- - read_data_from_mem\[89\] ( chip_controller rd_data_out[89] ) + USE SIGNAL ;
- - read_data_from_mem\[8\] ( chip_controller rd_data_out[8] ) + USE SIGNAL ;
- - read_data_from_mem\[90\] ( chip_controller rd_data_out[90] ) + USE SIGNAL ;
- - read_data_from_mem\[91\] ( chip_controller rd_data_out[91] ) + USE SIGNAL ;
- - read_data_from_mem\[92\] ( chip_controller rd_data_out[92] ) + USE SIGNAL ;
- - read_data_from_mem\[93\] ( chip_controller rd_data_out[93] ) + USE SIGNAL ;
- - read_data_from_mem\[94\] ( chip_controller rd_data_out[94] ) + USE SIGNAL ;
- - read_data_from_mem\[95\] ( chip_controller rd_data_out[95] ) + USE SIGNAL ;
- - read_data_from_mem\[96\] ( chip_controller rd_data_out[96] ) + USE SIGNAL ;
- - read_data_from_mem\[97\] ( chip_controller rd_data_out[97] ) + USE SIGNAL ;
- - read_data_from_mem\[98\] ( chip_controller rd_data_out[98] ) + USE SIGNAL ;
- - read_data_from_mem\[99\] ( chip_controller rd_data_out[99] ) + USE SIGNAL ;
- - read_data_from_mem\[9\] ( chip_controller rd_data_out[9] ) + USE SIGNAL ;
+ + ROUTED met2 ( 187910 2353310 ) ( * 2357900 )
+ NEW met3 ( 187910 2357900 ) ( 201020 * )
+ NEW met3 ( 201020 2357900 ) ( * 2358580 0 )
+ NEW met2 ( 800630 2380 0 ) ( * 34500 )
+ NEW met2 ( 800630 34500 ) ( 801090 * )
+ NEW met2 ( 801090 34500 ) ( * 2279870 )
+ NEW met2 ( 158010 2279870 ) ( * 2353310 )
+ NEW met1 ( 158010 2353310 ) ( 187910 * )
+ NEW met1 ( 158010 2279870 ) ( 801090 * )
+ NEW met1 ( 187910 2353310 ) M1M2_PR
+ NEW met2 ( 187910 2357900 ) M2M3_PR_M
+ NEW met1 ( 801090 2279870 ) M1M2_PR
+ NEW met1 ( 158010 2279870 ) M1M2_PR
+ NEW met1 ( 158010 2353310 ) M1M2_PR ;
+ - read_data_from_mem\[0\] ( core0 data_from_mem[0] ) ( chip_controller rd_data_out[0] ) + USE SIGNAL
+ + ROUTED met3 ( 201940 2280380 ) ( 204700 * )
+ NEW met4 ( 204700 204340 ) ( * 2280380 )
+ NEW met2 ( 1320430 202300 ) ( 1322270 * 0 )
+ NEW met3 ( 1306170 202300 ) ( 1320430 * )
+ NEW met2 ( 1306170 202300 ) ( * 204340 )
+ NEW met3 ( 204700 204340 ) ( 1306170 * )
+ NEW met3 ( 201940 2305540 ) ( * 2306220 0 )
+ NEW met4 ( 201940 2280380 ) ( * 2305540 )
+ NEW met3 ( 204700 204340 ) M3M4_PR_M
+ NEW met3 ( 201940 2280380 ) M3M4_PR_M
+ NEW met3 ( 204700 2280380 ) M3M4_PR_M
+ NEW met2 ( 1320430 202300 ) M2M3_PR_M
+ NEW met2 ( 1306170 202300 ) M2M3_PR_M
+ NEW met2 ( 1306170 204340 ) M2M3_PR_M
+ NEW met3 ( 201940 2305540 ) M3M4_PR_M ;
+ - read_data_from_mem\[100\] ( core0 data_from_mem[100] ) ( chip_controller rd_data_out[100] ) + USE SIGNAL
+ + ROUTED met2 ( 1384830 1729410 ) ( * 2288710 )
+ NEW met1 ( 1384830 1729410 ) ( 2584050 * )
+ NEW li1 ( 556370 2288710 ) ( * 2291090 )
+ NEW met1 ( 551310 2291090 ) ( 556370 * )
+ NEW met2 ( 551310 2291090 ) ( * 2300100 )
+ NEW met2 ( 550390 2300100 0 ) ( 551310 * )
+ NEW met1 ( 556370 2288710 ) ( 1384830 * )
+ NEW met2 ( 2584050 1699660 0 ) ( * 1729410 )
+ NEW met1 ( 1384830 1729410 ) M1M2_PR
+ NEW met1 ( 1384830 2288710 ) M1M2_PR
+ NEW met1 ( 2584050 1729410 ) M1M2_PR
+ NEW li1 ( 556370 2288710 ) L1M1_PR_MR
+ NEW li1 ( 556370 2291090 ) L1M1_PR_MR
+ NEW met1 ( 551310 2291090 ) M1M2_PR ;
+ - read_data_from_mem\[101\] ( core0 data_from_mem[101] ) ( chip_controller rd_data_out[101] ) + USE SIGNAL
+ + ROUTED met2 ( 189290 2623270 ) ( * 2624460 )
+ NEW met3 ( 189290 2624460 ) ( 200100 * )
+ NEW met3 ( 200100 2623780 0 ) ( * 2624460 )
+ NEW met2 ( 1283630 1443300 ) ( * 1448910 )
+ NEW met2 ( 88550 1448910 ) ( * 2623270 )
+ NEW met1 ( 88550 2623270 ) ( 189290 * )
+ NEW met1 ( 88550 1448910 ) ( 1283630 * )
+ NEW met3 ( 1283630 1443300 ) ( 1300420 * 0 )
+ NEW met1 ( 88550 1448910 ) M1M2_PR
+ NEW met1 ( 88550 2623270 ) M1M2_PR
+ NEW met1 ( 189290 2623270 ) M1M2_PR
+ NEW met2 ( 189290 2624460 ) M2M3_PR_M
+ NEW met1 ( 1283630 1448910 ) M1M2_PR
+ NEW met2 ( 1283630 1443300 ) M2M3_PR_M ;
+ - read_data_from_mem\[102\] ( core0 data_from_mem[102] ) ( chip_controller rd_data_out[102] ) + USE SIGNAL
+ + ROUTED met2 ( 2608430 200260 ) ( 2610270 * 0 )
+ NEW met2 ( 1087210 170850 ) ( * 2287860 )
+ NEW met2 ( 2608430 170850 ) ( * 200260 )
+ NEW met2 ( 551770 2287860 ) ( * 2300100 0 )
+ NEW met3 ( 551770 2287860 ) ( 1087210 * )
+ NEW met1 ( 1087210 170850 ) ( 2608430 * )
+ NEW met1 ( 1087210 170850 ) M1M2_PR
+ NEW met2 ( 1087210 2287860 ) M2M3_PR_M
+ NEW met1 ( 2608430 170850 ) M1M2_PR
+ NEW met2 ( 551770 2287860 ) M2M3_PR_M ;
+ - read_data_from_mem\[103\] ( core0 data_from_mem[103] ) ( chip_controller rd_data_out[103] ) + USE SIGNAL
+ + ROUTED met2 ( 2622230 200260 ) ( 2625450 * 0 )
+ NEW met2 ( 2622230 171870 ) ( * 200260 )
+ NEW met2 ( 562350 171870 ) ( * 2256300 )
+ NEW met2 ( 560970 2256300 ) ( 562350 * )
+ NEW met2 ( 560970 2256300 ) ( * 2285990 )
+ NEW met1 ( 553610 2285990 ) ( 560970 * )
+ NEW met2 ( 553610 2285990 ) ( * 2300100 0 )
+ NEW met1 ( 562350 171870 ) ( 2622230 * )
+ NEW met1 ( 2622230 171870 ) M1M2_PR
+ NEW met1 ( 562350 171870 ) M1M2_PR
+ NEW met1 ( 560970 2285990 ) M1M2_PR
+ NEW met1 ( 553610 2285990 ) M1M2_PR ;
+ - read_data_from_mem\[104\] ( core0 data_from_mem[104] ) ( chip_controller rd_data_out[104] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 1463700 0 ) ( 2812670 * )
+ NEW met2 ( 2812670 1463700 ) ( * 1799790 )
+ NEW met2 ( 557290 2699260 0 ) ( 558670 * )
+ NEW met2 ( 558670 2699260 ) ( * 2717450 )
+ NEW met1 ( 603750 1799790 ) ( 2812670 * )
+ NEW met1 ( 558670 2717450 ) ( 603750 * )
+ NEW met2 ( 603750 1799790 ) ( * 2717450 )
+ NEW met2 ( 2812670 1463700 ) M2M3_PR_M
+ NEW met1 ( 603750 1799790 ) M1M2_PR
+ NEW met1 ( 2812670 1799790 ) M1M2_PR
+ NEW met1 ( 558670 2717450 ) M1M2_PR
+ NEW met1 ( 603750 2717450 ) M1M2_PR ;
+ - read_data_from_mem\[105\] ( core0 data_from_mem[105] ) ( chip_controller rd_data_out[105] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 1481380 0 ) ( 2808530 * )
+ NEW met2 ( 2808530 1481380 ) ( * 1481550 )
+ NEW met1 ( 2808530 1481550 ) ( 2817270 * )
+ NEW met2 ( 2817270 1481550 ) ( * 1777690 )
+ NEW met2 ( 561430 2277660 ) ( 564190 * )
+ NEW met2 ( 561430 2277660 ) ( * 2300100 )
+ NEW met2 ( 560510 2300100 0 ) ( 561430 * )
+ NEW met2 ( 564190 1777690 ) ( * 2277660 )
+ NEW met1 ( 564190 1777690 ) ( 2817270 * )
+ NEW met2 ( 2808530 1481380 ) M2M3_PR_M
+ NEW met1 ( 2808530 1481550 ) M1M2_PR
+ NEW met1 ( 2817270 1481550 ) M1M2_PR
+ NEW met1 ( 2817270 1777690 ) M1M2_PR
+ NEW met1 ( 564190 1777690 ) M1M2_PR ;
+ - read_data_from_mem\[106\] ( core0 data_from_mem[106] ) ( chip_controller rd_data_out[106] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2656420 0 ) ( 612950 * )
+ NEW met2 ( 2638330 1699660 ) ( 2640630 * 0 )
+ NEW li1 ( 2638330 1803190 ) ( * 1806930 )
+ NEW met2 ( 2638330 1699660 ) ( * 1803190 )
+ NEW met1 ( 612950 1806930 ) ( 2638330 * )
+ NEW met2 ( 612950 1806930 ) ( * 2656420 )
+ NEW met1 ( 612950 1806930 ) M1M2_PR
+ NEW met2 ( 612950 2656420 ) M2M3_PR_M
+ NEW li1 ( 2638330 1806930 ) L1M1_PR_MR
+ NEW li1 ( 2638330 1803190 ) L1M1_PR_MR
+ NEW met1 ( 2638330 1803190 ) M1M2_PR
+ NEW met1 ( 2638330 1803190 ) RECT ( -355 -70 0 70 ) ;
+ - read_data_from_mem\[107\] ( core0 data_from_mem[107] ) ( chip_controller rd_data_out[107] ) + USE SIGNAL
+ + ROUTED met2 ( 189750 2635850 ) ( * 2640780 )
+ NEW met3 ( 189750 2640780 ) ( 200100 * )
+ NEW met3 ( 200100 2640100 0 ) ( * 2640780 )
+ NEW met2 ( 2640630 193290 ) ( * 200260 0 )
+ NEW met2 ( 89470 193290 ) ( * 2635850 )
+ NEW met1 ( 89470 2635850 ) ( 189750 * )
+ NEW met1 ( 89470 193290 ) ( 2640630 * )
+ NEW met1 ( 89470 193290 ) M1M2_PR
+ NEW met1 ( 89470 2635850 ) M1M2_PR
+ NEW met1 ( 189750 2635850 ) M1M2_PR
+ NEW met2 ( 189750 2640780 ) M2M3_PR_M
+ NEW met1 ( 2640630 193290 ) M1M2_PR ;
+ - read_data_from_mem\[108\] ( core0 data_from_mem[108] ) ( chip_controller rd_data_out[108] ) + USE SIGNAL
+ + ROUTED met1 ( 566950 2289390 ) ( 583510 * )
+ NEW met2 ( 566950 2289390 ) ( * 2300100 0 )
+ NEW met2 ( 583510 165410 ) ( * 2289390 )
+ NEW met2 ( 2649830 200260 ) ( 2655810 * 0 )
+ NEW met1 ( 583510 165410 ) ( 2649830 * )
+ NEW met2 ( 2649830 165410 ) ( * 200260 )
+ NEW met1 ( 583510 165410 ) M1M2_PR
+ NEW met1 ( 583510 2289390 ) M1M2_PR
+ NEW met1 ( 566950 2289390 ) M1M2_PR
+ NEW met1 ( 2649830 165410 ) M1M2_PR ;
+ - read_data_from_mem\[109\] ( core0 data_from_mem[109] ) ( chip_controller rd_data_out[109] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 1496340 ) ( * 1497190 )
+ NEW met2 ( 562350 2699260 0 ) ( 563270 * )
+ NEW met2 ( 563270 2699260 ) ( * 2700110 )
+ NEW met2 ( 1011770 1497190 ) ( * 2700110 )
+ NEW met1 ( 1011770 1497190 ) ( 1283630 * )
+ NEW met3 ( 1283630 1496340 ) ( 1300420 * 0 )
+ NEW met1 ( 563270 2700110 ) ( 1011770 * )
+ NEW met1 ( 1283630 1497190 ) M1M2_PR
+ NEW met2 ( 1283630 1496340 ) M2M3_PR_M
+ NEW met1 ( 563270 2700110 ) M1M2_PR
+ NEW met1 ( 1011770 2700110 ) M1M2_PR
+ NEW met1 ( 1011770 1497190 ) M1M2_PR ;
+ - read_data_from_mem\[10\] ( core0 data_from_mem[10] ) ( chip_controller rd_data_out[10] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 490620 ) ( * 496570 )
+ NEW met2 ( 289570 496570 ) ( * 2256300 )
+ NEW met2 ( 287730 2256300 ) ( 289570 * )
+ NEW met2 ( 287730 2256300 ) ( * 2300100 )
+ NEW met2 ( 286350 2300100 0 ) ( 287730 * )
+ NEW met1 ( 289570 496570 ) ( 1283630 * )
+ NEW met3 ( 1283630 490620 ) ( 1300420 * 0 )
+ NEW met1 ( 289570 496570 ) M1M2_PR
+ NEW met1 ( 1283630 496570 ) M1M2_PR
+ NEW met2 ( 1283630 490620 ) M2M3_PR_M ;
+ - read_data_from_mem\[110\] ( core0 data_from_mem[110] ) ( chip_controller rd_data_out[110] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2667300 0 ) ( 611570 * )
+ NEW met3 ( 2799100 1516060 0 ) ( * 1517420 )
+ NEW met3 ( 2799100 1517420 ) ( 2799790 * )
+ NEW met2 ( 2799790 1517420 ) ( * 1710030 )
+ NEW met1 ( 611570 1710030 ) ( 2799790 * )
+ NEW met2 ( 611570 1710030 ) ( * 2667300 )
+ NEW met1 ( 611570 1710030 ) M1M2_PR
+ NEW met2 ( 611570 2667300 ) M2M3_PR_M
+ NEW met2 ( 2799790 1517420 ) M2M3_PR_M
+ NEW met1 ( 2799790 1710030 ) M1M2_PR ;
+ - read_data_from_mem\[111\] ( core0 data_from_mem[111] ) ( chip_controller rd_data_out[111] ) + USE SIGNAL
+ + ROUTED met2 ( 570630 2288540 ) ( * 2300100 0 )
+ NEW met2 ( 1059150 185470 ) ( * 2288540 )
+ NEW met2 ( 2686170 185470 ) ( * 200260 0 )
+ NEW met1 ( 1059150 185470 ) ( 2686170 * )
+ NEW met3 ( 570630 2288540 ) ( 1059150 * )
+ NEW met1 ( 1059150 185470 ) M1M2_PR
+ NEW met2 ( 570630 2288540 ) M2M3_PR_M
+ NEW met2 ( 1059150 2288540 ) M2M3_PR_M
+ NEW met1 ( 2686170 185470 ) M1M2_PR ;
+ - read_data_from_mem\[112\] ( core0 data_from_mem[112] ) ( chip_controller rd_data_out[112] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 1568420 0 ) ( 2808530 * )
+ NEW met2 ( 2808530 1568420 ) ( * 1568590 )
+ NEW met1 ( 2808530 1568590 ) ( 2825550 * )
+ NEW met2 ( 572010 1709010 ) ( * 2300100 0 )
+ NEW met2 ( 2825550 1568590 ) ( * 1709010 )
+ NEW met1 ( 572010 1709010 ) ( 2825550 * )
+ NEW met2 ( 2808530 1568420 ) M2M3_PR_M
+ NEW met1 ( 2808530 1568590 ) M1M2_PR
+ NEW met1 ( 2825550 1568590 ) M1M2_PR
+ NEW met1 ( 572010 1709010 ) M1M2_PR
+ NEW met1 ( 2825550 1709010 ) M1M2_PR ;
+ - read_data_from_mem\[113\] ( core0 data_from_mem[113] ) ( chip_controller rd_data_out[113] ) + USE SIGNAL
+ + ROUTED met2 ( 567870 2697050 ) ( * 2697220 0 )
+ NEW met2 ( 1459350 1716150 ) ( * 2697050 )
+ NEW met2 ( 2696750 1699660 0 ) ( * 1716150 )
+ NEW met1 ( 1459350 1716150 ) ( 2696750 * )
+ NEW met1 ( 567870 2697050 ) ( 1459350 * )
+ NEW met1 ( 567870 2697050 ) M1M2_PR
+ NEW met1 ( 1459350 2697050 ) M1M2_PR
+ NEW met1 ( 1459350 1716150 ) M1M2_PR
+ NEW met1 ( 2696750 1716150 ) M1M2_PR ;
+ - read_data_from_mem\[114\] ( core0 data_from_mem[114] ) ( chip_controller rd_data_out[114] ) + USE SIGNAL
+ + ROUTED met2 ( 571090 2699260 0 ) ( 572470 * )
+ NEW met2 ( 572470 2699260 ) ( * 2728670 )
+ NEW met2 ( 1369650 1715130 ) ( * 2728670 )
+ NEW met2 ( 2734010 1699660 0 ) ( * 1715130 )
+ NEW met1 ( 572470 2728670 ) ( 1369650 * )
+ NEW met1 ( 1369650 1715130 ) ( 2734010 * )
+ NEW met1 ( 572470 2728670 ) M1M2_PR
+ NEW met1 ( 1369650 2728670 ) M1M2_PR
+ NEW met1 ( 1369650 1715130 ) M1M2_PR
+ NEW met1 ( 2734010 1715130 ) M1M2_PR ;
+ - read_data_from_mem\[115\] ( core0 data_from_mem[115] ) ( chip_controller rd_data_out[115] ) + USE SIGNAL
+ + ROUTED li1 ( 573850 2697390 ) ( * 2699430 )
+ NEW met2 ( 573850 2699260 ) ( * 2699430 )
+ NEW met2 ( 572930 2699260 0 ) ( 573850 * )
+ NEW met2 ( 1494770 1715810 ) ( * 2697390 )
+ NEW met2 ( 2752870 1699660 0 ) ( * 1715810 )
+ NEW met1 ( 1494770 1715810 ) ( 2752870 * )
+ NEW met1 ( 573850 2697390 ) ( 1494770 * )
+ NEW li1 ( 573850 2697390 ) L1M1_PR_MR
+ NEW li1 ( 573850 2699430 ) L1M1_PR_MR
+ NEW met1 ( 573850 2699430 ) M1M2_PR
+ NEW met1 ( 1494770 2697390 ) M1M2_PR
+ NEW met1 ( 1494770 1715810 ) M1M2_PR
+ NEW met1 ( 2752870 1715810 ) M1M2_PR
+ NEW met1 ( 573850 2699430 ) RECT ( -355 -70 0 70 ) ;
+ - read_data_from_mem\[116\] ( core0 data_from_mem[116] ) ( chip_controller rd_data_out[116] ) + USE SIGNAL
+ + ROUTED met3 ( 191130 2668660 ) ( 200100 * )
+ NEW met3 ( 200100 2667300 0 ) ( * 2668660 )
+ NEW met2 ( 191130 2668660 ) ( * 2726290 )
+ NEW met2 ( 2790590 1699660 0 ) ( * 1714620 )
+ NEW met1 ( 191130 2726290 ) ( 1411050 * )
+ NEW met2 ( 1411050 1714620 ) ( * 2726290 )
+ NEW met3 ( 1411050 1714620 ) ( 2790590 * )
+ NEW met1 ( 191130 2726290 ) M1M2_PR
+ NEW met2 ( 191130 2668660 ) M2M3_PR_M
+ NEW met2 ( 2790590 1714620 ) M2M3_PR_M
+ NEW met1 ( 1411050 2726290 ) M1M2_PR
+ NEW met2 ( 1411050 1714620 ) M2M3_PR_M ;
+ - read_data_from_mem\[117\] ( core0 data_from_mem[117] ) ( chip_controller rd_data_out[117] ) + USE SIGNAL
+ + ROUTED met2 ( 576610 2699260 0 ) ( 577530 * )
+ NEW met2 ( 577530 2699260 ) ( * 2712010 )
+ NEW met3 ( 2799100 1586100 0 ) ( 2808530 * )
+ NEW met2 ( 2808530 1586100 ) ( * 1693370 )
+ NEW li1 ( 1493850 1693370 ) ( * 1696770 )
+ NEW met2 ( 1493850 1696770 ) ( * 2712010 )
+ NEW met1 ( 1493850 1693370 ) ( 2808530 * )
+ NEW met1 ( 577530 2712010 ) ( 1493850 * )
+ NEW met1 ( 577530 2712010 ) M1M2_PR
+ NEW met2 ( 2808530 1586100 ) M2M3_PR_M
+ NEW met1 ( 2808530 1693370 ) M1M2_PR
+ NEW met1 ( 1493850 2712010 ) M1M2_PR
+ NEW li1 ( 1493850 1696770 ) L1M1_PR_MR
+ NEW met1 ( 1493850 1696770 ) M1M2_PR
+ NEW li1 ( 1493850 1693370 ) L1M1_PR_MR
+ NEW met1 ( 1493850 1696770 ) RECT ( -355 -70 0 70 ) ;
+ - read_data_from_mem\[118\] ( core0 data_from_mem[118] ) ( chip_controller rd_data_out[118] ) + USE SIGNAL
+ + ROUTED met2 ( 102810 1694390 ) ( * 2670530 )
+ NEW met2 ( 189290 2670530 ) ( * 2673420 )
+ NEW met3 ( 189290 2673420 ) ( 200100 * )
+ NEW met3 ( 200100 2672740 0 ) ( * 2673420 )
+ NEW met3 ( 2799100 1603780 0 ) ( 2813590 * )
+ NEW met2 ( 2813590 1603780 ) ( * 1694390 )
+ NEW met1 ( 102810 2670530 ) ( 189290 * )
+ NEW met1 ( 102810 1694390 ) ( 2813590 * )
+ NEW met1 ( 102810 1694390 ) M1M2_PR
+ NEW met1 ( 102810 2670530 ) M1M2_PR
+ NEW met1 ( 189290 2670530 ) M1M2_PR
+ NEW met2 ( 189290 2673420 ) M2M3_PR_M
+ NEW met2 ( 2813590 1603780 ) M2M3_PR_M
+ NEW met1 ( 2813590 1694390 ) M1M2_PR ;
+ - read_data_from_mem\[119\] ( core0 data_from_mem[119] ) ( chip_controller rd_data_out[119] ) + USE SIGNAL
+ + ROUTED met2 ( 2711930 200260 ) ( 2716530 * 0 )
+ NEW met1 ( 592250 2284290 ) ( 596850 * )
+ NEW met2 ( 592250 2284290 ) ( * 2300100 0 )
+ NEW met2 ( 596850 179350 ) ( * 2284290 )
+ NEW met2 ( 2711930 179350 ) ( * 200260 )
+ NEW met1 ( 596850 179350 ) ( 2711930 * )
+ NEW met1 ( 596850 179350 ) M1M2_PR
+ NEW met1 ( 596850 2284290 ) M1M2_PR
+ NEW met1 ( 592250 2284290 ) M1M2_PR
+ NEW met1 ( 2711930 179350 ) M1M2_PR ;
+ - read_data_from_mem\[11\] ( core0 data_from_mem[11] ) ( chip_controller rd_data_out[11] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 400180 0 ) ( 2814970 * )
+ NEW met2 ( 2814970 399330 ) ( * 400180 )
+ NEW met3 ( 192740 2378980 ) ( 200100 * )
+ NEW met3 ( 200100 2378300 0 ) ( * 2378980 )
+ NEW met1 ( 2814970 399330 ) ( 2836130 * )
+ NEW met3 ( 192740 1783980 ) ( 2836130 * )
+ NEW met2 ( 2836130 399330 ) ( * 1783980 )
+ NEW met4 ( 192740 1783980 ) ( * 2378980 )
+ NEW met2 ( 2814970 400180 ) M2M3_PR_M
+ NEW met1 ( 2814970 399330 ) M1M2_PR
+ NEW met3 ( 192740 1783980 ) M3M4_PR_M
+ NEW met3 ( 192740 2378980 ) M3M4_PR_M
+ NEW met1 ( 2836130 399330 ) M1M2_PR
+ NEW met2 ( 2836130 1783980 ) M2M3_PR_M ;
+ - read_data_from_mem\[120\] ( core0 data_from_mem[120] ) ( chip_controller rd_data_out[120] ) + USE SIGNAL
+ + ROUTED met2 ( 2731710 190060 ) ( * 200260 0 )
+ NEW met2 ( 192970 2690420 ) ( 194350 * )
+ NEW met2 ( 192970 2678860 ) ( * 2690420 )
+ NEW met3 ( 192970 2678860 ) ( 200100 * )
+ NEW met3 ( 200100 2678180 0 ) ( * 2678860 )
+ NEW met2 ( 194350 2690420 ) ( * 2695350 )
+ NEW met2 ( 977270 190060 ) ( * 2695350 )
+ NEW met3 ( 977270 190060 ) ( 2731710 * )
+ NEW met1 ( 194350 2695350 ) ( 977270 * )
+ NEW met1 ( 194350 2695350 ) M1M2_PR
+ NEW met2 ( 977270 190060 ) M2M3_PR_M
+ NEW met1 ( 977270 2695350 ) M1M2_PR
+ NEW met2 ( 2731710 190060 ) M2M3_PR_M
+ NEW met2 ( 192970 2678860 ) M2M3_PR_M ;
+ - read_data_from_mem\[121\] ( core0 data_from_mem[121] ) ( chip_controller rd_data_out[121] ) + USE SIGNAL
+ + ROUTED met2 ( 1290070 1584740 ) ( * 2652850 )
+ NEW met1 ( 612030 2652850 ) ( 1290070 * )
+ NEW met3 ( 1290070 1584740 ) ( 1300420 * 0 )
+ NEW met2 ( 612030 2652850 ) ( * 2670300 )
+ NEW met3 ( 599380 2682940 0 ) ( 611570 * )
+ NEW met2 ( 611570 2670300 ) ( * 2682940 )
+ NEW met2 ( 611570 2670300 ) ( 612030 * )
+ NEW met1 ( 612030 2652850 ) M1M2_PR
+ NEW met2 ( 1290070 1584740 ) M2M3_PR_M
+ NEW met1 ( 1290070 2652850 ) M1M2_PR
+ NEW met2 ( 611570 2682940 ) M2M3_PR_M ;
+ - read_data_from_mem\[122\] ( core0 data_from_mem[122] ) ( chip_controller rd_data_out[122] ) + USE SIGNAL
+ + ROUTED met2 ( 588110 2699260 ) ( * 2700790 )
+ NEW met2 ( 586730 2699260 0 ) ( 588110 * )
+ NEW met2 ( 1283630 1620100 ) ( * 1621290 )
+ NEW met2 ( 1135970 1621290 ) ( * 2699430 )
+ NEW met1 ( 1135970 1621290 ) ( 1283630 * )
+ NEW met3 ( 1283630 1620100 ) ( 1300420 * 0 )
+ NEW li1 ( 617550 2699430 ) ( * 2700790 )
+ NEW met1 ( 588110 2700790 ) ( 617550 * )
+ NEW met1 ( 617550 2699430 ) ( 1135970 * )
+ NEW met1 ( 588110 2700790 ) M1M2_PR
+ NEW met1 ( 1283630 1621290 ) M1M2_PR
+ NEW met2 ( 1283630 1620100 ) M2M3_PR_M
+ NEW met1 ( 1135970 2699430 ) M1M2_PR
+ NEW met1 ( 1135970 1621290 ) M1M2_PR
+ NEW li1 ( 617550 2700790 ) L1M1_PR_MR
+ NEW li1 ( 617550 2699430 ) L1M1_PR_MR ;
+ - read_data_from_mem\[123\] ( core0 data_from_mem[123] ) ( chip_controller rd_data_out[123] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 1638460 0 ) ( 2814510 * )
+ NEW met2 ( 94530 1694050 ) ( * 2684130 )
+ NEW met2 ( 188370 2684130 ) ( * 2687020 )
+ NEW met3 ( 188370 2687020 ) ( 201020 * )
+ NEW met3 ( 201020 2687020 ) ( * 2687700 0 )
+ NEW met2 ( 2814510 1638460 ) ( * 1694050 )
+ NEW met1 ( 94530 2684130 ) ( 188370 * )
+ NEW met1 ( 94530 1694050 ) ( 2814510 * )
+ NEW met2 ( 2814510 1638460 ) M2M3_PR_M
+ NEW met1 ( 94530 1694050 ) M1M2_PR
+ NEW met1 ( 94530 2684130 ) M1M2_PR
+ NEW met1 ( 188370 2684130 ) M1M2_PR
+ NEW met2 ( 188370 2687020 ) M2M3_PR_M
+ NEW met1 ( 2814510 1694050 ) M1M2_PR ;
+ - read_data_from_mem\[124\] ( core0 data_from_mem[124] ) ( chip_controller rd_data_out[124] ) + USE SIGNAL
+ + ROUTED met2 ( 2792430 190740 ) ( * 200260 0 )
+ NEW met2 ( 990610 190740 ) ( * 2693310 )
+ NEW met3 ( 990610 190740 ) ( 2792430 * )
+ NEW met2 ( 600530 2693310 ) ( * 2697220 )
+ NEW met2 ( 600070 2697220 ) ( 600530 * )
+ NEW met2 ( 600070 2697220 ) ( * 2699430 )
+ NEW met1 ( 594550 2699430 ) ( 600070 * )
+ NEW met2 ( 594550 2699260 ) ( * 2699430 )
+ NEW met2 ( 593630 2699260 0 ) ( 594550 * )
+ NEW met1 ( 600530 2693310 ) ( 990610 * )
+ NEW met2 ( 990610 190740 ) M2M3_PR_M
+ NEW met1 ( 990610 2693310 ) M1M2_PR
+ NEW met2 ( 2792430 190740 ) M2M3_PR_M
+ NEW met1 ( 600530 2693310 ) M1M2_PR
+ NEW met1 ( 600070 2699430 ) M1M2_PR
+ NEW met1 ( 594550 2699430 ) M1M2_PR ;
+ - read_data_from_mem\[125\] ( core0 data_from_mem[125] ) ( chip_controller rd_data_out[125] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 1673140 0 ) ( 2814970 * )
+ NEW met2 ( 2814970 1673140 ) ( * 1695410 )
+ NEW met1 ( 1335150 1697110 ) ( 1338600 * )
+ NEW met1 ( 1338600 1695410 ) ( * 1697110 )
+ NEW met2 ( 1335150 1697110 ) ( * 2716090 )
+ NEW met1 ( 1338600 1695410 ) ( 2814970 * )
+ NEW met2 ( 597310 2699260 0 ) ( 598690 * )
+ NEW met2 ( 598690 2699260 ) ( * 2716090 )
+ NEW met1 ( 598690 2716090 ) ( 1335150 * )
+ NEW met2 ( 2814970 1673140 ) M2M3_PR_M
+ NEW met1 ( 2814970 1695410 ) M1M2_PR
+ NEW met1 ( 1335150 2716090 ) M1M2_PR
+ NEW met1 ( 1335150 1697110 ) M1M2_PR
+ NEW met1 ( 598690 2716090 ) M1M2_PR ;
+ - read_data_from_mem\[126\] ( core0 data_from_mem[126] ) ( chip_controller rd_data_out[126] ) + USE SIGNAL
+ + ROUTED met2 ( 1286390 1655460 ) ( * 2653190 )
+ NEW met3 ( 1286390 1655460 ) ( 1300420 * 0 )
+ NEW met1 ( 611110 2653190 ) ( 1286390 * )
+ NEW met3 ( 599380 2697220 0 ) ( 611110 * )
+ NEW met2 ( 611110 2653190 ) ( * 2697220 )
+ NEW met2 ( 1286390 1655460 ) M2M3_PR_M
+ NEW met1 ( 611110 2653190 ) M1M2_PR
+ NEW met1 ( 1286390 2653190 ) M1M2_PR
+ NEW met2 ( 611110 2697220 ) M2M3_PR_M ;
+ - read_data_from_mem\[127\] ( core0 data_from_mem[127] ) ( chip_controller rd_data_out[127] ) + USE SIGNAL
+ + ROUTED met3 ( 203780 2698580 0 ) ( * 2701300 )
+ NEW met3 ( 203780 2701300 ) ( 206770 * )
+ NEW met2 ( 206770 2701300 ) ( * 2707930 )
+ NEW met2 ( 1283630 1673140 ) ( * 1676370 )
+ NEW met2 ( 666770 1676370 ) ( * 2707930 )
+ NEW met1 ( 666770 1676370 ) ( 1283630 * )
+ NEW met3 ( 1283630 1673140 ) ( 1300420 * 0 )
+ NEW met1 ( 206770 2707930 ) ( 666770 * )
+ NEW met2 ( 206770 2701300 ) M2M3_PR_M
+ NEW met1 ( 206770 2707930 ) M1M2_PR
+ NEW met1 ( 666770 1676370 ) M1M2_PR
+ NEW met1 ( 666770 2707930 ) M1M2_PR
+ NEW met1 ( 1283630 1676370 ) M1M2_PR
+ NEW met2 ( 1283630 1673140 ) M2M3_PR_M ;
+ - read_data_from_mem\[12\] ( core0 data_from_mem[12] ) ( chip_controller rd_data_out[12] ) + USE SIGNAL
+ + ROUTED met2 ( 290950 2699260 0 ) ( 292330 * )
+ NEW met2 ( 292330 2699260 ) ( * 2732410 )
+ NEW met2 ( 1342050 1712070 ) ( * 2732410 )
+ NEW met2 ( 1646570 1699660 0 ) ( * 1712070 )
+ NEW met1 ( 292330 2732410 ) ( 1342050 * )
+ NEW met1 ( 1342050 1712070 ) ( 1646570 * )
+ NEW met1 ( 292330 2732410 ) M1M2_PR
+ NEW met1 ( 1342050 2732410 ) M1M2_PR
+ NEW met1 ( 1342050 1712070 ) M1M2_PR
+ NEW met1 ( 1646570 1712070 ) M1M2_PR ;
+ - read_data_from_mem\[13\] ( core0 data_from_mem[13] ) ( chip_controller rd_data_out[13] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 579020 ) ( * 579530 )
+ NEW met3 ( 186530 2395300 ) ( 200100 * )
+ NEW met3 ( 200100 2394620 0 ) ( * 2395300 )
+ NEW met1 ( 273470 579530 ) ( 1283630 * )
+ NEW met3 ( 1283630 579020 ) ( 1300420 * 0 )
+ NEW met2 ( 273470 579530 ) ( * 2299930 )
+ NEW met1 ( 186530 2330530 ) ( 189290 * )
+ NEW met2 ( 189290 2299930 ) ( * 2330530 )
+ NEW met2 ( 186530 2330530 ) ( * 2395300 )
+ NEW met1 ( 189290 2299930 ) ( 273470 * )
+ NEW met1 ( 1283630 579530 ) M1M2_PR
+ NEW met2 ( 1283630 579020 ) M2M3_PR_M
+ NEW met2 ( 186530 2395300 ) M2M3_PR_M
+ NEW met1 ( 273470 579530 ) M1M2_PR
+ NEW met1 ( 273470 2299930 ) M1M2_PR
+ NEW met1 ( 186530 2330530 ) M1M2_PR
+ NEW met1 ( 189290 2330530 ) M1M2_PR
+ NEW met1 ( 189290 2299930 ) M1M2_PR ;
+ - read_data_from_mem\[14\] ( core0 data_from_mem[14] ) ( chip_controller rd_data_out[14] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2388500 0 ) ( 607430 * )
+ NEW met2 ( 607430 2388330 ) ( * 2388500 )
+ NEW met2 ( 1608390 200940 ) ( * 201110 )
+ NEW met2 ( 1608390 200940 ) ( 1610230 * 0 )
+ NEW met1 ( 1025570 201110 ) ( 1608390 * )
+ NEW met1 ( 607430 2388330 ) ( 1025570 * )
+ NEW met2 ( 1025570 201110 ) ( * 2388330 )
+ NEW met2 ( 607430 2388500 ) M2M3_PR_M
+ NEW met1 ( 607430 2388330 ) M1M2_PR
+ NEW met1 ( 1025570 201110 ) M1M2_PR
+ NEW met1 ( 1608390 201110 ) M1M2_PR
+ NEW met1 ( 1025570 2388330 ) M1M2_PR ;
+ - read_data_from_mem\[15\] ( core0 data_from_mem[15] ) ( chip_controller rd_data_out[15] ) + USE SIGNAL
+ + ROUTED met2 ( 310270 2699260 0 ) ( 310730 * )
+ NEW met2 ( 310730 2699260 ) ( * 2700620 )
+ NEW met2 ( 310270 2700620 ) ( 310730 * )
+ NEW met2 ( 310270 2700620 ) ( * 2735470 )
+ NEW met2 ( 1283630 613700 ) ( * 613870 )
+ NEW met1 ( 310270 2735470 ) ( 914710 * )
+ NEW met1 ( 914710 613870 ) ( 1283630 * )
+ NEW met3 ( 1283630 613700 ) ( 1300420 * 0 )
+ NEW met2 ( 914710 613870 ) ( * 2735470 )
+ NEW met1 ( 310270 2735470 ) M1M2_PR
+ NEW met1 ( 1283630 613870 ) M1M2_PR
+ NEW met2 ( 1283630 613700 ) M2M3_PR_M
+ NEW met1 ( 914710 613870 ) M1M2_PR
+ NEW met1 ( 914710 2735470 ) M1M2_PR ;
+ - read_data_from_mem\[16\] ( core0 data_from_mem[16] ) ( chip_controller rd_data_out[16] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2404140 0 ) ( 606970 * )
+ NEW met2 ( 606970 2401590 ) ( * 2404140 )
+ NEW met2 ( 1357230 1731110 ) ( * 2401590 )
+ NEW met1 ( 606970 2401590 ) ( 1357230 * )
+ NEW met1 ( 1357230 1731110 ) ( 1721550 * )
+ NEW met2 ( 1721550 1699660 0 ) ( * 1731110 )
+ NEW met2 ( 606970 2404140 ) M2M3_PR_M
+ NEW met1 ( 606970 2401590 ) M1M2_PR
+ NEW met1 ( 1357230 1731110 ) M1M2_PR
+ NEW met1 ( 1357230 2401590 ) M1M2_PR
+ NEW met1 ( 1721550 1731110 ) M1M2_PR ;
+ - read_data_from_mem\[17\] ( core0 data_from_mem[17] ) ( chip_controller rd_data_out[17] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2410940 0 ) ( 607430 * )
+ NEW met2 ( 607430 2409750 ) ( * 2410940 )
+ NEW met2 ( 1745930 201450 ) ( * 201620 )
+ NEW met2 ( 1745930 201620 ) ( 1746850 * 0 )
+ NEW met1 ( 607430 2409750 ) ( 614100 * )
+ NEW met1 ( 614100 2409410 ) ( * 2409750 )
+ NEW met1 ( 614100 2409410 ) ( 1017750 * )
+ NEW met1 ( 1017750 201450 ) ( 1745930 * )
+ NEW met2 ( 1017750 201450 ) ( * 2409410 )
+ NEW met2 ( 607430 2410940 ) M2M3_PR_M
+ NEW met1 ( 607430 2409750 ) M1M2_PR
+ NEW met1 ( 1745930 201450 ) M1M2_PR
+ NEW met1 ( 1017750 201450 ) M1M2_PR
+ NEW met1 ( 1017750 2409410 ) M1M2_PR ;
+ - read_data_from_mem\[18\] ( core0 data_from_mem[18] ) ( chip_controller rd_data_out[18] ) + USE SIGNAL
+ + ROUTED met3 ( 198030 2425220 ) ( 201020 * )
+ NEW met3 ( 201020 2425220 ) ( * 2425900 0 )
+ NEW met2 ( 1288230 684420 ) ( * 2294150 )
+ NEW met3 ( 1288230 684420 ) ( 1300420 * 0 )
+ NEW met1 ( 198030 2325770 ) ( 198490 * )
+ NEW li1 ( 198490 2300270 ) ( * 2325770 )
+ NEW met2 ( 198490 2294150 ) ( * 2300270 )
+ NEW met2 ( 198030 2325770 ) ( * 2425220 )
+ NEW met1 ( 198490 2294150 ) ( 1288230 * )
+ NEW met2 ( 198030 2425220 ) M2M3_PR_M
+ NEW met2 ( 1288230 684420 ) M2M3_PR_M
+ NEW met1 ( 1288230 2294150 ) M1M2_PR
+ NEW met1 ( 198030 2325770 ) M1M2_PR
+ NEW li1 ( 198490 2325770 ) L1M1_PR_MR
+ NEW li1 ( 198490 2300270 ) L1M1_PR_MR
+ NEW met1 ( 198490 2300270 ) M1M2_PR
+ NEW met1 ( 198490 2294150 ) M1M2_PR
+ NEW met1 ( 198490 2300270 ) RECT ( -355 -70 0 70 ) ;
+ - read_data_from_mem\[19\] ( core0 data_from_mem[19] ) ( chip_controller rd_data_out[19] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 719780 ) ( * 724370 )
+ NEW met2 ( 336490 2699260 0 ) ( 337410 * )
+ NEW met2 ( 337410 2699260 ) ( * 2735810 )
+ NEW met1 ( 337410 2735810 ) ( 928050 * )
+ NEW met2 ( 928050 724370 ) ( * 2735810 )
+ NEW met1 ( 928050 724370 ) ( 1283630 * )
+ NEW met3 ( 1283630 719780 ) ( 1300420 * 0 )
+ NEW met1 ( 1283630 724370 ) M1M2_PR
+ NEW met2 ( 1283630 719780 ) M2M3_PR_M
+ NEW met1 ( 337410 2735810 ) M1M2_PR
+ NEW met1 ( 928050 2735810 ) M1M2_PR
+ NEW met1 ( 928050 724370 ) M1M2_PR ;
+ - read_data_from_mem\[1\] ( core0 data_from_mem[1] ) ( chip_controller rd_data_out[1] ) + USE SIGNAL
+ + ROUTED met2 ( 1440490 1699660 0 ) ( * 1716150 )
+ NEW met1 ( 229310 2283950 ) ( 234370 * )
+ NEW met2 ( 229310 2283950 ) ( * 2300100 0 )
+ NEW met2 ( 234370 1716150 ) ( * 2283950 )
+ NEW met1 ( 234370 1716150 ) ( 1440490 * )
+ NEW met1 ( 1440490 1716150 ) M1M2_PR
+ NEW met1 ( 234370 1716150 ) M1M2_PR
+ NEW met1 ( 234370 2283950 ) M1M2_PR
+ NEW met1 ( 229310 2283950 ) M1M2_PR ;
+ - read_data_from_mem\[20\] ( core0 data_from_mem[20] ) ( chip_controller rd_data_out[20] ) + USE SIGNAL
+ + ROUTED met2 ( 1376550 1712410 ) ( * 2732750 )
+ NEW met2 ( 340630 2699940 ) ( 341550 * 0 )
+ NEW met2 ( 340630 2699940 ) ( * 2732750 )
+ NEW met1 ( 340630 2732750 ) ( 1376550 * )
+ NEW met2 ( 1815390 1699660 0 ) ( * 1712410 )
+ NEW met1 ( 1376550 1712410 ) ( 1815390 * )
+ NEW met1 ( 1376550 2732750 ) M1M2_PR
+ NEW met1 ( 1376550 1712410 ) M1M2_PR
+ NEW met1 ( 340630 2732750 ) M1M2_PR
+ NEW met1 ( 1815390 1712410 ) M1M2_PR ;
+ - read_data_from_mem\[21\] ( core0 data_from_mem[21] ) ( chip_controller rd_data_out[21] ) + USE SIGNAL
+ + ROUTED met3 ( 190210 2401420 ) ( 192510 * )
+ NEW met2 ( 192510 2401420 ) ( * 2438140 )
+ NEW met3 ( 192510 2438140 ) ( 201020 * )
+ NEW met3 ( 201020 2438140 ) ( * 2438820 0 )
+ NEW met3 ( 2799100 591940 0 ) ( 2813130 * )
+ NEW met2 ( 2813130 591940 ) ( * 592790 )
+ NEW met1 ( 2813130 592790 ) ( 2830150 * )
+ NEW met2 ( 2830150 592790 ) ( * 1783810 )
+ NEW met1 ( 190210 1783810 ) ( 2830150 * )
+ NEW met2 ( 190210 1783810 ) ( * 2401420 )
+ NEW met2 ( 190210 2401420 ) M2M3_PR_M
+ NEW met2 ( 192510 2401420 ) M2M3_PR_M
+ NEW met2 ( 192510 2438140 ) M2M3_PR_M
+ NEW met2 ( 2813130 591940 ) M2M3_PR_M
+ NEW met1 ( 2813130 592790 ) M1M2_PR
+ NEW met1 ( 2830150 592790 ) M1M2_PR
+ NEW met1 ( 190210 1783810 ) M1M2_PR
+ NEW met1 ( 2830150 1783810 ) M1M2_PR ;
+ - read_data_from_mem\[22\] ( core0 data_from_mem[22] ) ( chip_controller rd_data_out[22] ) + USE SIGNAL
+ + ROUTED met1 ( 365010 1771230 ) ( 1888530 * )
+ NEW met1 ( 360410 2284290 ) ( 365010 * )
+ NEW met2 ( 360410 2284290 ) ( * 2300100 0 )
+ NEW met2 ( 365010 1771230 ) ( * 2284290 )
+ NEW met2 ( 1888530 1699660 ) ( 1890370 * 0 )
+ NEW met2 ( 1888530 1699660 ) ( * 1771230 )
+ NEW met1 ( 365010 1771230 ) M1M2_PR
+ NEW met1 ( 1888530 1771230 ) M1M2_PR
+ NEW met1 ( 365010 2284290 ) M1M2_PR
+ NEW met1 ( 360410 2284290 ) M1M2_PR ;
+ - read_data_from_mem\[23\] ( core0 data_from_mem[23] ) ( chip_controller rd_data_out[23] ) + USE SIGNAL
+ + ROUTED met2 ( 364090 2699260 0 ) ( 365010 * )
+ NEW met2 ( 365010 2699260 ) ( * 2700620 )
+ NEW met2 ( 1807570 190230 ) ( * 200260 0 )
+ NEW met1 ( 948750 190230 ) ( 1807570 * )
+ NEW met2 ( 948750 190230 ) ( * 2700620 )
+ NEW met3 ( 365010 2700620 ) ( 948750 * )
+ NEW met2 ( 365010 2700620 ) M2M3_PR_M
+ NEW met1 ( 948750 190230 ) M1M2_PR
+ NEW met2 ( 948750 2700620 ) M2M3_PR_M
+ NEW met1 ( 1807570 190230 ) M1M2_PR ;
+ - read_data_from_mem\[24\] ( core0 data_from_mem[24] ) ( chip_controller rd_data_out[24] ) + USE SIGNAL
+ + ROUTED met2 ( 187910 2352900 ) ( 188370 * )
+ NEW met3 ( 188370 2452420 ) ( 201020 * )
+ NEW met3 ( 201020 2452420 ) ( * 2453100 0 )
+ NEW met2 ( 188370 2352900 ) ( * 2452420 )
+ NEW met3 ( 2799100 644300 0 ) ( 2814970 * )
+ NEW met2 ( 2814970 644300 ) ( * 648550 )
+ NEW met1 ( 2814970 648550 ) ( 2843950 * )
+ NEW met1 ( 187910 1790610 ) ( 2843950 * )
+ NEW met2 ( 2843950 648550 ) ( * 1790610 )
+ NEW met2 ( 187910 1790610 ) ( * 2352900 )
+ NEW met1 ( 187910 1790610 ) M1M2_PR
+ NEW met2 ( 188370 2452420 ) M2M3_PR_M
+ NEW met2 ( 2814970 644300 ) M2M3_PR_M
+ NEW met1 ( 2814970 648550 ) M1M2_PR
+ NEW met1 ( 2843950 648550 ) M1M2_PR
+ NEW met1 ( 2843950 1790610 ) M1M2_PR ;
+ - read_data_from_mem\[25\] ( core0 data_from_mem[25] ) ( chip_controller rd_data_out[25] ) + USE SIGNAL
+ + ROUTED met2 ( 1821830 200260 ) ( 1822290 * 0 )
+ NEW met2 ( 89010 179010 ) ( * 2463470 )
+ NEW met2 ( 189750 2463300 ) ( * 2463470 )
+ NEW met3 ( 189750 2463300 ) ( 201020 * )
+ NEW met3 ( 201020 2463300 ) ( * 2463980 0 )
+ NEW met2 ( 1821830 179010 ) ( * 200260 )
+ NEW met1 ( 89010 2463470 ) ( 189750 * )
+ NEW met1 ( 89010 179010 ) ( 1821830 * )
+ NEW met1 ( 89010 179010 ) M1M2_PR
+ NEW met1 ( 89010 2463470 ) M1M2_PR
+ NEW met1 ( 189750 2463470 ) M1M2_PR
+ NEW met2 ( 189750 2463300 ) M2M3_PR_M
+ NEW met1 ( 1821830 179010 ) M1M2_PR ;
+ - read_data_from_mem\[26\] ( core0 data_from_mem[26] ) ( chip_controller rd_data_out[26] ) + USE SIGNAL
+ + ROUTED met2 ( 377890 2699260 0 ) ( 378810 * )
+ NEW met2 ( 378810 2699260 ) ( * 2731730 )
+ NEW met2 ( 1283630 808180 ) ( * 814130 )
+ NEW met1 ( 378810 2731730 ) ( 714610 * )
+ NEW met2 ( 714610 814130 ) ( * 2731730 )
+ NEW met1 ( 714610 814130 ) ( 1283630 * )
+ NEW met3 ( 1283630 808180 ) ( 1300420 * 0 )
+ NEW met1 ( 378810 2731730 ) M1M2_PR
+ NEW met1 ( 1283630 814130 ) M1M2_PR
+ NEW met2 ( 1283630 808180 ) M2M3_PR_M
+ NEW met1 ( 714610 2731730 ) M1M2_PR
+ NEW met1 ( 714610 814130 ) M1M2_PR ;
+ - read_data_from_mem\[27\] ( core0 data_from_mem[27] ) ( chip_controller rd_data_out[27] ) + USE SIGNAL
+ + ROUTED met2 ( 381570 2699260 0 ) ( 382950 * )
+ NEW met2 ( 382950 2699260 ) ( * 2734790 )
+ NEW met2 ( 1169550 189890 ) ( * 2734790 )
+ NEW met1 ( 382950 2734790 ) ( 1169550 * )
+ NEW met2 ( 1883010 189890 ) ( * 200260 0 )
+ NEW met1 ( 1169550 189890 ) ( 1883010 * )
+ NEW met1 ( 382950 2734790 ) M1M2_PR
+ NEW met1 ( 1169550 189890 ) M1M2_PR
+ NEW met1 ( 1169550 2734790 ) M1M2_PR
+ NEW met1 ( 1883010 189890 ) M1M2_PR ;
+ - read_data_from_mem\[28\] ( core0 data_from_mem[28] ) ( chip_controller rd_data_out[28] ) + USE SIGNAL
+ + ROUTED met2 ( 385710 204510 ) ( * 2300100 0 )
+ NEW met2 ( 1911990 202980 ) ( 1913370 * 0 )
+ NEW met2 ( 1911990 202810 ) ( * 202980 )
+ NEW li1 ( 1911990 202810 ) ( * 204510 )
+ NEW met1 ( 385710 204510 ) ( 1911990 * )
+ NEW met1 ( 385710 204510 ) M1M2_PR
+ NEW li1 ( 1911990 202810 ) L1M1_PR_MR
+ NEW met1 ( 1911990 202810 ) M1M2_PR
+ NEW li1 ( 1911990 204510 ) L1M1_PR_MR
+ NEW met1 ( 1911990 202810 ) RECT ( -355 -70 0 70 ) ;
+ - read_data_from_mem\[29\] ( core0 data_from_mem[29] ) ( chip_controller rd_data_out[29] ) + USE SIGNAL
+ + ROUTED met2 ( 393530 2699260 0 ) ( 394910 * )
+ NEW met2 ( 394910 2699260 ) ( * 2733770 )
+ NEW met2 ( 1965350 1699660 0 ) ( * 1713090 )
+ NEW met1 ( 394910 2733770 ) ( 1314450 * )
+ NEW met2 ( 1314450 1713090 ) ( * 2733770 )
+ NEW met1 ( 1314450 1713090 ) ( 1965350 * )
+ NEW met1 ( 394910 2733770 ) M1M2_PR
+ NEW met1 ( 1965350 1713090 ) M1M2_PR
+ NEW met1 ( 1314450 2733770 ) M1M2_PR
+ NEW met1 ( 1314450 1713090 ) M1M2_PR ;
+ - read_data_from_mem\[2\] ( core0 data_from_mem[2] ) ( chip_controller rd_data_out[2] ) + USE SIGNAL
+ + ROUTED met2 ( 1457510 1699660 ) ( 1459350 * 0 )
+ NEW met2 ( 1457510 1699660 ) ( * 1715810 )
+ NEW met2 ( 233910 2300100 ) ( 234370 * 0 )
+ NEW met2 ( 233910 1715810 ) ( * 2300100 )
+ NEW met1 ( 233910 1715810 ) ( 1457510 * )
+ NEW met1 ( 1457510 1715810 ) M1M2_PR
+ NEW met1 ( 233910 1715810 ) M1M2_PR ;
+ - read_data_from_mem\[30\] ( core0 data_from_mem[30] ) ( chip_controller rd_data_out[30] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 878900 ) ( * 883150 )
+ NEW met2 ( 399050 883150 ) ( * 2256300 )
+ NEW met2 ( 398590 2256300 ) ( 399050 * )
+ NEW met2 ( 398590 2256300 ) ( * 2300100 )
+ NEW met2 ( 397210 2300100 0 ) ( 398590 * )
+ NEW met1 ( 399050 883150 ) ( 1283630 * )
+ NEW met3 ( 1283630 878900 ) ( 1300420 * 0 )
+ NEW met1 ( 399050 883150 ) M1M2_PR
+ NEW met1 ( 1283630 883150 ) M1M2_PR
+ NEW met2 ( 1283630 878900 ) M2M3_PR_M ;
+ - read_data_from_mem\[31\] ( core0 data_from_mem[31] ) ( chip_controller rd_data_out[31] ) + USE SIGNAL
+ + ROUTED met2 ( 1957070 202980 ) ( 1958910 * 0 )
+ NEW met2 ( 1957070 202810 ) ( * 202980 )
+ NEW li1 ( 1957070 202810 ) ( * 204850 )
+ NEW met2 ( 404110 2287860 ) ( * 2300100 0 )
+ NEW met2 ( 486450 204850 ) ( * 2287860 )
+ NEW met1 ( 486450 204850 ) ( 1957070 * )
+ NEW met3 ( 404110 2287860 ) ( 486450 * )
+ NEW met1 ( 486450 204850 ) M1M2_PR
+ NEW li1 ( 1957070 202810 ) L1M1_PR_MR
+ NEW met1 ( 1957070 202810 ) M1M2_PR
+ NEW li1 ( 1957070 204850 ) L1M1_PR_MR
+ NEW met2 ( 404110 2287860 ) M2M3_PR_M
+ NEW met2 ( 486450 2287860 ) M2M3_PR_M
+ NEW met1 ( 1957070 202810 ) RECT ( -355 -70 0 70 ) ;
+ - read_data_from_mem\[32\] ( core0 data_from_mem[32] ) ( chip_controller rd_data_out[32] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2489140 0 ) ( 607430 * )
+ NEW met2 ( 607430 2486930 ) ( * 2489140 )
+ NEW li1 ( 607430 2480470 ) ( * 2486930 )
+ NEW met2 ( 1288690 931940 ) ( * 2480470 )
+ NEW met1 ( 607430 2480470 ) ( 1288690 * )
+ NEW met3 ( 1288690 931940 ) ( 1300420 * 0 )
+ NEW met2 ( 607430 2489140 ) M2M3_PR_M
+ NEW li1 ( 607430 2486930 ) L1M1_PR_MR
+ NEW met1 ( 607430 2486930 ) M1M2_PR
+ NEW li1 ( 607430 2480470 ) L1M1_PR_MR
+ NEW met2 ( 1288690 931940 ) M2M3_PR_M
+ NEW met1 ( 1288690 2480470 ) M1M2_PR
+ NEW met1 ( 607430 2486930 ) RECT ( -355 -70 0 70 ) ;
+ - read_data_from_mem\[33\] ( core0 data_from_mem[33] ) ( chip_controller rd_data_out[33] ) + USE SIGNAL
+ + ROUTED met2 ( 402270 2699260 0 ) ( 403190 * )
+ NEW met2 ( 403190 2699260 ) ( * 2733430 )
+ NEW met1 ( 403190 2733430 ) ( 1335610 * )
+ NEW met2 ( 1335610 1713430 ) ( * 2733430 )
+ NEW met2 ( 2003070 1699660 0 ) ( * 1713430 )
+ NEW met1 ( 1335610 1713430 ) ( 2003070 * )
+ NEW met1 ( 403190 2733430 ) M1M2_PR
+ NEW met1 ( 1335610 2733430 ) M1M2_PR
+ NEW met1 ( 1335610 1713430 ) M1M2_PR
+ NEW met1 ( 2003070 1713430 ) M1M2_PR ;
+ - read_data_from_mem\[34\] ( core0 data_from_mem[34] ) ( chip_controller rd_data_out[34] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 984300 ) ( * 986510 )
+ NEW met2 ( 412390 2300100 0 ) ( 412850 * )
+ NEW met2 ( 412850 986510 ) ( * 2300100 )
+ NEW met1 ( 412850 986510 ) ( 1283630 * )
+ NEW met3 ( 1283630 984300 ) ( 1300420 * 0 )
+ NEW met1 ( 412850 986510 ) M1M2_PR
+ NEW met1 ( 1283630 986510 ) M1M2_PR
+ NEW met2 ( 1283630 984300 ) M2M3_PR_M ;
+ - read_data_from_mem\[35\] ( core0 data_from_mem[35] ) ( chip_controller rd_data_out[35] ) + USE SIGNAL
+ + ROUTED met2 ( 404570 2699940 ) ( 405950 * 0 )
+ NEW met2 ( 404570 2699940 ) ( * 2717790 )
+ NEW met1 ( 401810 2717790 ) ( 404570 * )
+ NEW met3 ( 2799100 801380 0 ) ( 2804850 * )
+ NEW met1 ( 2804850 1189490 ) ( 2806230 * )
+ NEW met2 ( 401810 2717790 ) ( * 2746690 )
+ NEW met2 ( 1473150 1715300 ) ( * 2746690 )
+ NEW met1 ( 2804850 1106530 ) ( 2806230 * )
+ NEW met2 ( 2804850 801380 ) ( * 1106530 )
+ NEW met2 ( 2804850 1189490 ) ( * 1715300 )
+ NEW met1 ( 401810 2746690 ) ( 1473150 * )
+ NEW met3 ( 1473150 1715300 ) ( 2804850 * )
+ NEW met2 ( 2806230 1106530 ) ( * 1189490 )
+ NEW met1 ( 404570 2717790 ) M1M2_PR
+ NEW met1 ( 401810 2717790 ) M1M2_PR
+ NEW met2 ( 2804850 801380 ) M2M3_PR_M
+ NEW met1 ( 2804850 1189490 ) M1M2_PR
+ NEW met1 ( 2806230 1189490 ) M1M2_PR
+ NEW met1 ( 401810 2746690 ) M1M2_PR
+ NEW met2 ( 1473150 1715300 ) M2M3_PR_M
+ NEW met1 ( 1473150 2746690 ) M1M2_PR
+ NEW met1 ( 2804850 1106530 ) M1M2_PR
+ NEW met1 ( 2806230 1106530 ) M1M2_PR
+ NEW met2 ( 2804850 1715300 ) M2M3_PR_M ;
+ - read_data_from_mem\[36\] ( core0 data_from_mem[36] ) ( chip_controller rd_data_out[36] ) + USE SIGNAL
+ + ROUTED met1 ( 419750 2283950 ) ( * 2284290 )
+ NEW met1 ( 414230 2284290 ) ( 419750 * )
+ NEW met2 ( 414230 2284290 ) ( * 2300100 0 )
+ NEW met2 ( 419750 1701870 ) ( * 2283950 )
+ NEW met3 ( 2799100 818380 0 ) ( 2809910 * )
+ NEW met2 ( 2809910 818380 ) ( * 819910 )
+ NEW met1 ( 2809910 819910 ) ( 2824170 * )
+ NEW met2 ( 2824170 819910 ) ( * 1701870 )
+ NEW met1 ( 419750 1701870 ) ( 2824170 * )
+ NEW met1 ( 419750 1701870 ) M1M2_PR
+ NEW met1 ( 419750 2283950 ) M1M2_PR
+ NEW met1 ( 414230 2284290 ) M1M2_PR
+ NEW met2 ( 2809910 818380 ) M2M3_PR_M
+ NEW met1 ( 2809910 819910 ) M1M2_PR
+ NEW met1 ( 2824170 819910 ) M1M2_PR
+ NEW met1 ( 2824170 1701870 ) M1M2_PR ;
+ - read_data_from_mem\[37\] ( core0 data_from_mem[37] ) ( chip_controller rd_data_out[37] ) + USE SIGNAL
+ + ROUTED met2 ( 412850 2699260 0 ) ( 413770 * )
+ NEW met2 ( 413770 2699260 ) ( * 2737170 )
+ NEW met2 ( 1283630 1019660 ) ( * 1021190 )
+ NEW met1 ( 413770 2737170 ) ( 922070 * )
+ NEW met2 ( 922070 1021190 ) ( * 2737170 )
+ NEW met1 ( 922070 1021190 ) ( 1283630 * )
+ NEW met3 ( 1283630 1019660 ) ( 1300420 * 0 )
+ NEW met1 ( 413770 2737170 ) M1M2_PR
+ NEW met1 ( 1283630 1021190 ) M1M2_PR
+ NEW met2 ( 1283630 1019660 ) M2M3_PR_M
+ NEW met1 ( 922070 2737170 ) M1M2_PR
+ NEW met1 ( 922070 1021190 ) M1M2_PR ;
+ - read_data_from_mem\[38\] ( core0 data_from_mem[38] ) ( chip_controller rd_data_out[38] ) + USE SIGNAL
+ + ROUTED met2 ( 472190 2276980 ) ( * 2288030 )
+ NEW met2 ( 472190 2276980 ) ( 473110 * )
+ NEW met2 ( 473110 1778370 ) ( * 2276980 )
+ NEW met2 ( 2056890 1699660 ) ( 2059190 * 0 )
+ NEW met2 ( 2056890 1699660 ) ( * 1778370 )
+ NEW li1 ( 446890 2286670 ) ( * 2288030 )
+ NEW met1 ( 435850 2286670 ) ( 446890 * )
+ NEW met1 ( 435850 2286330 ) ( * 2286670 )
+ NEW met1 ( 424350 2286330 ) ( 435850 * )
+ NEW met2 ( 424350 2286330 ) ( * 2300100 0 )
+ NEW met1 ( 446890 2288030 ) ( 472190 * )
+ NEW met1 ( 473110 1778370 ) ( 2056890 * )
+ NEW met1 ( 473110 1778370 ) M1M2_PR
+ NEW met1 ( 472190 2288030 ) M1M2_PR
+ NEW met1 ( 2056890 1778370 ) M1M2_PR
+ NEW li1 ( 446890 2288030 ) L1M1_PR_MR
+ NEW li1 ( 446890 2286670 ) L1M1_PR_MR
+ NEW met1 ( 424350 2286330 ) M1M2_PR ;
+ - read_data_from_mem\[39\] ( core0 data_from_mem[39] ) ( chip_controller rd_data_out[39] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2500700 0 ) ( 607890 * )
+ NEW met2 ( 607890 2498490 ) ( * 2500700 )
+ NEW met2 ( 2017790 202980 ) ( * 203150 )
+ NEW met2 ( 2017790 202980 ) ( 2019630 * 0 )
+ NEW met2 ( 991070 203150 ) ( * 2498490 )
+ NEW met1 ( 607890 2498490 ) ( 991070 * )
+ NEW met1 ( 991070 203150 ) ( 2017790 * )
+ NEW met2 ( 607890 2500700 ) M2M3_PR_M
+ NEW met1 ( 607890 2498490 ) M1M2_PR
+ NEW met1 ( 991070 203150 ) M1M2_PR
+ NEW met1 ( 991070 2498490 ) M1M2_PR
+ NEW met1 ( 2017790 203150 ) M1M2_PR ;
+ - read_data_from_mem\[3\] ( core0 data_from_mem[3] ) ( chip_controller rd_data_out[3] ) + USE SIGNAL
+ + ROUTED met2 ( 1352170 202810 ) ( * 202980 )
+ NEW met2 ( 1352170 202980 ) ( 1352630 * 0 )
+ NEW met1 ( 362250 202810 ) ( 1352170 * )
+ NEW met2 ( 240810 2288370 ) ( * 2300100 0 )
+ NEW met1 ( 240810 2288370 ) ( 362250 * )
+ NEW met2 ( 362250 202810 ) ( * 2288370 )
+ NEW met1 ( 1352170 202810 ) M1M2_PR
+ NEW met1 ( 362250 202810 ) M1M2_PR
+ NEW met1 ( 240810 2288370 ) M1M2_PR
+ NEW met1 ( 362250 2288370 ) M1M2_PR ;
+ - read_data_from_mem\[40\] ( core0 data_from_mem[40] ) ( chip_controller rd_data_out[40] ) + USE SIGNAL
+ + ROUTED met2 ( 190210 2504950 ) ( * 2508860 )
+ NEW met3 ( 190210 2508860 ) ( 201020 * )
+ NEW met3 ( 201020 2508860 ) ( * 2509540 0 )
+ NEW met2 ( 2034810 179690 ) ( * 200260 0 )
+ NEW met2 ( 94990 179690 ) ( * 2504950 )
+ NEW met1 ( 94990 2504950 ) ( 190210 * )
+ NEW met1 ( 94990 179690 ) ( 2034810 * )
+ NEW met1 ( 94990 179690 ) M1M2_PR
+ NEW met1 ( 94990 2504950 ) M1M2_PR
+ NEW met1 ( 190210 2504950 ) M1M2_PR
+ NEW met2 ( 190210 2508860 ) M2M3_PR_M
+ NEW met1 ( 2034810 179690 ) M1M2_PR ;
+ - read_data_from_mem\[41\] ( core0 data_from_mem[41] ) ( chip_controller rd_data_out[41] ) + USE SIGNAL
+ + ROUTED met2 ( 421590 2699260 0 ) ( 422970 * )
+ NEW met2 ( 422970 2699260 ) ( * 2732580 )
+ NEW met3 ( 422970 2732580 ) ( 1101010 * )
+ NEW met2 ( 2064710 191250 ) ( * 200260 0 )
+ NEW met1 ( 1101010 191250 ) ( 2064710 * )
+ NEW met2 ( 1101010 191250 ) ( * 2732580 )
+ NEW met2 ( 422970 2732580 ) M2M3_PR_M
+ NEW met1 ( 1101010 191250 ) M1M2_PR
+ NEW met2 ( 1101010 2732580 ) M2M3_PR_M
+ NEW met1 ( 2064710 191250 ) M1M2_PR ;
+ - read_data_from_mem\[42\] ( core0 data_from_mem[42] ) ( chip_controller rd_data_out[42] ) + USE SIGNAL
+ + ROUTED met1 ( 180090 2511750 ) ( 188370 * )
+ NEW met2 ( 188370 2511750 ) ( * 2514300 )
+ NEW met3 ( 188370 2514300 ) ( 201020 * )
+ NEW met3 ( 201020 2514300 ) ( * 2514980 0 )
+ NEW met3 ( 2799100 870740 0 ) ( 2810140 * )
+ NEW met3 ( 180090 1695580 ) ( 2810140 * )
+ NEW met2 ( 180090 1695580 ) ( * 2511750 )
+ NEW met4 ( 2810140 870740 ) ( * 1695580 )
+ NEW met1 ( 180090 2511750 ) M1M2_PR
+ NEW met1 ( 188370 2511750 ) M1M2_PR
+ NEW met2 ( 188370 2514300 ) M2M3_PR_M
+ NEW met3 ( 2810140 870740 ) M3M4_PR_M
+ NEW met2 ( 180090 1695580 ) M2M3_PR_M
+ NEW met3 ( 2810140 1695580 ) M3M4_PR_M ;
+ - read_data_from_mem\[43\] ( core0 data_from_mem[43] ) ( chip_controller rd_data_out[43] ) + USE SIGNAL
+ + ROUTED met2 ( 424810 2699260 0 ) ( 426190 * )
+ NEW met2 ( 426190 2699260 ) ( * 2734110 )
+ NEW met1 ( 426190 2734110 ) ( 1321350 * )
+ NEW met2 ( 1321350 1713770 ) ( * 2734110 )
+ NEW met2 ( 2078050 1699660 0 ) ( * 1713770 )
+ NEW met1 ( 1321350 1713770 ) ( 2078050 * )
+ NEW met1 ( 426190 2734110 ) M1M2_PR
+ NEW met1 ( 1321350 2734110 ) M1M2_PR
+ NEW met1 ( 1321350 1713770 ) M1M2_PR
+ NEW met1 ( 2078050 1713770 ) M1M2_PR ;
+ - read_data_from_mem\[44\] ( core0 data_from_mem[44] ) ( chip_controller rd_data_out[44] ) + USE SIGNAL
+ + ROUTED met2 ( 2093690 202980 ) ( 2095070 * 0 )
+ NEW met2 ( 2093690 202980 ) ( * 203150 )
+ NEW met1 ( 2093690 203150 ) ( * 203830 )
+ NEW met1 ( 433550 203830 ) ( 2093690 * )
+ NEW met1 ( 433550 2283950 ) ( 434470 * )
+ NEW met2 ( 434470 2283950 ) ( * 2300100 0 )
+ NEW met2 ( 433550 203830 ) ( * 2283950 )
+ NEW met1 ( 433550 203830 ) M1M2_PR
+ NEW met1 ( 2093690 203150 ) M1M2_PR
+ NEW met1 ( 433550 2283950 ) M1M2_PR
+ NEW met1 ( 434470 2283950 ) M1M2_PR ;
+ - read_data_from_mem\[45\] ( core0 data_from_mem[45] ) ( chip_controller rd_data_out[45] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2517700 0 ) ( 610190 * )
+ NEW met2 ( 610190 2505460 ) ( * 2517700 )
+ NEW met2 ( 609730 2505460 ) ( 610190 * )
+ NEW met3 ( 2799100 888420 0 ) ( 2814970 * )
+ NEW met2 ( 2814970 888420 ) ( * 888930 )
+ NEW met1 ( 2814970 888930 ) ( 2844870 * )
+ NEW met1 ( 609730 1728390 ) ( 2844870 * )
+ NEW met2 ( 2844870 888930 ) ( * 1728390 )
+ NEW met2 ( 609730 1728390 ) ( * 2505460 )
+ NEW met1 ( 609730 1728390 ) M1M2_PR
+ NEW met2 ( 610190 2517700 ) M2M3_PR_M
+ NEW met2 ( 2814970 888420 ) M2M3_PR_M
+ NEW met1 ( 2814970 888930 ) M1M2_PR
+ NEW met1 ( 2844870 888930 ) M1M2_PR
+ NEW met1 ( 2844870 1728390 ) M1M2_PR ;
+ - read_data_from_mem\[46\] ( core0 data_from_mem[46] ) ( chip_controller rd_data_out[46] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2522460 0 ) ( 613410 * )
+ NEW met2 ( 613410 2504610 ) ( * 2522460 )
+ NEW met1 ( 610190 2504610 ) ( 613410 * )
+ NEW met3 ( 2799100 906100 0 ) ( 2814970 * )
+ NEW met2 ( 2814970 906100 ) ( * 906610 )
+ NEW met1 ( 610190 1728730 ) ( 2837050 * )
+ NEW met1 ( 2814970 906610 ) ( 2837050 * )
+ NEW met2 ( 2837050 906610 ) ( * 1728730 )
+ NEW met2 ( 610190 1728730 ) ( * 2504610 )
+ NEW met1 ( 610190 1728730 ) M1M2_PR
+ NEW met2 ( 613410 2522460 ) M2M3_PR_M
+ NEW met1 ( 613410 2504610 ) M1M2_PR
+ NEW met1 ( 610190 2504610 ) M1M2_PR
+ NEW met2 ( 2814970 906100 ) M2M3_PR_M
+ NEW met1 ( 2814970 906610 ) M1M2_PR
+ NEW met1 ( 2837050 1728730 ) M1M2_PR
+ NEW met1 ( 2837050 906610 ) M1M2_PR ;
+ - read_data_from_mem\[47\] ( core0 data_from_mem[47] ) ( chip_controller rd_data_out[47] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2523820 0 ) ( 609270 * )
+ NEW met2 ( 609270 2518550 ) ( * 2523820 )
+ NEW met2 ( 2153950 202300 ) ( * 202470 )
+ NEW met2 ( 2153950 202300 ) ( 2155790 * 0 )
+ NEW met2 ( 1246370 202470 ) ( * 2518550 )
+ NEW met1 ( 609270 2518550 ) ( 1246370 * )
+ NEW met1 ( 1246370 202470 ) ( 2153950 * )
+ NEW met2 ( 609270 2523820 ) M2M3_PR_M
+ NEW met1 ( 609270 2518550 ) M1M2_PR
+ NEW met1 ( 1246370 202470 ) M1M2_PR
+ NEW met1 ( 1246370 2518550 ) M1M2_PR
+ NEW met1 ( 2153950 202470 ) M1M2_PR ;
+ - read_data_from_mem\[48\] ( core0 data_from_mem[48] ) ( chip_controller rd_data_out[48] ) + USE SIGNAL
+ + ROUTED met1 ( 2166370 189890 ) ( 2170970 * )
+ NEW met2 ( 2170970 189890 ) ( * 200260 0 )
+ NEW met2 ( 440910 165070 ) ( * 2300100 0 )
+ NEW met1 ( 440910 165070 ) ( 2166370 * )
+ NEW met2 ( 2166370 165070 ) ( * 189890 )
+ NEW met1 ( 2166370 189890 ) M1M2_PR
+ NEW met1 ( 2170970 189890 ) M1M2_PR
+ NEW met1 ( 440910 165070 ) M1M2_PR
+ NEW met1 ( 2166370 165070 ) M1M2_PR ;
+ - read_data_from_mem\[49\] ( core0 data_from_mem[49] ) ( chip_controller rd_data_out[49] ) + USE SIGNAL
+ + ROUTED met1 ( 188830 2342090 ) ( 192510 * )
+ NEW met3 ( 187910 2521780 ) ( 201020 * )
+ NEW met3 ( 201020 2521780 ) ( * 2522460 0 )
+ NEW met2 ( 187910 2497800 ) ( * 2521780 )
+ NEW met2 ( 187910 2497800 ) ( 188830 * )
+ NEW met2 ( 188830 2342090 ) ( * 2497800 )
+ NEW met2 ( 2115310 1699660 0 ) ( * 1714450 )
+ NEW met1 ( 200330 1714450 ) ( 2115310 * )
+ NEW met2 ( 192510 2332200 ) ( * 2342090 )
+ NEW met2 ( 192510 2332200 ) ( 192970 * )
+ NEW met2 ( 192970 2318630 ) ( * 2332200 )
+ NEW met1 ( 192970 2318630 ) ( 199870 * )
+ NEW met2 ( 199870 2318460 ) ( * 2318630 )
+ NEW met2 ( 199870 2318460 ) ( 200330 * )
+ NEW met2 ( 200330 2303500 ) ( * 2318460 )
+ NEW met2 ( 199870 2303500 ) ( 200330 * )
+ NEW met2 ( 199870 2293300 ) ( * 2303500 )
+ NEW met2 ( 199870 2293300 ) ( 200330 * )
+ NEW met2 ( 200330 1714450 ) ( * 2293300 )
+ NEW met1 ( 188830 2342090 ) M1M2_PR
+ NEW met1 ( 192510 2342090 ) M1M2_PR
+ NEW met2 ( 187910 2521780 ) M2M3_PR_M
+ NEW met1 ( 200330 1714450 ) M1M2_PR
+ NEW met1 ( 2115310 1714450 ) M1M2_PR
+ NEW met1 ( 192970 2318630 ) M1M2_PR
+ NEW met1 ( 199870 2318630 ) M1M2_PR ;
+ - read_data_from_mem\[4\] ( core0 data_from_mem[4] ) ( chip_controller rd_data_out[4] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 277780 0 ) ( 2814970 * )
+ NEW met2 ( 2814970 277780 ) ( * 282710 )
+ NEW met1 ( 2814970 282710 ) ( 2857290 * )
+ NEW met1 ( 255070 1763070 ) ( 2857290 * )
+ NEW met1 ( 250930 2283950 ) ( 255070 * )
+ NEW met2 ( 250930 2283950 ) ( * 2300100 0 )
+ NEW met2 ( 255070 1763070 ) ( * 2283950 )
+ NEW met2 ( 2857290 282710 ) ( * 1763070 )
+ NEW met2 ( 2814970 277780 ) M2M3_PR_M
+ NEW met1 ( 2814970 282710 ) M1M2_PR
+ NEW met1 ( 255070 1763070 ) M1M2_PR
+ NEW met1 ( 2857290 282710 ) M1M2_PR
+ NEW met1 ( 2857290 1763070 ) M1M2_PR
+ NEW met1 ( 255070 2283950 ) M1M2_PR
+ NEW met1 ( 250930 2283950 ) M1M2_PR ;
+ - read_data_from_mem\[50\] ( core0 data_from_mem[50] ) ( chip_controller rd_data_out[50] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2528580 0 ) ( 607890 * )
+ NEW met2 ( 607890 2526030 ) ( * 2528580 )
+ NEW met2 ( 997510 205870 ) ( * 2526030 )
+ NEW met1 ( 607890 2526030 ) ( 997510 * )
+ NEW met2 ( 2184310 202980 ) ( 2186150 * 0 )
+ NEW met2 ( 2184310 202810 ) ( * 202980 )
+ NEW li1 ( 2184310 202810 ) ( * 205870 )
+ NEW met1 ( 997510 205870 ) ( 2184310 * )
+ NEW met2 ( 607890 2528580 ) M2M3_PR_M
+ NEW met1 ( 607890 2526030 ) M1M2_PR
+ NEW met1 ( 997510 205870 ) M1M2_PR
+ NEW met1 ( 997510 2526030 ) M1M2_PR
+ NEW li1 ( 2184310 202810 ) L1M1_PR_MR
+ NEW met1 ( 2184310 202810 ) M1M2_PR
+ NEW li1 ( 2184310 205870 ) L1M1_PR_MR
+ NEW met1 ( 2184310 202810 ) RECT ( -355 -70 0 70 ) ;
+ - read_data_from_mem\[51\] ( core0 data_from_mem[51] ) ( chip_controller rd_data_out[51] ) + USE SIGNAL
+ + ROUTED met2 ( 2134170 1699660 0 ) ( * 1711390 )
+ NEW met1 ( 2128650 1711390 ) ( 2134170 * )
+ NEW met2 ( 2128650 1711390 ) ( * 1770890 )
+ NEW met1 ( 454250 1770890 ) ( 2128650 * )
+ NEW met2 ( 454250 1770890 ) ( * 2256300 )
+ NEW met2 ( 452410 2256300 ) ( 454250 * )
+ NEW met2 ( 452410 2256300 ) ( * 2300100 )
+ NEW met2 ( 451030 2300100 0 ) ( 452410 * )
+ NEW met1 ( 2128650 1770890 ) M1M2_PR
+ NEW met1 ( 2134170 1711390 ) M1M2_PR
+ NEW met1 ( 2128650 1711390 ) M1M2_PR
+ NEW met1 ( 454250 1770890 ) M1M2_PR ;
+ - read_data_from_mem\[52\] ( core0 data_from_mem[52] ) ( chip_controller rd_data_out[52] ) + USE SIGNAL
+ + ROUTED met2 ( 2216510 186490 ) ( * 200260 0 )
+ NEW met2 ( 447810 2699260 0 ) ( 448270 * )
+ NEW met2 ( 448270 2699260 ) ( * 2708100 )
+ NEW met1 ( 742210 186490 ) ( 2216510 * )
+ NEW met2 ( 742210 186490 ) ( * 2708100 )
+ NEW met3 ( 448270 2708100 ) ( 742210 * )
+ NEW met1 ( 2216510 186490 ) M1M2_PR
+ NEW met2 ( 448270 2708100 ) M2M3_PR_M
+ NEW met1 ( 742210 186490 ) M1M2_PR
+ NEW met2 ( 742210 2708100 ) M2M3_PR_M ;
+ - read_data_from_mem\[53\] ( core0 data_from_mem[53] ) ( chip_controller rd_data_out[53] ) + USE SIGNAL
+ + ROUTED met3 ( 195270 2524500 ) ( 200100 * )
+ NEW met3 ( 200100 2523820 0 ) ( * 2524500 )
+ NEW met2 ( 2153030 1699660 0 ) ( * 1785850 )
+ NEW met1 ( 195270 1785850 ) ( 2153030 * )
+ NEW met2 ( 195270 1785850 ) ( * 2524500 )
+ NEW met2 ( 195270 2524500 ) M2M3_PR_M
+ NEW met1 ( 195270 1785850 ) M1M2_PR
+ NEW met1 ( 2153030 1785850 ) M1M2_PR ;
+ - read_data_from_mem\[54\] ( core0 data_from_mem[54] ) ( chip_controller rd_data_out[54] ) + USE SIGNAL
+ + ROUTED met1 ( 462070 1770550 ) ( 2163150 * )
+ NEW met1 ( 457930 2283950 ) ( 462070 * )
+ NEW met2 ( 457930 2283950 ) ( * 2300100 0 )
+ NEW met2 ( 462070 1770550 ) ( * 2283950 )
+ NEW met2 ( 2171890 1699660 0 ) ( * 1711390 )
+ NEW met1 ( 2163150 1711390 ) ( 2171890 * )
+ NEW met2 ( 2163150 1711390 ) ( * 1770550 )
+ NEW met1 ( 462070 1770550 ) M1M2_PR
+ NEW met1 ( 2163150 1770550 ) M1M2_PR
+ NEW met1 ( 462070 2283950 ) M1M2_PR
+ NEW met1 ( 457930 2283950 ) M1M2_PR
+ NEW met1 ( 2171890 1711390 ) M1M2_PR
+ NEW met1 ( 2163150 1711390 ) M1M2_PR ;
+ - read_data_from_mem\[55\] ( core0 data_from_mem[55] ) ( chip_controller rd_data_out[55] ) + USE SIGNAL
+ + ROUTED met2 ( 2245030 202980 ) ( * 203150 )
+ NEW met2 ( 2245030 202980 ) ( 2246870 * 0 )
+ NEW met2 ( 493810 203490 ) ( * 2287180 )
+ NEW met1 ( 493810 203490 ) ( 2063100 * )
+ NEW met1 ( 2063100 202810 ) ( * 203490 )
+ NEW met1 ( 2063100 202810 ) ( 2111400 * )
+ NEW met1 ( 2111400 202810 ) ( * 203490 )
+ NEW met1 ( 2111400 203490 ) ( 2159700 * )
+ NEW met1 ( 2159700 203150 ) ( * 203490 )
+ NEW met1 ( 2159700 203150 ) ( 2245030 * )
+ NEW met2 ( 462990 2287180 ) ( * 2300100 0 )
+ NEW met3 ( 462990 2287180 ) ( 493810 * )
+ NEW met1 ( 493810 203490 ) M1M2_PR
+ NEW met1 ( 2245030 203150 ) M1M2_PR
+ NEW met2 ( 493810 2287180 ) M2M3_PR_M
+ NEW met2 ( 462990 2287180 ) M2M3_PR_M ;
+ - read_data_from_mem\[56\] ( core0 data_from_mem[56] ) ( chip_controller rd_data_out[56] ) + USE SIGNAL
+ + ROUTED met2 ( 190210 2525690 ) ( * 2529940 )
+ NEW met3 ( 190210 2529940 ) ( 200100 * )
+ NEW met3 ( 200100 2529260 0 ) ( * 2529940 )
+ NEW met2 ( 95450 193630 ) ( * 2525690 )
+ NEW met1 ( 95450 2525690 ) ( 190210 * )
+ NEW met2 ( 2262050 193630 ) ( * 200260 0 )
+ NEW met1 ( 95450 193630 ) ( 2262050 * )
+ NEW met1 ( 95450 193630 ) M1M2_PR
+ NEW met1 ( 95450 2525690 ) M1M2_PR
+ NEW met1 ( 190210 2525690 ) M1M2_PR
+ NEW met2 ( 190210 2529940 ) M2M3_PR_M
+ NEW met1 ( 2262050 193630 ) M1M2_PR ;
+ - read_data_from_mem\[57\] ( core0 data_from_mem[57] ) ( chip_controller rd_data_out[57] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2538100 0 ) ( 610190 * )
+ NEW met2 ( 610190 2525860 ) ( * 2538100 )
+ NEW met2 ( 609730 2525860 ) ( 610190 * )
+ NEW met2 ( 609730 2517700 ) ( * 2525860 )
+ NEW met2 ( 609270 2517700 ) ( 609730 * )
+ NEW met2 ( 609270 2510050 ) ( * 2517700 )
+ NEW li1 ( 609270 2497810 ) ( * 2510050 )
+ NEW met3 ( 2799100 958460 0 ) ( 2814970 * )
+ NEW met2 ( 2814970 958460 ) ( * 958970 )
+ NEW met1 ( 2814970 958970 ) ( 2850850 * )
+ NEW met1 ( 609270 1769870 ) ( 2850850 * )
+ NEW met2 ( 2850850 958970 ) ( * 1769870 )
+ NEW met2 ( 609270 1769870 ) ( * 2497810 )
+ NEW met1 ( 609270 1769870 ) M1M2_PR
+ NEW met2 ( 610190 2538100 ) M2M3_PR_M
+ NEW li1 ( 609270 2510050 ) L1M1_PR_MR
+ NEW met1 ( 609270 2510050 ) M1M2_PR
+ NEW li1 ( 609270 2497810 ) L1M1_PR_MR
+ NEW met1 ( 609270 2497810 ) M1M2_PR
+ NEW met2 ( 2814970 958460 ) M2M3_PR_M
+ NEW met1 ( 2814970 958970 ) M1M2_PR
+ NEW met1 ( 2850850 958970 ) M1M2_PR
+ NEW met1 ( 2850850 1769870 ) M1M2_PR
+ NEW met1 ( 609270 2510050 ) RECT ( -355 -70 0 70 )
+ NEW met1 ( 609270 2497810 ) RECT ( -355 -70 0 70 ) ;
+ - read_data_from_mem\[58\] ( core0 data_from_mem[58] ) ( chip_controller rd_data_out[58] ) + USE SIGNAL
+ + ROUTED met2 ( 2307590 190910 ) ( * 200260 0 )
+ NEW met2 ( 472650 2277660 ) ( 475410 * )
+ NEW met2 ( 472650 2277660 ) ( * 2300100 )
+ NEW met2 ( 471270 2300100 0 ) ( 472650 * )
+ NEW met2 ( 475410 206210 ) ( * 2277660 )
+ NEW li1 ( 1621730 202810 ) ( * 206210 )
+ NEW met2 ( 1621730 190910 ) ( * 202810 )
+ NEW met1 ( 475410 206210 ) ( 1621730 * )
+ NEW met1 ( 1621730 190910 ) ( 2307590 * )
+ NEW met1 ( 475410 206210 ) M1M2_PR
+ NEW met1 ( 2307590 190910 ) M1M2_PR
+ NEW li1 ( 1621730 206210 ) L1M1_PR_MR
+ NEW li1 ( 1621730 202810 ) L1M1_PR_MR
+ NEW met1 ( 1621730 202810 ) M1M2_PR
+ NEW met1 ( 1621730 190910 ) M1M2_PR
+ NEW met1 ( 1621730 202810 ) RECT ( -355 -70 0 70 ) ;
+ - read_data_from_mem\[59\] ( core0 data_from_mem[59] ) ( chip_controller rd_data_out[59] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2544220 0 ) ( 613410 * )
+ NEW met2 ( 613410 2522970 ) ( * 2544220 )
+ NEW li1 ( 613410 2503930 ) ( * 2522970 )
+ NEW met3 ( 2799100 993140 0 ) ( 2813590 * )
+ NEW met2 ( 2813590 993140 ) ( * 993310 )
+ NEW met1 ( 2813590 993310 ) ( 2831070 * )
+ NEW met2 ( 2831070 993310 ) ( * 1709690 )
+ NEW met1 ( 613410 1709690 ) ( 2831070 * )
+ NEW met2 ( 613410 1709690 ) ( * 2503930 )
+ NEW met2 ( 613410 2544220 ) M2M3_PR_M
+ NEW li1 ( 613410 2522970 ) L1M1_PR_MR
+ NEW met1 ( 613410 2522970 ) M1M2_PR
+ NEW li1 ( 613410 2503930 ) L1M1_PR_MR
+ NEW met1 ( 613410 2503930 ) M1M2_PR
+ NEW met2 ( 2813590 993140 ) M2M3_PR_M
+ NEW met1 ( 2813590 993310 ) M1M2_PR
+ NEW met1 ( 2831070 993310 ) M1M2_PR
+ NEW met1 ( 613410 1709690 ) M1M2_PR
+ NEW met1 ( 2831070 1709690 ) M1M2_PR
+ NEW met1 ( 613410 2522970 ) RECT ( -355 -70 0 70 )
+ NEW met1 ( 613410 2503930 ) RECT ( -355 -70 0 70 ) ;
+ - read_data_from_mem\[5\] ( core0 data_from_mem[5] ) ( chip_controller rd_data_out[5] ) + USE SIGNAL
+ + ROUTED met2 ( 776250 189210 ) ( * 2736490 )
+ NEW met2 ( 244030 2699260 0 ) ( 245410 * )
+ NEW met2 ( 245410 2699260 ) ( * 2736490 )
+ NEW met1 ( 245410 2736490 ) ( 776250 * )
+ NEW met2 ( 1398170 189210 ) ( * 200260 0 )
+ NEW met1 ( 776250 189210 ) ( 1398170 * )
+ NEW met1 ( 776250 189210 ) M1M2_PR
+ NEW met1 ( 776250 2736490 ) M1M2_PR
+ NEW met1 ( 245410 2736490 ) M1M2_PR
+ NEW met1 ( 1398170 189210 ) M1M2_PR ;
+ - read_data_from_mem\[60\] ( core0 data_from_mem[60] ) ( chip_controller rd_data_out[60] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 1125740 ) ( * 1131350 )
+ NEW met2 ( 468510 2699260 0 ) ( 468970 * )
+ NEW met2 ( 468970 2699260 ) ( * 2738190 )
+ NEW met1 ( 468970 2738190 ) ( 832370 * )
+ NEW met2 ( 832370 1131350 ) ( * 2738190 )
+ NEW met1 ( 832370 1131350 ) ( 1283630 * )
+ NEW met3 ( 1283630 1125740 ) ( 1300420 * 0 )
+ NEW met1 ( 1283630 1131350 ) M1M2_PR
+ NEW met2 ( 1283630 1125740 ) M2M3_PR_M
+ NEW met1 ( 468970 2738190 ) M1M2_PR
+ NEW met1 ( 832370 2738190 ) M1M2_PR
+ NEW met1 ( 832370 1131350 ) M1M2_PR ;
+ - read_data_from_mem\[61\] ( core0 data_from_mem[61] ) ( chip_controller rd_data_out[61] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2551020 0 ) ( 610190 * )
+ NEW met2 ( 610190 2546430 ) ( * 2551020 )
+ NEW met2 ( 1474070 1772250 ) ( * 2546430 )
+ NEW met2 ( 2208230 1699660 ) ( 2209150 * 0 )
+ NEW met2 ( 2208230 1699660 ) ( * 1772250 )
+ NEW met1 ( 1474070 1772250 ) ( 2208230 * )
+ NEW met1 ( 610190 2546430 ) ( 1474070 * )
+ NEW met1 ( 1474070 1772250 ) M1M2_PR
+ NEW met1 ( 2208230 1772250 ) M1M2_PR
+ NEW met2 ( 610190 2551020 ) M2M3_PR_M
+ NEW met1 ( 610190 2546430 ) M1M2_PR
+ NEW met1 ( 1474070 2546430 ) M1M2_PR ;
+ - read_data_from_mem\[62\] ( core0 data_from_mem[62] ) ( chip_controller rd_data_out[62] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2552380 0 ) ( 608810 * )
+ NEW met2 ( 608810 2546770 ) ( * 2552380 )
+ NEW met2 ( 1384370 1779730 ) ( * 2546770 )
+ NEW met2 ( 2244570 1699660 ) ( 2246870 * 0 )
+ NEW met2 ( 2244570 1699660 ) ( * 1779730 )
+ NEW met1 ( 608810 2546770 ) ( 1384370 * )
+ NEW met1 ( 1384370 1779730 ) ( 2244570 * )
+ NEW met2 ( 608810 2552380 ) M2M3_PR_M
+ NEW met1 ( 608810 2546770 ) M1M2_PR
+ NEW met1 ( 1384370 1779730 ) M1M2_PR
+ NEW met1 ( 1384370 2546770 ) M1M2_PR
+ NEW met1 ( 2244570 1779730 ) M1M2_PR ;
+ - read_data_from_mem\[63\] ( core0 data_from_mem[63] ) ( chip_controller rd_data_out[63] ) + USE SIGNAL
+ + ROUTED met2 ( 472190 2699260 0 ) ( 473110 * )
+ NEW met2 ( 473110 2699260 ) ( * 2733260 )
+ NEW met2 ( 2352670 189380 ) ( * 200260 0 )
+ NEW met3 ( 473110 2733260 ) ( 735770 * )
+ NEW met3 ( 735770 189380 ) ( 2352670 * )
+ NEW met2 ( 735770 189380 ) ( * 2733260 )
+ NEW met2 ( 473110 2733260 ) M2M3_PR_M
+ NEW met2 ( 2352670 189380 ) M2M3_PR_M
+ NEW met2 ( 735770 189380 ) M2M3_PR_M
+ NEW met2 ( 735770 2733260 ) M2M3_PR_M ;
+ - read_data_from_mem\[64\] ( core0 data_from_mem[64] ) ( chip_controller rd_data_out[64] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2558500 0 ) ( 607890 * )
+ NEW met2 ( 607890 2553910 ) ( * 2558500 )
+ NEW met1 ( 817650 204170 ) ( 2352900 * )
+ NEW met2 ( 2366930 202980 ) ( 2367850 * 0 )
+ NEW met2 ( 2366930 202980 ) ( * 203150 )
+ NEW met1 ( 2352900 203150 ) ( 2366930 * )
+ NEW met1 ( 2352900 203150 ) ( * 204170 )
+ NEW met1 ( 607890 2553910 ) ( 817650 * )
+ NEW met2 ( 817650 204170 ) ( * 2553910 )
+ NEW met2 ( 607890 2558500 ) M2M3_PR_M
+ NEW met1 ( 607890 2553910 ) M1M2_PR
+ NEW met1 ( 817650 204170 ) M1M2_PR
+ NEW met1 ( 2366930 203150 ) M1M2_PR
+ NEW met1 ( 817650 2553910 ) M1M2_PR ;
+ - read_data_from_mem\[65\] ( core0 data_from_mem[65] ) ( chip_controller rd_data_out[65] ) + USE SIGNAL
+ + ROUTED met2 ( 480930 2699260 0 ) ( 481850 * )
+ NEW met2 ( 481850 2699260 ) ( * 2737850 )
+ NEW met2 ( 1283630 1161100 ) ( * 1166030 )
+ NEW met2 ( 887570 1166030 ) ( * 2737850 )
+ NEW met1 ( 481850 2737850 ) ( 887570 * )
+ NEW met1 ( 887570 1166030 ) ( 1283630 * )
+ NEW met3 ( 1283630 1161100 ) ( 1300420 * 0 )
+ NEW met1 ( 481850 2737850 ) M1M2_PR
+ NEW met1 ( 887570 1166030 ) M1M2_PR
+ NEW met1 ( 887570 2737850 ) M1M2_PR
+ NEW met1 ( 1283630 1166030 ) M1M2_PR
+ NEW met2 ( 1283630 1161100 ) M2M3_PR_M ;
+ - read_data_from_mem\[66\] ( core0 data_from_mem[66] ) ( chip_controller rd_data_out[66] ) + USE SIGNAL
+ + ROUTED met2 ( 188370 2341580 ) ( 189290 * )
+ NEW met2 ( 188830 2500700 ) ( 189290 * )
+ NEW met2 ( 188830 2500700 ) ( * 2527900 )
+ NEW met2 ( 188370 2527900 ) ( 188830 * )
+ NEW met2 ( 188370 2527900 ) ( * 2544900 )
+ NEW met3 ( 188370 2544900 ) ( 199180 * )
+ NEW met2 ( 189290 2341580 ) ( * 2500700 )
+ NEW met3 ( 200100 2545580 0 ) ( * 2546100 )
+ NEW met3 ( 199180 2544900 ) ( * 2546100 )
+ NEW met3 ( 199180 2546100 ) ( 200100 * )
+ NEW met2 ( 2383030 192100 ) ( * 200260 0 )
+ NEW met3 ( 238050 192100 ) ( 2383030 * )
+ NEW met2 ( 238050 192100 ) ( * 2299590 )
+ NEW met2 ( 188370 2299590 ) ( * 2341580 )
+ NEW met1 ( 188370 2299590 ) ( 238050 * )
+ NEW met2 ( 188370 2544900 ) M2M3_PR_M
+ NEW met2 ( 238050 192100 ) M2M3_PR_M
+ NEW met2 ( 2383030 192100 ) M2M3_PR_M
+ NEW met1 ( 238050 2299590 ) M1M2_PR
+ NEW met1 ( 188370 2299590 ) M1M2_PR ;
+ - read_data_from_mem\[67\] ( core0 data_from_mem[67] ) ( chip_controller rd_data_out[67] ) + USE SIGNAL
+ + ROUTED met2 ( 107870 1694220 ) ( * 2546430 )
+ NEW met2 ( 186990 2546430 ) ( * 2546940 )
+ NEW met3 ( 186990 2546940 ) ( 201020 * )
+ NEW met3 ( 201020 2546940 ) ( * 2547620 0 )
+ NEW met3 ( 2799100 1045500 0 ) ( 2811980 * )
+ NEW met2 ( 2793810 1694220 ) ( * 1696260 )
+ NEW met3 ( 2793810 1696260 ) ( 2811980 * )
+ NEW met1 ( 107870 2546430 ) ( 186990 * )
+ NEW met3 ( 107870 1694220 ) ( 2793810 * )
+ NEW met4 ( 2811980 1045500 ) ( * 1696260 )
+ NEW met2 ( 107870 1694220 ) M2M3_PR_M
+ NEW met1 ( 107870 2546430 ) M1M2_PR
+ NEW met1 ( 186990 2546430 ) M1M2_PR
+ NEW met2 ( 186990 2546940 ) M2M3_PR_M
+ NEW met3 ( 2811980 1045500 ) M3M4_PR_M
+ NEW met2 ( 2793810 1694220 ) M2M3_PR_M
+ NEW met2 ( 2793810 1696260 ) M2M3_PR_M
+ NEW met3 ( 2811980 1696260 ) M3M4_PR_M ;
+ - read_data_from_mem\[68\] ( core0 data_from_mem[68] ) ( chip_controller rd_data_out[68] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2568020 0 ) ( 607430 * )
+ NEW met2 ( 607430 2568020 ) ( * 2568190 )
+ NEW met2 ( 2394530 200260 ) ( 2398210 * 0 )
+ NEW met1 ( 607430 2568190 ) ( 942770 * )
+ NEW met2 ( 942770 170510 ) ( * 2568190 )
+ NEW met1 ( 942770 170510 ) ( 2394530 * )
+ NEW met2 ( 2394530 170510 ) ( * 200260 )
+ NEW met2 ( 607430 2568020 ) M2M3_PR_M
+ NEW met1 ( 607430 2568190 ) M1M2_PR
+ NEW met1 ( 942770 170510 ) M1M2_PR
+ NEW met1 ( 942770 2568190 ) M1M2_PR
+ NEW met1 ( 2394530 170510 ) M1M2_PR ;
+ - read_data_from_mem\[69\] ( core0 data_from_mem[69] ) ( chip_controller rd_data_out[69] ) + USE SIGNAL
+ + ROUTED met2 ( 2413390 186830 ) ( * 200260 0 )
+ NEW met1 ( 488750 2283950 ) ( 489670 * )
+ NEW met2 ( 489670 2283950 ) ( * 2300100 0 )
+ NEW met2 ( 488750 1729070 ) ( * 2283950 )
+ NEW met2 ( 610650 186830 ) ( * 1729070 )
+ NEW met1 ( 488750 1729070 ) ( 610650 * )
+ NEW met1 ( 610650 186830 ) ( 2413390 * )
+ NEW met1 ( 488750 1729070 ) M1M2_PR
+ NEW met1 ( 610650 186830 ) M1M2_PR
+ NEW met1 ( 610650 1729070 ) M1M2_PR
+ NEW met1 ( 2413390 186830 ) M1M2_PR
+ NEW met1 ( 488750 2283950 ) M1M2_PR
+ NEW met1 ( 489670 2283950 ) M1M2_PR ;
+ - read_data_from_mem\[6\] ( core0 data_from_mem[6] ) ( chip_controller rd_data_out[6] ) + USE SIGNAL
+ + ROUTED met2 ( 247710 2699260 0 ) ( 248170 * )
+ NEW met2 ( 248170 2699260 ) ( * 2739210 )
+ NEW met1 ( 248170 2739210 ) ( 645610 * )
+ NEW met2 ( 645610 1717510 ) ( * 2739210 )
+ NEW met2 ( 1515470 1699660 0 ) ( * 1717510 )
+ NEW met1 ( 645610 1717510 ) ( 1515470 * )
+ NEW met1 ( 248170 2739210 ) M1M2_PR
+ NEW met1 ( 645610 2739210 ) M1M2_PR
+ NEW met1 ( 645610 1717510 ) M1M2_PR
+ NEW met1 ( 1515470 1717510 ) M1M2_PR ;
+ - read_data_from_mem\[70\] ( core0 data_from_mem[70] ) ( chip_controller rd_data_out[70] ) + USE SIGNAL
+ + ROUTED met2 ( 494730 2300100 0 ) ( 496110 * )
+ NEW met2 ( 496110 1214310 ) ( * 2300100 )
+ NEW met2 ( 1283630 1214140 ) ( * 1214310 )
+ NEW met1 ( 496110 1214310 ) ( 1283630 * )
+ NEW met3 ( 1283630 1214140 ) ( 1300420 * 0 )
+ NEW met1 ( 496110 1214310 ) M1M2_PR
+ NEW met1 ( 1283630 1214310 ) M1M2_PR
+ NEW met2 ( 1283630 1214140 ) M2M3_PR_M ;
+ - read_data_from_mem\[71\] ( core0 data_from_mem[71] ) ( chip_controller rd_data_out[71] ) + USE SIGNAL
+ + ROUTED met2 ( 489210 2699260 0 ) ( 489670 * )
+ NEW met2 ( 489670 2699260 ) ( * 2700620 )
+ NEW met2 ( 489210 2700620 ) ( 489670 * )
+ NEW met2 ( 489210 2700620 ) ( * 2733090 )
+ NEW met2 ( 1480050 1717850 ) ( * 2733090 )
+ NEW met1 ( 489210 2733090 ) ( 1480050 * )
+ NEW met2 ( 2302990 1699660 0 ) ( * 1717850 )
+ NEW met1 ( 1480050 1717850 ) ( 2302990 * )
+ NEW met1 ( 489210 2733090 ) M1M2_PR
+ NEW met1 ( 1480050 2733090 ) M1M2_PR
+ NEW met1 ( 1480050 1717850 ) M1M2_PR
+ NEW met1 ( 2302990 1717850 ) M1M2_PR ;
+ - read_data_from_mem\[72\] ( core0 data_from_mem[72] ) ( chip_controller rd_data_out[72] ) + USE SIGNAL
+ + ROUTED met1 ( 504850 2283950 ) ( 509910 * )
+ NEW met2 ( 504850 2283950 ) ( * 2300100 0 )
+ NEW met2 ( 509910 1235050 ) ( * 2283950 )
+ NEW met2 ( 1283630 1231820 ) ( * 1235050 )
+ NEW met1 ( 509910 1235050 ) ( 1283630 * )
+ NEW met3 ( 1283630 1231820 ) ( 1300420 * 0 )
+ NEW met1 ( 509910 1235050 ) M1M2_PR
+ NEW met1 ( 509910 2283950 ) M1M2_PR
+ NEW met1 ( 504850 2283950 ) M1M2_PR
+ NEW met1 ( 1283630 1235050 ) M1M2_PR
+ NEW met2 ( 1283630 1231820 ) M2M3_PR_M ;
+ - read_data_from_mem\[73\] ( core0 data_from_mem[73] ) ( chip_controller rd_data_out[73] ) + USE SIGNAL
+ + ROUTED met2 ( 2442830 200260 ) ( 2443750 * 0 )
+ NEW met3 ( 599380 2578900 0 ) ( 607430 * )
+ NEW met2 ( 607430 2574990 ) ( * 2578900 )
+ NEW met2 ( 894010 171190 ) ( * 2574990 )
+ NEW met2 ( 2442830 171190 ) ( * 200260 )
+ NEW met1 ( 607430 2574990 ) ( 894010 * )
+ NEW met1 ( 894010 171190 ) ( 2442830 * )
+ NEW met2 ( 607430 2578900 ) M2M3_PR_M
+ NEW met1 ( 607430 2574990 ) M1M2_PR
+ NEW met1 ( 894010 171190 ) M1M2_PR
+ NEW met1 ( 894010 2574990 ) M1M2_PR
+ NEW met1 ( 2442830 171190 ) M1M2_PR ;
+ - read_data_from_mem\[74\] ( core0 data_from_mem[74] ) ( chip_controller rd_data_out[74] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2585700 0 ) ( 608810 * )
+ NEW met2 ( 608810 2581110 ) ( * 2585700 )
+ NEW met2 ( 1348950 1779390 ) ( * 2581110 )
+ NEW met2 ( 2339330 1699660 ) ( 2340250 * 0 )
+ NEW met2 ( 2339330 1699660 ) ( * 1779390 )
+ NEW met1 ( 608810 2581110 ) ( 1348950 * )
+ NEW met1 ( 1348950 1779390 ) ( 2339330 * )
+ NEW met2 ( 608810 2585700 ) M2M3_PR_M
+ NEW met1 ( 608810 2581110 ) M1M2_PR
+ NEW met1 ( 1348950 1779390 ) M1M2_PR
+ NEW met1 ( 1348950 2581110 ) M1M2_PR
+ NEW met1 ( 2339330 1779390 ) M1M2_PR ;
+ - read_data_from_mem\[75\] ( core0 data_from_mem[75] ) ( chip_controller rd_data_out[75] ) + USE SIGNAL
+ + ROUTED met2 ( 190670 2400740 ) ( 191590 * )
+ NEW met2 ( 191590 2372180 ) ( * 2400740 )
+ NEW met3 ( 191590 2372180 ) ( 199180 * )
+ NEW met4 ( 199180 2371500 ) ( * 2372180 )
+ NEW met4 ( 199180 2371500 ) ( 200100 * )
+ NEW met4 ( 200100 2352900 ) ( * 2371500 )
+ NEW met4 ( 200100 2352900 ) ( 201020 * )
+ NEW met3 ( 190670 2561220 ) ( 200100 * )
+ NEW met3 ( 200100 2560540 0 ) ( * 2561220 )
+ NEW met2 ( 190670 2400740 ) ( * 2561220 )
+ NEW met2 ( 2458930 192780 ) ( * 200260 0 )
+ NEW met3 ( 202860 192780 ) ( 2458930 * )
+ NEW met4 ( 201020 2306900 ) ( 202860 * )
+ NEW met4 ( 201020 2306900 ) ( * 2352900 )
+ NEW met4 ( 202860 192780 ) ( * 2306900 )
+ NEW met3 ( 202860 192780 ) M3M4_PR_M
+ NEW met2 ( 191590 2372180 ) M2M3_PR_M
+ NEW met3 ( 199180 2372180 ) M3M4_PR_M
+ NEW met2 ( 190670 2561220 ) M2M3_PR_M
+ NEW met2 ( 2458930 192780 ) M2M3_PR_M ;
+ - read_data_from_mem\[76\] ( core0 data_from_mem[76] ) ( chip_controller rd_data_out[76] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2591820 0 ) ( 608810 * )
+ NEW met2 ( 608810 2587570 ) ( * 2591820 )
+ NEW met1 ( 1404610 1771910 ) ( 2356810 * )
+ NEW met1 ( 608810 2587570 ) ( 1404610 * )
+ NEW met2 ( 1404610 1771910 ) ( * 2587570 )
+ NEW met2 ( 2356810 1699660 ) ( 2359110 * 0 )
+ NEW met2 ( 2356810 1699660 ) ( * 1771910 )
+ NEW met2 ( 608810 2591820 ) M2M3_PR_M
+ NEW met1 ( 608810 2587570 ) M1M2_PR
+ NEW met1 ( 1404610 1771910 ) M1M2_PR
+ NEW met1 ( 2356810 1771910 ) M1M2_PR
+ NEW met1 ( 1404610 2587570 ) M1M2_PR ;
+ - read_data_from_mem\[77\] ( core0 data_from_mem[77] ) ( chip_controller rd_data_out[77] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 1284860 ) ( * 1290130 )
+ NEW met2 ( 508070 2300100 0 ) ( 509450 * )
+ NEW met2 ( 509450 1290130 ) ( * 2300100 )
+ NEW met1 ( 509450 1290130 ) ( 1283630 * )
+ NEW met3 ( 1283630 1284860 ) ( 1300420 * 0 )
+ NEW met1 ( 509450 1290130 ) M1M2_PR
+ NEW met1 ( 1283630 1290130 ) M1M2_PR
+ NEW met2 ( 1283630 1284860 ) M2M3_PR_M ;
+ - read_data_from_mem\[78\] ( core0 data_from_mem[78] ) ( chip_controller rd_data_out[78] ) + USE SIGNAL
+ + ROUTED met1 ( 511750 2283950 ) ( 515890 * )
+ NEW met2 ( 511750 2283950 ) ( * 2300100 0 )
+ NEW met2 ( 515890 1777350 ) ( * 2283950 )
+ NEW met3 ( 2799100 1114860 0 ) ( 2809910 * )
+ NEW met2 ( 2809910 1114860 ) ( * 1117750 )
+ NEW met1 ( 2809910 1117750 ) ( 2857750 * )
+ NEW met1 ( 515890 1777350 ) ( 2857750 * )
+ NEW met2 ( 2857750 1117750 ) ( * 1777350 )
+ NEW met1 ( 515890 1777350 ) M1M2_PR
+ NEW met1 ( 515890 2283950 ) M1M2_PR
+ NEW met1 ( 511750 2283950 ) M1M2_PR
+ NEW met2 ( 2809910 1114860 ) M2M3_PR_M
+ NEW met1 ( 2809910 1117750 ) M1M2_PR
+ NEW met1 ( 2857750 1117750 ) M1M2_PR
+ NEW met1 ( 2857750 1777350 ) M1M2_PR ;
+ - read_data_from_mem\[79\] ( core0 data_from_mem[79] ) ( chip_controller rd_data_out[79] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2594540 0 ) ( 613410 * )
+ NEW met2 ( 613410 2590970 ) ( * 2594540 )
+ NEW met2 ( 1289150 1302540 ) ( * 2590970 )
+ NEW met1 ( 613410 2590970 ) ( 1289150 * )
+ NEW met3 ( 1289150 1302540 ) ( 1300420 * 0 )
+ NEW met2 ( 613410 2594540 ) M2M3_PR_M
+ NEW met1 ( 613410 2590970 ) M1M2_PR
+ NEW met2 ( 1289150 1302540 ) M2M3_PR_M
+ NEW met1 ( 1289150 2590970 ) M1M2_PR ;
+ - read_data_from_mem\[7\] ( core0 data_from_mem[7] ) ( chip_controller rd_data_out[7] ) + USE SIGNAL
+ + ROUTED met2 ( 783610 441490 ) ( * 2736150 )
+ NEW met2 ( 1283630 437580 ) ( * 441490 )
+ NEW met2 ( 254610 2699260 0 ) ( 255070 * )
+ NEW met2 ( 255070 2699260 ) ( * 2736150 )
+ NEW met1 ( 255070 2736150 ) ( 783610 * )
+ NEW met1 ( 783610 441490 ) ( 1283630 * )
+ NEW met3 ( 1283630 437580 ) ( 1300420 * 0 )
+ NEW met1 ( 783610 2736150 ) M1M2_PR
+ NEW met1 ( 783610 441490 ) M1M2_PR
+ NEW met1 ( 1283630 441490 ) M1M2_PR
+ NEW met2 ( 1283630 437580 ) M2M3_PR_M
+ NEW met1 ( 255070 2736150 ) M1M2_PR ;
+ - read_data_from_mem\[80\] ( core0 data_from_mem[80] ) ( chip_controller rd_data_out[80] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2599300 0 ) ( 608350 * )
+ NEW met2 ( 608350 2594710 ) ( * 2599300 )
+ NEW met1 ( 608350 2594710 ) ( 1232570 * )
+ NEW met2 ( 2487910 202980 ) ( 2489290 * 0 )
+ NEW met3 ( 2469740 202980 ) ( 2487910 * )
+ NEW met3 ( 2469740 202980 ) ( * 203660 )
+ NEW met3 ( 1232570 203660 ) ( 2469740 * )
+ NEW met2 ( 1232570 203660 ) ( * 2594710 )
+ NEW met2 ( 608350 2599300 ) M2M3_PR_M
+ NEW met1 ( 608350 2594710 ) M1M2_PR
+ NEW met2 ( 1232570 203660 ) M2M3_PR_M
+ NEW met1 ( 1232570 2594710 ) M1M2_PR
+ NEW met2 ( 2487910 202980 ) M2M3_PR_M ;
+ - read_data_from_mem\[81\] ( core0 data_from_mem[81] ) ( chip_controller rd_data_out[81] ) + USE SIGNAL
+ + ROUTED met2 ( 509450 2699940 ) ( 510370 * 0 )
+ NEW met2 ( 509450 2699940 ) ( * 2725610 )
+ NEW met2 ( 674130 1338410 ) ( * 2725610 )
+ NEW met2 ( 1283630 1337220 ) ( * 1338410 )
+ NEW met1 ( 509450 2725610 ) ( 674130 * )
+ NEW met1 ( 674130 1338410 ) ( 1283630 * )
+ NEW met3 ( 1283630 1337220 ) ( 1300420 * 0 )
+ NEW met1 ( 509450 2725610 ) M1M2_PR
+ NEW met1 ( 674130 2725610 ) M1M2_PR
+ NEW met1 ( 674130 1338410 ) M1M2_PR
+ NEW met1 ( 1283630 1338410 ) M1M2_PR
+ NEW met2 ( 1283630 1337220 ) M2M3_PR_M ;
+ - read_data_from_mem\[82\] ( core0 data_from_mem[82] ) ( chip_controller rd_data_out[82] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2601340 0 ) ( 607430 * )
+ NEW met2 ( 607430 2601340 ) ( * 2601510 )
+ NEW met2 ( 1446470 1771570 ) ( * 2601510 )
+ NEW met2 ( 2415230 1699660 0 ) ( * 1771570 )
+ NEW met1 ( 607430 2601510 ) ( 1446470 * )
+ NEW met1 ( 1446470 1771570 ) ( 2415230 * )
+ NEW met2 ( 607430 2601340 ) M2M3_PR_M
+ NEW met1 ( 607430 2601510 ) M1M2_PR
+ NEW met1 ( 1446470 1771570 ) M1M2_PR
+ NEW met1 ( 1446470 2601510 ) M1M2_PR
+ NEW met1 ( 2415230 1771570 ) M1M2_PR ;
+ - read_data_from_mem\[83\] ( core0 data_from_mem[83] ) ( chip_controller rd_data_out[83] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2604060 0 ) ( 608810 * )
+ NEW met3 ( 2799100 1184900 0 ) ( 2814970 * )
+ NEW met2 ( 2814970 1184900 ) ( * 1185410 )
+ NEW met2 ( 608810 2594400 ) ( * 2604060 )
+ NEW met2 ( 608810 2594400 ) ( 610650 * )
+ NEW met1 ( 2814970 1185410 ) ( 2845330 * )
+ NEW met1 ( 610650 1735190 ) ( 2845330 * )
+ NEW met2 ( 2845330 1185410 ) ( * 1735190 )
+ NEW met2 ( 610650 1735190 ) ( * 2594400 )
+ NEW met1 ( 610650 1735190 ) M1M2_PR
+ NEW met2 ( 608810 2604060 ) M2M3_PR_M
+ NEW met2 ( 2814970 1184900 ) M2M3_PR_M
+ NEW met1 ( 2814970 1185410 ) M1M2_PR
+ NEW met1 ( 2845330 1185410 ) M1M2_PR
+ NEW met1 ( 2845330 1735190 ) M1M2_PR ;
+ - read_data_from_mem\[84\] ( core0 data_from_mem[84] ) ( chip_controller rd_data_out[84] ) + USE SIGNAL
+ + ROUTED met2 ( 2432250 1699660 ) ( 2434090 * 0 )
+ NEW met2 ( 2432250 1699660 ) ( * 1770210 )
+ NEW met1 ( 522790 1770210 ) ( 2432250 * )
+ NEW met2 ( 521870 2300100 0 ) ( 522790 * )
+ NEW met2 ( 522790 1770210 ) ( * 2300100 )
+ NEW met1 ( 2432250 1770210 ) M1M2_PR
+ NEW met1 ( 522790 1770210 ) M1M2_PR ;
+ - read_data_from_mem\[85\] ( core0 data_from_mem[85] ) ( chip_controller rd_data_out[85] ) + USE SIGNAL
+ + ROUTED met2 ( 1283630 1354900 ) ( * 1359150 )
+ NEW met1 ( 530150 1359150 ) ( 1283630 * )
+ NEW met3 ( 1283630 1354900 ) ( 1300420 * 0 )
+ NEW met1 ( 525090 2284630 ) ( 530150 * )
+ NEW met2 ( 525090 2284630 ) ( * 2300100 0 )
+ NEW met2 ( 530150 1359150 ) ( * 2284630 )
+ NEW met1 ( 1283630 1359150 ) M1M2_PR
+ NEW met2 ( 1283630 1354900 ) M2M3_PR_M
+ NEW met1 ( 530150 1359150 ) M1M2_PR
+ NEW met1 ( 530150 2284630 ) M1M2_PR
+ NEW met1 ( 525090 2284630 ) M1M2_PR ;
+ - read_data_from_mem\[86\] ( core0 data_from_mem[86] ) ( chip_controller rd_data_out[86] ) + USE SIGNAL
+ + ROUTED met2 ( 107410 1783470 ) ( * 2588250 )
+ NEW met2 ( 189750 2588250 ) ( * 2590460 )
+ NEW met3 ( 189750 2590460 ) ( 201020 * )
+ NEW met3 ( 201020 2590460 ) ( * 2591140 0 )
+ NEW met3 ( 2799100 1202580 0 ) ( 2809450 * )
+ NEW met2 ( 2809450 1202580 ) ( * 1783470 )
+ NEW met1 ( 107410 2588250 ) ( 189750 * )
+ NEW met1 ( 107410 1783470 ) ( 2809450 * )
+ NEW met1 ( 107410 1783470 ) M1M2_PR
+ NEW met1 ( 107410 2588250 ) M1M2_PR
+ NEW met1 ( 189750 2588250 ) M1M2_PR
+ NEW met2 ( 189750 2590460 ) M2M3_PR_M
+ NEW met2 ( 2809450 1202580 ) M2M3_PR_M
+ NEW met1 ( 2809450 1783470 ) M1M2_PR ;
+ - read_data_from_mem\[87\] ( core0 data_from_mem[87] ) ( chip_controller rd_data_out[87] ) + USE SIGNAL
+ + ROUTED met2 ( 1438650 1716830 ) ( * 2699090 )
+ NEW met2 ( 517730 2699260 ) ( * 2699430 )
+ NEW met1 ( 517730 2699090 ) ( * 2699430 )
+ NEW met2 ( 517270 2699260 0 ) ( 517730 * )
+ NEW met2 ( 2452950 1699660 0 ) ( * 1716830 )
+ NEW met1 ( 1438650 1716830 ) ( 2452950 * )
+ NEW met1 ( 517730 2699090 ) ( 1438650 * )
+ NEW met1 ( 1438650 2699090 ) M1M2_PR
+ NEW met1 ( 1438650 1716830 ) M1M2_PR
+ NEW met1 ( 517730 2699430 ) M1M2_PR
+ NEW met1 ( 2452950 1716830 ) M1M2_PR ;
+ - read_data_from_mem\[88\] ( core0 data_from_mem[88] ) ( chip_controller rd_data_out[88] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2616980 0 ) ( 612490 * )
+ NEW met3 ( 2799100 1237260 0 ) ( 2811750 * )
+ NEW met2 ( 2811750 1237260 ) ( * 1241850 )
+ NEW met1 ( 2811750 1241850 ) ( 2851310 * )
+ NEW met1 ( 612490 1778030 ) ( 2851310 * )
+ NEW met2 ( 2851310 1241850 ) ( * 1778030 )
+ NEW met2 ( 612490 1778030 ) ( * 2616980 )
+ NEW met2 ( 612490 2616980 ) M2M3_PR_M
+ NEW met1 ( 612490 1778030 ) M1M2_PR
+ NEW met2 ( 2811750 1237260 ) M2M3_PR_M
+ NEW met1 ( 2811750 1241850 ) M1M2_PR
+ NEW met1 ( 2851310 1241850 ) M1M2_PR
+ NEW met1 ( 2851310 1778030 ) M1M2_PR ;
+ - read_data_from_mem\[89\] ( core0 data_from_mem[89] ) ( chip_controller rd_data_out[89] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2618340 0 ) ( 607890 * )
+ NEW met2 ( 607890 2615110 ) ( * 2618340 )
+ NEW met2 ( 1466250 1763750 ) ( * 2615110 )
+ NEW met1 ( 607890 2615110 ) ( 1466250 * )
+ NEW met1 ( 1466250 1763750 ) ( 2470430 * )
+ NEW met2 ( 2470430 1699660 ) ( 2471810 * 0 )
+ NEW met2 ( 2470430 1699660 ) ( * 1763750 )
+ NEW met2 ( 607890 2618340 ) M2M3_PR_M
+ NEW met1 ( 607890 2615110 ) M1M2_PR
+ NEW met1 ( 1466250 1763750 ) M1M2_PR
+ NEW met1 ( 1466250 2615110 ) M1M2_PR
+ NEW met1 ( 2470430 1763750 ) M1M2_PR ;
+ - read_data_from_mem\[8\] ( core0 data_from_mem[8] ) ( chip_controller rd_data_out[8] ) + USE SIGNAL
+ + ROUTED met2 ( 1532490 200260 ) ( 1534790 * 0 )
+ NEW met2 ( 279450 2285990 ) ( * 2300100 0 )
+ NEW met2 ( 472650 174590 ) ( * 2256300 )
+ NEW met2 ( 471730 2256300 ) ( * 2288710 )
+ NEW met2 ( 471730 2256300 ) ( 472650 * )
+ NEW met2 ( 1532490 174590 ) ( * 200260 )
+ NEW li1 ( 444590 2285990 ) ( * 2288710 )
+ NEW met1 ( 279450 2285990 ) ( 444590 * )
+ NEW met1 ( 444590 2288710 ) ( 471730 * )
+ NEW met1 ( 472650 174590 ) ( 1532490 * )
+ NEW met1 ( 279450 2285990 ) M1M2_PR
+ NEW met1 ( 472650 174590 ) M1M2_PR
+ NEW met1 ( 471730 2288710 ) M1M2_PR
+ NEW met1 ( 1532490 174590 ) M1M2_PR
+ NEW li1 ( 444590 2285990 ) L1M1_PR_MR
+ NEW li1 ( 444590 2288710 ) L1M1_PR_MR ;
+ - read_data_from_mem\[90\] ( core0 data_from_mem[90] ) ( chip_controller rd_data_out[90] ) + USE SIGNAL
+ + ROUTED met2 ( 189290 2594710 ) ( * 2597940 )
+ NEW met3 ( 189290 2597940 ) ( 201020 * )
+ NEW met3 ( 201020 2597940 ) ( * 2598620 0 )
+ NEW met3 ( 2799100 1289620 0 ) ( 2809910 * )
+ NEW met2 ( 101890 1776670 ) ( * 2594710 )
+ NEW met2 ( 2809910 1289620 ) ( * 1776670 )
+ NEW met1 ( 101890 2594710 ) ( 189290 * )
+ NEW met1 ( 101890 1776670 ) ( 2809910 * )
+ NEW met1 ( 101890 2594710 ) M1M2_PR
+ NEW met1 ( 189290 2594710 ) M1M2_PR
+ NEW met2 ( 189290 2597940 ) M2M3_PR_M
+ NEW met2 ( 2809910 1289620 ) M2M3_PR_M
+ NEW met1 ( 101890 1776670 ) M1M2_PR
+ NEW met1 ( 2809910 1776670 ) M1M2_PR ;
+ - read_data_from_mem\[91\] ( core0 data_from_mem[91] ) ( chip_controller rd_data_out[91] ) + USE SIGNAL
+ + ROUTED met3 ( 188370 2599980 ) ( 201020 * )
+ NEW met3 ( 201020 2599980 ) ( * 2600660 0 )
+ NEW met2 ( 187450 2546100 ) ( 188370 * )
+ NEW met2 ( 188370 2546100 ) ( * 2599980 )
+ NEW met3 ( 2799100 1324300 0 ) ( 2808530 * )
+ NEW met2 ( 2808530 1324300 ) ( * 1324470 )
+ NEW met1 ( 2808530 1324470 ) ( 2816810 * )
+ NEW met2 ( 2816810 1324470 ) ( * 1762730 )
+ NEW met1 ( 187450 1762730 ) ( 2816810 * )
+ NEW met2 ( 187450 1762730 ) ( * 2546100 )
+ NEW met1 ( 187450 1762730 ) M1M2_PR
+ NEW met2 ( 188370 2599980 ) M2M3_PR_M
+ NEW met1 ( 2816810 1762730 ) M1M2_PR
+ NEW met2 ( 2808530 1324300 ) M2M3_PR_M
+ NEW met1 ( 2808530 1324470 ) M1M2_PR
+ NEW met1 ( 2816810 1324470 ) M1M2_PR ;
+ - read_data_from_mem\[92\] ( core0 data_from_mem[92] ) ( chip_controller rd_data_out[92] ) + USE SIGNAL
+ + ROUTED met2 ( 1052250 188700 ) ( * 2736830 )
+ NEW met2 ( 527850 2699260 0 ) ( 528770 * )
+ NEW met2 ( 528770 2699260 ) ( * 2736830 )
+ NEW met1 ( 528770 2736830 ) ( 1052250 * )
+ NEW met2 ( 2564730 188700 ) ( * 200260 0 )
+ NEW met3 ( 1052250 188700 ) ( 2564730 * )
+ NEW met2 ( 1052250 188700 ) M2M3_PR_M
+ NEW met1 ( 1052250 2736830 ) M1M2_PR
+ NEW met1 ( 528770 2736830 ) M1M2_PR
+ NEW met2 ( 2564730 188700 ) M2M3_PR_M ;
+ - read_data_from_mem\[93\] ( core0 data_from_mem[93] ) ( chip_controller rd_data_out[93] ) + USE SIGNAL
+ + ROUTED met2 ( 2509070 1699660 0 ) ( * 1717170 )
+ NEW li1 ( 530150 2696370 ) ( * 2699430 )
+ NEW met2 ( 530150 2699260 ) ( * 2699430 )
+ NEW met2 ( 529230 2699260 0 ) ( 530150 * )
+ NEW met2 ( 1494310 1717170 ) ( * 2696370 )
+ NEW met1 ( 1494310 1717170 ) ( 2509070 * )
+ NEW met1 ( 530150 2696370 ) ( 1494310 * )
+ NEW met1 ( 2509070 1717170 ) M1M2_PR
+ NEW li1 ( 530150 2696370 ) L1M1_PR_MR
+ NEW li1 ( 530150 2699430 ) L1M1_PR_MR
+ NEW met1 ( 530150 2699430 ) M1M2_PR
+ NEW met1 ( 1494310 2696370 ) M1M2_PR
+ NEW met1 ( 1494310 1717170 ) M1M2_PR
+ NEW met1 ( 530150 2699430 ) RECT ( -355 -70 0 70 ) ;
+ - read_data_from_mem\[94\] ( core0 data_from_mem[94] ) ( chip_controller rd_data_out[94] ) + USE SIGNAL
+ + ROUTED met2 ( 188830 2608650 ) ( * 2610860 )
+ NEW met3 ( 188830 2610860 ) ( 201020 * )
+ NEW met3 ( 201020 2610860 ) ( * 2611540 0 )
+ NEW met2 ( 120290 2280210 ) ( * 2608650 )
+ NEW met2 ( 1285930 1372580 ) ( * 2280210 )
+ NEW met1 ( 120290 2608650 ) ( 188830 * )
+ NEW met3 ( 1285930 1372580 ) ( 1300420 * 0 )
+ NEW met1 ( 120290 2280210 ) ( 1285930 * )
+ NEW met1 ( 120290 2608650 ) M1M2_PR
+ NEW met1 ( 188830 2608650 ) M1M2_PR
+ NEW met2 ( 188830 2610860 ) M2M3_PR_M
+ NEW met2 ( 1285930 1372580 ) M2M3_PR_M
+ NEW met1 ( 120290 2280210 ) M1M2_PR
+ NEW met1 ( 1285930 2280210 ) M1M2_PR ;
+ - read_data_from_mem\[95\] ( core0 data_from_mem[95] ) ( chip_controller rd_data_out[95] ) + USE SIGNAL
+ + ROUTED met2 ( 189290 2608310 ) ( * 2613580 )
+ NEW met3 ( 189290 2613580 ) ( 200100 * )
+ NEW met3 ( 200100 2612900 0 ) ( * 2613580 )
+ NEW met3 ( 2799100 1376660 0 ) ( 2810370 * )
+ NEW met2 ( 113850 1790270 ) ( * 2608310 )
+ NEW met2 ( 2810370 1376660 ) ( * 1790270 )
+ NEW met1 ( 113850 2608310 ) ( 189290 * )
+ NEW met1 ( 113850 1790270 ) ( 2810370 * )
+ NEW met1 ( 113850 2608310 ) M1M2_PR
+ NEW met1 ( 189290 2608310 ) M1M2_PR
+ NEW met2 ( 189290 2613580 ) M2M3_PR_M
+ NEW met2 ( 2810370 1376660 ) M2M3_PR_M
+ NEW met1 ( 113850 1790270 ) M1M2_PR
+ NEW met1 ( 2810370 1790270 ) M1M2_PR ;
+ - read_data_from_mem\[96\] ( core0 data_from_mem[96] ) ( chip_controller rd_data_out[96] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 1394340 0 ) ( 2813130 * )
+ NEW met2 ( 2813130 1394340 ) ( * 1694730 )
+ NEW met2 ( 532910 2699260 0 ) ( 534290 * )
+ NEW met2 ( 534290 2699260 ) ( * 2713030 )
+ NEW met1 ( 624910 1694730 ) ( 2813130 * )
+ NEW met1 ( 534290 2713030 ) ( 624910 * )
+ NEW met2 ( 624910 1694730 ) ( * 2713030 )
+ NEW met2 ( 2813130 1394340 ) M2M3_PR_M
+ NEW met1 ( 2813130 1694730 ) M1M2_PR
+ NEW met1 ( 534290 2713030 ) M1M2_PR
+ NEW met1 ( 624910 1694730 ) M1M2_PR
+ NEW met1 ( 624910 2713030 ) M1M2_PR ;
+ - read_data_from_mem\[97\] ( core0 data_from_mem[97] ) ( chip_controller rd_data_out[97] ) + USE SIGNAL
+ + ROUTED met2 ( 1355850 1716490 ) ( * 2734450 )
+ NEW met2 ( 536590 2699260 0 ) ( 537050 * )
+ NEW met2 ( 537050 2699260 ) ( * 2734450 )
+ NEW met1 ( 537050 2734450 ) ( 1355850 * )
+ NEW met2 ( 2546790 1699660 0 ) ( * 1716490 )
+ NEW met1 ( 1355850 1716490 ) ( 2546790 * )
+ NEW met1 ( 1355850 2734450 ) M1M2_PR
+ NEW met1 ( 1355850 1716490 ) M1M2_PR
+ NEW met1 ( 537050 2734450 ) M1M2_PR
+ NEW met1 ( 2546790 1716490 ) M1M2_PR ;
+ - read_data_from_mem\[98\] ( core0 data_from_mem[98] ) ( chip_controller rd_data_out[98] ) + USE SIGNAL
+ + ROUTED met3 ( 599380 2642140 0 ) ( 609270 * )
+ NEW met2 ( 609270 2632110 ) ( * 2642140 )
+ NEW met2 ( 1289610 1390260 ) ( * 2632110 )
+ NEW met1 ( 609270 2632110 ) ( 1289610 * )
+ NEW met3 ( 1289610 1390260 ) ( 1300420 * 0 )
+ NEW met2 ( 609270 2642140 ) M2M3_PR_M
+ NEW met1 ( 609270 2632110 ) M1M2_PR
+ NEW met1 ( 1289610 2632110 ) M1M2_PR
+ NEW met2 ( 1289610 1390260 ) M2M3_PR_M ;
+ - read_data_from_mem\[99\] ( core0 data_from_mem[99] ) ( chip_controller rd_data_out[99] ) + USE SIGNAL
+ + ROUTED met3 ( 2799100 1429020 0 ) ( 2811750 * )
+ NEW met2 ( 2811750 1429020 ) ( * 1785510 )
+ NEW met2 ( 543490 2699260 0 ) ( 544410 * )
+ NEW met2 ( 544410 2699260 ) ( * 2712350 )
+ NEW met1 ( 616630 1785510 ) ( 2811750 * )
+ NEW met1 ( 544410 2712350 ) ( 616630 * )
+ NEW met2 ( 616630 1785510 ) ( * 2712350 )
+ NEW met2 ( 2811750 1429020 ) M2M3_PR_M
+ NEW met1 ( 2811750 1785510 ) M1M2_PR
+ NEW met1 ( 544410 2712350 ) M1M2_PR
+ NEW met1 ( 616630 1785510 ) M1M2_PR
+ NEW met1 ( 616630 2712350 ) M1M2_PR ;
+ - read_data_from_mem\[9\] ( core0 data_from_mem[9] ) ( chip_controller rd_data_out[9] ) + USE SIGNAL
+ + ROUTED met3 ( 193890 2359940 ) ( 201020 * )
+ NEW met3 ( 201020 2359940 ) ( * 2360620 0 )
+ NEW met2 ( 1571590 1699660 0 ) ( * 1714790 )
+ NEW met1 ( 196190 1714790 ) ( 1571590 * )
+ NEW met2 ( 193890 2308940 ) ( 194810 * )
+ NEW met2 ( 194810 2307410 ) ( * 2308940 )
+ NEW met1 ( 194810 2307410 ) ( 196190 * )
+ NEW met2 ( 193890 2308940 ) ( * 2359940 )
+ NEW met2 ( 196190 1714790 ) ( * 2307410 )
+ NEW met1 ( 196190 1714790 ) M1M2_PR
+ NEW met2 ( 193890 2359940 ) M2M3_PR_M
+ NEW met1 ( 1571590 1714790 ) M1M2_PR
+ NEW met1 ( 194810 2307410 ) M1M2_PR
+ NEW met1 ( 196190 2307410 ) M1M2_PR ;
- read_enable_to_Elpis ( chip_controller read_enable_to_Elpis ) + USE SIGNAL ;
- - read_interactive_req_core0 ( chip_controller read_interactive_req_core0 ) + USE SIGNAL ;
+ - read_interactive_req_core0 ( core0 read_interactive_req ) ( chip_controller read_interactive_req_core0 ) + USE SIGNAL
+ + ROUTED met1 ( 217350 2283950 ) ( 220110 * )
+ NEW met2 ( 217350 2283950 ) ( * 2300100 0 )
+ NEW met2 ( 220110 1715130 ) ( * 2283950 )
+ NEW met2 ( 1365510 1699660 0 ) ( * 1715130 )
+ NEW met1 ( 220110 1715130 ) ( 1365510 * )
+ NEW met1 ( 220110 1715130 ) M1M2_PR
+ NEW met1 ( 220110 2283950 ) M1M2_PR
+ NEW met1 ( 217350 2283950 ) M1M2_PR
+ NEW met1 ( 1365510 1715130 ) M1M2_PR ;
- read_value_to_Elpis\[0\] ( chip_controller read_value_to_Elpis[0] ) + USE SIGNAL ;
- read_value_to_Elpis\[10\] ( chip_controller read_value_to_Elpis[10] ) + USE SIGNAL ;
- read_value_to_Elpis\[11\] ( chip_controller read_value_to_Elpis[11] ) + USE SIGNAL ;
@@ -14394,22 +19315,41 @@
- read_value_to_Elpis\[7\] ( chip_controller read_value_to_Elpis[7] ) + USE SIGNAL ;
- read_value_to_Elpis\[8\] ( chip_controller read_value_to_Elpis[8] ) + USE SIGNAL ;
- read_value_to_Elpis\[9\] ( chip_controller read_value_to_Elpis[9] ) + USE SIGNAL ;
- - req_out_core0 ( chip_controller req_out_core0 ) + USE SIGNAL ;
- - reset_core ( chip_controller reset_core ) + USE SIGNAL ;
+ - req_out_core0 ( core0 hex_req ) ( chip_controller req_out_core0 ) + USE SIGNAL
+ + ROUTED met1 ( 214130 2284290 ) ( 220570 * )
+ NEW met2 ( 214130 2284290 ) ( * 2300100 0 )
+ NEW met2 ( 220570 1715470 ) ( * 2284290 )
+ NEW met2 ( 1384370 1699660 0 ) ( * 1715470 )
+ NEW met1 ( 220570 1715470 ) ( 1384370 * )
+ NEW met1 ( 220570 1715470 ) M1M2_PR
+ NEW met1 ( 220570 2284290 ) M1M2_PR
+ NEW met1 ( 214130 2284290 ) M1M2_PR
+ NEW met1 ( 1384370 1715470 ) M1M2_PR ;
+ - reset_core ( core0 rst ) ( chip_controller reset_core ) + USE SIGNAL
+ + ROUTED met2 ( 207230 2287350 ) ( * 2300100 0 )
+ NEW met1 ( 207230 2287350 ) ( 259210 * )
+ NEW met2 ( 259210 1716490 ) ( * 2287350 )
+ NEW met2 ( 1327790 1699660 0 ) ( * 1716490 )
+ NEW met1 ( 259210 1716490 ) ( 1327790 * )
+ NEW met1 ( 207230 2287350 ) M1M2_PR
+ NEW met1 ( 259210 1716490 ) M1M2_PR
+ NEW met1 ( 259210 2287350 ) M1M2_PR
+ NEW met1 ( 1327790 1716490 ) M1M2_PR ;
- rst ( chip_controller rst ) + USE SIGNAL ;
- spare_wen0_to_sram ( custom_sram spare_wen0_to_sram ) ( chip_controller spare_wen0_to_sram ) + USE SIGNAL
- + ROUTED met2 ( 206310 2208000 ) ( * 2222410 )
- NEW met2 ( 204010 2199460 0 ) ( 204930 * )
- NEW met2 ( 204930 2199460 ) ( * 2208000 )
- NEW met2 ( 204930 2208000 ) ( 206310 * )
- NEW met2 ( 1459810 1793670 ) ( * 2222410 )
- NEW met2 ( 1661750 1793670 ) ( * 1800300 0 )
- NEW met1 ( 206310 2222410 ) ( 1459810 * )
- NEW met1 ( 1459810 1793670 ) ( 1661750 * )
- NEW met1 ( 206310 2222410 ) M1M2_PR
- NEW met1 ( 1459810 2222410 ) M1M2_PR
- NEW met1 ( 1459810 1793670 ) M1M2_PR
- NEW met1 ( 1661750 1793670 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2303500 0 ) ( 606510 * )
+ NEW met2 ( 606510 2298570 ) ( * 2303500 )
+ NEW met2 ( 1474530 1959590 ) ( * 2298570 )
+ NEW met2 ( 1490170 1953980 ) ( * 1959590 )
+ NEW met3 ( 1490170 1953980 ) ( 1500060 * 0 )
+ NEW met1 ( 1474530 1959590 ) ( 1490170 * )
+ NEW met1 ( 606510 2298570 ) ( 1474530 * )
+ NEW met1 ( 1474530 1959590 ) M1M2_PR
+ NEW met2 ( 606510 2303500 ) M2M3_PR_M
+ NEW met1 ( 606510 2298570 ) M1M2_PR
+ NEW met1 ( 1474530 2298570 ) M1M2_PR
+ NEW met1 ( 1490170 1959590 ) M1M2_PR
+ NEW met2 ( 1490170 1953980 ) M2M3_PR_M ;
- user_clock2 ( PIN user_clock2 ) + USE SIGNAL ;
- user_irq[0] ( PIN user_irq[0] ) + USE SIGNAL ;
- user_irq[1] ( PIN user_irq[1] ) + USE SIGNAL ;
@@ -14417,23 +19357,24 @@
- wb_clk_i ( PIN wb_clk_i ) ( chip_controller wb_clk_i ) + USE SIGNAL
+ ROUTED met2 ( 2990 2380 0 ) ( * 17510 )
NEW met1 ( 2990 17510 ) ( 6670 * )
- NEW met2 ( 6670 17510 ) ( * 1792310 )
- NEW met2 ( 201250 1792310 ) ( * 1800300 0 )
- NEW met1 ( 6670 1792310 ) ( 201250 * )
+ NEW met2 ( 6670 17510 ) ( * 2287350 )
+ NEW met2 ( 201710 2287350 ) ( * 2300100 )
+ NEW met2 ( 200790 2300100 0 ) ( 201710 * )
+ NEW met1 ( 6670 2287350 ) ( 201710 * )
NEW met1 ( 2990 17510 ) M1M2_PR
NEW met1 ( 6670 17510 ) M1M2_PR
- NEW met1 ( 6670 1792310 ) M1M2_PR
- NEW met1 ( 201250 1792310 ) M1M2_PR ;
+ NEW met1 ( 6670 2287350 ) M1M2_PR
+ NEW met1 ( 201710 2287350 ) M1M2_PR ;
- wb_rst_i ( PIN wb_rst_i ) ( chip_controller wb_rst_i ) + USE SIGNAL
+ ROUTED met2 ( 8510 2380 0 ) ( * 20570 )
- NEW met2 ( 203090 1789930 ) ( * 1800300 0 )
NEW met1 ( 8510 20570 ) ( 37950 * )
- NEW met2 ( 37950 20570 ) ( * 1789930 )
- NEW met1 ( 37950 1789930 ) ( 203090 * )
+ NEW met2 ( 37950 20570 ) ( * 2287690 )
+ NEW met2 ( 202170 2287690 ) ( * 2300100 0 )
+ NEW met1 ( 37950 2287690 ) ( 202170 * )
NEW met1 ( 8510 20570 ) M1M2_PR
- NEW met1 ( 203090 1789930 ) M1M2_PR
NEW met1 ( 37950 20570 ) M1M2_PR
- NEW met1 ( 37950 1789930 ) M1M2_PR ;
+ NEW met1 ( 37950 2287690 ) M1M2_PR
+ NEW met1 ( 202170 2287690 ) M1M2_PR ;
- wbs_ack_o ( PIN wbs_ack_o ) + USE SIGNAL ;
- wbs_adr_i[0] ( PIN wbs_adr_i[0] ) + USE SIGNAL ;
- wbs_adr_i[10] ( PIN wbs_adr_i[10] ) + USE SIGNAL ;
@@ -14501,424 +19442,437 @@
- wbs_dat_i[8] ( PIN wbs_dat_i[8] ) + USE SIGNAL ;
- wbs_dat_i[9] ( PIN wbs_dat_i[9] ) + USE SIGNAL ;
- wbs_dat_o[0] ( PIN wbs_dat_o[0] ) ( chip_controller wbs_dat_o[0] ) + USE SIGNAL
- + ROUTED met2 ( 49910 2380 0 ) ( * 17510 )
+ + ROUTED met2 ( 204470 2699940 ) ( 205850 * 0 )
+ NEW met2 ( 204470 2699940 ) ( * 2712010 )
+ NEW met2 ( 49910 2380 0 ) ( * 17510 )
NEW met1 ( 49910 17510 ) ( 54970 * )
- NEW met2 ( 54970 17510 ) ( * 1781430 )
- NEW met1 ( 54970 1781430 ) ( 601450 * )
- NEW met3 ( 599380 1824780 0 ) ( 601450 * )
- NEW met2 ( 601450 1781430 ) ( * 1824780 )
- NEW met1 ( 601450 1781430 ) M1M2_PR
+ NEW met1 ( 54970 2712010 ) ( 204470 * )
+ NEW met2 ( 54970 17510 ) ( * 2712010 )
+ NEW met1 ( 204470 2712010 ) M1M2_PR
NEW met1 ( 49910 17510 ) M1M2_PR
NEW met1 ( 54970 17510 ) M1M2_PR
- NEW met1 ( 54970 1781430 ) M1M2_PR
- NEW met2 ( 601450 1824780 ) M2M3_PR_M ;
+ NEW met1 ( 54970 2712010 ) M1M2_PR ;
- wbs_dat_o[10] ( PIN wbs_dat_o[10] ) ( chip_controller wbs_dat_o[10] ) + USE SIGNAL
- + ROUTED met2 ( 186530 2159700 ) ( 187450 * )
- NEW met2 ( 187450 2159700 ) ( * 2212210 )
- NEW met2 ( 281750 2199460 0 ) ( * 2212210 )
+ + ROUTED met3 ( 599380 2369460 0 ) ( 602370 * )
+ NEW met2 ( 602370 17850 ) ( * 2369460 )
NEW met2 ( 250930 2380 0 ) ( * 17850 )
- NEW met1 ( 248630 17850 ) ( 250930 * )
- NEW met1 ( 187450 2212210 ) ( 281750 * )
- NEW met1 ( 186530 1794690 ) ( 248630 * )
- NEW met2 ( 248630 17850 ) ( * 1794690 )
- NEW met2 ( 186530 1794690 ) ( * 2159700 )
- NEW met1 ( 187450 2212210 ) M1M2_PR
- NEW met1 ( 281750 2212210 ) M1M2_PR
- NEW met1 ( 186530 1794690 ) M1M2_PR
- NEW met1 ( 250930 17850 ) M1M2_PR
- NEW met1 ( 248630 17850 ) M1M2_PR
- NEW met1 ( 248630 1794690 ) M1M2_PR ;
+ NEW met1 ( 250930 17850 ) ( 602370 * )
+ NEW met1 ( 602370 17850 ) M1M2_PR
+ NEW met2 ( 602370 2369460 ) M2M3_PR_M
+ NEW met1 ( 250930 17850 ) M1M2_PR ;
- wbs_dat_o[11] ( PIN wbs_dat_o[11] ) ( chip_controller wbs_dat_o[11] ) + USE SIGNAL
- + ROUTED met3 ( 196190 1883260 ) ( 200100 * 0 )
- NEW met2 ( 268870 2380 0 ) ( * 3060 )
- NEW met2 ( 267950 3060 ) ( 268870 * )
- NEW met2 ( 267950 2380 ) ( * 3060 )
- NEW met2 ( 266570 2380 ) ( 267950 * )
- NEW met2 ( 263350 82800 ) ( 266570 * )
- NEW met2 ( 266570 2380 ) ( * 82800 )
- NEW met1 ( 196190 1797750 ) ( 263350 * )
- NEW met2 ( 263350 82800 ) ( * 1797750 )
- NEW met2 ( 196190 1797750 ) ( * 1883260 )
- NEW met1 ( 196190 1797750 ) M1M2_PR
- NEW met2 ( 196190 1883260 ) M2M3_PR_M
- NEW met1 ( 263350 1797750 ) M1M2_PR ;
+ + ROUTED met1 ( 286350 2284970 ) ( 296470 * )
+ NEW met2 ( 296470 2284970 ) ( * 2300100 0 )
+ NEW met2 ( 286350 19890 ) ( * 2284970 )
+ NEW met2 ( 268870 2380 0 ) ( * 19890 )
+ NEW met1 ( 268870 19890 ) ( 286350 * )
+ NEW met1 ( 286350 19890 ) M1M2_PR
+ NEW met1 ( 286350 2284970 ) M1M2_PR
+ NEW met1 ( 296470 2284970 ) M1M2_PR
+ NEW met1 ( 268870 19890 ) M1M2_PR ;
- wbs_dat_o[12] ( PIN wbs_dat_o[12] ) ( chip_controller wbs_dat_o[12] ) + USE SIGNAL
- + ROUTED met2 ( 286350 2380 0 ) ( * 17340 )
- NEW met3 ( 286350 17340 ) ( 290260 * )
- NEW met3 ( 290260 2199460 ) ( 292330 * )
- NEW met2 ( 292330 2199460 ) ( 293250 * 0 )
- NEW met4 ( 290260 17340 ) ( * 2199460 )
- NEW met2 ( 286350 17340 ) M2M3_PR_M
- NEW met3 ( 290260 17340 ) M3M4_PR_M
- NEW met3 ( 290260 2199460 ) M3M4_PR_M
- NEW met2 ( 292330 2199460 ) M2M3_PR_M ;
+ + ROUTED met2 ( 286350 2380 0 ) ( * 3060 )
+ NEW met2 ( 285430 3060 ) ( 286350 * )
+ NEW met2 ( 285430 2380 ) ( * 3060 )
+ NEW met2 ( 284050 2380 ) ( 285430 * )
+ NEW met2 ( 190670 2387990 ) ( * 2388500 )
+ NEW met3 ( 190670 2388500 ) ( 200100 * )
+ NEW met3 ( 200100 2387820 0 ) ( * 2388500 )
+ NEW li1 ( 284050 2299590 ) ( * 2303670 )
+ NEW met2 ( 284050 2380 ) ( * 2299590 )
+ NEW met2 ( 151110 2303670 ) ( * 2387990 )
+ NEW met1 ( 151110 2387990 ) ( 190670 * )
+ NEW met1 ( 151110 2303670 ) ( 284050 * )
+ NEW met1 ( 190670 2387990 ) M1M2_PR
+ NEW met2 ( 190670 2388500 ) M2M3_PR_M
+ NEW li1 ( 284050 2303670 ) L1M1_PR_MR
+ NEW li1 ( 284050 2299590 ) L1M1_PR_MR
+ NEW met1 ( 284050 2299590 ) M1M2_PR
+ NEW met1 ( 151110 2303670 ) M1M2_PR
+ NEW met1 ( 151110 2387990 ) M1M2_PR
+ NEW met1 ( 284050 2299590 ) RECT ( -355 -70 0 70 ) ;
- wbs_dat_o[13] ( PIN wbs_dat_o[13] ) ( chip_controller wbs_dat_o[13] ) + USE SIGNAL
- + ROUTED met2 ( 304290 2380 0 ) ( * 17850 )
- NEW met1 ( 304290 17850 ) ( 309810 * )
- NEW met2 ( 309810 17850 ) ( * 1756610 )
- NEW met1 ( 309810 1756610 ) ( 615710 * )
- NEW met3 ( 599380 1897540 0 ) ( 615710 * )
- NEW met2 ( 615710 1756610 ) ( * 1897540 )
- NEW met1 ( 304290 17850 ) M1M2_PR
- NEW met1 ( 309810 17850 ) M1M2_PR
- NEW met1 ( 309810 1756610 ) M1M2_PR
- NEW met1 ( 615710 1756610 ) M1M2_PR
- NEW met2 ( 615710 1897540 ) M2M3_PR_M ;
+ + ROUTED met2 ( 303830 82800 ) ( 304290 * )
+ NEW met2 ( 304290 2380 0 ) ( * 82800 )
+ NEW met1 ( 303830 2283950 ) ( 307970 * )
+ NEW met2 ( 307970 2283950 ) ( * 2300100 0 )
+ NEW met2 ( 303830 82800 ) ( * 2283950 )
+ NEW met1 ( 303830 2283950 ) M1M2_PR
+ NEW met1 ( 307970 2283950 ) M1M2_PR ;
- wbs_dat_o[14] ( PIN wbs_dat_o[14] ) ( chip_controller wbs_dat_o[14] ) + USE SIGNAL
- + ROUTED met2 ( 321770 2380 0 ) ( * 17850 )
- NEW met1 ( 313950 17850 ) ( 321770 * )
- NEW met3 ( 309580 1752700 ) ( 313950 * )
- NEW met2 ( 313950 17850 ) ( * 1752700 )
- NEW met3 ( 308430 2199460 ) ( 309580 * )
- NEW met2 ( 307970 2199460 0 ) ( 308430 * )
- NEW met4 ( 309580 1752700 ) ( * 2199460 )
- NEW met1 ( 321770 17850 ) M1M2_PR
- NEW met1 ( 313950 17850 ) M1M2_PR
- NEW met3 ( 309580 1752700 ) M3M4_PR_M
- NEW met2 ( 313950 1752700 ) M2M3_PR_M
- NEW met3 ( 309580 2199460 ) M3M4_PR_M
- NEW met2 ( 308430 2199460 ) M2M3_PR_M ;
+ + ROUTED met2 ( 300150 2699940 ) ( 301530 * 0 )
+ NEW met2 ( 300150 2699940 ) ( * 2714390 )
+ NEW met2 ( 198490 2691000 ) ( * 2714390 )
+ NEW met2 ( 198490 2691000 ) ( 199410 * )
+ NEW met2 ( 319010 82800 ) ( 321770 * )
+ NEW met2 ( 321770 2380 0 ) ( * 82800 )
+ NEW li1 ( 319010 2300270 ) ( * 2304010 )
+ NEW met2 ( 319010 82800 ) ( * 2300270 )
+ NEW met1 ( 198490 2714390 ) ( 300150 * )
+ NEW met2 ( 199410 2317780 ) ( 199870 * )
+ NEW met2 ( 199870 2304010 ) ( * 2317780 )
+ NEW met2 ( 199410 2317780 ) ( * 2691000 )
+ NEW met1 ( 199870 2304010 ) ( 319010 * )
+ NEW met1 ( 198490 2714390 ) M1M2_PR
+ NEW met1 ( 300150 2714390 ) M1M2_PR
+ NEW li1 ( 319010 2304010 ) L1M1_PR_MR
+ NEW li1 ( 319010 2300270 ) L1M1_PR_MR
+ NEW met1 ( 319010 2300270 ) M1M2_PR
+ NEW met1 ( 199870 2304010 ) M1M2_PR
+ NEW met1 ( 319010 2300270 ) RECT ( -355 -70 0 70 ) ;
- wbs_dat_o[15] ( PIN wbs_dat_o[15] ) ( chip_controller wbs_dat_o[15] ) + USE SIGNAL
- + ROUTED met3 ( 312110 2199460 ) ( 315100 * )
- NEW met2 ( 311190 2199460 0 ) ( 312110 * )
- NEW met4 ( 315100 1759500 ) ( * 2199460 )
- NEW met2 ( 339710 2380 0 ) ( * 17850 )
- NEW met1 ( 327750 17850 ) ( 339710 * )
- NEW met3 ( 315100 1759500 ) ( 327750 * )
- NEW met2 ( 327750 17850 ) ( * 1759500 )
- NEW met3 ( 315100 1759500 ) M3M4_PR_M
- NEW met3 ( 315100 2199460 ) M3M4_PR_M
- NEW met2 ( 312110 2199460 ) M2M3_PR_M
- NEW met1 ( 339710 17850 ) M1M2_PR
- NEW met1 ( 327750 17850 ) M1M2_PR
- NEW met2 ( 327750 1759500 ) M2M3_PR_M ;
+ + ROUTED met2 ( 190210 2408390 ) ( * 2408900 )
+ NEW met3 ( 190210 2408900 ) ( 201020 * )
+ NEW met3 ( 201020 2408900 ) ( * 2409580 0 )
+ NEW met1 ( 144210 2408390 ) ( 190210 * )
+ NEW met2 ( 144210 2295850 ) ( * 2408390 )
+ NEW met2 ( 338330 82800 ) ( 339710 * )
+ NEW met2 ( 339710 2380 0 ) ( * 82800 )
+ NEW met2 ( 338330 82800 ) ( * 2295850 )
+ NEW met1 ( 144210 2295850 ) ( 338330 * )
+ NEW met1 ( 190210 2408390 ) M1M2_PR
+ NEW met2 ( 190210 2408900 ) M2M3_PR_M
+ NEW met1 ( 144210 2408390 ) M1M2_PR
+ NEW met1 ( 144210 2295850 ) M1M2_PR
+ NEW met1 ( 338330 2295850 ) M1M2_PR ;
- wbs_dat_o[16] ( PIN wbs_dat_o[16] ) ( chip_controller wbs_dat_o[16] ) + USE SIGNAL
- + ROUTED met2 ( 357650 2380 0 ) ( * 17850 )
- NEW met1 ( 357650 17850 ) ( 615250 * )
- NEW met3 ( 599380 1915220 0 ) ( 615250 * )
- NEW met2 ( 615250 17850 ) ( * 1915220 )
- NEW met1 ( 357650 17850 ) M1M2_PR
- NEW met1 ( 615250 17850 ) M1M2_PR
- NEW met2 ( 615250 1915220 ) M2M3_PR_M ;
+ + ROUTED met2 ( 190210 2415870 ) ( * 2416380 )
+ NEW met3 ( 190210 2416380 ) ( 201020 * )
+ NEW met3 ( 201020 2416380 ) ( * 2417060 0 )
+ NEW met1 ( 159390 2415870 ) ( 190210 * )
+ NEW met2 ( 352130 82800 ) ( 357650 * )
+ NEW met2 ( 357650 2380 0 ) ( * 82800 )
+ NEW met2 ( 352130 82800 ) ( * 2296190 )
+ NEW met2 ( 159390 2296190 ) ( * 2415870 )
+ NEW met1 ( 159390 2296190 ) ( 352130 * )
+ NEW met1 ( 190210 2415870 ) M1M2_PR
+ NEW met2 ( 190210 2416380 ) M2M3_PR_M
+ NEW met1 ( 159390 2415870 ) M1M2_PR
+ NEW met1 ( 352130 2296190 ) M1M2_PR
+ NEW met1 ( 159390 2296190 ) M1M2_PR ;
- wbs_dat_o[17] ( PIN wbs_dat_o[17] ) ( chip_controller wbs_dat_o[17] ) + USE SIGNAL
- + ROUTED met2 ( 375130 2380 0 ) ( * 16830 )
- NEW met1 ( 375130 16830 ) ( 379270 * )
- NEW met3 ( 599380 1921340 0 ) ( 607430 * )
- NEW met2 ( 607430 1919810 ) ( * 1921340 )
- NEW met2 ( 379270 16830 ) ( * 1778710 )
- NEW met1 ( 607430 1919810 ) ( 616170 * )
- NEW met1 ( 379270 1778710 ) ( 616170 * )
- NEW met2 ( 616170 1778710 ) ( * 1919810 )
- NEW met1 ( 375130 16830 ) M1M2_PR
- NEW met1 ( 379270 16830 ) M1M2_PR
- NEW met2 ( 607430 1921340 ) M2M3_PR_M
- NEW met1 ( 607430 1919810 ) M1M2_PR
- NEW met1 ( 379270 1778710 ) M1M2_PR
- NEW met1 ( 616170 1919810 ) M1M2_PR
- NEW met1 ( 616170 1778710 ) M1M2_PR ;
+ + ROUTED met3 ( 186070 2419780 ) ( 201020 * )
+ NEW met3 ( 201020 2419780 ) ( * 2420460 0 )
+ NEW met2 ( 372830 82800 ) ( 375130 * )
+ NEW met2 ( 375130 2380 0 ) ( * 82800 )
+ NEW li1 ( 372830 2300270 ) ( * 2302990 )
+ NEW met2 ( 372830 82800 ) ( * 2300270 )
+ NEW met2 ( 185150 2330700 ) ( 186070 * )
+ NEW met2 ( 185150 2302990 ) ( * 2330700 )
+ NEW met2 ( 186070 2330700 ) ( * 2419780 )
+ NEW met1 ( 185150 2302990 ) ( 372830 * )
+ NEW met2 ( 186070 2419780 ) M2M3_PR_M
+ NEW li1 ( 372830 2302990 ) L1M1_PR_MR
+ NEW li1 ( 372830 2300270 ) L1M1_PR_MR
+ NEW met1 ( 372830 2300270 ) M1M2_PR
+ NEW met1 ( 185150 2302990 ) M1M2_PR
+ NEW met1 ( 372830 2300270 ) RECT ( 0 -70 355 70 ) ;
- wbs_dat_o[18] ( PIN wbs_dat_o[18] ) ( chip_controller wbs_dat_o[18] ) + USE SIGNAL
- + ROUTED met3 ( 193430 1922700 ) ( 200100 * 0 )
- NEW met2 ( 393070 2380 0 ) ( * 18190 )
- NEW met1 ( 193430 18190 ) ( 393070 * )
- NEW met2 ( 193430 18190 ) ( * 1922700 )
- NEW met1 ( 193430 18190 ) M1M2_PR
- NEW met2 ( 193430 1922700 ) M2M3_PR_M
- NEW met1 ( 393070 18190 ) M1M2_PR ;
+ + ROUTED met2 ( 190210 2421990 ) ( * 2427260 )
+ NEW met3 ( 190210 2427260 ) ( 201020 * )
+ NEW met3 ( 201020 2427260 ) ( * 2427940 0 )
+ NEW met2 ( 393070 2380 0 ) ( * 3060 )
+ NEW met2 ( 392150 3060 ) ( 393070 * )
+ NEW met2 ( 392150 2380 ) ( * 3060 )
+ NEW met2 ( 390770 2380 ) ( 392150 * )
+ NEW met2 ( 386630 82800 ) ( 390770 * )
+ NEW met2 ( 390770 2380 ) ( * 82800 )
+ NEW met2 ( 386630 82800 ) ( * 2295170 )
+ NEW met1 ( 151570 2421990 ) ( 190210 * )
+ NEW met2 ( 151570 2295170 ) ( * 2421990 )
+ NEW met1 ( 151570 2295170 ) ( 386630 * )
+ NEW met1 ( 190210 2421990 ) M1M2_PR
+ NEW met2 ( 190210 2427260 ) M2M3_PR_M
+ NEW met1 ( 386630 2295170 ) M1M2_PR
+ NEW met1 ( 151570 2421990 ) M1M2_PR
+ NEW met1 ( 151570 2295170 ) M1M2_PR ;
- wbs_dat_o[19] ( PIN wbs_dat_o[19] ) ( chip_controller wbs_dat_o[19] ) + USE SIGNAL
- + ROUTED met2 ( 188370 1932050 ) ( * 1934260 )
- NEW met3 ( 188370 1934260 ) ( 200100 * 0 )
+ + ROUTED met2 ( 198950 2691780 ) ( 199870 * )
+ NEW met2 ( 198950 2691780 ) ( * 2713370 )
NEW met2 ( 410550 2380 0 ) ( * 3060 )
NEW met2 ( 409630 3060 ) ( 410550 * )
NEW met2 ( 409630 2380 ) ( * 3060 )
- NEW met2 ( 408250 2380 ) ( 409630 * )
- NEW met2 ( 407330 82800 ) ( 408250 * )
- NEW met2 ( 408250 2380 ) ( * 82800 )
- NEW met2 ( 407330 82800 ) ( * 1795370 )
- NEW met1 ( 179170 1932050 ) ( 188370 * )
- NEW met1 ( 179170 1795370 ) ( 407330 * )
- NEW met2 ( 179170 1795370 ) ( * 1932050 )
- NEW met1 ( 188370 1932050 ) M1M2_PR
- NEW met2 ( 188370 1934260 ) M2M3_PR_M
- NEW met1 ( 407330 1795370 ) M1M2_PR
- NEW met1 ( 179170 1932050 ) M1M2_PR
- NEW met1 ( 179170 1795370 ) M1M2_PR ;
+ NEW met2 ( 408710 2380 ) ( 409630 * )
+ NEW met2 ( 408710 2380 ) ( * 2256300 )
+ NEW met1 ( 408250 2300270 ) ( * 2300950 )
+ NEW met2 ( 408250 2256300 ) ( * 2300270 )
+ NEW met2 ( 408250 2256300 ) ( 408710 * )
+ NEW met2 ( 337870 2699260 0 ) ( 338330 * )
+ NEW met2 ( 338330 2699260 ) ( * 2700620 )
+ NEW met2 ( 337870 2700620 ) ( 338330 * )
+ NEW met2 ( 337870 2700620 ) ( * 2713370 )
+ NEW met1 ( 198950 2713370 ) ( 337870 * )
+ NEW met1 ( 198490 2319310 ) ( 199870 * )
+ NEW met2 ( 198490 2300950 ) ( * 2319310 )
+ NEW met2 ( 199870 2319310 ) ( * 2691780 )
+ NEW met1 ( 198490 2300950 ) ( 408250 * )
+ NEW met1 ( 198950 2713370 ) M1M2_PR
+ NEW met1 ( 408250 2300270 ) M1M2_PR
+ NEW met1 ( 337870 2713370 ) M1M2_PR
+ NEW met1 ( 199870 2319310 ) M1M2_PR
+ NEW met1 ( 198490 2319310 ) M1M2_PR
+ NEW met1 ( 198490 2300950 ) M1M2_PR ;
- wbs_dat_o[1] ( PIN wbs_dat_o[1] ) ( chip_controller wbs_dat_o[1] ) + USE SIGNAL
+ ROUTED met2 ( 73830 2380 0 ) ( * 34500 )
NEW met2 ( 73830 34500 ) ( 75670 * )
- NEW met2 ( 75670 34500 ) ( * 1807950 )
- NEW met2 ( 188370 1807950 ) ( * 1814580 )
- NEW met3 ( 188370 1814580 ) ( 200100 * 0 )
- NEW met1 ( 75670 1807950 ) ( 188370 * )
- NEW met1 ( 75670 1807950 ) M1M2_PR
- NEW met1 ( 188370 1807950 ) M1M2_PR
- NEW met2 ( 188370 1814580 ) M2M3_PR_M ;
+ NEW met2 ( 75670 34500 ) ( * 2288370 )
+ NEW met2 ( 230690 2288370 ) ( * 2300100 0 )
+ NEW met1 ( 75670 2288370 ) ( 230690 * )
+ NEW met1 ( 75670 2288370 ) M1M2_PR
+ NEW met1 ( 230690 2288370 ) M1M2_PR ;
- wbs_dat_o[20] ( PIN wbs_dat_o[20] ) ( chip_controller wbs_dat_o[20] ) + USE SIGNAL
- + ROUTED met2 ( 188370 1939190 ) ( * 1941060 )
- NEW met3 ( 188370 1941060 ) ( 200100 * 0 )
- NEW li1 ( 376510 1789590 ) ( * 1793670 )
- NEW met1 ( 376510 1793670 ) ( 417910 * )
- NEW li1 ( 417910 1787210 ) ( * 1793670 )
- NEW met1 ( 155710 1939190 ) ( 188370 * )
- NEW met2 ( 155710 1789590 ) ( * 1939190 )
- NEW met1 ( 155710 1789590 ) ( 376510 * )
- NEW met2 ( 428030 82800 ) ( 428490 * )
- NEW met2 ( 428490 2380 0 ) ( * 82800 )
- NEW met1 ( 417910 1787210 ) ( 428030 * )
- NEW met2 ( 428030 82800 ) ( * 1787210 )
- NEW met1 ( 188370 1939190 ) M1M2_PR
- NEW met2 ( 188370 1941060 ) M2M3_PR_M
- NEW li1 ( 376510 1789590 ) L1M1_PR_MR
- NEW li1 ( 376510 1793670 ) L1M1_PR_MR
- NEW li1 ( 417910 1793670 ) L1M1_PR_MR
- NEW li1 ( 417910 1787210 ) L1M1_PR_MR
- NEW met1 ( 155710 1939190 ) M1M2_PR
- NEW met1 ( 155710 1789590 ) M1M2_PR
- NEW met1 ( 428030 1787210 ) M1M2_PR ;
+ + ROUTED met2 ( 342010 2699940 ) ( 343390 * 0 )
+ NEW met2 ( 342010 2699940 ) ( * 2712860 )
+ NEW met3 ( 206540 2712860 ) ( 342010 * )
+ NEW met2 ( 428490 2380 0 ) ( * 34500 )
+ NEW met2 ( 428490 34500 ) ( 428950 * )
+ NEW met2 ( 428950 34500 ) ( * 2287180 )
+ NEW met4 ( 206540 2287180 ) ( * 2712860 )
+ NEW met3 ( 206540 2287180 ) ( 428950 * )
+ NEW met3 ( 206540 2712860 ) M3M4_PR_M
+ NEW met2 ( 342010 2712860 ) M2M3_PR_M
+ NEW met2 ( 428950 2287180 ) M2M3_PR_M
+ NEW met3 ( 206540 2287180 ) M3M4_PR_M ;
- wbs_dat_o[21] ( PIN wbs_dat_o[21] ) ( chip_controller wbs_dat_o[21] ) + USE SIGNAL
- + ROUTED met2 ( 376050 19550 ) ( * 1787210 )
- NEW met2 ( 445970 2380 0 ) ( * 19550 )
- NEW met1 ( 376050 19550 ) ( 445970 * )
- NEW li1 ( 365930 1787210 ) ( * 1793670 )
- NEW met1 ( 340630 1793670 ) ( 365930 * )
- NEW met2 ( 340630 1793670 ) ( * 1800300 0 )
- NEW met1 ( 365930 1787210 ) ( 376050 * )
- NEW met1 ( 376050 19550 ) M1M2_PR
- NEW met1 ( 376050 1787210 ) M1M2_PR
- NEW met1 ( 445970 19550 ) M1M2_PR
- NEW li1 ( 365930 1787210 ) L1M1_PR_MR
- NEW li1 ( 365930 1793670 ) L1M1_PR_MR
- NEW met1 ( 340630 1793670 ) M1M2_PR ;
+ + ROUTED met2 ( 191130 2435930 ) ( * 2440860 )
+ NEW met3 ( 191130 2440860 ) ( 200100 * )
+ NEW met3 ( 200100 2440180 0 ) ( * 2440860 )
+ NEW met1 ( 144670 2435930 ) ( 191130 * )
+ NEW met2 ( 144670 2288710 ) ( * 2435930 )
+ NEW met2 ( 441830 82800 ) ( 445970 * )
+ NEW met2 ( 445970 2380 0 ) ( * 82800 )
+ NEW met2 ( 441830 82800 ) ( * 2288710 )
+ NEW met1 ( 144670 2288710 ) ( 441830 * )
+ NEW met1 ( 191130 2435930 ) M1M2_PR
+ NEW met2 ( 191130 2440860 ) M2M3_PR_M
+ NEW met1 ( 144670 2435930 ) M1M2_PR
+ NEW met1 ( 144670 2288710 ) M1M2_PR
+ NEW met1 ( 441830 2288710 ) M1M2_PR ;
- wbs_dat_o[22] ( PIN wbs_dat_o[22] ) ( chip_controller wbs_dat_o[22] ) + USE SIGNAL
- + ROUTED met2 ( 463910 2380 0 ) ( * 16660 )
- NEW met3 ( 354660 16660 ) ( 463910 * )
- NEW met3 ( 344310 2199460 ) ( 354660 * )
- NEW met2 ( 343850 2199460 0 ) ( 344310 * )
- NEW met4 ( 354660 16660 ) ( * 2199460 )
- NEW met3 ( 354660 16660 ) M3M4_PR_M
- NEW met2 ( 463910 16660 ) M2M3_PR_M
- NEW met3 ( 354660 2199460 ) M3M4_PR_M
- NEW met2 ( 344310 2199460 ) M2M3_PR_M ;
+ + ROUTED met2 ( 463910 2380 0 ) ( * 18530 )
+ NEW met1 ( 365470 18530 ) ( 463910 * )
+ NEW met1 ( 361790 2285310 ) ( 365470 * )
+ NEW met2 ( 361790 2285310 ) ( * 2300100 0 )
+ NEW met2 ( 365470 18530 ) ( * 2285310 )
+ NEW met1 ( 365470 18530 ) M1M2_PR
+ NEW met1 ( 463910 18530 ) M1M2_PR
+ NEW met1 ( 365470 2285310 ) M1M2_PR
+ NEW met1 ( 361790 2285310 ) M1M2_PR ;
- wbs_dat_o[23] ( PIN wbs_dat_o[23] ) ( chip_controller wbs_dat_o[23] ) + USE SIGNAL
- + ROUTED met2 ( 481390 2380 0 ) ( * 18190 )
- NEW met1 ( 481390 18190 ) ( 614330 * )
- NEW met3 ( 599380 1957380 0 ) ( 613870 * )
- NEW met2 ( 613870 1957380 ) ( 614330 * )
- NEW met2 ( 614330 18190 ) ( * 1957380 )
- NEW met1 ( 481390 18190 ) M1M2_PR
- NEW met1 ( 614330 18190 ) M1M2_PR
- NEW met2 ( 613870 1957380 ) M2M3_PR_M ;
+ + ROUTED met2 ( 191130 2442730 ) ( * 2446980 )
+ NEW met3 ( 191130 2446980 ) ( 201020 * )
+ NEW met3 ( 201020 2446980 ) ( * 2447660 0 )
+ NEW met2 ( 481390 2380 0 ) ( * 3060 )
+ NEW met2 ( 480470 3060 ) ( 481390 * )
+ NEW met2 ( 480470 2380 ) ( * 3060 )
+ NEW met2 ( 479090 2380 ) ( 480470 * )
+ NEW met2 ( 127650 2288030 ) ( * 2442730 )
+ NEW met2 ( 476330 82800 ) ( 479090 * )
+ NEW met2 ( 479090 2380 ) ( * 82800 )
+ NEW met2 ( 476330 82800 ) ( * 2256300 )
+ NEW met2 ( 476790 2256300 ) ( * 2285990 )
+ NEW met2 ( 476330 2256300 ) ( 476790 * )
+ NEW met1 ( 127650 2442730 ) ( 191130 * )
+ NEW li1 ( 445050 2285990 ) ( * 2288030 )
+ NEW met1 ( 445050 2285990 ) ( 451490 * )
+ NEW li1 ( 451490 2285990 ) ( 452870 * )
+ NEW met1 ( 452870 2285990 ) ( 476790 * )
+ NEW met1 ( 127650 2288030 ) ( 445050 * )
+ NEW met1 ( 127650 2442730 ) M1M2_PR
+ NEW met1 ( 191130 2442730 ) M1M2_PR
+ NEW met2 ( 191130 2446980 ) M2M3_PR_M
+ NEW met1 ( 127650 2288030 ) M1M2_PR
+ NEW met1 ( 476790 2285990 ) M1M2_PR
+ NEW li1 ( 445050 2288030 ) L1M1_PR_MR
+ NEW li1 ( 445050 2285990 ) L1M1_PR_MR
+ NEW li1 ( 451490 2285990 ) L1M1_PR_MR
+ NEW li1 ( 452870 2285990 ) L1M1_PR_MR ;
- wbs_dat_o[24] ( PIN wbs_dat_o[24] ) ( chip_controller wbs_dat_o[24] ) + USE SIGNAL
- + ROUTED met2 ( 186990 1959930 ) ( * 1962140 )
- NEW met3 ( 186990 1962140 ) ( 200100 * 0 )
- NEW met2 ( 497950 82800 ) ( 499330 * )
+ + ROUTED met2 ( 189750 2449870 ) ( * 2454460 )
+ NEW met3 ( 189750 2454460 ) ( 201020 * )
+ NEW met3 ( 201020 2454460 ) ( * 2455140 0 )
+ NEW met2 ( 497030 82800 ) ( 499330 * )
NEW met2 ( 499330 2380 0 ) ( * 82800 )
- NEW met2 ( 497950 82800 ) ( * 1773300 )
- NEW li1 ( 469430 1790270 ) ( * 1793670 )
- NEW met1 ( 469430 1793670 ) ( 477250 * )
- NEW li1 ( 477250 1788570 ) ( * 1793670 )
- NEW met1 ( 477250 1788570 ) ( 486910 * )
- NEW li1 ( 486910 1788570 ) ( * 1789590 )
- NEW met1 ( 486910 1789590 ) ( 497490 * )
- NEW met2 ( 497490 1773300 ) ( * 1789590 )
- NEW met2 ( 497490 1773300 ) ( 497950 * )
- NEW met1 ( 165370 1959930 ) ( 186990 * )
- NEW met1 ( 165370 1790270 ) ( 469430 * )
- NEW met2 ( 165370 1790270 ) ( * 1959930 )
- NEW met1 ( 186990 1959930 ) M1M2_PR
- NEW met2 ( 186990 1962140 ) M2M3_PR_M
- NEW li1 ( 469430 1790270 ) L1M1_PR_MR
- NEW li1 ( 469430 1793670 ) L1M1_PR_MR
- NEW li1 ( 477250 1793670 ) L1M1_PR_MR
- NEW li1 ( 477250 1788570 ) L1M1_PR_MR
- NEW li1 ( 486910 1788570 ) L1M1_PR_MR
- NEW li1 ( 486910 1789590 ) L1M1_PR_MR
- NEW met1 ( 497490 1789590 ) M1M2_PR
- NEW met1 ( 165370 1959930 ) M1M2_PR
- NEW met1 ( 165370 1790270 ) M1M2_PR ;
+ NEW met2 ( 497030 82800 ) ( * 2273070 )
+ NEW met2 ( 133630 2273070 ) ( * 2449870 )
+ NEW met1 ( 133630 2449870 ) ( 189750 * )
+ NEW met1 ( 133630 2273070 ) ( 497030 * )
+ NEW met1 ( 189750 2449870 ) M1M2_PR
+ NEW met2 ( 189750 2454460 ) M2M3_PR_M
+ NEW met1 ( 497030 2273070 ) M1M2_PR
+ NEW met1 ( 133630 2273070 ) M1M2_PR
+ NEW met1 ( 133630 2449870 ) M1M2_PR ;
- wbs_dat_o[25] ( PIN wbs_dat_o[25] ) ( chip_controller wbs_dat_o[25] ) + USE SIGNAL
- + ROUTED met2 ( 516810 2380 0 ) ( * 18530 )
- NEW met1 ( 351670 18530 ) ( 516810 * )
- NEW met2 ( 350750 1800300 0 ) ( 351670 * )
- NEW met2 ( 351670 18530 ) ( * 1800300 )
- NEW met1 ( 516810 18530 ) M1M2_PR
- NEW met1 ( 351670 18530 ) M1M2_PR ;
+ + ROUTED met2 ( 516810 2380 0 ) ( * 18870 )
+ NEW met1 ( 516810 18870 ) ( 601910 * )
+ NEW met3 ( 599380 2451740 0 ) ( 601910 * )
+ NEW met2 ( 601910 18870 ) ( * 2451740 )
+ NEW met1 ( 516810 18870 ) M1M2_PR
+ NEW met1 ( 601910 18870 ) M1M2_PR
+ NEW met2 ( 601910 2451740 ) M2M3_PR_M ;
- wbs_dat_o[26] ( PIN wbs_dat_o[26] ) ( chip_controller wbs_dat_o[26] ) + USE SIGNAL
- + ROUTED li1 ( 386170 1785850 ) ( * 1789250 )
- NEW met1 ( 386170 1785850 ) ( 396750 * )
- NEW met2 ( 396750 18870 ) ( * 1785850 )
- NEW met2 ( 534750 2380 0 ) ( * 18870 )
- NEW met1 ( 396750 18870 ) ( 534750 * )
- NEW met2 ( 355810 1789250 ) ( * 1800300 )
- NEW met2 ( 354430 1800300 0 ) ( 355810 * )
- NEW met1 ( 355810 1789250 ) ( 386170 * )
- NEW met1 ( 396750 18870 ) M1M2_PR
- NEW li1 ( 386170 1789250 ) L1M1_PR_MR
- NEW li1 ( 386170 1785850 ) L1M1_PR_MR
- NEW met1 ( 396750 1785850 ) M1M2_PR
- NEW met1 ( 534750 18870 ) M1M2_PR
- NEW met1 ( 355810 1789250 ) M1M2_PR ;
+ + ROUTED met2 ( 379730 2699260 0 ) ( 381110 * )
+ NEW met2 ( 381110 2699260 ) ( * 2710990 )
+ NEW met2 ( 534750 2380 0 ) ( * 18530 )
+ NEW met1 ( 534750 18530 ) ( 628590 * )
+ NEW met1 ( 381110 2710990 ) ( 628590 * )
+ NEW met2 ( 628590 18530 ) ( * 2710990 )
+ NEW met1 ( 381110 2710990 ) M1M2_PR
+ NEW met1 ( 534750 18530 ) M1M2_PR
+ NEW met1 ( 628590 18530 ) M1M2_PR
+ NEW met1 ( 628590 2710990 ) M1M2_PR ;
- wbs_dat_o[27] ( PIN wbs_dat_o[27] ) ( chip_controller wbs_dat_o[27] ) + USE SIGNAL
- + ROUTED li1 ( 386630 1788570 ) ( * 1789250 )
- NEW met2 ( 552690 2380 0 ) ( * 19210 )
- NEW met1 ( 438150 19210 ) ( 552690 * )
- NEW met2 ( 362710 1788570 ) ( * 1800300 0 )
- NEW met1 ( 362710 1788570 ) ( 386630 * )
- NEW met2 ( 438150 19210 ) ( * 1773300 )
- NEW met1 ( 422970 1789250 ) ( * 1789590 )
- NEW met1 ( 422970 1789590 ) ( 434930 * )
- NEW met2 ( 434930 1788570 ) ( * 1789590 )
- NEW met1 ( 434930 1788570 ) ( 437230 * )
- NEW met2 ( 437230 1773300 ) ( * 1788570 )
- NEW met2 ( 437230 1773300 ) ( 438150 * )
- NEW met1 ( 386630 1789250 ) ( 422970 * )
- NEW li1 ( 386630 1788570 ) L1M1_PR_MR
- NEW li1 ( 386630 1789250 ) L1M1_PR_MR
- NEW met1 ( 438150 19210 ) M1M2_PR
- NEW met1 ( 552690 19210 ) M1M2_PR
- NEW met1 ( 362710 1788570 ) M1M2_PR
- NEW met1 ( 434930 1789590 ) M1M2_PR
- NEW met1 ( 434930 1788570 ) M1M2_PR
- NEW met1 ( 437230 1788570 ) M1M2_PR ;
+ + ROUTED met1 ( 380650 2284290 ) ( 396750 * )
+ NEW met2 ( 380650 2284290 ) ( * 2300100 0 )
+ NEW met2 ( 396750 18190 ) ( * 2284290 )
+ NEW met2 ( 552690 2380 0 ) ( * 18190 )
+ NEW met1 ( 396750 18190 ) ( 552690 * )
+ NEW met1 ( 396750 18190 ) M1M2_PR
+ NEW met1 ( 396750 2284290 ) M1M2_PR
+ NEW met1 ( 380650 2284290 ) M1M2_PR
+ NEW met1 ( 552690 18190 ) M1M2_PR ;
- wbs_dat_o[28] ( PIN wbs_dat_o[28] ) ( chip_controller wbs_dat_o[28] ) + USE SIGNAL
- + ROUTED met2 ( 570170 2380 0 ) ( * 18530 )
- NEW met1 ( 570170 18530 ) ( 614790 * )
- NEW met3 ( 599380 1985940 0 ) ( 607430 * )
- NEW met2 ( 607430 1952450 ) ( * 1985940 )
- NEW met1 ( 607430 1952450 ) ( 614790 * )
- NEW met2 ( 614790 18530 ) ( * 1952450 )
- NEW met1 ( 570170 18530 ) M1M2_PR
- NEW met1 ( 614790 18530 ) M1M2_PR
- NEW met2 ( 607430 1985940 ) M2M3_PR_M
- NEW met1 ( 607430 1952450 ) M1M2_PR
- NEW met1 ( 614790 1952450 ) M1M2_PR ;
+ + ROUTED met2 ( 570170 2380 0 ) ( * 17170 )
+ NEW met1 ( 570170 17170 ) ( 601450 * )
+ NEW met3 ( 599380 2461260 0 ) ( 601450 * )
+ NEW met2 ( 601450 17170 ) ( * 2461260 )
+ NEW met1 ( 570170 17170 ) M1M2_PR
+ NEW met1 ( 601450 17170 ) M1M2_PR
+ NEW met2 ( 601450 2461260 ) M2M3_PR_M ;
- wbs_dat_o[29] ( PIN wbs_dat_o[29] ) ( chip_controller wbs_dat_o[29] ) + USE SIGNAL
- + ROUTED met2 ( 588110 2380 0 ) ( * 17510 )
- NEW met2 ( 130410 17510 ) ( * 1988150 )
- NEW met2 ( 188830 1988150 ) ( * 1992740 )
- NEW met3 ( 188830 1992740 ) ( 200100 * 0 )
- NEW met1 ( 130410 17510 ) ( 588110 * )
- NEW met1 ( 130410 1988150 ) ( 188830 * )
- NEW met1 ( 130410 17510 ) M1M2_PR
- NEW met1 ( 588110 17510 ) M1M2_PR
- NEW met1 ( 130410 1988150 ) M1M2_PR
- NEW met1 ( 188830 1988150 ) M1M2_PR
- NEW met2 ( 188830 1992740 ) M2M3_PR_M ;
+ + ROUTED met2 ( 588110 2380 0 ) ( * 14450 )
+ NEW met1 ( 588110 14450 ) ( 605130 * )
+ NEW met3 ( 599380 2470780 0 ) ( 605130 * )
+ NEW met2 ( 605130 14450 ) ( * 2470780 )
+ NEW met1 ( 588110 14450 ) M1M2_PR
+ NEW met1 ( 605130 14450 ) M1M2_PR
+ NEW met2 ( 605130 2470780 ) M2M3_PR_M ;
- wbs_dat_o[2] ( PIN wbs_dat_o[2] ) ( chip_controller wbs_dat_o[2] ) + USE SIGNAL
- + ROUTED met2 ( 97290 2380 0 ) ( * 17170 )
- NEW met1 ( 596850 1795370 ) ( 608350 * )
- NEW met2 ( 596850 17170 ) ( * 1795370 )
- NEW met1 ( 97290 17170 ) ( 596850 * )
- NEW met3 ( 599380 1833620 0 ) ( 608350 * )
- NEW met2 ( 608350 1795370 ) ( * 1833620 )
- NEW met1 ( 97290 17170 ) M1M2_PR
- NEW met1 ( 596850 17170 ) M1M2_PR
- NEW met1 ( 596850 1795370 ) M1M2_PR
- NEW met1 ( 608350 1795370 ) M1M2_PR
- NEW met2 ( 608350 1833620 ) M2M3_PR_M ;
+ + ROUTED met2 ( 97290 2380 0 ) ( * 17510 )
+ NEW met1 ( 97290 17510 ) ( 106950 * )
+ NEW met2 ( 223790 2699940 ) ( 224710 * 0 )
+ NEW met2 ( 223790 2699940 ) ( * 2712690 )
+ NEW met2 ( 106950 17510 ) ( * 2712690 )
+ NEW met1 ( 106950 2712690 ) ( 223790 * )
+ NEW met1 ( 97290 17510 ) M1M2_PR
+ NEW met1 ( 106950 17510 ) M1M2_PR
+ NEW met1 ( 106950 2712690 ) M1M2_PR
+ NEW met1 ( 223790 2712690 ) M1M2_PR ;
- wbs_dat_o[30] ( PIN wbs_dat_o[30] ) ( chip_controller wbs_dat_o[30] ) + USE SIGNAL
+ ROUTED met2 ( 605590 2380 0 ) ( * 17510 )
- NEW met1 ( 600530 17510 ) ( 605590 * )
- NEW met3 ( 599380 1998180 0 ) ( 600530 * )
- NEW met2 ( 600530 17510 ) ( * 1998180 )
+ NEW met1 ( 600990 17510 ) ( 605590 * )
+ NEW met3 ( 599380 2474860 0 ) ( 600990 * )
+ NEW met2 ( 600990 17510 ) ( * 2474860 )
NEW met1 ( 605590 17510 ) M1M2_PR
- NEW met1 ( 600530 17510 ) M1M2_PR
- NEW met2 ( 600530 1998180 ) M2M3_PR_M ;
+ NEW met1 ( 600990 17510 ) M1M2_PR
+ NEW met2 ( 600990 2474860 ) M2M3_PR_M ;
- wbs_dat_o[31] ( PIN wbs_dat_o[31] ) ( chip_controller wbs_dat_o[31] ) + USE SIGNAL
- + ROUTED met2 ( 129950 39270 ) ( * 2001750 )
- NEW met2 ( 186990 2001750 ) ( * 2006340 )
- NEW met3 ( 186990 2006340 ) ( 200100 * 0 )
- NEW met1 ( 129950 2001750 ) ( 186990 * )
- NEW met1 ( 129950 39270 ) ( 623530 * )
- NEW met2 ( 623530 2380 0 ) ( * 39270 )
- NEW met1 ( 129950 39270 ) M1M2_PR
- NEW met1 ( 129950 2001750 ) M1M2_PR
- NEW met1 ( 186990 2001750 ) M1M2_PR
- NEW met2 ( 186990 2006340 ) M2M3_PR_M
- NEW met1 ( 623530 39270 ) M1M2_PR ;
+ + ROUTED met2 ( 399050 2699260 0 ) ( 399970 * )
+ NEW met2 ( 399970 2699260 ) ( * 2724590 )
+ NEW met2 ( 623530 2380 0 ) ( * 17850 )
+ NEW met1 ( 623530 17850 ) ( 642390 * )
+ NEW met1 ( 399970 2724590 ) ( 642390 * )
+ NEW met2 ( 642390 17850 ) ( * 2724590 )
+ NEW met1 ( 399970 2724590 ) M1M2_PR
+ NEW met1 ( 623530 17850 ) M1M2_PR
+ NEW met1 ( 642390 17850 ) M1M2_PR
+ NEW met1 ( 642390 2724590 ) M1M2_PR ;
- wbs_dat_o[3] ( PIN wbs_dat_o[3] ) ( chip_controller wbs_dat_o[3] ) + USE SIGNAL
- + ROUTED met2 ( 121210 2380 0 ) ( * 17510 )
- NEW met1 ( 121210 17510 ) ( 123970 * )
- NEW met2 ( 123970 17510 ) ( * 106930 )
- NEW met1 ( 123970 106930 ) ( 600990 * )
- NEW met3 ( 599380 1839740 0 ) ( 600990 * )
- NEW met2 ( 600990 106930 ) ( * 1839740 )
- NEW met1 ( 121210 17510 ) M1M2_PR
- NEW met1 ( 123970 17510 ) M1M2_PR
- NEW met1 ( 123970 106930 ) M1M2_PR
- NEW met1 ( 600990 106930 ) M1M2_PR
- NEW met2 ( 600990 1839740 ) M2M3_PR_M ;
+ + ROUTED met2 ( 121210 2380 0 ) ( * 17170 )
+ NEW met1 ( 121210 17170 ) ( 125810 * )
+ NEW met2 ( 125810 17170 ) ( * 2289390 )
+ NEW met2 ( 242650 2289390 ) ( * 2300100 0 )
+ NEW met1 ( 125810 2289390 ) ( 242650 * )
+ NEW met1 ( 121210 17170 ) M1M2_PR
+ NEW met1 ( 125810 17170 ) M1M2_PR
+ NEW met1 ( 125810 2289390 ) M1M2_PR
+ NEW met1 ( 242650 2289390 ) M1M2_PR ;
- wbs_dat_o[4] ( PIN wbs_dat_o[4] ) ( chip_controller wbs_dat_o[4] ) + USE SIGNAL
- + ROUTED met3 ( 599380 1850620 0 ) ( 607430 * )
- NEW met2 ( 607430 1850450 ) ( * 1850620 )
- NEW met1 ( 143750 1735530 ) ( 616630 * )
- NEW met1 ( 607430 1850450 ) ( 616630 * )
- NEW met2 ( 144670 2380 0 ) ( * 34500 )
- NEW met2 ( 143750 34500 ) ( 144670 * )
- NEW met2 ( 143750 34500 ) ( * 1735530 )
- NEW met2 ( 616630 1735530 ) ( * 1850450 )
- NEW met2 ( 607430 1850620 ) M2M3_PR_M
- NEW met1 ( 607430 1850450 ) M1M2_PR
- NEW met1 ( 143750 1735530 ) M1M2_PR
- NEW met1 ( 616630 1735530 ) M1M2_PR
- NEW met1 ( 616630 1850450 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2330020 0 ) ( 603290 * )
+ NEW met2 ( 603290 16490 ) ( * 2330020 )
+ NEW met2 ( 144670 2380 0 ) ( * 17170 )
+ NEW met1 ( 144670 17170 ) ( 517500 * )
+ NEW met1 ( 517500 16490 ) ( * 17170 )
+ NEW met1 ( 517500 16490 ) ( 603290 * )
+ NEW met1 ( 603290 16490 ) M1M2_PR
+ NEW met2 ( 603290 2330020 ) M2M3_PR_M
+ NEW met1 ( 144670 17170 ) M1M2_PR ;
- wbs_dat_o[5] ( PIN wbs_dat_o[5] ) ( chip_controller wbs_dat_o[5] ) + USE SIGNAL
- + ROUTED met1 ( 160770 2208470 ) ( 232990 * )
- NEW met2 ( 160770 82800 ) ( 162150 * )
- NEW met2 ( 162150 2380 0 ) ( * 82800 )
- NEW met2 ( 232990 2199460 0 ) ( * 2208470 )
- NEW met2 ( 160770 82800 ) ( * 2208470 )
- NEW met1 ( 160770 2208470 ) M1M2_PR
- NEW met1 ( 232990 2208470 ) M1M2_PR ;
+ + ROUTED met1 ( 569710 16830 ) ( * 17510 )
+ NEW met1 ( 569710 16830 ) ( 602830 * )
+ NEW met3 ( 599380 2338180 0 ) ( 602830 * )
+ NEW met2 ( 602830 16830 ) ( * 2338180 )
+ NEW met2 ( 162150 2380 0 ) ( * 17510 )
+ NEW met1 ( 162150 17510 ) ( 569710 * )
+ NEW met1 ( 602830 16830 ) M1M2_PR
+ NEW met2 ( 602830 2338180 ) M2M3_PR_M
+ NEW met1 ( 162150 17510 ) M1M2_PR ;
- wbs_dat_o[6] ( PIN wbs_dat_o[6] ) ( chip_controller wbs_dat_o[6] ) + USE SIGNAL
- + ROUTED met2 ( 180090 2380 0 ) ( * 17850 )
- NEW met1 ( 180090 17850 ) ( 186070 * )
- NEW met3 ( 599380 1864220 0 ) ( 607430 * )
- NEW met2 ( 607430 1864050 ) ( * 1864220 )
- NEW met2 ( 186070 17850 ) ( * 61370 )
- NEW met1 ( 607430 1864050 ) ( 621230 * )
- NEW met1 ( 186070 61370 ) ( 621230 * )
- NEW met2 ( 621230 61370 ) ( * 1864050 )
- NEW met1 ( 180090 17850 ) M1M2_PR
- NEW met1 ( 186070 17850 ) M1M2_PR
- NEW met2 ( 607430 1864220 ) M2M3_PR_M
- NEW met1 ( 607430 1864050 ) M1M2_PR
- NEW met1 ( 186070 61370 ) M1M2_PR
- NEW met1 ( 621230 1864050 ) M1M2_PR
- NEW met1 ( 621230 61370 ) M1M2_PR ;
+ + ROUTED met2 ( 117070 37910 ) ( * 2714050 )
+ NEW met2 ( 180090 2380 0 ) ( * 37910 )
+ NEW met2 ( 248630 2699940 ) ( 249090 * 0 )
+ NEW met2 ( 248630 2699940 ) ( * 2714050 )
+ NEW met1 ( 117070 2714050 ) ( 248630 * )
+ NEW met1 ( 117070 37910 ) ( 180090 * )
+ NEW met1 ( 117070 2714050 ) M1M2_PR
+ NEW met1 ( 117070 37910 ) M1M2_PR
+ NEW met1 ( 180090 37910 ) M1M2_PR
+ NEW met1 ( 248630 2714050 ) M1M2_PR ;
- wbs_dat_o[7] ( PIN wbs_dat_o[7] ) ( chip_controller wbs_dat_o[7] ) + USE SIGNAL
- + ROUTED met2 ( 198030 2380 0 ) ( * 18870 )
- NEW met2 ( 130870 18870 ) ( * 2201330 )
- NEW met1 ( 130870 18870 ) ( 198030 * )
- NEW met2 ( 250930 2199460 0 ) ( * 2201330 )
- NEW met1 ( 130870 2201330 ) ( 250930 * )
- NEW met1 ( 130870 18870 ) M1M2_PR
- NEW met1 ( 198030 18870 ) M1M2_PR
- NEW met1 ( 130870 2201330 ) M1M2_PR
- NEW met1 ( 250930 2201330 ) M1M2_PR ;
+ + ROUTED met2 ( 198030 2380 0 ) ( * 3060 )
+ NEW met2 ( 197110 3060 ) ( 198030 * )
+ NEW met2 ( 197110 2380 ) ( * 3060 )
+ NEW met2 ( 195730 2380 ) ( 197110 * )
+ NEW met1 ( 180550 2346170 ) ( 188370 * )
+ NEW met2 ( 188370 2346170 ) ( * 2347020 )
+ NEW met3 ( 188370 2347020 ) ( 201020 * )
+ NEW met3 ( 201020 2347020 ) ( * 2347700 0 )
+ NEW met2 ( 193430 82800 ) ( 195730 * )
+ NEW met2 ( 195730 2380 ) ( * 82800 )
+ NEW met1 ( 180550 167110 ) ( 193430 * )
+ NEW met2 ( 193430 82800 ) ( * 167110 )
+ NEW met2 ( 180550 167110 ) ( * 2346170 )
+ NEW met1 ( 180550 2346170 ) M1M2_PR
+ NEW met1 ( 188370 2346170 ) M1M2_PR
+ NEW met2 ( 188370 2347020 ) M2M3_PR_M
+ NEW met1 ( 180550 167110 ) M1M2_PR
+ NEW met1 ( 193430 167110 ) M1M2_PR ;
- wbs_dat_o[8] ( PIN wbs_dat_o[8] ) ( chip_controller wbs_dat_o[8] ) + USE SIGNAL
- + ROUTED met2 ( 215510 2380 0 ) ( * 1795030 )
- NEW met1 ( 148350 2208810 ) ( 265650 * )
- NEW met1 ( 148350 1795030 ) ( 215510 * )
- NEW met2 ( 148350 1795030 ) ( * 2208810 )
- NEW met2 ( 265650 2199460 0 ) ( * 2208810 )
- NEW met1 ( 215510 1795030 ) M1M2_PR
- NEW met1 ( 148350 2208810 ) M1M2_PR
- NEW met1 ( 265650 2208810 ) M1M2_PR
- NEW met1 ( 148350 1795030 ) M1M2_PR ;
+ + ROUTED met2 ( 215510 2380 0 ) ( * 17850 )
+ NEW met1 ( 215510 17850 ) ( 220570 * )
+ NEW met2 ( 220570 17850 ) ( * 1710370 )
+ NEW met3 ( 599380 2355860 0 ) ( 607430 * )
+ NEW met2 ( 607430 2355690 ) ( * 2355860 )
+ NEW met1 ( 220570 1710370 ) ( 621230 * )
+ NEW met1 ( 607430 2355690 ) ( 621230 * )
+ NEW met2 ( 621230 1710370 ) ( * 2355690 )
+ NEW met1 ( 215510 17850 ) M1M2_PR
+ NEW met1 ( 220570 17850 ) M1M2_PR
+ NEW met1 ( 220570 1710370 ) M1M2_PR
+ NEW met2 ( 607430 2355860 ) M2M3_PR_M
+ NEW met1 ( 607430 2355690 ) M1M2_PR
+ NEW met1 ( 621230 1710370 ) M1M2_PR
+ NEW met1 ( 621230 2355690 ) M1M2_PR ;
- wbs_dat_o[9] ( PIN wbs_dat_o[9] ) ( chip_controller wbs_dat_o[9] ) + USE SIGNAL
+ ROUTED met2 ( 233450 2380 0 ) ( * 17850 )
- NEW met1 ( 228850 17850 ) ( 233450 * )
- NEW met1 ( 183770 2211530 ) ( 273930 * )
- NEW met1 ( 183770 1794350 ) ( 228850 * )
- NEW met2 ( 228850 17850 ) ( * 1794350 )
- NEW met2 ( 273930 2199460 0 ) ( * 2211530 )
- NEW met2 ( 183770 1794350 ) ( * 2211530 )
- NEW met1 ( 183770 2211530 ) M1M2_PR
- NEW met1 ( 183770 1794350 ) M1M2_PR
+ NEW met1 ( 227930 17850 ) ( 233450 * )
+ NEW met2 ( 272550 2699940 ) ( 273470 * 0 )
+ NEW met2 ( 272550 2699940 ) ( * 2715410 )
+ NEW met1 ( 184230 2715410 ) ( 272550 * )
+ NEW met2 ( 227930 17850 ) ( * 2298910 )
+ NEW met1 ( 184230 2331550 ) ( * 2331890 )
+ NEW met1 ( 182850 2331550 ) ( 184230 * )
+ NEW met2 ( 182850 2298910 ) ( * 2331550 )
+ NEW met2 ( 184230 2331890 ) ( * 2715410 )
+ NEW met1 ( 182850 2298910 ) ( 227930 * )
+ NEW met1 ( 184230 2715410 ) M1M2_PR
NEW met1 ( 233450 17850 ) M1M2_PR
- NEW met1 ( 228850 17850 ) M1M2_PR
- NEW met1 ( 273930 2211530 ) M1M2_PR
- NEW met1 ( 228850 1794350 ) M1M2_PR ;
+ NEW met1 ( 227930 17850 ) M1M2_PR
+ NEW met1 ( 272550 2715410 ) M1M2_PR
+ NEW met1 ( 227930 2298910 ) M1M2_PR
+ NEW met1 ( 184230 2331890 ) M1M2_PR
+ NEW met1 ( 182850 2331550 ) M1M2_PR
+ NEW met1 ( 182850 2298910 ) M1M2_PR ;
- wbs_sel_i[0] ( PIN wbs_sel_i[0] ) + USE SIGNAL ;
- wbs_sel_i[1] ( PIN wbs_sel_i[1] ) + USE SIGNAL ;
- wbs_sel_i[2] ( PIN wbs_sel_i[2] ) + USE SIGNAL ;
@@ -14926,14 +19880,16 @@
- wbs_stb_i ( PIN wbs_stb_i ) + USE SIGNAL ;
- wbs_we_i ( PIN wbs_we_i ) + USE SIGNAL ;
- we_to_sram ( custom_sram we ) ( chip_controller we_to_sram ) + USE SIGNAL
- + ROUTED met2 ( 200790 2199460 0 ) ( * 2222070 )
- NEW met2 ( 1480970 1787210 ) ( * 2222070 )
- NEW met2 ( 1569290 1787210 ) ( * 1800300 0 )
- NEW met1 ( 200790 2222070 ) ( 1480970 * )
- NEW met1 ( 1480970 1787210 ) ( 1569290 * )
- NEW met1 ( 200790 2222070 ) M1M2_PR
- NEW met1 ( 1480970 2222070 ) M1M2_PR
- NEW met1 ( 1480970 1787210 ) M1M2_PR
- NEW met1 ( 1569290 1787210 ) M1M2_PR ;
+ + ROUTED met3 ( 599380 2298740 ) ( * 2300780 0 )
+ NEW met3 ( 599380 2298740 ) ( 606970 * )
+ NEW met2 ( 606970 2298230 ) ( * 2298740 )
+ NEW met2 ( 1480970 1863540 ) ( * 2298230 )
+ NEW met3 ( 1500060 1863540 ) ( * 1865580 0 )
+ NEW met3 ( 1480970 1863540 ) ( 1500060 * )
+ NEW met1 ( 606970 2298230 ) ( 1480970 * )
+ NEW met2 ( 1480970 1863540 ) M2M3_PR_M
+ NEW met2 ( 606970 2298740 ) M2M3_PR_M
+ NEW met1 ( 606970 2298230 ) M1M2_PR
+ NEW met1 ( 1480970 2298230 ) M1M2_PR ;
END NETS
END DESIGN
diff --git a/lef/user_project_wrapper.lef b/lef/user_project_wrapper.lef
index 83b5851..646abd5 100644
--- a/lef/user_project_wrapper.lef
+++ b/lef/user_project_wrapper.lef
@@ -4304,6 +4304,10 @@
END
PORT
LAYER met5 ;
+ RECT 1628.970 1719.630 2712.070 1722.730 ;
+ END
+ PORT
+ LAYER met5 ;
RECT -14.830 1814.330 2934.450 1817.430 ;
END
PORT
@@ -4348,43 +4352,75 @@
END
PORT
LAYER met4 ;
- RECT 188.970 -9.470 192.070 1790.000 ;
+ RECT 1448.970 -9.470 1452.070 190.000 ;
END
PORT
LAYER met4 ;
- RECT 368.970 -9.470 372.070 1790.000 ;
+ RECT 1628.970 -9.470 1632.070 190.000 ;
END
PORT
LAYER met4 ;
- RECT 548.970 -9.470 552.070 1790.000 ;
+ RECT 1808.970 -9.470 1812.070 190.000 ;
END
PORT
LAYER met4 ;
- RECT 1628.970 -9.470 1632.070 1790.000 ;
+ RECT 1988.970 -9.470 1992.070 190.000 ;
END
PORT
LAYER met4 ;
- RECT 1808.970 -9.470 1812.070 1790.000 ;
+ RECT 2168.970 -9.470 2172.070 190.000 ;
END
PORT
LAYER met4 ;
- RECT 1988.970 -9.470 1992.070 1790.000 ;
+ RECT 2348.970 -9.470 2352.070 190.000 ;
END
PORT
LAYER met4 ;
- RECT 2168.970 -9.470 2172.070 1790.000 ;
+ RECT 2528.970 -9.470 2532.070 190.000 ;
END
PORT
LAYER met4 ;
- RECT 2348.970 -9.470 2352.070 1790.000 ;
+ RECT 2708.970 -9.470 2712.070 190.000 ;
END
PORT
LAYER met4 ;
- RECT 2528.970 -9.470 2532.070 1790.000 ;
+ RECT 1628.970 1710.000 1632.070 1790.000 ;
END
PORT
LAYER met4 ;
- RECT 2708.970 -9.470 2712.070 1790.000 ;
+ RECT 1808.970 1710.000 1812.070 1790.000 ;
+ END
+ PORT
+ LAYER met4 ;
+ RECT 1988.970 1710.000 1992.070 1790.000 ;
+ END
+ PORT
+ LAYER met4 ;
+ RECT 2168.970 1710.000 2172.070 1790.000 ;
+ END
+ PORT
+ LAYER met4 ;
+ RECT 2348.970 1710.000 2352.070 1790.000 ;
+ END
+ PORT
+ LAYER met4 ;
+ RECT 2528.970 1710.000 2532.070 1790.000 ;
+ END
+ PORT
+ LAYER met4 ;
+ RECT 2708.970 1710.000 2712.070 1790.000 ;
+ END
+ PORT
+ LAYER met4 ;
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END
PORT
LAYER met4 ;
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PORT
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LAYER met4 ;
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END
PORT
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PORT
LAYER met4 ;
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END
PORT
LAYER met5 ;
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RECT -24.430 1832.930 2944.050 1836.030 ;
END
PORT
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END
PORT
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PORT
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LAYER met4 ;
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END
PORT
LAYER met4 ;
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PORT
LAYER met4 ;
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LAYER met4 ;
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END
PORT
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PORT
LAYER met4 ;
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END
PORT
LAYER met4 ;
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PORT
LAYER met4 ;
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END
PORT
LAYER met5 ;
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RECT -34.030 1851.530 2953.650 1854.630 ;
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PORT
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END
PORT
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PORT
LAYER met4 ;
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LAYER met4 ;
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END
PORT
LAYER met4 ;
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PORT
LAYER met4 ;
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LAYER met4 ;
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LAYER met4 ;
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END
PORT
LAYER met4 ;
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PORT
LAYER met4 ;
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LAYER met4 ;
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END
PORT
LAYER met4 ;
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END vdda1
PIN vdda2
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END
PORT
LAYER met5 ;
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RECT -43.630 1870.130 2963.250 1873.230 ;
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PORT
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END
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LAYER met4 ;
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END
PORT
LAYER met4 ;
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PORT
LAYER met4 ;
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PORT
LAYER met4 ;
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LAYER met4 ;
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END
PORT
LAYER met4 ;
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PORT
LAYER met4 ;
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END
PORT
LAYER met4 ;
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END vdda2
PIN vssa1
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END
PORT
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PORT
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LAYER met4 ;
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PORT
LAYER met4 ;
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LAYER met4 ;
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END
PORT
LAYER met4 ;
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PORT
LAYER met4 ;
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LAYER met4 ;
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END
PORT
LAYER met4 ;
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PORT
LAYER met4 ;
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END
PORT
LAYER met4 ;
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LAYER met4 ;
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PORT
LAYER met4 ;
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PORT
LAYER met4 ;
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LAYER met4 ;
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LAYER met4 ;
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LAYER met4 ;
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PORT
LAYER met4 ;
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LAYER met4 ;
@@ -5400,11 +5620,11 @@
END
PORT
LAYER met4 ;
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PORT
LAYER met4 ;
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LAYER met4 ;
@@ -5424,7 +5644,7 @@
END
PORT
LAYER met4 ;
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PORT
LAYER met4 ;
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END
PORT
LAYER met4 ;
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LAYER met4 ;
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LAYER met4 ;
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LAYER met4 ;
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PORT
LAYER met4 ;
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LAYER met4 ;
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LAYER met4 ;
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LAYER met4 ;
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PORT
LAYER met4 ;
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LAYER met4 ;
@@ -5596,11 +5852,11 @@
END
PORT
LAYER met4 ;
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PORT
LAYER met4 ;
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PORT
LAYER met4 ;
@@ -5620,7 +5876,7 @@
END
PORT
LAYER met4 ;
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PORT
LAYER met4 ;
@@ -5652,7 +5908,7 @@
END
PORT
LAYER met4 ;
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PORT
LAYER met4 ;
@@ -5748,39 +6004,71 @@
END
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LAYER met4 ;
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LAYER met4 ;
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LAYER met4 ;
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PORT
LAYER met4 ;
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LAYER met4 ;
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LAYER met4 ;
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PORT
LAYER met4 ;
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PORT
LAYER met4 ;
- RECT 2457.570 -19.070 2460.670 1790.000 ;
+ RECT 2637.570 -19.070 2640.670 190.000 ;
END
PORT
LAYER met4 ;
- RECT 2637.570 -19.070 2640.670 1790.000 ;
+ RECT 1557.570 1710.000 1560.670 1790.000 ;
+ END
+ PORT
+ LAYER met4 ;
+ RECT 1737.570 1710.000 1740.670 1790.000 ;
+ END
+ PORT
+ LAYER met4 ;
+ RECT 1917.570 1710.000 1920.670 1790.000 ;
+ END
+ PORT
+ LAYER met4 ;
+ RECT 2097.570 1710.000 2100.670 1790.000 ;
+ END
+ PORT
+ LAYER met4 ;
+ RECT 2277.570 1710.000 2280.670 1790.000 ;
+ END
+ PORT
+ LAYER met4 ;
+ RECT 2457.570 1710.000 2460.670 1790.000 ;
+ END
+ PORT
+ LAYER met4 ;
+ RECT 2637.570 1710.000 2640.670 1790.000 ;
+ END
+ PORT
+ LAYER met4 ;
+ RECT 297.570 -19.070 300.670 2290.000 ;
+ END
+ PORT
+ LAYER met4 ;
+ RECT 477.570 -19.070 480.670 2290.000 ;
END
PORT
LAYER met4 ;
@@ -5792,11 +6080,11 @@
END
PORT
LAYER met4 ;
- RECT 297.570 2210.000 300.670 3538.750 ;
+ RECT 297.570 2710.000 300.670 3538.750 ;
END
PORT
LAYER met4 ;
- RECT 477.570 2210.000 480.670 3538.750 ;
+ RECT 477.570 2710.000 480.670 3538.750 ;
END
PORT
LAYER met4 ;
@@ -5816,7 +6104,7 @@
END
PORT
LAYER met4 ;
- RECT 1377.570 -19.070 1380.670 3538.750 ;
+ RECT 1377.570 1710.000 1380.670 3538.750 ;
END
PORT
LAYER met4 ;
@@ -6705,11 +6993,11 @@
END wbs_we_i
OBS
LAYER li1 ;
- RECT 188.285 1785.765 2696.835 3296.555 ;
+ RECT 178.165 14.025 2795.735 3296.895 ;
LAYER met1 ;
- RECT 2.830 9.900 2893.330 3310.540 ;
+ RECT 2.830 3.440 2891.490 3308.840 ;
LAYER met2 ;
- RECT 2.860 2.680 2893.300 3310.570 ;
+ RECT 2.860 2.680 2893.240 3308.870 ;
RECT 3.550 2.310 7.950 2.680 ;
RECT 9.070 2.310 13.930 2.680 ;
RECT 15.050 2.310 19.910 2.680 ;
@@ -7200,142 +7488,219 @@
RECT 2882.230 2.310 2886.630 2.680 ;
RECT 2887.750 2.310 2892.610 2.680 ;
LAYER met3 ;
- RECT 170.265 14.455 2793.055 3288.005 ;
+ RECT 95.745 14.455 2877.695 3288.005 ;
LAYER met4 ;
- RECT 193.495 2209.600 207.170 3288.080 ;
- RECT 211.070 2209.600 225.770 3288.080 ;
- RECT 229.670 2209.600 244.370 3288.080 ;
- RECT 248.270 2209.600 278.570 3288.080 ;
- RECT 282.470 2209.600 297.170 3288.080 ;
- RECT 301.070 2209.600 315.770 3288.080 ;
- RECT 319.670 2209.600 334.370 3288.080 ;
- RECT 338.270 2209.600 368.570 3288.080 ;
- RECT 372.470 2209.600 387.170 3288.080 ;
- RECT 391.070 2209.600 405.770 3288.080 ;
- RECT 409.670 2209.600 424.370 3288.080 ;
- RECT 428.270 2209.600 458.570 3288.080 ;
- RECT 462.470 2209.600 477.170 3288.080 ;
- RECT 481.070 2209.600 495.770 3288.080 ;
- RECT 499.670 2209.600 514.370 3288.080 ;
- RECT 518.270 2209.600 548.570 3288.080 ;
- RECT 552.470 2209.600 567.170 3288.080 ;
- RECT 571.070 2209.600 585.770 3288.080 ;
- RECT 589.670 2209.600 604.370 3288.080 ;
- RECT 608.270 2209.600 638.570 3288.080 ;
- RECT 193.495 1790.400 638.570 2209.600 ;
- RECT 193.495 16.495 207.170 1790.400 ;
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- RECT 968.270 16.495 998.570 3288.080 ;
- RECT 1002.470 16.495 1017.170 3288.080 ;
- RECT 1021.070 16.495 1035.770 3288.080 ;
- RECT 1039.670 16.495 1054.370 3288.080 ;
- RECT 1058.270 16.495 1088.570 3288.080 ;
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- RECT 1111.070 16.495 1125.770 3288.080 ;
- RECT 1129.670 16.495 1144.370 3288.080 ;
- RECT 1148.270 16.495 1178.570 3288.080 ;
- RECT 1182.470 16.495 1197.170 3288.080 ;
- RECT 1201.070 16.495 1215.770 3288.080 ;
- RECT 1219.670 16.495 1234.370 3288.080 ;
- RECT 1238.270 16.495 1268.570 3288.080 ;
- RECT 1272.470 16.495 1287.170 3288.080 ;
- RECT 1291.070 16.495 1305.770 3288.080 ;
- RECT 1309.670 16.495 1324.370 3288.080 ;
- RECT 1328.270 16.495 1358.570 3288.080 ;
- RECT 1362.470 16.495 1377.170 3288.080 ;
- RECT 1381.070 16.495 1395.770 3288.080 ;
- RECT 1399.670 16.495 1414.370 3288.080 ;
- RECT 1418.270 16.495 1448.570 3288.080 ;
- RECT 1452.470 16.495 1467.170 3288.080 ;
- RECT 1471.070 16.495 1485.770 3288.080 ;
- RECT 1489.670 1790.400 2697.145 3288.080 ;
- RECT 1489.670 16.495 1504.370 1790.400 ;
- RECT 1508.270 16.495 1538.570 1790.400 ;
- RECT 1542.470 16.495 1557.170 1790.400 ;
- RECT 1561.070 16.495 1575.770 1790.400 ;
- RECT 1579.670 16.495 1594.370 1790.400 ;
- RECT 1598.270 16.495 1628.570 1790.400 ;
- RECT 1632.470 16.495 1647.170 1790.400 ;
- RECT 1651.070 16.495 1665.770 1790.400 ;
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- RECT 1722.470 16.495 1737.170 1790.400 ;
- RECT 1741.070 16.495 1755.770 1790.400 ;
- RECT 1759.670 16.495 1774.370 1790.400 ;
- RECT 1778.270 16.495 1808.570 1790.400 ;
- RECT 1812.470 16.495 1827.170 1790.400 ;
- RECT 1831.070 16.495 1845.770 1790.400 ;
- RECT 1849.670 16.495 1864.370 1790.400 ;
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- RECT 1939.670 16.495 1954.370 1790.400 ;
- RECT 1958.270 16.495 1988.570 1790.400 ;
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- RECT 2011.070 16.495 2025.770 1790.400 ;
- RECT 2029.670 16.495 2044.370 1790.400 ;
- RECT 2048.270 16.495 2078.570 1790.400 ;
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- RECT 2101.070 16.495 2115.770 1790.400 ;
- RECT 2119.670 16.495 2134.370 1790.400 ;
- RECT 2138.270 16.495 2168.570 1790.400 ;
- RECT 2172.470 16.495 2187.170 1790.400 ;
- RECT 2191.070 16.495 2205.770 1790.400 ;
- RECT 2209.670 16.495 2224.370 1790.400 ;
- RECT 2228.270 16.495 2258.570 1790.400 ;
- RECT 2262.470 16.495 2277.170 1790.400 ;
- RECT 2281.070 16.495 2295.770 1790.400 ;
- RECT 2299.670 16.495 2314.370 1790.400 ;
- RECT 2318.270 16.495 2348.570 1790.400 ;
- RECT 2352.470 16.495 2367.170 1790.400 ;
- RECT 2371.070 16.495 2385.770 1790.400 ;
- RECT 2389.670 16.495 2404.370 1790.400 ;
- RECT 2408.270 16.495 2438.570 1790.400 ;
- RECT 2442.470 16.495 2457.170 1790.400 ;
- RECT 2461.070 16.495 2475.770 1790.400 ;
- RECT 2479.670 16.495 2494.370 1790.400 ;
- RECT 2498.270 16.495 2528.570 1790.400 ;
- RECT 2532.470 16.495 2547.170 1790.400 ;
- RECT 2551.070 16.495 2565.770 1790.400 ;
- RECT 2569.670 16.495 2584.370 1790.400 ;
- RECT 2588.270 16.495 2618.570 1790.400 ;
- RECT 2622.470 16.495 2637.170 1790.400 ;
- RECT 2641.070 16.495 2655.770 1790.400 ;
- RECT 2659.670 16.495 2674.370 1790.400 ;
- RECT 2678.270 16.495 2697.145 1790.400 ;
+ RECT 183.375 2709.600 188.570 3288.080 ;
+ RECT 192.470 2709.600 207.170 3288.080 ;
+ RECT 211.070 2709.600 225.770 3288.080 ;
+ RECT 229.670 2709.600 244.370 3288.080 ;
+ RECT 248.270 2709.600 278.570 3288.080 ;
+ RECT 282.470 2709.600 297.170 3288.080 ;
+ RECT 301.070 2709.600 315.770 3288.080 ;
+ RECT 319.670 2709.600 334.370 3288.080 ;
+ RECT 338.270 2709.600 368.570 3288.080 ;
+ RECT 372.470 2709.600 387.170 3288.080 ;
+ RECT 391.070 2709.600 405.770 3288.080 ;
+ RECT 409.670 2709.600 424.370 3288.080 ;
+ RECT 428.270 2709.600 458.570 3288.080 ;
+ RECT 462.470 2709.600 477.170 3288.080 ;
+ RECT 481.070 2709.600 495.770 3288.080 ;
+ RECT 499.670 2709.600 514.370 3288.080 ;
+ RECT 518.270 2709.600 548.570 3288.080 ;
+ RECT 552.470 2709.600 567.170 3288.080 ;
+ RECT 571.070 2709.600 585.770 3288.080 ;
+ RECT 589.670 2709.600 604.370 3288.080 ;
+ RECT 608.270 2709.600 638.570 3288.080 ;
+ RECT 183.375 2290.400 638.570 2709.600 ;
+ RECT 183.375 31.455 188.570 2290.400 ;
+ RECT 192.470 31.455 207.170 2290.400 ;
+ RECT 211.070 31.455 225.770 2290.400 ;
+ RECT 229.670 31.455 244.370 2290.400 ;
+ RECT 248.270 31.455 278.570 2290.400 ;
+ RECT 282.470 31.455 297.170 2290.400 ;
+ RECT 301.070 31.455 315.770 2290.400 ;
+ RECT 319.670 31.455 334.370 2290.400 ;
+ RECT 338.270 31.455 368.570 2290.400 ;
+ RECT 372.470 31.455 387.170 2290.400 ;
+ RECT 391.070 31.455 405.770 2290.400 ;
+ RECT 409.670 31.455 424.370 2290.400 ;
+ RECT 428.270 31.455 458.570 2290.400 ;
+ RECT 462.470 31.455 477.170 2290.400 ;
+ RECT 481.070 31.455 495.770 2290.400 ;
+ RECT 499.670 31.455 514.370 2290.400 ;
+ RECT 518.270 31.455 548.570 2290.400 ;
+ RECT 552.470 31.455 567.170 2290.400 ;
+ RECT 571.070 31.455 585.770 2290.400 ;
+ RECT 589.670 31.455 604.370 2290.400 ;
+ RECT 608.270 31.455 638.570 2290.400 ;
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+ RECT 968.270 31.455 998.570 3288.080 ;
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+ RECT 1058.270 31.455 1088.570 3288.080 ;
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+ RECT 1111.070 31.455 1125.770 3288.080 ;
+ RECT 1129.670 31.455 1144.370 3288.080 ;
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+ RECT 1238.270 31.455 1268.570 3288.080 ;
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+ RECT 1291.070 1709.600 1305.770 3288.080 ;
+ RECT 1309.670 1709.600 1324.370 3288.080 ;
+ RECT 1328.270 1709.600 1358.570 3288.080 ;
+ RECT 1362.470 1709.600 1377.170 3288.080 ;
+ RECT 1381.070 1709.600 1395.770 3288.080 ;
+ RECT 1399.670 1709.600 1414.370 3288.080 ;
+ RECT 1418.270 1709.600 1448.570 3288.080 ;
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+ RECT 1471.070 1709.600 1485.770 3288.080 ;
+ RECT 1489.670 1790.400 2727.170 3288.080 ;
+ RECT 1489.670 1709.600 1504.370 1790.400 ;
+ RECT 1508.270 1709.600 1538.570 1790.400 ;
+ RECT 1542.470 1709.600 1557.170 1790.400 ;
+ RECT 1561.070 1709.600 1575.770 1790.400 ;
+ RECT 1579.670 1709.600 1594.370 1790.400 ;
+ RECT 1598.270 1709.600 1628.570 1790.400 ;
+ RECT 1632.470 1709.600 1647.170 1790.400 ;
+ RECT 1651.070 1709.600 1665.770 1790.400 ;
+ RECT 1669.670 1709.600 1684.370 1790.400 ;
+ RECT 1688.270 1709.600 1718.570 1790.400 ;
+ RECT 1722.470 1709.600 1737.170 1790.400 ;
+ RECT 1741.070 1709.600 1755.770 1790.400 ;
+ RECT 1759.670 1709.600 1774.370 1790.400 ;
+ RECT 1778.270 1709.600 1808.570 1790.400 ;
+ RECT 1812.470 1709.600 1827.170 1790.400 ;
+ RECT 1831.070 1709.600 1845.770 1790.400 ;
+ RECT 1849.670 1709.600 1864.370 1790.400 ;
+ RECT 1868.270 1709.600 1898.570 1790.400 ;
+ RECT 1902.470 1709.600 1917.170 1790.400 ;
+ RECT 1921.070 1709.600 1935.770 1790.400 ;
+ RECT 1939.670 1709.600 1954.370 1790.400 ;
+ RECT 1958.270 1709.600 1988.570 1790.400 ;
+ RECT 1992.470 1709.600 2007.170 1790.400 ;
+ RECT 2011.070 1709.600 2025.770 1790.400 ;
+ RECT 2029.670 1709.600 2044.370 1790.400 ;
+ RECT 2048.270 1709.600 2078.570 1790.400 ;
+ RECT 2082.470 1709.600 2097.170 1790.400 ;
+ RECT 2101.070 1709.600 2115.770 1790.400 ;
+ RECT 2119.670 1709.600 2134.370 1790.400 ;
+ RECT 2138.270 1709.600 2168.570 1790.400 ;
+ RECT 2172.470 1709.600 2187.170 1790.400 ;
+ RECT 2191.070 1709.600 2205.770 1790.400 ;
+ RECT 2209.670 1709.600 2224.370 1790.400 ;
+ RECT 2228.270 1709.600 2258.570 1790.400 ;
+ RECT 2262.470 1709.600 2277.170 1790.400 ;
+ RECT 2281.070 1709.600 2295.770 1790.400 ;
+ RECT 2299.670 1709.600 2314.370 1790.400 ;
+ RECT 2318.270 1709.600 2348.570 1790.400 ;
+ RECT 2352.470 1709.600 2367.170 1790.400 ;
+ RECT 2371.070 1709.600 2385.770 1790.400 ;
+ RECT 2389.670 1709.600 2404.370 1790.400 ;
+ RECT 2408.270 1709.600 2438.570 1790.400 ;
+ RECT 2442.470 1709.600 2457.170 1790.400 ;
+ RECT 2461.070 1709.600 2475.770 1790.400 ;
+ RECT 2479.670 1709.600 2494.370 1790.400 ;
+ RECT 2498.270 1709.600 2528.570 1790.400 ;
+ RECT 2532.470 1709.600 2547.170 1790.400 ;
+ RECT 2551.070 1709.600 2565.770 1790.400 ;
+ RECT 2569.670 1709.600 2584.370 1790.400 ;
+ RECT 2588.270 1709.600 2618.570 1790.400 ;
+ RECT 2622.470 1709.600 2637.170 1790.400 ;
+ RECT 2641.070 1709.600 2655.770 1790.400 ;
+ RECT 2659.670 1709.600 2674.370 1790.400 ;
+ RECT 2678.270 1709.600 2708.570 1790.400 ;
+ RECT 2712.470 1709.600 2727.170 1790.400 ;
+ RECT 2731.070 1709.600 2745.770 3288.080 ;
+ RECT 2749.670 1709.600 2764.370 3288.080 ;
+ RECT 2768.270 1709.600 2798.570 3288.080 ;
+ RECT 2802.470 1709.600 2813.985 3288.080 ;
+ RECT 1272.470 190.400 2813.985 1709.600 ;
+ RECT 1272.470 31.455 1287.170 190.400 ;
+ RECT 1291.070 31.455 1305.770 190.400 ;
+ RECT 1309.670 31.455 1324.370 190.400 ;
+ RECT 1328.270 31.455 1358.570 190.400 ;
+ RECT 1362.470 31.455 1377.170 190.400 ;
+ RECT 1381.070 31.455 1395.770 190.400 ;
+ RECT 1399.670 31.455 1414.370 190.400 ;
+ RECT 1418.270 31.455 1448.570 190.400 ;
+ RECT 1452.470 31.455 1467.170 190.400 ;
+ RECT 1471.070 31.455 1485.770 190.400 ;
+ RECT 1489.670 31.455 1504.370 190.400 ;
+ RECT 1508.270 31.455 1538.570 190.400 ;
+ RECT 1542.470 31.455 1557.170 190.400 ;
+ RECT 1561.070 31.455 1575.770 190.400 ;
+ RECT 1579.670 31.455 1594.370 190.400 ;
+ RECT 1598.270 31.455 1628.570 190.400 ;
+ RECT 1632.470 31.455 1647.170 190.400 ;
+ RECT 1651.070 31.455 1665.770 190.400 ;
+ RECT 1669.670 31.455 1684.370 190.400 ;
+ RECT 1688.270 31.455 1718.570 190.400 ;
+ RECT 1722.470 31.455 1737.170 190.400 ;
+ RECT 1741.070 31.455 1755.770 190.400 ;
+ RECT 1759.670 31.455 1774.370 190.400 ;
+ RECT 1778.270 31.455 1808.570 190.400 ;
+ RECT 1812.470 31.455 1827.170 190.400 ;
+ RECT 1831.070 31.455 1845.770 190.400 ;
+ RECT 1849.670 31.455 1864.370 190.400 ;
+ RECT 1868.270 31.455 1898.570 190.400 ;
+ RECT 1902.470 31.455 1917.170 190.400 ;
+ RECT 1921.070 31.455 1935.770 190.400 ;
+ RECT 1939.670 31.455 1954.370 190.400 ;
+ RECT 1958.270 31.455 1988.570 190.400 ;
+ RECT 1992.470 31.455 2007.170 190.400 ;
+ RECT 2011.070 31.455 2025.770 190.400 ;
+ RECT 2029.670 31.455 2044.370 190.400 ;
+ RECT 2048.270 31.455 2078.570 190.400 ;
+ RECT 2082.470 31.455 2097.170 190.400 ;
+ RECT 2101.070 31.455 2115.770 190.400 ;
+ RECT 2119.670 31.455 2134.370 190.400 ;
+ RECT 2138.270 31.455 2168.570 190.400 ;
+ RECT 2172.470 31.455 2187.170 190.400 ;
+ RECT 2191.070 31.455 2205.770 190.400 ;
+ RECT 2209.670 31.455 2224.370 190.400 ;
+ RECT 2228.270 31.455 2258.570 190.400 ;
+ RECT 2262.470 31.455 2277.170 190.400 ;
+ RECT 2281.070 31.455 2295.770 190.400 ;
+ RECT 2299.670 31.455 2314.370 190.400 ;
+ RECT 2318.270 31.455 2348.570 190.400 ;
+ RECT 2352.470 31.455 2367.170 190.400 ;
+ RECT 2371.070 31.455 2385.770 190.400 ;
+ RECT 2389.670 31.455 2404.370 190.400 ;
+ RECT 2408.270 31.455 2438.570 190.400 ;
+ RECT 2442.470 31.455 2457.170 190.400 ;
+ RECT 2461.070 31.455 2475.770 190.400 ;
+ RECT 2479.670 31.455 2494.370 190.400 ;
+ RECT 2498.270 31.455 2528.570 190.400 ;
+ RECT 2532.470 31.455 2547.170 190.400 ;
+ RECT 2551.070 31.455 2565.770 190.400 ;
+ RECT 2569.670 31.455 2584.370 190.400 ;
+ RECT 2588.270 31.455 2618.570 190.400 ;
+ RECT 2622.470 31.455 2637.170 190.400 ;
+ RECT 2641.070 31.455 2655.770 190.400 ;
+ RECT 2659.670 31.455 2674.370 190.400 ;
+ RECT 2678.270 31.455 2708.570 190.400 ;
+ RECT 2712.470 31.455 2727.170 190.400 ;
+ RECT 2731.070 31.455 2745.770 190.400 ;
+ RECT 2749.670 31.455 2764.370 190.400 ;
+ RECT 2768.270 31.455 2798.570 190.400 ;
+ RECT 2802.470 31.455 2813.985 190.400 ;
END
END user_project_wrapper
END LIBRARY
diff --git a/openlane/user_project_wrapper/macro.cfg b/openlane/user_project_wrapper/macro.cfg
index 6a7a8f6..3d19a16 100644
--- a/openlane/user_project_wrapper/macro.cfg
+++ b/openlane/user_project_wrapper/macro.cfg
@@ -2,7 +2,7 @@
# chip_controller 2400 1000 N #200x200 -> 2500 900
chip_controller 200 2300 N #200x200 -> 2500 900
custom_sram 1500 1800 N #1200 1500 -> 2700 3300
-core0 200 200 N # 1500 1500 --> 1700 1700
+core0 1300 200 N # 1500 1500 --> 1700 1700
# sram_wrapper 200 1800 N #200 200 -> 2100 900
# io_input_arbiter 1900 200 N #75 75 --> 1975 275
# io_output_arbiter 2100 200 N #75 75 --> 2175 275
\ No newline at end of file
diff --git a/signoff/user_project_wrapper/final_summary_report.csv b/signoff/user_project_wrapper/final_summary_report.csv
index d404b8a..88ba57b 100644
--- a/signoff/user_project_wrapper/final_summary_report.csv
+++ b/signoff/user_project_wrapper/final_summary_report.csv
@@ -1,2 +1,2 @@
,design,design_name,config,flow_status,total_runtime,routed_runtime,(Cell/mm^2)/Core_Util,DIEAREA_mm^2,CellPer_mm^2,OpenDP_Util,Peak_Memory_Usage_MB,cell_count,tritonRoute_violations,Short_violations,MetSpc_violations,OffGrid_violations,MinHole_violations,Other_violations,Magic_violations,antenna_violations,lvs_total_errors,cvc_total_errors,klayout_violations,wire_length,vias,wns,pl_wns,optimized_wns,fastroute_wns,spef_wns,tns,pl_tns,optimized_tns,fastroute_tns,spef_tns,HPWL,routing_layer1_pct,routing_layer2_pct,routing_layer3_pct,routing_layer4_pct,routing_layer5_pct,routing_layer6_pct,wires_count,wire_bits,public_wires_count,public_wire_bits,memories_count,memory_bits,processes_count,cells_pre_abc,AND,DFF,NAND,NOR,OR,XOR,XNOR,MUX,inputs,outputs,level,EndCaps,TapCells,Diodes,Total_Physical_Cells,suggested_clock_frequency,suggested_clock_period,CLOCK_PERIOD,SYNTH_STRATEGY,SYNTH_MAX_FANOUT,FP_CORE_UTIL,FP_ASPECT_RATIO,FP_PDN_VPITCH,FP_PDN_HPITCH,PL_TARGET_DENSITY,GLB_RT_ADJUSTMENT,STD_CELL_LIBRARY,CELL_PAD,DIODE_INSERTION_STRATEGY
-0,/project/openlane/user_project_wrapper,user_project_wrapper,user_project_wrapper,flow_completed,0h31m6s,-1,0.38916562889165623,10.2784,0.19458281444582812,-1,506.9,2,0,0,0,0,0,0,0,0,0,-1,-1,1596307,2426,0.0,-1,-1,0.0,-1,0.0,-1,-1,0.0,-1,-1,40141.04,2.59,4.91,0.43,0.25,-1,57,1203,57,1203,0,0,0,2,0,0,0,0,0,0,0,0,-1,-1,-1,0,0,0,0,19.607843137254903,51,50,AREA 0,5,50,1,180,180,0.55,0.0,sky130_fd_sc_hd,4,0
+0,/project/openlane/user_project_wrapper,user_project_wrapper,user_project_wrapper,flow_completed,0h51m34s,-1,0.5837484433374844,10.2784,0.2918742216687422,-1,515.24,3,0,0,0,0,0,0,0,0,0,-1,-1,2938305,4358,0.0,-1,-1,0.0,-1,0.0,-1,-1,0.0,-1,-1,40141.04,6.36,12.33,1.34,0.46,-1,57,1203,57,1203,0,0,0,3,0,0,0,0,0,0,0,0,-1,-1,-1,0,0,0,0,19.607843137254903,51,50,AREA 0,5,50,1,180,180,0.55,0.0,sky130_fd_sc_hd,4,0
diff --git a/spi/lvs/user_project_wrapper.spice b/spi/lvs/user_project_wrapper.spice
index 56f06de..e350bac 100644
--- a/spi/lvs/user_project_wrapper.spice
+++ b/spi/lvs/user_project_wrapper.spice
@@ -174,6 +174,81 @@
+ wr_data[97] wr_data[98] wr_data[99] wr_data[9]
.ends
+* Black-box entry subcircuit for core abstract view
+.subckt core clk data_from_mem[0] data_from_mem[100] data_from_mem[101] data_from_mem[102]
++ data_from_mem[103] data_from_mem[104] data_from_mem[105] data_from_mem[106] data_from_mem[107]
++ data_from_mem[108] data_from_mem[109] data_from_mem[10] data_from_mem[110] data_from_mem[111]
++ data_from_mem[112] data_from_mem[113] data_from_mem[114] data_from_mem[115] data_from_mem[116]
++ data_from_mem[117] data_from_mem[118] data_from_mem[119] data_from_mem[11] data_from_mem[120]
++ data_from_mem[121] data_from_mem[122] data_from_mem[123] data_from_mem[124] data_from_mem[125]
++ data_from_mem[126] data_from_mem[127] data_from_mem[12] data_from_mem[13] data_from_mem[14]
++ data_from_mem[15] data_from_mem[16] data_from_mem[17] data_from_mem[18] data_from_mem[19]
++ data_from_mem[1] data_from_mem[20] data_from_mem[21] data_from_mem[22] data_from_mem[23]
++ data_from_mem[24] data_from_mem[25] data_from_mem[26] data_from_mem[27] data_from_mem[28]
++ data_from_mem[29] data_from_mem[2] data_from_mem[30] data_from_mem[31] data_from_mem[32]
++ data_from_mem[33] data_from_mem[34] data_from_mem[35] data_from_mem[36] data_from_mem[37]
++ data_from_mem[38] data_from_mem[39] data_from_mem[3] data_from_mem[40] data_from_mem[41]
++ data_from_mem[42] data_from_mem[43] data_from_mem[44] data_from_mem[45] data_from_mem[46]
++ data_from_mem[47] data_from_mem[48] data_from_mem[49] data_from_mem[4] data_from_mem[50]
++ data_from_mem[51] data_from_mem[52] data_from_mem[53] data_from_mem[54] data_from_mem[55]
++ data_from_mem[56] data_from_mem[57] data_from_mem[58] data_from_mem[59] data_from_mem[5]
++ data_from_mem[60] data_from_mem[61] data_from_mem[62] data_from_mem[63] data_from_mem[64]
++ data_from_mem[65] data_from_mem[66] data_from_mem[67] data_from_mem[68] data_from_mem[69]
++ data_from_mem[6] data_from_mem[70] data_from_mem[71] data_from_mem[72] data_from_mem[73]
++ data_from_mem[74] data_from_mem[75] data_from_mem[76] data_from_mem[77] data_from_mem[78]
++ data_from_mem[79] data_from_mem[7] data_from_mem[80] data_from_mem[81] data_from_mem[82]
++ data_from_mem[83] data_from_mem[84] data_from_mem[85] data_from_mem[86] data_from_mem[87]
++ data_from_mem[88] data_from_mem[89] data_from_mem[8] data_from_mem[90] data_from_mem[91]
++ data_from_mem[92] data_from_mem[93] data_from_mem[94] data_from_mem[95] data_from_mem[96]
++ data_from_mem[97] data_from_mem[98] data_from_mem[99] data_from_mem[9] hex_out[0]
++ hex_out[10] hex_out[11] hex_out[12] hex_out[13] hex_out[14] hex_out[15] hex_out[16]
++ hex_out[17] hex_out[18] hex_out[19] hex_out[1] hex_out[20] hex_out[21] hex_out[22]
++ hex_out[23] hex_out[24] hex_out[25] hex_out[26] hex_out[27] hex_out[28] hex_out[29]
++ hex_out[2] hex_out[30] hex_out[31] hex_out[3] hex_out[4] hex_out[5] hex_out[6] hex_out[7]
++ hex_out[8] hex_out[9] hex_req is_mem_ready is_mem_req is_mem_req_reset is_memory_we
++ is_print_done mem_addr_out[0] mem_addr_out[10] mem_addr_out[11] mem_addr_out[12]
++ mem_addr_out[13] mem_addr_out[14] mem_addr_out[15] mem_addr_out[16] mem_addr_out[17]
++ mem_addr_out[18] mem_addr_out[19] mem_addr_out[1] mem_addr_out[2] mem_addr_out[3]
++ mem_addr_out[4] mem_addr_out[5] mem_addr_out[6] mem_addr_out[7] mem_addr_out[8]
++ mem_addr_out[9] mem_data_out[0] mem_data_out[100] mem_data_out[101] mem_data_out[102]
++ mem_data_out[103] mem_data_out[104] mem_data_out[105] mem_data_out[106] mem_data_out[107]
++ mem_data_out[108] mem_data_out[109] mem_data_out[10] mem_data_out[110] mem_data_out[111]
++ mem_data_out[112] mem_data_out[113] mem_data_out[114] mem_data_out[115] mem_data_out[116]
++ mem_data_out[117] mem_data_out[118] mem_data_out[119] mem_data_out[11] mem_data_out[120]
++ mem_data_out[121] mem_data_out[122] mem_data_out[123] mem_data_out[124] mem_data_out[125]
++ mem_data_out[126] mem_data_out[127] mem_data_out[12] mem_data_out[13] mem_data_out[14]
++ mem_data_out[15] mem_data_out[16] mem_data_out[17] mem_data_out[18] mem_data_out[19]
++ mem_data_out[1] mem_data_out[20] mem_data_out[21] mem_data_out[22] mem_data_out[23]
++ mem_data_out[24] mem_data_out[25] mem_data_out[26] mem_data_out[27] mem_data_out[28]
++ mem_data_out[29] mem_data_out[2] mem_data_out[30] mem_data_out[31] mem_data_out[32]
++ mem_data_out[33] mem_data_out[34] mem_data_out[35] mem_data_out[36] mem_data_out[37]
++ mem_data_out[38] mem_data_out[39] mem_data_out[3] mem_data_out[40] mem_data_out[41]
++ mem_data_out[42] mem_data_out[43] mem_data_out[44] mem_data_out[45] mem_data_out[46]
++ mem_data_out[47] mem_data_out[48] mem_data_out[49] mem_data_out[4] mem_data_out[50]
++ mem_data_out[51] mem_data_out[52] mem_data_out[53] mem_data_out[54] mem_data_out[55]
++ mem_data_out[56] mem_data_out[57] mem_data_out[58] mem_data_out[59] mem_data_out[5]
++ mem_data_out[60] mem_data_out[61] mem_data_out[62] mem_data_out[63] mem_data_out[64]
++ mem_data_out[65] mem_data_out[66] mem_data_out[67] mem_data_out[68] mem_data_out[69]
++ mem_data_out[6] mem_data_out[70] mem_data_out[71] mem_data_out[72] mem_data_out[73]
++ mem_data_out[74] mem_data_out[75] mem_data_out[76] mem_data_out[77] mem_data_out[78]
++ mem_data_out[79] mem_data_out[7] mem_data_out[80] mem_data_out[81] mem_data_out[82]
++ mem_data_out[83] mem_data_out[84] mem_data_out[85] mem_data_out[86] mem_data_out[87]
++ mem_data_out[88] mem_data_out[89] mem_data_out[8] mem_data_out[90] mem_data_out[91]
++ mem_data_out[92] mem_data_out[93] mem_data_out[94] mem_data_out[95] mem_data_out[96]
++ mem_data_out[97] mem_data_out[98] mem_data_out[99] mem_data_out[9] read_interactive_ready
++ read_interactive_req read_interactive_value[0] read_interactive_value[10] read_interactive_value[11]
++ read_interactive_value[12] read_interactive_value[13] read_interactive_value[14]
++ read_interactive_value[15] read_interactive_value[16] read_interactive_value[17]
++ read_interactive_value[18] read_interactive_value[19] read_interactive_value[1]
++ read_interactive_value[20] read_interactive_value[21] read_interactive_value[22]
++ read_interactive_value[23] read_interactive_value[24] read_interactive_value[25]
++ read_interactive_value[26] read_interactive_value[27] read_interactive_value[28]
++ read_interactive_value[29] read_interactive_value[2] read_interactive_value[30]
++ read_interactive_value[31] read_interactive_value[3] read_interactive_value[4] read_interactive_value[5]
++ read_interactive_value[6] read_interactive_value[7] read_interactive_value[8] read_interactive_value[9]
++ rst vccd1 vssd1
+.ends
+
* Black-box entry subcircuit for custom_sram abstract view
.subckt custom_sram a[0] a[10] a[11] a[12] a[13] a[14] a[15] a[16] a[17] a[18] a[19]
+ a[1] a[2] a[3] a[4] a[5] a[6] a[7] a[8] a[9] clk csb0_to_sram d[0] d[10] d[11] d[12]
@@ -284,47 +359,42 @@
+ wbs_dat_o[22] wbs_dat_o[23] wbs_dat_o[24] wbs_dat_o[25] wbs_dat_o[26] wbs_dat_o[27]
+ wbs_dat_o[28] wbs_dat_o[29] wbs_dat_o[2] wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3]
+ wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6] wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0]
-+ wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3] wbs_stb_i wbs_we_i
++ wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3] wbs_stb_i wbs_we_i vccd1_uq0 vccd2_uq0 vdda1_uq0
++ vdda2_uq0
Xchip_controller custom_sram/a[0] custom_sram/a[10] custom_sram/a[11] custom_sram/a[12]
+ custom_sram/a[13] custom_sram/a[14] custom_sram/a[15] custom_sram/a[16] custom_sram/a[17]
+ custom_sram/a[18] custom_sram/a[19] custom_sram/a[1] custom_sram/a[2] custom_sram/a[3]
+ custom_sram/a[4] custom_sram/a[5] custom_sram/a[6] custom_sram/a[7] custom_sram/a[8]
-+ custom_sram/a[9] chip_controller/addr_in[0] chip_controller/addr_in[10] chip_controller/addr_in[11]
-+ chip_controller/addr_in[12] chip_controller/addr_in[13] chip_controller/addr_in[14]
-+ chip_controller/addr_in[15] chip_controller/addr_in[16] chip_controller/addr_in[17]
-+ chip_controller/addr_in[18] chip_controller/addr_in[19] chip_controller/addr_in[1]
-+ chip_controller/addr_in[2] chip_controller/addr_in[3] chip_controller/addr_in[4]
-+ chip_controller/addr_in[5] chip_controller/addr_in[6] chip_controller/addr_in[7]
-+ chip_controller/addr_in[8] chip_controller/addr_in[9] chip_controller/addr_to_core_mem[0]
-+ chip_controller/addr_to_core_mem[10] chip_controller/addr_to_core_mem[11] chip_controller/addr_to_core_mem[12]
-+ chip_controller/addr_to_core_mem[13] chip_controller/addr_to_core_mem[14] chip_controller/addr_to_core_mem[15]
-+ chip_controller/addr_to_core_mem[16] chip_controller/addr_to_core_mem[17] chip_controller/addr_to_core_mem[18]
-+ chip_controller/addr_to_core_mem[19] chip_controller/addr_to_core_mem[1] chip_controller/addr_to_core_mem[2]
-+ chip_controller/addr_to_core_mem[3] chip_controller/addr_to_core_mem[4] chip_controller/addr_to_core_mem[5]
-+ chip_controller/addr_to_core_mem[6] chip_controller/addr_to_core_mem[7] chip_controller/addr_to_core_mem[8]
-+ chip_controller/addr_to_core_mem[9] custom_sram/clk chip_controller/core0_data_print[0]
-+ chip_controller/core0_data_print[10] chip_controller/core0_data_print[11] chip_controller/core0_data_print[12]
-+ chip_controller/core0_data_print[13] chip_controller/core0_data_print[14] chip_controller/core0_data_print[15]
-+ chip_controller/core0_data_print[16] chip_controller/core0_data_print[17] chip_controller/core0_data_print[18]
-+ chip_controller/core0_data_print[19] chip_controller/core0_data_print[1] chip_controller/core0_data_print[20]
-+ chip_controller/core0_data_print[21] chip_controller/core0_data_print[22] chip_controller/core0_data_print[23]
-+ chip_controller/core0_data_print[24] chip_controller/core0_data_print[25] chip_controller/core0_data_print[26]
-+ chip_controller/core0_data_print[27] chip_controller/core0_data_print[28] chip_controller/core0_data_print[29]
-+ chip_controller/core0_data_print[2] chip_controller/core0_data_print[30] chip_controller/core0_data_print[31]
-+ chip_controller/core0_data_print[3] chip_controller/core0_data_print[4] chip_controller/core0_data_print[5]
-+ chip_controller/core0_data_print[6] chip_controller/core0_data_print[7] chip_controller/core0_data_print[8]
-+ chip_controller/core0_data_print[9] custom_sram/csb0_to_sram chip_controller/data_out_to_core[0]
-+ chip_controller/data_out_to_core[10] chip_controller/data_out_to_core[11] chip_controller/data_out_to_core[12]
-+ chip_controller/data_out_to_core[13] chip_controller/data_out_to_core[14] chip_controller/data_out_to_core[15]
-+ chip_controller/data_out_to_core[16] chip_controller/data_out_to_core[17] chip_controller/data_out_to_core[18]
-+ chip_controller/data_out_to_core[19] chip_controller/data_out_to_core[1] chip_controller/data_out_to_core[20]
-+ chip_controller/data_out_to_core[21] chip_controller/data_out_to_core[22] chip_controller/data_out_to_core[23]
-+ chip_controller/data_out_to_core[24] chip_controller/data_out_to_core[25] chip_controller/data_out_to_core[26]
-+ chip_controller/data_out_to_core[27] chip_controller/data_out_to_core[28] chip_controller/data_out_to_core[29]
-+ chip_controller/data_out_to_core[2] chip_controller/data_out_to_core[30] chip_controller/data_out_to_core[31]
-+ chip_controller/data_out_to_core[3] chip_controller/data_out_to_core[4] chip_controller/data_out_to_core[5]
-+ chip_controller/data_out_to_core[6] chip_controller/data_out_to_core[7] chip_controller/data_out_to_core[8]
-+ chip_controller/data_out_to_core[9] chip_controller/data_to_core_mem[0] chip_controller/data_to_core_mem[10]
++ custom_sram/a[9] core0/mem_addr_out[0] core0/mem_addr_out[10] core0/mem_addr_out[11]
++ core0/mem_addr_out[12] core0/mem_addr_out[13] core0/mem_addr_out[14] core0/mem_addr_out[15]
++ core0/mem_addr_out[16] core0/mem_addr_out[17] core0/mem_addr_out[18] core0/mem_addr_out[19]
++ core0/mem_addr_out[1] core0/mem_addr_out[2] core0/mem_addr_out[3] core0/mem_addr_out[4]
++ core0/mem_addr_out[5] core0/mem_addr_out[6] core0/mem_addr_out[7] core0/mem_addr_out[8]
++ core0/mem_addr_out[9] chip_controller/addr_to_core_mem[0] chip_controller/addr_to_core_mem[10]
++ chip_controller/addr_to_core_mem[11] chip_controller/addr_to_core_mem[12] chip_controller/addr_to_core_mem[13]
++ chip_controller/addr_to_core_mem[14] chip_controller/addr_to_core_mem[15] chip_controller/addr_to_core_mem[16]
++ chip_controller/addr_to_core_mem[17] chip_controller/addr_to_core_mem[18] chip_controller/addr_to_core_mem[19]
++ chip_controller/addr_to_core_mem[1] chip_controller/addr_to_core_mem[2] chip_controller/addr_to_core_mem[3]
++ chip_controller/addr_to_core_mem[4] chip_controller/addr_to_core_mem[5] chip_controller/addr_to_core_mem[6]
++ chip_controller/addr_to_core_mem[7] chip_controller/addr_to_core_mem[8] chip_controller/addr_to_core_mem[9]
++ core0/clk core0/hex_out[0] core0/hex_out[10] core0/hex_out[11] core0/hex_out[12]
++ core0/hex_out[13] core0/hex_out[14] core0/hex_out[15] core0/hex_out[16] core0/hex_out[17]
++ core0/hex_out[18] core0/hex_out[19] core0/hex_out[1] core0/hex_out[20] core0/hex_out[21]
++ core0/hex_out[22] core0/hex_out[23] core0/hex_out[24] core0/hex_out[25] core0/hex_out[26]
++ core0/hex_out[27] core0/hex_out[28] core0/hex_out[29] core0/hex_out[2] core0/hex_out[30]
++ core0/hex_out[31] core0/hex_out[3] core0/hex_out[4] core0/hex_out[5] core0/hex_out[6]
++ core0/hex_out[7] core0/hex_out[8] core0/hex_out[9] custom_sram/csb0_to_sram core0/read_interactive_value[0]
++ core0/read_interactive_value[10] core0/read_interactive_value[11] core0/read_interactive_value[12]
++ core0/read_interactive_value[13] core0/read_interactive_value[14] core0/read_interactive_value[15]
++ core0/read_interactive_value[16] core0/read_interactive_value[17] core0/read_interactive_value[18]
++ core0/read_interactive_value[19] core0/read_interactive_value[1] core0/read_interactive_value[20]
++ core0/read_interactive_value[21] core0/read_interactive_value[22] core0/read_interactive_value[23]
++ core0/read_interactive_value[24] core0/read_interactive_value[25] core0/read_interactive_value[26]
++ core0/read_interactive_value[27] core0/read_interactive_value[28] core0/read_interactive_value[29]
++ core0/read_interactive_value[2] core0/read_interactive_value[30] core0/read_interactive_value[31]
++ core0/read_interactive_value[3] core0/read_interactive_value[4] core0/read_interactive_value[5]
++ core0/read_interactive_value[6] core0/read_interactive_value[7] core0/read_interactive_value[8]
++ core0/read_interactive_value[9] chip_controller/data_to_core_mem[0] chip_controller/data_to_core_mem[10]
+ chip_controller/data_to_core_mem[11] chip_controller/data_to_core_mem[12] chip_controller/data_to_core_mem[13]
+ chip_controller/data_to_core_mem[14] chip_controller/data_to_core_mem[15] chip_controller/data_to_core_mem[16]
+ chip_controller/data_to_core_mem[17] chip_controller/data_to_core_mem[18] chip_controller/data_to_core_mem[19]
@@ -348,184 +418,251 @@
+ custom_sram/q[26] custom_sram/q[27] custom_sram/q[28] custom_sram/q[29] custom_sram/q[2]
+ custom_sram/q[30] custom_sram/q[31] custom_sram/q[3] custom_sram/q[4] custom_sram/q[5]
+ custom_sram/q[6] custom_sram/q[7] custom_sram/q[8] custom_sram/q[9] chip_controller/is_loading_memory_into_core
-+ chip_controller/is_ready_dataout_core0 chip_controller/is_ready_print_core0 la_data_in[0]
-+ la_data_in[100] la_data_in[101] la_data_in[102] la_data_in[103] la_data_in[104]
-+ la_data_in[105] la_data_in[106] la_data_in[107] la_data_in[108] la_data_in[109]
-+ la_data_in[10] la_data_in[110] la_data_in[111] la_data_in[112] la_data_in[113] la_data_in[114]
-+ la_data_in[115] la_data_in[116] la_data_in[117] la_data_in[118] la_data_in[119]
-+ la_data_in[11] la_data_in[120] la_data_in[121] la_data_in[122] la_data_in[123] la_data_in[124]
-+ la_data_in[125] la_data_in[126] la_data_in[127] la_data_in[12] la_data_in[13] la_data_in[14]
-+ la_data_in[15] la_data_in[16] la_data_in[17] la_data_in[18] la_data_in[19] la_data_in[1]
-+ la_data_in[20] la_data_in[21] la_data_in[22] la_data_in[23] la_data_in[24] la_data_in[25]
-+ la_data_in[26] la_data_in[27] la_data_in[28] la_data_in[29] la_data_in[2] la_data_in[30]
-+ la_data_in[31] la_data_in[32] la_data_in[33] la_data_in[34] la_data_in[35] la_data_in[36]
-+ la_data_in[37] la_data_in[38] la_data_in[39] la_data_in[3] la_data_in[40] la_data_in[41]
-+ la_data_in[42] la_data_in[43] la_data_in[44] la_data_in[45] la_data_in[46] la_data_in[47]
-+ la_data_in[48] la_data_in[49] la_data_in[4] la_data_in[50] la_data_in[51] la_data_in[52]
-+ la_data_in[53] la_data_in[54] la_data_in[55] la_data_in[56] la_data_in[57] la_data_in[58]
-+ la_data_in[59] la_data_in[5] la_data_in[60] la_data_in[61] la_data_in[62] la_data_in[63]
-+ la_data_in[64] la_data_in[65] la_data_in[66] la_data_in[67] la_data_in[68] la_data_in[69]
-+ la_data_in[6] la_data_in[70] la_data_in[71] la_data_in[72] la_data_in[73] la_data_in[74]
-+ la_data_in[75] la_data_in[76] la_data_in[77] la_data_in[78] la_data_in[79] la_data_in[7]
-+ la_data_in[80] la_data_in[81] la_data_in[82] la_data_in[83] la_data_in[84] la_data_in[85]
-+ la_data_in[86] la_data_in[87] la_data_in[88] la_data_in[89] la_data_in[8] la_data_in[90]
-+ la_data_in[91] la_data_in[92] la_data_in[93] la_data_in[94] la_data_in[95] la_data_in[96]
-+ la_data_in[97] la_data_in[98] la_data_in[99] la_data_in[9] la_data_out[0] la_data_out[100]
-+ la_data_out[101] la_data_out[102] la_data_out[103] la_data_out[104] la_data_out[105]
-+ la_data_out[106] la_data_out[107] la_data_out[108] la_data_out[109] la_data_out[10]
-+ la_data_out[110] la_data_out[111] la_data_out[112] la_data_out[113] la_data_out[114]
-+ la_data_out[115] la_data_out[116] la_data_out[117] la_data_out[118] la_data_out[119]
-+ la_data_out[11] la_data_out[120] la_data_out[121] la_data_out[122] la_data_out[123]
-+ la_data_out[124] la_data_out[125] la_data_out[126] la_data_out[127] la_data_out[12]
-+ la_data_out[13] la_data_out[14] la_data_out[15] la_data_out[16] la_data_out[17]
-+ la_data_out[18] la_data_out[19] la_data_out[1] la_data_out[20] la_data_out[21] la_data_out[22]
-+ la_data_out[23] la_data_out[24] la_data_out[25] la_data_out[26] la_data_out[27]
-+ la_data_out[28] la_data_out[29] la_data_out[2] la_data_out[30] la_data_out[31] la_data_out[32]
-+ la_data_out[33] la_data_out[34] la_data_out[35] la_data_out[36] la_data_out[37]
-+ la_data_out[38] la_data_out[39] la_data_out[3] la_data_out[40] la_data_out[41] la_data_out[42]
-+ la_data_out[43] la_data_out[44] la_data_out[45] la_data_out[46] la_data_out[47]
-+ la_data_out[48] la_data_out[49] la_data_out[4] la_data_out[50] la_data_out[51] la_data_out[52]
-+ la_data_out[53] la_data_out[54] la_data_out[55] la_data_out[56] la_data_out[57]
-+ la_data_out[58] la_data_out[59] la_data_out[5] la_data_out[60] la_data_out[61] la_data_out[62]
-+ la_data_out[63] la_data_out[64] la_data_out[65] la_data_out[66] la_data_out[67]
-+ la_data_out[68] la_data_out[69] la_data_out[6] la_data_out[70] la_data_out[71] la_data_out[72]
-+ la_data_out[73] la_data_out[74] la_data_out[75] la_data_out[76] la_data_out[77]
-+ la_data_out[78] la_data_out[79] la_data_out[7] la_data_out[80] la_data_out[81] la_data_out[82]
-+ la_data_out[83] la_data_out[84] la_data_out[85] la_data_out[86] la_data_out[87]
-+ la_data_out[88] la_data_out[89] la_data_out[8] la_data_out[90] la_data_out[91] la_data_out[92]
-+ la_data_out[93] la_data_out[94] la_data_out[95] la_data_out[96] la_data_out[97]
-+ la_data_out[98] la_data_out[99] la_data_out[9] la_oenb[0] la_oenb[100] la_oenb[101]
-+ la_oenb[102] la_oenb[103] la_oenb[104] la_oenb[105] la_oenb[106] la_oenb[107] la_oenb[108]
-+ la_oenb[109] la_oenb[10] la_oenb[110] la_oenb[111] la_oenb[112] la_oenb[113] la_oenb[114]
-+ la_oenb[115] la_oenb[116] la_oenb[117] la_oenb[118] la_oenb[119] la_oenb[11] la_oenb[120]
-+ la_oenb[121] la_oenb[122] la_oenb[123] la_oenb[124] la_oenb[125] la_oenb[126] la_oenb[127]
-+ la_oenb[12] la_oenb[13] la_oenb[14] la_oenb[15] la_oenb[16] la_oenb[17] la_oenb[18]
-+ la_oenb[19] la_oenb[1] la_oenb[20] la_oenb[21] la_oenb[22] la_oenb[23] la_oenb[24]
-+ la_oenb[25] la_oenb[26] la_oenb[27] la_oenb[28] la_oenb[29] la_oenb[2] la_oenb[30]
-+ la_oenb[31] la_oenb[32] la_oenb[33] la_oenb[34] la_oenb[35] la_oenb[36] la_oenb[37]
-+ la_oenb[38] la_oenb[39] la_oenb[3] la_oenb[40] la_oenb[41] la_oenb[42] la_oenb[43]
-+ la_oenb[44] la_oenb[45] la_oenb[46] la_oenb[47] la_oenb[48] la_oenb[49] la_oenb[4]
-+ la_oenb[50] la_oenb[51] la_oenb[52] la_oenb[53] la_oenb[54] la_oenb[55] la_oenb[56]
-+ la_oenb[57] la_oenb[58] la_oenb[59] la_oenb[5] la_oenb[60] la_oenb[61] la_oenb[62]
-+ la_oenb[63] la_oenb[64] la_oenb[65] la_oenb[66] la_oenb[67] la_oenb[68] la_oenb[69]
-+ la_oenb[6] la_oenb[70] la_oenb[71] la_oenb[72] la_oenb[73] la_oenb[74] la_oenb[75]
-+ la_oenb[76] la_oenb[77] la_oenb[78] la_oenb[79] la_oenb[7] la_oenb[80] la_oenb[81]
-+ la_oenb[82] la_oenb[83] la_oenb[84] la_oenb[85] la_oenb[86] la_oenb[87] la_oenb[88]
-+ la_oenb[89] la_oenb[8] la_oenb[90] la_oenb[91] la_oenb[92] la_oenb[93] la_oenb[94]
-+ la_oenb[95] la_oenb[96] la_oenb[97] la_oenb[98] la_oenb[99] la_oenb[9] chip_controller/rd_data_out[0]
-+ chip_controller/rd_data_out[100] chip_controller/rd_data_out[101] chip_controller/rd_data_out[102]
-+ chip_controller/rd_data_out[103] chip_controller/rd_data_out[104] chip_controller/rd_data_out[105]
-+ chip_controller/rd_data_out[106] chip_controller/rd_data_out[107] chip_controller/rd_data_out[108]
-+ chip_controller/rd_data_out[109] chip_controller/rd_data_out[10] chip_controller/rd_data_out[110]
-+ chip_controller/rd_data_out[111] chip_controller/rd_data_out[112] chip_controller/rd_data_out[113]
-+ chip_controller/rd_data_out[114] chip_controller/rd_data_out[115] chip_controller/rd_data_out[116]
-+ chip_controller/rd_data_out[117] chip_controller/rd_data_out[118] chip_controller/rd_data_out[119]
-+ chip_controller/rd_data_out[11] chip_controller/rd_data_out[120] chip_controller/rd_data_out[121]
-+ chip_controller/rd_data_out[122] chip_controller/rd_data_out[123] chip_controller/rd_data_out[124]
-+ chip_controller/rd_data_out[125] chip_controller/rd_data_out[126] chip_controller/rd_data_out[127]
-+ chip_controller/rd_data_out[12] chip_controller/rd_data_out[13] chip_controller/rd_data_out[14]
-+ chip_controller/rd_data_out[15] chip_controller/rd_data_out[16] chip_controller/rd_data_out[17]
-+ chip_controller/rd_data_out[18] chip_controller/rd_data_out[19] chip_controller/rd_data_out[1]
-+ chip_controller/rd_data_out[20] chip_controller/rd_data_out[21] chip_controller/rd_data_out[22]
-+ chip_controller/rd_data_out[23] chip_controller/rd_data_out[24] chip_controller/rd_data_out[25]
-+ chip_controller/rd_data_out[26] chip_controller/rd_data_out[27] chip_controller/rd_data_out[28]
-+ chip_controller/rd_data_out[29] chip_controller/rd_data_out[2] chip_controller/rd_data_out[30]
-+ chip_controller/rd_data_out[31] chip_controller/rd_data_out[32] chip_controller/rd_data_out[33]
-+ chip_controller/rd_data_out[34] chip_controller/rd_data_out[35] chip_controller/rd_data_out[36]
-+ chip_controller/rd_data_out[37] chip_controller/rd_data_out[38] chip_controller/rd_data_out[39]
-+ chip_controller/rd_data_out[3] chip_controller/rd_data_out[40] chip_controller/rd_data_out[41]
-+ chip_controller/rd_data_out[42] chip_controller/rd_data_out[43] chip_controller/rd_data_out[44]
-+ chip_controller/rd_data_out[45] chip_controller/rd_data_out[46] chip_controller/rd_data_out[47]
-+ chip_controller/rd_data_out[48] chip_controller/rd_data_out[49] chip_controller/rd_data_out[4]
-+ chip_controller/rd_data_out[50] chip_controller/rd_data_out[51] chip_controller/rd_data_out[52]
-+ chip_controller/rd_data_out[53] chip_controller/rd_data_out[54] chip_controller/rd_data_out[55]
-+ chip_controller/rd_data_out[56] chip_controller/rd_data_out[57] chip_controller/rd_data_out[58]
-+ chip_controller/rd_data_out[59] chip_controller/rd_data_out[5] chip_controller/rd_data_out[60]
-+ chip_controller/rd_data_out[61] chip_controller/rd_data_out[62] chip_controller/rd_data_out[63]
-+ chip_controller/rd_data_out[64] chip_controller/rd_data_out[65] chip_controller/rd_data_out[66]
-+ chip_controller/rd_data_out[67] chip_controller/rd_data_out[68] chip_controller/rd_data_out[69]
-+ chip_controller/rd_data_out[6] chip_controller/rd_data_out[70] chip_controller/rd_data_out[71]
-+ chip_controller/rd_data_out[72] chip_controller/rd_data_out[73] chip_controller/rd_data_out[74]
-+ chip_controller/rd_data_out[75] chip_controller/rd_data_out[76] chip_controller/rd_data_out[77]
-+ chip_controller/rd_data_out[78] chip_controller/rd_data_out[79] chip_controller/rd_data_out[7]
-+ chip_controller/rd_data_out[80] chip_controller/rd_data_out[81] chip_controller/rd_data_out[82]
-+ chip_controller/rd_data_out[83] chip_controller/rd_data_out[84] chip_controller/rd_data_out[85]
-+ chip_controller/rd_data_out[86] chip_controller/rd_data_out[87] chip_controller/rd_data_out[88]
-+ chip_controller/rd_data_out[89] chip_controller/rd_data_out[8] chip_controller/rd_data_out[90]
-+ chip_controller/rd_data_out[91] chip_controller/rd_data_out[92] chip_controller/rd_data_out[93]
-+ chip_controller/rd_data_out[94] chip_controller/rd_data_out[95] chip_controller/rd_data_out[96]
-+ chip_controller/rd_data_out[97] chip_controller/rd_data_out[98] chip_controller/rd_data_out[99]
-+ chip_controller/rd_data_out[9] chip_controller/read_enable_to_Elpis chip_controller/read_interactive_req_core0
-+ chip_controller/read_value_to_Elpis[0] chip_controller/read_value_to_Elpis[10] chip_controller/read_value_to_Elpis[11]
-+ chip_controller/read_value_to_Elpis[12] chip_controller/read_value_to_Elpis[13]
-+ chip_controller/read_value_to_Elpis[14] chip_controller/read_value_to_Elpis[15]
-+ chip_controller/read_value_to_Elpis[16] chip_controller/read_value_to_Elpis[17]
-+ chip_controller/read_value_to_Elpis[18] chip_controller/read_value_to_Elpis[19]
-+ chip_controller/read_value_to_Elpis[1] chip_controller/read_value_to_Elpis[20] chip_controller/read_value_to_Elpis[21]
-+ chip_controller/read_value_to_Elpis[22] chip_controller/read_value_to_Elpis[23]
-+ chip_controller/read_value_to_Elpis[24] chip_controller/read_value_to_Elpis[25]
-+ chip_controller/read_value_to_Elpis[26] chip_controller/read_value_to_Elpis[27]
-+ chip_controller/read_value_to_Elpis[28] chip_controller/read_value_to_Elpis[29]
-+ chip_controller/read_value_to_Elpis[2] chip_controller/read_value_to_Elpis[30] chip_controller/read_value_to_Elpis[31]
-+ chip_controller/read_value_to_Elpis[3] chip_controller/read_value_to_Elpis[4] chip_controller/read_value_to_Elpis[5]
-+ chip_controller/read_value_to_Elpis[6] chip_controller/read_value_to_Elpis[7] chip_controller/read_value_to_Elpis[8]
-+ chip_controller/read_value_to_Elpis[9] chip_controller/ready chip_controller/req_out_core0
-+ chip_controller/requested chip_controller/reset_core chip_controller/reset_mem_req
-+ chip_controller/rst custom_sram/spare_wen0_to_sram vccd1 vssd1 wb_clk_i wb_rst_i
-+ wbs_dat_o[0] wbs_dat_o[10] wbs_dat_o[11] wbs_dat_o[12] wbs_dat_o[13] wbs_dat_o[14]
-+ wbs_dat_o[15] wbs_dat_o[16] wbs_dat_o[17] wbs_dat_o[18] wbs_dat_o[19] wbs_dat_o[1]
-+ wbs_dat_o[20] wbs_dat_o[21] wbs_dat_o[22] wbs_dat_o[23] wbs_dat_o[24] wbs_dat_o[25]
-+ wbs_dat_o[26] wbs_dat_o[27] wbs_dat_o[28] wbs_dat_o[29] wbs_dat_o[2] wbs_dat_o[30]
-+ wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6] wbs_dat_o[7] wbs_dat_o[8]
-+ wbs_dat_o[9] chip_controller/we custom_sram/we chip_controller/wr_data[0] chip_controller/wr_data[100]
-+ chip_controller/wr_data[101] chip_controller/wr_data[102] chip_controller/wr_data[103]
-+ chip_controller/wr_data[104] chip_controller/wr_data[105] chip_controller/wr_data[106]
-+ chip_controller/wr_data[107] chip_controller/wr_data[108] chip_controller/wr_data[109]
-+ chip_controller/wr_data[10] chip_controller/wr_data[110] chip_controller/wr_data[111]
-+ chip_controller/wr_data[112] chip_controller/wr_data[113] chip_controller/wr_data[114]
-+ chip_controller/wr_data[115] chip_controller/wr_data[116] chip_controller/wr_data[117]
-+ chip_controller/wr_data[118] chip_controller/wr_data[119] chip_controller/wr_data[11]
-+ chip_controller/wr_data[120] chip_controller/wr_data[121] chip_controller/wr_data[122]
-+ chip_controller/wr_data[123] chip_controller/wr_data[124] chip_controller/wr_data[125]
-+ chip_controller/wr_data[126] chip_controller/wr_data[127] chip_controller/wr_data[12]
-+ chip_controller/wr_data[13] chip_controller/wr_data[14] chip_controller/wr_data[15]
-+ chip_controller/wr_data[16] chip_controller/wr_data[17] chip_controller/wr_data[18]
-+ chip_controller/wr_data[19] chip_controller/wr_data[1] chip_controller/wr_data[20]
-+ chip_controller/wr_data[21] chip_controller/wr_data[22] chip_controller/wr_data[23]
-+ chip_controller/wr_data[24] chip_controller/wr_data[25] chip_controller/wr_data[26]
-+ chip_controller/wr_data[27] chip_controller/wr_data[28] chip_controller/wr_data[29]
-+ chip_controller/wr_data[2] chip_controller/wr_data[30] chip_controller/wr_data[31]
-+ chip_controller/wr_data[32] chip_controller/wr_data[33] chip_controller/wr_data[34]
-+ chip_controller/wr_data[35] chip_controller/wr_data[36] chip_controller/wr_data[37]
-+ chip_controller/wr_data[38] chip_controller/wr_data[39] chip_controller/wr_data[3]
-+ chip_controller/wr_data[40] chip_controller/wr_data[41] chip_controller/wr_data[42]
-+ chip_controller/wr_data[43] chip_controller/wr_data[44] chip_controller/wr_data[45]
-+ chip_controller/wr_data[46] chip_controller/wr_data[47] chip_controller/wr_data[48]
-+ chip_controller/wr_data[49] chip_controller/wr_data[4] chip_controller/wr_data[50]
-+ chip_controller/wr_data[51] chip_controller/wr_data[52] chip_controller/wr_data[53]
-+ chip_controller/wr_data[54] chip_controller/wr_data[55] chip_controller/wr_data[56]
-+ chip_controller/wr_data[57] chip_controller/wr_data[58] chip_controller/wr_data[59]
-+ chip_controller/wr_data[5] chip_controller/wr_data[60] chip_controller/wr_data[61]
-+ chip_controller/wr_data[62] chip_controller/wr_data[63] chip_controller/wr_data[64]
-+ chip_controller/wr_data[65] chip_controller/wr_data[66] chip_controller/wr_data[67]
-+ chip_controller/wr_data[68] chip_controller/wr_data[69] chip_controller/wr_data[6]
-+ chip_controller/wr_data[70] chip_controller/wr_data[71] chip_controller/wr_data[72]
-+ chip_controller/wr_data[73] chip_controller/wr_data[74] chip_controller/wr_data[75]
-+ chip_controller/wr_data[76] chip_controller/wr_data[77] chip_controller/wr_data[78]
-+ chip_controller/wr_data[79] chip_controller/wr_data[7] chip_controller/wr_data[80]
-+ chip_controller/wr_data[81] chip_controller/wr_data[82] chip_controller/wr_data[83]
-+ chip_controller/wr_data[84] chip_controller/wr_data[85] chip_controller/wr_data[86]
-+ chip_controller/wr_data[87] chip_controller/wr_data[88] chip_controller/wr_data[89]
-+ chip_controller/wr_data[8] chip_controller/wr_data[90] chip_controller/wr_data[91]
-+ chip_controller/wr_data[92] chip_controller/wr_data[93] chip_controller/wr_data[94]
-+ chip_controller/wr_data[95] chip_controller/wr_data[96] chip_controller/wr_data[97]
-+ chip_controller/wr_data[98] chip_controller/wr_data[99] chip_controller/wr_data[9]
-+ chip_controller
++ core0/read_interactive_ready core0/is_print_done la_data_in[0] la_data_in[100] la_data_in[101]
++ la_data_in[102] la_data_in[103] la_data_in[104] la_data_in[105] la_data_in[106]
++ la_data_in[107] la_data_in[108] la_data_in[109] la_data_in[10] la_data_in[110] la_data_in[111]
++ la_data_in[112] la_data_in[113] la_data_in[114] la_data_in[115] la_data_in[116]
++ la_data_in[117] la_data_in[118] la_data_in[119] la_data_in[11] la_data_in[120] la_data_in[121]
++ la_data_in[122] la_data_in[123] la_data_in[124] la_data_in[125] la_data_in[126]
++ la_data_in[127] la_data_in[12] la_data_in[13] la_data_in[14] la_data_in[15] la_data_in[16]
++ la_data_in[17] la_data_in[18] la_data_in[19] la_data_in[1] la_data_in[20] la_data_in[21]
++ la_data_in[22] la_data_in[23] la_data_in[24] la_data_in[25] la_data_in[26] la_data_in[27]
++ la_data_in[28] la_data_in[29] la_data_in[2] la_data_in[30] la_data_in[31] la_data_in[32]
++ la_data_in[33] la_data_in[34] la_data_in[35] la_data_in[36] la_data_in[37] la_data_in[38]
++ la_data_in[39] la_data_in[3] la_data_in[40] la_data_in[41] la_data_in[42] la_data_in[43]
++ la_data_in[44] la_data_in[45] la_data_in[46] la_data_in[47] la_data_in[48] la_data_in[49]
++ la_data_in[4] la_data_in[50] la_data_in[51] la_data_in[52] la_data_in[53] la_data_in[54]
++ la_data_in[55] la_data_in[56] la_data_in[57] la_data_in[58] la_data_in[59] la_data_in[5]
++ la_data_in[60] la_data_in[61] la_data_in[62] la_data_in[63] la_data_in[64] la_data_in[65]
++ la_data_in[66] la_data_in[67] la_data_in[68] la_data_in[69] la_data_in[6] la_data_in[70]
++ la_data_in[71] la_data_in[72] la_data_in[73] la_data_in[74] la_data_in[75] la_data_in[76]
++ la_data_in[77] la_data_in[78] la_data_in[79] la_data_in[7] la_data_in[80] la_data_in[81]
++ la_data_in[82] la_data_in[83] la_data_in[84] la_data_in[85] la_data_in[86] la_data_in[87]
++ la_data_in[88] la_data_in[89] la_data_in[8] la_data_in[90] la_data_in[91] la_data_in[92]
++ la_data_in[93] la_data_in[94] la_data_in[95] la_data_in[96] la_data_in[97] la_data_in[98]
++ la_data_in[99] la_data_in[9] la_data_out[0] la_data_out[100] la_data_out[101] la_data_out[102]
++ la_data_out[103] la_data_out[104] la_data_out[105] la_data_out[106] la_data_out[107]
++ la_data_out[108] la_data_out[109] la_data_out[10] la_data_out[110] la_data_out[111]
++ la_data_out[112] la_data_out[113] la_data_out[114] la_data_out[115] la_data_out[116]
++ la_data_out[117] la_data_out[118] la_data_out[119] la_data_out[11] la_data_out[120]
++ la_data_out[121] la_data_out[122] la_data_out[123] la_data_out[124] la_data_out[125]
++ la_data_out[126] la_data_out[127] la_data_out[12] la_data_out[13] la_data_out[14]
++ la_data_out[15] la_data_out[16] la_data_out[17] la_data_out[18] la_data_out[19]
++ la_data_out[1] la_data_out[20] la_data_out[21] la_data_out[22] la_data_out[23] la_data_out[24]
++ la_data_out[25] la_data_out[26] la_data_out[27] la_data_out[28] la_data_out[29]
++ la_data_out[2] la_data_out[30] la_data_out[31] la_data_out[32] la_data_out[33] la_data_out[34]
++ la_data_out[35] la_data_out[36] la_data_out[37] la_data_out[38] la_data_out[39]
++ la_data_out[3] la_data_out[40] la_data_out[41] la_data_out[42] la_data_out[43] la_data_out[44]
++ la_data_out[45] la_data_out[46] la_data_out[47] la_data_out[48] la_data_out[49]
++ la_data_out[4] la_data_out[50] la_data_out[51] la_data_out[52] la_data_out[53] la_data_out[54]
++ la_data_out[55] la_data_out[56] la_data_out[57] la_data_out[58] la_data_out[59]
++ la_data_out[5] la_data_out[60] la_data_out[61] la_data_out[62] la_data_out[63] la_data_out[64]
++ la_data_out[65] la_data_out[66] la_data_out[67] la_data_out[68] la_data_out[69]
++ la_data_out[6] la_data_out[70] la_data_out[71] la_data_out[72] la_data_out[73] la_data_out[74]
++ la_data_out[75] la_data_out[76] la_data_out[77] la_data_out[78] la_data_out[79]
++ la_data_out[7] la_data_out[80] la_data_out[81] la_data_out[82] la_data_out[83] la_data_out[84]
++ la_data_out[85] la_data_out[86] la_data_out[87] la_data_out[88] la_data_out[89]
++ la_data_out[8] la_data_out[90] la_data_out[91] la_data_out[92] la_data_out[93] la_data_out[94]
++ la_data_out[95] la_data_out[96] la_data_out[97] la_data_out[98] la_data_out[99]
++ la_data_out[9] la_oenb[0] la_oenb[100] la_oenb[101] la_oenb[102] la_oenb[103] la_oenb[104]
++ la_oenb[105] la_oenb[106] la_oenb[107] la_oenb[108] la_oenb[109] la_oenb[10] la_oenb[110]
++ la_oenb[111] la_oenb[112] la_oenb[113] la_oenb[114] la_oenb[115] la_oenb[116] la_oenb[117]
++ la_oenb[118] la_oenb[119] la_oenb[11] la_oenb[120] la_oenb[121] la_oenb[122] la_oenb[123]
++ la_oenb[124] la_oenb[125] la_oenb[126] la_oenb[127] la_oenb[12] la_oenb[13] la_oenb[14]
++ la_oenb[15] la_oenb[16] la_oenb[17] la_oenb[18] la_oenb[19] la_oenb[1] la_oenb[20]
++ la_oenb[21] la_oenb[22] la_oenb[23] la_oenb[24] la_oenb[25] la_oenb[26] la_oenb[27]
++ la_oenb[28] la_oenb[29] la_oenb[2] la_oenb[30] la_oenb[31] la_oenb[32] la_oenb[33]
++ la_oenb[34] la_oenb[35] la_oenb[36] la_oenb[37] la_oenb[38] la_oenb[39] la_oenb[3]
++ la_oenb[40] la_oenb[41] la_oenb[42] la_oenb[43] la_oenb[44] la_oenb[45] la_oenb[46]
++ la_oenb[47] la_oenb[48] la_oenb[49] la_oenb[4] la_oenb[50] la_oenb[51] la_oenb[52]
++ la_oenb[53] la_oenb[54] la_oenb[55] la_oenb[56] la_oenb[57] la_oenb[58] la_oenb[59]
++ la_oenb[5] la_oenb[60] la_oenb[61] la_oenb[62] la_oenb[63] la_oenb[64] la_oenb[65]
++ la_oenb[66] la_oenb[67] la_oenb[68] la_oenb[69] la_oenb[6] la_oenb[70] la_oenb[71]
++ la_oenb[72] la_oenb[73] la_oenb[74] la_oenb[75] la_oenb[76] la_oenb[77] la_oenb[78]
++ la_oenb[79] la_oenb[7] la_oenb[80] la_oenb[81] la_oenb[82] la_oenb[83] la_oenb[84]
++ la_oenb[85] la_oenb[86] la_oenb[87] la_oenb[88] la_oenb[89] la_oenb[8] la_oenb[90]
++ la_oenb[91] la_oenb[92] la_oenb[93] la_oenb[94] la_oenb[95] la_oenb[96] la_oenb[97]
++ la_oenb[98] la_oenb[99] la_oenb[9] core0/data_from_mem[0] core0/data_from_mem[100]
++ core0/data_from_mem[101] core0/data_from_mem[102] core0/data_from_mem[103] core0/data_from_mem[104]
++ core0/data_from_mem[105] core0/data_from_mem[106] core0/data_from_mem[107] core0/data_from_mem[108]
++ core0/data_from_mem[109] core0/data_from_mem[10] core0/data_from_mem[110] core0/data_from_mem[111]
++ core0/data_from_mem[112] core0/data_from_mem[113] core0/data_from_mem[114] core0/data_from_mem[115]
++ core0/data_from_mem[116] core0/data_from_mem[117] core0/data_from_mem[118] core0/data_from_mem[119]
++ core0/data_from_mem[11] core0/data_from_mem[120] core0/data_from_mem[121] core0/data_from_mem[122]
++ core0/data_from_mem[123] core0/data_from_mem[124] core0/data_from_mem[125] core0/data_from_mem[126]
++ core0/data_from_mem[127] core0/data_from_mem[12] core0/data_from_mem[13] core0/data_from_mem[14]
++ core0/data_from_mem[15] core0/data_from_mem[16] core0/data_from_mem[17] core0/data_from_mem[18]
++ core0/data_from_mem[19] core0/data_from_mem[1] core0/data_from_mem[20] core0/data_from_mem[21]
++ core0/data_from_mem[22] core0/data_from_mem[23] core0/data_from_mem[24] core0/data_from_mem[25]
++ core0/data_from_mem[26] core0/data_from_mem[27] core0/data_from_mem[28] core0/data_from_mem[29]
++ core0/data_from_mem[2] core0/data_from_mem[30] core0/data_from_mem[31] core0/data_from_mem[32]
++ core0/data_from_mem[33] core0/data_from_mem[34] core0/data_from_mem[35] core0/data_from_mem[36]
++ core0/data_from_mem[37] core0/data_from_mem[38] core0/data_from_mem[39] core0/data_from_mem[3]
++ core0/data_from_mem[40] core0/data_from_mem[41] core0/data_from_mem[42] core0/data_from_mem[43]
++ core0/data_from_mem[44] core0/data_from_mem[45] core0/data_from_mem[46] core0/data_from_mem[47]
++ core0/data_from_mem[48] core0/data_from_mem[49] core0/data_from_mem[4] core0/data_from_mem[50]
++ core0/data_from_mem[51] core0/data_from_mem[52] core0/data_from_mem[53] core0/data_from_mem[54]
++ core0/data_from_mem[55] core0/data_from_mem[56] core0/data_from_mem[57] core0/data_from_mem[58]
++ core0/data_from_mem[59] core0/data_from_mem[5] core0/data_from_mem[60] core0/data_from_mem[61]
++ core0/data_from_mem[62] core0/data_from_mem[63] core0/data_from_mem[64] core0/data_from_mem[65]
++ core0/data_from_mem[66] core0/data_from_mem[67] core0/data_from_mem[68] core0/data_from_mem[69]
++ core0/data_from_mem[6] core0/data_from_mem[70] core0/data_from_mem[71] core0/data_from_mem[72]
++ core0/data_from_mem[73] core0/data_from_mem[74] core0/data_from_mem[75] core0/data_from_mem[76]
++ core0/data_from_mem[77] core0/data_from_mem[78] core0/data_from_mem[79] core0/data_from_mem[7]
++ core0/data_from_mem[80] core0/data_from_mem[81] core0/data_from_mem[82] core0/data_from_mem[83]
++ core0/data_from_mem[84] core0/data_from_mem[85] core0/data_from_mem[86] core0/data_from_mem[87]
++ core0/data_from_mem[88] core0/data_from_mem[89] core0/data_from_mem[8] core0/data_from_mem[90]
++ core0/data_from_mem[91] core0/data_from_mem[92] core0/data_from_mem[93] core0/data_from_mem[94]
++ core0/data_from_mem[95] core0/data_from_mem[96] core0/data_from_mem[97] core0/data_from_mem[98]
++ core0/data_from_mem[99] core0/data_from_mem[9] chip_controller/read_enable_to_Elpis
++ core0/read_interactive_req chip_controller/read_value_to_Elpis[0] chip_controller/read_value_to_Elpis[10]
++ chip_controller/read_value_to_Elpis[11] chip_controller/read_value_to_Elpis[12]
++ chip_controller/read_value_to_Elpis[13] chip_controller/read_value_to_Elpis[14]
++ chip_controller/read_value_to_Elpis[15] chip_controller/read_value_to_Elpis[16]
++ chip_controller/read_value_to_Elpis[17] chip_controller/read_value_to_Elpis[18]
++ chip_controller/read_value_to_Elpis[19] chip_controller/read_value_to_Elpis[1] chip_controller/read_value_to_Elpis[20]
++ chip_controller/read_value_to_Elpis[21] chip_controller/read_value_to_Elpis[22]
++ chip_controller/read_value_to_Elpis[23] chip_controller/read_value_to_Elpis[24]
++ chip_controller/read_value_to_Elpis[25] chip_controller/read_value_to_Elpis[26]
++ chip_controller/read_value_to_Elpis[27] chip_controller/read_value_to_Elpis[28]
++ chip_controller/read_value_to_Elpis[29] chip_controller/read_value_to_Elpis[2] chip_controller/read_value_to_Elpis[30]
++ chip_controller/read_value_to_Elpis[31] chip_controller/read_value_to_Elpis[3] chip_controller/read_value_to_Elpis[4]
++ chip_controller/read_value_to_Elpis[5] chip_controller/read_value_to_Elpis[6] chip_controller/read_value_to_Elpis[7]
++ chip_controller/read_value_to_Elpis[8] chip_controller/read_value_to_Elpis[9] core0/is_mem_ready
++ core0/hex_req core0/is_mem_req core0/rst core0/is_mem_req_reset chip_controller/rst
++ custom_sram/spare_wen0_to_sram vccd1 vssd1 wb_clk_i wb_rst_i wbs_dat_o[0] wbs_dat_o[10]
++ wbs_dat_o[11] wbs_dat_o[12] wbs_dat_o[13] wbs_dat_o[14] wbs_dat_o[15] wbs_dat_o[16]
++ wbs_dat_o[17] wbs_dat_o[18] wbs_dat_o[19] wbs_dat_o[1] wbs_dat_o[20] wbs_dat_o[21]
++ wbs_dat_o[22] wbs_dat_o[23] wbs_dat_o[24] wbs_dat_o[25] wbs_dat_o[26] wbs_dat_o[27]
++ wbs_dat_o[28] wbs_dat_o[29] wbs_dat_o[2] wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3]
++ wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6] wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] core0/is_memory_we
++ custom_sram/we core0/mem_data_out[0] core0/mem_data_out[100] core0/mem_data_out[101]
++ core0/mem_data_out[102] core0/mem_data_out[103] core0/mem_data_out[104] core0/mem_data_out[105]
++ core0/mem_data_out[106] core0/mem_data_out[107] core0/mem_data_out[108] core0/mem_data_out[109]
++ core0/mem_data_out[10] core0/mem_data_out[110] core0/mem_data_out[111] core0/mem_data_out[112]
++ core0/mem_data_out[113] core0/mem_data_out[114] core0/mem_data_out[115] core0/mem_data_out[116]
++ core0/mem_data_out[117] core0/mem_data_out[118] core0/mem_data_out[119] core0/mem_data_out[11]
++ core0/mem_data_out[120] core0/mem_data_out[121] core0/mem_data_out[122] core0/mem_data_out[123]
++ core0/mem_data_out[124] core0/mem_data_out[125] core0/mem_data_out[126] core0/mem_data_out[127]
++ core0/mem_data_out[12] core0/mem_data_out[13] core0/mem_data_out[14] core0/mem_data_out[15]
++ core0/mem_data_out[16] core0/mem_data_out[17] core0/mem_data_out[18] core0/mem_data_out[19]
++ core0/mem_data_out[1] core0/mem_data_out[20] core0/mem_data_out[21] core0/mem_data_out[22]
++ core0/mem_data_out[23] core0/mem_data_out[24] core0/mem_data_out[25] core0/mem_data_out[26]
++ core0/mem_data_out[27] core0/mem_data_out[28] core0/mem_data_out[29] core0/mem_data_out[2]
++ core0/mem_data_out[30] core0/mem_data_out[31] core0/mem_data_out[32] core0/mem_data_out[33]
++ core0/mem_data_out[34] core0/mem_data_out[35] core0/mem_data_out[36] core0/mem_data_out[37]
++ core0/mem_data_out[38] core0/mem_data_out[39] core0/mem_data_out[3] core0/mem_data_out[40]
++ core0/mem_data_out[41] core0/mem_data_out[42] core0/mem_data_out[43] core0/mem_data_out[44]
++ core0/mem_data_out[45] core0/mem_data_out[46] core0/mem_data_out[47] core0/mem_data_out[48]
++ core0/mem_data_out[49] core0/mem_data_out[4] core0/mem_data_out[50] core0/mem_data_out[51]
++ core0/mem_data_out[52] core0/mem_data_out[53] core0/mem_data_out[54] core0/mem_data_out[55]
++ core0/mem_data_out[56] core0/mem_data_out[57] core0/mem_data_out[58] core0/mem_data_out[59]
++ core0/mem_data_out[5] core0/mem_data_out[60] core0/mem_data_out[61] core0/mem_data_out[62]
++ core0/mem_data_out[63] core0/mem_data_out[64] core0/mem_data_out[65] core0/mem_data_out[66]
++ core0/mem_data_out[67] core0/mem_data_out[68] core0/mem_data_out[69] core0/mem_data_out[6]
++ core0/mem_data_out[70] core0/mem_data_out[71] core0/mem_data_out[72] core0/mem_data_out[73]
++ core0/mem_data_out[74] core0/mem_data_out[75] core0/mem_data_out[76] core0/mem_data_out[77]
++ core0/mem_data_out[78] core0/mem_data_out[79] core0/mem_data_out[7] core0/mem_data_out[80]
++ core0/mem_data_out[81] core0/mem_data_out[82] core0/mem_data_out[83] core0/mem_data_out[84]
++ core0/mem_data_out[85] core0/mem_data_out[86] core0/mem_data_out[87] core0/mem_data_out[88]
++ core0/mem_data_out[89] core0/mem_data_out[8] core0/mem_data_out[90] core0/mem_data_out[91]
++ core0/mem_data_out[92] core0/mem_data_out[93] core0/mem_data_out[94] core0/mem_data_out[95]
++ core0/mem_data_out[96] core0/mem_data_out[97] core0/mem_data_out[98] core0/mem_data_out[99]
++ core0/mem_data_out[9] chip_controller
+Xcore0 core0/clk core0/data_from_mem[0] core0/data_from_mem[100] core0/data_from_mem[101]
++ core0/data_from_mem[102] core0/data_from_mem[103] core0/data_from_mem[104] core0/data_from_mem[105]
++ core0/data_from_mem[106] core0/data_from_mem[107] core0/data_from_mem[108] core0/data_from_mem[109]
++ core0/data_from_mem[10] core0/data_from_mem[110] core0/data_from_mem[111] core0/data_from_mem[112]
++ core0/data_from_mem[113] core0/data_from_mem[114] core0/data_from_mem[115] core0/data_from_mem[116]
++ core0/data_from_mem[117] core0/data_from_mem[118] core0/data_from_mem[119] core0/data_from_mem[11]
++ core0/data_from_mem[120] core0/data_from_mem[121] core0/data_from_mem[122] core0/data_from_mem[123]
++ core0/data_from_mem[124] core0/data_from_mem[125] core0/data_from_mem[126] core0/data_from_mem[127]
++ core0/data_from_mem[12] core0/data_from_mem[13] core0/data_from_mem[14] core0/data_from_mem[15]
++ core0/data_from_mem[16] core0/data_from_mem[17] core0/data_from_mem[18] core0/data_from_mem[19]
++ core0/data_from_mem[1] core0/data_from_mem[20] core0/data_from_mem[21] core0/data_from_mem[22]
++ core0/data_from_mem[23] core0/data_from_mem[24] core0/data_from_mem[25] core0/data_from_mem[26]
++ core0/data_from_mem[27] core0/data_from_mem[28] core0/data_from_mem[29] core0/data_from_mem[2]
++ core0/data_from_mem[30] core0/data_from_mem[31] core0/data_from_mem[32] core0/data_from_mem[33]
++ core0/data_from_mem[34] core0/data_from_mem[35] core0/data_from_mem[36] core0/data_from_mem[37]
++ core0/data_from_mem[38] core0/data_from_mem[39] core0/data_from_mem[3] core0/data_from_mem[40]
++ core0/data_from_mem[41] core0/data_from_mem[42] core0/data_from_mem[43] core0/data_from_mem[44]
++ core0/data_from_mem[45] core0/data_from_mem[46] core0/data_from_mem[47] core0/data_from_mem[48]
++ core0/data_from_mem[49] core0/data_from_mem[4] core0/data_from_mem[50] core0/data_from_mem[51]
++ core0/data_from_mem[52] core0/data_from_mem[53] core0/data_from_mem[54] core0/data_from_mem[55]
++ core0/data_from_mem[56] core0/data_from_mem[57] core0/data_from_mem[58] core0/data_from_mem[59]
++ core0/data_from_mem[5] core0/data_from_mem[60] core0/data_from_mem[61] core0/data_from_mem[62]
++ core0/data_from_mem[63] core0/data_from_mem[64] core0/data_from_mem[65] core0/data_from_mem[66]
++ core0/data_from_mem[67] core0/data_from_mem[68] core0/data_from_mem[69] core0/data_from_mem[6]
++ core0/data_from_mem[70] core0/data_from_mem[71] core0/data_from_mem[72] core0/data_from_mem[73]
++ core0/data_from_mem[74] core0/data_from_mem[75] core0/data_from_mem[76] core0/data_from_mem[77]
++ core0/data_from_mem[78] core0/data_from_mem[79] core0/data_from_mem[7] core0/data_from_mem[80]
++ core0/data_from_mem[81] core0/data_from_mem[82] core0/data_from_mem[83] core0/data_from_mem[84]
++ core0/data_from_mem[85] core0/data_from_mem[86] core0/data_from_mem[87] core0/data_from_mem[88]
++ core0/data_from_mem[89] core0/data_from_mem[8] core0/data_from_mem[90] core0/data_from_mem[91]
++ core0/data_from_mem[92] core0/data_from_mem[93] core0/data_from_mem[94] core0/data_from_mem[95]
++ core0/data_from_mem[96] core0/data_from_mem[97] core0/data_from_mem[98] core0/data_from_mem[99]
++ core0/data_from_mem[9] core0/hex_out[0] core0/hex_out[10] core0/hex_out[11] core0/hex_out[12]
++ core0/hex_out[13] core0/hex_out[14] core0/hex_out[15] core0/hex_out[16] core0/hex_out[17]
++ core0/hex_out[18] core0/hex_out[19] core0/hex_out[1] core0/hex_out[20] core0/hex_out[21]
++ core0/hex_out[22] core0/hex_out[23] core0/hex_out[24] core0/hex_out[25] core0/hex_out[26]
++ core0/hex_out[27] core0/hex_out[28] core0/hex_out[29] core0/hex_out[2] core0/hex_out[30]
++ core0/hex_out[31] core0/hex_out[3] core0/hex_out[4] core0/hex_out[5] core0/hex_out[6]
++ core0/hex_out[7] core0/hex_out[8] core0/hex_out[9] core0/hex_req core0/is_mem_ready
++ core0/is_mem_req core0/is_mem_req_reset core0/is_memory_we core0/is_print_done core0/mem_addr_out[0]
++ core0/mem_addr_out[10] core0/mem_addr_out[11] core0/mem_addr_out[12] core0/mem_addr_out[13]
++ core0/mem_addr_out[14] core0/mem_addr_out[15] core0/mem_addr_out[16] core0/mem_addr_out[17]
++ core0/mem_addr_out[18] core0/mem_addr_out[19] core0/mem_addr_out[1] core0/mem_addr_out[2]
++ core0/mem_addr_out[3] core0/mem_addr_out[4] core0/mem_addr_out[5] core0/mem_addr_out[6]
++ core0/mem_addr_out[7] core0/mem_addr_out[8] core0/mem_addr_out[9] core0/mem_data_out[0]
++ core0/mem_data_out[100] core0/mem_data_out[101] core0/mem_data_out[102] core0/mem_data_out[103]
++ core0/mem_data_out[104] core0/mem_data_out[105] core0/mem_data_out[106] core0/mem_data_out[107]
++ core0/mem_data_out[108] core0/mem_data_out[109] core0/mem_data_out[10] core0/mem_data_out[110]
++ core0/mem_data_out[111] core0/mem_data_out[112] core0/mem_data_out[113] core0/mem_data_out[114]
++ core0/mem_data_out[115] core0/mem_data_out[116] core0/mem_data_out[117] core0/mem_data_out[118]
++ core0/mem_data_out[119] core0/mem_data_out[11] core0/mem_data_out[120] core0/mem_data_out[121]
++ core0/mem_data_out[122] core0/mem_data_out[123] core0/mem_data_out[124] core0/mem_data_out[125]
++ core0/mem_data_out[126] core0/mem_data_out[127] core0/mem_data_out[12] core0/mem_data_out[13]
++ core0/mem_data_out[14] core0/mem_data_out[15] core0/mem_data_out[16] core0/mem_data_out[17]
++ core0/mem_data_out[18] core0/mem_data_out[19] core0/mem_data_out[1] core0/mem_data_out[20]
++ core0/mem_data_out[21] core0/mem_data_out[22] core0/mem_data_out[23] core0/mem_data_out[24]
++ core0/mem_data_out[25] core0/mem_data_out[26] core0/mem_data_out[27] core0/mem_data_out[28]
++ core0/mem_data_out[29] core0/mem_data_out[2] core0/mem_data_out[30] core0/mem_data_out[31]
++ core0/mem_data_out[32] core0/mem_data_out[33] core0/mem_data_out[34] core0/mem_data_out[35]
++ core0/mem_data_out[36] core0/mem_data_out[37] core0/mem_data_out[38] core0/mem_data_out[39]
++ core0/mem_data_out[3] core0/mem_data_out[40] core0/mem_data_out[41] core0/mem_data_out[42]
++ core0/mem_data_out[43] core0/mem_data_out[44] core0/mem_data_out[45] core0/mem_data_out[46]
++ core0/mem_data_out[47] core0/mem_data_out[48] core0/mem_data_out[49] core0/mem_data_out[4]
++ core0/mem_data_out[50] core0/mem_data_out[51] core0/mem_data_out[52] core0/mem_data_out[53]
++ core0/mem_data_out[54] core0/mem_data_out[55] core0/mem_data_out[56] core0/mem_data_out[57]
++ core0/mem_data_out[58] core0/mem_data_out[59] core0/mem_data_out[5] core0/mem_data_out[60]
++ core0/mem_data_out[61] core0/mem_data_out[62] core0/mem_data_out[63] core0/mem_data_out[64]
++ core0/mem_data_out[65] core0/mem_data_out[66] core0/mem_data_out[67] core0/mem_data_out[68]
++ core0/mem_data_out[69] core0/mem_data_out[6] core0/mem_data_out[70] core0/mem_data_out[71]
++ core0/mem_data_out[72] core0/mem_data_out[73] core0/mem_data_out[74] core0/mem_data_out[75]
++ core0/mem_data_out[76] core0/mem_data_out[77] core0/mem_data_out[78] core0/mem_data_out[79]
++ core0/mem_data_out[7] core0/mem_data_out[80] core0/mem_data_out[81] core0/mem_data_out[82]
++ core0/mem_data_out[83] core0/mem_data_out[84] core0/mem_data_out[85] core0/mem_data_out[86]
++ core0/mem_data_out[87] core0/mem_data_out[88] core0/mem_data_out[89] core0/mem_data_out[8]
++ core0/mem_data_out[90] core0/mem_data_out[91] core0/mem_data_out[92] core0/mem_data_out[93]
++ core0/mem_data_out[94] core0/mem_data_out[95] core0/mem_data_out[96] core0/mem_data_out[97]
++ core0/mem_data_out[98] core0/mem_data_out[99] core0/mem_data_out[9] core0/read_interactive_ready
++ core0/read_interactive_req core0/read_interactive_value[0] core0/read_interactive_value[10]
++ core0/read_interactive_value[11] core0/read_interactive_value[12] core0/read_interactive_value[13]
++ core0/read_interactive_value[14] core0/read_interactive_value[15] core0/read_interactive_value[16]
++ core0/read_interactive_value[17] core0/read_interactive_value[18] core0/read_interactive_value[19]
++ core0/read_interactive_value[1] core0/read_interactive_value[20] core0/read_interactive_value[21]
++ core0/read_interactive_value[22] core0/read_interactive_value[23] core0/read_interactive_value[24]
++ core0/read_interactive_value[25] core0/read_interactive_value[26] core0/read_interactive_value[27]
++ core0/read_interactive_value[28] core0/read_interactive_value[29] core0/read_interactive_value[2]
++ core0/read_interactive_value[30] core0/read_interactive_value[31] core0/read_interactive_value[3]
++ core0/read_interactive_value[4] core0/read_interactive_value[5] core0/read_interactive_value[6]
++ core0/read_interactive_value[7] core0/read_interactive_value[8] core0/read_interactive_value[9]
++ core0/rst vccd1 vssd1 core
Xcustom_sram custom_sram/a[0] custom_sram/a[10] custom_sram/a[11] custom_sram/a[12]
+ custom_sram/a[13] custom_sram/a[14] custom_sram/a[15] custom_sram/a[16] custom_sram/a[17]
+ custom_sram/a[18] custom_sram/a[19] custom_sram/a[1] custom_sram/a[2] custom_sram/a[3]
+ custom_sram/a[4] custom_sram/a[5] custom_sram/a[6] custom_sram/a[7] custom_sram/a[8]
-+ custom_sram/a[9] custom_sram/clk custom_sram/csb0_to_sram custom_sram/d[0] custom_sram/d[10]
++ custom_sram/a[9] core0/clk custom_sram/csb0_to_sram custom_sram/d[0] custom_sram/d[10]
+ custom_sram/d[11] custom_sram/d[12] custom_sram/d[13] custom_sram/d[14] custom_sram/d[15]
+ custom_sram/d[16] custom_sram/d[17] custom_sram/d[18] custom_sram/d[19] custom_sram/d[1]
+ custom_sram/d[20] custom_sram/d[21] custom_sram/d[22] custom_sram/d[23] custom_sram/d[24]
diff --git a/verilog/gl/user_project_wrapper.v b/verilog/gl/user_project_wrapper.v
index f7b97e5..383fce5 100644
--- a/verilog/gl/user_project_wrapper.v
+++ b/verilog/gl/user_project_wrapper.v
@@ -1522,6 +1522,358 @@
\core0_to_mem_data[2] ,
\core0_to_mem_data[1] ,
\core0_to_mem_data[0] }));
+ core core0 (.clk(clk),
+ .hex_req(req_out_core0),
+ .is_mem_ready(is_mem_ready),
+ .is_mem_req(is_mem_req),
+ .is_mem_req_reset(core0_need_reset_mem_req),
+ .is_memory_we(core0_is_mem_we),
+ .is_print_done(is_ready_print_core0),
+ .read_interactive_ready(is_ready_dataout_core0),
+ .read_interactive_req(read_interactive_req_core0),
+ .rst(reset_core),
+ .vccd1(vccd1),
+ .vssd1(vssd1),
+ .data_from_mem({\read_data_from_mem[127] ,
+ \read_data_from_mem[126] ,
+ \read_data_from_mem[125] ,
+ \read_data_from_mem[124] ,
+ \read_data_from_mem[123] ,
+ \read_data_from_mem[122] ,
+ \read_data_from_mem[121] ,
+ \read_data_from_mem[120] ,
+ \read_data_from_mem[119] ,
+ \read_data_from_mem[118] ,
+ \read_data_from_mem[117] ,
+ \read_data_from_mem[116] ,
+ \read_data_from_mem[115] ,
+ \read_data_from_mem[114] ,
+ \read_data_from_mem[113] ,
+ \read_data_from_mem[112] ,
+ \read_data_from_mem[111] ,
+ \read_data_from_mem[110] ,
+ \read_data_from_mem[109] ,
+ \read_data_from_mem[108] ,
+ \read_data_from_mem[107] ,
+ \read_data_from_mem[106] ,
+ \read_data_from_mem[105] ,
+ \read_data_from_mem[104] ,
+ \read_data_from_mem[103] ,
+ \read_data_from_mem[102] ,
+ \read_data_from_mem[101] ,
+ \read_data_from_mem[100] ,
+ \read_data_from_mem[99] ,
+ \read_data_from_mem[98] ,
+ \read_data_from_mem[97] ,
+ \read_data_from_mem[96] ,
+ \read_data_from_mem[95] ,
+ \read_data_from_mem[94] ,
+ \read_data_from_mem[93] ,
+ \read_data_from_mem[92] ,
+ \read_data_from_mem[91] ,
+ \read_data_from_mem[90] ,
+ \read_data_from_mem[89] ,
+ \read_data_from_mem[88] ,
+ \read_data_from_mem[87] ,
+ \read_data_from_mem[86] ,
+ \read_data_from_mem[85] ,
+ \read_data_from_mem[84] ,
+ \read_data_from_mem[83] ,
+ \read_data_from_mem[82] ,
+ \read_data_from_mem[81] ,
+ \read_data_from_mem[80] ,
+ \read_data_from_mem[79] ,
+ \read_data_from_mem[78] ,
+ \read_data_from_mem[77] ,
+ \read_data_from_mem[76] ,
+ \read_data_from_mem[75] ,
+ \read_data_from_mem[74] ,
+ \read_data_from_mem[73] ,
+ \read_data_from_mem[72] ,
+ \read_data_from_mem[71] ,
+ \read_data_from_mem[70] ,
+ \read_data_from_mem[69] ,
+ \read_data_from_mem[68] ,
+ \read_data_from_mem[67] ,
+ \read_data_from_mem[66] ,
+ \read_data_from_mem[65] ,
+ \read_data_from_mem[64] ,
+ \read_data_from_mem[63] ,
+ \read_data_from_mem[62] ,
+ \read_data_from_mem[61] ,
+ \read_data_from_mem[60] ,
+ \read_data_from_mem[59] ,
+ \read_data_from_mem[58] ,
+ \read_data_from_mem[57] ,
+ \read_data_from_mem[56] ,
+ \read_data_from_mem[55] ,
+ \read_data_from_mem[54] ,
+ \read_data_from_mem[53] ,
+ \read_data_from_mem[52] ,
+ \read_data_from_mem[51] ,
+ \read_data_from_mem[50] ,
+ \read_data_from_mem[49] ,
+ \read_data_from_mem[48] ,
+ \read_data_from_mem[47] ,
+ \read_data_from_mem[46] ,
+ \read_data_from_mem[45] ,
+ \read_data_from_mem[44] ,
+ \read_data_from_mem[43] ,
+ \read_data_from_mem[42] ,
+ \read_data_from_mem[41] ,
+ \read_data_from_mem[40] ,
+ \read_data_from_mem[39] ,
+ \read_data_from_mem[38] ,
+ \read_data_from_mem[37] ,
+ \read_data_from_mem[36] ,
+ \read_data_from_mem[35] ,
+ \read_data_from_mem[34] ,
+ \read_data_from_mem[33] ,
+ \read_data_from_mem[32] ,
+ \read_data_from_mem[31] ,
+ \read_data_from_mem[30] ,
+ \read_data_from_mem[29] ,
+ \read_data_from_mem[28] ,
+ \read_data_from_mem[27] ,
+ \read_data_from_mem[26] ,
+ \read_data_from_mem[25] ,
+ \read_data_from_mem[24] ,
+ \read_data_from_mem[23] ,
+ \read_data_from_mem[22] ,
+ \read_data_from_mem[21] ,
+ \read_data_from_mem[20] ,
+ \read_data_from_mem[19] ,
+ \read_data_from_mem[18] ,
+ \read_data_from_mem[17] ,
+ \read_data_from_mem[16] ,
+ \read_data_from_mem[15] ,
+ \read_data_from_mem[14] ,
+ \read_data_from_mem[13] ,
+ \read_data_from_mem[12] ,
+ \read_data_from_mem[11] ,
+ \read_data_from_mem[10] ,
+ \read_data_from_mem[9] ,
+ \read_data_from_mem[8] ,
+ \read_data_from_mem[7] ,
+ \read_data_from_mem[6] ,
+ \read_data_from_mem[5] ,
+ \read_data_from_mem[4] ,
+ \read_data_from_mem[3] ,
+ \read_data_from_mem[2] ,
+ \read_data_from_mem[1] ,
+ \read_data_from_mem[0] }),
+ .hex_out({\core0_data_print[31] ,
+ \core0_data_print[30] ,
+ \core0_data_print[29] ,
+ \core0_data_print[28] ,
+ \core0_data_print[27] ,
+ \core0_data_print[26] ,
+ \core0_data_print[25] ,
+ \core0_data_print[24] ,
+ \core0_data_print[23] ,
+ \core0_data_print[22] ,
+ \core0_data_print[21] ,
+ \core0_data_print[20] ,
+ \core0_data_print[19] ,
+ \core0_data_print[18] ,
+ \core0_data_print[17] ,
+ \core0_data_print[16] ,
+ \core0_data_print[15] ,
+ \core0_data_print[14] ,
+ \core0_data_print[13] ,
+ \core0_data_print[12] ,
+ \core0_data_print[11] ,
+ \core0_data_print[10] ,
+ \core0_data_print[9] ,
+ \core0_data_print[8] ,
+ \core0_data_print[7] ,
+ \core0_data_print[6] ,
+ \core0_data_print[5] ,
+ \core0_data_print[4] ,
+ \core0_data_print[3] ,
+ \core0_data_print[2] ,
+ \core0_data_print[1] ,
+ \core0_data_print[0] }),
+ .mem_addr_out({\core0_to_mem_address[19] ,
+ \core0_to_mem_address[18] ,
+ \core0_to_mem_address[17] ,
+ \core0_to_mem_address[16] ,
+ \core0_to_mem_address[15] ,
+ \core0_to_mem_address[14] ,
+ \core0_to_mem_address[13] ,
+ \core0_to_mem_address[12] ,
+ \core0_to_mem_address[11] ,
+ \core0_to_mem_address[10] ,
+ \core0_to_mem_address[9] ,
+ \core0_to_mem_address[8] ,
+ \core0_to_mem_address[7] ,
+ \core0_to_mem_address[6] ,
+ \core0_to_mem_address[5] ,
+ \core0_to_mem_address[4] ,
+ \core0_to_mem_address[3] ,
+ \core0_to_mem_address[2] ,
+ \core0_to_mem_address[1] ,
+ \core0_to_mem_address[0] }),
+ .mem_data_out({\core0_to_mem_data[127] ,
+ \core0_to_mem_data[126] ,
+ \core0_to_mem_data[125] ,
+ \core0_to_mem_data[124] ,
+ \core0_to_mem_data[123] ,
+ \core0_to_mem_data[122] ,
+ \core0_to_mem_data[121] ,
+ \core0_to_mem_data[120] ,
+ \core0_to_mem_data[119] ,
+ \core0_to_mem_data[118] ,
+ \core0_to_mem_data[117] ,
+ \core0_to_mem_data[116] ,
+ \core0_to_mem_data[115] ,
+ \core0_to_mem_data[114] ,
+ \core0_to_mem_data[113] ,
+ \core0_to_mem_data[112] ,
+ \core0_to_mem_data[111] ,
+ \core0_to_mem_data[110] ,
+ \core0_to_mem_data[109] ,
+ \core0_to_mem_data[108] ,
+ \core0_to_mem_data[107] ,
+ \core0_to_mem_data[106] ,
+ \core0_to_mem_data[105] ,
+ \core0_to_mem_data[104] ,
+ \core0_to_mem_data[103] ,
+ \core0_to_mem_data[102] ,
+ \core0_to_mem_data[101] ,
+ \core0_to_mem_data[100] ,
+ \core0_to_mem_data[99] ,
+ \core0_to_mem_data[98] ,
+ \core0_to_mem_data[97] ,
+ \core0_to_mem_data[96] ,
+ \core0_to_mem_data[95] ,
+ \core0_to_mem_data[94] ,
+ \core0_to_mem_data[93] ,
+ \core0_to_mem_data[92] ,
+ \core0_to_mem_data[91] ,
+ \core0_to_mem_data[90] ,
+ \core0_to_mem_data[89] ,
+ \core0_to_mem_data[88] ,
+ \core0_to_mem_data[87] ,
+ \core0_to_mem_data[86] ,
+ \core0_to_mem_data[85] ,
+ \core0_to_mem_data[84] ,
+ \core0_to_mem_data[83] ,
+ \core0_to_mem_data[82] ,
+ \core0_to_mem_data[81] ,
+ \core0_to_mem_data[80] ,
+ \core0_to_mem_data[79] ,
+ \core0_to_mem_data[78] ,
+ \core0_to_mem_data[77] ,
+ \core0_to_mem_data[76] ,
+ \core0_to_mem_data[75] ,
+ \core0_to_mem_data[74] ,
+ \core0_to_mem_data[73] ,
+ \core0_to_mem_data[72] ,
+ \core0_to_mem_data[71] ,
+ \core0_to_mem_data[70] ,
+ \core0_to_mem_data[69] ,
+ \core0_to_mem_data[68] ,
+ \core0_to_mem_data[67] ,
+ \core0_to_mem_data[66] ,
+ \core0_to_mem_data[65] ,
+ \core0_to_mem_data[64] ,
+ \core0_to_mem_data[63] ,
+ \core0_to_mem_data[62] ,
+ \core0_to_mem_data[61] ,
+ \core0_to_mem_data[60] ,
+ \core0_to_mem_data[59] ,
+ \core0_to_mem_data[58] ,
+ \core0_to_mem_data[57] ,
+ \core0_to_mem_data[56] ,
+ \core0_to_mem_data[55] ,
+ \core0_to_mem_data[54] ,
+ \core0_to_mem_data[53] ,
+ \core0_to_mem_data[52] ,
+ \core0_to_mem_data[51] ,
+ \core0_to_mem_data[50] ,
+ \core0_to_mem_data[49] ,
+ \core0_to_mem_data[48] ,
+ \core0_to_mem_data[47] ,
+ \core0_to_mem_data[46] ,
+ \core0_to_mem_data[45] ,
+ \core0_to_mem_data[44] ,
+ \core0_to_mem_data[43] ,
+ \core0_to_mem_data[42] ,
+ \core0_to_mem_data[41] ,
+ \core0_to_mem_data[40] ,
+ \core0_to_mem_data[39] ,
+ \core0_to_mem_data[38] ,
+ \core0_to_mem_data[37] ,
+ \core0_to_mem_data[36] ,
+ \core0_to_mem_data[35] ,
+ \core0_to_mem_data[34] ,
+ \core0_to_mem_data[33] ,
+ \core0_to_mem_data[32] ,
+ \core0_to_mem_data[31] ,
+ \core0_to_mem_data[30] ,
+ \core0_to_mem_data[29] ,
+ \core0_to_mem_data[28] ,
+ \core0_to_mem_data[27] ,
+ \core0_to_mem_data[26] ,
+ \core0_to_mem_data[25] ,
+ \core0_to_mem_data[24] ,
+ \core0_to_mem_data[23] ,
+ \core0_to_mem_data[22] ,
+ \core0_to_mem_data[21] ,
+ \core0_to_mem_data[20] ,
+ \core0_to_mem_data[19] ,
+ \core0_to_mem_data[18] ,
+ \core0_to_mem_data[17] ,
+ \core0_to_mem_data[16] ,
+ \core0_to_mem_data[15] ,
+ \core0_to_mem_data[14] ,
+ \core0_to_mem_data[13] ,
+ \core0_to_mem_data[12] ,
+ \core0_to_mem_data[11] ,
+ \core0_to_mem_data[10] ,
+ \core0_to_mem_data[9] ,
+ \core0_to_mem_data[8] ,
+ \core0_to_mem_data[7] ,
+ \core0_to_mem_data[6] ,
+ \core0_to_mem_data[5] ,
+ \core0_to_mem_data[4] ,
+ \core0_to_mem_data[3] ,
+ \core0_to_mem_data[2] ,
+ \core0_to_mem_data[1] ,
+ \core0_to_mem_data[0] }),
+ .read_interactive_value({\data_out_to_core[31] ,
+ \data_out_to_core[30] ,
+ \data_out_to_core[29] ,
+ \data_out_to_core[28] ,
+ \data_out_to_core[27] ,
+ \data_out_to_core[26] ,
+ \data_out_to_core[25] ,
+ \data_out_to_core[24] ,
+ \data_out_to_core[23] ,
+ \data_out_to_core[22] ,
+ \data_out_to_core[21] ,
+ \data_out_to_core[20] ,
+ \data_out_to_core[19] ,
+ \data_out_to_core[18] ,
+ \data_out_to_core[17] ,
+ \data_out_to_core[16] ,
+ \data_out_to_core[15] ,
+ \data_out_to_core[14] ,
+ \data_out_to_core[13] ,
+ \data_out_to_core[12] ,
+ \data_out_to_core[11] ,
+ \data_out_to_core[10] ,
+ \data_out_to_core[9] ,
+ \data_out_to_core[8] ,
+ \data_out_to_core[7] ,
+ \data_out_to_core[6] ,
+ \data_out_to_core[5] ,
+ \data_out_to_core[4] ,
+ \data_out_to_core[3] ,
+ \data_out_to_core[2] ,
+ \data_out_to_core[1] ,
+ \data_out_to_core[0] }));
custom_sram custom_sram (.clk(clk),
.csb0_to_sram(csb0_to_sram),
.spare_wen0_to_sram(spare_wen0_to_sram),
