commit: 0cde6c5b39b7cf1be44aa714ed6a263f2c1941ce
[log] [tgz]
author: Rodrigo Huerta <rodrigodenia@gmail.com>
Tue Nov 09 19:22:59 2021 +0100
committer: Rodrigo Huerta <rodrigodenia@gmail.com>
Tue Nov 09 19:22:59 2021 +0100
tree: 1fb1415b0f62d988551ac4b633839e27e41dc9f0
parent: f5cea6299b2aa25f9e1b079cd932eff533e17bb6 [diff]

Added pin_order.cfg to core, custom_sram and chip_controller. Glue together chip_controller, sram_wrapper, i_arbiter and o_arbiter. Fixed LVS errors executing user_project_wrapper

def/chip_controller.def[diff]
def/core.def[diff]
def/custom_sram.def[diff]
def/user_project_wrapper.def[diff]
lef/chip_controller.lef[diff]
lef/core.lef[diff]
lef/custom_sram.lef[diff]
lef/user_project_wrapper.lef[diff]
openlane/chip_controller/config.tcl[diff]
openlane/chip_controller/pin_order.cfg[Added - diff]
openlane/core/pin_order.cfg[diff]
openlane/custom_sram/config.tcl[diff]
openlane/custom_sram/pin_order.cfg[Added - diff]
openlane/user_project_wrapper/macro.cfg[diff]
signoff/chip_controller/final_summary_report.csv[diff]
signoff/core/final_summary_report.csv[diff]
signoff/custom_sram/final_summary_report.csv[diff]
signoff/user_project_wrapper/final_summary_report.csv[diff]
spi/lvs/chip_controller.spice[diff]
spi/lvs/core.spice[diff]
spi/lvs/custom_sram.spice[diff]
spi/lvs/user_project_wrapper.spice[diff]
verilog/dv/testBasicOps/testBasicOps.elf[diff]
verilog/gl/chip_controller.v[diff]
verilog/gl/core.v[diff]
verilog/gl/custom_sram.v[diff]
verilog/gl/user_project_wrapper.v[diff]
verilog/rtl/elpis/chip_controller.v[diff]
verilog/rtl/user_project_wrapper.v[diff]

29 files changed

tree: 1fb1415b0f62d988551ac4b633839e27e41dc9f0

.github/
def/
docs/
lef/
openlane/
signoff/
spi/
verilog/
caravel
.gitignore
.gitmodules
info.yaml
LICENSE
Makefile
README.md
workflow.sh

README.md

Caravel User Project

:exclamation: Important Note

Please fill in your project documentation in this README.md file

Refer to README for this sample project documentation.