| commit | 3f0e55298bcd5250d530bb89fcfff7b3472bbab2 | [log] [tgz] |
|---|---|---|
| author | Dhayalakumar <61288836+dhayalakumarm@users.noreply.github.com> | Wed Oct 20 23:15:49 2021 +0530 |
| committer | GitHub <noreply@github.com> | Wed Oct 20 23:15:49 2021 +0530 |
| tree | 5949d61385c1da7d028160eef329335174b9cb87 | |
| parent | 78f3fc1e9e2147e28dc00be7119762295acf7c77 [diff] |
Update README.md
This projects aims to design an high speed adder based on recursive doubling technique and fabricate at the SKY130nm technology node.
Inputs: in1, in2 each of 18 bits
Mode for add/sub selection
Output: Sum which is of 19 bits.