commit: 1912fb30ee745e59c89457f33f65863dc5720fed
[log]
author: Dhayalakumar <61288836+dhayalakumarm@users.noreply.github.com>
Wed Oct 20 12:29:00 2021 +0530
committer: GitHub <noreply@github.com>
Wed Oct 20 12:29:00 2021 +0530
tree: c6fa3f525f8056752c0deceb296abc561b193c7b
parent: 3cb34161d46cea8aa929698ba211fe3f1564dc2f [diff]

Add files via upload

Simulations/pre_synthesis/Screenshot (459).png[Added - diff]
Simulations/pre_synthesis/add.vcd[Added - diff]
Simulations/pre_synthesis/adder.v[Added - diff]
Simulations/pre_synthesis/adder_tb.v[Added - diff]

4 files changed

tree: c6fa3f525f8056752c0deceb296abc561b193c7b

README.md

Caravel User Project

18 bit Adder