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foss-eda-tools / third_party / shuttle / sky130 / mpw-003 / slot-019 / 75e41493a5d12e3dad7c81fa0fe7576e63a49a97
commit75e41493a5d12e3dad7c81fa0fe7576e63a49a97[log] [tgz]
authorH-S-S-11 <harry@snell.org.uk>Sun Oct 10 22:57:11 2021 +0100
committerH-S-S-11 <harry@snell.org.uk>Sun Oct 10 22:57:11 2021 +0100
tree766225551ce5e6894a994807e36e7380326a21b8
parent688d93dc93e950863282dc299804cbb94178fb26 [diff]
get verilog tb to run
2 files changed
tree: 766225551ce5e6894a994807e36e7380326a21b8
  1. .github/
  2. comparator/
  3. docs/
  4. example/
  5. gds/
  6. mag/
  7. netgen/
  8. old-comparator/
  9. openlane/
  10. signoff/
  11. verilog/
  12. xschem/
  13. caravel
  14. caravel-lite
  15. .gitignore
  16. .gitmodules
  17. .magicrc
  18. EXPORT_BEFORE_PRECHECK.txt
  19. info.yaml
  20. LICENSE
  21. Makefile
  22. README.md
README.md

Caravel Analog User

License CI Caravan Build

Mixed signal tests

Collection of analog and mixed signal test circuits.

Basic goal: a comparator based on the circuit in “CMOS Design” (Jacob Baker).

Extra goals:

  • A small array (eg 1x8) of Flash cells for characterisation
  • An alternative comparator layout using only self-biased amplifiers (no bias voltage required)
  • The digital section of delta-sigma ADC
  • Demo charge pump
  • Sample-and-hold circuit

Refer to README for the sample project documentation.