verify that 3v3 nfets are required
diff --git a/comparator/bsim4v5.out b/comparator/bsim4v5.out
index a16e39c..a120cc0 100644
--- a/comparator/bsim4v5.out
+++ b/comparator/bsim4v5.out
@@ -2,4 +2,4 @@
Developed by Xuemei (Jane) Xi, Mohan Dunga, Prof. Ali Niknejad and Prof. Chenming Hu in 2003.
++++++++++ BSIM4v5 PARAMETER CHECKING BELOW ++++++++++
-Model = xcomp.x0:sky130_fd_pr__nfet_g5v0d10v5__model.62
+Model = xcomp.x9:sky130_fd_pr__pfet_g5v0d10v5__model.55
diff --git a/comparator/comparator-decision.spice b/comparator/comparator-decision.spice
new file mode 100644
index 0000000..cdfc45b
--- /dev/null
+++ b/comparator/comparator-decision.spice
@@ -0,0 +1,36 @@
+* scale: 1e6 units = 1 micron
+
+.subckt comparator-decision VPAMP VNAMP VOP VON VGND VPWR
+
+* voltage to current
+* X0 VPWR VPAMP VOP VPWR sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+6u l=0.5e+6u
+* X1 VPWR VNAMP VON VPWR sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+6u l=0.5e+6u
+*
+* * decision feedback
+* X2 VOP VOP ISINK VGND sky130_fd_pr__nfet_03v3_nvt w=1e+6u l=0.6e+6u
+* X3 VOP VON ISINK VGND sky130_fd_pr__nfet_03v3_nvt w=1e+6u l=0.6e+6u
+*
+* X4 VON VOP ISINK VGND sky130_fd_pr__nfet_03v3_nvt w=1e+6u l=0.6e+6u
+* X5 VON VON ISINK VGND sky130_fd_pr__nfet_03v3_nvt w=1e+6u l=0.6e+6u
+*
+* * current sink
+* X6 ISINK ISINK VGND VGND sky130_fd_pr__nfet_03v3_nvt w=1e+6u l=0.6e+6u
+
+* extracted
+
+X2 VOP VPAMP VPWR VPWR sky130_fd_pr__pfet_g5v0d10v5 ad=0 pd=0 as=-0 ps=0 w=1.5e+06u l=500000u
+X3 VON VNAMP VPWR VPWR sky130_fd_pr__pfet_g5v0d10v5 ad=0 pd=0 as=-0 ps=0 w=1.5e+06u l=500000u
+X4 ISINK VOP VOP VGND sky130_fd_pr__nfet_03v3_nvt ad=-0 pd=0 as=0 ps=0 w=1e+06u l=600000u
+
+X6 ISINK VON VON VGND sky130_fd_pr__nfet_03v3_nvt ad=-0 pd=0 as=0 ps=0 w=1e+06u l=600000u
+X7 ISINK VOP VON VGND sky130_fd_pr__nfet_03v3_nvt ad=-0 pd=0 as=0 ps=0 w=1e+06u l=600000u
+X8 ISINK VON VOP VGND sky130_fd_pr__nfet_03v3_nvt ad=-0 pd=0 as=0 ps=0 w=1e+06u l=600000u
+
+X10 VGND ISINK ISINK VGND sky130_fd_pr__nfet_03v3_nvt ad=-0 pd=0 as=-0 ps=0 w=1e+06u l=600000u
+
+C0 VPWR VGND 6.67fF
+C1 ISINK VGND 2.29fF
+C2 VON VGND 2.41fF
+
+
+.ends
\ No newline at end of file
diff --git a/comparator/comparator-diffamp.spice b/comparator/comparator-diffamp.spice
new file mode 100644
index 0000000..07bc89f
--- /dev/null
+++ b/comparator/comparator-diffamp.spice
@@ -0,0 +1,46 @@
+* scale: 1e6 units = 1 micron
+
+* This is a 1.8V version: make sure expected inputs in range
+
+.subckt comparator-diffamp VOP VON VOUT VGND VPWR
+
+*load transistors
+* X0 VPWR VONAMP VOPAMP VPWR sky130_fd_pr__pfet_01v8 w=3e+06u l=0.18e+6u
+* X1 VPWR VONAMP VONAMP VPWR sky130_fd_pr__pfet_01v8 w=3e+06u l=0.18e+6u
+*
+* *diff pair
+* X2 VOPAMP VOP ISINK VGND sky130_fd_pr__nfet_01v8 w=1e+06u l=0.18e+6u
+* X3 VONAMP VON ISINK VGND sky130_fd_pr__nfet_01v8 w=1e+06u l=0.18e+6u
+*
+* * current source
+* X4 ISINK VONAMP VGND VGND sky130_fd_pr__nfet_01v8 w=1e+06u l=0.18e+6u
+*
+* *output inverter
+* X5 VPWR VOPAMP VOUT VPWR sky130_fd_pr__pfet_01v8 w=2e+06u l=0.15e+6u
+* X6 VOUT VOPAMP VGND VGND sky130_fd_pr__nfet_01v8 w=1e+06u l=0.15e+6u
+
+*extracted
+X0 VGND VGND VGND VGND sky130_fd_pr__nfet_01v8 ad=0 pd=0 as=0 ps=0 w=1e+06u l=180000u
+X1 VOPAMP VOP ISINK VGND sky130_fd_pr__nfet_01v8 ad=-0 pd=0 as=-0 ps=0 w=1e+06u l=180000u
+X2 VGND VGND VGND VGND sky130_fd_pr__nfet_01v8 ad=0 pd=0 as=0 ps=0 w=1e+06u l=180000u
+X3 VONAMP VON ISINK VGND sky130_fd_pr__nfet_01v8 ad=-0 pd=0 as=-0 ps=0 w=1e+06u l=180000u
+X4 VGND VONAMP ISINK VGND sky130_fd_pr__nfet_01v8 ad=0 pd=0 as=-0 ps=0 w=1e+06u l=180000u
+X5 VPWR VPWR VPWR VPWR sky130_fd_pr__pfet_01v8 ad=0 pd=0 as=0 ps=0 w=1e+06u l=180000u
+X6 VPWR VPWR VPWR VPWR sky130_fd_pr__pfet_01v8 ad=0 pd=0 as=0 ps=0 w=1e+06u l=180000u
+X7 VONAMP VONAMP VPWR VPWR sky130_fd_pr__pfet_01v8 ad=-0 pd=0 as=0 ps=0 w=1e+06u l=180000u
+X8 VPWR VONAMP VOPAMP VPWR sky130_fd_pr__pfet_01v8 ad=0 pd=0 as=-0 ps=0 w=1e+06u l=180000u
+X9 VPWR VONAMP VONAMP VPWR sky130_fd_pr__pfet_01v8 ad=0 pd=0 as=-0 ps=0 w=1e+06u l=180000u
+X10 VPWR VPWR VPWR VPWR sky130_fd_pr__pfet_01v8 ad=0 pd=0 as=0 ps=0 w=1e+06u l=180000u
+X11 VOPAMP VONAMP VPWR VPWR sky130_fd_pr__pfet_01v8 ad=-0 pd=0 as=0 ps=0 w=1e+06u l=180000u
+X12 VPWR VONAMP VONAMP VPWR sky130_fd_pr__pfet_01v8 ad=0 pd=0 as=-0 ps=0 w=1e+06u l=180000u
+X13 VPWR VPWR VPWR VPWR sky130_fd_pr__pfet_01v8 ad=0 pd=0 as=0 ps=0 w=1e+06u l=180000u
+X14 VPWR VPWR VPWR VPWR sky130_fd_pr__pfet_01v8 ad=0 pd=0 as=0 ps=0 w=1e+06u l=180000u
+X15 VPWR VONAMP VOPAMP VPWR sky130_fd_pr__pfet_01v8 ad=0 pd=0 as=-0 ps=0 w=1e+06u l=180000u
+X16 VPWR VPWR VPWR VPWR sky130_fd_pr__pfet_01v8 ad=0 pd=0 as=0 ps=0 w=1e+06u l=180000u
+X17 VPWR VOPAMP VOUT VPWR sky130_fd_pr__pfet_01v8 ad=0 pd=0 as=0 ps=0 w=2e+06u l=150000u
+X18 VGND VOPAMP VOUT VGND sky130_fd_pr__nfet_01v8 ad=0 pd=0 as=0 ps=0 w=1e+06u l=150000u
+C0 VPWR VGND 11.52fF
+C1 VONAMP VGND 2.55fF
+
+
+.ends
\ No newline at end of file
diff --git a/comparator/comparator-preamp.spice b/comparator/comparator-preamp.spice
new file mode 100644
index 0000000..edb143a
--- /dev/null
+++ b/comparator/comparator-preamp.spice
@@ -0,0 +1,34 @@
+* scale: 1e6 units = 1 micron
+
+.subckt comparator-preamp VP VN VPAMP VNAMP VI BIASN VGND VPWR
+
+*constant current source: paralleled to allow for size matching
+* X0 VI BIASN VGND VGND sky130_fd_pr__nfet_03v3_nvt w=1e+6u l=0.6e+6u
+* X1 VI BIASN VGND VGND sky130_fd_pr__nfet_03v3_nvt w=1e+6u l=0.6e+6u
+*
+* *Diff Pair
+* X12 VPAMP VP VI VGND sky130_fd_pr__nfet_03v3_nvt w=1e+6u l=0.6e+6u
+* X13 VNAMP VN VI VGND sky130_fd_pr__nfet_03v3_nvt w=1e+6u l=0.6e+6u
+*
+* *Load transistors
+* X24 VPWR VPAMP VPAMP VPWR sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+6u l=0.5e+6u
+* X25 VPWR VNAMP VNAMP VPWR sky130_fd_pr__pfet_g5v0d10v5 w=1.5e+6u l=0.5e+6u
+
+* extracted
+*.option scale=1u
+
+* Load
+X2 VPAMP VPAMP VPWR VPWR sky130_fd_pr__pfet_g5v0d10v5 ad=0 pd=0 as=-0 ps=0 w=1.5e+06u l=500000u
+X3 VNAMP VNAMP VPWR VPWR sky130_fd_pr__pfet_g5v0d10v5 ad=0 pd=0 as=-0 ps=0 w=1.5e+06u l=500000u
+
+* Current Sink
+X4 VGND BIASN VI VGND sky130_fd_pr__nfet_03v3_nvt ad=0 pd=0 as=-0 ps=0 w=1e+06u l=600000u
+X6 VI BIASN VGND VGND sky130_fd_pr__nfet_03v3_nvt ad=-0 pd=0 as=0 ps=0 w=1e+06u l=600000u
+
+* Diff pair
+X12 VI VN VNAMP VGND sky130_fd_pr__nfet_03v3_nvt ad=-0 pd=0 as=-0 ps=0 w=1e+06u l=600000u
+X13 VI VP VPAMP VGND sky130_fd_pr__nfet_03v3_nvt ad=-0 pd=0 as=-0 ps=0 w=1e+06u l=600000u
+C0 VPWR VGND 8.16fF
+
+
+.ends
\ No newline at end of file
diff --git a/comparator/comparator.spice b/comparator/comparator.spice
index 90fbc7c..1274051 100644
--- a/comparator/comparator.spice
+++ b/comparator/comparator.spice
@@ -1,26 +1,37 @@
* SPICE3 file created from /mnt/c/Users/Harry/magic-practice/caravel_user_project_analog/comparator/comparator.ext - technology: sky130A
-.subckt comparator VGND VDD3v3 VDD1v8 VOUT BIASN VN VP
-X0 VPAMP VP ISINK VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u
-X1 VGND BIASN ISINK VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u
+.subckt comparator VGND VDD3v3 VDD1v8 VOUT BIASN VN VP VPAMP VNAMP ISINK
+X9 VPAMP VPAMP VDD3v3 VDD3v3 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+X15 VNAMP VNAMP VDD3v3 VDD3v3 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
+
+X1 VGND BIASN ISINK VGND sky130_fd_pr__nfet_03v3_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u
+X10 ISINK BIASN VGND VGND sky130_fd_pr__nfet_03v3_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u
+
+X0 VPAMP VP ISINK VGND sky130_fd_pr__nfet_03v3_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u
+X5 ISINK VN VNAMP VGND sky130_fd_pr__nfet_03v3_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u
+
X2 VOPAMP VOP DIFFSINK VGND sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=180000u
X3 VON VNAMP VDD3v3 VDD3v3 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
-X4 DECISINK VON VOP VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u
-X5 ISINK VN VNAMP VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u
-X6 DECISINK VOP VON VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u
+X4 DECISINK VON VOP VGND sky130_fd_pr__nfet_03v3_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u
+
+X6 DECISINK VOP VON VGND sky130_fd_pr__nfet_03v3_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u
X7 VDD1v8 VOPAMP VOUT VDD1v8 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=2e+06u l=150000u
X8 DIFFSINK VONAMP VGND VGND sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=180000u
-X9 VPAMP VPAMP VDD3v3 VDD3v3 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
-X10 ISINK BIASN VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u
+
+
+
+
X11 DIFFSINK VON VONAMP VGND sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=180000u
-X12 VON VON DECISINK VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u
+X12 VON VON DECISINK VGND sky130_fd_pr__nfet_03v3_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u
X13 VOPAMP VONAMP VDD1v8 VDD1v8 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=180000u
X14 VOUT VOPAMP VGND VGND sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1e+06u l=150000u
-X15 VDD3v3 VNAMP VNAMP VDD3v3 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
-X16 VOP VOP DECISINK VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u
-X17 DECISINK DECISINK VGND VGND sky130_fd_pr__nfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u
+
+
+
+X16 VOP VOP DECISINK VGND sky130_fd_pr__nfet_03v3_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u
+X17 DECISINK DECISINK VGND VGND sky130_fd_pr__nfet_03v3_nvt ad=0p pd=0u as=0p ps=0u w=1e+06u l=600000u
X18 VDD3v3 VPAMP VOP VDD3v3 sky130_fd_pr__pfet_g5v0d10v5 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=500000u
X19 VDD1v8 VONAMP VONAMP VDD1v8 sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=180000u
-C0 VOPAMP VGND 2.89fF
-C1 VON VGND 2.03fF
+*C0 VOPAMP VGND 2.89fF
+*C1 VON VGND 2.03fF
.ends
diff --git a/comparator/full_chip_sim.spice b/comparator/full_chip_sim.spice
new file mode 100644
index 0000000..46d989a
--- /dev/null
+++ b/comparator/full_chip_sim.spice
@@ -0,0 +1,149 @@
+* comparator Simulation
+* this file edited to remove everything not in tt lib
+.lib "./sky130_fd_pr/models/sky130.lib.spice" tt
+.include user_analog_project_wrapper.spice
+
+* instantiate the comparator
+X1 gpio_analog[0] gpio_analog[10] gpio_analog[11]
++ gpio_analog[12] gpio_analog[13] gpio_analog[14] gpio_analog[15] gpio_analog[16]
++ gpio_analog[17] gpio_analog[1] gpio_analog[2] gpio_analog[3] gpio_analog[4] gpio_analog[5]
++ gpio_analog[6] gpio_analog[7] gpio_analog[8] gpio_analog[9] gpio_noesd[0] gpio_noesd[10]
++ gpio_noesd[11] gpio_noesd[12] gpio_noesd[13] gpio_noesd[14] gpio_noesd[15] gpio_noesd[16]
++ gpio_noesd[17] gpio_noesd[1] gpio_noesd[2] gpio_noesd[3] gpio_noesd[4] gpio_noesd[5]
++ gpio_noesd[6] gpio_noesd[7] gpio_noesd[8] gpio_noesd[9] io_analog[0] io_analog[10]
++ io_analog[1] io_analog[2] io_analog[3] io_analog[7] io_analog[8] io_analog[9] io_analog[4]
++ io_analog[5] io_analog[6] io_clamp_high[0] io_clamp_high[1] io_clamp_high[2] io_clamp_low[0]
++ io_clamp_low[1] io_clamp_low[2] io_in[0] io_in[10] io_in[11] io_in[12] io_in[13]
++ io_in[14] io_in[15] io_in[16] io_in[17] io_in[18] io_in[19] io_in[1] io_in[20] io_in[21]
++ io_in[22] io_in[23] io_in[24] io_in[25] io_in[26] io_in[2] io_in[3] io_in[4] io_in[5]
++ io_in[6] io_in[7] io_in[8] io_in[9] io_in_3v3[0] io_in_3v3[10] io_in_3v3[11] io_in_3v3[12]
++ io_in_3v3[13] io_in_3v3[14] io_in_3v3[15] io_in_3v3[16] io_in_3v3[17] io_in_3v3[18]
++ io_in_3v3[19] io_in_3v3[1] io_in_3v3[20] io_in_3v3[21] io_in_3v3[22] io_in_3v3[23]
++ io_in_3v3[24] io_in_3v3[25] io_in_3v3[26] io_in_3v3[2] io_in_3v3[3] io_in_3v3[4]
++ io_in_3v3[5] io_in_3v3[6] io_in_3v3[7] io_in_3v3[8] io_in_3v3[9] io_oeb[0] io_oeb[10]
++ io_oeb[11] io_oeb[12] io_oeb[13] io_oeb[14] io_oeb[15] io_oeb[16] io_oeb[17] io_oeb[18]
++ io_oeb[19] io_oeb[1] io_oeb[20] io_oeb[21] io_oeb[22] io_oeb[23] io_oeb[24] io_oeb[25]
++ io_oeb[26] io_oeb[2] io_oeb[3] io_oeb[4] io_oeb[5] io_oeb[6] io_oeb[7] io_oeb[8]
++ io_oeb[9] io_out[0] io_out[10] io_out[11] io_out[12] io_out[13] io_out[14] io_out[15]
++ io_out[16] io_out[17] io_out[18] io_out[19] io_out[1] io_out[20] io_out[21] io_out[22]
++ io_out[23] io_out[24] io_out[25] io_out[26] io_out[2] io_out[3] io_out[4] io_out[5]
++ io_out[6] io_out[7] io_out[8] io_out[9] la_data_in[0] la_data_in[100] la_data_in[101]
++ la_data_in[102] la_data_in[103] la_data_in[104] la_data_in[105] la_data_in[106]
++ la_data_in[107] la_data_in[108] la_data_in[109] la_data_in[10] la_data_in[110] la_data_in[111]
++ la_data_in[112] la_data_in[113] la_data_in[114] la_data_in[115] la_data_in[116]
++ la_data_in[117] la_data_in[118] la_data_in[119] la_data_in[11] la_data_in[120] la_data_in[121]
++ la_data_in[122] la_data_in[123] la_data_in[124] la_data_in[125] la_data_in[126]
++ la_data_in[127] la_data_in[12] la_data_in[13] la_data_in[14] la_data_in[15] la_data_in[16]
++ la_data_in[17] la_data_in[18] la_data_in[19] la_data_in[1] la_data_in[20] la_data_in[21]
++ la_data_in[22] la_data_in[23] la_data_in[24] la_data_in[25] la_data_in[26] la_data_in[27]
++ la_data_in[28] la_data_in[29] la_data_in[2] la_data_in[30] la_data_in[31] la_data_in[32]
++ la_data_in[33] la_data_in[34] la_data_in[35] la_data_in[36] la_data_in[37] la_data_in[38]
++ la_data_in[39] la_data_in[3] la_data_in[40] la_data_in[41] la_data_in[42] la_data_in[43]
++ la_data_in[44] la_data_in[45] la_data_in[46] la_data_in[47] la_data_in[48] la_data_in[49]
++ la_data_in[4] la_data_in[50] la_data_in[51] la_data_in[52] la_data_in[53] la_data_in[54]
++ la_data_in[55] la_data_in[56] la_data_in[57] la_data_in[58] la_data_in[59] la_data_in[5]
++ la_data_in[60] la_data_in[61] la_data_in[62] la_data_in[63] la_data_in[64] la_data_in[65]
++ la_data_in[66] la_data_in[67] la_data_in[68] la_data_in[69] la_data_in[6] la_data_in[70]
++ la_data_in[71] la_data_in[72] la_data_in[73] la_data_in[74] la_data_in[75] la_data_in[76]
++ la_data_in[77] la_data_in[78] la_data_in[79] la_data_in[7] la_data_in[80] la_data_in[81]
++ la_data_in[82] la_data_in[83] la_data_in[84] la_data_in[85] la_data_in[86] la_data_in[87]
++ la_data_in[88] la_data_in[89] la_data_in[8] la_data_in[90] la_data_in[91] la_data_in[92]
++ la_data_in[93] la_data_in[94] la_data_in[95] la_data_in[96] la_data_in[97] la_data_in[98]
++ la_data_in[99] la_data_in[9] la_data_out[0] la_data_out[100] la_data_out[101] la_data_out[102]
++ la_data_out[103] la_data_out[104] la_data_out[105] la_data_out[106] la_data_out[107]
++ la_data_out[108] la_data_out[109] la_data_out[10] la_data_out[110] la_data_out[111]
++ la_data_out[112] la_data_out[113] la_data_out[114] la_data_out[115] la_data_out[116]
++ la_data_out[117] la_data_out[118] la_data_out[119] la_data_out[11] la_data_out[120]
++ la_data_out[121] la_data_out[122] la_data_out[123] la_data_out[124] la_data_out[125]
++ la_data_out[126] la_data_out[127] la_data_out[12] la_data_out[13] la_data_out[14]
++ la_data_out[15] la_data_out[16] la_data_out[17] la_data_out[18] la_data_out[19]
++ la_data_out[1] la_data_out[20] la_data_out[21] la_data_out[22] la_data_out[23] la_data_out[24]
++ la_data_out[25] la_data_out[26] la_data_out[27] la_data_out[28] la_data_out[29]
++ la_data_out[2] la_data_out[30] la_data_out[31] la_data_out[32] la_data_out[33] la_data_out[34]
++ la_data_out[35] la_data_out[36] la_data_out[37] la_data_out[38] la_data_out[39]
++ la_data_out[3] la_data_out[40] la_data_out[41] la_data_out[42] la_data_out[43] la_data_out[44]
++ la_data_out[45] la_data_out[46] la_data_out[47] la_data_out[48] la_data_out[49]
++ la_data_out[4] la_data_out[50] la_data_out[51] la_data_out[52] la_data_out[53] la_data_out[54]
++ la_data_out[55] la_data_out[56] la_data_out[57] la_data_out[58] la_data_out[59]
++ la_data_out[5] la_data_out[60] la_data_out[61] la_data_out[62] la_data_out[63] la_data_out[64]
++ la_data_out[65] la_data_out[66] la_data_out[67] la_data_out[68] la_data_out[69]
++ la_data_out[6] la_data_out[70] la_data_out[71] la_data_out[72] la_data_out[73] la_data_out[74]
++ la_data_out[75] la_data_out[76] la_data_out[77] la_data_out[78] la_data_out[79]
++ la_data_out[7] la_data_out[80] la_data_out[81] la_data_out[82] la_data_out[83] la_data_out[84]
++ la_data_out[85] la_data_out[86] la_data_out[87] la_data_out[88] la_data_out[89]
++ la_data_out[8] la_data_out[90] la_data_out[91] la_data_out[92] la_data_out[93] la_data_out[94]
++ la_data_out[95] la_data_out[96] la_data_out[97] la_data_out[98] la_data_out[99]
++ la_data_out[9] la_oenb[0] la_oenb[100] la_oenb[101] la_oenb[102] la_oenb[103] la_oenb[104]
++ la_oenb[105] la_oenb[106] la_oenb[107] la_oenb[108] la_oenb[109] la_oenb[10] la_oenb[110]
++ la_oenb[111] la_oenb[112] la_oenb[113] la_oenb[114] la_oenb[115] la_oenb[116] la_oenb[117]
++ la_oenb[118] la_oenb[119] la_oenb[11] la_oenb[120] la_oenb[121] la_oenb[122] la_oenb[123]
++ la_oenb[124] la_oenb[125] la_oenb[126] la_oenb[127] la_oenb[12] la_oenb[13] la_oenb[14]
++ la_oenb[15] la_oenb[16] la_oenb[17] la_oenb[18] la_oenb[19] la_oenb[1] la_oenb[20]
++ la_oenb[21] la_oenb[22] la_oenb[23] la_oenb[24] la_oenb[25] la_oenb[26] la_oenb[27]
++ la_oenb[28] la_oenb[29] la_oenb[2] la_oenb[30] la_oenb[31] la_oenb[32] la_oenb[33]
++ la_oenb[34] la_oenb[35] la_oenb[36] la_oenb[37] la_oenb[38] la_oenb[39] la_oenb[3]
++ la_oenb[40] la_oenb[41] la_oenb[42] la_oenb[43] la_oenb[44] la_oenb[45] la_oenb[46]
++ la_oenb[47] la_oenb[48] la_oenb[49] la_oenb[4] la_oenb[50] la_oenb[51] la_oenb[52]
++ la_oenb[53] la_oenb[54] la_oenb[55] la_oenb[56] la_oenb[57] la_oenb[58] la_oenb[59]
++ la_oenb[5] la_oenb[60] la_oenb[61] la_oenb[62] la_oenb[63] la_oenb[64] la_oenb[65]
++ la_oenb[66] la_oenb[67] la_oenb[68] la_oenb[69] la_oenb[6] la_oenb[70] la_oenb[71]
++ la_oenb[72] la_oenb[73] la_oenb[74] la_oenb[75] la_oenb[76] la_oenb[77] la_oenb[78]
++ la_oenb[79] la_oenb[7] la_oenb[80] la_oenb[81] la_oenb[82] la_oenb[83] la_oenb[84]
++ la_oenb[85] la_oenb[86] la_oenb[87] la_oenb[88] la_oenb[89] la_oenb[8] la_oenb[90]
++ la_oenb[91] la_oenb[92] la_oenb[93] la_oenb[94] la_oenb[95] la_oenb[96] la_oenb[97]
++ la_oenb[98] la_oenb[99] la_oenb[9] user_clock2 user_irq[0] user_irq[1] user_irq[2]
++ VDD1v8 VDD1v8 VDD3v3 VDD3v3 VGND VGND VGND VGND wb_clk_i wb_rst_i wbs_ack_o wbs_adr_i[0]
++ wbs_adr_i[10] wbs_adr_i[11] wbs_adr_i[12] wbs_adr_i[13] wbs_adr_i[14] wbs_adr_i[15]
++ wbs_adr_i[16] wbs_adr_i[17] wbs_adr_i[18] wbs_adr_i[19] wbs_adr_i[1] wbs_adr_i[20]
++ wbs_adr_i[21] wbs_adr_i[22] wbs_adr_i[23] wbs_adr_i[24] wbs_adr_i[25] wbs_adr_i[26]
++ wbs_adr_i[27] wbs_adr_i[28] wbs_adr_i[29] wbs_adr_i[2] wbs_adr_i[30] wbs_adr_i[31]
++ wbs_adr_i[3] wbs_adr_i[4] wbs_adr_i[5] wbs_adr_i[6] wbs_adr_i[7] wbs_adr_i[8] wbs_adr_i[9]
++ wbs_cyc_i wbs_dat_i[0] wbs_dat_i[10] wbs_dat_i[11] wbs_dat_i[12] wbs_dat_i[13] wbs_dat_i[14]
++ wbs_dat_i[15] wbs_dat_i[16] wbs_dat_i[17] wbs_dat_i[18] wbs_dat_i[19] wbs_dat_i[1]
++ wbs_dat_i[20] wbs_dat_i[21] wbs_dat_i[22] wbs_dat_i[23] wbs_dat_i[24] wbs_dat_i[25]
++ wbs_dat_i[26] wbs_dat_i[27] wbs_dat_i[28] wbs_dat_i[29] wbs_dat_i[2] wbs_dat_i[30]
++ wbs_dat_i[31] wbs_dat_i[3] wbs_dat_i[4] wbs_dat_i[5] wbs_dat_i[6] wbs_dat_i[7] wbs_dat_i[8]
++ wbs_dat_i[9] wbs_dat_o[0] wbs_dat_o[10] wbs_dat_o[11] wbs_dat_o[12] wbs_dat_o[13]
++ wbs_dat_o[14] wbs_dat_o[15] wbs_dat_o[16] wbs_dat_o[17] wbs_dat_o[18] wbs_dat_o[19]
++ wbs_dat_o[1] wbs_dat_o[20] wbs_dat_o[21] wbs_dat_o[22] wbs_dat_o[23] wbs_dat_o[24]
++ wbs_dat_o[25] wbs_dat_o[26] wbs_dat_o[27] wbs_dat_o[28] wbs_dat_o[29] wbs_dat_o[2]
++ wbs_dat_o[30] wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6]
++ wbs_dat_o[7] wbs_dat_o[8] wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3]
++ wbs_stb_i wbs_we_i user_analog_project_wrapper
+
+* set gnd and power
+Vgnd VGND 0 0
+Vdd3v3 VDD3v3 VGND 3
+Vdd1v8 VDD1v8 VGND 1.8
+
+* set bias voltage
+Vbias BIASN VGND 0.3
+
+VNin VN VGND 1.5
+
+
+* create VP-in
+*VPin VP VGND pulse(0 3 1p 1n 1n 1n 2n)
+VPin VP VGND SINE(1.5 0.2 1Meg)
+*VPin VP VGND 1.5
+
+*connect inputs and outputs
+R0 VP gpio_analog[14] 0
+R1 VN gpio_analog[15] 0
+R2 BIASN gpio_analog[16] 0
+R3 VOUT gpio_analog[17] 0
+
+.tran 100e-12 2000e-09 0e-00
+*.dc VPin 0 3 0.002 VNin 0 3 0.2
+
+.control
+run
+set color0 = white
+set color1 = black
+plot VOUT VP VN VDD3v3
+*plot VPAMP VNAMP VI
+*plot VOP VON
+plot i(Vdd3v3) i(Vdd1v8)
+.endc
+
+.end
diff --git a/comparator/simulation.spice b/comparator/simulation.spice
index 70c3e1d..698e711 100644
--- a/comparator/simulation.spice
+++ b/comparator/simulation.spice
@@ -2,10 +2,16 @@
* this file edited to remove everything not in tt lib
.lib "./sky130_fd_pr/models/sky130.lib.spice" tt
.include comparator.spice
+.include comparator-preamp.spice
+.include comparator-decision.spice
+.include comparator-diffamp.spice
* instantiate the comparator
-Xcomp VGND VDD3v3 VDD1v8 VOUT BIASN VN VP comparator
+Xcomp VGND VDD3v3 VDD1v8 VOUT BIASN VN VP VPAMP1 VNAMP1 ISINK comparator
+Xpre VP VN VPAMP VNAMP VI BIASN VGND VDD3v3 comparator-preamp
+Xdec VPAMP VNAMP VOP VON VGND VDD3v3 comparator-decision
+Xdiff VOP VON VOUT2 VGND VDD1v8 comparator-diffamp
* set gnd and power
Vgnd VGND 0 0
@@ -20,17 +26,18 @@
* create VP-in
*VPin VP VGND pulse(0 3 1p 1n 1n 1n 2n)
-*VPin VP VGND SINE(1.5 0.1 10Meg)
-VPin VP VGND 1.5
+VPin VP VGND SINE(1.5 0.1 100k)
+*VPin VP VGND 1.5
-*.tran 10e-12 200e-09 0e-00
+.tran 1000e-12 20000e-09 0e-00
.dc VPin 0 3 0.002 VNin 0 3 0.2
.control
run
set color0 = white
set color1 = black
-plot VOUT VP VN VDD3v3
+plot VOUT VOUT2 VP VN VDD3v3
+plot VPAMP1 VNAMP1 VPAMP VNAMP VI ISINK
*plot VPAMP VNAMP VI
*plot VOP VON
plot i(Vdd3v3) i(Vdd1v8)
diff --git a/comparator/user_analog_project_wrapper.spice b/comparator/user_analog_project_wrapper.spice
index bbbd80a..72f02d0 100644
--- a/comparator/user_analog_project_wrapper.spice
+++ b/comparator/user_analog_project_wrapper.spice
@@ -1,4 +1,5 @@
* SPICE3 file created from user_analog_project_wrapper.ext - technology: sky130A
+.include comparator.spice
.subckt user_analog_project_wrapper gpio_analog[0] gpio_analog[10] gpio_analog[11]
+ gpio_analog[12] gpio_analog[13] gpio_analog[14] gpio_analog[15] gpio_analog[16]
@@ -111,6 +112,4 @@
+ comparator
C1 vssa1 vssd2 2.35fF
C2 vccd2 vssd2 14.38fF
-C3 comparator_0/VOPAMP vssd2 2.89fF **FLOATING
-C4 comparator_0/VON vssd2 2.03fF **FLOATING
.ends
