| v {xschem version=2.9.9 file_version=1.2 } |
| G {} |
| K {} |
| V {} |
| S {} |
| E {} |
| N 1050 -530 1060 -530 { lab=#net1} |
| N 970 -530 990 -530 { lab=out_p_f} |
| N 1120 -530 1140 -530 { lab=out_p} |
| N 970 -470 970 -450 { lab=vss} |
| N 1140 -470 1140 -450 { lab=vss} |
| N 360 -450 500 -450 { lab=out_p_f} |
| N 500 -530 500 -450 { lab=out_p_f} |
| N 500 -530 670 -530 { lab=out_p_f} |
| N 1050 -400 1060 -400 { lab=#net2} |
| N 970 -400 990 -400 { lab=avdd_f} |
| N 1120 -400 1140 -400 { lab=avdd} |
| N 970 -340 970 -320 { lab=vss} |
| N 1140 -340 1140 -320 { lab=vss} |
| N 360 -350 490 -350 { lab=avdd_f} |
| N 490 -400 490 -350 { lab=avdd_f} |
| N 1050 -160 1060 -160 { lab=#net3} |
| N 970 -160 990 -160 { lab=iin_15u_f} |
| N 1120 -160 1140 -160 { lab=iin_15u} |
| N 970 -100 970 -80 { lab=vss} |
| N 1140 -100 1140 -80 { lab=vss} |
| N 1050 -40 1060 -40 { lab=#net4} |
| N 970 -40 990 -40 { lab=dvdd_f} |
| N 1120 -40 1140 -40 { lab=dvdd} |
| N 970 20 970 40 { lab=vss} |
| N 1140 20 1140 40 { lab=vss} |
| N 1050 70 1060 70 { lab=#net5} |
| N 970 70 990 70 { lab=out_n_f} |
| N 1120 70 1140 70 { lab=out_n} |
| N 970 130 970 150 { lab=vss} |
| N 1140 130 1140 150 { lab=vss} |
| N 360 -190 470 -190 { lab=out_n_f} |
| N 470 -190 470 -50 { lab=out_n_f} |
| N -440 -470 -430 -470 { lab=#net6} |
| N -370 -470 -350 -470 { lab=vin_f} |
| N -520 -470 -500 -470 { lab=vin} |
| N -350 -410 -350 -390 { lab=vss} |
| N -520 -410 -520 -390 { lab=vss} |
| N -90 -470 60 -470 { lab=vin_f} |
| N -440 -320 -430 -320 { lab=#net7} |
| N -370 -320 -350 -320 { lab=#net8} |
| N -520 -320 -500 -320 { lab=vref} |
| N -350 -260 -350 -240 { lab=vss} |
| N -520 -260 -520 -240 { lab=vss} |
| N -90 -320 50 -320 { lab=#net8} |
| N 50 -450 50 -320 { lab=#net8} |
| N 50 -450 60 -450 { lab=#net8} |
| N 470 -50 470 -40 { lab=out_n_f} |
| N 470 -40 470 70 { lab=out_n_f} |
| N 470 70 670 70 { lab=out_n_f} |
| N 360 -230 540 -230 { lab=dvdd_f} |
| N 540 -230 540 -160 { lab=dvdd_f} |
| N 540 -160 540 -40 { lab=dvdd_f} |
| N 540 -40 670 -40 { lab=dvdd_f} |
| N 360 -270 570 -270 { lab=iin_15u_f} |
| N 570 -270 570 -160 { lab=iin_15u_f} |
| N 570 -160 670 -160 { lab=iin_15u_f} |
| N 1050 -280 1060 -280 { lab=#net9} |
| N 970 -280 990 -280 { lab=fgnd} |
| N 1120 -280 1140 -280 { lab=vss} |
| N 970 -220 970 -200 { lab=vss} |
| N 1140 -220 1140 -200 { lab=vss} |
| N 360 -310 630 -310 { lab=fgnd} |
| N 630 -310 630 -280 { lab=fgnd} |
| N 360 -470 410 -470 { lab=vp_p} |
| N 360 -430 410 -430 { lab=vp_n} |
| N 360 -410 410 -410 { lab=vin_p} |
| N 360 -390 410 -390 { lab=vcmp_p} |
| N 360 -370 410 -370 { lab=vtriang} |
| N 360 -330 410 -330 { lab=vin_n} |
| N 360 -290 410 -290 { lab=vcmp_n} |
| N 360 -250 410 -250 { lab=vn_p} |
| N 360 -210 410 -210 { lab=vn_n} |
| N -600 -470 -520 -470 { lab=vin} |
| N -600 -320 -520 -320 { lab=vref} |
| N 1140 -530 1260 -530 { lab=out_p} |
| N 1140 70 1250 70 { lab=out_n} |
| N 1140 -160 1260 -160 { lab=iin_15u} |
| N 1140 -40 1260 -40 { lab=dvdd} |
| N 1140 -280 1260 -280 { lab=vss} |
| N 1140 -400 1260 -400 { lab=avdd} |
| N 1250 70 1260 70 { lab=out_n} |
| N -350 -470 -90 -470 { lab=vin_f} |
| N -350 -320 -90 -320 { lab=#net8} |
| N 670 -530 970 -530 { lab=out_p_f} |
| N 670 -160 970 -160 { lab=iin_15u_f} |
| N 670 70 970 70 { lab=out_n_f} |
| N 660 -280 980 -280 { lab=fgnd} |
| N 640 -280 660 -280 { lab=fgnd} |
| N 630 -280 640 -280 { lab=fgnd} |
| N 490 -400 970 -400 { lab=avdd_f} |
| N 610 -380 650 -380 { lab=fgnd} |
| N 670 -40 970 -40 { lab=dvdd_f} |
| N 600 -20 670 -20 { lab=fgnd} |
| N 770 -210 770 -190 { lab=avdd_f} |
| N 770 20 770 40 { lab=dvdd_f} |
| N 770 -600 770 -560 { lab=dvdd_f} |
| N 770 -130 770 -110 { lab=fgnd} |
| N 770 100 770 120 { lab=fgnd} |
| N 770 -500 770 -480 { lab=fgnd} |
| N -190 -520 -190 -500 { lab=avdd_f} |
| N -190 -370 -190 -350 { lab=avdd_f} |
| N -190 -440 -190 -420 { lab=fgnd} |
| N -190 -290 -190 -270 { lab=fgnd} |
| C {src/Class_D/Class_D.sym} 210 -330 0 0 {name=x1} |
| C {res.sym} 1020 -530 1 0 {name=R1 |
| value=0.2m |
| footprint=1206 |
| device=resistor |
| m=1} |
| C {ind.sym} 1090 -530 1 0 {name=L1 |
| m=1 |
| value=0.011n |
| footprint=1206 |
| device=inductor} |
| C {capa.sym} 1140 -500 0 0 {name=C1 |
| m=1 |
| value=0.06p |
| footprint=1206 |
| device="ceramic capacitor"} |
| C {capa.sym} 970 -500 0 0 {name=C2 |
| m=1 |
| value=0.06p |
| footprint=1206 |
| device="ceramic capacitor"} |
| C {lab_wire.sym} 970 -450 0 0 {name=l1 sig_type=std_logic lab=vss} |
| C {lab_wire.sym} 1140 -450 0 0 {name=l2 sig_type=std_logic lab=vss} |
| C {res.sym} 1020 -400 1 0 {name=R2 |
| value=0.3m |
| footprint=1206 |
| device=resistor |
| m=1} |
| C {ind.sym} 1090 -400 1 0 {name=L2 |
| m=1 |
| value=0.016n |
| footprint=1206 |
| device=inductor} |
| C {capa.sym} 1140 -370 0 0 {name=C3 |
| m=1 |
| value=0.04p |
| footprint=1206 |
| device="ceramic capacitor"} |
| C {capa.sym} 970 -370 0 0 {name=C4 |
| m=1 |
| value=0.04p |
| footprint=1206 |
| device="ceramic capacitor"} |
| C {lab_wire.sym} 970 -320 0 0 {name=l3 sig_type=std_logic lab=vss} |
| C {lab_wire.sym} 1140 -320 0 0 {name=l4 sig_type=std_logic lab=vss} |
| C {res.sym} 1020 -160 1 0 {name=R3 |
| value=0.6m |
| footprint=1206 |
| device=resistor |
| m=1} |
| C {ind.sym} 1090 -160 1 0 {name=L3 |
| m=1 |
| value=0.032n |
| footprint=1206 |
| device=inductor} |
| C {capa.sym} 1140 -130 0 0 {name=C5 |
| m=1 |
| value=0.02p |
| footprint=1206 |
| device="ceramic capacitor"} |
| C {capa.sym} 970 -130 0 0 {name=C6 |
| m=1 |
| value=0.02p |
| footprint=1206 |
| device="ceramic capacitor"} |
| C {lab_wire.sym} 970 -80 0 0 {name=l5 sig_type=std_logic lab=vss} |
| C {lab_wire.sym} 1140 -80 0 0 {name=l6 sig_type=std_logic lab=vss} |
| C {res.sym} 1020 -40 1 0 {name=R4 |
| value=0.2m |
| footprint=1206 |
| device=resistor |
| m=1} |
| C {ind.sym} 1090 -40 1 0 {name=L4 |
| m=1 |
| value=0.011n |
| footprint=1206 |
| device=inductor} |
| C {capa.sym} 1140 -10 0 0 {name=C7 |
| m=1 |
| value=0.06p |
| footprint=1206 |
| device="ceramic capacitor"} |
| C {capa.sym} 970 -10 0 0 {name=C8 |
| m=1 |
| value=0.06p |
| footprint=1206 |
| device="ceramic capacitor"} |
| C {lab_wire.sym} 970 40 0 0 {name=l7 sig_type=std_logic lab=vss} |
| C {lab_wire.sym} 1140 40 0 0 {name=l8 sig_type=std_logic lab=vss} |
| C {res.sym} 1020 70 1 0 {name=R5 |
| value=0.2m |
| footprint=1206 |
| device=resistor |
| m=1} |
| C {ind.sym} 1090 70 1 0 {name=L5 |
| m=1 |
| value=0.011n |
| footprint=1206 |
| device=inductor} |
| C {capa.sym} 1140 100 0 0 {name=C9 |
| m=1 |
| value=0.06p |
| footprint=1206 |
| device="ceramic capacitor"} |
| C {capa.sym} 970 100 0 0 {name=C10 |
| m=1 |
| value=0.06p |
| footprint=1206 |
| device="ceramic capacitor"} |
| C {lab_wire.sym} 970 150 0 0 {name=l9 sig_type=std_logic lab=vss} |
| C {lab_wire.sym} 1140 150 0 0 {name=l10 sig_type=std_logic lab=vss} |
| C {res.sym} -400 -470 3 1 {name=R6 |
| value=0.6m |
| footprint=1206 |
| device=resistor |
| m=1} |
| C {ind.sym} -470 -470 3 1 {name=L6 |
| m=1 |
| value=0.032n |
| footprint=1206 |
| device=inductor} |
| C {capa.sym} -520 -440 0 1 {name=C11 |
| m=1 |
| value=0.02p |
| footprint=1206 |
| device="ceramic capacitor"} |
| C {capa.sym} -350 -440 0 1 {name=C12 |
| m=1 |
| value=0.02p |
| footprint=1206 |
| device="ceramic capacitor"} |
| C {lab_wire.sym} -350 -390 0 1 {name=l11 sig_type=std_logic lab=vss} |
| C {lab_wire.sym} -520 -390 0 1 {name=l12 sig_type=std_logic lab=vss} |
| C {res.sym} -400 -320 3 1 {name=R7 |
| value=0.6m |
| footprint=1206 |
| device=resistor |
| m=1} |
| C {ind.sym} -470 -320 3 1 {name=L7 |
| m=1 |
| value=0.032n |
| footprint=1206 |
| device=inductor} |
| C {capa.sym} -520 -290 0 1 {name=C13 |
| m=1 |
| value=0.02p |
| footprint=1206 |
| device="ceramic capacitor"} |
| C {capa.sym} -350 -290 0 1 {name=C14 |
| m=1 |
| value=0.02p |
| footprint=1206 |
| device="ceramic capacitor"} |
| C {lab_wire.sym} -350 -240 0 1 {name=l13 sig_type=std_logic lab=vss} |
| C {lab_wire.sym} -520 -240 0 1 {name=l14 sig_type=std_logic lab=vss} |
| C {res.sym} 1020 -280 1 0 {name=R8 |
| value=0.15m |
| footprint=1206 |
| device=resistor |
| m=1} |
| C {ind.sym} 1090 -280 1 0 {name=L8 |
| m=1 |
| value=0.008n |
| footprint=1206 |
| device=inductor} |
| C {capa.sym} 1140 -250 0 0 {name=C15 |
| m=1 |
| value=0.08p |
| footprint=1206 |
| device="ceramic capacitor"} |
| C {capa.sym} 970 -250 0 0 {name=C16 |
| m=1 |
| value=0.08p |
| footprint=1206 |
| device="ceramic capacitor"} |
| C {lab_wire.sym} 970 -200 0 0 {name=l15 sig_type=std_logic lab=vss} |
| C {lab_wire.sym} 1140 -200 0 0 {name=l16 sig_type=std_logic lab=vss} |
| C {lab_wire.sym} 430 -270 0 0 {name=l17 sig_type=std_logic lab=iin_15u_f} |
| C {lab_wire.sym} 400 -310 0 0 {name=l18 sig_type=std_logic lab=fgnd} |
| C {lab_wire.sym} 400 -470 0 0 {name=l19 sig_type=std_logic lab=vp_p} |
| C {lab_wire.sym} 420 -450 0 0 {name=l20 sig_type=std_logic lab=out_p_f} |
| C {lab_wire.sym} 420 -190 0 0 {name=l21 sig_type=std_logic lab=out_n_f} |
| C {lab_wire.sym} 400 -430 0 0 {name=l22 sig_type=std_logic lab=vp_n} |
| C {lab_wire.sym} 400 -250 0 0 {name=l23 sig_type=std_logic lab=vn_p} |
| C {lab_wire.sym} 400 -210 0 0 {name=l24 sig_type=std_logic lab=vn_n} |
| C {lab_wire.sym} 400 -410 0 0 {name=l25 sig_type=std_logic lab=vin_p} |
| C {lab_wire.sym} 400 -330 0 0 {name=l26 sig_type=std_logic lab=vin_n} |
| C {lab_wire.sym} 400 -370 0 0 {name=l27 sig_type=std_logic lab=vtriang} |
| C {lab_wire.sym} 410 -390 0 0 {name=l28 sig_type=std_logic lab=vcmp_p} |
| C {lab_wire.sym} 410 -290 0 0 {name=l29 sig_type=std_logic lab=vcmp_n} |
| C {lab_wire.sym} 420 -350 0 0 {name=l30 sig_type=std_logic lab=avdd_f} |
| C {lab_wire.sym} 420 -230 0 0 {name=l31 sig_type=std_logic lab=dvdd_f} |
| C {lab_wire.sym} 20 -470 0 0 {name=l32 sig_type=std_logic lab=vin_f} |
| C {lab_wire.sym} 20 -470 0 0 {name=l33 sig_type=std_logic lab=vin_f} |
| C {opin.sym} 1260 -530 0 0 {name=p1 lab=out_p} |
| C {opin.sym} 1260 70 0 0 {name=p2 lab=out_n} |
| C {ipin.sym} -600 -470 0 0 {name=p3 lab=vin} |
| C {ipin.sym} -600 -320 0 0 {name=p4 lab=vref} |
| C {iopin.sym} 1260 -400 0 0 {name=p5 lab=avdd} |
| C {iopin.sym} 1260 -280 0 0 {name=p6 lab=vss} |
| C {iopin.sym} 1260 -160 0 0 {name=p7 lab=iin_15u} |
| C {iopin.sym} 1260 -40 0 0 {name=p8 lab=dvdd} |
| C {src/ESD/ESD.sym} 720 -530 0 1 {name=x2} |
| C {src/ESD/ESD.sym} 720 -160 0 1 {name=x3} |
| C {src/ESD/ESD.sym} 720 70 0 1 {name=x4} |
| C {src/ESD/ESD.sym} -140 -470 0 0 {name=x5} |
| C {src/ESD/ESD.sym} -140 -320 0 0 {name=x6} |
| C {src/ESD/io_clamp.sym} 800 -390 0 1 {name=x7} |
| C {lab_wire.sym} 630 -380 0 0 {name=l34 sig_type=std_logic lab=fgnd} |
| C {src/ESD/io_clamp.sym} 820 -30 0 1 {name=x8} |
| C {lab_wire.sym} 640 -20 0 0 {name=l35 sig_type=std_logic lab=fgnd} |
| C {lab_wire.sym} 770 -200 0 0 {name=l36 sig_type=std_logic lab=avdd_f} |
| C {lab_wire.sym} 770 30 0 0 {name=l37 sig_type=std_logic lab=dvdd_f} |
| C {lab_wire.sym} 770 -580 0 0 {name=l38 sig_type=std_logic lab=dvdd_f} |
| C {lab_wire.sym} 770 -110 0 0 {name=l39 sig_type=std_logic lab=fgnd} |
| C {lab_wire.sym} 770 120 0 0 {name=l40 sig_type=std_logic lab=fgnd} |
| C {lab_wire.sym} 770 -480 0 0 {name=l41 sig_type=std_logic lab=fgnd} |
| C {lab_wire.sym} -190 -510 0 0 {name=l42 sig_type=std_logic lab=avdd_f} |
| C {lab_wire.sym} -190 -360 0 0 {name=l43 sig_type=std_logic lab=avdd_f} |
| C {lab_wire.sym} -190 -420 0 0 {name=l44 sig_type=std_logic lab=fgnd} |
| C {lab_wire.sym} -190 -270 0 0 {name=l45 sig_type=std_logic lab=fgnd} |
