picorF0/src/main/scala/top/GenerateVerilog.scala - third_party/shuttle/sky130/mpw-003/slot-006 - Git at Google

 package top

 import chisel3.stage.ChiselStage
 import top.CoreTop

 object GenerateVerilog extends App {
     (new ChiselStage).emitVerilog(new CoreTop)
 }
	package top

	import chisel3.stage.ChiselStage
	import top.CoreTop

	object GenerateVerilog extends App {
	(new ChiselStage).emitVerilog(new CoreTop)
	}