| commit | 7832dddf7ef5b4c190a643919d736d9021cb1690 | [log] [tgz] |
|---|---|---|
| author | Anish <anish@anishsinghani.com> | Mon Nov 08 17:01:36 2021 -0500 |
| committer | Anish <anish@anishsinghani.com> | Mon Nov 08 17:01:36 2021 -0500 |
| tree | fb05a6b411d5acb71f1c75a40060d07988b0682b | |
| parent | b24cde692a9371bbebcf8b32ce919932bcb01d5c [diff] |
Integration + DRC/timing-clean build of accelerator
This is a cryptography accelerator chip for the mpw-three tapeout. It includes an AES256 core (with some key-entropy restrictions to reduce the number of bits in the key), a SHA256 core, a VGA game demo, and some other experimental structures.
For documentation on the AES and SHA cores (including the original Chisel source code), see asinghani/crypto-accelerator