commit | 58d0b6de768e7bd7dd0c464aab0fae873789c800 | [log] [tgz] |
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author | embelon <78412338+embelon@users.noreply.github.com> | Thu Oct 14 20:14:18 2021 +0200 |
committer | embelon <78412338+embelon@users.noreply.github.com> | Thu Oct 14 20:14:18 2021 +0200 |
tree | b4c55dcc41355b1f5068c46017599f7afe41ddad | |
parent | 9d4892197408ae6e4fa411c630ab5afaf90293de [diff] |
Added openram_testchip as a submodule to use verilog blackbox, gds and lef.
:exclamation: Important Note |
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Refer to README for this sample project documentation.