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foss-eda-tools/third_party/shuttle/sky130/mpw-003/slot-003/58d0b6de768e7bd7dd0c464aab0fae873789c800
commit
58d0b6de768e7bd7dd0c464aab0fae873789c800
[log] [tgz]
author
embelon <78412338+embelon@users.noreply.github.com>
Thu Oct 14 20:14:18 2021 +0200
committer
embelon <78412338+embelon@users.noreply.github.com>
Thu Oct 14 20:14:18 2021 +0200
tree
b4c55dcc41355b1f5068c46017599f7afe41ddad
parent
9d4892197408ae6e4fa411c630ab5afaf90293de [diff]
Added openram_testchip as a submodule to use verilog blackbox, gds and lef.
2 files changed
tree: b4c55dcc41355b1f5068c46017599f7afe41ddad
  1. .github/
  2. def/
  3. docs/
  4. gds/
  5. lef/
  6. mag/
  7. maglef/
  8. openlane/
  9. signoff/
  10. spi/
  11. verilog/
  12. caravel
  13. openram_testchip
  14. .gitignore
  15. .gitmodules
  16. info.yaml
  17. LICENSE
  18. Makefile
  19. README.md
README.md

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