export STD_CELL_LIBRARY=sky130_fd_sc_ls | |
export STDCELLLIB=/home/philipp/libresilicon/StdCellLib | |
export OPENLANE_ROOT=$(readlink -f $(pwd)/../openlane ) | |
export OPENLANE_TAG=mpw-3a | |
export CARAVEL=$(pwd) | |
export CARAVEL_ROOT=$(pwd)/caravel | |
export PDK_ROOT=$(readlink -f $(pwd)/../pdk ) | |
export PDK_ROOT=$(pwd)/../pdk | |
export PATH=$PATH:$(readlink -f $(pwd)../openlane_summary/ ) | |