blob: 20e6fa56f37a664c78ccc2401c3bae50aba16c56 [file] [log] [blame]
export STDCELLLIB=/home/philipp/libresilicon/StdCellLib
export OPENLANE_ROOT=$(readlink -f $(pwd)/../openlane )
export OPENLANE_TAG=v0.15
export CARAVEL=$(pwd)
export CARAVEL_ROOT=$(pwd)/caravel
export PDK_ROOT=$(readlink -f $(pwd)/../pdk )
#export PDK_ROOT=$(pwd)/../pdk
export PATH=$PATH:$(readlink -f $(pwd)../openlane_summary/ )