commit 2beb4003461967b244638d55026afb29e9e8465e
author Philipp Gühring <pg@futureware.at> Mon May 17 17:23:02 2021 +0200
committer Philipp Gühring <pg@futureware.at> Mon May 17 17:23:02 2021 +0200
tree 6f8a2e2ef8121f985b73ab855cef4a4865972c13
parent 1ecfdd624f7935c9817b0ceb79cb20292918ee14

Updated README

README.md

diff --git a/README.md b/README.md
index 3706438..5435e4a 100644
--- a/README.md
+++ b/README.md
@@ -2,10 +2,35 @@
 
 [![License](https://img.shields.io/badge/License-Apache%202.0-blue.svg)](https://opensource.org/licenses/Apache-2.0) [![UPRJ_CI](https://github.com/efabless/caravel_project_example/actions/workflows/user_project_ci.yml/badge.svg)](https://github.com/efabless/caravel_project_example/actions/workflows/user_project_ci.yml) [![Caravel Build](https://github.com/efabless/caravel_project_example/actions/workflows/caravel_build.yml/badge.svg)](https://github.com/efabless/caravel_project_example/actions/workflows/caravel_build.yml)
 
-| :exclamation: Important Note            |
-|-----------------------------------------|
+# Libresilicon StdCellLib LS130 - SKY130 Test-wafer
 
-## Please fill in your project documentation in this README.md file 
+This project is a test-wafer which puts various LS130 cells into the user-area of a Caravel harness for taping the LS130 cells out on the Skywater 130nm process.
 
+The LS130 cells are generated with the https://github.com/thesourcerer8/StdCellLib flow (which uses Librecell's lclayout and lctime), using the Tech.SKY130 configuration.
 
-Refer to [README](docs/source/index.rst) for this sample project documentation. 
+The build report can be seen here: https://pdk.libresilicon.com/dist/StdCellLib_20201106_SKY130/Catalog/
+The cells were copied into this repository to avoid additional dependencies: https://github.com/thesourcerer8/caravel_stdcelllib_stdcells/tree/release/cells
+
+A generator was developed to generate a Verilog file for all the cells that places each cell once and connects it to the IOs of the harness:
+https://github.com/thesourcerer8/caravel_stdcelllib_stdcells_project/blob/release/scripts/generator.pl The script needs to be run from the Catalog directory of your StdCellLib. The output is then used as https://github.com/thesourcerer8/caravel-stdcelllib-stdcells/blob/release/verilog/rtl/user_proj_example.v
+
+In the end I adapted https://github.com/thesourcerer8/caravel_stdcelllib_stdcells_project/blob/release/openlane/user_proj_example/config.tcl to use the cells as blackbox cells.
+
+Build process:
+
+git clone git@github.com:thesourcerer8/caravel_stdcelllib_stdcells_project.git
+
+cd caravel_stdcelllib_stdcells_project
+
+# Now please adapt the pathes in the file env.sh where necessary
+. ./env.sh
+
+make install    # install caravel-lite
+make pdk        # clone and build pdk
+make openlane   # clone and build build openlane
+
+scripts/deploy2caravel.sh
+
+make user_proj_example
+
+Refer to [README](docs/source/index.rst) for the Caravel documentation.