Corrected signal names in user_analog_project_wrapper
diff --git a/checks/erase_box_user_analog_project_wrapper.gds.log b/checks/erase_box_user_analog_project_wrapper.gds.log new file mode 100644 index 0000000..0a415da --- /dev/null +++ b/checks/erase_box_user_analog_project_wrapper.gds.log
@@ -0,0 +1,85 @@ +/home/phardytx/Work/mpw2/gds//user_analog_project_wrapper.gds /home/phardytx/Work/mpw2/checks/user_analog_project_wrapper_erased.gds user_analog_project_wrapper + +Magic 8.3 revision 182 - Compiled on Sun Jul 18 15:49:58 UTC 2021. +Starting magic under Tcl interpreter +Using the terminal as the console. +Using NULL graphics device. +Processing system .magicrc file +Using technology "minimum", version 0.0 +"sky130(vendor)" is not one of the CIF input styles Magic knows. +Error: No style is set +The CIF input styles are: . +Don't know how to read GDS-II: +Nothing in "cifinput" section of tech file. +File user_analog_project_wrapper.mag couldn't be read +No such file or directory +Creating new cell +Root cell box: + width x height ( llx, lly ), ( urx, ury ) area (units^2) + +microns: 43.00 x 3520.00 (-43.00, 0.00 ), ( 0.00, 3520.00) 151360.00 +lambda: 43 x 3520 ( -43, 0 ), ( 0, 3520 ) 151360 +Root cell box: + width x height ( llx, lly ), ( urx, ury ) area (units^2) + +microns: 43.00 x 3520.00 ( 2920.00, 0.00 ), ( 2963.00, 3520.00) 151360.00 +lambda: 43 x 3520 ( 2920, 0 ), ( 2963, 3520 ) 151360 +Root cell box: + width x height ( llx, lly ), ( urx, ury ) area (units^2) + +microns: 3006.00 x 38.00 (-43.00, -38.00), ( 2963.00, 0.00 ) 114228.00 +lambda: 3006 x 38 ( -43, -38 ), ( 2963, 0 ) 114228 +Root cell box: + width x height ( llx, lly ), ( urx, ury ) area (units^2) + +microns: 3006.00 x 37.00 (-43.00, 3520.00), ( 2963.00, 3557.00) 111222.00 +lambda: 3006 x 37 ( -43, 3520 ), ( 2963, 3557 ) 111222 +can't read "errorCode": no such variable +Unrecognized layer: metal5 +Layer names are: + mag or magnet + f or fence + r or rotate + $ + * + errors + labels + subcell + connect +Unrecognized layer: metal4 +Layer names are: + mag or magnet + f or fence + r or rotate + $ + * + errors + labels + subcell + connect +Unrecognized layer: metal5 +Layer names are: + mag or magnet + f or fence + r or rotate + $ + * + errors + labels + subcell + connect +Unrecognized layer: metal4 +Layer names are: + mag or magnet + f or fence + r or rotate + $ + * + errors + labels + subcell + connect +No CIF/GDS output style set! +I/O error in writing file /home/phardytx/Work/mpw2/checks/user_analog_project_wrapper_erased.gds. +File may be incompletely written. +/home/phardytx/Work/mpw2/checks/user_analog_project_wrapper_erased.gds
diff --git a/checks/erase_box_user_analog_project_wrapper_empty.gds.log b/checks/erase_box_user_analog_project_wrapper_empty.gds.log new file mode 100644 index 0000000..50e58f7 --- /dev/null +++ b/checks/erase_box_user_analog_project_wrapper_empty.gds.log
@@ -0,0 +1,85 @@ +/home/phardytx/Work/mpw2/checks/user_analog_project_wrapper_empty.gds /home/phardytx/Work/mpw2/checks/user_analog_project_wrapper_empty_erased.gds user_analog_project_wrapper + +Magic 8.3 revision 182 - Compiled on Sun Jul 18 15:49:58 UTC 2021. +Starting magic under Tcl interpreter +Using the terminal as the console. +Using NULL graphics device. +Processing system .magicrc file +Using technology "minimum", version 0.0 +"sky130(vendor)" is not one of the CIF input styles Magic knows. +Error: No style is set +The CIF input styles are: . +Don't know how to read GDS-II: +Nothing in "cifinput" section of tech file. +File user_analog_project_wrapper.mag couldn't be read +No such file or directory +Creating new cell +Root cell box: + width x height ( llx, lly ), ( urx, ury ) area (units^2) + +microns: 43.00 x 3520.00 (-43.00, 0.00 ), ( 0.00, 3520.00) 151360.00 +lambda: 43 x 3520 ( -43, 0 ), ( 0, 3520 ) 151360 +Root cell box: + width x height ( llx, lly ), ( urx, ury ) area (units^2) + +microns: 43.00 x 3520.00 ( 2920.00, 0.00 ), ( 2963.00, 3520.00) 151360.00 +lambda: 43 x 3520 ( 2920, 0 ), ( 2963, 3520 ) 151360 +Root cell box: + width x height ( llx, lly ), ( urx, ury ) area (units^2) + +microns: 3006.00 x 38.00 (-43.00, -38.00), ( 2963.00, 0.00 ) 114228.00 +lambda: 3006 x 38 ( -43, -38 ), ( 2963, 0 ) 114228 +Root cell box: + width x height ( llx, lly ), ( urx, ury ) area (units^2) + +microns: 3006.00 x 37.00 (-43.00, 3520.00), ( 2963.00, 3557.00) 111222.00 +lambda: 3006 x 37 ( -43, 3520 ), ( 2963, 3557 ) 111222 +can't read "errorCode": no such variable +Unrecognized layer: metal5 +Layer names are: + mag or magnet + f or fence + r or rotate + $ + * + errors + labels + subcell + connect +Unrecognized layer: metal4 +Layer names are: + mag or magnet + f or fence + r or rotate + $ + * + errors + labels + subcell + connect +Unrecognized layer: metal5 +Layer names are: + mag or magnet + f or fence + r or rotate + $ + * + errors + labels + subcell + connect +Unrecognized layer: metal4 +Layer names are: + mag or magnet + f or fence + r or rotate + $ + * + errors + labels + subcell + connect +No CIF/GDS output style set! +I/O error in writing file /home/phardytx/Work/mpw2/checks/user_analog_project_wrapper_empty_erased.gds. +File may be incompletely written. +/home/phardytx/Work/mpw2/checks/user_analog_project_wrapper_empty_erased.gds
diff --git a/checks/full_log.log b/checks/full_log.log new file mode 100644 index 0000000..ff7480a --- /dev/null +++ b/checks/full_log.log
@@ -0,0 +1,91 @@ +FULL RUN LOG: + Executing Step 0 of 9: Extracting GDS Files +Step 0 done without fatal errors. + Executing Step 1 of 9: Project License Check +{{LICENSE COMPLIANCE PASSED}} Apache-2.0 LICENSE file was found in project root + SPDX COMPLIANCE Found 69 non-compliant files with the SPDX Standard. Check full log for more information +SPDX COMPLIANCE: NON-COMPLIANT FILES PREVIEW: ['/home/phardytx/Work/mpw2/README.md', '/home/phardytx/Work/mpw2/verilog/rtl/sky130_hilas_TopLevelProtectStructure.v', '/home/phardytx/Work/mpw2/xschem/example_por.sch', '/home/phardytx/Work/mpw2/xschem/test.data', '/home/phardytx/Work/mpw2/xschem/example_por.sym', '/home/phardytx/Work/mpw2/xschem/sky130_hilas_Trans4small.sym', '/home/phardytx/Work/mpw2/xschem/sky130_hilas_TopProtection.sch', '/home/phardytx/Work/mpw2/xschem/sky130_hilas_WTA4Stage01.sch', '/home/phardytx/Work/mpw2/xschem/user_analog_project_wrapper.sch', '/home/phardytx/Work/mpw2/xschem/sky130_hilas_Trans2med.sch', '/home/phardytx/Work/mpw2/xschem/sky130_hilas_DAC5bit01.sch', '/home/phardytx/Work/mpw2/xschem/sky130_hilas_Tgate4Single01.sym', '/home/phardytx/Work/mpw2/xschem/sky130_hilas_pFETLarge.sym', '/home/phardytx/Work/mpw2/xschem/sky130_hilas_LevelShift4InputUp.sch', '/home/phardytx/Work/mpw2/xschem/sky130_hilas_TA2SignalBiasCell.sym', '/home/phardytx/Work/mpw2/xschem/sky130_hilas_drainSelect01.sch', '/home/phardytx/Work/mpw2/xschem/sky130_hilas_TopLevelTestStructure.sch', '/home/phardytx/Work/mpw2/xschem/analog_wrapper_tb.sch', '/home/phardytx/Work/mpw2/xschem/sky130_hilas_nFETLarge.sym', '/home/phardytx/Work/mpw2/xschem/sky130_hilas_pFETLarge.sch'] + Executing Step 2 of 9: YAML File Check + YAML file valid! +Step 2 done without fatal errors. + Detected Project Type is "analog" + Executing Step 3 of 9: Project Compliance Checks +b'Going into /home/phardytx/Work/mpw2/caravel' +b'Removing manifest' +b'Fetching manifest' +b'Running sha1sum checks' + Manifest Checks Failed. Please rebase your Repository to the latest Caravel master. +verilog/rtl/DFFRAM.v: FAILED open or read +verilog/rtl/DFFRAMBB.v: FAILED open or read +verilog/rtl/__uprj_analog_netlists.v: FAILED open or read +verilog/rtl/__uprj_netlists.v: FAILED open or read +verilog/rtl/__user_analog_project_wrapper.v: FAILED open or read +verilog/rtl/__user_project_wrapper.v: FAILED open or read +verilog/rtl/caravan.v: FAILED open or read +verilog/rtl/caravan_netlists.v: FAILED open or read +verilog/rtl/caravel.v: FAILED open or read +verilog/rtl/caravel_clocking.v: FAILED open or read +verilog/rtl/chip_io.v: FAILED open or read +verilog/rtl/chip_io_alt.v: FAILED open or read +verilog/rtl/clock_div.v: FAILED open or read +verilog/rtl/convert_gpio_sigs.v: FAILED open or read +verilog/rtl/counter_timer_high.v: FAILED open or read +verilog/rtl/counter_timer_low.v: FAILED open or read +verilog/rtl/digital_pll.v: FAILED open or read +verilog/rtl/digital_pll_controller.v: FAILED open or read +verilog/rtl/gpio_control_block.v: FAILED open or read +verilog/rtl/gpio_wb.v: FAILED open or read +verilog/rtl/housekeeping_spi.v: FAILED open or read +verilog/rtl/la_wb.v: FAILED open or read +verilog/rtl/mem_wb.v: FAILED open or read +verilog/rtl/mgmt_core.v: FAILED open or read +verilog/rtl/mgmt_protect.v: FAILED open or read +verilog/rtl/mgmt_protect_hv.v: FAILED open or read +verilog/rtl/mgmt_soc.v: FAILED open or read +verilog/rtl/mprj2_logic_high.v: FAILED open or read +verilog/rtl/mprj_ctrl.v: FAILED open or read +verilog/rtl/mprj_io.v: FAILED open or read +verilog/rtl/mprj_logic_high.v: FAILED open or read +verilog/rtl/pads.v: FAILED open or read +verilog/rtl/picorv32.v: FAILED open or read +verilog/rtl/ring_osc2x13.v: FAILED open or read +verilog/rtl/simple_por.v: FAILED open or read +verilog/rtl/simple_spi_master.v: FAILED open or read +verilog/rtl/simpleuart.v: FAILED open or read +verilog/rtl/sky130_fd_sc_hvl__lsbufhv2lv_1_wrapped.v: FAILED open or read +verilog/rtl/spimemio.v: FAILED open or read +verilog/rtl/sram_1rw1r_32_256_8_sky130.v: FAILED open or read +verilog/rtl/storage.v: FAILED open or read +verilog/rtl/storage_bridge_wb.v: FAILED open or read +verilog/rtl/sysctrl.v: FAILED open or read +verilog/rtl/wb_intercon.v: FAILED open or read +scripts/set_user_id.py: FAILED open or read +scripts/generate_fill.py: FAILED open or read +scripts/compositor.py: FAILED open or read + Makefile Checks Passed. + Default config checks failed because: +The parameter organization_url in info.yaml is default +The parameter owner in info.yaml is default + Default Content checks failed because: +user_analog_project_wrapper.gds file is identical to default caravel_user_project file user_analog_project_wrapper.gds + Documentation Checks Passed. + Executing Step 4 of 9: Fuzzy Consistency Checks + Consistency Checks Failed+ Reason: Verilog file /home/phardytx/Work/mpw2/caravel/verilog/gl/caravan.v not found + Executing Step 5 of 9: XOR Consistency Checks + Running XOR Checks... + XOR Checks on GDS Failed, Reason: Either you didn't mount the docker, or you ran out of RAM. Otherwise, magic is broken and it segfaulted. Please check: /home/phardytx/Work/mpw2/checks/magic_xor.log +TEST FAILED AT STEP 5 + Executing Step 6 of 9: DRC Violations Checks + Running Magic DRC Checks... + DRC Checks on User Project GDS Passed! +Step 6 done without fatal errors. + Executing Step 7 of 9: KLayout DRC Violations Check + Running Klayout DRC Checks... + Klayout DRC Checks on User Project GDS Passed! +Step 7 done without fatal errors. + Executing Klayout offgrid check. + Klayout offgrid Checks on User Project GDS Passed! +Step 8 done without fatal errors. + Klayout metal minimum clear area density Checks on User Project GDS Passed! +Step 8 done without fatal errors. + SOME Checks FAILED !!!
diff --git a/checks/klayout_drc.log b/checks/klayout_drc.log new file mode 100644 index 0000000..80f089d --- /dev/null +++ b/checks/klayout_drc.log
@@ -0,0 +1,351 @@ +"_input" in: sky130A_mr.lydrc:88 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:89 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:90 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:91 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:92 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:93 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:94 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:95 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:96 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:97 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:98 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:99 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:100 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:101 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:102 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:103 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:104 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:105 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:106 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:107 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:108 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:110 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:111 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:113 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:114 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:116 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:117 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:119 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:120 +Elapsed: 0.040s +"_input" in: sky130A_mr.lydrc:122 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:123 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:125 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:127 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:128 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:129 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:130 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:131 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:132 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:133 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:134 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:135 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:136 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:137 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:138 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:139 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:140 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:141 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:142 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:143 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:144 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:145 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:146 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:147 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:148 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:149 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:150 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:151 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:152 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:153 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:154 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:155 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:156 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:157 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:158 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:159 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:160 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:161 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:162 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:163 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:164 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:165 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:166 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:167 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:168 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:169 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:170 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:171 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:172 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:173 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:174 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:175 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:176 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:177 +Elapsed: 0.000s +"_input" in: sky130A_mr.lydrc:178 +Elapsed: 0.010s +"_input" in: sky130A_mr.lydrc:179 +Elapsed: 0.000s +DRC section +FEOL section +"&" in: sky130A_mr.lydrc:203 +Elapsed: 0.030s +dnwell +"width_check" in: sky130A_mr.lydrc:207 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:207 +Elapsed: 0.000s +nwell +"width_check" in: sky130A_mr.lydrc:215 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:215 +Elapsed: 0.010s +"isolated_check" in: sky130A_mr.lydrc:216 +Elapsed: 0.000s +"_output" in: sky130A_mr.lydrc:216 +Elapsed: 0.010s +hvtp +"width_check" in: sky130A_mr.lydrc:235 +Elapsed: 0.000s +"_output" in: sky130A_mr.lydrc:235 +Elapsed: 0.010s +"isolated_check" in: sky130A_mr.lydrc:236 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:236 +Elapsed: 0.010s +htvr +"width_check" in: sky130A_mr.lydrc:243 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:243 +Elapsed: 0.000s +"isolated_check" in: sky130A_mr.lydrc:244 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:244 +Elapsed: 0.010s +lvtn +"isolated_check" in: sky130A_mr.lydrc:249 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:249 +Elapsed: 0.010s +ncm +"width_check" in: sky130A_mr.lydrc:261 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:261 +Elapsed: 0.000s +diff-tap +"+" in: sky130A_mr.lydrc:270 +Elapsed: 0.010s +"isolated_check" in: sky130A_mr.lydrc:280 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:280 +Elapsed: 0.010s +tunm +"width_check" in: sky130A_mr.lydrc:293 +Elapsed: 0.000s +"_output" in: sky130A_mr.lydrc:293 +Elapsed: 0.010s +"isolated_check" in: sky130A_mr.lydrc:294 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:294 +Elapsed: 0.000s +poly +"width_check" in: sky130A_mr.lydrc:303 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:303 +Elapsed: 0.010s +"-" in: sky130A_mr.lydrc:308 +Elapsed: 0.010s +"isolated_check" in: sky130A_mr.lydrc:308 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:308 +Elapsed: 0.000s +rpm +"width_check" in: sky130A_mr.lydrc:326 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:326 +Elapsed: 0.000s +"isolated_check" in: sky130A_mr.lydrc:327 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:327 +Elapsed: 0.010s +npc +"width_check" in: sky130A_mr.lydrc:360 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:360 +Elapsed: 0.000s +"isolated_check" in: sky130A_mr.lydrc:361 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:361 +Elapsed: 0.010s +licon +"interacting" in: sky130A_mr.lydrc:382 +Elapsed: 0.010s +"-" in: sky130A_mr.lydrc:382 +Elapsed: 0.020s +"edges" in: sky130A_mr.lydrc:382 +Elapsed: 0.060s +"with_length" in: sky130A_mr.lydrc:382 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:382 +Elapsed: 0.010s +"interacting" in: sky130A_mr.lydrc:383 +Elapsed: 0.010s +"&" in: sky130A_mr.lydrc:383 +Elapsed: 0.000s +"interacting" in: sky130A_mr.lydrc:383 +Elapsed: 0.020s +"&" in: sky130A_mr.lydrc:383 +Elapsed: 0.010s +"edges" in: sky130A_mr.lydrc:383 +Elapsed: 0.010s +"with_length" in: sky130A_mr.lydrc:383 +Elapsed: 0.010s +"interacting" in: sky130A_mr.lydrc:383 +Elapsed: 0.010s +"&" in: sky130A_mr.lydrc:383 +Elapsed: 0.010s +"edges" in: sky130A_mr.lydrc:383 +Elapsed: 0.010s +"with_length" in: sky130A_mr.lydrc:383 +Elapsed: 0.010s +"|" in: sky130A_mr.lydrc:383 +Elapsed: 0.000s +"not_interacting" in: sky130A_mr.lydrc:383 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:383 +Elapsed: 0.010s +"|" in: sky130A_mr.lydrc:411 +Elapsed: 0.000s +"&" in: sky130A_mr.lydrc:411 +Elapsed: 0.030s +"separation_check" in: sky130A_mr.lydrc:411 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:411 +Elapsed: 0.010s +vpp +capm +"width_check" in: sky130A_mr.lydrc:445 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:445 +Elapsed: 0.000s +"isolated_check" in: sky130A_mr.lydrc:446 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:446 +Elapsed: 0.010s +"interacting" in: sky130A_mr.lydrc:447 +Elapsed: 0.020s +"isolated_check" in: sky130A_mr.lydrc:447 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:447 +Elapsed: 0.000s +"enclosing_check" in: sky130A_mr.lydrc:448 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:448 +Elapsed: 0.010s +"enclosing_check" in: sky130A_mr.lydrc:449 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:449 +Elapsed: 0.000s +"separation_check" in: sky130A_mr.lydrc:450 +Elapsed: 0.020s +"_output" in: sky130A_mr.lydrc:450 +Elapsed: 0.000s +FEOL section +hvi +"width_check" in: sky130A_mr.lydrc:766 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:766 +Elapsed: 0.010s +hvntm +"width_check" in: sky130A_mr.lydrc:792 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:792 +Elapsed: 0.000s +"isolated_check" in: sky130A_mr.lydrc:793 +Elapsed: 0.010s +"_output" in: sky130A_mr.lydrc:793 +Elapsed: 0.010s +Writing report database: /home/phardytx/Work/mpw2/checks/user_analog_project_wrapper_klayout_drc.xml .. +Total run time: 1.360s
diff --git a/checks/klayout_drc_total.txt b/checks/klayout_drc_total.txt new file mode 100644 index 0000000..c227083 --- /dev/null +++ b/checks/klayout_drc_total.txt
@@ -0,0 +1 @@ +0 \ No newline at end of file
diff --git a/checks/magic_drc.log b/checks/magic_drc.log new file mode 100644 index 0000000..1679ac4 --- /dev/null +++ b/checks/magic_drc.log
@@ -0,0 +1,30 @@ + +Magic 8.3 revision 182 - Compiled on Sun Jul 18 15:49:58 UTC 2021. +Starting magic under Tcl interpreter +Using the terminal as the console. +Using NULL graphics device. +Processing system .magicrc file +Sourcing design .magicrc for technology sky130A ... +2 Magic internal units = 1 Lambda +Could not find file '/home/phardytx/Work/mpw2/sky130A/libs.tech/magic/sky130A.tech' in any of these directories: + . /build/lib/magic/sys /build/lib/magic/sys/current +Error parsing ".magicrc": couldn't read file "/home/phardytx/Work/mpw2/sky130A/libs.tech/magic/sky130A.tcl": no such file or directory +Bad local startup file ".magicrc", continuing without. +Scaled tech values by 2 / 1 to match internal grid scaling +Loading "/usr/local/bin/drc_checks/magic_drc_check.tcl" from command line. +Don't know how to read GDS-II: +Nothing in "cifinput" section of tech file. +[INFO]: Loading user_analog_project_wrapper + +File user_analog_project_wrapper.mag couldn't be read +No such file or directory +Creating new cell +"drc(full)" is not one of the DRC styles Magic knows. +The current style is "default". +The DRC styles are: default. +No errors found. +[INFO]: COUNT: 0 +[INFO]: Should be divided by 3 or 4 +[INFO]: DRC Checking DONE (/home/phardytx/Work/mpw2/checks/user_analog_project_wrapper.magic.drc) +[INFO]: Saving mag view with DRC errors(/home/phardytx/Work/mpw2/checks/user_analog_project_wrapper.magic.drc.mag) +[INFO]: Saved
diff --git a/checks/manifest_check.log b/checks/manifest_check.log new file mode 100644 index 0000000..bbc1a19 --- /dev/null +++ b/checks/manifest_check.log
@@ -0,0 +1,47 @@ +verilog/rtl/DFFRAM.v: FAILED open or read +verilog/rtl/DFFRAMBB.v: FAILED open or read +verilog/rtl/__uprj_analog_netlists.v: FAILED open or read +verilog/rtl/__uprj_netlists.v: FAILED open or read +verilog/rtl/__user_analog_project_wrapper.v: FAILED open or read +verilog/rtl/__user_project_wrapper.v: FAILED open or read +verilog/rtl/caravan.v: FAILED open or read +verilog/rtl/caravan_netlists.v: FAILED open or read +verilog/rtl/caravel.v: FAILED open or read +verilog/rtl/caravel_clocking.v: FAILED open or read +verilog/rtl/chip_io.v: FAILED open or read +verilog/rtl/chip_io_alt.v: FAILED open or read +verilog/rtl/clock_div.v: FAILED open or read +verilog/rtl/convert_gpio_sigs.v: FAILED open or read +verilog/rtl/counter_timer_high.v: FAILED open or read +verilog/rtl/counter_timer_low.v: FAILED open or read +verilog/rtl/digital_pll.v: FAILED open or read +verilog/rtl/digital_pll_controller.v: FAILED open or read +verilog/rtl/gpio_control_block.v: FAILED open or read +verilog/rtl/gpio_wb.v: FAILED open or read +verilog/rtl/housekeeping_spi.v: FAILED open or read +verilog/rtl/la_wb.v: FAILED open or read +verilog/rtl/mem_wb.v: FAILED open or read +verilog/rtl/mgmt_core.v: FAILED open or read +verilog/rtl/mgmt_protect.v: FAILED open or read +verilog/rtl/mgmt_protect_hv.v: FAILED open or read +verilog/rtl/mgmt_soc.v: FAILED open or read +verilog/rtl/mprj2_logic_high.v: FAILED open or read +verilog/rtl/mprj_ctrl.v: FAILED open or read +verilog/rtl/mprj_io.v: FAILED open or read +verilog/rtl/mprj_logic_high.v: FAILED open or read +verilog/rtl/pads.v: FAILED open or read +verilog/rtl/picorv32.v: FAILED open or read +verilog/rtl/ring_osc2x13.v: FAILED open or read +verilog/rtl/simple_por.v: FAILED open or read +verilog/rtl/simple_spi_master.v: FAILED open or read +verilog/rtl/simpleuart.v: FAILED open or read +verilog/rtl/sky130_fd_sc_hvl__lsbufhv2lv_1_wrapped.v: FAILED open or read +verilog/rtl/spimemio.v: FAILED open or read +verilog/rtl/sram_1rw1r_32_256_8_sky130.v: FAILED open or read +verilog/rtl/storage.v: FAILED open or read +verilog/rtl/storage_bridge_wb.v: FAILED open or read +verilog/rtl/sysctrl.v: FAILED open or read +verilog/rtl/wb_intercon.v: FAILED open or read +scripts/set_user_id.py: FAILED open or read +scripts/generate_fill.py: FAILED open or read +scripts/compositor.py: FAILED open or read
diff --git a/checks/met_min_ca_density_check.log b/checks/met_min_ca_density_check.log new file mode 100644 index 0000000..6aa9b7a --- /dev/null +++ b/checks/met_min_ca_density_check.log
@@ -0,0 +1,6 @@ +li1_ca_density is 0.9998641619415474 +m1_ca_density is 0.9997733599490193 +m2_ca_density is 0.9997981502325265 +m3_ca_density is 0.9865330887054405 +m4_ca_density is 0.9773941526867023 +m5_ca_density is 0.9995310438662632
diff --git a/checks/met_min_ca_density_check.xml b/checks/met_min_ca_density_check.xml new file mode 100644 index 0000000..f19e6c3 --- /dev/null +++ b/checks/met_min_ca_density_check.xml
@@ -0,0 +1,21 @@ +<?xml version="1.0" encoding="utf-8"?> +<report-database> + <description>Density Checks</description> + <original-file/> + <generator>drc: script='/usr/local/bin/klayout_drc_checks/met_min_ca_density.lydrc'</generator> + <top-cell>user_analog_project_wrapper</top-cell> + <tags> + </tags> + <categories> + </categories> + <cells> + <cell> + <name>user_analog_project_wrapper</name> + <variant/> + <references> + </references> + </cell> + </cells> + <items> + </items> +</report-database>
diff --git a/checks/met_min_ca_density_total.txt b/checks/met_min_ca_density_total.txt new file mode 100644 index 0000000..c227083 --- /dev/null +++ b/checks/met_min_ca_density_total.txt
@@ -0,0 +1 @@ +0 \ No newline at end of file
diff --git a/checks/offgrid_check.log b/checks/offgrid_check.log new file mode 100644 index 0000000..40a2c11 --- /dev/null +++ b/checks/offgrid_check.log
@@ -0,0 +1 @@ +{{ OFFGRID-ANGLES section }}
diff --git a/checks/offgrid_check.xml b/checks/offgrid_check.xml new file mode 100644 index 0000000..b4d3510 --- /dev/null +++ b/checks/offgrid_check.xml
@@ -0,0 +1,483 @@ +<?xml version="1.0" encoding="utf-8"?> +<report-database> + <description>SKY130 DRC runset</description> + <original-file/> + <generator>drc: script='/usr/local/bin/klayout_drc_checks/offgrid.lydrc'</generator> + <top-cell>user_analog_project_wrapper</top-cell> + <tags> + </tags> + <categories> + <category> + <name>dnwell_OFFGRID</name> + <description>x.1b : OFFGRID vertex on dnwell</description> + <categories> + </categories> + </category> + <category> + <name>dnwell_angle</name> + <description>x.3a : non 45 degree angle dnwell</description> + <categories> + </categories> + </category> + <category> + <name>nwell_OFFGRID</name> + <description>x.1b : OFFGRID vertex on nwell</description> + <categories> + </categories> + </category> + <category> + <name>nwell_angle</name> + <description>x.3a : non 45 degree angle nwell</description> + <categories> + </categories> + </category> + <category> + <name>pwbm_OFFGRID</name> + <description>x.1b : OFFGRID vertex on pwbm</description> + <categories> + </categories> + </category> + <category> + <name>pwbm_angle</name> + <description>x.3a : non 45 degree angle pwbm</description> + <categories> + </categories> + </category> + <category> + <name>pwde_OFFGRID</name> + <description>x.1b : OFFGRID vertex on pwde</description> + <categories> + </categories> + </category> + <category> + <name>pwde_angle</name> + <description>x.3a : non 45 degree angle pwde</description> + <categories> + </categories> + </category> + <category> + <name>hvtp_OFFGRID</name> + <description>x.1b : OFFGRID vertex on hvtp</description> + <categories> + </categories> + </category> + <category> + <name>hvtp_angle</name> + <description>x.3a : non 45 degree angle hvtp</description> + <categories> + </categories> + </category> + <category> + <name>hvtr_OFFGRID</name> + <description>x.1b : OFFGRID vertex on hvtr</description> + <categories> + </categories> + </category> + <category> + <name>hvtr_angle</name> + <description>x.3a : non 45 degree angle hvtr</description> + <categories> + </categories> + </category> + <category> + <name>lvtn_OFFGRID</name> + <description>x.1b : OFFGRID vertex on lvtn</description> + <categories> + </categories> + </category> + <category> + <name>lvtn_angle</name> + <description>x.3a : non 45 degree angle lvtn</description> + <categories> + </categories> + </category> + <category> + <name>ncm_OFFGRID</name> + <description>x.1b : OFFGRID vertex on ncm</description> + <categories> + </categories> + </category> + <category> + <name>ncm_angle</name> + <description>x.3a : non 45 degree angle ncm</description> + <categories> + </categories> + </category> + <category> + <name>diff_OFFGRID</name> + <description>x.1b : OFFGRID vertex on diff</description> + <categories> + </categories> + </category> + <category> + <name>tap_OFFGRID</name> + <description>x.1b : OFFGRID vertex on tap</description> + <categories> + </categories> + </category> + <category> + <name>diff_angle</name> + <description>x.2 : non 90 degree angle diff</description> + <categories> + </categories> + </category> + <category> + <name>diff_angle</name> + <description>x.2c : non 45 degree angle diff</description> + <categories> + </categories> + </category> + <category> + <name>tap_angle</name> + <description>x.2 : non 90 degree angle tap</description> + <categories> + </categories> + </category> + <category> + <name>tap_angle</name> + <description>x.2c : non 45 degree angle tap</description> + <categories> + </categories> + </category> + <category> + <name>tunm_OFFGRID</name> + <description>x.1b : OFFGRID vertex on tunm</description> + <categories> + </categories> + </category> + <category> + <name>tunm_angle</name> + <description>x.3a : non 45 degree angle tunm</description> + <categories> + </categories> + </category> + <category> + <name>poly_OFFGRID</name> + <description>x.1b : OFFGRID vertex on poly</description> + <categories> + </categories> + </category> + <category> + <name>poly_angle</name> + <description>x.2 : non 90 degree angle poly</description> + <categories> + </categories> + </category> + <category> + <name>rpm_OFFGRID</name> + <description>x.1b : OFFGRID vertex on rpm</description> + <categories> + </categories> + </category> + <category> + <name>rpm_angle</name> + <description>x.3a : non 45 degree angle rpm</description> + <categories> + </categories> + </category> + <category> + <name>npc_OFFGRID</name> + <description>x.1b : OFFGRID vertex on npc</description> + <categories> + </categories> + </category> + <category> + <name>npc_angle</name> + <description>x.3a : non 45 degree angle npc</description> + <categories> + </categories> + </category> + <category> + <name>nsdm_OFFGRID</name> + <description>x.1b : OFFGRID vertex on nsdm</description> + <categories> + </categories> + </category> + <category> + <name>nsdm_angle</name> + <description>x.3a : non 45 degree angle nsdm</description> + <categories> + </categories> + </category> + <category> + <name>psdm_OFFGRID</name> + <description>x.1b : OFFGRID vertex on psdm</description> + <categories> + </categories> + </category> + <category> + <name>psdm_angle</name> + <description>x.3a : non 45 degree angle psdm</description> + <categories> + </categories> + </category> + <category> + <name>licon_OFFGRID</name> + <description>x.1b : OFFGRID vertex on licon</description> + <categories> + </categories> + </category> + <category> + <name>licon_angle</name> + <description>x.2 : non 90 degree angle licon</description> + <categories> + </categories> + </category> + <category> + <name>li_OFFGRID</name> + <description>x.1b : OFFGRID vertex on li</description> + <categories> + </categories> + </category> + <category> + <name>li_angle</name> + <description>x.3a : non 45 degree angle li</description> + <categories> + </categories> + </category> + <category> + <name>ct_OFFGRID</name> + <description>x.1b : OFFGRID vertex on mcon</description> + <categories> + </categories> + </category> + <category> + <name>ct_angle</name> + <description>x.2 : non 90 degree angle mcon</description> + <categories> + </categories> + </category> + <category> + <name>vpp_OFFGRID</name> + <description>x.1b : OFFGRID vertex on vpp</description> + <categories> + </categories> + </category> + <category> + <name>vpp_angle</name> + <description>x.3a : non 45 degree angle vpp</description> + <categories> + </categories> + </category> + <category> + <name>m1_OFFGRID</name> + <description>x.1b : OFFGRID vertex on m1</description> + <categories> + </categories> + </category> + <category> + <name>m1_angle</name> + <description>x.3a : non 45 degree angle m1</description> + <categories> + </categories> + </category> + <category> + <name>via_OFFGRID</name> + <description>x.1b : OFFGRID vertex on via</description> + <categories> + </categories> + </category> + <category> + <name>via_angle</name> + <description>x.2 : non 90 degree angle via</description> + <categories> + </categories> + </category> + <category> + <name>m2_OFFGRID</name> + <description>x.1b : OFFGRID vertex on m2</description> + <categories> + </categories> + </category> + <category> + <name>m2_angle</name> + <description>x.3a : non 45 degree angle m2</description> + <categories> + </categories> + </category> + <category> + <name>via2_OFFGRID</name> + <description>x.1b : OFFGRID vertex on via2</description> + <categories> + </categories> + </category> + <category> + <name>via2_angle</name> + <description>x.2 : non 90 degree angle via2</description> + <categories> + </categories> + </category> + <category> + <name>m3_OFFGRID</name> + <description>x.1b : OFFGRID vertex on m3</description> + <categories> + </categories> + </category> + <category> + <name>m3_angle</name> + <description>x.3a : non 45 degree angle m3</description> + <categories> + </categories> + </category> + <category> + <name>via3_OFFGRID</name> + <description>x.1b : OFFGRID vertex on via3</description> + <categories> + </categories> + </category> + <category> + <name>via3_angle</name> + <description>x.2 : non 90 degree angle via3</description> + <categories> + </categories> + </category> + <category> + <name>nsm_OFFGRID</name> + <description>x.1b : OFFGRID vertex on nsm</description> + <categories> + </categories> + </category> + <category> + <name>nsm_angle</name> + <description>x.3a : non 45 degree angle nsm</description> + <categories> + </categories> + </category> + <category> + <name>m4_OFFGRID</name> + <description>x.1b : OFFGRID vertex on m4</description> + <categories> + </categories> + </category> + <category> + <name>m4_angle</name> + <description>x.3a : non 45 degree angle m4</description> + <categories> + </categories> + </category> + <category> + <name>via4_OFFGRID</name> + <description>x.1b : OFFGRID vertex on via4</description> + <categories> + </categories> + </category> + <category> + <name>via4_angle</name> + <description>x.2 : non 90 degree angle via4</description> + <categories> + </categories> + </category> + <category> + <name>m5_OFFGRID</name> + <description>x.1b : OFFGRID vertex on m5</description> + <categories> + </categories> + </category> + <category> + <name>m5_angle</name> + <description>x.3a : non 45 degree angle m5</description> + <categories> + </categories> + </category> + <category> + <name>pad_OFFGRID</name> + <description>x.1b : OFFGRID vertex on pad</description> + <categories> + </categories> + </category> + <category> + <name>pad_angle</name> + <description>x.3a : non 45 degree angle pad</description> + <categories> + </categories> + </category> + <category> + <name>mf_OFFGRID</name> + <description>x.1b : OFFGRID vertex on mf</description> + <categories> + </categories> + </category> + <category> + <name>mf_angle</name> + <description>x.2 : non 90 degree angle mf</description> + <categories> + </categories> + </category> + <category> + <name>hvi_OFFGRID</name> + <description>x.1b : OFFGRID vertex on hvi</description> + <categories> + </categories> + </category> + <category> + <name>hvi_angle</name> + <description>x.3a : non 45 degree angle hvi</description> + <categories> + </categories> + </category> + <category> + <name>hvntm_OFFGRID</name> + <description>x.1b : OFFGRID vertex on hvntm</description> + <categories> + </categories> + </category> + <category> + <name>hvntm_angle</name> + <description>x.3a : non 45 degree angle hvntm</description> + <categories> + </categories> + </category> + <category> + <name>vhvi_OFFGRID</name> + <description>x.1b : OFFGRID vertex on vhvi</description> + <categories> + </categories> + </category> + <category> + <name>vhvi_angle</name> + <description>x.3a : non 45 degree angle vhvi</description> + <categories> + </categories> + </category> + <category> + <name>uhvi_OFFGRID</name> + <description>x.1b : OFFGRID vertex on uhvi</description> + <categories> + </categories> + </category> + <category> + <name>uhvi_angle</name> + <description>x.3a : non 45 degree angle uhvi</description> + <categories> + </categories> + </category> + <category> + <name>pwell_rs_OFFGRID</name> + <description>x.1b : OFFGRID vertex on pwell_rs</description> + <categories> + </categories> + </category> + <category> + <name>pwell_rs_angle</name> + <description>x.3a : non 45 degree angle pwell_rs</description> + <categories> + </categories> + </category> + <category> + <name>areaid_re_OFFGRID</name> + <description>x.1b : OFFGRID vertex on areaid.re</description> + <categories> + </categories> + </category> + </categories> + <cells> + <cell> + <name>user_analog_project_wrapper</name> + <variant/> + <references> + </references> + </cell> + </cells> + <items> + </items> +</report-database>
diff --git a/checks/offgrid_total.txt b/checks/offgrid_total.txt new file mode 100644 index 0000000..c227083 --- /dev/null +++ b/checks/offgrid_total.txt
@@ -0,0 +1 @@ +0 \ No newline at end of file
diff --git a/checks/spdx_compliance_report.log b/checks/spdx_compliance_report.log new file mode 100644 index 0000000..b0dcaf6 --- /dev/null +++ b/checks/spdx_compliance_report.log
@@ -0,0 +1,71 @@ +FULL RUN LOG: +SPDX NON-COMPLIANT FILES +/home/phardytx/Work/mpw2/README.md +/home/phardytx/Work/mpw2/verilog/rtl/sky130_hilas_TopLevelProtectStructure.v +/home/phardytx/Work/mpw2/xschem/example_por.sch +/home/phardytx/Work/mpw2/xschem/test.data +/home/phardytx/Work/mpw2/xschem/example_por.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_Trans4small.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_TopProtection.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_WTA4Stage01.sch +/home/phardytx/Work/mpw2/xschem/user_analog_project_wrapper.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_Trans2med.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_DAC5bit01.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_Tgate4Single01.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_pFETLarge.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_LevelShift4InputUp.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_TA2SignalBiasCell.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_drainSelect01.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_TopLevelTestStructure.sch +/home/phardytx/Work/mpw2/xschem/analog_wrapper_tb.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_nFETLarge.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_pFETLarge.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_LeftProtection.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_VinjDecode2to4.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_polyresistorGND.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_WTA4Stage01.sym +/home/phardytx/Work/mpw2/xschem/example_por_tb.spice.orig +/home/phardytx/Work/mpw2/xschem/sky130_hilas_FGBiasWeakGate2x1cell.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_FGtrans2x1cell.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_TA2Cell_1FG_Strong.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_cellAttempt01.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_FGtrans2x1cell.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_TA2Cell_1FG.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_polyresistorGND.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_Tgate4Double01.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_Tgate4Single01.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_DAC5bit01.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_drainSelect01.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_VinjDiodeProtect01.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_VinjDecode2to4.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_capacitorArray01.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_RightProtection.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_Trans2med.sym +/home/phardytx/Work/mpw2/xschem/xschemrc +/home/phardytx/Work/mpw2/xschem/sky130_hilas_swc4x1BiasCell.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_LeftProtection.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_LevelShift4InputUp.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_TopLevelProtectStructure.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_TA2Cell_NoFG.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_cellAttempt01.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_nFETLarge.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_TA2Cell_1FG_Strong.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_TopLevelTestStructure.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_Tgate4Double01.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_TA2SignalBiasCell.sch +/home/phardytx/Work/mpw2/xschem/.spiceinit +/home/phardytx/Work/mpw2/xschem/sky130_hilas_FGcharacterization01.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_capacitorArray01.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_TA2Cell_NoFG.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_FGBiasWeakGate2x1cell.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_VinjDiodeProtect01.sym +/home/phardytx/Work/mpw2/xschem/user_analog_project_wrapper.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_FGcharacterization01.sch +/home/phardytx/Work/mpw2/xschem/example_por_tb.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_RightProtection.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_TopProtection.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_swc4x1BiasCell.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_swc4x2cell.sym +/home/phardytx/Work/mpw2/xschem/sky130_hilas_Trans4small.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_swc4x2cell.sch +/home/phardytx/Work/mpw2/xschem/sky130_hilas_TA2Cell_1FG.sym
diff --git a/checks/user_analog_project_wrapper.magic.drc b/checks/user_analog_project_wrapper.magic.drc new file mode 100644 index 0000000..829b9d5 --- /dev/null +++ b/checks/user_analog_project_wrapper.magic.drc
@@ -0,0 +1,5 @@ +user_analog_project_wrapper +---------------------------------------- +[INFO]: COUNT: 0 +[INFO]: Should be divided by 3 or 4 +
diff --git a/checks/user_analog_project_wrapper.magic.drc.mag b/checks/user_analog_project_wrapper.magic.drc.mag new file mode 100644 index 0000000..bc7865b --- /dev/null +++ b/checks/user_analog_project_wrapper.magic.drc.mag
@@ -0,0 +1,7 @@ +magic +tech minimum +magscale 1 2 +timestamp 0 +<< checkpaint >> +rect 0 0 1 1 +<< end >>
diff --git a/checks/user_analog_project_wrapper_empty.gds b/checks/user_analog_project_wrapper_empty.gds new file mode 100644 index 0000000..6bb65fc --- /dev/null +++ b/checks/user_analog_project_wrapper_empty.gds Binary files differ
diff --git a/checks/user_analog_project_wrapper_empty_erased.gds b/checks/user_analog_project_wrapper_empty_erased.gds new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/checks/user_analog_project_wrapper_empty_erased.gds
diff --git a/checks/user_analog_project_wrapper_erased.gds b/checks/user_analog_project_wrapper_erased.gds new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/checks/user_analog_project_wrapper_erased.gds
diff --git a/checks/user_analog_project_wrapper_klayout_drc.xml b/checks/user_analog_project_wrapper_klayout_drc.xml new file mode 100644 index 0000000..097b521 --- /dev/null +++ b/checks/user_analog_project_wrapper_klayout_drc.xml
@@ -0,0 +1,201 @@ +<?xml version="1.0" encoding="utf-8"?> +<report-database> + <description>SKY130 DRC runset</description> + <original-file/> + <generator>drc: script='/usr/local/bin/drc_checks/../tech-files/sky130A_mr.lydrc'</generator> + <top-cell>user_analog_project_wrapper</top-cell> + <tags> + </tags> + <categories> + <category> + <name>dnwell.2</name> + <description>dnwell.2 : min. dnwell width : 3.0um</description> + <categories> + </categories> + </category> + <category> + <name>nwell.1</name> + <description>nwell.1 : min. nwell width : 0.84um</description> + <categories> + </categories> + </category> + <category> + <name>nwell.2a</name> + <description>nwell.2a : min. nwell spacing (merged if less) : 1.27um</description> + <categories> + </categories> + </category> + <category> + <name>hvtp.1</name> + <description>hvtp.1 : min. hvtp width : 0.38um</description> + <categories> + </categories> + </category> + <category> + <name>hvtp.2</name> + <description>hvtp.2 : min. hvtp spacing : 0.38um</description> + <categories> + </categories> + </category> + <category> + <name>hvtr.1</name> + <description>hvtr.1 : min. hvtr width : 0.38um</description> + <categories> + </categories> + </category> + <category> + <name>hvtr.2</name> + <description>hvtr.2 : min. hvtr spacing : 0.38um</description> + <categories> + </categories> + </category> + <category> + <name>lvtn.2</name> + <description>lvtn.2 : min. lvtn spacing : 0.38um</description> + <categories> + </categories> + </category> + <category> + <name>ncm.1</name> + <description>ncm.1 : min. ncm width : 0.38um</description> + <categories> + </categories> + </category> + <category> + <name>difftap.3</name> + <description>difftap.3 : min. difftap spacing : 0.27um</description> + <categories> + </categories> + </category> + <category> + <name>tunm.1</name> + <description>tunm.1 : min. tunm width : 0.41um</description> + <categories> + </categories> + </category> + <category> + <name>tunm.2</name> + <description>tunm.2 : min. tunm spacing : 0.5um</description> + <categories> + </categories> + </category> + <category> + <name>poly.1a</name> + <description>poly.1a : min. poly width : 0.15um</description> + <categories> + </categories> + </category> + <category> + <name>poly.2</name> + <description>poly.2 : min. poly spacing : 0.21um</description> + <categories> + </categories> + </category> + <category> + <name>rpm.1a</name> + <description>rpm.1a : min. rpm width : 1.27um</description> + <categories> + </categories> + </category> + <category> + <name>rpm.2</name> + <description>rpm.2 : min. rpm spacing : 0.84um</description> + <categories> + </categories> + </category> + <category> + <name>npc.1</name> + <description>npc.1 : min. npc width : 0.27um</description> + <categories> + </categories> + </category> + <category> + <name>npc.2</name> + <description>npc.2 : min. npc spacing, should be mnually merge if less : 0.27um</description> + <categories> + </categories> + </category> + <category> + <name>licon.1</name> + <description>licon.1 : minimum/maximum width of licon : 0.17um</description> + <categories> + </categories> + </category> + <category> + <name>licon.1b/c</name> + <description>licon.1b/c : minimum/maximum width/length of licon inside poly resistor : 2.0/0.19um</description> + <categories> + </categories> + </category> + <category> + <name>licon.13</name> + <description>licon.13 : min. difftap licon spacing to npc : 0.09um</description> + <categories> + </categories> + </category> + <category> + <name>capm.1</name> + <description>capm.1 : min. capm width : 1.0um</description> + <categories> + </categories> + </category> + <category> + <name>capm.2a</name> + <description>capm.2a : min. capm spacing : 0.84um</description> + <categories> + </categories> + </category> + <category> + <name>capm.2b</name> + <description>capm.2b : min. capm spacing : 1.2um</description> + <categories> + </categories> + </category> + <category> + <name>capm.3</name> + <description>capm.3 : min. m2 enclosure of capm : 0.14um</description> + <categories> + </categories> + </category> + <category> + <name>capm.4</name> + <description>capm.4 : min. capm enclosure of via2 : 0.14um</description> + <categories> + </categories> + </category> + <category> + <name>capm.5</name> + <description>capm.5 : min. capm spacing to via2 : 0.14um</description> + <categories> + </categories> + </category> + <category> + <name>hvi.1</name> + <description>hvi.1 : min. hvi width : 0.6um</description> + <categories> + </categories> + </category> + <category> + <name>hvntm.1</name> + <description>hvntm.1 : min. hvntm width : 0.7um</description> + <categories> + </categories> + </category> + <category> + <name>hvntm.2</name> + <description>hvntm.2 : min. hvntm spacing : 0.7um</description> + <categories> + </categories> + </category> + </categories> + <cells> + <cell> + <name>user_analog_project_wrapper</name> + <variant/> + <references> + </references> + </cell> + </cells> + <items> + </items> +</report-database>
diff --git a/checks/xor.log b/checks/xor.log new file mode 100644 index 0000000..981a2a9 --- /dev/null +++ b/checks/xor.log
@@ -0,0 +1,11 @@ +First Layout: /home/phardytx/Work/mpw2/checks/user_analog_project_wrapper_empty_erased.gds +Second Layout: /home/phardytx/Work/mpw2/checks/user_analog_project_wrapper_erased.gds +Design Name: xor_target +Output GDS will be: /home/phardytx/Work/mpw2/checks/user_analog_project_wrapper.xor.gds +Reading /home/phardytx/Work/mpw2/checks/user_analog_project_wrapper_empty_erased.gds .. +ERROR: In /usr/local/bin/xor_checks/xor.drc: Stream has unknown format: /home/phardytx/Work/mpw2/checks/user_analog_project_wrapper_empty_erased.gds in Layout::read +ERROR: Stream has unknown format: /home/phardytx/Work/mpw2/checks/user_analog_project_wrapper_empty_erased.gds in Layout::read in MacroInterpreter::execute + /usr/local/bin/xor_checks/xor.drc:15:in `execute_drc' + :/built-in-macros/drc_interpreters.lym:18:in `instance_eval' + :/built-in-macros/drc_interpreters.lym:18:in `execute_drc' + :/built-in-macros/drc_interpreters.lym:92:in `execute'
diff --git a/gds/.magicrc b/gds/.magicrc new file mode 100644 index 0000000..67cdbf8 --- /dev/null +++ b/gds/.magicrc
@@ -0,0 +1,96 @@ +# SPDX-FileCopyrightText: 2020 Efabless Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +# SPDX-License-Identifier: Apache-2.0 + +puts stdout "Sourcing design .magicrc for technology sky130A ..." + +# Put grid on 0.005 pitch. This is important, as some commands don't +# rescale the grid automatically (such as lef read?). + +set scalefac [tech lambda] +if {[lindex $scalefac 1] < 2} { + scalegrid 1 2 +} + +drc off +drc euclidean on + +# Allow override of PDK path from environment variable PDKPATH +if {[catch {set PDKPATH $env(PDKPATH)}]} { + set PDKPATH "$::env(PDK_ROOT)/sky130A" +} + +# loading technology +tech load $PDKPATH/libs.tech/magic/sky130A.tech + +# load device generator +source $PDKPATH/libs.tech/magic/sky130A.tcl + +# load bind keys (optional) +# source $PDKPATH/libs.tech/magic/sky130A-BindKeys + +# set units to lambda grid +snap lambda + +# set sky130 standard power, ground, and substrate names +set VDD VPWR +set GND VGND +set SUB VSUBS + +# Allow override of type of magic library views used, "mag" or "maglef", +# from environment variable MAGTYPE + +if {[catch {set MAGTYPE $env(MAGTYPE)}]} { + set MAGTYPE maglef +} + + path search [concat "../$MAGTYPE" [path search]] + + +# add path to reference cells +if {[file isdir ${PDKPATH}/libs.ref/${MAGTYPE}]} { + addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_pr + addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_io + addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hd + addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hdll + addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hs + addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_hvl + addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_lp + addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_ls + addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_fd_sc_ms + addpath ${PDKPATH}/libs.ref/${MAGTYPE}/sky130_osu_sc + addpath ${PDKPATH}/libs.ref/mag/sky130_ml_xx_hd +} else { + addpath ${PDKPATH}/libs.ref/sky130_fd_pr/${MAGTYPE} + addpath ${PDKPATH}/libs.ref/sky130_fd_io/${MAGTYPE} + addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hd/${MAGTYPE} + addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hdll/${MAGTYPE} + addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hs/${MAGTYPE} + addpath ${PDKPATH}/libs.ref/sky130_fd_sc_hvl/${MAGTYPE} + addpath ${PDKPATH}/libs.ref/sky130_fd_sc_lp/${MAGTYPE} + addpath ${PDKPATH}/libs.ref/sky130_fd_sc_ls/${MAGTYPE} + addpath ${PDKPATH}/libs.ref/sky130_fd_sc_ms/${MAGTYPE} + addpath ${PDKPATH}/libs.ref/sky130_osu_sc/${MAGTYPE} + addpath ${PDKPATH}/libs.ref/sky130_ml_xx_hd/mag +} + +addpath hexdigits + +# add path to GDS cells + +# add path to IP from catalog. This procedure defined in the PDK script. +catch {magic::query_mylib_ip} +# add path to local IP from user design space. Defined in the PDK script. +catch {magic::query_my_projects}
diff --git a/verilog/rtl/user_analog_project_wrapper.v b/verilog/rtl/user_analog_project_wrapper.v index 61604f1..524818c 100644 --- a/verilog/rtl/user_analog_project_wrapper.v +++ b/verilog/rtl/user_analog_project_wrapper.v
@@ -60,7 +60,7 @@ * same as caravel but skips over the analog I/O: * * io_in/out/oeb/in_3v3 [26:14] <---> mprj_io[37:25] - * io_in/out/oeb/in_3v3 [13:0] <---> mprj_io[13:0] + * io_in/out/oeb/in_3v3 [13:0] <---> mprj_io[13:0] * * When the GPIOs are configured by the Management SoC for * user use, they have three basic bidirectional controls: @@ -85,7 +85,7 @@ * GPIO indexing by 7, as follows: * * gpio_analog/noesd [17:7] <---> mprj_io[35:25] - * gpio_analog/noesd [6:0] <---> mprj_io[13:7] + * gpio_analog/noesd [6:0] <---> mprj_io[13:7] * */ @@ -129,26 +129,26 @@ .VCCD1(vccd1), `endif //IO Connections - .IO7(mprj_io[7]), - .IO8(mprj_io[8]), - .IO9(mprj_io[9]), - .IO10(mprj_io[10]), - .IO11(mprj_io[11]), - .IO12(mprj_io[12]), - .IO13(mprj_io[13]), - .IO25(mprj_io[25]), - .IO26(mprj_io[26]), - .IO27(mprj_io[27]), - .IO28(mprj_io[28]), - .IO29(mprj_io[29]), - .IO30(mprj_io[30]), - .IO31(mprj_io[31]), - .IO32(mprj_io[32]), - .IO33(mprj_io[33]), - .IO34(mprj_io[34]), - .IO35(mprj_io[35]), - .IO36(mprj_io[36]), - .IO37(mprj_io[37]), + .IO7(io_in[7]), + .IO8(io_in[8]), + .IO9(io_in[9]), + .IO10(io_in[10]), + .IO11(io_in[11]), + .IO12(io_in[12]), + .IO13(io_in[13]), + .IO25(io_in[25]), + .IO26(io_in[26]), + .IO27(io_in[27]), + .IO28(io_in[28]), + .IO29(io_in[29]), + .IO30(io_in[30]), + .IO31(io_in[31]), + .IO32(io_in[32]), + .IO33(io_in[33]), + .IO34(io_in[34]), + .IO35(io_in[35]), + .IO36(io_in[36]), + .IO37(io_in[37]), //Analog .ANALOG00(io_analog[0]), .ANALOG01(io_analog[1]),