blob: 5360ba58e609cbe3b06b2f0ddb90294f2aed26cd [file] [log] [blame]
FULL RUN LOG:
Executing Step 0 of 8: Extracting GDS Files
Step 0 done without fatal errors.
Executing Step 1 of 8: Project License Check
{{LICENSE COMPLIANCE PASSED}} Apache-2.0 LICENSE file was found in project root
SPDX COMPLIANCE Found 71 non-compliant files with the SPDX Standard. Check full log for more information
SPDX COMPLIANCE: NON-COMPLIANT FILES PREVIEW: ['/mnt/shuttles/mpw-two/slot-037/hilas/README.md', '/mnt/shuttles/mpw-two/slot-037/hilas/xschem/sky130_hilas_pFETLarge.sch', '/mnt/shuttles/mpw-two/slot-037/hilas/xschem/sky130_hilas_LevelShift4InputUp.sym', '/mnt/shuttles/mpw-two/slot-037/hilas/xschem/sky130_hilas_TopProtection.sch', '/mnt/shuttles/mpw-two/slot-037/hilas/xschem/sky130_hilas_drainSelect01.sym', '/mnt/shuttles/mpw-two/slot-037/hilas/xschem/sky130_hilas_LeftProtection.sch', '/mnt/shuttles/mpw-two/slot-037/hilas/xschem/sky130_hilas_VinjDiodeProtect01.sch', '/mnt/shuttles/mpw-two/slot-037/hilas/xschem/sky130_hilas_capacitorArray01.sch', '/mnt/shuttles/mpw-two/slot-037/hilas/xschem/sky130_hilas_swc4x2cell.sym', '/mnt/shuttles/mpw-two/slot-037/hilas/xschem/sky130_hilas_Tgate4Single01.sch', '/mnt/shuttles/mpw-two/slot-037/hilas/xschem/sky130_hilas_TopLevelTestStructure.sch', '/mnt/shuttles/mpw-two/slot-037/hilas/xschem/sky130_hilas_TA2SignalBiasCell.sch', '/mnt/shuttles/mpw-two/slot-037/hilas/xschem/sky130_hilas_VinjDecode2to4.sch', '/mnt/shuttles/mpw-two/slot-037/hilas/xschem/sky130_hilas_swc4x1BiasCell.sym', '/mnt/shuttles/mpw-two/slot-037/hilas/xschem/sky130_hilas_FGcharacterization01.sym', '/mnt/shuttles/mpw-two/slot-037/hilas/xschem/sky130_hilas_TA2Cell_1FG.sch', '/mnt/shuttles/mpw-two/slot-037/hilas/xschem/sky130_hilas_Trans2med.sch', '/mnt/shuttles/mpw-two/slot-037/hilas/xschem/sky130_hilas_RightProtection.sym', '/mnt/shuttles/mpw-two/slot-037/hilas/xschem/sky130_hilas_TA2Cell_1FG_Strong.sch', '/mnt/shuttles/mpw-two/slot-037/hilas/xschem/sky130_hilas_cellAttempt01.sch']
Executing Step 2 of 8: YAML File Check
YAML file valid!
Step 2 done without fatal errors.
Detected Project Type is "analog"
Executing Step 3 of 8: Project Compliance Checks
b'Going into /mnt/shuttles/mpw-two/caravel'
b'Removing manifest'
b'Fetching manifest'
b'Running sha1sum checks'
Manifest Checks Passed. Caravel Version Matches.
Makefile Checks Passed.
Documentation Checks Passed.
Executing Step 4 of 8: XOR Consistency Checks
Running XOR Checks...
Total XOR differences = 0
XOR Checks on User Project GDS Passed!
Step 4 done without fatal errors.
Executing Step 5 of 8: DRC Violations Checks
Running Magic DRC Checks...
Violation Message "MV Butting tap length < 0.7um (diff/tap.16) "found 345 Times.
Violation Message "Diffusion contact spacing < 0.17um (licon.2) "found 133 Times.
Violation Message "MV P-Diffusion to MV N-tap spacing < 0.125um across butted junction (nsd.5a) "found 24 Times.
Violation Message "MV Diffusion in N-well to P-tap spacing < 0.76um (diff/tap.20 + diff/tap.17,19) "found 7044 Times.
Violation Message "MV PMOS minimum length < 0.5um (poly.13) "found 94 Times.
Violation Message "P-tap overlap of P-tap contact < 0.12um in one direction (licon.7) "found 96 Times.
Violation Message "Butting tap length < 0.29um (diff/tap.4) "found 48 Times.
Violation Message "P-tap spacing to N-well < 0.13um (diff/tap.11) "found 7 Times.
Violation Message "MV NMOS minimum length < 0.5um (poly.13) "found 17 Times.
Violation Message "P-tap spacing to N-well < 0.005um (diff/tap.11) "found 6 Times.
Violation Message "Transistor width < 0.42um (diff/tap.2) "found 822 Times.
Violation Message "N-well overlap of varactor poly < 0.15um (varac.5) "found 85 Times.
Violation Message "Spacing of HV nwell to LV nwell < 2.0um (nwell.8) "found 62 Times.
Violation Message "No bends in transistors (poly.11) "found 104 Times.
Violation Message "N-tap overlap of N-tap contact < 0.12um in one direction (licon.7) "found 6 Times.
Violation Message "N-well overlap of MV N-tap < 0.33um (diff/tap.19) "found 6576 Times.
Violation Message "MV N-Diffusion to MV P-tap spacing < 0.125um across butted junction (psd.5b) "found 16 Times.
Violation Message "Spacing of HV nwell to HV nwell < 2.0um (nwell.8) "found 163 Times.
Violation Message "P-tap contact width < 0.17um (licon.1) "found 48 Times.
DRC Checks on GDS Failed, Reason: Total # of DRC violations is 15696
TEST FAILED AT STEP 5
Executing Step 6 of 8: KLayout DRC Violations Check
Running Klayout DRC Checks...
Klayout DRC Checks on User Project GDS Passed!
Step 6 done without fatal errors.
Executing Klayout offgrid check.
Klayout offgrid Checks on User Project GDS Passed!
Step 7 done without fatal errors.
Klayout metal minimum clear area density Checks on User Project GDS Passed!
Step 7 done without fatal errors.
SOME Checks FAILED !!!