| commit | 73f88a89bd7694dc38b343f618076704cfaa0cdf | [log] [tgz] |
|---|---|---|
| author | Jeff DiCorpo <jeffdi@efabless.com> | Tue Jul 27 20:16:41 2021 +0000 |
| committer | Jeff DiCorpo <jeffdi@efabless.com> | Tue Jul 27 20:16:41 2021 +0000 |
| tree | d8de113e084963e7b29fbadc3bd4318a2c3d431f | |
| parent | e8cfd4bda6eec3031c9cf680dbcbc0a17168d63b [diff] |
final gds & signoff results
The default rounding mode for all the operations is RNE as highlighted by RISC-V and IEEE-754 spec.
Result of FPU calculation also appers at the 32 GPIO pins.