| commit | e8cfd4bda6eec3031c9cf680dbcbc0a17168d63b | [log] [tgz] |
|---|---|---|
| author | Jeff DiCorpo <jeffdi@efabless.com> | Wed Jul 21 12:09:09 2021 +0000 |
| committer | Jeff DiCorpo <jeffdi@efabless.com> | Wed Jul 21 12:09:09 2021 +0000 |
| tree | 0d9d9f316ece18cdbc31d70b2cac4ca8d8b81d8f | |
| parent | 18ba0a9957982b9a90e9411e19a2c24d49d82c7c [diff] |
final gds & signoff results
The default rounding mode for all the operations is RNE as highlighted by RISC-V and IEEE-754 spec.
Result of FPU calculation also appers at the 32 GPIO pins.