| commit | 5b92f9770dc1a2572172b0ced14259b7bc2b55ef | [log] [tgz] |
|---|---|---|
| author | Jeff DiCorpo <jeffdi@efabless.com> | Wed Aug 04 08:55:18 2021 +0000 |
| committer | Jeff DiCorpo <jeffdi@efabless.com> | Wed Aug 04 08:55:18 2021 +0000 |
| tree | 67708f62290186e6c4c6fd2dfab1c13df6bae615 | |
| parent | 5428ca5bda61762d56fed560e10838121e9c009b [diff] |
final gds & signoff results
The default rounding mode for all the operations is RNE as highlighted by RISC-V and IEEE-754 spec.
Result of FPU calculation also appers at the 32 GPIO pins.