| commit | 5428ca5bda61762d56fed560e10838121e9c009b | [log] [tgz] |
|---|---|---|
| author | Jeff DiCorpo <jeffdi@efabless.com> | Thu Jul 29 22:38:19 2021 +0000 |
| committer | Jeff DiCorpo <jeffdi@efabless.com> | Thu Jul 29 22:38:19 2021 +0000 |
| tree | 1b18cb6bf0e0f9d535eb24b6decb743d0e60e521 | |
| parent | 73f88a89bd7694dc38b343f618076704cfaa0cdf [diff] |
final gds & signoff results
The default rounding mode for all the operations is RNE as highlighted by RISC-V and IEEE-754 spec.
Result of FPU calculation also appers at the 32 GPIO pins.