Diego Hernando | b038f19 | 2021-06-18 01:26:40 -0300 | [diff] [blame] | 1 | v {xschem version=2.9.9 file_version=1.2 } |
| 2 | G {} |
| 3 | K {} |
| 4 | V {} |
| 5 | S {} |
| 6 | E {} |
| 7 | N 130 20 160 20 { lab=CLK} |
| 8 | N 560 -40 630 -40 { lab=out_div} |
| 9 | N 1080 -120 1090 -120 { lab=CLK_2} |
| 10 | N 160 20 200 20 { lab=CLK} |
| 11 | N 380 0 420 0 { lab=CLK_d} |
| 12 | N 380 40 420 40 { lab=nCLK_d} |
| 13 | N 490 80 490 110 { lab=vss} |
| 14 | N 490 -120 490 -80 { lab=vdd} |
| 15 | N 560 40 600 40 { lab=nout_div} |
| 16 | N 600 40 640 40 { lab=nout_div} |
| 17 | N 320 40 380 40 { lab=nCLK_d} |
| 18 | N 320 0 380 0 { lab=CLK_d} |
| 19 | N 260 -80 260 -40 { lab=vdd} |
| 20 | N 260 80 260 110 { lab=vss} |
| 21 | N 380 -40 420 -40 { lab=nout_div} |
| 22 | N 1030 -120 1080 -120 { lab=CLK_2} |
| 23 | N 740 -210 740 -170 { lab=vdd} |
| 24 | N 740 -70 740 -40 { lab=vss} |
| 25 | N 740 40 740 80 { lab=vdd} |
| 26 | N 740 180 740 210 { lab=vss} |
| 27 | N 640 130 700 130 { lab=nout_div} |
| 28 | N 640 40 640 130 { lab=nout_div} |
| 29 | N 640 -120 700 -120 { lab=out_div} |
| 30 | N 640 -120 640 -40 { lab=out_div} |
| 31 | N 630 -40 640 -40 { lab=out_div} |
| 32 | N 830 -120 900 -120 { lab=o1} |
| 33 | N 1080 130 1090 130 { lab=nCLK_2} |
| 34 | N 1030 130 1080 130 { lab=nCLK_2} |
| 35 | N 830 130 900 130 { lab=o2} |
| 36 | N 940 -210 940 -170 { lab=vdd} |
| 37 | N 940 -70 940 -40 { lab=vss} |
| 38 | N 940 40 940 80 { lab=vdd} |
| 39 | N 940 180 940 210 { lab=vss} |
| 40 | N 670 130 670 200 { lab=nout_div} |
| 41 | N 870 130 870 200 { lab=o2} |
| 42 | N 860 -190 860 -120 { lab=o1} |
| 43 | N 670 -190 670 -120 { lab=out_div} |
| 44 | C {ipin.sym} 130 20 0 0 {name=p4 lab=CLK} |
| 45 | C {opin.sym} 1090 -120 0 0 {name=p7 lab=CLK_2} |
| 46 | C {lab_wire.sym} 380 0 0 0 {name=l20 lab=CLK_d} |
| 47 | C {lab_wire.sym} 380 40 0 0 {name=l21 lab=nCLK_d} |
| 48 | C {iopin.sym} 490 110 1 0 {name=p2 lab=vss} |
| 49 | C {iopin.sym} 490 -120 3 0 {name=p5 lab=vdd} |
| 50 | C {opin.sym} 1090 130 0 0 {name=p1 lab=nCLK_2} |
| 51 | C {lab_pin.sym} 260 -80 1 0 {name=l3 lab=vdd} |
| 52 | C {lab_pin.sym} 260 110 3 0 {name=l6 lab=vss} |
| 53 | C {lab_pin.sym} 380 -40 0 0 {name=l1 lab=nout_div} |
| 54 | C {DFlipFlop.sym} 490 0 0 0 {name=x1} |
| 55 | C {clock_inverter.sym} 260 20 0 0 {name=x2} |
| 56 | C {inverter_min_x2.sym} 760 -120 0 0 {name=x3} |
| 57 | C {inverter_min_x4.sym} 960 -120 0 0 {name=x4} |
| 58 | C {lab_pin.sym} 740 -210 1 0 {name=l2 lab=vdd} |
| 59 | C {lab_pin.sym} 740 -40 3 0 {name=l4 lab=vss} |
| 60 | C {lab_pin.sym} 740 40 1 0 {name=l5 lab=vdd} |
| 61 | C {lab_pin.sym} 740 210 3 0 {name=l7 lab=vss} |
| 62 | C {lab_pin.sym} 940 -210 1 0 {name=l8 lab=vdd} |
| 63 | C {lab_pin.sym} 940 -40 3 0 {name=l9 lab=vss} |
| 64 | C {lab_pin.sym} 940 40 1 0 {name=l10 lab=vdd} |
| 65 | C {lab_pin.sym} 940 210 3 0 {name=l11 lab=vss} |
| 66 | C {iopin.sym} 670 200 1 0 {name=p3 lab=nout_div} |
| 67 | C {iopin.sym} 870 200 1 0 {name=p6 lab=o2} |
| 68 | C {iopin.sym} 860 -190 3 0 {name=p8 lab=o1} |
| 69 | C {iopin.sym} 670 -190 3 0 {name=p9 lab=out_div} |
| 70 | C {inverter_min_x2.sym} 760 130 0 0 {name=x5} |
| 71 | C {inverter_min_x4.sym} 960 130 0 0 {name=x6} |