Para terminar de hacer el pull
diff --git a/gds/user_analog_project_wrapper.gds b/gds/user_analog_project_wrapper.gds
index ae62523..c360d1c 100644
--- a/gds/user_analog_project_wrapper.gds
+++ b/gds/user_analog_project_wrapper.gds
Binary files differ
diff --git a/mag/extractions/user_analog_project_wrapper_lvs.spice b/mag/extractions/user_analog_project_wrapper_lvs.spice
index faeaa47..a508333 100644
--- a/mag/extractions/user_analog_project_wrapper_lvs.spice
+++ b/mag/extractions/user_analog_project_wrapper_lvs.spice
@@ -595,6 +595,7 @@
*C2 b VSUBS 0.09fF
.ends
+
.subckt csvco_branch vctrl in vbp D0 out vss vdd
Xsky130_fd_pr__nfet_01v8_7H8F5S_0 vctrl inverter_csvco_0/vss inverter_csvco_0/vss
+ vss vss inverter_csvco_0/vss vss vss inverter_csvco_0/vss vss inverter_csvco_0/vss
@@ -778,6 +779,10 @@
XPFD_0 vss vdd QB QA in_ref out_div_by_5 pfd_reset PFD
.ends
+.subckt sky130_fd_pr__cap_mim_m3_2_2Y8F6P VSUBS c2_n3251_n3000# m4_n3351_n3100#
+X0 c2_n3251_n3000# m4_n3351_n3100# sky130_fd_pr__cap_mim_m3_2 l=3e+07u w=3e+07u
+.ends
+
.subckt sky130_fd_pr__pfet_01v8_lvt_8P223X VSUBS a_n2017_n1317# a_n1731_n1219# a_n1879_n1219#
+ a_n2017_n61# w_n2018_n202#
X0 a_n1731_n1219# a_n2017_n61# w_n2018_n202# w_n2018_n202# sky130_fd_pr__pfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=4.5e+06u l=450000u
@@ -832,7 +837,7 @@
X49 a_n1731_n1219# a_n2017_n1317# a_n1879_n1219# w_n2018_n202# sky130_fd_pr__pfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=4.5e+06u l=450000u
.ends
-.subckt bias VSUBS vdd iref_1 iref_2 iref
+.subckt bias VSUBS vdd iref_0 iref_1 iref_2 iref
Xsky130_fd_pr__pfet_01v8_lvt_8P223X_5 VSUBS iref m1_20168_984# iref m1_20168_984#
+ vdd sky130_fd_pr__pfet_01v8_lvt_8P223X
Xsky130_fd_pr__pfet_01v8_lvt_8P223X_6 VSUBS iref sky130_fd_pr__pfet_01v8_lvt_8P223X_6/a_n1731_n1219#
@@ -857,6 +862,14 @@
+ iref_4 m1_20168_984# vdd sky130_fd_pr__pfet_01v8_lvt_8P223X
.ends
+.subckt mimcap_decoup_1x5 VSUBS t b
+Xdecap[0] VSUBS t b sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xdecap[1] VSUBS t b sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xdecap[2] VSUBS t b sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xdecap[3] VSUBS t b sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xdecap[4] VSUBS t b sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+.ends
+
.subckt sky130_fd_pr__cap_mim_m3_1_WHJTNJ VSUBS m3_n4309_50# m3_n4309_n4250# c1_n4209_n4150#
+ c1_110_n4150# m3_10_n4250#
X0 c1_n4209_n4150# m3_n4309_n4250# sky130_fd_pr__cap_mim_m3_1 l=2e+07u w=2e+07u
@@ -1004,7 +1017,54 @@
*+ wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3] wbs_stb_i wbs_we_i
Xtop_pll_v1_0 vdda1 io_analog[10] vssa1 vssa1 gpio_noesd[7] bias_0/iref_2 io_analog[9]
+ top_pll_v1
-Xbias_0 vssa1 vdda1 bias_0/iref_1 bias_0/iref_2 io_analog[5] bias
+Xtop_pll_v1_1 vdda1 io_analog[10] vssa1 vssa1 gpio_noesd[7] bias_0/iref_0 io_analog[7]
++ top_pll_v1
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[0] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[1] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[2] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[3] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[4] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[5] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[6] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[7] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[8] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xbias_0 vssa1 vdda1 bias_0/iref_0 bias_0/iref_1 bias_0/iref_2 io_analog[5] bias
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[0] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[1] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[2] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[3] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[4] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[5] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[6] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[7] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[8] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xmimcap_decoup_1x5_0[0] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_0[1] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_0[2] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_1[0] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_1[1] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_1[2] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[0] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[1] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[2] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[3] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[4] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[5] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[6] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[7] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[8] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xmimcap_decoup_1x5_2[0] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_2[1] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_2[2] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_3[0] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_3[1] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_3[2] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_4[0] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_4[1] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_4[2] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_5[0] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_5[1] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_5[2] vssa1 vdda1 vssa1 mimcap_decoup_1x5
Xtop_pll_v2_0 vdda1 io_analog[10] vssa1 vssa1 gpio_noesd[7] bias_0/iref_1 gpio_noesd[8]
+ io_analog[8] top_pll_v2
.ends
diff --git a/mag/extractions/user_analog_project_wrapper_pex_c.spice b/mag/extractions/user_analog_project_wrapper_pex_c.spice
index 46651f3..8dd104e 100644
--- a/mag/extractions/user_analog_project_wrapper_pex_c.spice
+++ b/mag/extractions/user_analog_project_wrapper_pex_c.spice
@@ -30,71 +30,71 @@
X22 c1_n13188_n13100# m3_n7969_n2600# sky130_fd_pr__cap_mim_m3_1 l=2.5e+07u w=2.5e+07u
X23 c1_n13188_n13100# m3_n2650_n2600# sky130_fd_pr__cap_mim_m3_1 l=2.5e+07u w=2.5e+07u
X24 c1_n13188_n13100# m3_2669_2700# sky130_fd_pr__cap_mim_m3_1 l=2.5e+07u w=2.5e+07u
-C0 m3_n13288_n2600# m3_n13288_n7900# 3.28fF
-C1 m3_2669_8000# c1_n13188_n13100# 58.61fF
-C2 m3_n13288_n2600# m3_n7969_n2600# 2.73fF
-C3 m3_2669_n13200# m3_2669_n7900# 3.28fF
-C4 m3_n7969_8000# c1_n13188_n13100# 58.61fF
-C5 m3_n7969_n13200# m3_n2650_n13200# 2.73fF
-C6 m3_2669_n2600# c1_n13188_n13100# 58.86fF
-C7 m3_n13288_n7900# m3_n7969_n7900# 2.73fF
-C8 m3_n7969_2700# c1_n13188_n13100# 58.86fF
-C9 m3_7988_n7900# c1_n13188_n13100# 61.01fF
-C10 m3_n7969_n2600# m3_n7969_n7900# 3.28fF
-C11 m3_n7969_n13200# c1_n13188_n13100# 58.61fF
-C12 m3_n13288_2700# c1_n13188_n13100# 58.61fF
-C13 m3_2669_2700# c1_n13188_n13100# 58.86fF
-C14 m3_n13288_n2600# c1_n13188_n13100# 58.61fF
-C15 m3_n7969_8000# m3_n7969_2700# 3.28fF
-C16 m3_2669_2700# m3_2669_8000# 3.28fF
-C17 m3_n2650_n13200# m3_2669_n13200# 2.73fF
-C18 m3_7988_n2600# m3_7988_2700# 3.39fF
-C19 m3_7988_2700# m3_7988_8000# 3.39fF
-C20 m3_n2650_n2600# m3_n2650_2700# 3.28fF
-C21 m3_n7969_n7900# m3_n2650_n7900# 2.73fF
-C22 m3_2669_n2600# m3_2669_2700# 3.28fF
-C23 m3_n7969_2700# m3_n13288_2700# 2.73fF
-C24 c1_n13188_n13100# m3_n7969_n7900# 58.86fF
-C25 m3_n2650_n2600# m3_n7969_n2600# 2.73fF
-C26 m3_2669_n13200# c1_n13188_n13100# 58.61fF
-C27 m3_n2650_8000# m3_n2650_2700# 3.28fF
-C28 m3_n13288_8000# c1_n13188_n13100# 58.36fF
-C29 m3_7988_n13200# c1_n13188_n13100# 60.75fF
-C30 m3_n13288_n13200# m3_n13288_n7900# 3.28fF
-C31 m3_n13288_n2600# m3_n13288_2700# 3.28fF
-C32 m3_n2650_n2600# m3_n2650_n7900# 3.28fF
-C33 m3_n13288_8000# m3_n7969_8000# 2.73fF
-C34 m3_2669_n7900# m3_n2650_n7900# 2.73fF
-C35 m3_7988_2700# c1_n13188_n13100# 61.01fF
-C36 m3_n2650_n2600# c1_n13188_n13100# 58.86fF
-C37 m3_n7969_n13200# m3_n7969_n7900# 3.28fF
-C38 m3_2669_n7900# c1_n13188_n13100# 58.86fF
-C39 m3_7988_n7900# m3_7988_n13200# 3.39fF
-C40 m3_7988_n2600# c1_n13188_n13100# 61.01fF
-C41 m3_n13288_8000# m3_n13288_2700# 3.28fF
-C42 m3_7988_8000# c1_n13188_n13100# 60.75fF
-C43 m3_n2650_2700# c1_n13188_n13100# 58.86fF
-C44 m3_n13288_n13200# c1_n13188_n13100# 58.36fF
-C45 m3_2669_8000# m3_7988_8000# 2.73fF
-C46 m3_n2650_8000# c1_n13188_n13100# 58.61fF
-C47 c1_n13188_n13100# m3_n13288_n7900# 58.61fF
-C48 m3_n2650_n2600# m3_2669_n2600# 2.73fF
-C49 m3_n7969_n2600# c1_n13188_n13100# 58.86fF
-C50 m3_n2650_8000# m3_2669_8000# 2.73fF
-C51 m3_2669_n7900# m3_2669_n2600# 3.28fF
-C52 m3_n2650_n13200# m3_n2650_n7900# 3.28fF
-C53 m3_2669_n2600# m3_7988_n2600# 2.73fF
-C54 m3_2669_n7900# m3_7988_n7900# 2.73fF
-C55 m3_7988_2700# m3_2669_2700# 2.73fF
-C56 m3_n7969_8000# m3_n2650_8000# 2.73fF
-C57 m3_n7969_2700# m3_n2650_2700# 2.73fF
+C0 m3_7988_n7900# m3_2669_n7900# 2.73fF
+C1 m3_n7969_n13200# m3_n7969_n7900# 3.28fF
+C2 m3_n2650_n13200# m3_n2650_n7900# 3.28fF
+C3 m3_n13288_2700# m3_n7969_2700# 2.73fF
+C4 c1_n13188_n13100# m3_7988_8000# 60.75fF
+C5 m3_2669_n13200# m3_2669_n7900# 3.28fF
+C6 m3_n13288_8000# m3_n7969_8000# 2.73fF
+C7 m3_n7969_2700# m3_n2650_2700# 2.73fF
+C8 c1_n13188_n13100# m3_n7969_2700# 58.86fF
+C9 m3_7988_n13200# c1_n13188_n13100# 60.75fF
+C10 m3_n2650_2700# m3_2669_2700# 2.73fF
+C11 c1_n13188_n13100# m3_2669_2700# 58.86fF
+C12 c1_n13188_n13100# m3_n7969_8000# 58.61fF
+C13 m3_7988_n7900# m3_7988_n13200# 3.39fF
+C14 c1_n13188_n13100# m3_7988_2700# 61.01fF
+C15 c1_n13188_n13100# m3_n13288_n7900# 58.61fF
+C16 c1_n13188_n13100# m3_2669_8000# 58.61fF
+C17 m3_n13288_n13200# c1_n13188_n13100# 58.36fF
+C18 m3_n7969_8000# m3_n2650_8000# 2.73fF
+C19 c1_n13188_n13100# m3_n7969_n2600# 58.86fF
+C20 m3_7988_2700# m3_7988_n2600# 3.39fF
+C21 c1_n13188_n13100# m3_n2650_n7900# 58.86fF
+C22 m3_2669_n13200# m3_7988_n13200# 2.73fF
+C23 m3_n2650_n13200# c1_n13188_n13100# 58.61fF
+C24 c1_n13188_n13100# m3_2669_n2600# 58.86fF
+C25 m3_n2650_8000# m3_2669_8000# 2.73fF
+C26 m3_n13288_n2600# m3_n13288_n7900# 3.28fF
+C27 m3_n13288_n2600# m3_n7969_n2600# 2.73fF
+C28 m3_n13288_n7900# m3_n7969_n7900# 2.73fF
+C29 m3_n13288_n13200# m3_n7969_n13200# 2.73fF
+C30 m3_n7969_n2600# m3_n7969_n7900# 3.28fF
+C31 m3_2669_n2600# m3_7988_n2600# 2.73fF
+C32 m3_n7969_n2600# m3_n2650_n2600# 2.73fF
+C33 m3_n13288_8000# m3_n13288_2700# 3.28fF
+C34 m3_n7969_n7900# m3_n2650_n7900# 2.73fF
+C35 m3_n7969_n13200# m3_n2650_n13200# 2.73fF
+C36 m3_n2650_n2600# m3_n2650_n7900# 3.28fF
+C37 m3_n2650_n2600# m3_2669_n2600# 2.73fF
+C38 c1_n13188_n13100# m3_n13288_8000# 58.36fF
+C39 m3_n2650_n7900# m3_2669_n7900# 2.73fF
+C40 m3_n2650_n13200# m3_2669_n13200# 2.73fF
+C41 c1_n13188_n13100# m3_n13288_2700# 58.61fF
+C42 m3_2669_n2600# m3_2669_n7900# 3.28fF
+C43 m3_7988_2700# m3_7988_8000# 3.39fF
+C44 c1_n13188_n13100# m3_n2650_2700# 58.86fF
+C45 m3_n7969_8000# m3_n7969_2700# 3.28fF
+C46 m3_2669_8000# m3_7988_8000# 2.73fF
+C47 m3_n13288_n2600# m3_n13288_2700# 3.28fF
+C48 c1_n13188_n13100# m3_7988_n2600# 61.01fF
+C49 m3_n2650_8000# m3_n2650_2700# 3.28fF
+C50 c1_n13188_n13100# m3_n2650_8000# 58.61fF
+C51 m3_7988_n7900# c1_n13188_n13100# 61.01fF
+C52 m3_7988_2700# m3_2669_2700# 2.73fF
+C53 m3_n7969_n2600# m3_n7969_2700# 3.28fF
+C54 c1_n13188_n13100# m3_n13288_n2600# 58.61fF
+C55 c1_n13188_n13100# m3_n7969_n7900# 58.86fF
+C56 m3_2669_8000# m3_2669_2700# 3.28fF
+C57 m3_n7969_n13200# c1_n13188_n13100# 58.61fF
C58 m3_7988_n7900# m3_7988_n2600# 3.39fF
-C59 m3_n2650_n13200# c1_n13188_n13100# 58.61fF
-C60 m3_2669_n13200# m3_7988_n13200# 2.73fF
-C61 c1_n13188_n13100# m3_n2650_n7900# 58.86fF
-C62 m3_n2650_2700# m3_2669_2700# 2.73fF
-C63 m3_n7969_n13200# m3_n13288_n13200# 2.73fF
-C64 m3_n7969_n2600# m3_n7969_2700# 3.28fF
+C59 m3_n2650_n2600# m3_n2650_2700# 3.28fF
+C60 c1_n13188_n13100# m3_n2650_n2600# 58.86fF
+C61 c1_n13188_n13100# m3_2669_n7900# 58.86fF
+C62 m3_2669_n13200# c1_n13188_n13100# 58.61fF
+C63 m3_2669_n2600# m3_2669_2700# 3.28fF
+C64 m3_n13288_n13200# m3_n13288_n7900# 3.28fF
C65 c1_n13188_n13100# VSUBS 2.51fF
C66 m3_7988_n13200# VSUBS 12.57fF
C67 m3_2669_n13200# VSUBS 12.37fF
@@ -126,7 +126,7 @@
.subckt cap1_loop_filter VSUBS in out
Xsky130_fd_pr__cap_mim_m3_1_MACBVW_0 VSUBS out out out out out out out out out out
+ out out out out out out out out out out out in out out out out sky130_fd_pr__cap_mim_m3_1_MACBVW
-C0 in out 2.17fF
+C0 out in 2.17fF
C1 in VSUBS -10.03fF
C2 out VSUBS 62.40fF
.ends
@@ -143,25 +143,25 @@
X6 c1_n2050_n6300# m3_n2150_n2100# sky130_fd_pr__cap_mim_m3_1 l=2e+07u w=2e+07u
X7 c1_n2050_n6300# m3_n2150_n6400# sky130_fd_pr__cap_mim_m3_1 l=2e+07u w=2e+07u
X8 c1_n6369_n6300# m3_n6469_2200# sky130_fd_pr__cap_mim_m3_1 l=2e+07u w=2e+07u
-C0 m3_n6469_n2100# m3_n6469_n6400# 2.63fF
-C1 c1_n2050_n6300# m3_n2150_n2100# 38.10fF
-C2 m3_n6469_n2100# c1_n6369_n6300# 38.10fF
-C3 m3_n2150_n2100# m3_n2150_2200# 2.63fF
-C4 c1_n2050_n6300# c1_2269_n6300# 1.99fF
-C5 m3_n2150_n6400# m3_n2150_n2100# 2.63fF
-C6 m3_n6469_2200# m3_n2150_2200# 1.75fF
-C7 m3_n6469_2200# c1_n6369_n6300# 38.10fF
-C8 c1_n2050_n6300# m3_n2150_2200# 38.10fF
-C9 c1_n2050_n6300# c1_n6369_n6300# 1.99fF
-C10 m3_n2150_n6400# c1_n2050_n6300# 38.10fF
-C11 m3_2169_n6400# m3_n2150_n2100# 1.75fF
-C12 m3_n6469_n6400# c1_n6369_n6300# 38.10fF
-C13 m3_n2150_n6400# m3_n6469_n6400# 1.75fF
-C14 m3_2169_n6400# c1_2269_n6300# 121.67fF
+C0 c1_n2050_n6300# m3_n2150_n6400# 38.10fF
+C1 c1_n2050_n6300# m3_n2150_2200# 38.10fF
+C2 c1_n6369_n6300# m3_n6469_n2100# 38.10fF
+C3 c1_n6369_n6300# c1_n2050_n6300# 1.99fF
+C4 m3_n2150_2200# m3_n6469_2200# 1.75fF
+C5 c1_2269_n6300# m3_2169_n6400# 121.67fF
+C6 c1_n6369_n6300# m3_n6469_2200# 38.10fF
+C7 m3_2169_n6400# m3_n2150_n2100# 1.75fF
+C8 c1_2269_n6300# c1_n2050_n6300# 1.99fF
+C9 m3_n2150_n6400# m3_n6469_n6400# 1.75fF
+C10 m3_n6469_n2100# m3_n2150_n2100# 1.75fF
+C11 c1_n2050_n6300# m3_n2150_n2100# 38.10fF
+C12 c1_n6369_n6300# m3_n6469_n6400# 38.10fF
+C13 m3_n6469_n2100# m3_n6469_2200# 2.63fF
+C14 m3_n2150_n6400# m3_2169_n6400# 1.75fF
C15 m3_2169_n6400# m3_n2150_2200# 1.75fF
-C16 m3_n2150_n6400# m3_2169_n6400# 1.75fF
-C17 m3_n6469_n2100# m3_n2150_n2100# 1.75fF
-C18 m3_n6469_n2100# m3_n6469_2200# 2.63fF
+C16 m3_n6469_n2100# m3_n6469_n6400# 2.63fF
+C17 m3_n2150_n6400# m3_n2150_n2100# 2.63fF
+C18 m3_n2150_n2100# m3_n2150_2200# 2.63fF
C19 c1_2269_n6300# VSUBS 0.16fF
C20 c1_n2050_n6300# VSUBS 0.16fF
C21 c1_n6369_n6300# VSUBS 0.16fF
@@ -218,17 +218,17 @@
X7 a_n1861_n486# a_n2261_n512# a_n2319_n486# w_n2457_n634# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=4.5e+06u l=2e+06u
X8 a_n29_n486# a_n2261_n512# a_n487_n486# w_n2457_n634# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=4.5e+06u l=2e+06u
X9 a_1345_n486# a_n2261_n512# a_887_n486# w_n2457_n634# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=4.5e+06u l=2e+06u
-C0 a_n945_n486# w_n2457_n634# 0.02fF
-C1 w_n2457_n634# a_n29_n486# 0.02fF
-C2 a_n2319_n486# w_n2457_n634# 0.02fF
-C3 a_n1861_n486# w_n2457_n634# 0.02fF
-C4 a_1345_n486# w_n2457_n634# 0.02fF
-C5 a_2261_n486# w_n2457_n634# 0.02fF
-C6 a_429_n486# w_n2457_n634# 0.02fF
-C7 a_n487_n486# w_n2457_n634# 0.02fF
-C8 w_n2457_n634# a_887_n486# 0.02fF
-C9 w_n2457_n634# a_1803_n486# 0.02fF
-C10 a_n1403_n486# w_n2457_n634# 0.02fF
+C0 a_n1861_n486# w_n2457_n634# 0.02fF
+C1 a_887_n486# w_n2457_n634# 0.02fF
+C2 a_n29_n486# w_n2457_n634# 0.02fF
+C3 a_n945_n486# w_n2457_n634# 0.02fF
+C4 a_n1403_n486# w_n2457_n634# 0.02fF
+C5 a_n2319_n486# w_n2457_n634# 0.02fF
+C6 a_1345_n486# w_n2457_n634# 0.02fF
+C7 a_2261_n486# w_n2457_n634# 0.02fF
+C8 a_429_n486# w_n2457_n634# 0.02fF
+C9 a_1803_n486# w_n2457_n634# 0.02fF
+C10 a_n487_n486# w_n2457_n634# 0.02fF
C11 a_2261_n486# VSUBS 0.03fF
C12 a_1803_n486# VSUBS 0.03fF
C13 a_1345_n486# VSUBS 0.03fF
@@ -274,100 +274,100 @@
X22 a_111_n75# a_n1167_n101# a_15_n75# w_n1367_n285# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=750000u l=150000u
X23 a_n273_n75# a_n1167_n101# a_n369_n75# w_n1367_n285# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=750000u l=150000u
X24 a_n177_n75# a_n1167_n101# a_n273_n75# w_n1367_n285# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=750000u l=150000u
-C0 a_n945_n75# a_n1041_n75# 0.22fF
-C1 a_207_n75# a_111_n75# 0.22fF
-C2 a_15_n75# a_111_n75# 0.22fF
-C3 a_n81_n75# a_303_n75# 0.03fF
-C4 a_n1041_n75# a_n849_n75# 0.08fF
-C5 a_n465_n75# a_n369_n75# 0.22fF
-C6 a_n465_n75# a_n849_n75# 0.03fF
-C7 a_n81_n75# a_n465_n75# 0.03fF
-C8 a_687_n75# a_879_n75# 0.08fF
-C9 a_n81_n75# a_207_n75# 0.05fF
-C10 a_15_n75# a_n369_n75# 0.03fF
-C11 a_n561_n75# a_n945_n75# 0.03fF
-C12 a_975_n75# a_1167_n75# 0.08fF
-C13 a_975_n75# a_591_n75# 0.03fF
-C14 a_15_n75# a_n81_n75# 0.22fF
-C15 a_1071_n75# a_879_n75# 0.08fF
-C16 a_687_n75# a_783_n75# 0.22fF
-C17 a_495_n75# a_303_n75# 0.08fF
-C18 a_n945_n75# a_n1137_n75# 0.08fF
-C19 a_399_n75# a_303_n75# 0.22fF
-C20 a_1071_n75# a_783_n75# 0.05fF
-C21 a_n561_n75# a_n369_n75# 0.08fF
-C22 a_n657_n75# a_n1041_n75# 0.03fF
-C23 a_n561_n75# a_n849_n75# 0.05fF
-C24 a_n177_n75# a_n273_n75# 0.22fF
-C25 a_n465_n75# a_n657_n75# 0.08fF
-C26 a_591_n75# a_303_n75# 0.05fF
-C27 a_207_n75# a_495_n75# 0.05fF
-C28 a_n1137_n75# a_n849_n75# 0.05fF
-C29 a_n81_n75# a_111_n75# 0.08fF
-C30 a_207_n75# a_399_n75# 0.08fF
-C31 a_495_n75# a_687_n75# 0.08fF
-C32 a_n945_n75# a_n849_n75# 0.22fF
-C33 a_n753_n75# a_n1041_n75# 0.05fF
-C34 a_15_n75# a_399_n75# 0.03fF
-C35 a_399_n75# a_687_n75# 0.05fF
-C36 a_207_n75# a_591_n75# 0.03fF
-C37 a_n465_n75# a_n753_n75# 0.05fF
-C38 a_n465_n75# a_n273_n75# 0.08fF
-C39 a_n561_n75# a_n657_n75# 0.22fF
-C40 a_687_n75# a_591_n75# 0.22fF
-C41 a_783_n75# a_879_n75# 0.22fF
-C42 a_n81_n75# a_n369_n75# 0.05fF
-C43 a_1071_n75# a_1167_n75# 0.22fF
-C44 a_15_n75# a_n273_n75# 0.05fF
-C45 a_n1229_n75# a_n1041_n75# 0.08fF
-C46 a_495_n75# a_111_n75# 0.03fF
-C47 a_n945_n75# a_n657_n75# 0.05fF
-C48 a_399_n75# a_111_n75# 0.05fF
-C49 a_n561_n75# a_n753_n75# 0.08fF
-C50 a_n177_n75# a_n465_n75# 0.05fF
-C51 a_n561_n75# a_n273_n75# 0.05fF
-C52 a_n177_n75# a_207_n75# 0.03fF
-C53 a_495_n75# a_879_n75# 0.03fF
-C54 a_975_n75# a_687_n75# 0.05fF
-C55 a_n1137_n75# a_n753_n75# 0.03fF
-C56 a_n657_n75# a_n369_n75# 0.05fF
-C57 a_111_n75# a_n273_n75# 0.03fF
-C58 a_n657_n75# a_n849_n75# 0.08fF
-C59 a_n177_n75# a_15_n75# 0.08fF
-C60 a_975_n75# a_1071_n75# 0.22fF
-C61 a_n945_n75# a_n753_n75# 0.08fF
-C62 a_495_n75# a_783_n75# 0.05fF
-C63 a_207_n75# a_303_n75# 0.22fF
-C64 a_1167_n75# a_879_n75# 0.05fF
-C65 a_591_n75# a_879_n75# 0.05fF
-C66 a_399_n75# a_783_n75# 0.03fF
-C67 a_15_n75# a_303_n75# 0.05fF
-C68 a_n177_n75# a_n561_n75# 0.03fF
-C69 a_n1137_n75# a_n1229_n75# 0.22fF
-C70 a_687_n75# a_303_n75# 0.03fF
-C71 a_n753_n75# a_n369_n75# 0.03fF
-C72 a_1167_n75# a_783_n75# 0.03fF
-C73 a_591_n75# a_783_n75# 0.08fF
-C74 a_n753_n75# a_n849_n75# 0.22fF
-C75 a_n369_n75# a_n273_n75# 0.22fF
-C76 a_n945_n75# a_n1229_n75# 0.05fF
-C77 a_n177_n75# a_111_n75# 0.05fF
-C78 a_n81_n75# a_n273_n75# 0.08fF
-C79 a_15_n75# a_207_n75# 0.08fF
-C80 a_399_n75# a_495_n75# 0.22fF
-C81 a_975_n75# a_879_n75# 0.22fF
-C82 a_n1229_n75# a_n849_n75# 0.03fF
+C0 a_n657_n75# a_n849_n75# 0.08fF
+C1 a_783_n75# a_1071_n75# 0.05fF
+C2 a_n1137_n75# a_n1229_n75# 0.22fF
+C3 a_n1041_n75# a_n753_n75# 0.05fF
+C4 a_n369_n75# a_n465_n75# 0.22fF
+C5 a_591_n75# a_975_n75# 0.03fF
+C6 a_n561_n75# a_n369_n75# 0.08fF
+C7 a_687_n75# a_495_n75# 0.08fF
+C8 a_783_n75# a_1167_n75# 0.03fF
+C9 a_n273_n75# a_n81_n75# 0.08fF
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+C11 a_687_n75# a_783_n75# 0.22fF
+C12 a_111_n75# a_n273_n75# 0.03fF
+C13 a_591_n75# a_495_n75# 0.22fF
+C14 a_n945_n75# a_n1229_n75# 0.05fF
+C15 a_687_n75# a_399_n75# 0.05fF
+C16 a_879_n75# a_1167_n75# 0.05fF
+C17 a_687_n75# a_879_n75# 0.08fF
+C18 a_591_n75# a_783_n75# 0.08fF
+C19 a_n849_n75# a_n1137_n75# 0.05fF
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+C21 a_n1041_n75# a_n1229_n75# 0.08fF
+C22 a_n177_n75# a_n369_n75# 0.08fF
+C23 a_399_n75# a_591_n75# 0.08fF
+C24 a_n273_n75# a_n465_n75# 0.08fF
+C25 a_n657_n75# a_n369_n75# 0.05fF
+C26 a_n561_n75# a_n273_n75# 0.05fF
+C27 a_591_n75# a_879_n75# 0.05fF
+C28 a_n561_n75# a_n945_n75# 0.03fF
+C29 a_n849_n75# a_n945_n75# 0.22fF
+C30 a_n81_n75# a_15_n75# 0.22fF
+C31 a_111_n75# a_15_n75# 0.22fF
+C32 a_n1041_n75# a_n849_n75# 0.08fF
+C33 a_n273_n75# a_n177_n75# 0.22fF
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+C79 a_303_n75# a_495_n75# 0.08fF
+C80 a_1071_n75# a_975_n75# 0.22fF
+C81 a_n81_n75# a_n369_n75# 0.05fF
+C82 a_303_n75# a_n81_n75# 0.03fF
C83 a_111_n75# a_303_n75# 0.08fF
-C84 a_n561_n75# a_n465_n75# 0.22fF
-C85 a_495_n75# a_591_n75# 0.22fF
-C86 a_1071_n75# a_687_n75# 0.03fF
-C87 a_n177_n75# a_n369_n75# 0.08fF
-C88 a_975_n75# a_783_n75# 0.08fF
-C89 a_n657_n75# a_n753_n75# 0.22fF
-C90 a_n1137_n75# a_n1041_n75# 0.22fF
-C91 a_399_n75# a_591_n75# 0.08fF
-C92 a_n177_n75# a_n81_n75# 0.22fF
-C93 a_n657_n75# a_n273_n75# 0.03fF
+C84 a_n273_n75# a_15_n75# 0.05fF
+C85 a_n177_n75# a_n465_n75# 0.05fF
+C86 a_975_n75# a_1167_n75# 0.08fF
+C87 a_n945_n75# a_n753_n75# 0.08fF
+C88 a_303_n75# a_207_n75# 0.22fF
+C89 a_n657_n75# a_n465_n75# 0.08fF
+C90 a_687_n75# a_975_n75# 0.05fF
+C91 a_n561_n75# a_n177_n75# 0.03fF
+C92 a_399_n75# a_303_n75# 0.22fF
+C93 a_n657_n75# a_n561_n75# 0.22fF
C94 a_1167_n75# w_n1367_n285# 0.10fF
C95 a_1071_n75# w_n1367_n285# 0.07fF
C96 a_975_n75# w_n1367_n285# 0.06fF
@@ -421,81 +421,81 @@
X17 a_n129_n75# a_n927_n101# a_n225_n75# w_n1127_n285# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=750000u l=150000u
X18 a_n897_n75# a_n927_n101# a_n989_n75# w_n1127_n285# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=750000u l=150000u
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C77 a_735_n150# VSUBS 0.03fF
@@ -659,16 +659,16 @@
X7 a_687_n44# a_n1761_n132# a_329_n44# w_n1957_n254# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=750000u l=1.5e+06u
X8 a_1403_n44# a_n1761_n132# a_1045_n44# w_n1957_n254# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=750000u l=1.5e+06u
X9 a_n1461_n44# a_n1761_n132# a_n1819_n44# w_n1957_n254# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=750000u l=1.5e+06u
-C0 a_687_n44# a_329_n44# 0.04fF
-C1 a_1403_n44# a_1045_n44# 0.04fF
-C2 a_n745_n44# a_n387_n44# 0.04fF
-C3 a_n29_n44# a_329_n44# 0.04fF
-C4 a_687_n44# a_1045_n44# 0.04fF
-C5 a_n745_n44# a_n1103_n44# 0.04fF
-C6 a_n1819_n44# a_n1461_n44# 0.04fF
-C7 a_1761_n44# a_1403_n44# 0.04fF
-C8 a_n29_n44# a_n387_n44# 0.04fF
-C9 a_n1103_n44# a_n1461_n44# 0.04fF
+C0 a_n29_n44# a_329_n44# 0.04fF
+C1 a_n29_n44# a_n387_n44# 0.04fF
+C2 a_687_n44# a_329_n44# 0.04fF
+C3 a_1045_n44# a_687_n44# 0.04fF
+C4 a_n387_n44# a_n745_n44# 0.04fF
+C5 a_n1103_n44# a_n745_n44# 0.04fF
+C6 a_1045_n44# a_1403_n44# 0.04fF
+C7 a_n1103_n44# a_n1461_n44# 0.04fF
+C8 a_n1819_n44# a_n1461_n44# 0.04fF
+C9 a_1761_n44# a_1403_n44# 0.04fF
C10 a_1761_n44# w_n1957_n254# 0.04fF
C11 a_1403_n44# w_n1957_n254# 0.04fF
C12 a_1045_n44# w_n1957_n254# 0.04fF
@@ -713,104 +713,104 @@
X22 a_n849_n150# a_n1167_n247# a_n945_n150# w_n1367_n369# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=150000u
X23 a_207_n150# a_n1167_n247# a_111_n150# w_n1367_n369# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=150000u
X24 a_n177_n150# a_n1167_n247# a_n273_n150# w_n1367_n369# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=150000u
-C0 a_495_n150# a_111_n150# 0.07fF
-C1 a_n177_n150# a_n465_n150# 0.10fF
-C2 a_n273_n150# a_n369_n150# 0.43fF
-C3 a_n273_n150# a_n81_n150# 0.16fF
+C0 a_n177_n150# a_n465_n150# 0.10fF
+C1 a_207_n150# a_n81_n150# 0.10fF
+C2 a_n369_n150# a_n465_n150# 0.43fF
+C3 a_n177_n150# a_207_n150# 0.07fF
C4 a_1071_n150# a_687_n150# 0.07fF
-C5 a_n369_n150# a_n753_n150# 0.07fF
-C6 a_n81_n150# a_111_n150# 0.16fF
-C7 a_975_n150# a_1071_n150# 0.43fF
-C8 a_591_n150# a_687_n150# 0.43fF
-C9 a_n273_n150# a_n657_n150# 0.07fF
-C10 a_n177_n150# a_n561_n150# 0.07fF
-C11 a_975_n150# a_591_n150# 0.07fF
-C12 a_n657_n150# a_n753_n150# 0.43fF
-C13 a_591_n150# a_207_n150# 0.07fF
-C14 a_n561_n150# a_n945_n150# 0.07fF
-C15 a_n1229_n150# a_n849_n150# 0.07fF
-C16 a_n849_n150# a_n753_n150# 0.43fF
-C17 a_n1137_n150# a_n945_n150# 0.16fF
-C18 a_n657_n150# a_n1041_n150# 0.07fF
-C19 a_n561_n150# a_n465_n150# 0.43fF
-C20 a_n81_n150# a_n369_n150# 0.10fF
-C21 w_n1367_n369# a_1167_n150# 0.14fF
-C22 a_111_n150# a_207_n150# 0.43fF
-C23 a_n1041_n150# a_n849_n150# 0.16fF
-C24 a_495_n150# a_687_n150# 0.16fF
-C25 a_879_n150# a_783_n150# 0.43fF
-C26 a_n657_n150# a_n369_n150# 0.10fF
-C27 a_591_n150# a_399_n150# 0.16fF
-C28 a_591_n150# a_303_n150# 0.10fF
-C29 a_495_n150# a_207_n150# 0.10fF
-C30 a_975_n150# a_1167_n150# 0.16fF
-C31 a_n273_n150# a_n177_n150# 0.43fF
-C32 a_1071_n150# a_783_n150# 0.10fF
-C33 a_111_n150# a_399_n150# 0.10fF
-C34 a_303_n150# a_111_n150# 0.16fF
-C35 a_n81_n150# a_207_n150# 0.10fF
-C36 a_975_n150# w_n1367_n369# 0.05fF
-C37 a_n177_n150# a_111_n150# 0.10fF
-C38 a_n273_n150# a_15_n150# 0.10fF
-C39 a_n657_n150# a_n849_n150# 0.16fF
-C40 a_591_n150# a_783_n150# 0.16fF
-C41 a_n273_n150# a_n465_n150# 0.16fF
-C42 a_n1229_n150# a_n945_n150# 0.10fF
-C43 a_495_n150# a_399_n150# 0.43fF
-C44 a_495_n150# a_303_n150# 0.16fF
-C45 a_n945_n150# a_n753_n150# 0.16fF
-C46 a_111_n150# a_15_n150# 0.43fF
-C47 a_975_n150# a_687_n150# 0.10fF
-C48 a_n465_n150# a_n753_n150# 0.10fF
-C49 a_n1041_n150# a_n945_n150# 0.43fF
-C50 a_n81_n150# a_303_n150# 0.07fF
-C51 a_879_n150# a_1071_n150# 0.16fF
-C52 a_n177_n150# a_n369_n150# 0.16fF
-C53 a_n177_n150# a_n81_n150# 0.43fF
-C54 a_n273_n150# a_n561_n150# 0.10fF
-C55 a_879_n150# a_591_n150# 0.10fF
-C56 a_495_n150# a_783_n150# 0.10fF
-C57 a_n369_n150# a_15_n150# 0.07fF
-C58 a_n561_n150# a_n753_n150# 0.16fF
-C59 a_n81_n150# a_15_n150# 0.43fF
-C60 a_n1137_n150# a_n1229_n150# 0.43fF
-C61 a_399_n150# a_687_n150# 0.10fF
-C62 a_1167_n150# a_783_n150# 0.07fF
-C63 a_303_n150# a_687_n150# 0.07fF
-C64 a_n1137_n150# a_n753_n150# 0.07fF
-C65 a_n369_n150# a_n465_n150# 0.43fF
-C66 a_n81_n150# a_n465_n150# 0.07fF
-C67 a_n1137_n150# a_n1041_n150# 0.43fF
-C68 a_399_n150# a_207_n150# 0.16fF
-C69 a_303_n150# a_207_n150# 0.43fF
-C70 a_n657_n150# a_n945_n150# 0.10fF
-C71 a_n177_n150# a_207_n150# 0.07fF
-C72 a_n657_n150# a_n465_n150# 0.16fF
-C73 a_n945_n150# a_n849_n150# 0.43fF
-C74 a_n369_n150# a_n561_n150# 0.16fF
-C75 a_879_n150# a_495_n150# 0.07fF
-C76 a_n465_n150# a_n849_n150# 0.07fF
-C77 a_783_n150# a_687_n150# 0.43fF
-C78 a_15_n150# a_207_n150# 0.16fF
-C79 a_879_n150# a_1167_n150# 0.10fF
-C80 a_975_n150# a_783_n150# 0.16fF
-C81 a_303_n150# a_399_n150# 0.43fF
-C82 a_n657_n150# a_n561_n150# 0.43fF
-C83 a_n273_n150# a_111_n150# 0.07fF
-C84 a_879_n150# w_n1367_n369# 0.04fF
-C85 a_1167_n150# a_1071_n150# 0.43fF
-C86 a_n561_n150# a_n849_n150# 0.10fF
-C87 a_n1137_n150# a_n849_n150# 0.10fF
-C88 a_495_n150# a_591_n150# 0.43fF
-C89 a_399_n150# a_15_n150# 0.07fF
-C90 a_303_n150# a_15_n150# 0.10fF
-C91 a_879_n150# a_687_n150# 0.16fF
-C92 a_n1229_n150# a_n1041_n150# 0.16fF
-C93 a_n1041_n150# a_n753_n150# 0.10fF
-C94 w_n1367_n369# a_1071_n150# 0.07fF
-C95 a_n177_n150# a_15_n150# 0.16fF
-C96 a_879_n150# a_975_n150# 0.43fF
-C97 a_399_n150# a_783_n150# 0.07fF
+C5 a_783_n150# a_1071_n150# 0.10fF
+C6 a_399_n150# a_111_n150# 0.10fF
+C7 a_303_n150# a_n81_n150# 0.07fF
+C8 a_975_n150# a_591_n150# 0.07fF
+C9 a_111_n150# a_207_n150# 0.43fF
+C10 a_n657_n150# a_n369_n150# 0.10fF
+C11 a_n465_n150# a_n273_n150# 0.16fF
+C12 a_399_n150# a_15_n150# 0.07fF
+C13 a_111_n150# a_303_n150# 0.16fF
+C14 a_15_n150# a_207_n150# 0.16fF
+C15 a_n657_n150# a_n273_n150# 0.07fF
+C16 a_n465_n150# a_n561_n150# 0.43fF
+C17 a_783_n150# a_1167_n150# 0.07fF
+C18 a_n753_n150# a_n465_n150# 0.10fF
+C19 a_879_n150# a_1071_n150# 0.16fF
+C20 a_975_n150# a_687_n150# 0.10fF
+C21 a_n1137_n150# a_n945_n150# 0.16fF
+C22 a_783_n150# a_975_n150# 0.16fF
+C23 a_15_n150# a_303_n150# 0.10fF
+C24 a_n657_n150# a_n561_n150# 0.43fF
+C25 a_n753_n150# a_n657_n150# 0.43fF
+C26 a_n753_n150# a_n1041_n150# 0.10fF
+C27 a_n849_n150# a_n561_n150# 0.10fF
+C28 a_n753_n150# a_n849_n150# 0.43fF
+C29 a_879_n150# a_1167_n150# 0.10fF
+C30 a_591_n150# a_495_n150# 0.43fF
+C31 a_399_n150# a_495_n150# 0.43fF
+C32 a_207_n150# a_495_n150# 0.10fF
+C33 a_975_n150# a_879_n150# 0.43fF
+C34 a_n1229_n150# a_n1041_n150# 0.16fF
+C35 a_n849_n150# a_n1229_n150# 0.07fF
+C36 a_1071_n150# a_1167_n150# 0.43fF
+C37 a_303_n150# a_495_n150# 0.16fF
+C38 a_975_n150# a_1071_n150# 0.43fF
+C39 w_n1367_n369# a_879_n150# 0.04fF
+C40 a_n177_n150# a_n81_n150# 0.43fF
+C41 a_n369_n150# a_n81_n150# 0.10fF
+C42 a_495_n150# a_687_n150# 0.16fF
+C43 a_783_n150# a_495_n150# 0.10fF
+C44 a_n177_n150# a_n369_n150# 0.16fF
+C45 w_n1367_n369# a_1071_n150# 0.07fF
+C46 a_n1137_n150# a_n753_n150# 0.07fF
+C47 a_399_n150# a_591_n150# 0.16fF
+C48 a_111_n150# a_n81_n150# 0.16fF
+C49 a_207_n150# a_591_n150# 0.07fF
+C50 a_399_n150# a_207_n150# 0.16fF
+C51 a_111_n150# a_n177_n150# 0.10fF
+C52 a_n657_n150# a_n465_n150# 0.16fF
+C53 a_n945_n150# a_n561_n150# 0.07fF
+C54 a_n849_n150# a_n465_n150# 0.07fF
+C55 a_n753_n150# a_n945_n150# 0.16fF
+C56 a_n81_n150# a_n273_n150# 0.16fF
+C57 a_15_n150# a_n81_n150# 0.43fF
+C58 a_n177_n150# a_n273_n150# 0.43fF
+C59 a_975_n150# a_1167_n150# 0.16fF
+C60 a_303_n150# a_591_n150# 0.10fF
+C61 a_15_n150# a_n177_n150# 0.16fF
+C62 a_399_n150# a_303_n150# 0.43fF
+C63 a_n369_n150# a_n273_n150# 0.43fF
+C64 a_207_n150# a_303_n150# 0.43fF
+C65 a_15_n150# a_n369_n150# 0.07fF
+C66 a_n657_n150# a_n1041_n150# 0.07fF
+C67 a_n1137_n150# a_n1229_n150# 0.43fF
+C68 a_n849_n150# a_n657_n150# 0.16fF
+C69 a_591_n150# a_687_n150# 0.43fF
+C70 a_399_n150# a_687_n150# 0.10fF
+C71 a_n849_n150# a_n1041_n150# 0.16fF
+C72 a_111_n150# a_n273_n150# 0.07fF
+C73 a_783_n150# a_591_n150# 0.16fF
+C74 a_879_n150# a_495_n150# 0.07fF
+C75 a_399_n150# a_783_n150# 0.07fF
+C76 a_111_n150# a_15_n150# 0.43fF
+C77 w_n1367_n369# a_1167_n150# 0.14fF
+C78 a_n177_n150# a_n561_n150# 0.07fF
+C79 a_975_n150# w_n1367_n369# 0.05fF
+C80 a_n369_n150# a_n561_n150# 0.16fF
+C81 a_n753_n150# a_n369_n150# 0.07fF
+C82 a_n945_n150# a_n1229_n150# 0.10fF
+C83 a_15_n150# a_n273_n150# 0.10fF
+C84 a_303_n150# a_687_n150# 0.07fF
+C85 a_n561_n150# a_n273_n150# 0.10fF
+C86 a_783_n150# a_687_n150# 0.43fF
+C87 a_591_n150# a_879_n150# 0.10fF
+C88 a_n753_n150# a_n561_n150# 0.16fF
+C89 a_n1137_n150# a_n1041_n150# 0.43fF
+C90 a_111_n150# a_495_n150# 0.07fF
+C91 a_n1137_n150# a_n849_n150# 0.10fF
+C92 a_n657_n150# a_n945_n150# 0.10fF
+C93 a_879_n150# a_687_n150# 0.16fF
+C94 a_n945_n150# a_n1041_n150# 0.43fF
+C95 a_783_n150# a_879_n150# 0.43fF
+C96 a_n849_n150# a_n945_n150# 0.43fF
+C97 a_n81_n150# a_n465_n150# 0.07fF
C98 a_1167_n150# VSUBS 0.03fF
C99 a_1071_n150# VSUBS 0.03fF
C100 a_975_n150# VSUBS 0.03fF
@@ -842,7 +842,7 @@
.ends
.subckt charge_pump vss pswitch nswitch out vdd biasp nUp Down w_2544_775# iref nDown
-+ Up
++ Up w_1008_774#
Xsky130_fd_pr__pfet_01v8_4ML9WA_0 vss pswitch vdd pswitch pswitch pswitch nUp pswitch
+ pswitch pswitch pswitch pswitch pswitch pswitch sky130_fd_pr__pfet_01v8_4ML9WA
Xsky130_fd_pr__nfet_01v8_YCGG98_0 vss out out vss vss vss out out vss vss out vss
@@ -865,25 +865,25 @@
Xsky130_fd_pr__pfet_01v8_ND88ZC_1 vss biasp vdd vdd vdd vdd biasp vdd biasp vdd biasp
+ biasp biasp biasp vdd vdd biasp biasp vdd vdd biasp biasp biasp vdd vdd vdd vdd
+ biasp biasp sky130_fd_pr__pfet_01v8_ND88ZC
-C0 Down nDown 0.13fF
-C1 out nswitch 1.28fF
-C2 Down nswitch 2.27fF
-C3 pswitch vdd 3.98fF
-C4 Up nUp 0.15fF
-C5 pswitch nUp 5.66fF
-C6 vdd nswitch 0.07fF
-C7 pswitch Up 0.70fF
-C8 vdd biasp 2.64fF
+C0 biasp iref 0.80fF
+C1 pswitch vdd 3.98fF
+C2 Up pswitch 0.70fF
+C3 Down nDown 0.13fF
+C4 pswitch biasp 3.11fF
+C5 out nswitch 1.28fF
+C6 nswitch iref 1.91fF
+C7 biasp vdd 2.64fF
+C8 Down nswitch 2.27fF
C9 pswitch nswitch 0.06fF
-C10 nDown nswitch 0.31fF
-C11 pswitch biasp 3.11fF
-C12 vdd out 6.66fF
-C13 iref nswitch 1.91fF
-C14 out nUp 0.31fF
-C15 biasp nswitch 0.03fF
-C16 iref biasp 0.80fF
-C17 Down nUp 0.25fF
-C18 pswitch out 4.91fF
+C10 vdd nswitch 0.07fF
+C11 nUp out 0.31fF
+C12 Down nUp 0.25fF
+C13 biasp nswitch 0.03fF
+C14 nUp pswitch 5.66fF
+C15 nDown nswitch 0.31fF
+C16 Up nUp 0.15fF
+C17 pswitch out 4.91fF
+C18 out vdd 6.66fF
C19 vdd vss 35.71fF
C20 Down vss 4.77fF
C21 Up vss 1.17fF
@@ -902,17 +902,17 @@
X1 a_15_n125# a_n15_n156# a_n81_n125# w_n311_n344# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X2 a_111_n125# a_81_n156# a_15_n125# w_n311_n344# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
C0 a_15_n125# a_n81_n125# 0.36fF
-C1 a_111_n125# a_n81_n125# 0.13fF
-C2 a_15_n125# w_n311_n344# 0.09fF
+C1 a_n111_n156# a_n15_n156# 0.02fF
+C2 a_n173_n125# a_15_n125# 0.13fF
C3 a_111_n125# w_n311_n344# 0.14fF
-C4 a_15_n125# a_n173_n125# 0.13fF
-C5 a_111_n125# a_n173_n125# 0.08fF
-C6 a_n111_n156# a_n15_n156# 0.02fF
-C7 a_n15_n156# a_81_n156# 0.02fF
-C8 a_n81_n125# w_n311_n344# 0.09fF
-C9 a_n173_n125# a_n81_n125# 0.36fF
-C10 a_111_n125# a_15_n125# 0.36fF
-C11 a_n173_n125# w_n311_n344# 0.14fF
+C4 w_n311_n344# a_n81_n125# 0.09fF
+C5 a_n173_n125# w_n311_n344# 0.14fF
+C6 w_n311_n344# a_15_n125# 0.09fF
+C7 a_81_n156# a_n15_n156# 0.02fF
+C8 a_111_n125# a_n81_n125# 0.13fF
+C9 a_n173_n125# a_111_n125# 0.08fF
+C10 a_n173_n125# a_n81_n125# 0.36fF
+C11 a_111_n125# a_15_n125# 0.36fF
C12 a_111_n125# VSUBS 0.03fF
C13 a_15_n125# VSUBS 0.03fF
C14 a_n81_n125# VSUBS 0.03fF
@@ -928,14 +928,14 @@
X0 a_111_n125# a_81_n151# a_15_n125# w_n311_n335# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X1 a_n81_n125# a_n111_n151# a_n173_n125# w_n311_n335# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X2 a_15_n125# a_n15_n151# a_n81_n125# w_n311_n335# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
-C0 a_111_n125# a_n173_n125# 0.08fF
-C1 a_15_n125# a_n81_n125# 0.36fF
-C2 a_81_n151# a_n15_n151# 0.02fF
-C3 a_111_n125# a_n81_n125# 0.13fF
-C4 a_111_n125# a_15_n125# 0.36fF
-C5 a_n111_n151# a_n15_n151# 0.02fF
-C6 a_n173_n125# a_n81_n125# 0.36fF
-C7 a_n173_n125# a_15_n125# 0.13fF
+C0 a_n173_n125# a_15_n125# 0.13fF
+C1 a_n111_n151# a_n15_n151# 0.02fF
+C2 a_15_n125# a_111_n125# 0.36fF
+C3 a_n81_n125# a_n173_n125# 0.36fF
+C4 a_n81_n125# a_111_n125# 0.13fF
+C5 a_n81_n125# a_15_n125# 0.36fF
+C6 a_n15_n151# a_81_n151# 0.02fF
+C7 a_n173_n125# a_111_n125# 0.08fF
C8 a_111_n125# w_n311_n335# 0.17fF
C9 a_15_n125# w_n311_n335# 0.12fF
C10 a_n81_n125# w_n311_n335# 0.12fF
@@ -950,9 +950,9 @@
+ vss vss m1_187_n605# sky130_fd_pr__pfet_01v8_4798MH
Xsky130_fd_pr__nfet_01v8_BHR94T_0 vdd vss vdd m1_187_n605# m1_45_n513# m1_45_n513#
+ vdd m1_187_n605# sky130_fd_pr__nfet_01v8_BHR94T
-C0 m1_45_n513# vdd 0.69fF
-C1 vdd m1_187_n605# 0.55fF
-C2 m1_45_n513# m1_187_n605# 0.36fF
+C0 vdd m1_187_n605# 0.55fF
+C1 m1_45_n513# m1_187_n605# 0.36fF
+C2 m1_45_n513# vdd 0.69fF
C3 m1_187_n605# vss 0.93fF
C4 m1_45_n513# vss 1.31fF
C5 vdd vss 3.36fF
@@ -963,16 +963,16 @@
X0 a_n81_n125# a_n111_n186# a_n173_n125# w_n311_n344# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X1 a_15_n125# a_n111_n186# a_n81_n125# w_n311_n344# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X2 a_111_n125# a_n111_n186# a_15_n125# w_n311_n344# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
-C0 a_15_n125# a_111_n125# 0.36fF
-C1 a_15_n125# w_n311_n344# 0.09fF
-C2 a_15_n125# a_n173_n125# 0.13fF
-C3 a_15_n125# a_n81_n125# 0.36fF
-C4 w_n311_n344# a_111_n125# 0.14fF
-C5 a_n173_n125# a_111_n125# 0.08fF
-C6 w_n311_n344# a_n173_n125# 0.14fF
-C7 a_n81_n125# a_111_n125# 0.13fF
-C8 w_n311_n344# a_n81_n125# 0.09fF
-C9 a_n81_n125# a_n173_n125# 0.36fF
+C0 a_n81_n125# w_n311_n344# 0.09fF
+C1 a_n173_n125# a_n81_n125# 0.36fF
+C2 a_n81_n125# a_15_n125# 0.36fF
+C3 a_111_n125# a_n81_n125# 0.13fF
+C4 a_n173_n125# w_n311_n344# 0.14fF
+C5 w_n311_n344# a_15_n125# 0.09fF
+C6 a_111_n125# w_n311_n344# 0.14fF
+C7 a_n173_n125# a_15_n125# 0.13fF
+C8 a_n173_n125# a_111_n125# 0.08fF
+C9 a_111_n125# a_15_n125# 0.36fF
C10 a_111_n125# VSUBS 0.03fF
C11 a_15_n125# VSUBS 0.03fF
C12 a_n81_n125# VSUBS 0.03fF
@@ -986,12 +986,12 @@
X0 a_111_n125# a_n111_n151# a_15_n125# w_n311_n335# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X1 a_n81_n125# a_n111_n151# a_n173_n125# w_n311_n335# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X2 a_15_n125# a_n111_n151# a_n81_n125# w_n311_n335# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
-C0 a_111_n125# a_n173_n125# 0.08fF
-C1 a_111_n125# a_n81_n125# 0.13fF
-C2 a_111_n125# a_15_n125# 0.36fF
-C3 a_n81_n125# a_n173_n125# 0.36fF
-C4 a_15_n125# a_n173_n125# 0.13fF
-C5 a_15_n125# a_n81_n125# 0.36fF
+C0 a_n173_n125# a_15_n125# 0.13fF
+C1 a_n81_n125# a_15_n125# 0.36fF
+C2 a_15_n125# a_111_n125# 0.36fF
+C3 a_n173_n125# a_n81_n125# 0.36fF
+C4 a_n173_n125# a_111_n125# 0.08fF
+C5 a_n81_n125# a_111_n125# 0.13fF
C6 a_111_n125# w_n311_n335# 0.17fF
C7 a_15_n125# w_n311_n335# 0.12fF
C8 a_n81_n125# w_n311_n335# 0.12fF
@@ -1002,8 +1002,8 @@
.subckt inverter_cp_x1 out in vss vdd
Xsky130_fd_pr__pfet_01v8_7KT7MH_0 vss in out vdd vdd vdd out sky130_fd_pr__pfet_01v8_7KT7MH
Xsky130_fd_pr__nfet_01v8_2BS6QM_0 vss out vss vss in out sky130_fd_pr__nfet_01v8_2BS6QM
-C0 vdd out 0.10fF
-C1 in out 0.32fF
+C0 in out 0.32fF
+C1 vdd out 0.10fF
C2 out vss 0.77fF
C3 in vss 0.95fF
C4 vdd vss 3.13fF
@@ -1015,15 +1015,15 @@
Xinverter_cp_x1_0 inverter_cp_x1_0/out CLK vss vdd inverter_cp_x1
Xinverter_cp_x1_1 inverter_cp_x1_2/in CLK vss vdd inverter_cp_x1
Xinverter_cp_x1_2 CLK_d inverter_cp_x1_2/in vss vdd inverter_cp_x1
-C0 inverter_cp_x1_2/in vdd 0.21fF
-C1 nCLK_d vdd 0.03fF
-C2 CLK_d inverter_cp_x1_2/in 0.12fF
-C3 nCLK_d inverter_cp_x1_0/out 0.11fF
-C4 CLK vdd 0.36fF
-C5 CLK_d vdd 0.03fF
-C6 CLK inverter_cp_x1_0/out 0.31fF
-C7 inverter_cp_x1_0/out vdd 0.28fF
-C8 CLK inverter_cp_x1_2/in 0.31fF
+C0 CLK_d vdd 0.03fF
+C1 CLK_d inverter_cp_x1_2/in 0.12fF
+C2 vdd CLK 0.36fF
+C3 inverter_cp_x1_2/in CLK 0.31fF
+C4 CLK inverter_cp_x1_0/out 0.31fF
+C5 nCLK_d vdd 0.03fF
+C6 nCLK_d inverter_cp_x1_0/out 0.11fF
+C7 inverter_cp_x1_2/in vdd 0.21fF
+C8 vdd inverter_cp_x1_0/out 0.28fF
C9 CLK_d vss 0.96fF
C10 inverter_cp_x1_2/in vss 2.01fF
C11 inverter_cp_x1_0/out vss 1.97fF
@@ -1036,12 +1036,12 @@
+ a_n63_n192#
X0 a_63_n95# a_n63_n192# a_n33_n95# w_n263_n314# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=950000u l=150000u
X1 a_n33_n95# a_n63_n192# a_n125_n95# w_n263_n314# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=950000u l=150000u
-C0 a_n125_n95# w_n263_n314# 0.11fF
-C1 a_n33_n95# w_n263_n314# 0.08fF
-C2 w_n263_n314# a_63_n95# 0.11fF
-C3 a_n33_n95# a_n125_n95# 0.28fF
-C4 a_n125_n95# a_63_n95# 0.10fF
-C5 a_n33_n95# a_63_n95# 0.28fF
+C0 w_n263_n314# a_63_n95# 0.11fF
+C1 a_n125_n95# a_n33_n95# 0.28fF
+C2 a_n33_n95# a_63_n95# 0.28fF
+C3 a_n125_n95# a_63_n95# 0.10fF
+C4 a_n33_n95# w_n263_n314# 0.08fF
+C5 a_n125_n95# w_n263_n314# 0.11fF
C6 a_63_n95# VSUBS 0.03fF
C7 a_n33_n95# VSUBS 0.03fF
C8 a_n125_n95# VSUBS 0.03fF
@@ -1054,16 +1054,16 @@
X0 a_111_n125# a_n129_n213# a_15_n125# w_n311_n335# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X1 a_n81_n125# a_n129_n213# a_n173_n125# w_n311_n335# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X2 a_15_n125# a_n129_n213# a_n81_n125# w_n311_n335# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
-C0 a_n81_n125# a_n129_n213# 0.10fF
-C1 a_15_n125# a_n129_n213# 0.10fF
-C2 a_n173_n125# a_n129_n213# 0.02fF
-C3 a_n129_n213# a_111_n125# 0.01fF
-C4 a_15_n125# a_n81_n125# 0.36fF
+C0 a_n173_n125# a_n129_n213# 0.02fF
+C1 a_n129_n213# a_111_n125# 0.01fF
+C2 a_n81_n125# a_15_n125# 0.36fF
+C3 a_n173_n125# a_15_n125# 0.13fF
+C4 a_15_n125# a_111_n125# 0.36fF
C5 a_n173_n125# a_n81_n125# 0.36fF
-C6 a_15_n125# a_n173_n125# 0.13fF
-C7 a_n81_n125# a_111_n125# 0.13fF
-C8 a_15_n125# a_111_n125# 0.36fF
-C9 a_n173_n125# a_111_n125# 0.08fF
+C6 a_n81_n125# a_111_n125# 0.13fF
+C7 a_n173_n125# a_111_n125# 0.08fF
+C8 a_15_n125# a_n129_n213# 0.10fF
+C9 a_n81_n125# a_n129_n213# 0.10fF
C10 a_111_n125# w_n311_n335# 0.05fF
C11 a_15_n125# w_n311_n335# 0.05fF
C12 a_n81_n125# w_n311_n335# 0.05fF
@@ -1074,9 +1074,9 @@
.subckt sky130_fd_pr__nfet_01v8_KU9PSX a_n125_n95# a_n33_n95# a_n81_n183# w_n263_n305#
X0 a_n33_n95# a_n81_n183# a_n125_n95# w_n263_n305# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=950000u l=150000u
X1 a_n125_n95# a_n81_n183# a_n33_n95# w_n263_n305# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=950000u l=150000u
-C0 a_n33_n95# a_n81_n183# 0.10fF
-C1 a_n125_n95# a_n81_n183# 0.16fF
-C2 a_n125_n95# a_n33_n95# 0.88fF
+C0 a_n125_n95# a_n81_n183# 0.16fF
+C1 a_n125_n95# a_n33_n95# 0.88fF
+C2 a_n33_n95# a_n81_n183# 0.10fF
C3 a_n33_n95# w_n263_n305# 0.07fF
C4 a_n125_n95# w_n263_n305# 0.13fF
C5 a_n81_n183# w_n263_n305# 0.31fF
@@ -1088,16 +1088,16 @@
Xsky130_fd_pr__nfet_01v8_2BS854_0 vss CLK vss m1_657_280# m1_657_280# vss sky130_fd_pr__nfet_01v8_2BS854
Xsky130_fd_pr__nfet_01v8_KU9PSX_0 m1_657_280# Q nD vss sky130_fd_pr__nfet_01v8_KU9PSX
Xsky130_fd_pr__nfet_01v8_KU9PSX_1 m1_657_280# nQ D vss sky130_fd_pr__nfet_01v8_KU9PSX
-C0 nD Q 0.05fF
-C1 m1_657_280# CLK 0.24fF
-C2 nD nQ 0.05fF
-C3 m1_657_280# Q 0.94fF
-C4 vdd Q 0.16fF
-C5 nQ m1_657_280# 1.41fF
-C6 nQ Q 0.93fF
-C7 nQ vdd 0.16fF
-C8 D Q 0.05fF
-C9 D nQ 0.05fF
+C0 nQ Q 0.93fF
+C1 CLK m1_657_280# 0.24fF
+C2 Q D 0.05fF
+C3 Q m1_657_280# 0.94fF
+C4 Q nD 0.05fF
+C5 nQ D 0.05fF
+C6 Q vdd 0.16fF
+C7 nQ m1_657_280# 1.41fF
+C8 nQ nD 0.05fF
+C9 nQ vdd 0.16fF
C10 nQ vss 1.16fF
C11 D vss 0.53fF
C12 Q vss -0.55fF
@@ -1116,25 +1116,25 @@
+ latch_diff_0/nD latch_diff_0/D latch_diff
Xlatch_diff_1 latch_diff_1/m1_657_280# nQ Q vss nCLK vdd latch_diff_1/nD latch_diff_1/D
+ latch_diff
-C0 latch_diff_0/m1_657_280# latch_diff_1/nD 0.14fF
-C1 latch_diff_0/D vdd 0.09fF
-C2 latch_diff_0/nD vdd 0.14fF
-C3 nQ latch_diff_1/nD 0.08fF
-C4 latch_diff_1/nD latch_diff_1/D 0.33fF
-C5 latch_diff_0/m1_657_280# latch_diff_1/D 0.43fF
-C6 latch_diff_1/m1_657_280# latch_diff_1/nD 0.42fF
-C7 latch_diff_0/m1_657_280# latch_diff_1/m1_657_280# 0.18fF
-C8 clock_inverter_0/inverter_cp_x1_0/out vdd 0.03fF
-C9 nQ latch_diff_1/D 0.11fF
-C10 latch_diff_1/nD latch_diff_0/D 0.04fF
+C0 latch_diff_1/nD Q 0.01fF
+C1 latch_diff_1/D nQ 0.11fF
+C2 latch_diff_1/nD latch_diff_0/m1_657_280# 0.14fF
+C3 latch_diff_1/m1_657_280# latch_diff_1/nD 0.42fF
+C4 latch_diff_0/m1_657_280# latch_diff_0/nD 0.38fF
+C5 latch_diff_1/m1_657_280# latch_diff_0/m1_657_280# 0.18fF
+C6 latch_diff_1/D latch_diff_1/nD 0.33fF
+C7 latch_diff_1/nD vdd 0.02fF
+C8 latch_diff_1/D latch_diff_0/m1_657_280# 0.43fF
+C9 latch_diff_1/nD latch_diff_0/D 0.04fF
+C10 latch_diff_1/D latch_diff_0/nD 0.41fF
C11 latch_diff_0/m1_657_280# latch_diff_0/D 0.37fF
-C12 latch_diff_1/m1_657_280# latch_diff_1/D 0.32fF
-C13 latch_diff_0/m1_657_280# latch_diff_0/nD 0.38fF
-C14 latch_diff_1/D latch_diff_0/D 0.11fF
-C15 latch_diff_1/nD vdd 0.02fF
-C16 latch_diff_1/D latch_diff_0/nD 0.41fF
-C17 Q latch_diff_1/nD 0.01fF
-C18 latch_diff_1/D vdd 0.03fF
+C12 latch_diff_0/nD vdd 0.14fF
+C13 latch_diff_1/m1_657_280# latch_diff_1/D 0.32fF
+C14 clock_inverter_0/inverter_cp_x1_0/out vdd 0.03fF
+C15 latch_diff_1/D vdd 0.03fF
+C16 latch_diff_1/D latch_diff_0/D 0.11fF
+C17 vdd latch_diff_0/D 0.09fF
+C18 nQ latch_diff_1/nD 0.08fF
C19 nQ vss 0.57fF
C20 Q vss -0.92fF
C21 latch_diff_1/m1_657_280# vss 0.64fF
@@ -1157,24 +1157,24 @@
X1 a_63_n84# a_33_n110# a_n33_n84# w_n359_n303# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=840000u l=150000u
X2 a_n33_n84# a_n63_n110# a_n129_n84# w_n359_n303# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=840000u l=150000u
X3 a_159_n84# a_129_n110# a_63_n84# w_n359_n303# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=840000u l=150000u
-C0 a_63_n84# a_n129_n84# 0.09fF
-C1 a_63_n84# a_159_n84# 0.24fF
-C2 a_n33_n84# a_n129_n84# 0.24fF
-C3 a_n33_n84# a_159_n84# 0.09fF
-C4 a_n129_n84# a_n221_n84# 0.24fF
-C5 a_n221_n84# a_159_n84# 0.04fF
-C6 a_n129_n84# w_n359_n303# 0.06fF
-C7 a_n33_n84# a_63_n84# 0.24fF
-C8 w_n359_n303# a_159_n84# 0.08fF
-C9 a_n63_n110# a_33_n110# 0.02fF
-C10 a_63_n84# a_n221_n84# 0.05fF
-C11 a_n33_n84# a_n221_n84# 0.09fF
-C12 a_63_n84# w_n359_n303# 0.06fF
-C13 a_n129_n84# a_159_n84# 0.05fF
-C14 a_n33_n84# w_n359_n303# 0.05fF
-C15 a_33_n110# a_129_n110# 0.02fF
-C16 a_n221_n84# w_n359_n303# 0.08fF
-C17 a_n63_n110# a_n159_n110# 0.02fF
+C0 a_n33_n84# a_n129_n84# 0.24fF
+C1 a_n221_n84# a_n129_n84# 0.24fF
+C2 w_n359_n303# a_n129_n84# 0.06fF
+C3 a_n129_n84# a_159_n84# 0.05fF
+C4 a_63_n84# a_n129_n84# 0.09fF
+C5 a_n63_n110# a_33_n110# 0.02fF
+C6 a_n159_n110# a_n63_n110# 0.02fF
+C7 a_129_n110# a_33_n110# 0.02fF
+C8 a_n221_n84# a_n33_n84# 0.09fF
+C9 w_n359_n303# a_n33_n84# 0.05fF
+C10 a_n221_n84# w_n359_n303# 0.08fF
+C11 a_n33_n84# a_159_n84# 0.09fF
+C12 a_63_n84# a_n33_n84# 0.24fF
+C13 a_n221_n84# a_159_n84# 0.04fF
+C14 a_n221_n84# a_63_n84# 0.05fF
+C15 w_n359_n303# a_159_n84# 0.08fF
+C16 a_63_n84# w_n359_n303# 0.06fF
+C17 a_63_n84# a_159_n84# 0.24fF
C18 a_159_n84# VSUBS 0.03fF
C19 a_63_n84# VSUBS 0.03fF
C20 a_n33_n84# VSUBS 0.03fF
@@ -1193,19 +1193,19 @@
X1 a_n33_n42# a_n63_n68# a_n129_n42# w_n359_n252# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u
X2 a_159_n42# a_129_n68# a_63_n42# w_n359_n252# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u
X3 a_n129_n42# a_n159_n68# a_n221_n42# w_n359_n252# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u
-C0 a_n129_n42# a_n221_n42# 0.12fF
-C1 a_n159_n68# a_n63_n68# 0.02fF
-C2 a_159_n42# a_n221_n42# 0.02fF
-C3 a_n33_n42# a_n221_n42# 0.05fF
-C4 a_33_n68# a_n63_n68# 0.02fF
-C5 a_63_n42# a_n129_n42# 0.05fF
-C6 a_159_n42# a_63_n42# 0.12fF
-C7 a_n33_n42# a_63_n42# 0.12fF
-C8 a_159_n42# a_n129_n42# 0.03fF
-C9 a_n33_n42# a_n129_n42# 0.12fF
-C10 a_n33_n42# a_159_n42# 0.05fF
-C11 a_129_n68# a_33_n68# 0.02fF
-C12 a_63_n42# a_n221_n42# 0.03fF
+C0 a_33_n68# a_129_n68# 0.02fF
+C1 a_n33_n42# a_63_n42# 0.12fF
+C2 a_63_n42# a_n129_n42# 0.05fF
+C3 a_159_n42# a_n33_n42# 0.05fF
+C4 a_n33_n42# a_n221_n42# 0.05fF
+C5 a_159_n42# a_n129_n42# 0.03fF
+C6 a_n221_n42# a_n129_n42# 0.12fF
+C7 a_159_n42# a_63_n42# 0.12fF
+C8 a_63_n42# a_n221_n42# 0.03fF
+C9 a_33_n68# a_n63_n68# 0.02fF
+C10 a_159_n42# a_n221_n42# 0.02fF
+C11 a_n159_n68# a_n63_n68# 0.02fF
+C12 a_n33_n42# a_n129_n42# 0.12fF
C13 a_159_n42# w_n359_n252# 0.07fF
C14 a_63_n42# w_n359_n252# 0.06fF
C15 a_n33_n42# w_n359_n252# 0.06fF
@@ -1220,9 +1220,9 @@
.subckt inverter_min_x4 in vss out vdd
Xsky130_fd_pr__pfet_01v8_ZP3U9B_0 vss out out vdd in vdd in in vdd in out sky130_fd_pr__pfet_01v8_ZP3U9B
Xsky130_fd_pr__nfet_01v8_DXA56D_0 vss out in in out out vss in in vss sky130_fd_pr__nfet_01v8_DXA56D
-C0 in vdd 0.33fF
+C0 vdd out 0.62fF
C1 in out 0.67fF
-C2 vdd out 0.62fF
+C2 vdd in 0.33fF
C3 out vss 0.66fF
C4 in vss 1.89fF
C5 vdd vss 3.87fF
@@ -1232,10 +1232,10 @@
+ a_n125_n42# a_63_n42#
X0 a_63_n42# a_33_n68# a_n33_n42# w_n263_n252# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u
X1 a_n33_n42# a_n63_n68# a_n125_n42# w_n263_n252# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u
-C0 a_n125_n42# a_n33_n42# 0.12fF
-C1 a_33_n68# a_n63_n68# 0.02fF
-C2 a_63_n42# a_n33_n42# 0.12fF
-C3 a_63_n42# a_n125_n42# 0.05fF
+C0 a_63_n42# a_n125_n42# 0.05fF
+C1 a_n125_n42# a_n33_n42# 0.12fF
+C2 a_33_n68# a_n63_n68# 0.02fF
+C3 a_63_n42# a_n33_n42# 0.12fF
C4 a_63_n42# w_n263_n252# 0.09fF
C5 a_n33_n42# w_n263_n252# 0.07fF
C6 a_n125_n42# w_n263_n252# 0.09fF
@@ -1247,13 +1247,13 @@
+ w_n263_n303# a_n33_n84#
X0 a_63_n84# a_33_n110# a_n33_n84# w_n263_n303# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=840000u l=150000u
X1 a_n33_n84# a_n63_n110# a_n125_n84# w_n263_n303# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=840000u l=150000u
-C0 a_33_n110# a_n63_n110# 0.02fF
-C1 a_n33_n84# w_n263_n303# 0.07fF
-C2 a_63_n84# w_n263_n303# 0.10fF
-C3 a_63_n84# a_n33_n84# 0.24fF
-C4 w_n263_n303# a_n125_n84# 0.10fF
-C5 a_n33_n84# a_n125_n84# 0.24fF
-C6 a_63_n84# a_n125_n84# 0.09fF
+C0 a_63_n84# w_n263_n303# 0.10fF
+C1 a_63_n84# a_n33_n84# 0.24fF
+C2 a_63_n84# a_n125_n84# 0.09fF
+C3 a_33_n110# a_n63_n110# 0.02fF
+C4 a_n33_n84# w_n263_n303# 0.07fF
+C5 w_n263_n303# a_n125_n84# 0.10fF
+C6 a_n33_n84# a_n125_n84# 0.24fF
C7 a_63_n84# VSUBS 0.03fF
C8 a_n33_n84# VSUBS 0.03fF
C9 a_n125_n84# VSUBS 0.03fF
@@ -1265,9 +1265,9 @@
.subckt inverter_min_x2 in out vss vdd
Xsky130_fd_pr__nfet_01v8_5RJ8EK_0 vss in vss in out out sky130_fd_pr__nfet_01v8_5RJ8EK
Xsky130_fd_pr__pfet_01v8_ZPB9BB_0 vss in in out out vdd vdd sky130_fd_pr__pfet_01v8_ZPB9BB
-C0 out vdd 0.15fF
-C1 in vdd 0.01fF
-C2 out in 0.30fF
+C0 out in 0.30fF
+C1 out vdd 0.15fF
+C2 in vdd 0.01fF
C3 vdd vss 2.93fF
C4 out vss 0.66fF
C5 in vss 0.72fF
@@ -1285,41 +1285,41 @@
Xinverter_min_x4_1 o2 vss nCLK_2 vdd inverter_min_x4
Xinverter_min_x2_0 nout_div o2 vss vdd inverter_min_x2
Xinverter_min_x2_1 out_div o1 vss vdd inverter_min_x2
-C0 o2 nCLK_2 0.11fF
-C1 nout_div vdd 0.16fF
-C2 DFlipFlop_0/CLK DFlipFlop_0/latch_diff_1/D -0.48fF
-C3 DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out DFlipFlop_0/CLK 0.29fF
-C4 nout_div DFlipFlop_0/nCLK 0.43fF
-C5 DFlipFlop_0/latch_diff_0/D DFlipFlop_0/nCLK 0.13fF
-C6 DFlipFlop_0/latch_diff_1/nD DFlipFlop_0/nCLK -0.09fF
-C7 clock_inverter_0/inverter_cp_x1_0/out vdd 0.10fF
-C8 DFlipFlop_0/CLK DFlipFlop_0/latch_diff_0/m1_657_280# 0.26fF
-C9 DFlipFlop_0/latch_diff_0/nD DFlipFlop_0/CLK 0.12fF
-C10 vdd o1 0.14fF
-C11 vdd DFlipFlop_0/nCLK 0.30fF
-C12 DFlipFlop_0/latch_diff_1/m1_657_280# nout_div 0.21fF
-C13 nout_div DFlipFlop_0/latch_diff_1/D 0.64fF
-C14 DFlipFlop_0/latch_diff_0/m1_657_280# nout_div 0.24fF
-C15 DFlipFlop_0/CLK nout_div 0.42fF
-C16 DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in vdd 0.03fF
-C17 DFlipFlop_0/latch_diff_0/nD nout_div 0.07fF
-C18 DFlipFlop_0/latch_diff_1/nD DFlipFlop_0/CLK 0.11fF
-C19 DFlipFlop_0/latch_diff_1/m1_657_280# o1 0.02fF
-C20 out_div nout_div 0.22fF
-C21 o2 vdd 0.14fF
-C22 nCLK_2 vdd 0.08fF
-C23 DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in DFlipFlop_0/nCLK 0.46fF
-C24 DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out vdd 0.03fF
-C25 DFlipFlop_0/latch_diff_1/m1_657_280# DFlipFlop_0/nCLK 0.26fF
-C26 DFlipFlop_0/latch_diff_1/D DFlipFlop_0/nCLK 0.08fF
-C27 DFlipFlop_0/CLK vdd 0.40fF
-C28 out_div vdd 0.03fF
-C29 CLK_2 vdd 0.08fF
-C30 DFlipFlop_0/latch_diff_0/D nout_div 0.09fF
-C31 out_div o1 0.01fF
-C32 CLK_2 o1 0.11fF
-C33 DFlipFlop_0/latch_diff_1/nD nout_div 1.18fF
-C34 DFlipFlop_0/latch_diff_1/m1_657_280# o2 0.02fF
+C0 vdd o1 0.14fF
+C1 DFlipFlop_0/latch_diff_1/m1_657_280# nout_div 0.21fF
+C2 nout_div DFlipFlop_0/latch_diff_1/nD 1.18fF
+C3 DFlipFlop_0/latch_diff_1/m1_657_280# o1 0.02fF
+C4 nCLK_2 vdd 0.08fF
+C5 o2 vdd 0.14fF
+C6 nout_div DFlipFlop_0/latch_diff_0/m1_657_280# 0.24fF
+C7 DFlipFlop_0/nCLK DFlipFlop_0/latch_diff_1/D 0.08fF
+C8 DFlipFlop_0/latch_diff_1/m1_657_280# o2 0.02fF
+C9 DFlipFlop_0/nCLK vdd 0.30fF
+C10 DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in DFlipFlop_0/nCLK 0.46fF
+C11 nout_div DFlipFlop_0/latch_diff_0/D 0.09fF
+C12 DFlipFlop_0/CLK DFlipFlop_0/latch_diff_0/nD 0.12fF
+C13 DFlipFlop_0/latch_diff_1/m1_657_280# DFlipFlop_0/nCLK 0.26fF
+C14 out_div vdd 0.03fF
+C15 DFlipFlop_0/nCLK DFlipFlop_0/latch_diff_1/nD -0.09fF
+C16 vdd CLK_2 0.08fF
+C17 clock_inverter_0/inverter_cp_x1_0/out vdd 0.10fF
+C18 DFlipFlop_0/CLK DFlipFlop_0/latch_diff_1/D -0.48fF
+C19 DFlipFlop_0/nCLK nout_div 0.43fF
+C20 vdd DFlipFlop_0/CLK 0.40fF
+C21 o2 nCLK_2 0.11fF
+C22 DFlipFlop_0/nCLK DFlipFlop_0/latch_diff_0/D 0.13fF
+C23 out_div nout_div 0.22fF
+C24 DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in vdd 0.03fF
+C25 DFlipFlop_0/CLK DFlipFlop_0/latch_diff_1/nD 0.11fF
+C26 DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out DFlipFlop_0/CLK 0.29fF
+C27 nout_div DFlipFlop_0/latch_diff_0/nD 0.07fF
+C28 out_div o1 0.01fF
+C29 DFlipFlop_0/CLK DFlipFlop_0/latch_diff_0/m1_657_280# 0.26fF
+C30 o1 CLK_2 0.11fF
+C31 DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out vdd 0.03fF
+C32 DFlipFlop_0/CLK nout_div 0.42fF
+C33 DFlipFlop_0/latch_diff_1/D nout_div 0.64fF
+C34 vdd nout_div 0.16fF
C35 nCLK_2 vss 1.08fF
C36 o2 vss 2.21fF
C37 CLK_2 vss 1.08fF
@@ -1348,9 +1348,9 @@
X1 a_n129_n600# a_n257_n777# a_n221_n600# w_n257_n702# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=6e+06u l=150000u
X2 a_n129_n600# a_n257_n777# a_n221_n600# w_n257_n702# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=6e+06u l=150000u
X3 a_n221_n600# a_n257_n777# a_n129_n600# w_n257_n702# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=6e+06u l=150000u
-C0 a_n129_n600# a_n257_n777# 0.29fF
+C0 a_n221_n600# a_n257_n777# 0.25fF
C1 a_n221_n600# a_n129_n600# 7.87fF
-C2 a_n221_n600# a_n257_n777# 0.25fF
+C2 a_n129_n600# a_n257_n777# 0.29fF
C3 a_n129_n600# VSUBS 0.10fF
C4 a_n221_n600# VSUBS 0.25fF
C5 a_n257_n777# VSUBS 1.05fF
@@ -1362,15 +1362,15 @@
X1 a_n129_n300# a_n257_n404# a_n221_n300# w_n257_n327# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=150000u
X2 a_n129_n300# a_n257_n404# a_n221_n300# w_n257_n327# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=150000u
X3 a_n221_n300# a_n257_n404# a_n129_n300# w_n257_n327# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=150000u
-C0 a_n129_n300# a_n221_n300# 4.05fF
+C0 a_n129_n300# a_n257_n404# 0.30fF
C1 a_n257_n404# a_n221_n300# 0.21fF
-C2 a_n129_n300# a_n257_n404# 0.30fF
+C2 a_n129_n300# a_n221_n300# 4.05fF
C3 a_n129_n300# w_n257_n327# 0.11fF
C4 a_n221_n300# w_n257_n327# 0.25fF
C5 a_n257_n404# w_n257_n327# 1.11fF
.ends
-.subckt buffer_salida a_678_n100# out in vss vdd
+.subckt buffer_salida a_678_n100# out in a_3996_n100# vss vdd
Xsky130_fd_pr__pfet_01v8_58ZKDE_1 vss a_678_n100# a_3996_n100# vdd vdd sky130_fd_pr__pfet_01v8_58ZKDE
Xsky130_fd_pr__pfet_01v8_58ZKDE_2 vss a_678_n100# a_3996_n100# vdd vdd sky130_fd_pr__pfet_01v8_58ZKDE
Xsky130_fd_pr__pfet_01v8_58ZKDE_3 vss a_678_n100# a_3996_n100# vdd vdd sky130_fd_pr__pfet_01v8_58ZKDE
@@ -1517,13 +1517,13 @@
Xsky130_fd_pr__pfet_01v8_58ZKDE_29 vss a_3996_n100# out vdd vdd sky130_fd_pr__pfet_01v8_58ZKDE
Xsky130_fd_pr__pfet_01v8_58ZKDE_19 vss a_3996_n100# out vdd vdd sky130_fd_pr__pfet_01v8_58ZKDE
Xsky130_fd_pr__pfet_01v8_58ZKDE_0 vss in a_678_n100# vdd vdd sky130_fd_pr__pfet_01v8_58ZKDE
-C0 a_678_n100# a_3996_n100# 6.52fF
-C1 vdd a_678_n100# 0.08fF
+C0 in vdd 0.02fF
+C1 in a_678_n100# 0.81fF
C2 out a_3996_n100# 55.19fF
-C3 out vdd 47.17fF
-C4 in vdd 0.02fF
-C5 in a_678_n100# 0.81fF
-C6 vdd a_3996_n100# 3.68fF
+C3 a_3996_n100# vdd 3.68fF
+C4 out vdd 47.17fF
+C5 a_3996_n100# a_678_n100# 6.52fF
+C6 a_678_n100# vdd 0.08fF
C7 vdd vss 20.93fF
C8 out vss 35.17fF
C9 a_3996_n100# vss 49.53fF
@@ -1533,9 +1533,9 @@
.subckt sky130_fd_pr__nfet_01v8_CBAU6Y a_n73_n150# a_n33_n238# w_n211_n360# a_15_n150#
X0 a_15_n150# a_n33_n238# a_n73_n150# w_n211_n360# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=150000u
-C0 a_15_n150# a_n73_n150# 0.51fF
-C1 a_n33_n238# a_15_n150# 0.02fF
-C2 a_n33_n238# a_n73_n150# 0.02fF
+C0 a_n33_n238# a_n73_n150# 0.02fF
+C1 a_15_n150# a_n33_n238# 0.02fF
+C2 a_15_n150# a_n73_n150# 0.51fF
C3 a_15_n150# w_n211_n360# 0.23fF
C4 a_n73_n150# w_n211_n360# 0.23fF
C5 a_n33_n238# w_n211_n360# 0.17fF
@@ -1543,11 +1543,11 @@
.subckt sky130_fd_pr__pfet_01v8_4757AC VSUBS a_n73_n150# a_n33_181# w_n211_n369# a_15_n150#
X0 a_15_n150# a_n33_181# a_n73_n150# w_n211_n369# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=150000u
-C0 a_n73_n150# a_n33_181# 0.01fF
-C1 w_n211_n369# a_n73_n150# 0.20fF
-C2 a_n33_181# a_15_n150# 0.01fF
-C3 w_n211_n369# a_15_n150# 0.20fF
-C4 w_n211_n369# a_n33_181# 0.05fF
+C0 w_n211_n369# a_n33_181# 0.05fF
+C1 a_n73_n150# w_n211_n369# 0.20fF
+C2 a_n73_n150# a_n33_181# 0.01fF
+C3 a_15_n150# w_n211_n369# 0.20fF
+C4 a_15_n150# a_n33_181# 0.01fF
C5 a_n73_n150# a_15_n150# 0.51fF
C6 a_15_n150# VSUBS 0.03fF
C7 a_n73_n150# VSUBS 0.03fF
@@ -1568,51 +1568,51 @@
X7 a_351_n150# a_n465_172# a_255_n150# w_n647_n360# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=150000u
X8 a_255_n150# a_n465_172# a_159_n150# w_n647_n360# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=150000u
X9 a_n321_n150# a_n465_172# a_n417_n150# w_n647_n360# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=150000u
-C0 a_255_n150# a_159_n150# 0.43fF
-C1 a_n465_172# a_63_n150# 0.10fF
-C2 a_63_n150# a_n225_n150# 0.10fF
-C3 a_255_n150# a_351_n150# 0.43fF
-C4 a_n417_n150# a_n509_n150# 0.43fF
-C5 a_n33_n150# a_159_n150# 0.16fF
-C6 a_n33_n150# a_n417_n150# 0.07fF
-C7 a_n465_172# a_159_n150# 0.10fF
-C8 a_n129_n150# a_n321_n150# 0.16fF
-C9 a_n465_172# a_n417_n150# 0.10fF
-C10 a_n33_n150# a_351_n150# 0.07fF
-C11 a_n225_n150# a_159_n150# 0.07fF
-C12 a_447_n150# a_255_n150# 0.16fF
-C13 a_n129_n150# a_255_n150# 0.07fF
-C14 a_n225_n150# a_n417_n150# 0.16fF
-C15 a_n465_172# a_351_n150# 0.10fF
-C16 a_n129_n150# a_n509_n150# 0.07fF
-C17 a_63_n150# a_159_n150# 0.43fF
-C18 a_n33_n150# a_n129_n150# 0.43fF
-C19 a_63_n150# a_351_n150# 0.10fF
-C20 a_n509_n150# a_n321_n150# 0.16fF
-C21 a_447_n150# a_n465_172# 0.01fF
-C22 a_n465_172# a_n129_n150# 0.10fF
-C23 a_n225_n150# a_n129_n150# 0.43fF
-C24 a_n33_n150# a_n321_n150# 0.10fF
-C25 a_n465_172# a_n321_n150# 0.10fF
-C26 a_447_n150# a_63_n150# 0.07fF
-C27 a_159_n150# a_351_n150# 0.16fF
-C28 a_n33_n150# a_255_n150# 0.10fF
-C29 a_63_n150# a_n129_n150# 0.16fF
-C30 a_n225_n150# a_n321_n150# 0.43fF
-C31 a_n465_172# a_255_n150# 0.10fF
-C32 a_n465_172# a_n509_n150# 0.01fF
-C33 a_63_n150# a_n321_n150# 0.07fF
-C34 a_n225_n150# a_n509_n150# 0.10fF
-C35 a_447_n150# a_159_n150# 0.10fF
-C36 a_n129_n150# a_159_n150# 0.10fF
-C37 a_63_n150# a_255_n150# 0.16fF
-C38 a_n33_n150# a_n465_172# 0.10fF
-C39 a_n129_n150# a_n417_n150# 0.10fF
-C40 a_n33_n150# a_n225_n150# 0.16fF
-C41 a_447_n150# a_351_n150# 0.43fF
-C42 a_n465_172# a_n225_n150# 0.10fF
-C43 a_n417_n150# a_n321_n150# 0.43fF
-C44 a_n33_n150# a_63_n150# 0.43fF
+C0 a_n129_n150# a_63_n150# 0.16fF
+C1 a_159_n150# a_63_n150# 0.43fF
+C2 a_447_n150# a_63_n150# 0.07fF
+C3 a_255_n150# a_n465_172# 0.10fF
+C4 a_n129_n150# a_n225_n150# 0.43fF
+C5 a_159_n150# a_n225_n150# 0.07fF
+C6 a_255_n150# a_n33_n150# 0.10fF
+C7 a_n417_n150# a_n129_n150# 0.10fF
+C8 a_n465_172# a_n33_n150# 0.10fF
+C9 a_n465_172# a_n509_n150# 0.01fF
+C10 a_255_n150# a_63_n150# 0.16fF
+C11 a_351_n150# a_447_n150# 0.43fF
+C12 a_351_n150# a_159_n150# 0.16fF
+C13 a_n465_172# a_63_n150# 0.10fF
+C14 a_n33_n150# a_63_n150# 0.43fF
+C15 a_n321_n150# a_n129_n150# 0.16fF
+C16 a_n465_172# a_n225_n150# 0.10fF
+C17 a_n417_n150# a_n465_172# 0.10fF
+C18 a_n33_n150# a_n225_n150# 0.16fF
+C19 a_n417_n150# a_n33_n150# 0.07fF
+C20 a_n509_n150# a_n225_n150# 0.10fF
+C21 a_255_n150# a_351_n150# 0.43fF
+C22 a_n417_n150# a_n509_n150# 0.43fF
+C23 a_351_n150# a_n465_172# 0.10fF
+C24 a_n225_n150# a_63_n150# 0.10fF
+C25 a_351_n150# a_n33_n150# 0.07fF
+C26 a_n321_n150# a_n465_172# 0.10fF
+C27 a_n417_n150# a_n225_n150# 0.16fF
+C28 a_n321_n150# a_n33_n150# 0.10fF
+C29 a_159_n150# a_n129_n150# 0.10fF
+C30 a_159_n150# a_447_n150# 0.10fF
+C31 a_351_n150# a_63_n150# 0.10fF
+C32 a_n321_n150# a_n509_n150# 0.16fF
+C33 a_n321_n150# a_63_n150# 0.07fF
+C34 a_n321_n150# a_n225_n150# 0.43fF
+C35 a_255_n150# a_n129_n150# 0.07fF
+C36 a_n417_n150# a_n321_n150# 0.43fF
+C37 a_255_n150# a_447_n150# 0.16fF
+C38 a_255_n150# a_159_n150# 0.43fF
+C39 a_n465_172# a_n129_n150# 0.10fF
+C40 a_n465_172# a_447_n150# 0.01fF
+C41 a_159_n150# a_n465_172# 0.10fF
+C42 a_n33_n150# a_n129_n150# 0.43fF
+C43 a_159_n150# a_n33_n150# 0.16fF
+C44 a_n509_n150# a_n129_n150# 0.07fF
C45 a_447_n150# w_n647_n360# 0.17fF
C46 a_351_n150# w_n647_n360# 0.10fF
C47 a_255_n150# w_n647_n360# 0.08fF
@@ -1640,61 +1640,61 @@
X7 a_159_n150# a_n465_n247# a_63_n150# w_n647_n369# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=150000u
X8 a_n225_n150# a_n465_n247# a_n321_n150# w_n647_n369# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=150000u
X9 a_447_n150# a_n465_n247# a_351_n150# w_n647_n369# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=150000u
-C0 w_n647_n369# a_n321_n150# 0.05fF
-C1 a_n465_n247# w_n647_n369# 0.47fF
-C2 a_n129_n150# w_n647_n369# 0.02fF
-C3 a_63_n150# a_159_n150# 0.43fF
-C4 a_n509_n150# a_n321_n150# 0.16fF
-C5 a_255_n150# w_n647_n369# 0.05fF
-C6 a_n129_n150# a_n509_n150# 0.07fF
-C7 a_n225_n150# a_159_n150# 0.07fF
-C8 a_n33_n150# a_351_n150# 0.07fF
-C9 a_159_n150# a_447_n150# 0.10fF
-C10 a_63_n150# w_n647_n369# 0.02fF
-C11 a_n33_n150# a_n417_n150# 0.07fF
-C12 a_351_n150# a_n465_n247# 0.08fF
-C13 a_n417_n150# a_n321_n150# 0.43fF
-C14 a_n225_n150# w_n647_n369# 0.04fF
-C15 a_n417_n150# a_n465_n247# 0.08fF
-C16 a_447_n150# w_n647_n369# 0.14fF
-C17 a_n417_n150# a_n129_n150# 0.10fF
-C18 a_351_n150# a_255_n150# 0.43fF
-C19 a_n225_n150# a_n509_n150# 0.10fF
-C20 a_n33_n150# a_n321_n150# 0.10fF
-C21 a_n33_n150# a_n465_n247# 0.08fF
-C22 a_159_n150# w_n647_n369# 0.04fF
-C23 a_351_n150# a_63_n150# 0.10fF
-C24 a_n33_n150# a_n129_n150# 0.43fF
-C25 a_n465_n247# a_n321_n150# 0.08fF
-C26 a_n33_n150# a_255_n150# 0.10fF
-C27 a_n129_n150# a_n321_n150# 0.16fF
-C28 a_n129_n150# a_n465_n247# 0.08fF
-C29 a_351_n150# a_447_n150# 0.43fF
-C30 a_n417_n150# a_n225_n150# 0.16fF
-C31 a_255_n150# a_n465_n247# 0.08fF
-C32 a_n33_n150# a_63_n150# 0.43fF
-C33 a_255_n150# a_n129_n150# 0.07fF
-C34 a_351_n150# a_159_n150# 0.16fF
-C35 w_n647_n369# a_n509_n150# 0.14fF
-C36 a_63_n150# a_n321_n150# 0.07fF
-C37 a_63_n150# a_n465_n247# 0.08fF
-C38 a_n33_n150# a_n225_n150# 0.16fF
-C39 a_63_n150# a_n129_n150# 0.16fF
-C40 a_n225_n150# a_n321_n150# 0.43fF
-C41 a_n225_n150# a_n465_n247# 0.08fF
-C42 a_63_n150# a_255_n150# 0.16fF
-C43 a_351_n150# w_n647_n369# 0.07fF
-C44 a_n225_n150# a_n129_n150# 0.43fF
-C45 a_n33_n150# a_159_n150# 0.16fF
-C46 a_n417_n150# w_n647_n369# 0.07fF
-C47 a_255_n150# a_447_n150# 0.16fF
-C48 a_159_n150# a_n465_n247# 0.08fF
-C49 a_n417_n150# a_n509_n150# 0.43fF
-C50 a_159_n150# a_n129_n150# 0.10fF
-C51 a_n225_n150# a_63_n150# 0.10fF
-C52 a_n33_n150# w_n647_n369# 0.02fF
-C53 a_63_n150# a_447_n150# 0.07fF
-C54 a_255_n150# a_159_n150# 0.43fF
+C0 a_63_n150# a_n465_n247# 0.08fF
+C1 a_n465_n247# a_n321_n150# 0.08fF
+C2 a_351_n150# a_n33_n150# 0.07fF
+C3 a_255_n150# w_n647_n369# 0.05fF
+C4 a_255_n150# a_n129_n150# 0.07fF
+C5 a_351_n150# a_159_n150# 0.16fF
+C6 a_447_n150# a_159_n150# 0.10fF
+C7 a_n417_n150# a_n33_n150# 0.07fF
+C8 w_n647_n369# a_n33_n150# 0.02fF
+C9 a_n129_n150# a_n33_n150# 0.43fF
+C10 a_n509_n150# a_n417_n150# 0.43fF
+C11 a_n509_n150# w_n647_n369# 0.14fF
+C12 a_63_n150# a_255_n150# 0.16fF
+C13 a_n509_n150# a_n129_n150# 0.07fF
+C14 a_n465_n247# a_255_n150# 0.08fF
+C15 w_n647_n369# a_159_n150# 0.04fF
+C16 a_n129_n150# a_159_n150# 0.10fF
+C17 a_n225_n150# a_n33_n150# 0.16fF
+C18 a_351_n150# a_447_n150# 0.43fF
+C19 a_63_n150# a_n33_n150# 0.43fF
+C20 a_n321_n150# a_n33_n150# 0.10fF
+C21 a_n509_n150# a_n225_n150# 0.10fF
+C22 a_n465_n247# a_n33_n150# 0.08fF
+C23 a_n509_n150# a_n321_n150# 0.16fF
+C24 a_n225_n150# a_159_n150# 0.07fF
+C25 a_63_n150# a_159_n150# 0.43fF
+C26 a_351_n150# w_n647_n369# 0.07fF
+C27 a_447_n150# w_n647_n369# 0.14fF
+C28 a_n465_n247# a_159_n150# 0.08fF
+C29 w_n647_n369# a_n417_n150# 0.07fF
+C30 a_n129_n150# a_n417_n150# 0.10fF
+C31 a_n129_n150# w_n647_n369# 0.02fF
+C32 a_63_n150# a_351_n150# 0.10fF
+C33 a_63_n150# a_447_n150# 0.07fF
+C34 a_255_n150# a_n33_n150# 0.10fF
+C35 a_n465_n247# a_351_n150# 0.08fF
+C36 a_255_n150# a_159_n150# 0.43fF
+C37 a_n225_n150# a_n417_n150# 0.16fF
+C38 a_n225_n150# w_n647_n369# 0.04fF
+C39 a_n129_n150# a_n225_n150# 0.43fF
+C40 a_63_n150# w_n647_n369# 0.02fF
+C41 a_63_n150# a_n129_n150# 0.16fF
+C42 a_n417_n150# a_n321_n150# 0.43fF
+C43 w_n647_n369# a_n321_n150# 0.05fF
+C44 a_n129_n150# a_n321_n150# 0.16fF
+C45 a_n465_n247# a_n417_n150# 0.08fF
+C46 a_n465_n247# w_n647_n369# 0.47fF
+C47 a_n465_n247# a_n129_n150# 0.08fF
+C48 a_159_n150# a_n33_n150# 0.16fF
+C49 a_63_n150# a_n225_n150# 0.10fF
+C50 a_n225_n150# a_n321_n150# 0.43fF
+C51 a_351_n150# a_255_n150# 0.43fF
+C52 a_255_n150# a_447_n150# 0.16fF
+C53 a_63_n150# a_n321_n150# 0.07fF
+C54 a_n465_n247# a_n225_n150# 0.08fF
C55 a_447_n150# VSUBS 0.03fF
C56 a_351_n150# VSUBS 0.03fF
C57 a_255_n150# VSUBS 0.03fF
@@ -1712,8 +1712,8 @@
.subckt sky130_fd_pr__nfet_01v8_EDT3AT a_15_n11# a_n33_n99# w_n211_n221# a_n73_n11#
X0 a_15_n11# a_n33_n99# a_n73_n11# w_n211_n221# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u
-C0 a_n33_n99# a_n73_n11# 0.02fF
-C1 a_n33_n99# a_15_n11# 0.02fF
+C0 a_n33_n99# a_15_n11# 0.02fF
+C1 a_n33_n99# a_n73_n11# 0.02fF
C2 a_15_n11# a_n73_n11# 0.15fF
C3 a_15_n11# w_n211_n221# 0.09fF
C4 a_n73_n11# w_n211_n221# 0.09fF
@@ -1731,9 +1731,9 @@
.subckt sky130_fd_pr__pfet_01v8_HRYSXS VSUBS a_n33_n211# a_n78_n114# w_n216_n334#
+ a_20_n114#
X0 a_20_n114# a_n33_n211# a_n78_n114# w_n216_n334# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=200000u
-C0 a_20_n114# a_n78_n114# 0.42fF
-C1 a_20_n114# w_n216_n334# 0.20fF
-C2 w_n216_n334# a_n78_n114# 0.20fF
+C0 w_n216_n334# a_n78_n114# 0.20fF
+C1 w_n216_n334# a_20_n114# 0.20fF
+C2 a_20_n114# a_n78_n114# 0.42fF
C3 a_20_n114# VSUBS 0.03fF
C4 a_n78_n114# VSUBS 0.03fF
C5 a_n33_n211# VSUBS 0.12fF
@@ -1743,11 +1743,11 @@
.subckt inverter_csvco in vbulkn out vbulkp vdd vss
Xsky130_fd_pr__nfet_01v8_AQR2CW_0 in vss vbulkn out sky130_fd_pr__nfet_01v8_AQR2CW
Xsky130_fd_pr__pfet_01v8_HRYSXS_0 vbulkn in vdd vbulkp out sky130_fd_pr__pfet_01v8_HRYSXS
-C0 vbulkp out 0.08fF
+C0 out vbulkp 0.08fF
C1 in out 0.11fF
-C2 in vss 0.01fF
-C3 vbulkp vdd 0.04fF
-C4 in vdd 0.01fF
+C2 vss in 0.01fF
+C3 vdd vbulkp 0.04fF
+C4 vdd in 0.01fF
C5 vbulkp vbulkn 2.49fF
C6 out vbulkn 0.60fF
C7 vdd vbulkn 0.06fF
@@ -1765,20 +1765,20 @@
+ vdd vdd sky130_fd_pr__pfet_01v8_8DL6ZL
Xsky130_fd_pr__nfet_01v8_EDT3AT_0 cap_vco_0/t D0 vss out sky130_fd_pr__nfet_01v8_EDT3AT
Xinverter_csvco_0 in vss out vdd inverter_csvco_0/vdd inverter_csvco_0/vss inverter_csvco
-C0 inverter_csvco_0/vdd cap_vco_0/t 0.10fF
-C1 inverter_csvco_0/vdd out 0.02fF
-C2 in out 0.06fF
-C3 D0 out 0.09fF
-C4 vdd cap_vco_0/t 0.04fF
-C5 out inverter_csvco_0/vss 0.03fF
-C6 inverter_csvco_0/vdd in 0.01fF
-C7 inverter_csvco_0/vdd vdd 1.89fF
-C8 inverter_csvco_0/vdd vbp 0.75fF
-C9 in inverter_csvco_0/vss 0.01fF
-C10 out cap_vco_0/t 0.70fF
-C11 D0 inverter_csvco_0/vss 0.02fF
-C12 vdd vbp 1.21fF
-C13 vctrl inverter_csvco_0/vss 0.87fF
+C0 vdd inverter_csvco_0/vdd 1.89fF
+C1 out in 0.06fF
+C2 D0 inverter_csvco_0/vss 0.02fF
+C3 out D0 0.09fF
+C4 out cap_vco_0/t 0.70fF
+C5 inverter_csvco_0/vdd in 0.01fF
+C6 vctrl inverter_csvco_0/vss 0.87fF
+C7 out inverter_csvco_0/vdd 0.02fF
+C8 vbp inverter_csvco_0/vdd 0.75fF
+C9 inverter_csvco_0/vdd cap_vco_0/t 0.10fF
+C10 vdd vbp 1.21fF
+C11 vdd cap_vco_0/t 0.04fF
+C12 in inverter_csvco_0/vss 0.01fF
+C13 out inverter_csvco_0/vss 0.03fF
C14 out vss 0.93fF
C15 inverter_csvco_0/vdd vss 0.26fF
C16 in vss 0.69fF
@@ -1805,21 +1805,21 @@
Xcsvco_branch_1 vctrl csvco_branch_1/inverter_csvco_0/vdd csvco_branch_1/in csvco_branch_2/vbp
+ csvco_branch_1/cap_vco_0/t D0 csvco_branch_2/in csvco_branch_1/inverter_csvco_0/vss
+ vss vdd csvco_branch
-C0 vdd csvco_branch_0/inverter_csvco_0/vdd 0.13fF
-C1 csvco_branch_1/inverter_csvco_0/vss D0 0.68fF
-C2 D0 csvco_branch_0/inverter_csvco_0/vss 0.49fF
-C3 csvco_branch_2/vbp csvco_branch_0/inverter_csvco_0/vdd 0.06fF
-C4 vctrl D0 4.41fF
-C5 csvco_branch_1/cap_vco_0/t out_vco 0.03fF
-C6 out_vco csvco_branch_1/in 0.76fF
-C7 csvco_branch_2/in out_vco 0.58fF
-C8 csvco_branch_0/cap_vco_0/t out_vco 0.03fF
-C9 vdd csvco_branch_2/vbp 1.49fF
-C10 csvco_branch_2/vbp csvco_branch_0/inverter_csvco_0/vss 0.06fF
+C0 out_vco csvco_branch_1/in 0.76fF
+C1 csvco_branch_2/vbp csvco_branch_0/inverter_csvco_0/vss 0.06fF
+C2 vctrl D0 4.41fF
+C3 vdd csvco_branch_1/inverter_csvco_0/vdd 0.19fF
+C4 csvco_branch_2/inverter_csvco_0/vdd vdd 0.10fF
+C5 D0 csvco_branch_2/inverter_csvco_0/vss 0.68fF
+C6 D0 csvco_branch_0/inverter_csvco_0/vss 0.49fF
+C7 out_vco csvco_branch_0/cap_vco_0/t 0.03fF
+C8 out_vco csvco_branch_1/cap_vco_0/t 0.03fF
+C9 csvco_branch_1/inverter_csvco_0/vss D0 0.68fF
+C10 csvco_branch_2/vbp csvco_branch_0/inverter_csvco_0/vdd 0.06fF
C11 vctrl csvco_branch_2/vbp 0.06fF
-C12 vdd csvco_branch_2/inverter_csvco_0/vdd 0.10fF
-C13 D0 csvco_branch_2/inverter_csvco_0/vss 0.68fF
-C14 vdd csvco_branch_1/inverter_csvco_0/vdd 0.19fF
+C12 csvco_branch_2/vbp vdd 1.49fF
+C13 csvco_branch_0/inverter_csvco_0/vdd vdd 0.13fF
+C14 out_vco csvco_branch_2/in 0.58fF
C15 csvco_branch_2/in vss 1.60fF
C16 csvco_branch_1/inverter_csvco_0/vdd vss 0.16fF
C17 csvco_branch_1/cap_vco_0/t vss 7.10fF
@@ -1842,11 +1842,11 @@
Xinverter_min_x4_0 o1 vss out_div vdd inverter_min_x4
Xinverter_min_x4_1 out_div vss out_pad vdd inverter_min_x4
Xinverter_min_x2_0 in_vco o1 vss vdd inverter_min_x2
-C0 out_div vdd 0.17fF
-C1 out_pad vdd 0.10fF
-C2 out_pad out_div 0.15fF
-C3 o1 vdd 0.09fF
-C4 out_div o1 0.11fF
+C0 out_pad out_div 0.15fF
+C1 vdd out_pad 0.10fF
+C2 o1 out_div 0.11fF
+C3 vdd o1 0.09fF
+C4 vdd out_div 0.17fF
C5 in_vco vss 0.83fF
C6 out_pad vss 0.70fF
C7 out_div vss 3.00fF
@@ -1866,27 +1866,27 @@
X7 a_455_87# A VGND VNB sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=740000u l=150000u
X8 VGND B a_194_125# VNB sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=550000u l=150000u
X9 VGND a_194_125# X VNB sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=740000u l=150000u
-C0 B a_194_125# 0.57fF
-C1 A VPWR 0.15fF
-C2 VPWR X 0.07fF
-C3 a_158_392# a_194_125# 0.06fF
-C4 A a_355_368# 0.02fF
-C5 X a_355_368# 0.17fF
-C6 B A 0.28fF
-C7 B X 0.13fF
-C8 VGND VPWR 0.01fF
-C9 VPB VPWR 0.06fF
-C10 B VGND 0.10fF
-C11 A a_194_125# 0.18fF
-C12 a_194_125# X 0.29fF
-C13 VPWR a_355_368# 0.37fF
-C14 B VPWR 0.09fF
-C15 B a_355_368# 0.08fF
+C0 VGND X 0.28fF
+C1 A a_355_368# 0.02fF
+C2 VGND VPWR 0.01fF
+C3 B a_194_125# 0.57fF
+C4 a_355_368# a_194_125# 0.51fF
+C5 a_355_368# B 0.08fF
+C6 A VPWR 0.15fF
+C7 a_158_392# a_194_125# 0.06fF
+C8 X a_194_125# 0.29fF
+C9 B X 0.13fF
+C10 a_194_125# VPWR 0.33fF
+C11 B VPWR 0.09fF
+C12 a_355_368# X 0.17fF
+C13 a_355_368# VPWR 0.37fF
+C14 X VPWR 0.07fF
+C15 A VGND 0.31fF
C16 VGND a_194_125# 0.25fF
-C17 VGND A 0.31fF
-C18 VGND X 0.28fF
-C19 a_194_125# VPWR 0.33fF
-C20 a_194_125# a_355_368# 0.51fF
+C17 B VGND 0.10fF
+C18 VPB VPWR 0.06fF
+C19 A a_194_125# 0.18fF
+C20 A B 0.28fF
C21 VGND VNB 0.78fF
C22 X VNB 0.21fF
C23 VPWR VNB 0.78fF
@@ -1904,20 +1904,20 @@
X3 a_143_136# A a_56_136# VNB sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u
X4 a_56_136# A VPWR VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=840000u l=150000u
X5 X a_56_136# VPWR VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.12e+06u l=150000u
-C0 a_56_136# X 0.26fF
-C1 VPWR VPB 0.04fF
-C2 VPWR a_56_136# 0.57fF
-C3 B X 0.02fF
-C4 VPWR B 0.02fF
-C5 VGND X 0.15fF
-C6 A VPWR 0.07fF
-C7 B a_56_136# 0.30fF
-C8 VPWR X 0.20fF
-C9 VGND a_56_136# 0.06fF
-C10 A a_56_136# 0.17fF
-C11 VGND B 0.03fF
-C12 A B 0.08fF
-C13 VGND A 0.21fF
+C0 B A 0.08fF
+C1 VGND X 0.15fF
+C2 A VPWR 0.07fF
+C3 B a_56_136# 0.30fF
+C4 VPWR a_56_136# 0.57fF
+C5 X a_56_136# 0.26fF
+C6 VGND A 0.21fF
+C7 VGND a_56_136# 0.06fF
+C8 A a_56_136# 0.17fF
+C9 B VPWR 0.02fF
+C10 B X 0.02fF
+C11 VPB VPWR 0.04fF
+C12 X VPWR 0.20fF
+C13 B VGND 0.03fF
C14 VGND VNB 0.50fF
C15 X VNB 0.23fF
C16 VPWR VNB 0.50fF
@@ -1934,20 +1934,20 @@
X3 X a_63_368# VPWR VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.12e+06u l=150000u
X4 a_63_368# B VGND VNB sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=550000u l=150000u
X5 VGND A a_63_368# VNB sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=550000u l=150000u
-C0 a_63_368# A 0.28fF
-C1 B VPWR 0.01fF
-C2 a_63_368# VGND 0.27fF
+C0 B a_63_368# 0.14fF
+C1 X VGND 0.16fF
+C2 B VGND 0.11fF
C3 X VPWR 0.18fF
-C4 a_63_368# B 0.14fF
-C5 B A 0.10fF
-C6 a_63_368# X 0.33fF
+C4 B VPWR 0.01fF
+C5 VGND a_63_368# 0.27fF
+C6 VPWR a_63_368# 0.29fF
C7 X A 0.02fF
-C8 B VGND 0.11fF
-C9 a_63_368# VPWR 0.29fF
-C10 VPWR VPB 0.04fF
-C11 a_63_368# a_152_368# 0.03fF
-C12 VGND X 0.16fF
-C13 A VPWR 0.05fF
+C8 B A 0.10fF
+C9 VPWR VPB 0.04fF
+C10 A a_63_368# 0.28fF
+C11 a_152_368# a_63_368# 0.03fF
+C12 A VPWR 0.05fF
+C13 X a_63_368# 0.33fF
C14 VGND VNB 0.53fF
C15 X VNB 0.24fF
C16 A VNB 0.21fF
@@ -1996,163 +1996,163 @@
+ sky130_fd_sc_hs__and2_1_1/a_56_136# sky130_fd_sc_hs__and2_1
Xsky130_fd_sc_hs__or2_1_0 Q1 Q1_shift vss vss vdd vdd CLK_5 sky130_fd_sc_hs__or2_1_0/a_152_368#
+ sky130_fd_sc_hs__or2_1_0/a_63_368# sky130_fd_sc_hs__or2_1
-C0 DFlipFlop_3/latch_diff_1/m1_657_280# Q1 0.28fF
-C1 nCLK DFlipFlop_2/latch_diff_0/D 0.11fF
-C2 sky130_fd_sc_hs__xor2_1_0/a_455_87# DFlipFlop_2/D 0.08fF
-C3 nCLK DFlipFlop_1/D 0.14fF
-C4 vdd DFlipFlop_0/D 0.19fF
-C5 vdd CLK 0.41fF
-C6 nCLK DFlipFlop_1/latch_diff_0/D 0.11fF
-C7 nQ0 DFlipFlop_1/latch_diff_0/nD 0.08fF
-C8 Q1 Q1_shift 0.36fF
-C9 CLK nQ2 0.17fF
-C10 CLK DFlipFlop_1/latch_diff_1/D 0.14fF
-C11 sky130_fd_sc_hs__xor2_1_0/a_194_125# DFlipFlop_2/D 0.08fF
-C12 sky130_fd_sc_hs__xor2_1_0/a_194_125# Q0 0.26fF
-C13 vdd nQ2 0.04fF
-C14 nQ0 nCLK 0.09fF
-C15 nCLK Q1 -0.01fF
-C16 nCLK DFlipFlop_2/D 0.41fF
-C17 nCLK Q0 0.20fF
-C18 nCLK DFlipFlop_2/latch_diff_1/m1_657_280# 0.28fF
-C19 Q1 DFlipFlop_0/latch_diff_1/nD 0.10fF
-C20 nQ0 DFlipFlop_1/latch_diff_1/m1_657_280# 0.21fF
-C21 CLK DFlipFlop_1/latch_diff_1/nD 0.09fF
-C22 Q0 DFlipFlop_0/latch_diff_1/nD 0.21fF
-C23 sky130_fd_sc_hs__or2_1_0/a_63_368# Q1 0.10fF
-C24 DFlipFlop_1/latch_diff_1/m1_657_280# DFlipFlop_2/D 0.04fF
-C25 DFlipFlop_1/latch_diff_1/m1_657_280# Q0 0.01fF
-C26 DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out nCLK 0.05fF
-C27 CLK DFlipFlop_2/latch_diff_1/D 0.14fF
-C28 DFlipFlop_0/latch_diff_1/m1_657_280# nCLK 0.28fF
-C29 CLK DFlipFlop_3/latch_diff_0/D 0.11fF
-C30 CLK DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in 0.03fF
-C31 CLK DFlipFlop_3/latch_diff_1/m1_657_280# 0.27fF
-C32 DFlipFlop_3/latch_diff_0/nD nCLK 0.08fF
-C33 vdd DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in 0.03fF
-C34 DFlipFlop_0/Q nCLK 0.11fF
-C35 DFlipFlop_1/latch_diff_0/nD CLK 0.08fF
-C36 CLK_5 vdd 0.15fF
-C37 vdd Q1_shift 0.10fF
-C38 Q1 DFlipFlop_3/latch_diff_1/D 0.79fF
-C39 sky130_fd_sc_hs__xor2_1_0/a_194_125# vdd 0.03fF
-C40 DFlipFlop_2/clock_inverter_0/inverter_cp_x1_0/out CLK -0.31fF
-C41 CLK DFlipFlop_0/latch_diff_1/nD 0.02fF
-C42 vdd nCLK 0.34fF
-C43 sky130_fd_sc_hs__and2_1_1/a_56_136# DFlipFlop_1/D 0.04fF
-C44 nCLK nQ2 0.10fF
-C45 nCLK DFlipFlop_1/latch_diff_1/D 0.08fF
-C46 sky130_fd_sc_hs__or2_1_0/a_63_368# vdd 0.02fF
-C47 DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in Q1 0.20fF
-C48 DFlipFlop_2/latch_diff_1/nD Q1 0.21fF
-C49 nCLK DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in 0.14fF
-C50 DFlipFlop_2/latch_diff_0/nD CLK 0.08fF
-C51 DFlipFlop_3/latch_diff_0/m1_657_280# Q1 0.28fF
-C52 nQ0 sky130_fd_sc_hs__and2_1_1/a_56_136# 0.01fF
-C53 DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out DFlipFlop_1/D 0.03fF
-C54 nCLK DFlipFlop_1/latch_diff_1/nD 0.16fF
-C55 sky130_fd_sc_hs__and2_1_0/a_56_136# Q1 0.14fF
-C56 sky130_fd_sc_hs__and2_1_0/a_56_136# Q0 0.17fF
-C57 DFlipFlop_2/latch_diff_1/D nCLK 0.08fF
-C58 DFlipFlop_3/latch_diff_1/nD Q1 1.24fF
-C59 DFlipFlop_2/nQ Q1 0.31fF
-C60 CLK DFlipFlop_3/latch_diff_1/D 0.08fF
-C61 Q1 DFlipFlop_3/nQ 0.10fF
-C62 sky130_fd_sc_hs__xor2_1_0/a_455_87# nCLK 0.02fF
-C63 DFlipFlop_0/latch_diff_1/D Q1 0.06fF
-C64 DFlipFlop_0/latch_diff_0/m1_657_280# CLK 0.28fF
-C65 DFlipFlop_0/latch_diff_1/D Q0 0.23fF
-C66 sky130_fd_sc_hs__xor2_1_0/a_194_125# nCLK 0.11fF
-C67 sky130_fd_sc_hs__or2_1_0/a_63_368# CLK_5 0.06fF
-C68 sky130_fd_sc_hs__or2_1_0/a_63_368# Q1_shift -0.27fF
-C69 CLK DFlipFlop_2/latch_diff_1/nD 0.09fF
-C70 DFlipFlop_2/latch_diff_0/D Q1 0.42fF
-C71 nQ0 DFlipFlop_1/D 0.12fF
-C72 nQ0 DFlipFlop_1/latch_diff_0/D 0.09fF
-C73 Q1 DFlipFlop_1/D 0.03fF
-C74 nCLK DFlipFlop_0/latch_diff_1/nD 0.05fF
-C75 DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in vdd 0.03fF
-C76 Q1 DFlipFlop_1/latch_diff_0/D 0.18fF
-C77 sky130_fd_sc_hs__and2_1_1/a_56_136# CLK 0.06fF
-C78 Q0 DFlipFlop_1/D 0.07fF
-C79 DFlipFlop_1/latch_diff_1/m1_657_280# nCLK 0.28fF
-C80 nQ0 sky130_fd_sc_hs__and2_1_1/a_143_136# 0.04fF
-C81 Q0 DFlipFlop_1/latch_diff_0/D 0.42fF
-C82 sky130_fd_sc_hs__and2_1_1/a_56_136# vdd 0.04fF
-C83 sky130_fd_sc_hs__and2_1_0/a_56_136# DFlipFlop_0/D 0.04fF
-C84 sky130_fd_sc_hs__and2_1_1/a_56_136# nQ2 0.01fF
-C85 nQ0 Q1 0.06fF
-C86 CLK DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out 0.15fF
-C87 vdd sky130_fd_sc_hs__and2_1_0/a_56_136# 0.02fF
-C88 nQ0 Q0 0.33fF
-C89 CLK DFlipFlop_3/latch_diff_1/nD 0.16fF
-C90 DFlipFlop_2/nQ CLK 0.13fF
-C91 Q1 DFlipFlop_2/D 0.10fF
-C92 Q1 Q0 9.65fF
-C93 Q1 DFlipFlop_2/latch_diff_1/m1_657_280# 0.03fF
-C94 DFlipFlop_2/D Q0 0.25fF
-C95 CLK DFlipFlop_3/nQ 0.01fF
-C96 sky130_fd_sc_hs__or2_1_0/a_152_368# Q1_shift -0.04fF
-C97 vdd DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out 0.02fF
-C98 DFlipFlop_2/nQ vdd 0.02fF
-C99 DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out Q1 0.15fF
-C100 vdd DFlipFlop_3/nQ 0.02fF
-C101 DFlipFlop_0/latch_diff_1/D CLK 0.03fF
-C102 sky130_fd_sc_hs__xor2_1_0/a_355_368# Q0 0.03fF
-C103 DFlipFlop_3/latch_diff_0/nD Q1 0.08fF
-C104 nCLK DFlipFlop_3/latch_diff_1/D 0.14fF
-C105 DFlipFlop_0/Q Q1 0.13fF
-C106 CLK DFlipFlop_1/D 0.21fF
-C107 DFlipFlop_0/Q Q0 0.21fF
-C108 Q1 DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in 0.09fF
-C109 nQ0 DFlipFlop_1/latch_diff_0/m1_657_280# 0.25fF
-C110 sky130_fd_sc_hs__and2_1_0/a_143_136# Q1 0.02fF
-C111 Q0 DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in 0.33fF
-C112 CLK sky130_fd_sc_hs__and2_1_1/a_143_136# 0.03fF
-C113 sky130_fd_sc_hs__and2_1_0/a_143_136# Q0 0.03fF
-C114 vdd DFlipFlop_1/D 0.25fF
-C115 CLK DFlipFlop_2/latch_diff_0/m1_657_280# 0.28fF
-C116 nQ0 CLK 0.19fF
-C117 Q1 DFlipFlop_0/D 0.13fF
-C118 CLK Q1 -0.10fF
-C119 DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in nCLK -0.33fF
-C120 DFlipFlop_2/latch_diff_1/nD nCLK 0.16fF
-C121 CLK DFlipFlop_2/D 0.14fF
-C122 nQ2 sky130_fd_sc_hs__and2_1_1/a_143_136# 0.01fF
-C123 Q0 DFlipFlop_0/D 0.39fF
-C124 CLK Q0 0.08fF
-C125 DFlipFlop_3/latch_diff_0/m1_657_280# nCLK 0.27fF
-C126 nQ0 vdd 0.11fF
-C127 vdd Q1 9.49fF
-C128 vdd DFlipFlop_2/D 0.07fF
-C129 vdd Q0 5.33fF
-C130 nQ0 nQ2 0.03fF
-C131 nQ0 DFlipFlop_1/latch_diff_1/D 0.91fF
-C132 Q1 nQ2 0.07fF
-C133 Q1 DFlipFlop_1/latch_diff_1/D -0.10fF
-C134 nQ2 Q0 0.23fF
-C135 DFlipFlop_1/latch_diff_1/D Q0 0.06fF
-C136 vdd DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out 0.03fF
-C137 DFlipFlop_3/nQ Q1_shift 0.04fF
-C138 Q1 DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in 0.21fF
-C139 DFlipFlop_3/latch_diff_1/nD nCLK 0.09fF
-C140 DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in Q0 0.42fF
-C141 DFlipFlop_2/nQ nCLK 0.09fF
-C142 nQ0 DFlipFlop_1/latch_diff_1/nD 0.88fF
-C143 nCLK DFlipFlop_3/nQ 0.02fF
-C144 CLK DFlipFlop_0/Q 0.08fF
-C145 Q1 DFlipFlop_1/latch_diff_1/nD 0.10fF
-C146 Q1 DFlipFlop_0/latch_diff_0/D 0.15fF
-C147 DFlipFlop_0/latch_diff_1/m1_657_280# nQ2 0.05fF
-C148 vdd sky130_fd_sc_hs__xor2_1_0/a_355_368# 0.03fF
-C149 Q0 DFlipFlop_1/latch_diff_1/nD 0.21fF
-C150 DFlipFlop_0/latch_diff_0/D Q0 0.42fF
-C151 DFlipFlop_0/D DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in 0.02fF
-C152 CLK DFlipFlop_1/latch_diff_0/m1_657_280# 0.28fF
-C153 DFlipFlop_2/latch_diff_1/D Q1 0.23fF
-C154 vdd DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in 0.02fF
-C155 DFlipFlop_0/Q nQ2 0.09fF
-C156 DFlipFlop_3/latch_diff_0/D Q1 0.09fF
+C0 DFlipFlop_2/latch_diff_0/m1_657_280# CLK 0.28fF
+C1 sky130_fd_sc_hs__xor2_1_0/a_455_87# DFlipFlop_2/D 0.08fF
+C2 DFlipFlop_2/latch_diff_0/D nCLK 0.11fF
+C3 CLK DFlipFlop_2/latch_diff_1/D 0.14fF
+C4 DFlipFlop_3/latch_diff_1/D CLK 0.08fF
+C5 Q1 DFlipFlop_2/latch_diff_1/m1_657_280# 0.03fF
+C6 Q1 DFlipFlop_2/latch_diff_1/D 0.23fF
+C7 sky130_fd_sc_hs__xor2_1_0/a_455_87# nCLK 0.02fF
+C8 vdd nQ0 0.11fF
+C9 vdd DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in 0.03fF
+C10 Q1 DFlipFlop_3/latch_diff_1/D 0.79fF
+C11 sky130_fd_sc_hs__and2_1_0/a_56_136# vdd 0.02fF
+C12 DFlipFlop_2/latch_diff_1/nD nCLK 0.16fF
+C13 sky130_fd_sc_hs__and2_1_1/a_56_136# DFlipFlop_1/D 0.04fF
+C14 vdd DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out 0.03fF
+C15 DFlipFlop_1/latch_diff_0/nD nQ0 0.08fF
+C16 CLK DFlipFlop_2/nQ 0.13fF
+C17 DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in nCLK 0.14fF
+C18 sky130_fd_sc_hs__and2_1_1/a_56_136# nQ2 0.01fF
+C19 Q1 DFlipFlop_2/nQ 0.31fF
+C20 vdd DFlipFlop_1/D 0.25fF
+C21 sky130_fd_sc_hs__xor2_1_0/a_194_125# Q0 0.26fF
+C22 CLK DFlipFlop_3/latch_diff_1/m1_657_280# 0.27fF
+C23 DFlipFlop_0/latch_diff_1/nD nCLK 0.05fF
+C24 sky130_fd_sc_hs__or2_1_0/a_152_368# Q1_shift -0.04fF
+C25 Q1 DFlipFlop_3/latch_diff_1/m1_657_280# 0.28fF
+C26 vdd nQ2 0.04fF
+C27 Q0 nQ0 0.33fF
+C28 sky130_fd_sc_hs__and2_1_0/a_56_136# Q0 0.17fF
+C29 DFlipFlop_0/latch_diff_0/D Q0 0.42fF
+C30 Q1_shift vdd 0.10fF
+C31 vdd DFlipFlop_2/D 0.07fF
+C32 DFlipFlop_0/latch_diff_1/m1_657_280# nQ2 0.05fF
+C33 CLK nQ0 0.19fF
+C34 CLK DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in 0.03fF
+C35 DFlipFlop_0/latch_diff_1/D Q0 0.23fF
+C36 Q1 nQ0 0.06fF
+C37 sky130_fd_sc_hs__and2_1_1/a_143_136# nQ0 0.04fF
+C38 vdd nCLK 0.34fF
+C39 Q1 sky130_fd_sc_hs__and2_1_0/a_56_136# 0.14fF
+C40 DFlipFlop_0/latch_diff_0/D Q1 0.15fF
+C41 DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out DFlipFlop_1/D 0.03fF
+C42 DFlipFlop_0/latch_diff_1/D CLK 0.03fF
+C43 DFlipFlop_0/Q nQ2 0.09fF
+C44 Q0 DFlipFlop_1/D 0.07fF
+C45 Q1 DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out 0.15fF
+C46 CLK DFlipFlop_3/latch_diff_0/D 0.11fF
+C47 DFlipFlop_0/latch_diff_1/D Q1 0.06fF
+C48 nQ0 DFlipFlop_1/latch_diff_1/m1_657_280# 0.21fF
+C49 DFlipFlop_0/latch_diff_1/m1_657_280# nCLK 0.28fF
+C50 Q1_shift DFlipFlop_3/nQ 0.04fF
+C51 CLK DFlipFlop_1/latch_diff_0/m1_657_280# 0.28fF
+C52 CLK DFlipFlop_1/D 0.21fF
+C53 Q0 DFlipFlop_1/latch_diff_0/D 0.42fF
+C54 Q1 DFlipFlop_3/latch_diff_0/D 0.09fF
+C55 vdd sky130_fd_sc_hs__or2_1_0/a_63_368# 0.02fF
+C56 Q0 nQ2 0.23fF
+C57 nCLK DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in -0.33fF
+C58 Q1 DFlipFlop_1/D 0.03fF
+C59 nCLK DFlipFlop_3/nQ 0.02fF
+C60 CLK nQ2 0.17fF
+C61 DFlipFlop_0/Q nCLK 0.11fF
+C62 DFlipFlop_1/latch_diff_1/nD Q0 0.21fF
+C63 DFlipFlop_2/D Q0 0.25fF
+C64 Q1 DFlipFlop_1/latch_diff_0/D 0.18fF
+C65 DFlipFlop_0/D DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in 0.02fF
+C66 Q1 nQ2 0.07fF
+C67 sky130_fd_sc_hs__and2_1_1/a_143_136# nQ2 0.01fF
+C68 Q1 DFlipFlop_3/latch_diff_0/m1_657_280# 0.28fF
+C69 DFlipFlop_1/latch_diff_1/nD CLK 0.09fF
+C70 CLK DFlipFlop_2/D 0.14fF
+C71 DFlipFlop_1/latch_diff_1/D Q0 0.06fF
+C72 DFlipFlop_0/latch_diff_0/m1_657_280# CLK 0.28fF
+C73 nCLK Q0 0.20fF
+C74 vdd sky130_fd_sc_hs__xor2_1_0/a_355_368# 0.03fF
+C75 Q1 Q1_shift 0.36fF
+C76 DFlipFlop_1/latch_diff_1/nD Q1 0.10fF
+C77 Q1 DFlipFlop_2/D 0.10fF
+C78 DFlipFlop_1/latch_diff_1/D CLK 0.14fF
+C79 DFlipFlop_0/D vdd 0.19fF
+C80 DFlipFlop_1/latch_diff_1/D Q1 -0.10fF
+C81 Q1 nCLK -0.01fF
+C82 CLK DFlipFlop_3/latch_diff_1/nD 0.16fF
+C83 DFlipFlop_2/D DFlipFlop_1/latch_diff_1/m1_657_280# 0.04fF
+C84 CLK DFlipFlop_2/clock_inverter_0/inverter_cp_x1_0/out -0.31fF
+C85 Q1 DFlipFlop_3/latch_diff_1/nD 1.24fF
+C86 DFlipFlop_3/latch_diff_0/nD Q1 0.08fF
+C87 nCLK DFlipFlop_1/latch_diff_1/m1_657_280# 0.28fF
+C88 vdd sky130_fd_sc_hs__and2_1_1/a_56_136# 0.04fF
+C89 vdd DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in 0.02fF
+C90 Q1 sky130_fd_sc_hs__or2_1_0/a_63_368# 0.10fF
+C91 nCLK DFlipFlop_2/latch_diff_1/m1_657_280# 0.28fF
+C92 nCLK DFlipFlop_2/latch_diff_1/D 0.08fF
+C93 Q1 DFlipFlop_2/latch_diff_0/D 0.42fF
+C94 DFlipFlop_3/latch_diff_1/D nCLK 0.14fF
+C95 Q0 sky130_fd_sc_hs__xor2_1_0/a_355_368# 0.03fF
+C96 DFlipFlop_2/latch_diff_1/nD CLK 0.09fF
+C97 DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in Q0 0.42fF
+C98 DFlipFlop_0/D Q0 0.39fF
+C99 Q1 DFlipFlop_2/latch_diff_1/nD 0.21fF
+C100 DFlipFlop_1/latch_diff_0/m1_657_280# nQ0 0.25fF
+C101 DFlipFlop_2/nQ nCLK 0.09fF
+C102 DFlipFlop_0/latch_diff_1/nD Q0 0.21fF
+C103 DFlipFlop_1/D nQ0 0.12fF
+C104 Q1 DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in 0.21fF
+C105 DFlipFlop_0/D Q1 0.13fF
+C106 sky130_fd_sc_hs__or2_1_0/a_63_368# CLK_5 0.06fF
+C107 CLK DFlipFlop_0/latch_diff_1/nD 0.02fF
+C108 vdd DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in 0.03fF
+C109 DFlipFlop_2/D sky130_fd_sc_hs__xor2_1_0/a_194_125# 0.08fF
+C110 DFlipFlop_1/latch_diff_0/D nQ0 0.09fF
+C111 vdd DFlipFlop_3/nQ 0.02fF
+C112 nQ0 nQ2 0.03fF
+C113 Q1 DFlipFlop_0/latch_diff_1/nD 0.10fF
+C114 Q0 DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in 0.33fF
+C115 sky130_fd_sc_hs__xor2_1_0/a_194_125# nCLK 0.11fF
+C116 CLK sky130_fd_sc_hs__and2_1_1/a_56_136# 0.06fF
+C117 DFlipFlop_1/latch_diff_1/nD nQ0 0.88fF
+C118 DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out vdd 0.02fF
+C119 vdd Q0 5.33fF
+C120 Q1 DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in 0.09fF
+C121 DFlipFlop_1/latch_diff_1/D nQ0 0.91fF
+C122 nCLK nQ0 0.09fF
+C123 CLK vdd 0.41fF
+C124 Q1 vdd 9.49fF
+C125 nCLK DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out 0.05fF
+C126 CLK DFlipFlop_2/latch_diff_0/nD 0.08fF
+C127 DFlipFlop_1/latch_diff_0/nD CLK 0.08fF
+C128 DFlipFlop_0/Q Q0 0.21fF
+C129 nCLK DFlipFlop_1/D 0.14fF
+C130 CLK DFlipFlop_3/nQ 0.01fF
+C131 DFlipFlop_0/Q CLK 0.08fF
+C132 Q1 DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in 0.20fF
+C133 Q1 DFlipFlop_3/nQ 0.10fF
+C134 nCLK DFlipFlop_1/latch_diff_0/D 0.11fF
+C135 nCLK nQ2 0.10fF
+C136 DFlipFlop_0/Q Q1 0.13fF
+C137 DFlipFlop_3/latch_diff_0/m1_657_280# nCLK 0.27fF
+C138 DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out CLK 0.15fF
+C139 vdd CLK_5 0.15fF
+C140 sky130_fd_sc_hs__and2_1_0/a_143_136# Q0 0.03fF
+C141 CLK Q0 0.08fF
+C142 DFlipFlop_1/latch_diff_1/nD nCLK 0.16fF
+C143 DFlipFlop_2/D nCLK 0.41fF
+C144 DFlipFlop_0/D sky130_fd_sc_hs__and2_1_0/a_56_136# 0.04fF
+C145 Q1 Q0 9.65fF
+C146 DFlipFlop_2/nQ vdd 0.02fF
+C147 DFlipFlop_1/latch_diff_1/D nCLK 0.08fF
+C148 Q1 sky130_fd_sc_hs__and2_1_0/a_143_136# 0.02fF
+C149 Q1 CLK -0.10fF
+C150 CLK sky130_fd_sc_hs__and2_1_1/a_143_136# 0.03fF
+C151 Q0 DFlipFlop_1/latch_diff_1/m1_657_280# 0.01fF
+C152 Q1_shift sky130_fd_sc_hs__or2_1_0/a_63_368# -0.27fF
+C153 nCLK DFlipFlop_3/latch_diff_1/nD 0.09fF
+C154 DFlipFlop_3/latch_diff_0/nD nCLK 0.08fF
+C155 vdd sky130_fd_sc_hs__xor2_1_0/a_194_125# 0.03fF
+C156 sky130_fd_sc_hs__and2_1_1/a_56_136# nQ0 0.01fF
C157 CLK_5 vss -0.18fF
C158 sky130_fd_sc_hs__or2_1_0/a_63_368# vss 0.38fF
C159 sky130_fd_sc_hs__and2_1_1/a_56_136# vss 0.41fF
@@ -2216,29 +2216,29 @@
X3 a_n129_n125# a_n159_n151# a_n225_n125# w_n455_n335# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X4 a_n33_n125# a_n63_n151# a_n129_n125# w_n455_n335# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X5 a_255_n125# a_225_n151# a_159_n125# w_n455_n335# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
-C0 a_n129_n125# a_159_n125# 0.08fF
-C1 a_n129_n125# a_255_n125# 0.06fF
-C2 a_n225_n125# a_159_n125# 0.06fF
-C3 a_n317_n125# a_n129_n125# 0.13fF
-C4 a_225_n151# a_129_n151# 0.02fF
-C5 a_n317_n125# a_n225_n125# 0.36fF
-C6 a_63_n125# a_159_n125# 0.36fF
-C7 a_63_n125# a_255_n125# 0.13fF
-C8 a_n33_n125# a_159_n125# 0.13fF
-C9 a_n33_n125# a_255_n125# 0.08fF
-C10 a_63_n125# a_n317_n125# 0.06fF
-C11 a_n317_n125# a_n33_n125# 0.08fF
-C12 a_n129_n125# a_n225_n125# 0.36fF
-C13 a_129_n151# a_33_n151# 0.02fF
-C14 a_63_n125# a_n129_n125# 0.13fF
-C15 a_n63_n151# a_n159_n151# 0.02fF
-C16 a_255_n125# a_159_n125# 0.36fF
-C17 a_n129_n125# a_n33_n125# 0.36fF
+C0 a_n255_n151# a_n159_n151# 0.02fF
+C1 a_129_n151# a_225_n151# 0.02fF
+C2 a_63_n125# a_159_n125# 0.36fF
+C3 a_255_n125# a_159_n125# 0.36fF
+C4 a_255_n125# a_63_n125# 0.13fF
+C5 a_n129_n125# a_159_n125# 0.08fF
+C6 a_63_n125# a_n129_n125# 0.13fF
+C7 a_255_n125# a_n129_n125# 0.06fF
+C8 a_159_n125# a_n33_n125# 0.13fF
+C9 a_63_n125# a_n317_n125# 0.06fF
+C10 a_63_n125# a_n33_n125# 0.36fF
+C11 a_255_n125# a_n33_n125# 0.08fF
+C12 a_n159_n151# a_n63_n151# 0.02fF
+C13 a_n317_n125# a_n129_n125# 0.13fF
+C14 a_n129_n125# a_n33_n125# 0.36fF
+C15 a_n317_n125# a_n33_n125# 0.08fF
+C16 a_129_n151# a_33_n151# 0.02fF
+C17 a_159_n125# a_n225_n125# 0.06fF
C18 a_63_n125# a_n225_n125# 0.08fF
-C19 a_n33_n125# a_n225_n125# 0.13fF
-C20 a_n255_n151# a_n159_n151# 0.02fF
-C21 a_n63_n151# a_33_n151# 0.02fF
-C22 a_63_n125# a_n33_n125# 0.36fF
+C19 a_n129_n125# a_n225_n125# 0.36fF
+C20 a_n317_n125# a_n225_n125# 0.36fF
+C21 a_n225_n125# a_n33_n125# 0.13fF
+C22 a_n63_n151# a_33_n151# 0.02fF
C23 a_255_n125# w_n455_n335# 0.14fF
C24 a_159_n125# w_n455_n335# 0.08fF
C25 a_63_n125# w_n455_n335# 0.07fF
@@ -2263,36 +2263,36 @@
X3 a_159_n125# a_129_n154# a_63_n125# w_n455_n344# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X4 a_n225_n125# a_n255_n154# a_n317_n125# w_n455_n344# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X5 a_63_n125# a_33_n154# a_n33_n125# w_n455_n344# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
-C0 a_n129_n125# a_n317_n125# 0.13fF
-C1 a_63_n125# w_n455_n344# 0.04fF
-C2 a_n225_n125# a_n317_n125# 0.36fF
-C3 a_129_n154# a_33_n154# 0.02fF
-C4 a_n317_n125# a_63_n125# 0.06fF
-C5 a_159_n125# w_n455_n344# 0.06fF
-C6 a_n129_n125# a_255_n125# 0.06fF
-C7 a_n129_n125# a_n225_n125# 0.36fF
-C8 a_63_n125# a_255_n125# 0.13fF
-C9 a_n159_n154# a_n63_n154# 0.02fF
-C10 a_n33_n125# w_n455_n344# 0.05fF
-C11 a_n129_n125# a_63_n125# 0.13fF
-C12 a_n225_n125# a_63_n125# 0.08fF
-C13 a_n33_n125# a_n317_n125# 0.08fF
-C14 a_159_n125# a_255_n125# 0.36fF
-C15 a_n129_n125# a_159_n125# 0.08fF
-C16 a_n225_n125# a_159_n125# 0.06fF
-C17 a_159_n125# a_63_n125# 0.36fF
-C18 a_n33_n125# a_255_n125# 0.08fF
-C19 a_129_n154# a_225_n154# 0.02fF
-C20 a_n317_n125# w_n455_n344# 0.11fF
-C21 a_n129_n125# a_n33_n125# 0.36fF
-C22 a_n225_n125# a_n33_n125# 0.13fF
-C23 a_n33_n125# a_63_n125# 0.36fF
-C24 a_33_n154# a_n63_n154# 0.02fF
-C25 w_n455_n344# a_255_n125# 0.11fF
-C26 a_n129_n125# w_n455_n344# 0.04fF
-C27 a_n33_n125# a_159_n125# 0.13fF
-C28 a_n159_n154# a_n255_n154# 0.02fF
-C29 a_n225_n125# w_n455_n344# 0.06fF
+C0 a_159_n125# a_63_n125# 0.36fF
+C1 a_n317_n125# a_n33_n125# 0.08fF
+C2 a_159_n125# a_n129_n125# 0.08fF
+C3 a_63_n125# a_n225_n125# 0.08fF
+C4 a_n225_n125# a_n129_n125# 0.36fF
+C5 a_255_n125# a_n33_n125# 0.08fF
+C6 a_n159_n154# a_n63_n154# 0.02fF
+C7 a_33_n154# a_n63_n154# 0.02fF
+C8 a_33_n154# a_129_n154# 0.02fF
+C9 a_n317_n125# w_n455_n344# 0.11fF
+C10 a_255_n125# w_n455_n344# 0.11fF
+C11 a_129_n154# a_225_n154# 0.02fF
+C12 a_n317_n125# a_n225_n125# 0.36fF
+C13 a_159_n125# a_255_n125# 0.36fF
+C14 a_n33_n125# w_n455_n344# 0.05fF
+C15 a_n159_n154# a_n255_n154# 0.02fF
+C16 a_159_n125# a_n33_n125# 0.13fF
+C17 a_n225_n125# a_n33_n125# 0.13fF
+C18 a_159_n125# w_n455_n344# 0.06fF
+C19 a_n225_n125# w_n455_n344# 0.06fF
+C20 a_63_n125# a_n129_n125# 0.13fF
+C21 a_159_n125# a_n225_n125# 0.06fF
+C22 a_63_n125# a_n317_n125# 0.06fF
+C23 a_n317_n125# a_n129_n125# 0.13fF
+C24 a_255_n125# a_63_n125# 0.13fF
+C25 a_255_n125# a_n129_n125# 0.06fF
+C26 a_63_n125# a_n33_n125# 0.36fF
+C27 a_n33_n125# a_n129_n125# 0.36fF
+C28 a_63_n125# w_n455_n344# 0.04fF
+C29 a_n129_n125# w_n455_n344# 0.04fF
C30 a_255_n125# VSUBS 0.03fF
C31 a_159_n125# VSUBS 0.03fF
C32 a_63_n125# VSUBS 0.03fF
@@ -2314,9 +2314,9 @@
+ sky130_fd_pr__nfet_01v8_AZESM8
Xsky130_fd_pr__pfet_01v8_XJXT7S_0 vss vdd in in vdd in out out in in out vdd out vdd
+ in sky130_fd_pr__pfet_01v8_XJXT7S
-C0 out in 0.85fF
-C1 out vdd 0.29fF
-C2 in vdd 0.04fF
+C0 out vdd 0.29fF
+C1 out in 0.85fF
+C2 vdd in 0.04fF
C3 vdd vss 5.90fF
C4 out vss 1.30fF
C5 in vss 1.82fF
@@ -2330,19 +2330,19 @@
Xinverter_cp_x1_0 inverter_cp_x1_0/out QB vss vdd inverter_cp_x1
Xinverter_cp_x1_2 Up inverter_cp_x1_2/in vss vdd inverter_cp_x1
Xinverter_cp_x1_1 inverter_cp_x1_2/in QA vss vdd inverter_cp_x1
-C0 nDown Down 0.23fF
-C1 Up inverter_cp_x1_2/in 0.12fF
-C2 Up nUp 0.20fF
-C3 QA vdd 0.02fF
-C4 vdd QB 0.02fF
-C5 Down vdd 0.09fF
-C6 Up vdd 0.60fF
-C7 nDown inverter_cp_x1_0/out 0.11fF
-C8 inverter_cp_x1_0/out vdd 0.25fF
-C9 inverter_cp_x1_2/in vdd 0.42fF
-C10 vdd nUp 0.14fF
-C11 nDown vdd 0.80fF
-C12 Down inverter_cp_x1_0/out 0.12fF
+C0 vdd nDown 0.80fF
+C1 inverter_cp_x1_2/in vdd 0.42fF
+C2 QA vdd 0.02fF
+C3 inverter_cp_x1_0/out Down 0.12fF
+C4 nDown Down 0.23fF
+C5 vdd Down 0.09fF
+C6 QB vdd 0.02fF
+C7 nUp Up 0.20fF
+C8 inverter_cp_x1_0/out nDown 0.11fF
+C9 inverter_cp_x1_0/out vdd 0.25fF
+C10 nUp vdd 0.14fF
+C11 vdd Up 0.60fF
+C12 inverter_cp_x1_2/in Up 0.12fF
C13 inverter_cp_x1_2/in vss 2.01fF
C14 QA vss 1.09fF
C15 inverter_cp_x1_0/out vss 2.00fF
@@ -2360,22 +2360,22 @@
X1 a_n129_n90# a_n159_n207# a_n221_n90# w_n359_n309# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=900000u l=150000u
X2 a_63_n90# a_n159_n207# a_n33_n90# w_n359_n309# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=900000u l=150000u
X3 a_n33_n90# a_n63_n116# a_n129_n90# w_n359_n309# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=900000u l=150000u
-C0 a_n129_n90# a_159_n90# 0.06fF
-C1 a_n129_n90# a_n33_n90# 0.26fF
-C2 a_n129_n90# a_n221_n90# 0.26fF
-C3 a_63_n90# a_159_n90# 0.26fF
-C4 a_63_n90# a_n33_n90# 0.26fF
-C5 a_n129_n90# w_n359_n309# 0.06fF
-C6 a_63_n90# a_n221_n90# 0.06fF
-C7 a_63_n90# w_n359_n309# 0.06fF
-C8 a_159_n90# a_n33_n90# 0.09fF
-C9 a_159_n90# a_n221_n90# 0.04fF
-C10 a_n221_n90# a_n33_n90# 0.09fF
-C11 a_159_n90# w_n359_n309# 0.09fF
-C12 a_n33_n90# w_n359_n309# 0.05fF
-C13 a_n221_n90# w_n359_n309# 0.09fF
-C14 a_n63_n116# a_n159_n207# 0.12fF
-C15 a_63_n90# a_n129_n90# 0.09fF
+C0 a_n33_n90# a_n221_n90# 0.09fF
+C1 a_159_n90# a_n129_n90# 0.06fF
+C2 w_n359_n309# a_n129_n90# 0.06fF
+C3 a_n129_n90# a_n221_n90# 0.26fF
+C4 a_159_n90# a_63_n90# 0.26fF
+C5 w_n359_n309# a_63_n90# 0.06fF
+C6 a_n33_n90# a_n129_n90# 0.26fF
+C7 a_n221_n90# a_63_n90# 0.06fF
+C8 a_n33_n90# a_63_n90# 0.26fF
+C9 a_n63_n116# a_n159_n207# 0.12fF
+C10 w_n359_n309# a_159_n90# 0.09fF
+C11 a_159_n90# a_n221_n90# 0.04fF
+C12 w_n359_n309# a_n221_n90# 0.09fF
+C13 a_n33_n90# a_159_n90# 0.09fF
+C14 a_n129_n90# a_63_n90# 0.09fF
+C15 w_n359_n309# a_n33_n90# 0.05fF
C16 a_159_n90# VSUBS 0.03fF
C17 a_63_n90# VSUBS 0.03fF
C18 a_n33_n90# VSUBS 0.03fF
@@ -2390,9 +2390,9 @@
+ a_n125_n45# a_63_n45#
X0 a_63_n45# a_33_n71# a_n33_n45# w_n263_n255# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=450000u l=150000u
X1 a_n33_n45# a_n129_71# a_n125_n45# w_n263_n255# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=450000u l=150000u
-C0 a_n33_n45# a_n125_n45# 0.13fF
-C1 a_n129_71# a_33_n71# 0.04fF
-C2 a_n33_n45# a_63_n45# 0.13fF
+C0 a_n129_71# a_33_n71# 0.04fF
+C1 a_n33_n45# a_n125_n45# 0.13fF
+C2 a_63_n45# a_n33_n45# 0.13fF
C3 a_63_n45# a_n125_n45# 0.05fF
C4 a_63_n45# w_n263_n255# 0.04fF
C5 a_n33_n45# w_n263_n255# 0.04fF
@@ -2406,14 +2406,14 @@
Xsky130_fd_pr__pfet_01v8_4F35BC_0 vss sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90#
+ vdd B A sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# out vdd vdd sky130_fd_pr__pfet_01v8_4F35BC
Xsky130_fd_pr__nfet_01v8_C3YG4M_0 out B A vss vss vss sky130_fd_pr__nfet_01v8_C3YG4M
-C0 vdd out 0.11fF
-C1 out A 0.06fF
-C2 B A 0.24fF
-C3 sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# out 0.08fF
-C4 vdd A 0.09fF
-C5 vdd sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# 0.02fF
+C0 B A 0.24fF
+C1 out B 0.40fF
+C2 out sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# 0.08fF
+C3 vdd A 0.09fF
+C4 out vdd 0.11fF
+C5 sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vdd 0.02fF
C6 vdd sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# 0.02fF
-C7 B out 0.40fF
+C7 out A 0.06fF
C8 sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vss 0.03fF
C9 out vss 0.45fF
C10 sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vss 0.03fF
@@ -2431,26 +2431,26 @@
+ vss vdd nor_pfd_2/A nor_pfd_2/B nor_pfd
Xnor_pfd_3 nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# nor_pfd_2/B nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90#
+ vss vdd nor_pfd_3/A Reset nor_pfd
-C0 vdd nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# 0.06fF
-C1 vdd nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# 0.06fF
-C2 Reset nor_pfd_2/B 0.43fF
-C3 Q Reset 0.14fF
-C4 nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vdd 0.06fF
-C5 nor_pfd_3/A nor_pfd_2/B 0.58fF
-C6 Q nor_pfd_3/A 0.98fF
-C7 vdd nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# 0.06fF
-C8 nor_pfd_3/A nor_pfd_2/A 0.38fF
-C9 nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vdd 0.06fF
-C10 Q nor_pfd_2/B 2.22fF
-C11 nor_pfd_2/A nor_pfd_2/B 0.05fF
-C12 Q nor_pfd_2/A 1.38fF
-C13 Q CLK 0.04fF
-C14 nor_pfd_3/A vdd 0.09fF
+C0 vdd nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# 0.06fF
+C1 Q nor_pfd_2/A 1.38fF
+C2 nor_pfd_3/A Q 0.98fF
+C3 nor_pfd_2/B Q 2.22fF
+C4 nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vdd 0.06fF
+C5 nor_pfd_3/A nor_pfd_2/A 0.38fF
+C6 Q Reset 0.14fF
+C7 nor_pfd_2/B nor_pfd_2/A 0.05fF
+C8 CLK Q 0.04fF
+C9 nor_pfd_2/B nor_pfd_3/A 0.58fF
+C10 nor_pfd_3/A Reset 0.12fF
+C11 nor_pfd_2/B Reset 0.43fF
+C12 Q vdd 0.08fF
+C13 nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vdd 0.06fF
+C14 nor_pfd_2/A vdd -0.01fF
C15 nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vdd 0.06fF
-C16 vdd nor_pfd_2/B 0.02fF
-C17 Q vdd 0.08fF
-C18 nor_pfd_3/A Reset 0.12fF
-C19 vdd nor_pfd_2/A -0.01fF
+C16 nor_pfd_3/A vdd 0.09fF
+C17 nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vdd 0.06fF
+C18 nor_pfd_2/B vdd 0.02fF
+C19 nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vdd 0.06fF
C20 nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vss 0.03fF
C21 nor_pfd_2/B vss 1.42fF
C22 nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vss 0.03fF
@@ -2474,17 +2474,17 @@
X1 a_n33_n45# a_n63_n71# a_n129_n45# w_n359_n255# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=450000u l=150000u
X2 a_159_n45# a_n63_n71# a_63_n45# w_n359_n255# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=450000u l=150000u
X3 a_n129_n45# a_n159_n173# a_n221_n45# w_n359_n255# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=450000u l=150000u
-C0 a_n221_n45# a_n33_n45# 0.05fF
-C1 a_n221_n45# a_159_n45# 0.02fF
+C0 a_159_n45# a_n129_n45# 0.03fF
+C1 a_159_n45# a_n221_n45# 0.02fF
C2 a_159_n45# a_n33_n45# 0.05fF
-C3 a_n221_n45# a_63_n45# 0.03fF
-C4 a_n221_n45# a_n129_n45# 0.13fF
-C5 a_n33_n45# a_63_n45# 0.13fF
-C6 a_n33_n45# a_n129_n45# 0.13fF
+C3 a_63_n45# a_n129_n45# 0.05fF
+C4 a_63_n45# a_n221_n45# 0.03fF
+C5 a_63_n45# a_n33_n45# 0.13fF
+C6 a_n129_n45# a_n221_n45# 0.13fF
C7 a_159_n45# a_63_n45# 0.13fF
-C8 a_n159_n173# a_n63_n71# 0.10fF
-C9 a_159_n45# a_n129_n45# 0.03fF
-C10 a_63_n45# a_n129_n45# 0.05fF
+C8 a_n129_n45# a_n33_n45# 0.13fF
+C9 a_n33_n45# a_n221_n45# 0.05fF
+C10 a_n63_n71# a_n159_n173# 0.10fF
C11 a_159_n45# w_n359_n255# 0.04fF
C12 a_63_n45# w_n359_n255# 0.05fF
C13 a_n33_n45# w_n359_n255# 0.05fF
@@ -2498,10 +2498,10 @@
+ a_n33_n90# w_n263_n309#
X0 a_63_n90# a_33_n187# a_n33_n90# w_n263_n309# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=900000u l=150000u
X1 a_n33_n90# a_n99_n187# a_n125_n90# w_n263_n309# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=900000u l=150000u
-C0 a_n33_n90# a_n125_n90# 0.26fF
-C1 a_63_n90# a_n125_n90# 0.09fF
-C2 a_33_n187# a_n99_n187# 0.04fF
-C3 a_n33_n90# a_63_n90# 0.26fF
+C0 a_n33_n90# a_63_n90# 0.26fF
+C1 a_n125_n90# a_63_n90# 0.09fF
+C2 a_n125_n90# a_n33_n90# 0.26fF
+C3 a_33_n187# a_n99_n187# 0.04fF
C4 a_63_n90# VSUBS 0.03fF
C5 a_n33_n90# VSUBS 0.03fF
C6 a_n125_n90# VSUBS 0.03fF
@@ -2520,9 +2520,9 @@
.subckt sky130_fd_pr__pfet_01v8_4F7GBC VSUBS a_n51_n187# a_n73_n90# a_15_n90# w_n211_n309#
X0 a_15_n90# a_n51_n187# a_n73_n90# w_n211_n309# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=900000u l=150000u
-C0 a_n73_n90# w_n211_n309# 0.04fF
-C1 a_n73_n90# a_15_n90# 0.31fF
-C2 w_n211_n309# a_15_n90# 0.09fF
+C0 a_15_n90# w_n211_n309# 0.09fF
+C1 a_15_n90# a_n73_n90# 0.31fF
+C2 w_n211_n309# a_n73_n90# 0.04fF
C3 a_15_n90# VSUBS 0.03fF
C4 a_n73_n90# VSUBS 0.03fF
C5 a_n51_n187# VSUBS 0.12fF
@@ -2535,15 +2535,15 @@
Xsky130_fd_pr__pfet_01v8_7T83YG_0 vss vdd vdd B A a_656_410# vdd sky130_fd_pr__pfet_01v8_7T83YG
Xsky130_fd_pr__nfet_01v8_ZXAV3F_0 vss a_656_410# out vss sky130_fd_pr__nfet_01v8_ZXAV3F
Xsky130_fd_pr__pfet_01v8_4F7GBC_0 vss a_656_410# vdd out vdd sky130_fd_pr__pfet_01v8_4F7GBC
-C0 sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_63_n45# a_656_410# 0.07fF
-C1 out a_656_410# 0.20fF
-C2 B a_656_410# 0.30fF
-C3 out vdd 0.10fF
-C4 B sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_n129_n45# 0.02fF
-C5 B A 0.33fF
-C6 a_656_410# vdd 0.20fF
-C7 A a_656_410# 0.04fF
-C8 A vdd 0.05fF
+C0 out a_656_410# 0.20fF
+C1 B a_656_410# 0.30fF
+C2 a_656_410# A 0.04fF
+C3 sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_n129_n45# B 0.02fF
+C4 out vdd 0.10fF
+C5 sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_63_n45# a_656_410# 0.07fF
+C6 vdd A 0.05fF
+C7 vdd a_656_410# 0.20fF
+C8 B A 0.33fF
C9 out sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_63_n45# 0.03fF
C10 vdd vss 4.85fF
C11 out vss 0.47fF
@@ -2560,16 +2560,16 @@
Xdff_pfd_1 vdd vss dff_pfd_1/nor_pfd_2/A Down B dff_pfd_1/nor_pfd_3/A dff_pfd_1/nor_pfd_2/B
+ Reset dff_pfd
Xand_pfd_0 and_pfd_0/a_656_410# vss Reset vdd Up Down and_pfd
-C0 vdd dff_pfd_1/nor_pfd_2/A 0.13fF
-C1 dff_pfd_0/nor_pfd_2/A vdd 0.13fF
-C2 vdd dff_pfd_1/nor_pfd_2/B 0.04fF
-C3 Reset vdd 0.02fF
-C4 vdd dff_pfd_0/nor_pfd_2/B 0.11fF
-C5 Up vdd 1.62fF
-C6 Up Down 0.06fF
-C7 dff_pfd_0/nor_pfd_3/A vdd 0.08fF
-C8 dff_pfd_1/nor_pfd_3/A vdd 0.08fF
-C9 Down vdd 0.08fF
+C0 vdd dff_pfd_1/nor_pfd_2/B 0.04fF
+C1 vdd dff_pfd_0/nor_pfd_2/A 0.13fF
+C2 dff_pfd_1/nor_pfd_2/A vdd 0.13fF
+C3 vdd dff_pfd_0/nor_pfd_3/A 0.08fF
+C4 vdd Down 0.08fF
+C5 dff_pfd_1/nor_pfd_3/A vdd 0.08fF
+C6 Up vdd 1.62fF
+C7 vdd dff_pfd_0/nor_pfd_2/B 0.11fF
+C8 Up Down 0.06fF
+C9 Reset vdd 0.02fF
C10 and_pfd_0/a_656_410# vss 0.99fF
C11 and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_63_n45# vss 0.05fF
C12 and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_n129_n45# vss 0.05fF
@@ -2603,17 +2603,19 @@
C40 A vss 1.07fF
.ends
-.subckt top_pll_v1 vco_vctrl ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd vdd charge_pump_0/w_2544_775#
-+ pswitch biasp ring_osc_0/csvco_branch_2/vbp in_ref Down w_13905_n238# vss vco_D0
-+ QA ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd iref_cp out_to_div nDown out_to_pad
-+ ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd Up nUp
+.subckt top_pll_v1 vco_vctrl vdd pswitch ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd
++ charge_pump_0/w_2544_775# ring_osc_0/csvco_branch_2/vbp biasp in_ref Down vss w_13905_n238#
++ vco_D0 buffer_salida_0/a_3996_n100# ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd
++ QA charge_pump_0/w_1008_774# iref_cp ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd
++ out_to_div nDown out_to_pad Up nUp
Xloop_filter_0 lf_vc vco_vctrl vss loop_filter
Xcharge_pump_0 vss pswitch nswitch vco_vctrl vdd biasp nUp Down charge_pump_0/w_2544_775#
-+ iref_cp nDown Up charge_pump
++ iref_cp nDown Up charge_pump_0/w_1008_774# charge_pump
Xdiv_by_2_0 vss vdd div_by_2_0/clock_inverter_0/inverter_cp_x1_2/in out_by_2 n_out_by_2
+ out_buffer_div_2 out_to_div out_div_2 n_out_buffer_div_2 div_by_2_0/clock_inverter_0/inverter_cp_x1_0/out
+ n_out_div_2 div_by_2
-Xbuffer_salida_0 buffer_salida_0/a_678_n100# out_to_pad out_to_buffer vss vdd buffer_salida
+Xbuffer_salida_0 buffer_salida_0/a_678_n100# out_to_pad out_to_buffer buffer_salida_0/a_3996_n100#
++ vss vdd buffer_salida
Xring_osc_0 ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd vco_vctrl ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd
+ ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd vdd vss ring_osc_0/csvco_branch_2/vbp
+ ring_osc_0/csvco_branch_0/inverter_csvco_0/vss vco_D0 ring_osc_0/csvco_branch_2/cap_vco_0/t
@@ -2640,113 +2642,113 @@
+ Down QA QB nDown Up nUp pfd_cp_interface
XPFD_0 vss vdd QB QA in_ref out_div_by_5 pfd_reset PFD
C0 vdd QA -0.04fF
-C1 div_5_nQ2 n_out_by_2 0.10fF
-C2 div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in n_out_by_2 0.27fF
-C3 out_by_2 vdd 0.97fF
-C4 vdd div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out 0.04fF
-C5 ring_osc_0/csvco_branch_0/inverter_csvco_0/vss vco_vctrl 0.04fF
-C6 vdd out_to_div 0.21fF
-C7 Up vdd 0.28fF
-C8 vdd n_out_by_2 1.03fF
-C9 nDown pswitch 0.53fF
-C10 n_out_by_2 div_by_5_0/DFlipFlop_1/latch_diff_0/D 0.12fF
-C11 div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in n_out_by_2 -0.51fF
-C12 div_5_Q0 vco_vctrl 0.48fF
-C13 out_by_2 div_by_5_0/DFlipFlop_0/D 0.35fF
-C14 out_by_2 div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_143_136# -0.02fF
-C15 out_to_buffer buffer_salida_0/a_678_n100# 0.22fF
-C16 Up pswitch 1.98fF
-C17 nDown nswitch 0.76fF
-C18 out_by_2 div_by_5_0/DFlipFlop_3/latch_diff_1/nD 0.23fF
-C19 div_by_5_0/DFlipFlop_0/D n_out_by_2 -1.48fF
-C20 pfd_cp_interface_0/inverter_cp_x1_2/in vdd 0.01fF
-C21 biasp nDown 0.26fF
-C22 out_by_2 div_by_5_0/DFlipFlop_0/Q 0.09fF
-C23 out_to_buffer out_to_div 0.13fF
-C24 out_by_2 div_by_5_0/DFlipFlop_3/latch_diff_1/D 0.09fF
-C25 nUp vdd 0.05fF
-C26 div_by_5_0/DFlipFlop_3/latch_diff_0/nD n_out_by_2 0.11fF
-C27 out_by_2 div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_0/out 0.09fF
-C28 out_by_2 div_by_5_0/DFlipFlop_1/latch_diff_0/nD 0.10fF
-C29 out_by_2 div_5_nQ0 0.32fF
-C30 div_by_5_0/DFlipFlop_3/latch_diff_1/nD n_out_by_2 0.10fF
-C31 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_143_136# n_out_by_2 0.02fF
-C32 div_by_5_0/DFlipFlop_0/Q n_out_by_2 -0.23fF
-C33 div_by_5_0/DFlipFlop_3/latch_diff_1/D n_out_by_2 0.24fF
-C34 n_out_by_2 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# 0.12fF
-C35 vdd ring_osc_0/csvco_branch_2/vbp 0.03fF
-C36 Up biasp 0.26fF
-C37 out_by_2 div_5_Q1 0.42fF
-C38 Down nswitch 0.54fF
-C39 out_by_2 div_by_5_0/DFlipFlop_0/latch_diff_0/nD 0.17fF
-C40 div_5_nQ0 n_out_by_2 0.10fF
-C41 nUp pswitch 0.85fF
-C42 biasp Down 1.24fF
-C43 iref_cp Down 0.09fF
-C44 div_5_Q1 n_out_by_2 1.04fF
-C45 out_by_2 div_by_5_0/DFlipFlop_0/latch_diff_1/nD 0.17fF
-C46 vdd lf_vc 0.02fF
-C47 out_by_2 div_by_5_0/DFlipFlop_2/latch_diff_0/nD 0.10fF
-C48 div_by_5_0/DFlipFlop_2/latch_diff_0/D n_out_by_2 0.12fF
-C49 div_5_Q1_shift out_div_by_5 0.05fF
-C50 out_by_2 div_by_5_0/DFlipFlop_1/latch_diff_1/D 0.23fF
-C51 out_by_2 div_by_5_0/DFlipFlop_1/latch_diff_1/nD 0.09fF
-C52 n_out_by_2 div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in -0.20fF
-C53 div_by_5_0/DFlipFlop_0/latch_diff_1/nD n_out_by_2 0.33fF
-C54 out_by_2 vco_vctrl 0.53fF
-C55 out_by_2 div_by_5_0/DFlipFlop_2/nQ 0.23fF
-C56 nUp biasp -0.17fF
-C57 out_to_buffer vdd 0.07fF
-C58 out_by_2 div_5_Q0 0.09fF
-C59 out_div_by_5 vdd 0.28fF
-C60 vdd div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# 0.03fF
-C61 n_out_by_2 div_by_5_0/DFlipFlop_1/latch_diff_1/D 0.10fF
-C62 n_out_by_2 div_by_5_0/DFlipFlop_1/latch_diff_1/nD 0.24fF
-C63 n_out_by_2 vco_vctrl 0.52fF
-C64 div_by_5_0/DFlipFlop_2/nQ n_out_by_2 0.10fF
-C65 iref_cp vdd 0.15fF
-C66 div_5_Q0 n_out_by_2 -0.12fF
-C67 div_by_5_0/DFlipFlop_2/D out_by_2 0.22fF
-C68 vdd ring_osc_0/csvco_branch_2/cap_vco_0/t 0.02fF
-C69 div_by_2_0/clock_inverter_0/inverter_cp_x1_2/in out_to_div -0.16fF
-C70 div_by_5_0/DFlipFlop_2/D n_out_by_2 0.19fF
-C71 div_by_5_0/DFlipFlop_0/latch_diff_1/D out_by_2 0.33fF
-C72 div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_355_368# n_out_by_2 0.03fF
-C73 nUp vco_vctrl 0.02fF
-C74 out_div_by_5 div_by_5_0/sky130_fd_sc_hs__or2_1_0/a_63_368# 0.18fF
-C75 div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_194_125# n_out_by_2 -0.05fF
-C76 div_by_5_0/DFlipFlop_0/latch_diff_1/D n_out_by_2 0.17fF
-C77 vco_vctrl ring_osc_0/csvco_branch_2/vbp 0.26fF
-C78 vdd vco_vctrl -1.02fF
-C79 out_by_2 div_by_5_0/DFlipFlop_1/D 0.38fF
-C80 out_by_2 div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_56_136# 0.10fF
-C81 out_by_2 div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in -0.22fF
-C82 div_by_5_0/DFlipFlop_0/latch_diff_0/D n_out_by_2 0.24fF
-C83 out_by_2 div_by_5_0/DFlipFlop_2/latch_diff_1/nD 0.09fF
-C84 div_5_Q1 out_div_by_5 0.01fF
-C85 out_by_2 div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out -0.04fF
-C86 div_by_5_0/DFlipFlop_1/D n_out_by_2 0.22fF
-C87 n_out_by_2 div_by_5_0/DFlipFlop_2/latch_diff_1/nD 0.24fF
-C88 Down nDown 2.55fF
-C89 div_by_5_0/DFlipFlop_0/D vco_vctrl -0.45fF
-C90 out_by_2 div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out 0.28fF
-C91 n_out_by_2 div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out -0.11fF
-C92 vdd vco_D0 0.03fF
-C93 div_by_2_0/clock_inverter_0/inverter_cp_x1_0/out out_to_div -0.12fF
-C94 out_first_buffer ring_osc_0/csvco_branch_2/cap_vco_0/t 0.03fF
-C95 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_143_136# vco_vctrl -0.11fF
-C96 nswitch vco_vctrl -0.06fF
-C97 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# vco_vctrl -0.36fF
-C98 nUp nDown -0.09fF
-C99 out_by_2 div_by_5_0/DFlipFlop_2/latch_diff_1/D 0.23fF
-C100 out_by_2 div_5_nQ2 0.16fF
-C101 div_5_Q1 vco_vctrl 0.14fF
-C102 div_by_5_0/DFlipFlop_2/latch_diff_1/D n_out_by_2 0.10fF
-C103 out_by_2 div_by_5_0/DFlipFlop_3/latch_diff_0/D 0.11fF
-C104 vdd buffer_salida_0/a_678_n100# 0.24fF
-C105 nDown vdd 0.22fF
-C106 Up nUp 2.72fF
-C107 div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_158_392# n_out_by_2 0.01fF
+C1 out_by_2 div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out 0.28fF
+C2 n_out_by_2 div_by_5_0/DFlipFlop_1/latch_diff_0/D 0.12fF
+C3 vco_vctrl ring_osc_0/csvco_branch_0/inverter_csvco_0/vss 0.04fF
+C4 out_by_2 div_5_Q0 0.09fF
+C5 vdd nUp 0.05fF
+C6 out_by_2 div_by_5_0/DFlipFlop_2/latch_diff_1/nD 0.09fF
+C7 div_by_5_0/DFlipFlop_2/latch_diff_1/D out_by_2 0.23fF
+C8 vdd out_to_div 0.21fF
+C9 div_by_5_0/DFlipFlop_1/latch_diff_0/nD out_by_2 0.10fF
+C10 div_by_5_0/DFlipFlop_0/D out_by_2 0.35fF
+C11 Up nUp 2.72fF
+C12 div_5_nQ0 n_out_by_2 0.10fF
+C13 out_by_2 div_by_5_0/DFlipFlop_0/Q 0.09fF
+C14 div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_56_136# out_by_2 0.10fF
+C15 n_out_by_2 div_by_5_0/DFlipFlop_1/D 0.22fF
+C16 nDown biasp 0.26fF
+C17 vdd out_to_buffer 0.07fF
+C18 out_by_2 div_by_5_0/DFlipFlop_1/latch_diff_1/nD 0.09fF
+C19 out_by_2 div_by_5_0/DFlipFlop_2/latch_diff_0/nD 0.10fF
+C20 out_to_div div_by_2_0/clock_inverter_0/inverter_cp_x1_0/out -0.12fF
+C21 n_out_by_2 div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in -0.51fF
+C22 n_out_by_2 div_by_5_0/DFlipFlop_1/latch_diff_1/D 0.10fF
+C23 Up pswitch 1.98fF
+C24 n_out_by_2 div_by_5_0/DFlipFlop_0/latch_diff_1/nD 0.33fF
+C25 out_by_2 div_by_5_0/DFlipFlop_3/latch_diff_1/nD 0.23fF
+C26 div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out out_by_2 -0.04fF
+C27 vdd div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out 0.04fF
+C28 n_out_by_2 div_5_Q0 -0.12fF
+C29 vco_vctrl div_5_Q0 0.48fF
+C30 vco_vctrl nUp 0.02fF
+C31 div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_0/out out_by_2 0.09fF
+C32 nswitch Down 0.54fF
+C33 div_by_5_0/DFlipFlop_2/latch_diff_1/nD n_out_by_2 0.24fF
+C34 out_div_by_5 div_by_5_0/sky130_fd_sc_hs__or2_1_0/a_63_368# 0.18fF
+C35 div_by_5_0/DFlipFlop_2/latch_diff_1/D n_out_by_2 0.10fF
+C36 vdd out_by_2 0.97fF
+C37 n_out_by_2 div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in -0.20fF
+C38 div_by_5_0/DFlipFlop_0/D n_out_by_2 -1.48fF
+C39 biasp nUp -0.17fF
+C40 div_by_5_0/DFlipFlop_0/D vco_vctrl -0.45fF
+C41 div_by_5_0/DFlipFlop_0/Q n_out_by_2 -0.23fF
+C42 n_out_by_2 div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_158_392# 0.01fF
+C43 out_by_2 div_5_Q1 0.42fF
+C44 vdd Up 0.28fF
+C45 out_by_2 div_by_5_0/DFlipFlop_3/latch_diff_1/D 0.09fF
+C46 nDown nUp -0.09fF
+C47 vdd pfd_cp_interface_0/inverter_cp_x1_2/in 0.01fF
+C48 vdd ring_osc_0/csvco_branch_2/cap_vco_0/t 0.02fF
+C49 n_out_by_2 div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_355_368# 0.03fF
+C50 buffer_salida_0/a_678_n100# out_to_buffer 0.22fF
+C51 out_by_2 div_by_5_0/DFlipFlop_2/nQ 0.23fF
+C52 vdd vco_D0 0.03fF
+C53 n_out_by_2 div_by_5_0/DFlipFlop_1/latch_diff_1/nD 0.24fF
+C54 div_by_5_0/DFlipFlop_0/latch_diff_1/D out_by_2 0.33fF
+C55 div_by_5_0/DFlipFlop_2/D out_by_2 0.22fF
+C56 vdd div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# 0.03fF
+C57 iref_cp Down 0.09fF
+C58 Down biasp 1.24fF
+C59 n_out_by_2 div_by_5_0/DFlipFlop_3/latch_diff_1/nD 0.10fF
+C60 div_by_5_0/DFlipFlop_3/latch_diff_0/nD n_out_by_2 0.11fF
+C61 div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out n_out_by_2 -0.11fF
+C62 out_first_buffer ring_osc_0/csvco_branch_2/cap_vco_0/t 0.03fF
+C63 nDown pswitch 0.53fF
+C64 nDown Down 2.55fF
+C65 n_out_by_2 div_by_5_0/DFlipFlop_2/latch_diff_0/D 0.12fF
+C66 out_by_2 div_5_nQ2 0.16fF
+C67 vco_vctrl out_by_2 0.53fF
+C68 vdd n_out_by_2 1.03fF
+C69 vdd vco_vctrl -1.02fF
+C70 vdd buffer_salida_0/a_678_n100# 0.24fF
+C71 out_div_by_5 div_5_Q1_shift 0.05fF
+C72 div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in n_out_by_2 0.27fF
+C73 n_out_by_2 div_5_Q1 1.04fF
+C74 vdd ring_osc_0/csvco_branch_2/vbp 0.03fF
+C75 vco_vctrl div_5_Q1 0.14fF
+C76 vdd iref_cp 0.15fF
+C77 n_out_by_2 div_by_5_0/DFlipFlop_3/latch_diff_1/D 0.24fF
+C78 out_by_2 div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_143_136# -0.02fF
+C79 out_by_2 div_by_5_0/DFlipFlop_3/latch_diff_0/D 0.11fF
+C80 n_out_by_2 div_by_5_0/DFlipFlop_2/nQ 0.10fF
+C81 vco_vctrl nswitch -0.06fF
+C82 Up biasp 0.26fF
+C83 vdd nDown 0.22fF
+C84 div_by_5_0/DFlipFlop_0/latch_diff_1/D n_out_by_2 0.17fF
+C85 div_by_5_0/DFlipFlop_2/D n_out_by_2 0.19fF
+C86 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# n_out_by_2 0.12fF
+C87 vco_vctrl div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# -0.36fF
+C88 n_out_by_2 div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_194_125# -0.05fF
+C89 div_5_nQ0 out_by_2 0.32fF
+C90 out_by_2 div_by_5_0/DFlipFlop_1/D 0.38fF
+C91 pswitch nUp 0.85fF
+C92 div_by_5_0/DFlipFlop_0/latch_diff_0/nD out_by_2 0.17fF
+C93 out_to_div out_to_buffer 0.13fF
+C94 div_by_2_0/clock_inverter_0/inverter_cp_x1_2/in out_to_div -0.16fF
+C95 n_out_by_2 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_143_136# 0.02fF
+C96 nDown nswitch 0.76fF
+C97 vco_vctrl div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_143_136# -0.11fF
+C98 vdd out_div_by_5 0.28fF
+C99 n_out_by_2 div_by_5_0/DFlipFlop_0/latch_diff_0/D 0.24fF
+C100 n_out_by_2 div_5_nQ2 0.10fF
+C101 vco_vctrl n_out_by_2 0.52fF
+C102 out_by_2 div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in -0.22fF
+C103 vdd lf_vc 0.02fF
+C104 out_by_2 div_by_5_0/DFlipFlop_1/latch_diff_1/D 0.23fF
+C105 out_div_by_5 div_5_Q1 0.01fF
+C106 out_by_2 div_by_5_0/DFlipFlop_0/latch_diff_1/nD 0.17fF
+C107 vco_vctrl ring_osc_0/csvco_branch_2/vbp 0.26fF
C108 PFD_0/and_pfd_0/a_656_410# vss 0.96fF
C109 PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_63_n45# vss 0.05fF
C110 PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_n129_n45# vss 0.07fF
@@ -2879,6 +2881,12 @@
C237 loop_filter_0/res_loop_filter_2/out vss 7.90fF
.ends
+.subckt sky130_fd_pr__cap_mim_m3_2_2Y8F6P VSUBS c2_n3251_n3000# m4_n3351_n3100#
+X0 c2_n3251_n3000# m4_n3351_n3100# sky130_fd_pr__cap_mim_m3_2 l=3e+07u w=3e+07u
+C0 c2_n3251_n3000# m4_n3351_n3100# 72.82fF
+C1 m4_n3351_n3100# VSUBS 14.58fF
+.ends
+
.subckt sky130_fd_pr__pfet_01v8_lvt_8P223X VSUBS a_n2017_n1317# a_n1731_n1219# a_n1879_n1219#
+ a_n2017_n61# w_n2018_n202#
X0 a_n1731_n1219# a_n2017_n61# w_n2018_n202# w_n2018_n202# sky130_fd_pr__pfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=4.5e+06u l=450000u
@@ -2931,16 +2939,16 @@
X47 w_n2018_n202# a_n2017_n61# a_n1731_n1219# w_n2018_n202# sky130_fd_pr__pfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=4.5e+06u l=450000u
X48 a_n1731_n1219# a_n2017_n1317# a_n1879_n1219# w_n2018_n202# sky130_fd_pr__pfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=4.5e+06u l=450000u
X49 a_n1731_n1219# a_n2017_n1317# a_n1879_n1219# w_n2018_n202# sky130_fd_pr__pfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=4.5e+06u l=450000u
-C0 a_n1731_n1219# w_n2018_n202# 19.90fF
-C1 a_n1731_n1219# a_n2017_n61# 5.23fF
-C2 a_n1731_n1219# a_n2017_n1317# 4.73fF
-C3 a_n1731_n1219# a_n1879_n1219# 19.29fF
-C4 w_n2018_n202# a_n2017_n61# 1.37fF
+C0 a_n1879_n1219# a_n2017_n61# 0.16fF
+C1 a_n2017_n1317# a_n2017_n61# 2.88fF
+C2 a_n1879_n1219# a_n1731_n1219# 19.29fF
+C3 a_n2017_n1317# a_n1731_n1219# 4.73fF
+C4 a_n1879_n1219# w_n2018_n202# 0.25fF
C5 a_n2017_n1317# w_n2018_n202# 0.16fF
-C6 a_n2017_n1317# a_n2017_n61# 2.88fF
-C7 w_n2018_n202# a_n1879_n1219# 0.25fF
-C8 a_n1879_n1219# a_n2017_n61# 0.16fF
-C9 a_n2017_n1317# a_n1879_n1219# 2.66fF
+C6 a_n1731_n1219# a_n2017_n61# 5.23fF
+C7 a_n2017_n61# w_n2018_n202# 1.37fF
+C8 a_n2017_n1317# a_n1879_n1219# 2.66fF
+C9 a_n1731_n1219# w_n2018_n202# 19.90fF
C10 a_n1879_n1219# VSUBS 1.53fF
C11 a_n2017_n1317# VSUBS 5.03fF
C12 a_n1731_n1219# VSUBS 2.60fF
@@ -2948,7 +2956,7 @@
C14 w_n2018_n202# VSUBS 37.43fF
.ends
-.subckt bias VSUBS vdd iref_1 iref_2 iref
+.subckt bias VSUBS vdd iref_0 iref_1 iref_2 iref
Xsky130_fd_pr__pfet_01v8_lvt_8P223X_5 VSUBS iref m1_20168_984# iref m1_20168_984#
+ vdd sky130_fd_pr__pfet_01v8_lvt_8P223X
Xsky130_fd_pr__pfet_01v8_lvt_8P223X_6 VSUBS iref sky130_fd_pr__pfet_01v8_lvt_8P223X_6/a_n1731_n1219#
@@ -2971,44 +2979,44 @@
+ iref_3 m1_20168_984# vdd sky130_fd_pr__pfet_01v8_lvt_8P223X
Xsky130_fd_pr__pfet_01v8_lvt_8P223X_4 VSUBS iref sky130_fd_pr__pfet_01v8_lvt_8P223X_4/a_n1731_n1219#
+ iref_4 m1_20168_984# vdd sky130_fd_pr__pfet_01v8_lvt_8P223X
-C0 iref_8 iref_7 0.05fF
-C1 sky130_fd_pr__pfet_01v8_lvt_8P223X_10/a_n1731_n1219# vdd 0.24fF
-C2 iref_2 iref -0.01fF
-C3 iref vdd -0.07fF
-C4 sky130_fd_pr__pfet_01v8_lvt_8P223X_1/a_n1731_n1219# sky130_fd_pr__pfet_01v8_lvt_8P223X_0/a_n1731_n1219# 0.67fF
-C5 sky130_fd_pr__pfet_01v8_lvt_8P223X_2/a_n1731_n1219# iref_1 0.24fF
-C6 iref sky130_fd_pr__pfet_01v8_lvt_8P223X_1/a_n1731_n1219# -0.15fF
-C7 iref iref_9 -0.01fF
-C8 iref iref_4 0.30fF
-C9 sky130_fd_pr__pfet_01v8_lvt_8P223X_8/a_n1731_n1219# vdd 0.24fF
-C10 iref_2 sky130_fd_pr__pfet_01v8_lvt_8P223X_3/a_n1731_n1219# 0.24fF
-C11 iref_0 iref_1 0.05fF
-C12 sky130_fd_pr__pfet_01v8_lvt_8P223X_3/a_n1731_n1219# vdd 0.24fF
-C13 iref iref_5 0.05fF
-C14 m1_20168_984# vdd 0.25fF
-C15 iref m1_20168_984# 0.07fF
-C16 sky130_fd_pr__pfet_01v8_lvt_8P223X_1/a_n1731_n1219# m1_20168_984# -0.39fF
-C17 m1_20168_984# sky130_fd_pr__pfet_01v8_lvt_8P223X_6/a_n1731_n1219# 0.54fF
-C18 iref_3 sky130_fd_pr__pfet_01v8_lvt_8P223X_4/a_n1731_n1219# 0.24fF
-C19 iref_2 iref_1 0.05fF
-C20 sky130_fd_pr__pfet_01v8_lvt_8P223X_3/a_n1731_n1219# m1_20168_984# 0.01fF
-C21 iref iref_1 -0.02fF
-C22 iref_6 iref_7 0.05fF
-C23 sky130_fd_pr__pfet_01v8_lvt_8P223X_7/a_n1731_n1219# vdd 0.24fF
-C24 sky130_fd_pr__pfet_01v8_lvt_8P223X_2/a_n1731_n1219# vdd 0.24fF
-C25 iref_6 sky130_fd_pr__pfet_01v8_lvt_8P223X_8/a_n1731_n1219# 0.24fF
-C26 vdd sky130_fd_pr__pfet_01v8_lvt_8P223X_4/a_n1731_n1219# 0.24fF
-C27 sky130_fd_pr__pfet_01v8_lvt_8P223X_9/a_n1731_n1219# vdd 0.24fF
-C28 iref_6 iref_5 0.05fF
-C29 iref_2 iref_3 0.05fF
-C30 iref sky130_fd_pr__pfet_01v8_lvt_8P223X_4/a_n1731_n1219# 0.02fF
-C31 sky130_fd_pr__pfet_01v8_lvt_8P223X_9/a_n1731_n1219# iref_7 0.24fF
-C32 sky130_fd_pr__pfet_01v8_lvt_8P223X_7/a_n1731_n1219# iref_5 0.24fF
-C33 iref_4 iref_3 0.05fF
-C34 iref_8 sky130_fd_pr__pfet_01v8_lvt_8P223X_10/a_n1731_n1219# 0.24fF
-C35 m1_20168_984# sky130_fd_pr__pfet_01v8_lvt_8P223X_4/a_n1731_n1219# 0.01fF
-C36 iref iref_8 -0.03fF
-C37 iref_8 iref_9 0.05fF
+C0 vdd sky130_fd_pr__pfet_01v8_lvt_8P223X_2/a_n1731_n1219# 0.24fF
+C1 iref_1 iref_0 0.05fF
+C2 m1_20168_984# sky130_fd_pr__pfet_01v8_lvt_8P223X_6/a_n1731_n1219# 0.54fF
+C3 vdd sky130_fd_pr__pfet_01v8_lvt_8P223X_9/a_n1731_n1219# 0.24fF
+C4 iref_6 iref_5 0.05fF
+C5 sky130_fd_pr__pfet_01v8_lvt_8P223X_9/a_n1731_n1219# iref_7 0.24fF
+C6 iref_3 iref_2 0.05fF
+C7 iref_2 sky130_fd_pr__pfet_01v8_lvt_8P223X_3/a_n1731_n1219# 0.24fF
+C8 iref_6 iref_7 0.05fF
+C9 iref_1 iref -0.02fF
+C10 iref_8 iref_9 0.05fF
+C11 iref_2 iref -0.01fF
+C12 sky130_fd_pr__pfet_01v8_lvt_8P223X_1/a_n1731_n1219# sky130_fd_pr__pfet_01v8_lvt_8P223X_0/a_n1731_n1219# 0.67fF
+C13 iref_9 iref -0.01fF
+C14 vdd sky130_fd_pr__pfet_01v8_lvt_8P223X_4/a_n1731_n1219# 0.24fF
+C15 m1_20168_984# sky130_fd_pr__pfet_01v8_lvt_8P223X_1/a_n1731_n1219# -0.39fF
+C16 vdd sky130_fd_pr__pfet_01v8_lvt_8P223X_3/a_n1731_n1219# 0.24fF
+C17 sky130_fd_pr__pfet_01v8_lvt_8P223X_1/a_n1731_n1219# iref -0.15fF
+C18 iref_3 iref_4 0.05fF
+C19 sky130_fd_pr__pfet_01v8_lvt_8P223X_8/a_n1731_n1219# iref_6 0.24fF
+C20 vdd sky130_fd_pr__pfet_01v8_lvt_8P223X_10/a_n1731_n1219# 0.24fF
+C21 vdd m1_20168_984# 0.25fF
+C22 iref iref_5 0.05fF
+C23 vdd iref -0.07fF
+C24 iref_8 iref_7 0.05fF
+C25 iref_4 iref 0.30fF
+C26 vdd sky130_fd_pr__pfet_01v8_lvt_8P223X_8/a_n1731_n1219# 0.24fF
+C27 sky130_fd_pr__pfet_01v8_lvt_8P223X_7/a_n1731_n1219# iref_5 0.24fF
+C28 vdd sky130_fd_pr__pfet_01v8_lvt_8P223X_7/a_n1731_n1219# 0.24fF
+C29 iref_3 sky130_fd_pr__pfet_01v8_lvt_8P223X_4/a_n1731_n1219# 0.24fF
+C30 iref_1 sky130_fd_pr__pfet_01v8_lvt_8P223X_2/a_n1731_n1219# 0.24fF
+C31 m1_20168_984# sky130_fd_pr__pfet_01v8_lvt_8P223X_4/a_n1731_n1219# 0.01fF
+C32 iref_8 sky130_fd_pr__pfet_01v8_lvt_8P223X_10/a_n1731_n1219# 0.24fF
+C33 sky130_fd_pr__pfet_01v8_lvt_8P223X_4/a_n1731_n1219# iref 0.02fF
+C34 m1_20168_984# sky130_fd_pr__pfet_01v8_lvt_8P223X_3/a_n1731_n1219# 0.01fF
+C35 iref_8 iref -0.03fF
+C36 iref_1 iref_2 0.05fF
+C37 m1_20168_984# iref 0.07fF
C38 iref_4 VSUBS 1.17fF
C39 sky130_fd_pr__pfet_01v8_lvt_8P223X_4/a_n1731_n1219# VSUBS 2.60fF
C40 iref_3 VSUBS 0.64fF
@@ -3034,19 +3042,28 @@
C60 sky130_fd_pr__pfet_01v8_lvt_8P223X_6/a_n1731_n1219# VSUBS 2.60fF
.ends
+.subckt mimcap_decoup_1x5 VSUBS t b
+Xdecap[0] VSUBS t b sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xdecap[1] VSUBS t b sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xdecap[2] VSUBS t b sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xdecap[3] VSUBS t b sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xdecap[4] VSUBS t b sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+C0 b VSUBS 68.24fF
+.ends
+
.subckt sky130_fd_pr__cap_mim_m3_1_WHJTNJ VSUBS m3_n4309_50# m3_n4309_n4250# c1_n4209_n4150#
+ c1_110_n4150# m3_10_n4250#
X0 c1_n4209_n4150# m3_n4309_n4250# sky130_fd_pr__cap_mim_m3_1 l=2e+07u w=2e+07u
X1 c1_110_n4150# m3_10_n4250# sky130_fd_pr__cap_mim_m3_1 l=2e+07u w=2e+07u
X2 c1_n4209_n4150# m3_n4309_50# sky130_fd_pr__cap_mim_m3_1 l=2e+07u w=2e+07u
X3 c1_110_n4150# m3_10_n4250# sky130_fd_pr__cap_mim_m3_1 l=2e+07u w=2e+07u
-C0 m3_n4309_50# m3_10_n4250# 1.75fF
-C1 c1_n4209_n4150# c1_110_n4150# 1.32fF
-C2 c1_n4209_n4150# m3_n4309_n4250# 38.10fF
-C3 m3_n4309_50# m3_n4309_n4250# 2.63fF
-C4 m3_10_n4250# c1_110_n4150# 81.11fF
-C5 c1_n4209_n4150# m3_n4309_50# 38.10fF
-C6 m3_10_n4250# m3_n4309_n4250# 1.75fF
+C0 m3_n4309_50# m3_n4309_n4250# 2.63fF
+C1 c1_n4209_n4150# m3_n4309_50# 38.10fF
+C2 m3_10_n4250# m3_n4309_n4250# 1.75fF
+C3 c1_110_n4150# m3_10_n4250# 81.11fF
+C4 m3_n4309_50# m3_10_n4250# 1.75fF
+C5 c1_n4209_n4150# m3_n4309_n4250# 38.10fF
+C6 c1_110_n4150# c1_n4209_n4150# 1.32fF
C7 c1_110_n4150# VSUBS 0.12fF
C8 c1_n4209_n4150# VSUBS 0.12fF
C9 m3_n4309_n4250# VSUBS 8.68fF
@@ -3063,8 +3080,8 @@
.subckt sky130_fd_pr__nfet_01v8_U2JGXT w_n226_n510# a_n118_n388# a_n88_n300# a_30_n300#
X0 a_30_n300# a_n118_n388# a_n88_n300# w_n226_n510# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=300000u
-C0 a_30_n300# a_n88_n300# 0.61fF
-C1 a_n118_n388# a_n88_n300# 0.11fF
+C0 a_n88_n300# a_n118_n388# 0.11fF
+C1 a_n88_n300# a_30_n300# 0.61fF
C2 a_30_n300# w_n226_n510# 0.40fF
C3 a_n88_n300# w_n226_n510# 0.40fF
C4 a_n118_n388# w_n226_n510# 0.28fF
@@ -3078,9 +3095,9 @@
Xres_loop_filter_0 vss res_loop_filter_2/out in res_loop_filter
Xres_loop_filter_1 vss res_loop_filter_2/out vc_pex res_loop_filter
Xres_loop_filter_2 vss res_loop_filter_2/out vc_pex res_loop_filter
-C0 in D0_cap 0.07fF
+C0 in cap3_loop_filter_0/in 0.79fF
C1 vc_pex in 0.18fF
-C2 in cap3_loop_filter_0/in 0.79fF
+C2 in D0_cap 0.07fF
C3 vc_pex vss -38.13fF
C4 res_loop_filter_2/out vss 8.49fF
C5 D0_cap vss 0.04fF
@@ -3093,12 +3110,13 @@
+ vco_vctrl Down w_13905_n238# vss D0_vco iref_cp ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd
+ out_to_div DO_cap nDown biasp out_to_pad Up nUp
Xcharge_pump_0 vss pswitch nswitch vco_vctrl vdd biasp nUp Down charge_pump_0/w_2544_775#
-+ iref_cp nDown Up charge_pump
++ iref_cp nDown Up charge_pump_0/w_1008_774# charge_pump
Xloop_filter_v2_0 lf_vc DO_cap vco_vctrl vss loop_filter_v2
Xdiv_by_2_0 vss vdd div_by_2_0/clock_inverter_0/inverter_cp_x1_2/in out_by_2 n_out_by_2
+ out_buffer_div_2 out_to_div out_div_2 n_out_buffer_div_2 div_by_2_0/clock_inverter_0/inverter_cp_x1_0/out
+ n_out_div_2 div_by_2
-Xbuffer_salida_0 buffer_salida_0/a_678_n100# out_to_pad out_to_buffer vss vdd buffer_salida
+Xbuffer_salida_0 buffer_salida_0/a_678_n100# out_to_pad out_to_buffer buffer_salida_0/a_3996_n100#
++ vss vdd buffer_salida
Xring_osc_0 ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd vco_vctrl ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd
+ ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd vdd vss ring_osc_0/csvco_branch_2/vbp
+ ring_osc_0/csvco_branch_0/inverter_csvco_0/vss D0_vco ring_osc_0/csvco_branch_2/cap_vco_0/t
@@ -3124,114 +3142,114 @@
Xpfd_cp_interface_0 vss pfd_cp_interface_0/inverter_cp_x1_2/in vdd pfd_cp_interface_0/inverter_cp_x1_0/out
+ Down QA QB nDown Up nUp pfd_cp_interface
XPFD_0 vss vdd QB QA in_ref out_div_by_5 pfd_reset PFD
-C0 div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_0/out out_by_2 0.09fF
-C1 div_5_Q0 out_by_2 0.09fF
-C2 vdd lf_vc 0.02fF
-C3 vdd out_by_2 0.97fF
-C4 biasp nDown 0.26fF
-C5 div_by_5_0/DFlipFlop_3/latch_diff_1/D out_by_2 0.09fF
-C6 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# n_out_by_2 0.12fF
-C7 biasp Up 0.26fF
-C8 n_out_by_2 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_143_136# 0.02fF
-C9 n_out_by_2 div_by_5_0/DFlipFlop_3/latch_diff_1/nD 0.10fF
-C10 vco_vctrl out_by_2 0.53fF
-C11 div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in n_out_by_2 -0.51fF
-C12 div_by_5_0/sky130_fd_sc_hs__or2_1_0/a_63_368# out_div_by_5 0.18fF
-C13 div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out n_out_by_2 -0.11fF
-C14 div_by_5_0/DFlipFlop_2/latch_diff_1/D n_out_by_2 0.10fF
-C15 nUp vdd 0.05fF
-C16 div_by_5_0/DFlipFlop_0/latch_diff_1/nD out_by_2 0.17fF
-C17 div_by_5_0/DFlipFlop_1/latch_diff_0/D n_out_by_2 0.12fF
-C18 div_by_5_0/DFlipFlop_3/latch_diff_0/nD n_out_by_2 0.11fF
-C19 n_out_by_2 div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_355_368# 0.03fF
-C20 div_by_5_0/DFlipFlop_1/latch_diff_1/nD n_out_by_2 0.24fF
-C21 div_5_nQ2 out_by_2 0.16fF
-C22 nUp vco_vctrl 0.02fF
-C23 div_5_Q1 out_by_2 0.42fF
-C24 div_5_Q0 n_out_by_2 -0.12fF
-C25 vdd iref_cp 0.15fF
-C26 div_by_5_0/DFlipFlop_1/latch_diff_0/nD out_by_2 0.10fF
-C27 nUp biasp -0.17fF
-C28 vdd n_out_by_2 1.03fF
-C29 div_5_Q1_shift out_div_by_5 0.05fF
-C30 out_by_2 div_by_5_0/DFlipFlop_2/D 0.22fF
-C31 div_by_5_0/DFlipFlop_2/nQ out_by_2 0.23fF
-C32 div_by_5_0/DFlipFlop_3/latch_diff_1/D n_out_by_2 0.24fF
-C33 div_5_nQ0 out_by_2 0.32fF
-C34 div_by_5_0/DFlipFlop_0/Q out_by_2 0.09fF
-C35 nDown pswitch 0.53fF
-C36 vco_vctrl div_by_5_0/DFlipFlop_0/D -0.45fF
-C37 pswitch Up 1.98fF
-C38 nDown nswitch 0.76fF
-C39 vco_vctrl n_out_by_2 0.52fF
-C40 div_by_5_0/DFlipFlop_1/latch_diff_1/D out_by_2 0.23fF
-C41 biasp Down 1.24fF
-C42 div_by_5_0/DFlipFlop_3/latch_diff_0/D out_by_2 0.11fF
-C43 div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in out_by_2 -0.22fF
-C44 div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_194_125# n_out_by_2 -0.05fF
-C45 vdd pfd_cp_interface_0/inverter_cp_x1_2/in 0.01fF
-C46 n_out_by_2 div_by_5_0/DFlipFlop_0/latch_diff_1/nD 0.33fF
-C47 vdd out_div_by_5 0.28fF
-C48 out_to_buffer vdd 0.07fF
-C49 div_by_5_0/DFlipFlop_2/latch_diff_0/D n_out_by_2 0.12fF
-C50 out_to_div div_by_2_0/clock_inverter_0/inverter_cp_x1_0/out -0.12fF
-C51 div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in n_out_by_2 0.27fF
-C52 n_out_by_2 div_5_nQ2 0.10fF
-C53 div_by_5_0/DFlipFlop_2/latch_diff_1/nD out_by_2 0.09fF
-C54 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# vdd 0.03fF
-C55 div_5_Q1 n_out_by_2 1.04fF
-C56 div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_158_392# n_out_by_2 0.01fF
-C57 nUp pswitch 0.85fF
-C58 vdd D0_vco 0.03fF
-C59 n_out_by_2 div_by_5_0/DFlipFlop_2/D 0.19fF
-C60 div_by_5_0/DFlipFlop_2/nQ n_out_by_2 0.10fF
-C61 vdd div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out 0.04fF
-C62 div_5_nQ0 n_out_by_2 0.10fF
-C63 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# vco_vctrl -0.36fF
-C64 div_by_5_0/DFlipFlop_0/Q n_out_by_2 -0.23fF
-C65 vco_vctrl div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_143_136# -0.11fF
-C66 out_by_2 div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_56_136# 0.10fF
-C67 nUp nDown -0.09fF
-C68 ring_osc_0/csvco_branch_2/vbp vdd 0.03fF
-C69 div_by_5_0/DFlipFlop_1/latch_diff_1/D n_out_by_2 0.10fF
-C70 nUp Up 2.72fF
-C71 div_by_5_0/DFlipFlop_0/latch_diff_0/D n_out_by_2 0.24fF
-C72 nswitch Down 0.54fF
-C73 out_div_by_5 div_5_Q1 0.01fF
-C74 div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_143_136# out_by_2 -0.02fF
-C75 ring_osc_0/csvco_branch_2/vbp vco_vctrl 0.26fF
-C76 nDown Down 2.55fF
-C77 div_by_5_0/DFlipFlop_2/latch_diff_0/nD out_by_2 0.10fF
-C78 out_to_buffer buffer_salida_0/a_678_n100# 0.22fF
-C79 div_by_5_0/DFlipFlop_1/D out_by_2 0.38fF
-C80 div_by_5_0/DFlipFlop_2/latch_diff_1/nD n_out_by_2 0.24fF
-C81 out_to_div out_to_buffer 0.13fF
-C82 div_5_Q0 vco_vctrl 0.48fF
-C83 out_by_2 div_by_5_0/DFlipFlop_0/latch_diff_1/D 0.33fF
-C84 vco_vctrl vdd -1.02fF
-C85 div_by_5_0/DFlipFlop_0/D out_by_2 0.35fF
-C86 out_to_div div_by_2_0/clock_inverter_0/inverter_cp_x1_2/in -0.16fF
-C87 div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in n_out_by_2 -0.20fF
-C88 vco_vctrl ring_osc_0/csvco_branch_0/inverter_csvco_0/vss 0.04fF
-C89 div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out out_by_2 0.28fF
-C90 div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out out_by_2 -0.04fF
-C91 vdd buffer_salida_0/a_678_n100# 0.24fF
-C92 div_by_5_0/DFlipFlop_1/D n_out_by_2 0.22fF
-C93 vco_vctrl div_5_Q1 0.14fF
-C94 iref_cp Down 0.09fF
-C95 n_out_by_2 div_by_5_0/DFlipFlop_0/latch_diff_1/D 0.17fF
-C96 out_to_div vdd 0.21fF
-C97 div_by_5_0/DFlipFlop_0/D n_out_by_2 -1.48fF
-C98 out_by_2 div_by_5_0/DFlipFlop_3/latch_diff_1/nD 0.23fF
-C99 ring_osc_0/csvco_branch_2/cap_vco_0/t out_first_buffer 0.03fF
-C100 div_by_5_0/DFlipFlop_2/latch_diff_1/D out_by_2 0.23fF
-C101 div_by_5_0/DFlipFlop_0/latch_diff_0/nD out_by_2 0.17fF
-C102 vdd nDown 0.22fF
-C103 vdd Up 0.28fF
-C104 ring_osc_0/csvco_branch_2/cap_vco_0/t vdd 0.02fF
-C105 div_by_5_0/DFlipFlop_1/latch_diff_1/nD out_by_2 0.09fF
-C106 vco_vctrl nswitch -0.06fF
-C107 QA vdd -0.04fF
+C0 vdd out_div_by_5 0.28fF
+C1 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_143_136# vco_vctrl -0.11fF
+C2 div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out n_out_by_2 -0.11fF
+C3 div_by_5_0/DFlipFlop_1/latch_diff_1/nD out_by_2 0.09fF
+C4 n_out_by_2 div_by_5_0/DFlipFlop_0/latch_diff_1/nD 0.33fF
+C5 div_5_Q1 vco_vctrl 0.14fF
+C6 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# vco_vctrl -0.36fF
+C7 nUp biasp -0.17fF
+C8 div_by_2_0/clock_inverter_0/inverter_cp_x1_0/out out_to_div -0.12fF
+C9 vdd nUp 0.05fF
+C10 nDown biasp 0.26fF
+C11 pswitch nUp 0.85fF
+C12 div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in out_by_2 -0.22fF
+C13 nDown vdd 0.22fF
+C14 n_out_by_2 div_by_5_0/DFlipFlop_0/D -1.48fF
+C15 pswitch nDown 0.53fF
+C16 n_out_by_2 div_5_nQ2 0.10fF
+C17 n_out_by_2 div_by_5_0/DFlipFlop_3/latch_diff_0/nD 0.11fF
+C18 nswitch Down 0.54fF
+C19 n_out_by_2 div_by_5_0/DFlipFlop_2/latch_diff_1/nD 0.24fF
+C20 vdd ring_osc_0/csvco_branch_2/cap_vco_0/t 0.02fF
+C21 n_out_by_2 div_by_5_0/DFlipFlop_1/latch_diff_1/nD 0.24fF
+C22 vco_vctrl ring_osc_0/csvco_branch_2/vbp 0.26fF
+C23 div_by_5_0/DFlipFlop_3/latch_diff_1/D out_by_2 0.09fF
+C24 div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_0/out out_by_2 0.09fF
+C25 div_by_5_0/DFlipFlop_2/D out_by_2 0.22fF
+C26 div_by_5_0/DFlipFlop_1/latch_diff_1/D out_by_2 0.23fF
+C27 Up biasp 0.26fF
+C28 ring_osc_0/csvco_branch_0/inverter_csvco_0/vss vco_vctrl 0.04fF
+C29 vdd out_by_2 0.97fF
+C30 Up vdd 0.28fF
+C31 nDown nUp -0.09fF
+C32 pswitch Up 1.98fF
+C33 div_by_5_0/DFlipFlop_0/D vco_vctrl -0.45fF
+C34 out_to_buffer out_to_div 0.13fF
+C35 n_out_by_2 div_by_5_0/DFlipFlop_3/latch_diff_1/D 0.24fF
+C36 n_out_by_2 div_by_5_0/DFlipFlop_2/D 0.19fF
+C37 n_out_by_2 div_by_5_0/DFlipFlop_1/latch_diff_1/D 0.10fF
+C38 n_out_by_2 div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_194_125# -0.05fF
+C39 div_5_nQ0 out_by_2 0.32fF
+C40 n_out_by_2 vdd 1.03fF
+C41 div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_56_136# out_by_2 0.10fF
+C42 Up nUp 2.72fF
+C43 n_out_by_2 div_5_nQ0 0.10fF
+C44 out_by_2 div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out 0.28fF
+C45 n_out_by_2 div_by_5_0/DFlipFlop_0/latch_diff_0/D 0.24fF
+C46 vdd vco_vctrl -1.02fF
+C47 n_out_by_2 div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in -0.51fF
+C48 out_by_2 div_by_5_0/DFlipFlop_0/Q 0.09fF
+C49 div_by_5_0/sky130_fd_sc_hs__or2_1_0/a_63_368# out_div_by_5 0.18fF
+C50 out_by_2 div_5_Q0 0.09fF
+C51 out_by_2 div_by_5_0/DFlipFlop_0/latch_diff_0/nD 0.17fF
+C52 n_out_by_2 div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_355_368# 0.03fF
+C53 div_by_5_0/DFlipFlop_0/latch_diff_1/D out_by_2 0.33fF
+C54 lf_vc vdd 0.02fF
+C55 n_out_by_2 div_by_5_0/DFlipFlop_0/Q -0.23fF
+C56 out_to_buffer buffer_salida_0/a_678_n100# 0.22fF
+C57 Down biasp 1.24fF
+C58 nUp vco_vctrl 0.02fF
+C59 vdd out_to_div 0.21fF
+C60 div_by_5_0/DFlipFlop_1/D out_by_2 0.38fF
+C61 n_out_by_2 div_5_Q0 -0.12fF
+C62 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# vdd 0.03fF
+C63 Down iref_cp 0.09fF
+C64 n_out_by_2 div_by_5_0/DFlipFlop_0/latch_diff_1/D 0.17fF
+C65 n_out_by_2 div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in 0.27fF
+C66 out_to_buffer vdd 0.07fF
+C67 n_out_by_2 div_by_5_0/DFlipFlop_1/D 0.22fF
+C68 pfd_cp_interface_0/inverter_cp_x1_2/in vdd 0.01fF
+C69 n_out_by_2 div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_158_392# 0.01fF
+C70 nDown nswitch 0.76fF
+C71 n_out_by_2 div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in -0.20fF
+C72 div_5_Q1 out_div_by_5 0.01fF
+C73 vdd ring_osc_0/csvco_branch_2/vbp 0.03fF
+C74 n_out_by_2 div_by_5_0/DFlipFlop_2/latch_diff_0/D 0.12fF
+C75 out_by_2 div_by_5_0/DFlipFlop_2/nQ 0.23fF
+C76 out_by_2 vco_vctrl 0.53fF
+C77 div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out vdd 0.04fF
+C78 div_by_5_0/DFlipFlop_3/latch_diff_1/nD out_by_2 0.23fF
+C79 vco_vctrl div_5_Q0 0.48fF
+C80 nDown Down 2.55fF
+C81 div_by_5_0/DFlipFlop_2/latch_diff_0/nD out_by_2 0.10fF
+C82 n_out_by_2 div_by_5_0/DFlipFlop_2/nQ 0.10fF
+C83 n_out_by_2 vco_vctrl 0.52fF
+C84 n_out_by_2 div_by_5_0/DFlipFlop_3/latch_diff_1/nD 0.10fF
+C85 div_5_Q1_shift out_div_by_5 0.05fF
+C86 QA vdd -0.04fF
+C87 out_by_2 div_by_5_0/DFlipFlop_3/latch_diff_0/D 0.11fF
+C88 out_by_2 div_by_5_0/DFlipFlop_1/latch_diff_0/nD 0.10fF
+C89 out_by_2 div_5_Q1 0.42fF
+C90 vdd buffer_salida_0/a_678_n100# 0.24fF
+C91 div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_143_136# out_by_2 -0.02fF
+C92 div_by_5_0/DFlipFlop_2/latch_diff_1/D out_by_2 0.23fF
+C93 div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out out_by_2 -0.04fF
+C94 n_out_by_2 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_143_136# 0.02fF
+C95 D0_vco vdd 0.03fF
+C96 n_out_by_2 div_5_Q1 1.04fF
+C97 n_out_by_2 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# 0.12fF
+C98 out_by_2 div_by_5_0/DFlipFlop_0/latch_diff_1/nD 0.17fF
+C99 n_out_by_2 div_by_5_0/DFlipFlop_2/latch_diff_1/D 0.10fF
+C100 div_by_2_0/clock_inverter_0/inverter_cp_x1_2/in out_to_div -0.16fF
+C101 vdd iref_cp 0.15fF
+C102 out_first_buffer ring_osc_0/csvco_branch_2/cap_vco_0/t 0.03fF
+C103 n_out_by_2 div_by_5_0/DFlipFlop_1/latch_diff_0/D 0.12fF
+C104 nswitch vco_vctrl -0.06fF
+C105 div_by_5_0/DFlipFlop_0/D out_by_2 0.35fF
+C106 div_5_nQ2 out_by_2 0.16fF
+C107 out_by_2 div_by_5_0/DFlipFlop_2/latch_diff_1/nD 0.09fF
C108 PFD_0/and_pfd_0/a_656_410# vss 0.96fF
C109 PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_63_n45# vss 0.05fF
C110 PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_n129_n45# vss 0.07fF
@@ -3471,960 +3489,1157 @@
+ wbs_dat_o[26] wbs_dat_o[27] wbs_dat_o[28] wbs_dat_o[29] wbs_dat_o[2] wbs_dat_o[30]
+ wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6] wbs_dat_o[7] wbs_dat_o[8]
+ wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3] wbs_stb_i wbs_we_i
-Xtop_pll_v1_0 top_pll_v1_0/vco_vctrl top_pll_v1_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd
-+ vdda1 top_pll_v1_0/charge_pump_0/w_2544_775# top_pll_v1_0/pswitch top_pll_v1_0/biasp
-+ top_pll_v1_0/ring_osc_0/csvco_branch_2/vbp io_analog[10] top_pll_v1_0/Down vssa1
-+ vssa1 gpio_noesd[7] top_pll_v1_0/QA top_pll_v1_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd
-+ bias_0/iref_2 top_pll_v1_0/out_to_div top_pll_v1_0/nDown io_analog[9] top_pll_v1_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd
-+ top_pll_v1_0/Up top_pll_v1_0/nUp top_pll_v1
-Xbias_0 vssa1 vdda1 bias_0/iref_1 bias_0/iref_2 io_analog[5] bias
+Xtop_pll_v1_0 top_pll_v1_0/vco_vctrl vdda1 top_pll_v1_0/pswitch top_pll_v1_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd
++ top_pll_v1_0/charge_pump_0/w_2544_775# top_pll_v1_0/ring_osc_0/csvco_branch_2/vbp
++ top_pll_v1_0/biasp io_analog[10] top_pll_v1_0/Down vssa1 vssa1 gpio_noesd[7] top_pll_v1_0/buffer_salida_0/a_3996_n100#
++ top_pll_v1_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd top_pll_v1_0/QA top_pll_v1_0/charge_pump_0/w_1008_774#
++ bias_0/iref_2 top_pll_v1_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd top_pll_v1_0/out_to_div
++ top_pll_v1_0/nDown io_analog[9] top_pll_v1_0/Up top_pll_v1_0/nUp top_pll_v1
+Xtop_pll_v1_1 top_pll_v1_1/vco_vctrl vdda1 top_pll_v1_1/pswitch top_pll_v1_1/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd
++ top_pll_v1_1/charge_pump_0/w_2544_775# top_pll_v1_1/ring_osc_0/csvco_branch_2/vbp
++ top_pll_v1_1/biasp io_analog[10] top_pll_v1_1/Down vssa1 vssa1 gpio_noesd[7] top_pll_v1_1/buffer_salida_0/a_3996_n100#
++ top_pll_v1_1/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd top_pll_v1_1/QA top_pll_v1_1/charge_pump_0/w_1008_774#
++ bias_0/iref_0 top_pll_v1_1/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd top_pll_v1_1/out_to_div
++ top_pll_v1_1/nDown io_analog[7] top_pll_v1_1/Up top_pll_v1_1/nUp top_pll_v1
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[0] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[1] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[2] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[3] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[4] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[5] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[6] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[7] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[8] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xbias_0 vssa1 vdda1 bias_0/iref_0 bias_0/iref_1 bias_0/iref_2 io_analog[5] bias
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[0] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[1] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[2] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[3] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[4] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[5] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[6] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[7] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[8] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xmimcap_decoup_1x5_0[0] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_0[1] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_0[2] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_1[0] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_1[1] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_1[2] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[0] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[1] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[2] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[3] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[4] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[5] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[6] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[7] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[8] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xmimcap_decoup_1x5_2[0] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_2[1] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_2[2] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_3[0] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_3[1] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_3[2] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_4[0] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_4[1] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_4[2] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_5[0] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_5[1] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_5[2] vssa1 vdda1 vssa1 mimcap_decoup_1x5
Xtop_pll_v2_0 top_pll_v2_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd top_pll_v2_0/pswitch
+ vdda1 top_pll_v2_0/charge_pump_0/w_2544_775# top_pll_v2_0/ring_osc_0/csvco_branch_2/vbp
+ top_pll_v2_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd io_analog[10] top_pll_v2_0/vco_vctrl
+ top_pll_v2_0/Down vssa1 vssa1 gpio_noesd[7] bias_0/iref_1 top_pll_v2_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd
+ top_pll_v2_0/out_to_div gpio_noesd[8] top_pll_v2_0/nDown top_pll_v2_0/biasp io_analog[8]
+ top_pll_v2_0/Up top_pll_v2_0/nUp top_pll_v2
-C0 bias_0/iref_2 top_pll_v1_0/Up 0.70fF
-C1 vdda1 top_pll_v1_0/nUp 0.01fF
-C2 vdda1 top_pll_v1_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd 0.04fF
-C3 io_clamp_low[2] io_clamp_high[2] 0.53fF
-C4 top_pll_v2_0/nUp bias_0/iref_1 0.22fF
-C5 io_clamp_high[2] io_analog[6] 0.53fF
-C6 vdda1 top_pll_v1_0/pswitch 0.38fF
-C7 top_pll_v1_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd vdda1 0.04fF
-C8 top_pll_v1_0/out_to_div gpio_noesd[7] 0.23fF
-C9 vdda1 gpio_noesd[7] 49.34fF
-C10 io_analog[10] gpio_noesd[8] 3.51fF
-C11 bias_0/iref_2 top_pll_v1_0/biasp 3.20fF
-C12 top_pll_v1_0/Down bias_0/iref_2 1.11fF
-C13 top_pll_v2_0/Up bias_0/iref_1 0.54fF
-C14 vdda1 top_pll_v2_0/pswitch 0.34fF
-C15 io_clamp_low[0] io_clamp_high[0] 0.53fF
-C16 io_analog[8] vdda1 29.93fF
-C17 m3_222594_702300# io_analog[5] 0.53fF
-C18 io_clamp_high[0] io_analog[4] 0.53fF
-C19 vdda1 top_pll_v2_0/biasp 0.03fF
-C20 io_analog[9] bias_0/iref_2 14.44fF
-C21 vdda1 top_pll_v1_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd 0.04fF
-C22 top_pll_v2_0/charge_pump_0/w_2544_775# bias_0/iref_1 0.09fF
-C23 top_pll_v2_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd vdda1 0.17fF
-C24 bias_0/iref_2 top_pll_v1_0/nUp 0.70fF
-C25 top_pll_v2_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd vdda1 0.17fF
-C26 vdda1 gpio_noesd[8] 57.83fF
-C27 top_pll_v1_0/charge_pump_0/w_2544_775# bias_0/iref_2 0.02fF
+C0 top_pll_v1_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd vdda1 0.04fF
+C1 top_pll_v1_1/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd vdda1 0.12fF
+C2 top_pll_v1_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd vdda1 0.04fF
+C3 io_clamp_low[0] io_clamp_high[0] 0.53fF
+C4 top_pll_v1_1/nDown bias_0/iref_0 0.74fF
+C5 top_pll_v1_0/QA io_analog[10] 0.03fF
+C6 io_analog[10] gpio_noesd[8] 20.65fF
+C7 top_pll_v1_1/Down bias_0/iref_0 1.08fF
+C8 gpio_noesd[7] top_pll_v1_0/out_to_div 0.23fF
+C9 m3_226242_702300# io_analog[5] 0.53fF
+C10 io_clamp_high[0] io_analog[4] 0.53fF
+C11 bias_0/iref_2 io_analog[9] 14.44fF
+C12 gpio_noesd[8] gpio_noesd[7] 1.88fF
+C13 top_pll_v1_1/Up bias_0/iref_0 0.74fF
+C14 io_analog[8] bias_0/iref_2 14.44fF
+C15 gpio_noesd[8] vdda1 76.96fF
+C16 top_pll_v2_0/Up bias_0/iref_1 0.54fF
+C17 top_pll_v2_0/buffer_salida_0/a_3996_n100# vdda1 0.05fF
+C18 top_pll_v2_0/vco_vctrl gpio_noesd[7] 0.05fF
+C19 top_pll_v2_0/vco_vctrl vdda1 0.59fF
+C20 top_pll_v1_0/nUp bias_0/iref_2 0.70fF
+C21 top_pll_v2_0/out_to_div gpio_noesd[7] 0.23fF
+C22 top_pll_v1_0/ring_osc_0/csvco_branch_2/vbp vdda1 1.01fF
+C23 bias_0/iref_1 top_pll_v2_0/charge_pump_0/w_2544_775# 0.09fF
+C24 bias_0/iref_0 top_pll_v1_1/biasp 3.13fF
+C25 top_pll_v1_1/charge_pump_0/w_1008_774# bias_0/iref_0 0.21fF
+C26 top_pll_v1_1/ring_osc_0/csvco_branch_2/vbp vdda1 1.14fF
+C27 gpio_noesd[7] top_pll_v1_1/vco_vctrl 0.04fF
C28 io_clamp_low[2] io_analog[6] 0.53fF
-C29 vdda1 top_pll_v2_0/buffer_salida_0/a_3996_n100# 0.05fF
-C30 top_pll_v2_0/nUp vdda1 0.01fF
-C31 top_pll_v1_0/QA io_analog[10] 0.03fF
-C32 vdda1 top_pll_v1_0/ring_osc_0/csvco_branch_2/vbp 1.01fF
-C33 vdda1 bias_0/iref_1 15.26fF
-C34 vdda1 top_pll_v1_0/biasp 0.03fF
-C35 vdda1 bias_0/iref_2 3.90fF
-C36 top_pll_v2_0/out_to_div gpio_noesd[7] 0.23fF
-C37 top_pll_v2_0/ring_osc_0/csvco_branch_2/vbp vdda1 2.10fF
-C38 top_pll_v2_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd vdda1 0.17fF
-C39 gpio_noesd[7] top_pll_v1_0/vco_vctrl 0.05fF
-C40 io_analog[8] bias_0/iref_2 14.44fF
-C41 top_pll_v1_0/nDown bias_0/iref_2 0.70fF
-C42 vdda1 top_pll_v1_0/vco_vctrl 0.43fF
-C43 gpio_noesd[7] top_pll_v2_0/vco_vctrl 0.05fF
-C44 io_clamp_low[0] io_analog[4] 0.53fF
-C45 top_pll_v2_0/nDown bias_0/iref_1 0.54fF
-C46 gpio_noesd[7] io_analog[10] 14.37fF
-C47 vdda1 top_pll_v2_0/vco_vctrl 0.59fF
+C29 top_pll_v1_1/vco_vctrl vdda1 0.54fF
+C30 top_pll_v2_0/pswitch vdda1 0.34fF
+C31 top_pll_v2_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd vdda1 0.17fF
+C32 io_analog[5] m3_222594_702300# 0.53fF
+C33 vdda1 top_pll_v1_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd 0.04fF
+C34 top_pll_v1_1/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd vdda1 0.12fF
+C35 io_analog[7] bias_0/iref_2 13.22fF
+C36 bias_0/iref_2 vdda1 3.90fF
+C37 top_pll_v2_0/nUp bias_0/iref_1 0.22fF
+C38 top_pll_v1_0/biasp vdda1 0.03fF
+C39 top_pll_v1_1/charge_pump_0/w_2544_775# bias_0/iref_0 0.21fF
+C40 bias_0/iref_2 top_pll_v1_0/charge_pump_0/w_2544_775# 0.02fF
+C41 top_pll_v1_1/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd vdda1 0.12fF
+C42 top_pll_v2_0/nUp vdda1 0.01fF
+C43 top_pll_v2_0/nDown bias_0/iref_1 0.54fF
+C44 top_pll_v1_0/nDown bias_0/iref_2 0.70fF
+C45 io_clamp_low[0] io_analog[4] 0.53fF
+C46 top_pll_v1_1/out_to_div gpio_noesd[7] 0.15fF
+C47 vdda1 io_analog[9] 30.05fF
C48 bias_0/iref_1 top_pll_v2_0/biasp 2.20fF
-C49 io_analog[5] m3_226242_702300# 0.53fF
-C50 vdda1 io_analog[10] 0.01fF
-C51 io_analog[9] vdda1 30.05fF
-C52 top_pll_v2_0/Down bias_0/iref_1 0.91fF
-C53 top_pll_v1_0/buffer_salida_0/a_3996_n100# vdda1 0.06fF
-C54 io_in_3v3[0] vssa1 0.41fF
-C55 io_oeb[26] vssa1 0.61fF
-C56 io_in[0] vssa1 0.41fF
-C57 io_out[26] vssa1 0.61fF
-C58 io_out[0] vssa1 0.41fF
-C59 io_in[26] vssa1 0.61fF
-C60 io_oeb[0] vssa1 0.41fF
-C61 io_in_3v3[26] vssa1 0.61fF
-C62 io_in_3v3[1] vssa1 0.41fF
-C63 io_oeb[25] vssa1 0.61fF
-C64 io_in[1] vssa1 0.41fF
-C65 io_out[25] vssa1 0.61fF
-C66 io_out[1] vssa1 0.41fF
-C67 io_in[25] vssa1 0.61fF
-C68 io_oeb[1] vssa1 0.41fF
-C69 io_in_3v3[25] vssa1 0.61fF
-C70 io_in_3v3[2] vssa1 0.41fF
-C71 io_oeb[24] vssa1 0.61fF
-C72 io_in[2] vssa1 0.41fF
-C73 io_out[24] vssa1 0.61fF
-C74 io_out[2] vssa1 0.41fF
-C75 io_in[24] vssa1 0.61fF
-C76 io_oeb[2] vssa1 -0.20fF
-C77 io_in_3v3[3] vssa1 0.41fF
-C78 gpio_noesd[17] vssa1 0.61fF
-C79 io_in[3] vssa1 0.41fF
-C80 gpio_analog[17] vssa1 0.61fF
-C81 io_out[3] vssa1 0.41fF
-C82 io_oeb[3] vssa1 0.41fF
-C83 io_in_3v3[4] vssa1 0.41fF
-C84 io_in[4] vssa1 0.41fF
-C85 io_out[4] vssa1 0.41fF
-C86 io_oeb[4] vssa1 0.41fF
-C87 io_oeb[23] vssa1 0.61fF
-C88 io_out[23] vssa1 0.61fF
-C89 io_in[23] vssa1 0.61fF
-C90 io_in_3v3[23] vssa1 0.61fF
-C91 gpio_noesd[16] vssa1 0.61fF
-C92 io_in_3v3[5] vssa1 0.41fF
-C93 io_in[5] vssa1 -0.20fF
-C94 io_out[5] vssa1 0.41fF
-C95 io_oeb[5] vssa1 0.41fF
-C96 io_oeb[22] vssa1 0.61fF
-C97 io_out[22] vssa1 0.61fF
-C98 io_in[22] vssa1 0.61fF
-C99 io_in_3v3[22] vssa1 0.61fF
-C100 gpio_analog[15] vssa1 0.61fF
-C101 io_in_3v3[6] vssa1 -0.20fF
-C102 io_in[6] vssa1 0.41fF
-C103 io_out[6] vssa1 0.41fF
-C104 io_oeb[6] vssa1 0.41fF
-C105 io_oeb[21] vssa1 0.61fF
-C106 io_out[21] vssa1 0.61fF
-C107 io_in[21] vssa1 0.61fF
-C108 io_in_3v3[21] vssa1 0.61fF
-C109 gpio_noesd[14] vssa1 0.61fF
-C110 gpio_analog[14] vssa1 0.61fF
-C111 vssd2 vssa1 -5.19fF
-C112 vssd1 vssa1 1.13fF
-C113 vdda2 vssa1 -5.19fF
-C114 io_oeb[20] vssa1 0.61fF
-C115 io_out[20] vssa1 0.61fF
-C116 io_in[20] vssa1 0.61fF
-C117 io_in_3v3[20] vssa1 0.61fF
-C118 gpio_noesd[13] vssa1 0.61fF
-C119 gpio_analog[13] vssa1 0.61fF
-C120 gpio_analog[0] vssa1 0.41fF
-C121 gpio_noesd[0] vssa1 0.41fF
-C122 io_in_3v3[7] vssa1 0.41fF
-C123 io_in[7] vssa1 0.41fF
-C124 io_out[7] vssa1 0.41fF
-C125 io_oeb[7] vssa1 0.41fF
-C126 io_oeb[19] vssa1 0.61fF
-C127 io_out[19] vssa1 0.61fF
-C128 io_in[19] vssa1 0.61fF
-C129 io_in_3v3[19] vssa1 0.61fF
-C130 gpio_noesd[12] vssa1 0.61fF
-C131 gpio_analog[12] vssa1 0.61fF
-C132 gpio_analog[1] vssa1 0.41fF
-C133 gpio_noesd[1] vssa1 0.41fF
-C134 io_in_3v3[8] vssa1 0.41fF
-C135 io_in[8] vssa1 0.41fF
-C136 io_out[8] vssa1 -0.20fF
-C137 io_oeb[8] vssa1 0.41fF
-C138 io_oeb[18] vssa1 0.61fF
-C139 io_out[18] vssa1 0.61fF
-C140 io_in_3v3[18] vssa1 0.61fF
-C141 gpio_noesd[11] vssa1 0.61fF
-C142 gpio_analog[11] vssa1 0.61fF
-C143 gpio_analog[2] vssa1 0.41fF
-C144 gpio_noesd[2] vssa1 0.41fF
-C145 io_in_3v3[9] vssa1 0.41fF
-C146 io_in[9] vssa1 0.41fF
-C147 io_out[9] vssa1 0.41fF
-C148 io_oeb[9] vssa1 0.41fF
-C149 io_oeb[17] vssa1 0.61fF
-C150 io_in[17] vssa1 0.61fF
-C151 io_in_3v3[17] vssa1 0.61fF
-C152 gpio_noesd[10] vssa1 0.61fF
-C153 gpio_analog[10] vssa1 0.61fF
-C154 gpio_analog[3] vssa1 0.41fF
-C155 gpio_noesd[3] vssa1 0.41fF
-C156 io_in_3v3[10] vssa1 0.41fF
-C157 io_in[10] vssa1 0.41fF
-C158 io_out[10] vssa1 0.41fF
-C159 io_oeb[10] vssa1 0.41fF
-C160 io_out[16] vssa1 0.61fF
-C161 io_in[16] vssa1 0.61fF
-C162 io_in_3v3[16] vssa1 0.61fF
-C163 gpio_noesd[9] vssa1 0.61fF
-C164 gpio_analog[9] vssa1 0.61fF
-C165 gpio_analog[4] vssa1 0.41fF
-C166 gpio_noesd[4] vssa1 0.41fF
-C167 io_in_3v3[11] vssa1 0.41fF
-C168 io_in[11] vssa1 0.41fF
-C169 io_out[11] vssa1 0.41fF
-C170 io_oeb[11] vssa1 0.41fF
-C171 io_oeb[15] vssa1 0.61fF
-C172 io_out[15] vssa1 0.61fF
-C173 io_in[15] vssa1 0.61fF
-C174 io_in_3v3[15] vssa1 0.61fF
-C175 gpio_analog[5] vssa1 0.41fF
-C176 gpio_noesd[5] vssa1 0.41fF
-C177 io_in_3v3[12] vssa1 0.41fF
-C178 io_in[12] vssa1 0.41fF
-C179 io_out[12] vssa1 0.41fF
-C180 io_oeb[12] vssa1 0.41fF
-C181 gpio_analog[6] vssa1 0.60fF
-C182 gpio_noesd[6] vssa1 0.60fF
-C183 io_in_3v3[13] vssa1 0.60fF
-C184 io_in[13] vssa1 0.60fF
-C185 io_out[13] vssa1 0.60fF
-C186 io_oeb[13] vssa1 0.60fF
-C187 vccd1 vssa1 0.85fF
-C188 gpio_analog[8] vssa1 0.61fF
-C189 io_oeb[14] vssa1 0.61fF
-C190 io_out[14] vssa1 0.61fF
-C191 io_in[14] vssa1 0.61fF
-C192 io_in_3v3[14] vssa1 0.61fF
-C193 vssa2 vssa1 1.66fF
-C194 io_analog[0] vssa1 -6.01fF
-C195 io_analog[1] vssa1 0.76fF
-C196 vccd2 vssa1 0.91fF
-C197 io_analog[2] vssa1 -5.85fF
-C198 io_analog[3] vssa1 -5.74fF
-C199 io_analog[4] vssa1 -5.03fF
-C200 io_clamp_high[0] vssa1 -2.60fF
-C201 io_clamp_low[0] vssa1 0.82fF
-C202 io_analog[6] vssa1 -4.92fF
-C203 io_clamp_high[2] vssa1 0.66fF
-C204 io_clamp_low[2] vssa1 0.50fF
-C205 io_analog[7] vssa1 0.66fF
-C206 user_irq[2] vssa1 0.63fF
-C207 user_irq[1] vssa1 0.63fF
-C208 user_irq[0] vssa1 0.63fF
-C209 user_clock2 vssa1 0.63fF
-C210 la_oenb[127] vssa1 0.63fF
-C211 la_data_in[127] vssa1 0.63fF
-C212 la_oenb[126] vssa1 0.63fF
-C213 la_data_out[126] vssa1 0.63fF
-C214 la_data_in[126] vssa1 0.63fF
-C215 la_oenb[125] vssa1 0.63fF
-C216 la_data_out[125] vssa1 0.63fF
-C217 la_data_in[125] vssa1 0.63fF
-C218 la_oenb[124] vssa1 0.63fF
-C219 la_data_out[124] vssa1 0.63fF
-C220 la_data_in[124] vssa1 0.63fF
-C221 la_oenb[123] vssa1 0.63fF
-C222 la_data_out[123] vssa1 0.63fF
-C223 la_oenb[122] vssa1 0.63fF
-C224 la_data_out[122] vssa1 0.63fF
-C225 la_data_in[122] vssa1 0.63fF
-C226 la_oenb[121] vssa1 0.63fF
-C227 la_data_out[121] vssa1 0.63fF
-C228 la_data_in[121] vssa1 0.63fF
-C229 la_oenb[120] vssa1 0.63fF
-C230 la_data_out[120] vssa1 0.63fF
-C231 la_data_in[120] vssa1 0.63fF
-C232 la_oenb[119] vssa1 0.63fF
-C233 la_data_out[119] vssa1 0.63fF
-C234 la_data_in[119] vssa1 0.63fF
-C235 la_oenb[118] vssa1 0.63fF
-C236 la_data_out[118] vssa1 0.63fF
-C237 la_data_in[118] vssa1 0.63fF
-C238 la_oenb[117] vssa1 0.63fF
-C239 la_data_out[117] vssa1 0.63fF
-C240 la_data_in[117] vssa1 0.63fF
-C241 la_data_out[116] vssa1 0.63fF
-C242 la_data_in[116] vssa1 0.63fF
-C243 la_oenb[115] vssa1 0.63fF
-C244 la_data_out[115] vssa1 0.63fF
-C245 la_data_in[115] vssa1 0.63fF
-C246 la_oenb[114] vssa1 0.63fF
-C247 la_data_out[114] vssa1 0.63fF
-C248 la_data_in[114] vssa1 0.63fF
-C249 la_oenb[113] vssa1 0.63fF
-C250 la_data_out[113] vssa1 0.63fF
-C251 la_data_in[113] vssa1 0.63fF
-C252 la_oenb[112] vssa1 0.63fF
-C253 la_data_in[112] vssa1 0.63fF
-C254 la_oenb[111] vssa1 0.63fF
-C255 la_data_out[111] vssa1 0.63fF
-C256 la_data_in[111] vssa1 0.63fF
-C257 la_oenb[110] vssa1 0.63fF
-C258 la_data_out[110] vssa1 0.63fF
-C259 la_data_in[110] vssa1 0.63fF
-C260 la_oenb[109] vssa1 0.63fF
-C261 la_data_out[109] vssa1 0.63fF
-C262 la_data_in[109] vssa1 0.63fF
-C263 la_oenb[108] vssa1 0.63fF
-C264 la_data_out[108] vssa1 0.63fF
-C265 la_oenb[107] vssa1 0.63fF
-C266 la_data_out[107] vssa1 0.63fF
-C267 la_data_in[107] vssa1 0.63fF
-C268 la_oenb[106] vssa1 0.63fF
-C269 la_data_out[106] vssa1 0.63fF
-C270 la_oenb[105] vssa1 0.63fF
-C271 la_data_out[105] vssa1 0.63fF
-C272 la_data_in[105] vssa1 0.63fF
-C273 la_oenb[104] vssa1 0.63fF
-C274 la_data_out[104] vssa1 0.63fF
-C275 la_data_in[104] vssa1 0.63fF
-C276 la_oenb[103] vssa1 0.63fF
-C277 la_data_out[103] vssa1 0.63fF
-C278 la_data_in[103] vssa1 0.63fF
-C279 la_oenb[102] vssa1 0.63fF
-C280 la_data_out[102] vssa1 0.63fF
-C281 la_data_in[102] vssa1 0.63fF
-C282 la_data_out[101] vssa1 0.63fF
-C283 la_data_in[101] vssa1 0.63fF
-C284 la_oenb[100] vssa1 0.63fF
-C285 la_data_out[100] vssa1 0.63fF
-C286 la_data_in[100] vssa1 0.63fF
-C287 la_oenb[99] vssa1 0.63fF
-C288 la_data_out[99] vssa1 0.63fF
-C289 la_data_in[99] vssa1 0.63fF
-C290 la_oenb[98] vssa1 0.63fF
-C291 la_data_out[98] vssa1 0.63fF
-C292 la_data_in[98] vssa1 0.63fF
-C293 la_oenb[97] vssa1 0.63fF
-C294 la_data_in[97] vssa1 0.63fF
-C295 la_oenb[96] vssa1 0.63fF
-C296 la_data_out[96] vssa1 0.63fF
-C297 la_data_in[96] vssa1 0.63fF
-C298 la_oenb[95] vssa1 0.63fF
-C299 la_data_out[95] vssa1 0.63fF
-C300 la_data_in[95] vssa1 0.63fF
-C301 la_oenb[94] vssa1 0.63fF
-C302 la_data_out[94] vssa1 0.63fF
-C303 la_data_in[94] vssa1 0.63fF
-C304 la_oenb[93] vssa1 0.63fF
-C305 la_data_out[93] vssa1 0.63fF
-C306 la_oenb[92] vssa1 0.63fF
-C307 la_data_out[92] vssa1 0.63fF
-C308 la_data_in[92] vssa1 0.63fF
-C309 la_oenb[91] vssa1 0.63fF
-C310 la_data_out[91] vssa1 0.63fF
-C311 la_oenb[90] vssa1 0.63fF
-C312 la_data_out[90] vssa1 0.63fF
-C313 la_data_in[90] vssa1 0.63fF
-C314 la_oenb[89] vssa1 0.63fF
-C315 la_data_out[89] vssa1 0.63fF
-C316 la_data_in[89] vssa1 0.63fF
-C317 la_oenb[88] vssa1 0.63fF
-C318 la_data_out[88] vssa1 0.63fF
-C319 la_data_in[88] vssa1 0.63fF
-C320 la_oenb[87] vssa1 0.63fF
-C321 la_data_out[87] vssa1 0.63fF
-C322 la_data_in[87] vssa1 0.63fF
-C323 la_data_out[86] vssa1 0.63fF
-C324 la_data_in[86] vssa1 0.63fF
-C325 la_oenb[85] vssa1 0.63fF
-C326 la_data_out[85] vssa1 0.63fF
-C327 la_data_in[85] vssa1 0.63fF
-C328 la_oenb[84] vssa1 0.63fF
-C329 la_data_out[84] vssa1 0.63fF
-C330 la_data_in[84] vssa1 0.63fF
-C331 la_oenb[83] vssa1 0.63fF
-C332 la_data_out[83] vssa1 0.63fF
-C333 la_data_in[83] vssa1 0.63fF
-C334 la_oenb[82] vssa1 0.63fF
-C335 la_data_in[82] vssa1 0.63fF
-C336 la_oenb[81] vssa1 0.63fF
-C337 la_data_out[81] vssa1 0.63fF
-C338 la_data_in[81] vssa1 0.63fF
-C339 la_oenb[80] vssa1 0.63fF
-C340 la_data_out[80] vssa1 0.63fF
-C341 la_data_in[80] vssa1 0.63fF
-C342 la_oenb[79] vssa1 0.63fF
-C343 la_data_out[79] vssa1 0.63fF
-C344 la_data_in[79] vssa1 0.63fF
-C345 la_oenb[78] vssa1 0.63fF
-C346 la_data_out[78] vssa1 0.63fF
-C347 la_data_in[78] vssa1 0.63fF
-C348 la_oenb[77] vssa1 0.63fF
-C349 la_data_out[77] vssa1 0.63fF
-C350 la_data_in[77] vssa1 0.63fF
-C351 la_oenb[76] vssa1 0.63fF
-C352 la_data_out[76] vssa1 0.63fF
-C353 la_oenb[75] vssa1 0.63fF
-C354 la_data_out[75] vssa1 0.63fF
-C355 la_data_in[75] vssa1 0.63fF
-C356 la_oenb[74] vssa1 0.63fF
-C357 la_data_out[74] vssa1 0.63fF
-C358 la_data_in[74] vssa1 0.63fF
-C359 la_oenb[73] vssa1 0.63fF
-C360 la_data_out[73] vssa1 0.63fF
-C361 la_data_in[73] vssa1 0.63fF
-C362 la_oenb[72] vssa1 0.63fF
-C363 la_data_out[72] vssa1 0.63fF
-C364 la_data_in[72] vssa1 0.63fF
-C365 la_data_out[71] vssa1 0.63fF
-C366 la_data_in[71] vssa1 0.63fF
-C367 la_oenb[70] vssa1 0.63fF
-C368 la_data_out[70] vssa1 0.63fF
-C369 la_data_in[70] vssa1 0.63fF
-C370 la_oenb[69] vssa1 0.63fF
-C371 la_data_out[69] vssa1 0.63fF
-C372 la_data_in[69] vssa1 0.63fF
-C373 la_oenb[68] vssa1 0.63fF
-C374 la_data_out[68] vssa1 0.63fF
-C375 la_data_in[68] vssa1 0.63fF
-C376 la_oenb[67] vssa1 0.63fF
-C377 la_data_in[67] vssa1 0.63fF
-C378 la_oenb[66] vssa1 0.63fF
-C379 la_data_out[66] vssa1 0.63fF
-C380 la_data_in[66] vssa1 0.63fF
-C381 la_oenb[65] vssa1 0.63fF
-C382 la_data_out[65] vssa1 0.26fF
-C383 la_data_in[65] vssa1 0.63fF
-C384 la_oenb[64] vssa1 0.63fF
-C385 la_data_out[64] vssa1 0.63fF
-C386 la_data_in[64] vssa1 0.63fF
-C387 la_oenb[63] vssa1 0.63fF
-C388 la_data_out[63] vssa1 0.63fF
-C389 la_data_in[63] vssa1 0.63fF
-C390 la_oenb[62] vssa1 0.63fF
-C391 la_data_out[62] vssa1 0.63fF
-C392 la_data_in[62] vssa1 0.63fF
-C393 la_oenb[61] vssa1 0.63fF
-C394 la_data_out[61] vssa1 0.63fF
-C395 la_oenb[60] vssa1 0.63fF
-C396 la_data_out[60] vssa1 0.63fF
-C397 la_data_in[60] vssa1 0.63fF
-C398 la_oenb[59] vssa1 0.63fF
-C399 la_data_out[59] vssa1 0.63fF
-C400 la_data_in[59] vssa1 0.63fF
-C401 la_oenb[58] vssa1 0.63fF
-C402 la_data_out[58] vssa1 0.63fF
-C403 la_data_in[58] vssa1 0.63fF
-C404 la_oenb[57] vssa1 0.63fF
-C405 la_data_out[57] vssa1 0.63fF
-C406 la_data_in[57] vssa1 0.63fF
-C407 la_data_out[56] vssa1 0.63fF
-C408 la_data_in[56] vssa1 0.63fF
-C409 la_oenb[55] vssa1 0.63fF
-C410 la_data_out[55] vssa1 0.63fF
-C411 la_data_in[55] vssa1 0.63fF
-C412 la_oenb[54] vssa1 0.63fF
-C413 la_data_out[54] vssa1 0.63fF
-C414 la_data_in[54] vssa1 0.63fF
-C415 la_oenb[53] vssa1 0.63fF
-C416 la_data_out[53] vssa1 0.63fF
-C417 la_data_in[53] vssa1 0.63fF
-C418 la_oenb[52] vssa1 0.63fF
-C419 la_data_in[52] vssa1 0.63fF
-C420 la_oenb[51] vssa1 0.63fF
-C421 la_data_out[51] vssa1 0.63fF
-C422 la_data_in[51] vssa1 0.63fF
-C423 la_oenb[50] vssa1 0.63fF
-C424 la_data_in[50] vssa1 0.63fF
-C425 la_oenb[49] vssa1 0.63fF
-C426 la_data_out[49] vssa1 0.63fF
-C427 la_data_in[49] vssa1 0.63fF
-C428 la_oenb[48] vssa1 0.63fF
-C429 la_data_out[48] vssa1 0.63fF
-C430 la_data_in[48] vssa1 0.63fF
-C431 la_oenb[47] vssa1 0.63fF
-C432 la_data_out[47] vssa1 0.63fF
-C433 la_data_in[47] vssa1 0.63fF
-C434 la_oenb[46] vssa1 0.63fF
-C435 la_data_out[46] vssa1 0.63fF
-C436 la_oenb[45] vssa1 0.63fF
-C437 la_data_out[45] vssa1 0.63fF
-C438 la_data_in[45] vssa1 0.63fF
-C439 la_oenb[44] vssa1 0.63fF
-C440 la_data_out[44] vssa1 0.63fF
-C441 la_data_in[44] vssa1 0.63fF
-C442 la_oenb[43] vssa1 0.63fF
-C443 la_data_out[43] vssa1 0.63fF
-C444 la_data_in[43] vssa1 0.63fF
-C445 la_oenb[42] vssa1 0.63fF
-C446 la_data_out[42] vssa1 0.63fF
-C447 la_data_in[42] vssa1 0.63fF
-C448 la_data_out[41] vssa1 0.63fF
-C449 la_data_in[41] vssa1 0.63fF
-C450 la_oenb[40] vssa1 0.63fF
-C451 la_data_out[40] vssa1 0.63fF
-C452 la_data_in[40] vssa1 0.63fF
-C453 la_oenb[39] vssa1 0.63fF
-C454 la_data_out[39] vssa1 0.63fF
-C455 la_data_in[39] vssa1 0.63fF
-C456 la_oenb[38] vssa1 0.63fF
-C457 la_data_out[38] vssa1 0.63fF
-C458 la_data_in[38] vssa1 0.63fF
-C459 la_oenb[37] vssa1 0.63fF
-C460 la_data_out[37] vssa1 0.26fF
-C461 la_data_in[37] vssa1 0.63fF
-C462 la_oenb[36] vssa1 0.63fF
-C463 la_data_out[36] vssa1 0.63fF
-C464 la_data_in[36] vssa1 0.63fF
-C465 la_oenb[35] vssa1 0.63fF
-C466 la_data_in[35] vssa1 0.63fF
-C467 la_oenb[34] vssa1 0.63fF
-C468 la_data_out[34] vssa1 0.63fF
-C469 la_data_in[34] vssa1 0.63fF
-C470 la_oenb[33] vssa1 0.63fF
-C471 la_data_out[33] vssa1 0.63fF
-C472 la_data_in[33] vssa1 0.63fF
-C473 la_oenb[32] vssa1 0.63fF
-C474 la_data_out[32] vssa1 0.63fF
-C475 la_data_in[32] vssa1 0.63fF
-C476 la_oenb[31] vssa1 0.63fF
-C477 la_data_out[31] vssa1 0.63fF
-C478 la_oenb[30] vssa1 0.63fF
-C479 la_data_out[30] vssa1 0.63fF
-C480 la_data_in[30] vssa1 0.63fF
-C481 la_oenb[29] vssa1 0.63fF
-C482 la_data_out[29] vssa1 0.63fF
-C483 la_data_in[29] vssa1 0.63fF
-C484 la_oenb[28] vssa1 0.63fF
-C485 la_data_out[28] vssa1 0.63fF
-C486 la_data_in[28] vssa1 0.63fF
-C487 la_oenb[27] vssa1 0.63fF
-C488 la_data_out[27] vssa1 0.63fF
-C489 la_data_in[27] vssa1 0.63fF
-C490 la_data_out[26] vssa1 0.63fF
-C491 la_data_in[26] vssa1 0.63fF
-C492 la_oenb[25] vssa1 0.63fF
-C493 la_data_out[25] vssa1 0.63fF
-C494 la_data_in[25] vssa1 0.63fF
-C495 la_oenb[24] vssa1 0.63fF
-C496 la_data_out[24] vssa1 0.63fF
-C497 la_data_in[24] vssa1 0.63fF
-C498 la_oenb[23] vssa1 0.63fF
-C499 la_data_out[23] vssa1 0.63fF
-C500 la_data_in[23] vssa1 0.63fF
-C501 la_oenb[22] vssa1 0.63fF
-C502 la_data_out[22] vssa1 0.63fF
-C503 la_data_in[22] vssa1 0.63fF
-C504 la_oenb[21] vssa1 0.63fF
-C505 la_data_out[21] vssa1 0.63fF
-C506 la_data_in[21] vssa1 0.63fF
-C507 la_oenb[20] vssa1 0.63fF
-C508 la_data_in[20] vssa1 0.63fF
-C509 la_oenb[19] vssa1 0.63fF
-C510 la_data_out[19] vssa1 0.63fF
-C511 la_data_in[19] vssa1 0.63fF
-C512 la_oenb[18] vssa1 0.63fF
-C513 la_data_out[18] vssa1 0.63fF
-C514 la_data_in[18] vssa1 0.63fF
-C515 la_oenb[17] vssa1 0.63fF
-C516 la_data_out[17] vssa1 0.63fF
-C517 la_data_in[17] vssa1 0.63fF
-C518 la_oenb[16] vssa1 0.63fF
-C519 la_data_out[16] vssa1 0.63fF
-C520 la_oenb[15] vssa1 0.63fF
-C521 la_data_out[15] vssa1 0.63fF
-C522 la_data_in[15] vssa1 0.63fF
-C523 la_oenb[14] vssa1 0.63fF
-C524 la_data_out[14] vssa1 0.63fF
-C525 la_data_in[14] vssa1 0.63fF
-C526 la_oenb[13] vssa1 0.63fF
-C527 la_data_out[13] vssa1 0.63fF
-C528 la_data_in[13] vssa1 0.63fF
-C529 la_oenb[12] vssa1 0.63fF
-C530 la_data_out[12] vssa1 0.63fF
-C531 la_data_in[12] vssa1 0.63fF
-C532 la_data_out[11] vssa1 0.63fF
-C533 la_data_in[11] vssa1 0.63fF
-C534 la_oenb[10] vssa1 0.63fF
-C535 la_data_out[10] vssa1 0.63fF
-C536 la_data_in[10] vssa1 0.63fF
-C537 la_data_out[9] vssa1 0.63fF
-C538 la_data_in[9] vssa1 0.63fF
-C539 la_oenb[8] vssa1 0.63fF
-C540 la_data_out[8] vssa1 0.63fF
-C541 la_data_in[8] vssa1 0.63fF
-C542 la_oenb[7] vssa1 0.63fF
-C543 la_data_out[7] vssa1 0.63fF
-C544 la_data_in[7] vssa1 0.63fF
-C545 la_oenb[6] vssa1 0.63fF
-C546 la_data_out[6] vssa1 0.63fF
-C547 la_data_in[6] vssa1 0.63fF
-C548 la_oenb[5] vssa1 0.63fF
-C549 la_data_in[5] vssa1 0.63fF
-C550 la_oenb[4] vssa1 0.63fF
-C551 la_data_out[4] vssa1 0.63fF
-C552 la_data_in[4] vssa1 0.63fF
-C553 la_oenb[3] vssa1 0.63fF
-C554 la_data_out[3] vssa1 0.63fF
-C555 la_data_in[3] vssa1 0.63fF
-C556 la_oenb[2] vssa1 0.63fF
-C557 la_data_out[2] vssa1 0.63fF
-C558 la_data_in[2] vssa1 0.63fF
-C559 la_oenb[1] vssa1 0.63fF
-C560 la_data_out[1] vssa1 0.63fF
-C561 la_oenb[0] vssa1 0.63fF
-C562 la_data_out[0] vssa1 0.63fF
-C563 la_data_in[0] vssa1 0.63fF
-C564 wbs_dat_o[31] vssa1 0.63fF
-C565 wbs_dat_i[31] vssa1 0.63fF
-C566 wbs_adr_i[31] vssa1 0.63fF
-C567 wbs_dat_o[30] vssa1 0.63fF
-C568 wbs_dat_i[30] vssa1 0.63fF
-C569 wbs_adr_i[30] vssa1 0.63fF
-C570 wbs_dat_o[29] vssa1 0.63fF
-C571 wbs_dat_i[29] vssa1 0.63fF
-C572 wbs_adr_i[29] vssa1 0.63fF
-C573 wbs_dat_i[28] vssa1 0.63fF
-C574 wbs_adr_i[28] vssa1 0.63fF
-C575 wbs_dat_o[27] vssa1 0.63fF
-C576 wbs_dat_i[27] vssa1 0.63fF
-C577 wbs_adr_i[27] vssa1 0.63fF
-C578 wbs_dat_i[26] vssa1 0.63fF
-C579 wbs_adr_i[26] vssa1 0.63fF
-C580 wbs_dat_o[25] vssa1 0.63fF
-C581 wbs_dat_i[25] vssa1 0.63fF
-C582 wbs_adr_i[25] vssa1 0.63fF
-C583 wbs_dat_o[24] vssa1 0.63fF
-C584 wbs_dat_i[24] vssa1 0.63fF
-C585 wbs_adr_i[24] vssa1 0.63fF
-C586 wbs_dat_o[23] vssa1 0.63fF
-C587 wbs_dat_i[23] vssa1 0.63fF
-C588 wbs_adr_i[23] vssa1 0.63fF
-C589 wbs_dat_o[22] vssa1 0.63fF
-C590 wbs_adr_i[22] vssa1 0.63fF
-C591 wbs_dat_o[21] vssa1 0.63fF
-C592 wbs_dat_i[21] vssa1 0.63fF
-C593 wbs_adr_i[21] vssa1 0.63fF
-C594 wbs_dat_o[20] vssa1 0.63fF
-C595 wbs_dat_i[20] vssa1 0.63fF
-C596 wbs_adr_i[20] vssa1 0.63fF
-C597 wbs_dat_o[19] vssa1 0.63fF
-C598 wbs_dat_i[19] vssa1 0.63fF
-C599 wbs_adr_i[19] vssa1 0.63fF
-C600 wbs_dat_o[18] vssa1 0.63fF
-C601 wbs_dat_i[18] vssa1 0.63fF
-C602 wbs_dat_o[17] vssa1 0.63fF
-C603 wbs_dat_i[17] vssa1 0.63fF
-C604 wbs_adr_i[17] vssa1 0.63fF
-C605 wbs_dat_o[16] vssa1 0.63fF
-C606 wbs_dat_i[16] vssa1 0.63fF
-C607 wbs_adr_i[16] vssa1 0.63fF
-C608 wbs_dat_o[15] vssa1 0.63fF
-C609 wbs_dat_i[15] vssa1 0.63fF
-C610 wbs_adr_i[15] vssa1 0.63fF
-C611 wbs_dat_o[14] vssa1 0.63fF
-C612 wbs_dat_i[14] vssa1 0.63fF
-C613 wbs_adr_i[14] vssa1 0.63fF
-C614 wbs_dat_o[13] vssa1 0.63fF
-C615 wbs_dat_i[13] vssa1 0.63fF
-C616 wbs_adr_i[13] vssa1 0.63fF
-C617 wbs_dat_o[12] vssa1 0.63fF
-C618 wbs_dat_i[12] vssa1 0.63fF
-C619 wbs_adr_i[12] vssa1 0.63fF
-C620 wbs_dat_i[11] vssa1 0.63fF
-C621 wbs_adr_i[11] vssa1 0.63fF
-C622 wbs_dat_o[10] vssa1 0.63fF
-C623 wbs_dat_i[10] vssa1 0.63fF
-C624 wbs_adr_i[10] vssa1 0.63fF
-C625 wbs_dat_o[9] vssa1 0.63fF
-C626 wbs_dat_i[9] vssa1 0.63fF
-C627 wbs_adr_i[9] vssa1 0.63fF
-C628 wbs_dat_o[8] vssa1 0.63fF
-C629 wbs_dat_i[8] vssa1 0.63fF
-C630 wbs_adr_i[8] vssa1 0.63fF
-C631 wbs_dat_o[7] vssa1 0.63fF
-C632 wbs_adr_i[7] vssa1 0.63fF
-C633 wbs_dat_o[6] vssa1 0.63fF
-C634 wbs_dat_i[6] vssa1 0.63fF
-C635 wbs_adr_i[6] vssa1 0.63fF
-C636 wbs_dat_o[5] vssa1 0.63fF
-C637 wbs_dat_i[5] vssa1 0.63fF
-C638 wbs_adr_i[5] vssa1 0.63fF
-C639 wbs_dat_o[4] vssa1 0.63fF
-C640 wbs_dat_i[4] vssa1 0.63fF
-C641 wbs_adr_i[4] vssa1 0.63fF
-C642 wbs_sel_i[3] vssa1 0.63fF
-C643 wbs_dat_o[3] vssa1 0.63fF
-C644 wbs_adr_i[3] vssa1 0.63fF
-C645 wbs_sel_i[2] vssa1 0.63fF
-C646 wbs_dat_o[2] vssa1 0.63fF
-C647 wbs_dat_i[2] vssa1 0.63fF
-C648 wbs_adr_i[2] vssa1 0.63fF
-C649 wbs_dat_o[1] vssa1 0.63fF
-C650 wbs_dat_i[1] vssa1 0.63fF
-C651 wbs_adr_i[1] vssa1 0.63fF
-C652 wbs_sel_i[0] vssa1 0.63fF
-C653 wbs_dat_o[0] vssa1 0.63fF
-C654 wbs_dat_i[0] vssa1 0.63fF
-C655 wbs_adr_i[0] vssa1 0.63fF
-C656 wbs_we_i vssa1 0.63fF
-C657 wbs_stb_i vssa1 0.63fF
-C658 wbs_cyc_i vssa1 0.63fF
-C659 wbs_ack_o vssa1 0.63fF
-C660 wb_rst_i vssa1 0.63fF
-C661 m3_226242_702300# vssa1 -1.31fF $ **FLOATING
-C662 m3_222594_702300# vssa1 0.55fF $ **FLOATING
-C663 top_pll_v2_0/PFD_0/and_pfd_0/a_656_410# vssa1 0.96fF
-C664 top_pll_v2_0/PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_63_n45# vssa1 0.05fF
-C665 top_pll_v2_0/PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_n129_n45# vssa1 0.05fF
-C666 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C667 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_2/B vssa1 1.40fF
-C668 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C669 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_3/A vssa1 3.14fF
-C670 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C671 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C672 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_2/A vssa1 2.55fF
-C673 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C674 top_pll_v2_0/QB vssa1 4.35fF
-C675 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C676 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C677 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C678 top_pll_v2_0/out_div_by_5 vssa1 -0.40fF
-C679 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C680 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_2/B vssa1 1.40fF
-C681 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C682 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_3/A vssa1 3.14fF
-C683 top_pll_v2_0/pfd_reset vssa1 2.17fF
-C684 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C685 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C686 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_2/A vssa1 2.55fF
-C687 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C688 top_pll_v2_0/QA vssa1 4.22fF
-C689 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C690 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C691 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C692 top_pll_v2_0/pfd_cp_interface_0/inverter_cp_x1_2/in vssa1 1.85fF
-C693 top_pll_v2_0/pfd_cp_interface_0/inverter_cp_x1_0/out vssa1 1.77fF
-C694 top_pll_v2_0/nUp vssa1 5.39fF
-C695 top_pll_v2_0/Up vssa1 1.85fF
-C696 top_pll_v2_0/Down vssa1 6.19fF
-C697 top_pll_v2_0/nDown vssa1 -3.53fF
-C698 top_pll_v2_0/div_by_5_0/sky130_fd_sc_hs__or2_1_0/a_63_368# vssa1 0.37fF
-C699 top_pll_v2_0/div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_56_136# vssa1 0.38fF
-C700 top_pll_v2_0/div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# vssa1 0.38fF
-C701 top_pll_v2_0/div_by_5_0/DFlipFlop_3/nQ vssa1 0.48fF
-C702 top_pll_v2_0/div_5_Q1_shift vssa1 -0.14fF
-C703 top_pll_v2_0/div_by_5_0/DFlipFlop_3/latch_diff_1/m1_657_280# vssa1 0.57fF
-C704 top_pll_v2_0/div_by_5_0/DFlipFlop_3/latch_diff_1/nD vssa1 0.57fF
-C705 top_pll_v2_0/div_by_5_0/DFlipFlop_3/latch_diff_1/D vssa1 -1.73fF
-C706 top_pll_v2_0/div_by_5_0/DFlipFlop_3/latch_diff_0/m1_657_280# vssa1 0.57fF
-C707 top_pll_v2_0/div_by_5_0/DFlipFlop_3/latch_diff_0/D vssa1 0.96fF
-C708 top_pll_v2_0/div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
-C709 top_pll_v2_0/div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
-C710 top_pll_v2_0/div_by_5_0/DFlipFlop_3/latch_diff_0/nD vssa1 1.14fF
-C711 top_pll_v2_0/div_by_5_0/DFlipFlop_2/nQ vssa1 0.48fF
-C712 top_pll_v2_0/div_5_Q1 vssa1 4.25fF
-C713 top_pll_v2_0/div_by_5_0/DFlipFlop_2/latch_diff_1/m1_657_280# vssa1 0.57fF
-C714 top_pll_v2_0/div_by_5_0/DFlipFlop_2/latch_diff_1/nD vssa1 0.57fF
-C715 top_pll_v2_0/div_by_5_0/DFlipFlop_2/latch_diff_1/D vssa1 -1.73fF
-C716 top_pll_v2_0/div_by_5_0/DFlipFlop_2/latch_diff_0/m1_657_280# vssa1 0.57fF
-C717 top_pll_v2_0/div_by_5_0/DFlipFlop_2/latch_diff_0/D vssa1 0.96fF
-C718 top_pll_v2_0/div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
-C719 top_pll_v2_0/div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
-C720 top_pll_v2_0/div_by_5_0/DFlipFlop_2/D vssa1 3.13fF
-C721 top_pll_v2_0/div_by_5_0/DFlipFlop_2/latch_diff_0/nD vssa1 1.14fF
-C722 top_pll_v2_0/div_5_nQ0 vssa1 0.59fF
-C723 top_pll_v2_0/div_5_Q0 vssa1 0.01fF
-C724 top_pll_v2_0/div_by_5_0/DFlipFlop_1/latch_diff_1/m1_657_280# vssa1 0.57fF
-C725 top_pll_v2_0/div_by_5_0/DFlipFlop_1/latch_diff_1/nD vssa1 0.57fF
-C726 top_pll_v2_0/div_by_5_0/DFlipFlop_1/latch_diff_1/D vssa1 -1.73fF
-C727 top_pll_v2_0/div_by_5_0/DFlipFlop_1/latch_diff_0/m1_657_280# vssa1 0.57fF
-C728 top_pll_v2_0/div_by_5_0/DFlipFlop_1/latch_diff_0/D vssa1 0.96fF
-C729 top_pll_v2_0/div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
-C730 top_pll_v2_0/div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
-C731 top_pll_v2_0/div_by_5_0/DFlipFlop_1/D vssa1 3.64fF
-C732 top_pll_v2_0/div_by_5_0/DFlipFlop_1/latch_diff_0/nD vssa1 1.14fF
-C733 top_pll_v2_0/div_5_nQ2 vssa1 1.24fF
-C734 top_pll_v2_0/div_by_5_0/DFlipFlop_0/Q vssa1 -0.94fF
-C735 top_pll_v2_0/div_by_5_0/DFlipFlop_0/latch_diff_1/m1_657_280# vssa1 0.57fF
-C736 top_pll_v2_0/n_out_by_2 vssa1 -2.75fF
-C737 top_pll_v2_0/div_by_5_0/DFlipFlop_0/latch_diff_1/nD vssa1 0.57fF
-C738 top_pll_v2_0/div_by_5_0/DFlipFlop_0/latch_diff_1/D vssa1 -1.73fF
-C739 top_pll_v2_0/div_by_5_0/DFlipFlop_0/latch_diff_0/m1_657_280# vssa1 0.57fF
-C740 top_pll_v2_0/out_by_2 vssa1 -5.01fF
-C741 top_pll_v2_0/div_by_5_0/DFlipFlop_0/latch_diff_0/D vssa1 0.96fF
-C742 top_pll_v2_0/div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
-C743 top_pll_v2_0/div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
-C744 top_pll_v2_0/div_by_5_0/DFlipFlop_0/D vssa1 3.96fF
-C745 top_pll_v2_0/div_by_5_0/DFlipFlop_0/latch_diff_0/nD vssa1 1.14fF
-C746 top_pll_v2_0/div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_355_368# vssa1 0.08fF
-C747 top_pll_v2_0/div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_194_125# vssa1 0.40fF
-C748 top_pll_v2_0/out_to_buffer vssa1 1.54fF
-C749 top_pll_v2_0/out_to_div vssa1 4.23fF
-C750 top_pll_v2_0/out_first_buffer vssa1 2.88fF
-C751 top_pll_v2_0/ring_osc_0/csvco_branch_2/in vssa1 1.60fF
-C752 top_pll_v2_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd vssa1 0.16fF
-C753 top_pll_v2_0/ring_osc_0/csvco_branch_1/cap_vco_0/t vssa1 7.10fF
-C754 top_pll_v2_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vss vssa1 0.52fF
-C755 top_pll_v2_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd vssa1 0.16fF
-C756 top_pll_v2_0/ring_osc_0/csvco_branch_2/cap_vco_0/t vssa1 7.10fF
-C757 top_pll_v2_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vss vssa1 0.52fF
-C758 top_pll_v2_0/ring_osc_0/csvco_branch_1/in vssa1 1.58fF
-C759 top_pll_v2_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd vssa1 0.16fF
-C760 top_pll_v2_0/vco_out vssa1 1.01fF
-C761 top_pll_v2_0/ring_osc_0/csvco_branch_0/cap_vco_0/t vssa1 7.10fF
-C762 top_pll_v2_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vss vssa1 0.52fF
-C763 top_pll_v2_0/ring_osc_0/csvco_branch_2/vbp vssa1 0.36fF
-C764 io_analog[8] vssa1 7.79fF
-C765 top_pll_v2_0/buffer_salida_0/a_3996_n100# vssa1 48.23fF
-C766 top_pll_v2_0/buffer_salida_0/a_678_n100# vssa1 13.21fF
-C767 top_pll_v2_0/n_out_buffer_div_2 vssa1 1.63fF
-C768 top_pll_v2_0/out_buffer_div_2 vssa1 1.60fF
-C769 top_pll_v2_0/div_by_2_0/DFlipFlop_0/CLK vssa1 0.31fF
-C770 top_pll_v2_0/div_by_2_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
-C771 top_pll_v2_0/div_by_2_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
-C772 top_pll_v2_0/div_by_2_0/DFlipFlop_0/nCLK vssa1 1.03fF
-C773 top_pll_v2_0/out_div_2 vssa1 -1.30fF
-C774 top_pll_v2_0/div_by_2_0/DFlipFlop_0/latch_diff_1/m1_657_280# vssa1 0.57fF
-C775 top_pll_v2_0/div_by_2_0/DFlipFlop_0/latch_diff_1/nD vssa1 0.57fF
-C776 top_pll_v2_0/div_by_2_0/DFlipFlop_0/latch_diff_1/D vssa1 -1.73fF
-C777 top_pll_v2_0/div_by_2_0/DFlipFlop_0/latch_diff_0/m1_657_280# vssa1 0.57fF
-C778 top_pll_v2_0/div_by_2_0/DFlipFlop_0/latch_diff_0/D vssa1 0.96fF
-C779 top_pll_v2_0/div_by_2_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
-C780 top_pll_v2_0/div_by_2_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
-C781 top_pll_v2_0/n_out_div_2 vssa1 1.95fF
-C782 top_pll_v2_0/div_by_2_0/DFlipFlop_0/latch_diff_0/nD vssa1 1.14fF
-C783 top_pll_v2_0/lf_vc vssa1 -59.89fF
-C784 top_pll_v2_0/loop_filter_v2_0/res_loop_filter_2/out vssa1 7.90fF
-C785 gpio_noesd[8] vssa1 66.95fF
-C786 top_pll_v2_0/loop_filter_v2_0/cap3_loop_filter_0/in vssa1 -12.03fF
-C787 top_pll_v2_0/nswitch vssa1 3.73fF
-C788 top_pll_v2_0/biasp vssa1 5.44fF
-C789 bias_0/iref_1 vssa1 -95.39fF
-C790 top_pll_v2_0/vco_vctrl vssa1 -20.08fF
-C791 top_pll_v2_0/pswitch vssa1 3.57fF
-C792 bias_0/iref_4 vssa1 1.17fF
-C793 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_4/a_n1731_n1219# vssa1 2.60fF
-C794 bias_0/iref_3 vssa1 0.64fF
-C795 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_3/a_n1731_n1219# vssa1 2.60fF
-C796 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_2/a_n1731_n1219# vssa1 2.60fF
-C797 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_1/a_n1731_n1219# vssa1 2.60fF
-C798 bias_0/iref_0 vssa1 1.88fF
-C799 io_analog[5] vssa1 33.29fF
-C800 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_0/a_n1731_n1219# vssa1 2.60fF
-C801 bias_0/m1_20168_984# vssa1 56.92fF
-C802 bias_0/iref_9 vssa1 -1.13fF
-C803 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_10/a_n1731_n1219# vssa1 2.60fF
-C804 bias_0/iref_7 vssa1 -1.38fF
-C805 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_8/a_n1731_n1219# vssa1 2.60fF
-C806 bias_0/iref_8 vssa1 -1.19fF
-C807 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_9/a_n1731_n1219# vssa1 2.60fF
-C808 bias_0/iref_6 vssa1 -1.00fF
-C809 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_7/a_n1731_n1219# vssa1 2.60fF
-C810 bias_0/iref_5 vssa1 1.40fF
-C811 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_6/a_n1731_n1219# vssa1 2.60fF
-C812 top_pll_v1_0/PFD_0/and_pfd_0/a_656_410# vssa1 0.96fF
-C813 top_pll_v1_0/PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_63_n45# vssa1 0.05fF
-C814 top_pll_v1_0/PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_n129_n45# vssa1 0.05fF
-C815 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C816 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_2/B vssa1 1.40fF
-C817 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C818 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_3/A vssa1 3.14fF
-C819 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C820 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C821 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_2/A vssa1 2.55fF
-C822 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C823 top_pll_v1_0/QB vssa1 4.35fF
-C824 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C825 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C826 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C827 top_pll_v1_0/out_div_by_5 vssa1 -0.40fF
-C828 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C829 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_2/B vssa1 1.40fF
-C830 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C831 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_3/A vssa1 3.14fF
-C832 top_pll_v1_0/pfd_reset vssa1 2.17fF
-C833 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C834 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C835 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_2/A vssa1 2.55fF
-C836 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C837 top_pll_v1_0/QA vssa1 4.22fF
-C838 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C839 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C840 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C841 io_analog[10] vssa1 293.41fF
-C842 top_pll_v1_0/pfd_cp_interface_0/inverter_cp_x1_2/in vssa1 1.85fF
-C843 top_pll_v1_0/pfd_cp_interface_0/inverter_cp_x1_0/out vssa1 1.77fF
-C844 top_pll_v1_0/nUp vssa1 5.39fF
-C845 top_pll_v1_0/Up vssa1 1.85fF
-C846 top_pll_v1_0/Down vssa1 6.19fF
-C847 top_pll_v1_0/nDown vssa1 -3.53fF
-C848 top_pll_v1_0/div_by_5_0/sky130_fd_sc_hs__or2_1_0/a_63_368# vssa1 0.37fF
-C849 top_pll_v1_0/div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_56_136# vssa1 0.38fF
-C850 top_pll_v1_0/div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# vssa1 0.38fF
-C851 top_pll_v1_0/div_by_5_0/DFlipFlop_3/nQ vssa1 0.48fF
-C852 top_pll_v1_0/div_5_Q1_shift vssa1 -0.14fF
-C853 top_pll_v1_0/div_by_5_0/DFlipFlop_3/latch_diff_1/m1_657_280# vssa1 0.57fF
-C854 top_pll_v1_0/div_by_5_0/DFlipFlop_3/latch_diff_1/nD vssa1 0.57fF
-C855 top_pll_v1_0/div_by_5_0/DFlipFlop_3/latch_diff_1/D vssa1 -1.73fF
-C856 top_pll_v1_0/div_by_5_0/DFlipFlop_3/latch_diff_0/m1_657_280# vssa1 0.57fF
-C857 top_pll_v1_0/div_by_5_0/DFlipFlop_3/latch_diff_0/D vssa1 0.96fF
-C858 top_pll_v1_0/div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
-C859 top_pll_v1_0/div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
-C860 top_pll_v1_0/div_by_5_0/DFlipFlop_3/latch_diff_0/nD vssa1 1.14fF
-C861 top_pll_v1_0/div_by_5_0/DFlipFlop_2/nQ vssa1 0.48fF
-C862 top_pll_v1_0/div_5_Q1 vssa1 4.25fF
-C863 top_pll_v1_0/div_by_5_0/DFlipFlop_2/latch_diff_1/m1_657_280# vssa1 0.57fF
-C864 top_pll_v1_0/div_by_5_0/DFlipFlop_2/latch_diff_1/nD vssa1 0.57fF
-C865 top_pll_v1_0/div_by_5_0/DFlipFlop_2/latch_diff_1/D vssa1 -1.73fF
-C866 top_pll_v1_0/div_by_5_0/DFlipFlop_2/latch_diff_0/m1_657_280# vssa1 0.57fF
-C867 top_pll_v1_0/div_by_5_0/DFlipFlop_2/latch_diff_0/D vssa1 0.96fF
-C868 top_pll_v1_0/div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
-C869 top_pll_v1_0/div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
-C870 top_pll_v1_0/div_by_5_0/DFlipFlop_2/D vssa1 3.13fF
-C871 top_pll_v1_0/div_by_5_0/DFlipFlop_2/latch_diff_0/nD vssa1 1.14fF
-C872 top_pll_v1_0/div_5_nQ0 vssa1 0.59fF
-C873 top_pll_v1_0/div_5_Q0 vssa1 0.01fF
-C874 top_pll_v1_0/div_by_5_0/DFlipFlop_1/latch_diff_1/m1_657_280# vssa1 0.57fF
-C875 top_pll_v1_0/div_by_5_0/DFlipFlop_1/latch_diff_1/nD vssa1 0.57fF
-C876 top_pll_v1_0/div_by_5_0/DFlipFlop_1/latch_diff_1/D vssa1 -1.73fF
-C877 top_pll_v1_0/div_by_5_0/DFlipFlop_1/latch_diff_0/m1_657_280# vssa1 0.57fF
-C878 top_pll_v1_0/div_by_5_0/DFlipFlop_1/latch_diff_0/D vssa1 0.96fF
-C879 top_pll_v1_0/div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
-C880 top_pll_v1_0/div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
-C881 top_pll_v1_0/div_by_5_0/DFlipFlop_1/D vssa1 3.64fF
-C882 top_pll_v1_0/div_by_5_0/DFlipFlop_1/latch_diff_0/nD vssa1 1.14fF
-C883 top_pll_v1_0/div_5_nQ2 vssa1 1.24fF
-C884 top_pll_v1_0/div_by_5_0/DFlipFlop_0/Q vssa1 -0.94fF
-C885 top_pll_v1_0/div_by_5_0/DFlipFlop_0/latch_diff_1/m1_657_280# vssa1 0.57fF
-C886 top_pll_v1_0/n_out_by_2 vssa1 -2.75fF
-C887 top_pll_v1_0/div_by_5_0/DFlipFlop_0/latch_diff_1/nD vssa1 0.57fF
-C888 top_pll_v1_0/div_by_5_0/DFlipFlop_0/latch_diff_1/D vssa1 -1.73fF
-C889 top_pll_v1_0/div_by_5_0/DFlipFlop_0/latch_diff_0/m1_657_280# vssa1 0.57fF
-C890 top_pll_v1_0/out_by_2 vssa1 -5.01fF
-C891 top_pll_v1_0/div_by_5_0/DFlipFlop_0/latch_diff_0/D vssa1 0.96fF
-C892 top_pll_v1_0/div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
-C893 top_pll_v1_0/div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
-C894 top_pll_v1_0/div_by_5_0/DFlipFlop_0/D vssa1 3.96fF
-C895 top_pll_v1_0/div_by_5_0/DFlipFlop_0/latch_diff_0/nD vssa1 1.14fF
-C896 vdda1 vssa1 6982.37fF
-C897 top_pll_v1_0/div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_355_368# vssa1 0.08fF
-C898 top_pll_v1_0/div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_194_125# vssa1 0.40fF
-C899 top_pll_v1_0/out_to_buffer vssa1 1.54fF
-C900 top_pll_v1_0/out_to_div vssa1 4.23fF
-C901 top_pll_v1_0/out_first_buffer vssa1 2.88fF
-C902 top_pll_v1_0/ring_osc_0/csvco_branch_2/in vssa1 1.60fF
-C903 top_pll_v1_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd vssa1 0.16fF
-C904 top_pll_v1_0/ring_osc_0/csvco_branch_1/cap_vco_0/t vssa1 7.10fF
-C905 top_pll_v1_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vss vssa1 0.52fF
-C906 top_pll_v1_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd vssa1 0.16fF
-C907 top_pll_v1_0/ring_osc_0/csvco_branch_2/cap_vco_0/t vssa1 7.10fF
-C908 top_pll_v1_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vss vssa1 0.52fF
-C909 top_pll_v1_0/ring_osc_0/csvco_branch_1/in vssa1 1.58fF
-C910 top_pll_v1_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd vssa1 0.16fF
-C911 top_pll_v1_0/vco_out vssa1 1.01fF
-C912 gpio_noesd[7] vssa1 44.01fF
-C913 top_pll_v1_0/ring_osc_0/csvco_branch_0/cap_vco_0/t vssa1 7.10fF
-C914 top_pll_v1_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vss vssa1 0.52fF
-C915 top_pll_v1_0/ring_osc_0/csvco_branch_2/vbp vssa1 0.36fF
-C916 io_analog[9] vssa1 7.89fF
-C917 top_pll_v1_0/buffer_salida_0/a_3996_n100# vssa1 48.23fF
-C918 top_pll_v1_0/buffer_salida_0/a_678_n100# vssa1 13.21fF
-C919 top_pll_v1_0/n_out_buffer_div_2 vssa1 1.63fF
-C920 top_pll_v1_0/out_buffer_div_2 vssa1 1.60fF
-C921 top_pll_v1_0/div_by_2_0/DFlipFlop_0/CLK vssa1 0.31fF
-C922 top_pll_v1_0/div_by_2_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
-C923 top_pll_v1_0/div_by_2_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
-C924 top_pll_v1_0/div_by_2_0/DFlipFlop_0/nCLK vssa1 1.03fF
-C925 top_pll_v1_0/out_div_2 vssa1 -1.30fF
-C926 top_pll_v1_0/div_by_2_0/DFlipFlop_0/latch_diff_1/m1_657_280# vssa1 0.57fF
-C927 top_pll_v1_0/div_by_2_0/DFlipFlop_0/latch_diff_1/nD vssa1 0.57fF
-C928 top_pll_v1_0/div_by_2_0/DFlipFlop_0/latch_diff_1/D vssa1 -1.73fF
-C929 top_pll_v1_0/div_by_2_0/DFlipFlop_0/latch_diff_0/m1_657_280# vssa1 0.57fF
-C930 top_pll_v1_0/div_by_2_0/DFlipFlop_0/latch_diff_0/D vssa1 0.96fF
-C931 top_pll_v1_0/div_by_2_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
-C932 top_pll_v1_0/div_by_2_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
-C933 top_pll_v1_0/n_out_div_2 vssa1 1.95fF
-C934 top_pll_v1_0/div_by_2_0/DFlipFlop_0/latch_diff_0/nD vssa1 1.14fF
-C935 top_pll_v1_0/nswitch vssa1 3.73fF
-C936 top_pll_v1_0/biasp vssa1 5.44fF
-C937 bias_0/iref_2 vssa1 -188.47fF
-C938 top_pll_v1_0/vco_vctrl vssa1 -18.17fF
-C939 top_pll_v1_0/pswitch vssa1 3.57fF
-C940 top_pll_v1_0/lf_vc vssa1 -59.89fF
-C941 top_pll_v1_0/loop_filter_0/res_loop_filter_2/out vssa1 7.90fF
+C49 io_analog[8] vdda1 29.93fF
+C50 gpio_noesd[7] top_pll_v1_0/vco_vctrl 0.05fF
+C51 top_pll_v1_0/vco_vctrl vdda1 0.43fF
+C52 top_pll_v2_0/biasp vdda1 0.03fF
+C53 top_pll_v2_0/ring_osc_0/csvco_branch_2/vbp vdda1 2.10fF
+C54 top_pll_v1_1/nUp bias_0/iref_0 0.74fF
+C55 top_pll_v1_0/nUp vdda1 0.01fF
+C56 top_pll_v1_1/pswitch vdda1 0.48fF
+C57 top_pll_v1_0/pswitch vdda1 0.38fF
+C58 top_pll_v2_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd vdda1 0.17fF
+C59 io_analog[7] top_pll_v1_1/buffer_salida_0/a_3996_n100# -0.08fF
+C60 io_analog[10] gpio_noesd[7] 29.88fF
+C61 io_analog[7] bias_0/iref_1 13.22fF
+C62 bias_0/iref_1 vdda1 15.26fF
+C63 io_analog[10] vdda1 0.01fF
+C64 io_clamp_low[2] io_clamp_high[2] 0.53fF
+C65 top_pll_v2_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd vdda1 0.17fF
+C66 gpio_noesd[7] vdda1 120.83fF
+C67 top_pll_v1_0/Up bias_0/iref_2 0.70fF
+C68 io_analog[7] vdda1 29.48fF
+C69 io_clamp_high[2] io_analog[6] 0.53fF
+C70 top_pll_v1_0/Down bias_0/iref_2 1.11fF
+C71 bias_0/iref_0 vdda1 15.18fF
+C72 bias_0/iref_2 top_pll_v1_0/biasp 3.20fF
+C73 bias_0/iref_1 top_pll_v2_0/Down 0.91fF
+C74 vdda1 top_pll_v1_0/buffer_salida_0/a_3996_n100# 0.06fF
+C75 io_in_3v3[0] vssa1 0.41fF
+C76 io_oeb[26] vssa1 0.61fF
+C77 io_in[0] vssa1 0.41fF
+C78 io_out[26] vssa1 0.61fF
+C79 io_out[0] vssa1 0.41fF
+C80 io_in[26] vssa1 0.61fF
+C81 io_oeb[0] vssa1 0.41fF
+C82 io_in_3v3[26] vssa1 0.61fF
+C83 io_in_3v3[1] vssa1 0.41fF
+C84 io_oeb[25] vssa1 0.61fF
+C85 io_in[1] vssa1 0.41fF
+C86 io_out[25] vssa1 0.61fF
+C87 io_out[1] vssa1 0.41fF
+C88 io_in[25] vssa1 0.61fF
+C89 io_oeb[1] vssa1 0.41fF
+C90 io_in_3v3[25] vssa1 0.61fF
+C91 io_in_3v3[2] vssa1 0.41fF
+C92 io_oeb[24] vssa1 0.61fF
+C93 io_in[2] vssa1 0.41fF
+C94 io_out[24] vssa1 0.61fF
+C95 io_out[2] vssa1 0.41fF
+C96 io_in[24] vssa1 0.61fF
+C97 io_oeb[2] vssa1 -0.20fF
+C98 io_in_3v3[3] vssa1 0.41fF
+C99 gpio_noesd[17] vssa1 0.61fF
+C100 io_in[3] vssa1 0.41fF
+C101 gpio_analog[17] vssa1 0.61fF
+C102 io_out[3] vssa1 0.41fF
+C103 io_oeb[3] vssa1 0.41fF
+C104 io_in_3v3[4] vssa1 0.41fF
+C105 io_in[4] vssa1 0.41fF
+C106 io_out[4] vssa1 0.41fF
+C107 io_oeb[4] vssa1 0.41fF
+C108 io_oeb[23] vssa1 0.61fF
+C109 io_out[23] vssa1 0.61fF
+C110 io_in[23] vssa1 0.61fF
+C111 io_in_3v3[23] vssa1 0.61fF
+C112 gpio_noesd[16] vssa1 0.61fF
+C113 io_in_3v3[5] vssa1 0.41fF
+C114 io_in[5] vssa1 -0.20fF
+C115 io_out[5] vssa1 0.41fF
+C116 io_oeb[5] vssa1 0.41fF
+C117 io_oeb[22] vssa1 0.61fF
+C118 io_out[22] vssa1 0.61fF
+C119 io_in[22] vssa1 0.61fF
+C120 io_in_3v3[22] vssa1 0.61fF
+C121 gpio_analog[15] vssa1 0.61fF
+C122 io_in_3v3[6] vssa1 -0.20fF
+C123 io_in[6] vssa1 0.41fF
+C124 io_out[6] vssa1 0.41fF
+C125 io_oeb[6] vssa1 0.41fF
+C126 io_oeb[21] vssa1 0.61fF
+C127 io_out[21] vssa1 0.61fF
+C128 io_in[21] vssa1 0.61fF
+C129 io_in_3v3[21] vssa1 0.61fF
+C130 gpio_noesd[14] vssa1 0.61fF
+C131 gpio_analog[14] vssa1 0.61fF
+C132 vssd2 vssa1 -5.19fF
+C133 vssd1 vssa1 1.13fF
+C134 vdda2 vssa1 -5.19fF
+C135 io_oeb[20] vssa1 0.61fF
+C136 io_out[20] vssa1 0.61fF
+C137 io_in[20] vssa1 0.61fF
+C138 io_in_3v3[20] vssa1 0.61fF
+C139 gpio_noesd[13] vssa1 0.61fF
+C140 gpio_analog[13] vssa1 0.61fF
+C141 gpio_analog[0] vssa1 0.41fF
+C142 gpio_noesd[0] vssa1 0.41fF
+C143 io_in_3v3[7] vssa1 0.41fF
+C144 io_in[7] vssa1 0.41fF
+C145 io_out[7] vssa1 0.41fF
+C146 io_oeb[7] vssa1 0.41fF
+C147 io_oeb[19] vssa1 0.61fF
+C148 io_out[19] vssa1 0.61fF
+C149 io_in[19] vssa1 0.61fF
+C150 io_in_3v3[19] vssa1 0.61fF
+C151 gpio_noesd[12] vssa1 0.61fF
+C152 gpio_analog[12] vssa1 0.61fF
+C153 gpio_analog[1] vssa1 0.41fF
+C154 gpio_noesd[1] vssa1 0.41fF
+C155 io_in_3v3[8] vssa1 0.41fF
+C156 io_in[8] vssa1 0.41fF
+C157 io_out[8] vssa1 -0.20fF
+C158 io_oeb[8] vssa1 0.41fF
+C159 io_oeb[18] vssa1 0.61fF
+C160 io_out[18] vssa1 0.61fF
+C161 io_in_3v3[18] vssa1 0.61fF
+C162 gpio_noesd[11] vssa1 0.61fF
+C163 gpio_analog[11] vssa1 0.61fF
+C164 gpio_analog[2] vssa1 0.41fF
+C165 gpio_noesd[2] vssa1 0.41fF
+C166 io_in_3v3[9] vssa1 0.41fF
+C167 io_in[9] vssa1 0.41fF
+C168 io_out[9] vssa1 0.41fF
+C169 io_oeb[9] vssa1 0.41fF
+C170 io_oeb[17] vssa1 0.61fF
+C171 io_in[17] vssa1 0.61fF
+C172 io_in_3v3[17] vssa1 0.61fF
+C173 gpio_noesd[10] vssa1 0.61fF
+C174 gpio_analog[10] vssa1 0.61fF
+C175 gpio_analog[3] vssa1 0.41fF
+C176 gpio_noesd[3] vssa1 0.41fF
+C177 io_in_3v3[10] vssa1 0.41fF
+C178 io_in[10] vssa1 0.41fF
+C179 io_out[10] vssa1 0.41fF
+C180 io_oeb[10] vssa1 0.41fF
+C181 io_out[16] vssa1 0.61fF
+C182 io_in[16] vssa1 0.61fF
+C183 io_in_3v3[16] vssa1 0.61fF
+C184 gpio_noesd[9] vssa1 0.61fF
+C185 gpio_analog[9] vssa1 0.61fF
+C186 gpio_analog[4] vssa1 0.41fF
+C187 gpio_noesd[4] vssa1 0.41fF
+C188 io_in_3v3[11] vssa1 0.41fF
+C189 io_in[11] vssa1 0.41fF
+C190 io_out[11] vssa1 0.41fF
+C191 io_oeb[11] vssa1 0.41fF
+C192 io_oeb[15] vssa1 0.61fF
+C193 io_out[15] vssa1 0.61fF
+C194 io_in[15] vssa1 0.61fF
+C195 io_in_3v3[15] vssa1 0.61fF
+C196 gpio_analog[5] vssa1 0.41fF
+C197 gpio_noesd[5] vssa1 0.41fF
+C198 io_in_3v3[12] vssa1 0.41fF
+C199 io_in[12] vssa1 0.41fF
+C200 io_out[12] vssa1 0.41fF
+C201 io_oeb[12] vssa1 0.41fF
+C202 gpio_analog[6] vssa1 0.60fF
+C203 gpio_noesd[6] vssa1 0.60fF
+C204 io_in_3v3[13] vssa1 0.60fF
+C205 io_in[13] vssa1 0.60fF
+C206 io_out[13] vssa1 0.60fF
+C207 io_oeb[13] vssa1 0.60fF
+C208 vccd1 vssa1 0.85fF
+C209 gpio_analog[8] vssa1 0.61fF
+C210 io_oeb[14] vssa1 0.61fF
+C211 io_out[14] vssa1 0.61fF
+C212 io_in[14] vssa1 0.61fF
+C213 io_in_3v3[14] vssa1 0.61fF
+C214 io_analog[0] vssa1 -6.01fF
+C215 io_analog[1] vssa1 0.76fF
+C216 vssa2 vssa1 1.66fF
+C217 vccd2 vssa1 0.91fF
+C218 io_analog[2] vssa1 -5.85fF
+C219 io_analog[3] vssa1 -5.74fF
+C220 io_analog[4] vssa1 -5.03fF
+C221 io_clamp_high[0] vssa1 -2.60fF
+C222 io_clamp_low[0] vssa1 0.82fF
+C223 io_analog[6] vssa1 -4.92fF
+C224 io_clamp_high[2] vssa1 0.66fF
+C225 io_clamp_low[2] vssa1 0.50fF
+C226 user_irq[2] vssa1 0.63fF
+C227 user_irq[1] vssa1 0.63fF
+C228 user_irq[0] vssa1 0.63fF
+C229 user_clock2 vssa1 0.63fF
+C230 la_oenb[127] vssa1 0.63fF
+C231 la_data_in[127] vssa1 0.63fF
+C232 la_oenb[126] vssa1 0.63fF
+C233 la_data_out[126] vssa1 0.63fF
+C234 la_data_in[126] vssa1 0.63fF
+C235 la_oenb[125] vssa1 0.63fF
+C236 la_data_out[125] vssa1 0.63fF
+C237 la_data_in[125] vssa1 0.63fF
+C238 la_oenb[124] vssa1 0.63fF
+C239 la_data_out[124] vssa1 0.63fF
+C240 la_data_in[124] vssa1 0.63fF
+C241 la_oenb[123] vssa1 0.63fF
+C242 la_data_out[123] vssa1 0.63fF
+C243 la_oenb[122] vssa1 0.63fF
+C244 la_data_out[122] vssa1 0.63fF
+C245 la_data_in[122] vssa1 0.63fF
+C246 la_oenb[121] vssa1 0.63fF
+C247 la_data_out[121] vssa1 0.63fF
+C248 la_data_in[121] vssa1 0.63fF
+C249 la_oenb[120] vssa1 0.63fF
+C250 la_data_out[120] vssa1 0.63fF
+C251 la_data_in[120] vssa1 0.63fF
+C252 la_oenb[119] vssa1 0.63fF
+C253 la_data_out[119] vssa1 0.63fF
+C254 la_data_in[119] vssa1 0.63fF
+C255 la_oenb[118] vssa1 0.63fF
+C256 la_data_out[118] vssa1 0.63fF
+C257 la_data_in[118] vssa1 0.63fF
+C258 la_oenb[117] vssa1 0.63fF
+C259 la_data_out[117] vssa1 0.63fF
+C260 la_data_in[117] vssa1 0.63fF
+C261 la_data_out[116] vssa1 0.63fF
+C262 la_data_in[116] vssa1 0.63fF
+C263 la_oenb[115] vssa1 0.63fF
+C264 la_data_out[115] vssa1 0.63fF
+C265 la_data_in[115] vssa1 0.63fF
+C266 la_oenb[114] vssa1 0.63fF
+C267 la_data_out[114] vssa1 0.63fF
+C268 la_data_in[114] vssa1 0.63fF
+C269 la_oenb[113] vssa1 0.63fF
+C270 la_data_out[113] vssa1 0.63fF
+C271 la_data_in[113] vssa1 0.63fF
+C272 la_oenb[112] vssa1 0.63fF
+C273 la_data_in[112] vssa1 0.63fF
+C274 la_oenb[111] vssa1 0.63fF
+C275 la_data_out[111] vssa1 0.63fF
+C276 la_data_in[111] vssa1 0.63fF
+C277 la_oenb[110] vssa1 0.63fF
+C278 la_data_out[110] vssa1 0.63fF
+C279 la_data_in[110] vssa1 0.63fF
+C280 la_oenb[109] vssa1 0.63fF
+C281 la_data_out[109] vssa1 0.63fF
+C282 la_data_in[109] vssa1 0.63fF
+C283 la_oenb[108] vssa1 0.63fF
+C284 la_data_out[108] vssa1 0.63fF
+C285 la_oenb[107] vssa1 0.63fF
+C286 la_data_out[107] vssa1 0.63fF
+C287 la_data_in[107] vssa1 0.63fF
+C288 la_oenb[106] vssa1 0.63fF
+C289 la_data_out[106] vssa1 0.63fF
+C290 la_oenb[105] vssa1 0.63fF
+C291 la_data_out[105] vssa1 0.63fF
+C292 la_data_in[105] vssa1 0.63fF
+C293 la_oenb[104] vssa1 0.63fF
+C294 la_data_out[104] vssa1 0.63fF
+C295 la_data_in[104] vssa1 0.63fF
+C296 la_oenb[103] vssa1 0.63fF
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+C661 wbs_adr_i[4] vssa1 0.63fF
+C662 wbs_sel_i[3] vssa1 0.63fF
+C663 wbs_dat_o[3] vssa1 0.63fF
+C664 wbs_adr_i[3] vssa1 0.63fF
+C665 wbs_sel_i[2] vssa1 0.63fF
+C666 wbs_dat_o[2] vssa1 0.63fF
+C667 wbs_dat_i[2] vssa1 0.63fF
+C668 wbs_adr_i[2] vssa1 0.63fF
+C669 wbs_dat_o[1] vssa1 0.63fF
+C670 wbs_dat_i[1] vssa1 0.63fF
+C671 wbs_adr_i[1] vssa1 0.63fF
+C672 wbs_sel_i[0] vssa1 0.63fF
+C673 wbs_dat_o[0] vssa1 0.63fF
+C674 wbs_dat_i[0] vssa1 0.63fF
+C675 wbs_adr_i[0] vssa1 0.63fF
+C676 wbs_we_i vssa1 0.63fF
+C677 wbs_stb_i vssa1 0.63fF
+C678 wbs_cyc_i vssa1 0.63fF
+C679 wbs_ack_o vssa1 0.63fF
+C680 wb_rst_i vssa1 0.63fF
+C681 m3_226242_702300# vssa1 -1.31fF $ **FLOATING
+C682 m3_222594_702300# vssa1 0.55fF $ **FLOATING
+C683 top_pll_v2_0/PFD_0/and_pfd_0/a_656_410# vssa1 0.96fF
+C684 top_pll_v2_0/PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_63_n45# vssa1 0.05fF
+C685 top_pll_v2_0/PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_n129_n45# vssa1 0.05fF
+C686 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C687 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_2/B vssa1 1.40fF
+C688 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C689 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_3/A vssa1 3.14fF
+C690 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C691 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C692 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_2/A vssa1 2.55fF
+C693 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C694 top_pll_v2_0/QB vssa1 4.35fF
+C695 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C696 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C697 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C698 top_pll_v2_0/out_div_by_5 vssa1 -0.40fF
+C699 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C700 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_2/B vssa1 1.40fF
+C701 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C702 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_3/A vssa1 3.14fF
+C703 top_pll_v2_0/pfd_reset vssa1 2.17fF
+C704 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C705 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C706 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_2/A vssa1 2.55fF
+C707 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C708 top_pll_v2_0/QA vssa1 4.22fF
+C709 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C710 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C711 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C712 top_pll_v2_0/pfd_cp_interface_0/inverter_cp_x1_2/in vssa1 1.85fF
+C713 top_pll_v2_0/pfd_cp_interface_0/inverter_cp_x1_0/out vssa1 1.77fF
+C714 top_pll_v2_0/nUp vssa1 5.39fF
+C715 top_pll_v2_0/Up vssa1 1.85fF
+C716 top_pll_v2_0/Down vssa1 6.19fF
+C717 top_pll_v2_0/nDown vssa1 -3.53fF
+C718 top_pll_v2_0/div_by_5_0/sky130_fd_sc_hs__or2_1_0/a_63_368# vssa1 0.37fF
+C719 top_pll_v2_0/div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_56_136# vssa1 0.38fF
+C720 top_pll_v2_0/div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# vssa1 0.38fF
+C721 top_pll_v2_0/div_by_5_0/DFlipFlop_3/nQ vssa1 0.48fF
+C722 top_pll_v2_0/div_5_Q1_shift vssa1 -0.14fF
+C723 top_pll_v2_0/div_by_5_0/DFlipFlop_3/latch_diff_1/m1_657_280# vssa1 0.57fF
+C724 top_pll_v2_0/div_by_5_0/DFlipFlop_3/latch_diff_1/nD vssa1 0.57fF
+C725 top_pll_v2_0/div_by_5_0/DFlipFlop_3/latch_diff_1/D vssa1 -1.73fF
+C726 top_pll_v2_0/div_by_5_0/DFlipFlop_3/latch_diff_0/m1_657_280# vssa1 0.57fF
+C727 top_pll_v2_0/div_by_5_0/DFlipFlop_3/latch_diff_0/D vssa1 0.96fF
+C728 top_pll_v2_0/div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C729 top_pll_v2_0/div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C730 top_pll_v2_0/div_by_5_0/DFlipFlop_3/latch_diff_0/nD vssa1 1.14fF
+C731 top_pll_v2_0/div_by_5_0/DFlipFlop_2/nQ vssa1 0.48fF
+C732 top_pll_v2_0/div_5_Q1 vssa1 4.25fF
+C733 top_pll_v2_0/div_by_5_0/DFlipFlop_2/latch_diff_1/m1_657_280# vssa1 0.57fF
+C734 top_pll_v2_0/div_by_5_0/DFlipFlop_2/latch_diff_1/nD vssa1 0.57fF
+C735 top_pll_v2_0/div_by_5_0/DFlipFlop_2/latch_diff_1/D vssa1 -1.73fF
+C736 top_pll_v2_0/div_by_5_0/DFlipFlop_2/latch_diff_0/m1_657_280# vssa1 0.57fF
+C737 top_pll_v2_0/div_by_5_0/DFlipFlop_2/latch_diff_0/D vssa1 0.96fF
+C738 top_pll_v2_0/div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C739 top_pll_v2_0/div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C740 top_pll_v2_0/div_by_5_0/DFlipFlop_2/D vssa1 3.13fF
+C741 top_pll_v2_0/div_by_5_0/DFlipFlop_2/latch_diff_0/nD vssa1 1.14fF
+C742 top_pll_v2_0/div_5_nQ0 vssa1 0.59fF
+C743 top_pll_v2_0/div_5_Q0 vssa1 0.01fF
+C744 top_pll_v2_0/div_by_5_0/DFlipFlop_1/latch_diff_1/m1_657_280# vssa1 0.57fF
+C745 top_pll_v2_0/div_by_5_0/DFlipFlop_1/latch_diff_1/nD vssa1 0.57fF
+C746 top_pll_v2_0/div_by_5_0/DFlipFlop_1/latch_diff_1/D vssa1 -1.73fF
+C747 top_pll_v2_0/div_by_5_0/DFlipFlop_1/latch_diff_0/m1_657_280# vssa1 0.57fF
+C748 top_pll_v2_0/div_by_5_0/DFlipFlop_1/latch_diff_0/D vssa1 0.96fF
+C749 top_pll_v2_0/div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C750 top_pll_v2_0/div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C751 top_pll_v2_0/div_by_5_0/DFlipFlop_1/D vssa1 3.64fF
+C752 top_pll_v2_0/div_by_5_0/DFlipFlop_1/latch_diff_0/nD vssa1 1.14fF
+C753 top_pll_v2_0/div_5_nQ2 vssa1 1.24fF
+C754 top_pll_v2_0/div_by_5_0/DFlipFlop_0/Q vssa1 -0.94fF
+C755 top_pll_v2_0/div_by_5_0/DFlipFlop_0/latch_diff_1/m1_657_280# vssa1 0.57fF
+C756 top_pll_v2_0/n_out_by_2 vssa1 -2.75fF
+C757 top_pll_v2_0/div_by_5_0/DFlipFlop_0/latch_diff_1/nD vssa1 0.57fF
+C758 top_pll_v2_0/div_by_5_0/DFlipFlop_0/latch_diff_1/D vssa1 -1.73fF
+C759 top_pll_v2_0/div_by_5_0/DFlipFlop_0/latch_diff_0/m1_657_280# vssa1 0.57fF
+C760 top_pll_v2_0/out_by_2 vssa1 -5.01fF
+C761 top_pll_v2_0/div_by_5_0/DFlipFlop_0/latch_diff_0/D vssa1 0.96fF
+C762 top_pll_v2_0/div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C763 top_pll_v2_0/div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C764 top_pll_v2_0/div_by_5_0/DFlipFlop_0/D vssa1 3.96fF
+C765 top_pll_v2_0/div_by_5_0/DFlipFlop_0/latch_diff_0/nD vssa1 1.14fF
+C766 top_pll_v2_0/div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_355_368# vssa1 0.08fF
+C767 top_pll_v2_0/div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_194_125# vssa1 0.40fF
+C768 top_pll_v2_0/out_to_buffer vssa1 1.54fF
+C769 top_pll_v2_0/out_to_div vssa1 4.23fF
+C770 top_pll_v2_0/out_first_buffer vssa1 2.88fF
+C771 top_pll_v2_0/ring_osc_0/csvco_branch_2/in vssa1 1.60fF
+C772 top_pll_v2_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd vssa1 0.16fF
+C773 top_pll_v2_0/ring_osc_0/csvco_branch_1/cap_vco_0/t vssa1 7.10fF
+C774 top_pll_v2_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vss vssa1 0.52fF
+C775 top_pll_v2_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd vssa1 0.16fF
+C776 top_pll_v2_0/ring_osc_0/csvco_branch_2/cap_vco_0/t vssa1 7.10fF
+C777 top_pll_v2_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vss vssa1 0.52fF
+C778 top_pll_v2_0/ring_osc_0/csvco_branch_1/in vssa1 1.58fF
+C779 top_pll_v2_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd vssa1 0.16fF
+C780 top_pll_v2_0/vco_out vssa1 1.01fF
+C781 top_pll_v2_0/ring_osc_0/csvco_branch_0/cap_vco_0/t vssa1 7.10fF
+C782 top_pll_v2_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vss vssa1 0.52fF
+C783 top_pll_v2_0/ring_osc_0/csvco_branch_2/vbp vssa1 0.36fF
+C784 io_analog[8] vssa1 13.78fF
+C785 top_pll_v2_0/buffer_salida_0/a_3996_n100# vssa1 48.23fF
+C786 top_pll_v2_0/buffer_salida_0/a_678_n100# vssa1 13.21fF
+C787 top_pll_v2_0/n_out_buffer_div_2 vssa1 1.63fF
+C788 top_pll_v2_0/out_buffer_div_2 vssa1 1.60fF
+C789 top_pll_v2_0/div_by_2_0/DFlipFlop_0/CLK vssa1 0.31fF
+C790 top_pll_v2_0/div_by_2_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C791 top_pll_v2_0/div_by_2_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C792 top_pll_v2_0/div_by_2_0/DFlipFlop_0/nCLK vssa1 1.03fF
+C793 top_pll_v2_0/out_div_2 vssa1 -1.30fF
+C794 top_pll_v2_0/div_by_2_0/DFlipFlop_0/latch_diff_1/m1_657_280# vssa1 0.57fF
+C795 top_pll_v2_0/div_by_2_0/DFlipFlop_0/latch_diff_1/nD vssa1 0.57fF
+C796 top_pll_v2_0/div_by_2_0/DFlipFlop_0/latch_diff_1/D vssa1 -1.73fF
+C797 top_pll_v2_0/div_by_2_0/DFlipFlop_0/latch_diff_0/m1_657_280# vssa1 0.57fF
+C798 top_pll_v2_0/div_by_2_0/DFlipFlop_0/latch_diff_0/D vssa1 0.96fF
+C799 top_pll_v2_0/div_by_2_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C800 top_pll_v2_0/div_by_2_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C801 top_pll_v2_0/n_out_div_2 vssa1 1.95fF
+C802 top_pll_v2_0/div_by_2_0/DFlipFlop_0/latch_diff_0/nD vssa1 1.14fF
+C803 top_pll_v2_0/lf_vc vssa1 -59.89fF
+C804 top_pll_v2_0/loop_filter_v2_0/res_loop_filter_2/out vssa1 7.90fF
+C805 gpio_noesd[8] vssa1 210.79fF
+C806 top_pll_v2_0/loop_filter_v2_0/cap3_loop_filter_0/in vssa1 -12.03fF
+C807 top_pll_v2_0/nswitch vssa1 3.73fF
+C808 top_pll_v2_0/biasp vssa1 5.44fF
+C809 bias_0/iref_1 vssa1 -93.46fF
+C810 top_pll_v2_0/vco_vctrl vssa1 -20.08fF
+C811 top_pll_v2_0/pswitch vssa1 3.57fF
+C812 bias_0/iref_4 vssa1 1.17fF
+C813 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_4/a_n1731_n1219# vssa1 2.60fF
+C814 bias_0/iref_3 vssa1 0.64fF
+C815 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_3/a_n1731_n1219# vssa1 2.60fF
+C816 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_2/a_n1731_n1219# vssa1 2.60fF
+C817 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_1/a_n1731_n1219# vssa1 2.60fF
+C818 io_analog[5] vssa1 33.29fF
+C819 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_0/a_n1731_n1219# vssa1 2.60fF
+C820 bias_0/m1_20168_984# vssa1 56.92fF
+C821 bias_0/iref_9 vssa1 -1.13fF
+C822 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_10/a_n1731_n1219# vssa1 2.60fF
+C823 bias_0/iref_7 vssa1 -1.38fF
+C824 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_8/a_n1731_n1219# vssa1 2.60fF
+C825 bias_0/iref_8 vssa1 -1.19fF
+C826 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_9/a_n1731_n1219# vssa1 2.60fF
+C827 bias_0/iref_6 vssa1 -1.00fF
+C828 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_7/a_n1731_n1219# vssa1 2.60fF
+C829 bias_0/iref_5 vssa1 1.40fF
+C830 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_6/a_n1731_n1219# vssa1 2.60fF
+C831 top_pll_v1_1/PFD_0/and_pfd_0/a_656_410# vssa1 0.96fF
+C832 top_pll_v1_1/PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_63_n45# vssa1 0.05fF
+C833 top_pll_v1_1/PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_n129_n45# vssa1 0.05fF
+C834 top_pll_v1_1/PFD_0/dff_pfd_1/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C835 top_pll_v1_1/PFD_0/dff_pfd_1/nor_pfd_2/B vssa1 1.40fF
+C836 top_pll_v1_1/PFD_0/dff_pfd_1/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C837 top_pll_v1_1/PFD_0/dff_pfd_1/nor_pfd_3/A vssa1 3.14fF
+C838 top_pll_v1_1/PFD_0/dff_pfd_1/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C839 top_pll_v1_1/PFD_0/dff_pfd_1/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C840 top_pll_v1_1/PFD_0/dff_pfd_1/nor_pfd_2/A vssa1 2.55fF
+C841 top_pll_v1_1/PFD_0/dff_pfd_1/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C842 top_pll_v1_1/QB vssa1 4.35fF
+C843 top_pll_v1_1/PFD_0/dff_pfd_1/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C844 top_pll_v1_1/PFD_0/dff_pfd_1/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C845 top_pll_v1_1/PFD_0/dff_pfd_1/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C846 top_pll_v1_1/out_div_by_5 vssa1 -0.40fF
+C847 top_pll_v1_1/PFD_0/dff_pfd_0/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C848 top_pll_v1_1/PFD_0/dff_pfd_0/nor_pfd_2/B vssa1 1.40fF
+C849 top_pll_v1_1/PFD_0/dff_pfd_0/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C850 top_pll_v1_1/PFD_0/dff_pfd_0/nor_pfd_3/A vssa1 3.14fF
+C851 top_pll_v1_1/pfd_reset vssa1 2.17fF
+C852 top_pll_v1_1/PFD_0/dff_pfd_0/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C853 top_pll_v1_1/PFD_0/dff_pfd_0/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C854 top_pll_v1_1/PFD_0/dff_pfd_0/nor_pfd_2/A vssa1 2.55fF
+C855 top_pll_v1_1/PFD_0/dff_pfd_0/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C856 top_pll_v1_1/QA vssa1 4.22fF
+C857 top_pll_v1_1/PFD_0/dff_pfd_0/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C858 top_pll_v1_1/PFD_0/dff_pfd_0/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C859 top_pll_v1_1/PFD_0/dff_pfd_0/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C860 io_analog[10] vssa1 503.33fF
+C861 top_pll_v1_1/pfd_cp_interface_0/inverter_cp_x1_2/in vssa1 1.85fF
+C862 top_pll_v1_1/pfd_cp_interface_0/inverter_cp_x1_0/out vssa1 1.77fF
+C863 top_pll_v1_1/nUp vssa1 5.39fF
+C864 top_pll_v1_1/Up vssa1 1.85fF
+C865 top_pll_v1_1/Down vssa1 6.19fF
+C866 top_pll_v1_1/nDown vssa1 -3.53fF
+C867 top_pll_v1_1/div_by_5_0/sky130_fd_sc_hs__or2_1_0/a_63_368# vssa1 0.37fF
+C868 top_pll_v1_1/div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_56_136# vssa1 0.38fF
+C869 top_pll_v1_1/div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# vssa1 0.38fF
+C870 top_pll_v1_1/div_by_5_0/DFlipFlop_3/nQ vssa1 0.48fF
+C871 top_pll_v1_1/div_5_Q1_shift vssa1 -0.14fF
+C872 top_pll_v1_1/div_by_5_0/DFlipFlop_3/latch_diff_1/m1_657_280# vssa1 0.57fF
+C873 top_pll_v1_1/div_by_5_0/DFlipFlop_3/latch_diff_1/nD vssa1 0.57fF
+C874 top_pll_v1_1/div_by_5_0/DFlipFlop_3/latch_diff_1/D vssa1 -1.73fF
+C875 top_pll_v1_1/div_by_5_0/DFlipFlop_3/latch_diff_0/m1_657_280# vssa1 0.57fF
+C876 top_pll_v1_1/div_by_5_0/DFlipFlop_3/latch_diff_0/D vssa1 0.96fF
+C877 top_pll_v1_1/div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C878 top_pll_v1_1/div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C879 top_pll_v1_1/div_by_5_0/DFlipFlop_3/latch_diff_0/nD vssa1 1.14fF
+C880 top_pll_v1_1/div_by_5_0/DFlipFlop_2/nQ vssa1 0.48fF
+C881 top_pll_v1_1/div_5_Q1 vssa1 4.25fF
+C882 top_pll_v1_1/div_by_5_0/DFlipFlop_2/latch_diff_1/m1_657_280# vssa1 0.57fF
+C883 top_pll_v1_1/div_by_5_0/DFlipFlop_2/latch_diff_1/nD vssa1 0.57fF
+C884 top_pll_v1_1/div_by_5_0/DFlipFlop_2/latch_diff_1/D vssa1 -1.73fF
+C885 top_pll_v1_1/div_by_5_0/DFlipFlop_2/latch_diff_0/m1_657_280# vssa1 0.57fF
+C886 top_pll_v1_1/div_by_5_0/DFlipFlop_2/latch_diff_0/D vssa1 0.96fF
+C887 top_pll_v1_1/div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C888 top_pll_v1_1/div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C889 top_pll_v1_1/div_by_5_0/DFlipFlop_2/D vssa1 3.13fF
+C890 top_pll_v1_1/div_by_5_0/DFlipFlop_2/latch_diff_0/nD vssa1 1.14fF
+C891 top_pll_v1_1/div_5_nQ0 vssa1 0.59fF
+C892 top_pll_v1_1/div_5_Q0 vssa1 0.01fF
+C893 top_pll_v1_1/div_by_5_0/DFlipFlop_1/latch_diff_1/m1_657_280# vssa1 0.57fF
+C894 top_pll_v1_1/div_by_5_0/DFlipFlop_1/latch_diff_1/nD vssa1 0.57fF
+C895 top_pll_v1_1/div_by_5_0/DFlipFlop_1/latch_diff_1/D vssa1 -1.73fF
+C896 top_pll_v1_1/div_by_5_0/DFlipFlop_1/latch_diff_0/m1_657_280# vssa1 0.57fF
+C897 top_pll_v1_1/div_by_5_0/DFlipFlop_1/latch_diff_0/D vssa1 0.96fF
+C898 top_pll_v1_1/div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C899 top_pll_v1_1/div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C900 top_pll_v1_1/div_by_5_0/DFlipFlop_1/D vssa1 3.64fF
+C901 top_pll_v1_1/div_by_5_0/DFlipFlop_1/latch_diff_0/nD vssa1 1.14fF
+C902 top_pll_v1_1/div_5_nQ2 vssa1 1.24fF
+C903 top_pll_v1_1/div_by_5_0/DFlipFlop_0/Q vssa1 -0.94fF
+C904 top_pll_v1_1/div_by_5_0/DFlipFlop_0/latch_diff_1/m1_657_280# vssa1 0.57fF
+C905 top_pll_v1_1/n_out_by_2 vssa1 -2.75fF
+C906 top_pll_v1_1/div_by_5_0/DFlipFlop_0/latch_diff_1/nD vssa1 0.57fF
+C907 top_pll_v1_1/div_by_5_0/DFlipFlop_0/latch_diff_1/D vssa1 -1.73fF
+C908 top_pll_v1_1/div_by_5_0/DFlipFlop_0/latch_diff_0/m1_657_280# vssa1 0.57fF
+C909 top_pll_v1_1/out_by_2 vssa1 -5.01fF
+C910 top_pll_v1_1/div_by_5_0/DFlipFlop_0/latch_diff_0/D vssa1 0.96fF
+C911 top_pll_v1_1/div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C912 top_pll_v1_1/div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C913 top_pll_v1_1/div_by_5_0/DFlipFlop_0/D vssa1 3.96fF
+C914 top_pll_v1_1/div_by_5_0/DFlipFlop_0/latch_diff_0/nD vssa1 1.14fF
+C915 top_pll_v1_1/div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_355_368# vssa1 0.08fF
+C916 top_pll_v1_1/div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_194_125# vssa1 0.40fF
+C917 top_pll_v1_1/out_to_buffer vssa1 1.54fF
+C918 top_pll_v1_1/out_to_div vssa1 4.23fF
+C919 top_pll_v1_1/out_first_buffer vssa1 2.88fF
+C920 top_pll_v1_1/ring_osc_0/csvco_branch_2/in vssa1 1.60fF
+C921 top_pll_v1_1/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd vssa1 0.16fF
+C922 top_pll_v1_1/ring_osc_0/csvco_branch_1/cap_vco_0/t vssa1 7.10fF
+C923 top_pll_v1_1/ring_osc_0/csvco_branch_1/inverter_csvco_0/vss vssa1 0.52fF
+C924 top_pll_v1_1/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd vssa1 0.16fF
+C925 top_pll_v1_1/ring_osc_0/csvco_branch_2/cap_vco_0/t vssa1 7.10fF
+C926 top_pll_v1_1/ring_osc_0/csvco_branch_2/inverter_csvco_0/vss vssa1 0.52fF
+C927 top_pll_v1_1/ring_osc_0/csvco_branch_1/in vssa1 1.58fF
+C928 top_pll_v1_1/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd vssa1 0.16fF
+C929 top_pll_v1_1/vco_out vssa1 1.01fF
+C930 top_pll_v1_1/ring_osc_0/csvco_branch_0/cap_vco_0/t vssa1 7.10fF
+C931 top_pll_v1_1/ring_osc_0/csvco_branch_0/inverter_csvco_0/vss vssa1 0.52fF
+C932 top_pll_v1_1/ring_osc_0/csvco_branch_2/vbp vssa1 0.36fF
+C933 io_analog[7] vssa1 24.61fF
+C934 top_pll_v1_1/buffer_salida_0/a_3996_n100# vssa1 48.11fF
+C935 top_pll_v1_1/buffer_salida_0/a_678_n100# vssa1 13.21fF
+C936 top_pll_v1_1/n_out_buffer_div_2 vssa1 1.63fF
+C937 top_pll_v1_1/out_buffer_div_2 vssa1 1.60fF
+C938 top_pll_v1_1/div_by_2_0/DFlipFlop_0/CLK vssa1 0.31fF
+C939 top_pll_v1_1/div_by_2_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C940 top_pll_v1_1/div_by_2_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C941 top_pll_v1_1/div_by_2_0/DFlipFlop_0/nCLK vssa1 1.03fF
+C942 top_pll_v1_1/out_div_2 vssa1 -1.30fF
+C943 top_pll_v1_1/div_by_2_0/DFlipFlop_0/latch_diff_1/m1_657_280# vssa1 0.57fF
+C944 top_pll_v1_1/div_by_2_0/DFlipFlop_0/latch_diff_1/nD vssa1 0.57fF
+C945 top_pll_v1_1/div_by_2_0/DFlipFlop_0/latch_diff_1/D vssa1 -1.73fF
+C946 top_pll_v1_1/div_by_2_0/DFlipFlop_0/latch_diff_0/m1_657_280# vssa1 0.57fF
+C947 top_pll_v1_1/div_by_2_0/DFlipFlop_0/latch_diff_0/D vssa1 0.96fF
+C948 top_pll_v1_1/div_by_2_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C949 top_pll_v1_1/div_by_2_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C950 top_pll_v1_1/n_out_div_2 vssa1 1.95fF
+C951 top_pll_v1_1/div_by_2_0/DFlipFlop_0/latch_diff_0/nD vssa1 1.14fF
+C952 top_pll_v1_1/nswitch vssa1 3.73fF
+C953 top_pll_v1_1/biasp vssa1 5.44fF
+C954 bias_0/iref_0 vssa1 -81.35fF
+C955 top_pll_v1_1/vco_vctrl vssa1 -18.17fF
+C956 top_pll_v1_1/pswitch vssa1 3.57fF
+C957 top_pll_v1_1/lf_vc vssa1 -59.89fF
+C958 top_pll_v1_1/loop_filter_0/res_loop_filter_2/out vssa1 7.90fF
+C959 top_pll_v1_0/PFD_0/and_pfd_0/a_656_410# vssa1 0.96fF
+C960 top_pll_v1_0/PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_63_n45# vssa1 0.05fF
+C961 top_pll_v1_0/PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_n129_n45# vssa1 0.05fF
+C962 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C963 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_2/B vssa1 1.40fF
+C964 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C965 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_3/A vssa1 3.14fF
+C966 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C967 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C968 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_2/A vssa1 2.55fF
+C969 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C970 top_pll_v1_0/QB vssa1 4.35fF
+C971 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C972 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C973 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C974 top_pll_v1_0/out_div_by_5 vssa1 -0.40fF
+C975 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C976 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_2/B vssa1 1.40fF
+C977 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C978 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_3/A vssa1 3.14fF
+C979 top_pll_v1_0/pfd_reset vssa1 2.17fF
+C980 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C981 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C982 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_2/A vssa1 2.55fF
+C983 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C984 top_pll_v1_0/QA vssa1 4.22fF
+C985 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C986 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C987 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C988 top_pll_v1_0/pfd_cp_interface_0/inverter_cp_x1_2/in vssa1 1.85fF
+C989 top_pll_v1_0/pfd_cp_interface_0/inverter_cp_x1_0/out vssa1 1.77fF
+C990 top_pll_v1_0/nUp vssa1 5.39fF
+C991 top_pll_v1_0/Up vssa1 1.85fF
+C992 top_pll_v1_0/Down vssa1 6.19fF
+C993 top_pll_v1_0/nDown vssa1 -3.53fF
+C994 top_pll_v1_0/div_by_5_0/sky130_fd_sc_hs__or2_1_0/a_63_368# vssa1 0.37fF
+C995 top_pll_v1_0/div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_56_136# vssa1 0.38fF
+C996 top_pll_v1_0/div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# vssa1 0.38fF
+C997 top_pll_v1_0/div_by_5_0/DFlipFlop_3/nQ vssa1 0.48fF
+C998 top_pll_v1_0/div_5_Q1_shift vssa1 -0.14fF
+C999 top_pll_v1_0/div_by_5_0/DFlipFlop_3/latch_diff_1/m1_657_280# vssa1 0.57fF
+C1000 top_pll_v1_0/div_by_5_0/DFlipFlop_3/latch_diff_1/nD vssa1 0.57fF
+C1001 top_pll_v1_0/div_by_5_0/DFlipFlop_3/latch_diff_1/D vssa1 -1.73fF
+C1002 top_pll_v1_0/div_by_5_0/DFlipFlop_3/latch_diff_0/m1_657_280# vssa1 0.57fF
+C1003 top_pll_v1_0/div_by_5_0/DFlipFlop_3/latch_diff_0/D vssa1 0.96fF
+C1004 top_pll_v1_0/div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C1005 top_pll_v1_0/div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C1006 top_pll_v1_0/div_by_5_0/DFlipFlop_3/latch_diff_0/nD vssa1 1.14fF
+C1007 top_pll_v1_0/div_by_5_0/DFlipFlop_2/nQ vssa1 0.48fF
+C1008 top_pll_v1_0/div_5_Q1 vssa1 4.25fF
+C1009 top_pll_v1_0/div_by_5_0/DFlipFlop_2/latch_diff_1/m1_657_280# vssa1 0.57fF
+C1010 top_pll_v1_0/div_by_5_0/DFlipFlop_2/latch_diff_1/nD vssa1 0.57fF
+C1011 top_pll_v1_0/div_by_5_0/DFlipFlop_2/latch_diff_1/D vssa1 -1.73fF
+C1012 top_pll_v1_0/div_by_5_0/DFlipFlop_2/latch_diff_0/m1_657_280# vssa1 0.57fF
+C1013 top_pll_v1_0/div_by_5_0/DFlipFlop_2/latch_diff_0/D vssa1 0.96fF
+C1014 top_pll_v1_0/div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C1015 top_pll_v1_0/div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C1016 top_pll_v1_0/div_by_5_0/DFlipFlop_2/D vssa1 3.13fF
+C1017 top_pll_v1_0/div_by_5_0/DFlipFlop_2/latch_diff_0/nD vssa1 1.14fF
+C1018 top_pll_v1_0/div_5_nQ0 vssa1 0.59fF
+C1019 top_pll_v1_0/div_5_Q0 vssa1 0.01fF
+C1020 top_pll_v1_0/div_by_5_0/DFlipFlop_1/latch_diff_1/m1_657_280# vssa1 0.57fF
+C1021 top_pll_v1_0/div_by_5_0/DFlipFlop_1/latch_diff_1/nD vssa1 0.57fF
+C1022 top_pll_v1_0/div_by_5_0/DFlipFlop_1/latch_diff_1/D vssa1 -1.73fF
+C1023 top_pll_v1_0/div_by_5_0/DFlipFlop_1/latch_diff_0/m1_657_280# vssa1 0.57fF
+C1024 top_pll_v1_0/div_by_5_0/DFlipFlop_1/latch_diff_0/D vssa1 0.96fF
+C1025 top_pll_v1_0/div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C1026 top_pll_v1_0/div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C1027 top_pll_v1_0/div_by_5_0/DFlipFlop_1/D vssa1 3.64fF
+C1028 top_pll_v1_0/div_by_5_0/DFlipFlop_1/latch_diff_0/nD vssa1 1.14fF
+C1029 top_pll_v1_0/div_5_nQ2 vssa1 1.24fF
+C1030 top_pll_v1_0/div_by_5_0/DFlipFlop_0/Q vssa1 -0.94fF
+C1031 top_pll_v1_0/div_by_5_0/DFlipFlop_0/latch_diff_1/m1_657_280# vssa1 0.57fF
+C1032 top_pll_v1_0/n_out_by_2 vssa1 -2.75fF
+C1033 top_pll_v1_0/div_by_5_0/DFlipFlop_0/latch_diff_1/nD vssa1 0.57fF
+C1034 top_pll_v1_0/div_by_5_0/DFlipFlop_0/latch_diff_1/D vssa1 -1.73fF
+C1035 top_pll_v1_0/div_by_5_0/DFlipFlop_0/latch_diff_0/m1_657_280# vssa1 0.57fF
+C1036 top_pll_v1_0/out_by_2 vssa1 -5.01fF
+C1037 top_pll_v1_0/div_by_5_0/DFlipFlop_0/latch_diff_0/D vssa1 0.96fF
+C1038 top_pll_v1_0/div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C1039 top_pll_v1_0/div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C1040 top_pll_v1_0/div_by_5_0/DFlipFlop_0/D vssa1 3.96fF
+C1041 top_pll_v1_0/div_by_5_0/DFlipFlop_0/latch_diff_0/nD vssa1 1.14fF
+C1042 vdda1 vssa1 6838.97fF
+C1043 top_pll_v1_0/div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_355_368# vssa1 0.08fF
+C1044 top_pll_v1_0/div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_194_125# vssa1 0.40fF
+C1045 top_pll_v1_0/out_to_buffer vssa1 1.54fF
+C1046 top_pll_v1_0/out_to_div vssa1 4.23fF
+C1047 top_pll_v1_0/out_first_buffer vssa1 2.88fF
+C1048 top_pll_v1_0/ring_osc_0/csvco_branch_2/in vssa1 1.60fF
+C1049 top_pll_v1_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd vssa1 0.16fF
+C1050 top_pll_v1_0/ring_osc_0/csvco_branch_1/cap_vco_0/t vssa1 7.10fF
+C1051 top_pll_v1_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vss vssa1 0.52fF
+C1052 top_pll_v1_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd vssa1 0.16fF
+C1053 top_pll_v1_0/ring_osc_0/csvco_branch_2/cap_vco_0/t vssa1 7.10fF
+C1054 top_pll_v1_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vss vssa1 0.52fF
+C1055 top_pll_v1_0/ring_osc_0/csvco_branch_1/in vssa1 1.58fF
+C1056 top_pll_v1_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd vssa1 0.16fF
+C1057 top_pll_v1_0/vco_out vssa1 1.01fF
+C1058 gpio_noesd[7] vssa1 272.21fF
+C1059 top_pll_v1_0/ring_osc_0/csvco_branch_0/cap_vco_0/t vssa1 7.10fF
+C1060 top_pll_v1_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vss vssa1 0.52fF
+C1061 top_pll_v1_0/ring_osc_0/csvco_branch_2/vbp vssa1 0.36fF
+C1062 io_analog[9] vssa1 7.89fF
+C1063 top_pll_v1_0/buffer_salida_0/a_3996_n100# vssa1 48.23fF
+C1064 top_pll_v1_0/buffer_salida_0/a_678_n100# vssa1 13.21fF
+C1065 top_pll_v1_0/n_out_buffer_div_2 vssa1 1.63fF
+C1066 top_pll_v1_0/out_buffer_div_2 vssa1 1.60fF
+C1067 top_pll_v1_0/div_by_2_0/DFlipFlop_0/CLK vssa1 0.31fF
+C1068 top_pll_v1_0/div_by_2_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C1069 top_pll_v1_0/div_by_2_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C1070 top_pll_v1_0/div_by_2_0/DFlipFlop_0/nCLK vssa1 1.03fF
+C1071 top_pll_v1_0/out_div_2 vssa1 -1.30fF
+C1072 top_pll_v1_0/div_by_2_0/DFlipFlop_0/latch_diff_1/m1_657_280# vssa1 0.57fF
+C1073 top_pll_v1_0/div_by_2_0/DFlipFlop_0/latch_diff_1/nD vssa1 0.57fF
+C1074 top_pll_v1_0/div_by_2_0/DFlipFlop_0/latch_diff_1/D vssa1 -1.73fF
+C1075 top_pll_v1_0/div_by_2_0/DFlipFlop_0/latch_diff_0/m1_657_280# vssa1 0.57fF
+C1076 top_pll_v1_0/div_by_2_0/DFlipFlop_0/latch_diff_0/D vssa1 0.96fF
+C1077 top_pll_v1_0/div_by_2_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C1078 top_pll_v1_0/div_by_2_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C1079 top_pll_v1_0/n_out_div_2 vssa1 1.95fF
+C1080 top_pll_v1_0/div_by_2_0/DFlipFlop_0/latch_diff_0/nD vssa1 1.14fF
+C1081 top_pll_v1_0/nswitch vssa1 3.73fF
+C1082 top_pll_v1_0/biasp vssa1 5.44fF
+C1083 bias_0/iref_2 vssa1 -186.53fF
+C1084 top_pll_v1_0/vco_vctrl vssa1 -18.17fF
+C1085 top_pll_v1_0/pswitch vssa1 3.57fF
+C1086 top_pll_v1_0/lf_vc vssa1 -59.89fF
+C1087 top_pll_v1_0/loop_filter_0/res_loop_filter_2/out vssa1 7.90fF
.ends
diff --git a/mag/extractions/user_analog_project_wrapper_pex_rc.spice b/mag/extractions/user_analog_project_wrapper_pex_rc.spice
index c574a6c..dc4db9c 100644
--- a/mag/extractions/user_analog_project_wrapper_pex_rc.spice
+++ b/mag/extractions/user_analog_project_wrapper_pex_rc.spice
@@ -30,71 +30,71 @@
X22 c1_n13188_n13100# m3_n7969_n2600# sky130_fd_pr__cap_mim_m3_1 l=2.5e+07u w=2.5e+07u
X23 c1_n13188_n13100# m3_n2650_n2600# sky130_fd_pr__cap_mim_m3_1 l=2.5e+07u w=2.5e+07u
X24 c1_n13188_n13100# m3_2669_2700# sky130_fd_pr__cap_mim_m3_1 l=2.5e+07u w=2.5e+07u
-C0 m3_n7969_n7900# m3_n2650_n7900# 2.73fF
-C1 m3_n7969_2700# m3_n13288_2700# 2.73fF
-C2 m3_2669_n7900# c1_n13188_n13100# 58.86fF
-C3 m3_n7969_n13200# m3_n7969_n7900# 3.28fF
-C4 m3_n7969_8000# m3_n13288_8000# 2.73fF
-C5 m3_n2650_n13200# m3_n2650_n7900# 3.28fF
-C6 m3_7988_n13200# m3_7988_n7900# 3.39fF
-C7 m3_7988_2700# m3_2669_2700# 2.73fF
-C8 m3_2669_n2600# m3_2669_2700# 3.28fF
-C9 m3_n2650_n13200# m3_n7969_n13200# 2.73fF
-C10 m3_2669_n2600# m3_n2650_n2600# 2.73fF
-C11 m3_n13288_n7900# m3_n13288_n13200# 3.28fF
-C12 m3_n7969_2700# m3_n7969_n2600# 3.28fF
-C13 m3_2669_n7900# m3_n2650_n7900# 2.73fF
-C14 m3_2669_8000# m3_7988_8000# 2.73fF
-C15 m3_n13288_2700# m3_n13288_8000# 3.28fF
-C16 m3_n13288_n7900# m3_n13288_n2600# 3.28fF
-C17 m3_n2650_n7900# c1_n13188_n13100# 58.86fF
-C18 m3_n2650_n13200# m3_2669_n13200# 2.73fF
-C19 c1_n13188_n13100# m3_n7969_8000# 58.61fF
-C20 m3_7988_2700# m3_7988_n2600# 3.39fF
-C21 m3_2669_n2600# m3_7988_n2600# 2.73fF
-C22 c1_n13188_n13100# m3_n13288_n13200# 58.36fF
-C23 m3_n2650_2700# m3_n7969_2700# 2.73fF
-C24 m3_n7969_n13200# c1_n13188_n13100# 58.61fF
-C25 m3_n2650_2700# m3_n2650_8000# 3.28fF
-C26 m3_n13288_n2600# c1_n13188_n13100# 58.61fF
-C27 m3_7988_n13200# c1_n13188_n13100# 60.75fF
-C28 m3_n2650_n2600# m3_n7969_n2600# 2.73fF
-C29 m3_2669_n7900# m3_2669_n13200# 3.28fF
-C30 m3_n7969_n7900# m3_n7969_n2600# 3.28fF
-C31 m3_2669_n7900# m3_2669_n2600# 3.28fF
-C32 m3_2669_8000# m3_n2650_8000# 2.73fF
-C33 m3_2669_n13200# c1_n13188_n13100# 58.61fF
-C34 m3_n2650_2700# m3_2669_2700# 2.73fF
-C35 m3_7988_2700# c1_n13188_n13100# 61.01fF
-C36 m3_2669_n2600# c1_n13188_n13100# 58.86fF
-C37 m3_n2650_2700# m3_n2650_n2600# 3.28fF
-C38 c1_n13188_n13100# m3_n13288_2700# 58.61fF
-C39 c1_n13188_n13100# m3_7988_8000# 60.75fF
-C40 m3_2669_8000# m3_2669_2700# 3.28fF
-C41 m3_n7969_n13200# m3_n13288_n13200# 2.73fF
-C42 c1_n13188_n13100# m3_n7969_2700# 58.86fF
-C43 c1_n13188_n13100# m3_n7969_n2600# 58.86fF
-C44 c1_n13188_n13100# m3_n2650_8000# 58.61fF
-C45 m3_7988_n7900# m3_7988_n2600# 3.39fF
-C46 m3_2669_n13200# m3_7988_n13200# 2.73fF
-C47 m3_n13288_n2600# m3_n13288_2700# 3.28fF
-C48 m3_n2650_2700# c1_n13188_n13100# 58.86fF
-C49 m3_n13288_n7900# m3_n7969_n7900# 2.73fF
-C50 c1_n13188_n13100# m3_2669_2700# 58.86fF
-C51 c1_n13188_n13100# m3_n2650_n2600# 58.86fF
-C52 m3_2669_n7900# m3_7988_n7900# 2.73fF
-C53 m3_2669_8000# c1_n13188_n13100# 58.61fF
-C54 m3_n7969_n7900# c1_n13188_n13100# 58.86fF
-C55 m3_7988_n7900# c1_n13188_n13100# 61.01fF
-C56 m3_n7969_2700# m3_n7969_8000# 3.28fF
-C57 m3_7988_2700# m3_7988_8000# 3.39fF
-C58 m3_n7969_8000# m3_n2650_8000# 2.73fF
-C59 c1_n13188_n13100# m3_n13288_8000# 58.36fF
-C60 m3_n2650_n13200# c1_n13188_n13100# 58.61fF
-C61 c1_n13188_n13100# m3_7988_n2600# 61.01fF
-C62 m3_n13288_n2600# m3_n7969_n2600# 2.73fF
-C63 m3_n13288_n7900# c1_n13188_n13100# 58.61fF
-C64 m3_n2650_n7900# m3_n2650_n2600# 3.28fF
+C0 m3_n7969_n2600# c1_n13188_n13100# 58.86fF
+C1 m3_7988_n2600# m3_7988_n7900# 3.39fF
+C2 m3_2669_n7900# m3_7988_n7900# 2.73fF
+C3 m3_2669_2700# m3_7988_2700# 2.73fF
+C4 m3_n7969_n7900# m3_n2650_n7900# 2.73fF
+C5 m3_7988_8000# m3_7988_2700# 3.39fF
+C6 c1_n13188_n13100# m3_n2650_n7900# 58.86fF
+C7 m3_n7969_8000# m3_n7969_2700# 3.28fF
+C8 m3_2669_8000# m3_n2650_8000# 2.73fF
+C9 m3_n13288_8000# m3_n7969_8000# 2.73fF
+C10 m3_2669_8000# c1_n13188_n13100# 58.61fF
+C11 m3_n13288_n13200# c1_n13188_n13100# 58.36fF
+C12 m3_7988_n13200# m3_7988_n7900# 3.39fF
+C13 m3_n7969_n2600# m3_n7969_2700# 3.28fF
+C14 m3_2669_n7900# m3_n2650_n7900# 2.73fF
+C15 m3_n2650_8000# m3_n2650_2700# 3.28fF
+C16 m3_n2650_n13200# m3_n2650_n7900# 3.28fF
+C17 m3_n13288_n13200# m3_n7969_n13200# 2.73fF
+C18 m3_n13288_2700# m3_n13288_n2600# 3.28fF
+C19 c1_n13188_n13100# m3_n2650_2700# 58.86fF
+C20 m3_n7969_n2600# m3_n2650_n2600# 2.73fF
+C21 m3_n13288_2700# c1_n13188_n13100# 58.61fF
+C22 m3_n13288_n13200# m3_n13288_n7900# 3.28fF
+C23 m3_n2650_8000# c1_n13188_n13100# 58.61fF
+C24 m3_2669_n13200# c1_n13188_n13100# 58.61fF
+C25 c1_n13188_n13100# m3_2669_n2600# 58.86fF
+C26 c1_n13188_n13100# m3_n13288_n2600# 58.61fF
+C27 m3_n7969_n7900# c1_n13188_n13100# 58.86fF
+C28 m3_n2650_n2600# m3_n2650_n7900# 3.28fF
+C29 m3_n7969_n7900# m3_n7969_n13200# 3.28fF
+C30 c1_n13188_n13100# m3_n7969_n13200# 58.61fF
+C31 m3_2669_n2600# m3_7988_n2600# 2.73fF
+C32 c1_n13188_n13100# m3_7988_2700# 61.01fF
+C33 m3_2669_n7900# m3_2669_n13200# 3.28fF
+C34 m3_2669_8000# m3_2669_2700# 3.28fF
+C35 m3_n13288_n7900# m3_n13288_n2600# 3.28fF
+C36 m3_2669_n7900# m3_2669_n2600# 3.28fF
+C37 m3_7988_8000# m3_2669_8000# 2.73fF
+C38 c1_n13188_n13100# m3_7988_n2600# 61.01fF
+C39 m3_n7969_2700# m3_n2650_2700# 2.73fF
+C40 m3_n7969_n7900# m3_n13288_n7900# 2.73fF
+C41 m3_n2650_n13200# m3_2669_n13200# 2.73fF
+C42 c1_n13188_n13100# m3_n13288_n7900# 58.61fF
+C43 m3_n13288_2700# m3_n7969_2700# 2.73fF
+C44 m3_2669_n7900# c1_n13188_n13100# 58.86fF
+C45 m3_n2650_n13200# c1_n13188_n13100# 58.61fF
+C46 m3_n7969_8000# m3_n2650_8000# 2.73fF
+C47 m3_n13288_8000# m3_n13288_2700# 3.28fF
+C48 c1_n13188_n13100# m3_n7969_2700# 58.86fF
+C49 m3_7988_n2600# m3_7988_2700# 3.39fF
+C50 c1_n13188_n13100# m3_7988_n7900# 61.01fF
+C51 m3_2669_2700# m3_n2650_2700# 2.73fF
+C52 m3_n2650_n2600# m3_n2650_2700# 3.28fF
+C53 m3_n7969_8000# c1_n13188_n13100# 58.61fF
+C54 m3_n13288_8000# c1_n13188_n13100# 58.36fF
+C55 m3_n2650_n13200# m3_n7969_n13200# 2.73fF
+C56 m3_2669_2700# m3_2669_n2600# 3.28fF
+C57 m3_n2650_n2600# m3_2669_n2600# 2.73fF
+C58 m3_7988_n13200# m3_2669_n13200# 2.73fF
+C59 m3_2669_2700# c1_n13188_n13100# 58.86fF
+C60 m3_n2650_n2600# c1_n13188_n13100# 58.86fF
+C61 m3_n7969_n2600# m3_n13288_n2600# 2.73fF
+C62 m3_7988_8000# c1_n13188_n13100# 60.75fF
+C63 m3_7988_n13200# c1_n13188_n13100# 60.75fF
+C64 m3_n7969_n2600# m3_n7969_n7900# 3.28fF
C65 c1_n13188_n13100# VSUBS 2.51fF
C66 m3_7988_n13200# VSUBS 12.57fF
C67 m3_2669_n13200# VSUBS 12.37fF
@@ -126,7 +126,7 @@
.subckt cap1_loop_filter VSUBS in out
Xsky130_fd_pr__cap_mim_m3_1_MACBVW_0 VSUBS out out out out out out out out out out
+ out out out out out out out out out out out in out out out out sky130_fd_pr__cap_mim_m3_1_MACBVW
-C0 out in 2.17fF
+C0 in out 2.17fF
C1 in VSUBS -10.03fF
C2 out VSUBS 62.40fF
.ends
@@ -143,25 +143,25 @@
X6 c1_n2050_n6300# m3_n2150_n2100# sky130_fd_pr__cap_mim_m3_1 l=2e+07u w=2e+07u
X7 c1_n2050_n6300# m3_n2150_n6400# sky130_fd_pr__cap_mim_m3_1 l=2e+07u w=2e+07u
X8 c1_n6369_n6300# m3_n6469_2200# sky130_fd_pr__cap_mim_m3_1 l=2e+07u w=2e+07u
-C0 m3_n2150_2200# m3_2169_n6400# 1.75fF
+C0 m3_n2150_n6400# c1_n2050_n6300# 38.10fF
C1 m3_n2150_2200# c1_n2050_n6300# 38.10fF
-C2 m3_2169_n6400# m3_n2150_n2100# 1.75fF
-C3 c1_n6369_n6300# m3_n6469_2200# 38.10fF
-C4 m3_n6469_n6400# c1_n6369_n6300# 38.10fF
-C5 m3_n6469_n6400# m3_n2150_n6400# 1.75fF
-C6 c1_n2050_n6300# m3_n2150_n2100# 38.10fF
-C7 m3_n2150_n2100# m3_n2150_n6400# 2.63fF
-C8 m3_2169_n6400# m3_n2150_n6400# 1.75fF
-C9 c1_n6369_n6300# c1_n2050_n6300# 1.99fF
-C10 c1_n2050_n6300# m3_n2150_n6400# 38.10fF
-C11 m3_n6469_n2100# m3_n6469_2200# 2.63fF
-C12 m3_n6469_n6400# m3_n6469_n2100# 2.63fF
-C13 m3_n6469_n2100# m3_n2150_n2100# 1.75fF
-C14 m3_n2150_2200# m3_n6469_2200# 1.75fF
-C15 m3_2169_n6400# c1_2269_n6300# 121.67fF
+C2 c1_n6369_n6300# c1_n2050_n6300# 1.99fF
+C3 c1_2269_n6300# c1_n2050_n6300# 1.99fF
+C4 m3_2169_n6400# m3_n2150_n6400# 1.75fF
+C5 m3_2169_n6400# m3_n2150_2200# 1.75fF
+C6 m3_2169_n6400# c1_2269_n6300# 121.67fF
+C7 m3_n6469_n2100# m3_n6469_2200# 2.63fF
+C8 m3_n6469_n2100# m3_n6469_n6400# 2.63fF
+C9 m3_n6469_n2100# m3_n2150_n2100# 1.75fF
+C10 m3_n2150_n2100# c1_n2050_n6300# 38.10fF
+C11 m3_2169_n6400# m3_n2150_n2100# 1.75fF
+C12 m3_n6469_2200# m3_n2150_2200# 1.75fF
+C13 m3_n6469_n6400# m3_n2150_n6400# 1.75fF
+C14 m3_n2150_n2100# m3_n2150_n6400# 2.63fF
+C15 m3_n6469_2200# c1_n6369_n6300# 38.10fF
C16 m3_n2150_2200# m3_n2150_n2100# 2.63fF
-C17 m3_n6469_n2100# c1_n6369_n6300# 38.10fF
-C18 c1_n2050_n6300# c1_2269_n6300# 1.99fF
+C17 m3_n6469_n6400# c1_n6369_n6300# 38.10fF
+C18 m3_n6469_n2100# c1_n6369_n6300# 38.10fF
C19 c1_2269_n6300# VSUBS 0.16fF
C20 c1_n2050_n6300# VSUBS 0.16fF
C21 c1_n6369_n6300# VSUBS 0.16fF
@@ -176,7 +176,7 @@
.subckt cap2_loop_filter VSUBS in out
Xsky130_fd_pr__cap_mim_m3_1_W3JTNJ_0 VSUBS out in out out in out out in out out sky130_fd_pr__cap_mim_m3_1_W3JTNJ
-C0 in out 8.08fF
+C0 out in 8.08fF
C1 in VSUBS -16.59fF
C2 out VSUBS 13.00fF
.ends
@@ -218,17 +218,17 @@
X7 a_n1861_n486# a_n2261_n512# a_n2319_n486# w_n2457_n634# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=4.5e+06u l=2e+06u
X8 a_n29_n486# a_n2261_n512# a_n487_n486# w_n2457_n634# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=4.5e+06u l=2e+06u
X9 a_1345_n486# a_n2261_n512# a_887_n486# w_n2457_n634# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=4.5e+06u l=2e+06u
-C0 w_n2457_n634# a_n945_n486# 0.02fF
-C1 w_n2457_n634# a_429_n486# 0.02fF
-C2 w_n2457_n634# a_n487_n486# 0.02fF
-C3 w_n2457_n634# a_n2319_n486# 0.02fF
-C4 w_n2457_n634# a_1345_n486# 0.02fF
-C5 w_n2457_n634# a_n29_n486# 0.02fF
-C6 w_n2457_n634# a_n1403_n486# 0.02fF
-C7 w_n2457_n634# a_1803_n486# 0.02fF
-C8 w_n2457_n634# a_2261_n486# 0.02fF
-C9 w_n2457_n634# a_n1861_n486# 0.02fF
-C10 w_n2457_n634# a_887_n486# 0.02fF
+C0 w_n2457_n634# a_n1403_n486# 0.02fF
+C1 w_n2457_n634# a_1345_n486# 0.02fF
+C2 w_n2457_n634# a_n1861_n486# 0.02fF
+C3 w_n2457_n634# a_2261_n486# 0.02fF
+C4 w_n2457_n634# a_1803_n486# 0.02fF
+C5 w_n2457_n634# a_n2319_n486# 0.02fF
+C6 w_n2457_n634# a_n945_n486# 0.02fF
+C7 w_n2457_n634# a_n487_n486# 0.02fF
+C8 w_n2457_n634# a_887_n486# 0.02fF
+C9 w_n2457_n634# a_429_n486# 0.02fF
+C10 w_n2457_n634# a_n29_n486# 0.02fF
C11 a_2261_n486# VSUBS 0.03fF
C12 a_1803_n486# VSUBS 0.03fF
C13 a_1345_n486# VSUBS 0.03fF
@@ -274,100 +274,100 @@
X22 a_111_n75# a_n1167_n101# a_15_n75# w_n1367_n285# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=750000u l=150000u
X23 a_n273_n75# a_n1167_n101# a_n369_n75# w_n1367_n285# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=750000u l=150000u
X24 a_n177_n75# a_n1167_n101# a_n273_n75# w_n1367_n285# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=750000u l=150000u
-C0 a_n1041_n75# a_n849_n75# 0.08fF
-C1 a_n657_n75# a_n561_n75# 0.22fF
-C2 a_n945_n75# a_n561_n75# 0.03fF
-C3 a_495_n75# a_207_n75# 0.05fF
-C4 a_n369_n75# a_n465_n75# 0.22fF
-C5 a_591_n75# a_879_n75# 0.05fF
-C6 a_n657_n75# a_n849_n75# 0.08fF
-C7 a_n945_n75# a_n849_n75# 0.22fF
-C8 a_n753_n75# a_n1041_n75# 0.05fF
-C9 a_399_n75# a_15_n75# 0.03fF
-C10 a_n657_n75# a_n753_n75# 0.22fF
-C11 a_n945_n75# a_n753_n75# 0.08fF
-C12 a_n177_n75# a_n369_n75# 0.08fF
-C13 a_n849_n75# a_n1229_n75# 0.03fF
-C14 a_399_n75# a_111_n75# 0.05fF
-C15 a_15_n75# a_n369_n75# 0.03fF
-C16 a_n273_n75# a_n561_n75# 0.05fF
-C17 a_975_n75# a_1167_n75# 0.08fF
-C18 a_1071_n75# a_879_n75# 0.08fF
-C19 a_n657_n75# a_n369_n75# 0.05fF
-C20 a_495_n75# a_879_n75# 0.03fF
-C21 a_687_n75# a_879_n75# 0.08fF
-C22 a_495_n75# a_111_n75# 0.03fF
-C23 a_975_n75# a_591_n75# 0.03fF
-C24 a_879_n75# a_783_n75# 0.22fF
-C25 a_n81_n75# a_n369_n75# 0.05fF
-C26 a_n177_n75# a_n465_n75# 0.05fF
-C27 a_591_n75# a_303_n75# 0.05fF
-C28 a_n177_n75# a_207_n75# 0.03fF
-C29 a_n1137_n75# a_n1041_n75# 0.22fF
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-C34 a_975_n75# a_1071_n75# 0.22fF
-C35 a_n657_n75# a_n465_n75# 0.08fF
-C36 a_975_n75# a_687_n75# 0.05fF
-C37 a_n177_n75# a_15_n75# 0.08fF
-C38 a_975_n75# a_783_n75# 0.08fF
-C39 a_495_n75# a_303_n75# 0.08fF
-C40 a_n1137_n75# a_n1229_n75# 0.22fF
-C41 a_111_n75# a_207_n75# 0.22fF
-C42 a_687_n75# a_303_n75# 0.03fF
-C43 a_n81_n75# a_n465_n75# 0.03fF
-C44 a_n561_n75# a_n849_n75# 0.05fF
-C45 a_n81_n75# a_207_n75# 0.05fF
-C46 a_n657_n75# a_n1041_n75# 0.03fF
-C47 a_n177_n75# a_111_n75# 0.05fF
-C48 a_n945_n75# a_n1041_n75# 0.22fF
-C49 a_n753_n75# a_n561_n75# 0.08fF
-C50 a_399_n75# a_591_n75# 0.08fF
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C52 a_n81_n75# a_n177_n75# 0.22fF
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-C59 a_n273_n75# a_n177_n75# 0.22fF
-C60 a_n81_n75# a_15_n75# 0.22fF
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-C62 a_1167_n75# a_783_n75# 0.03fF
-C63 a_n561_n75# a_n369_n75# 0.08fF
-C64 a_n945_n75# a_n1229_n75# 0.05fF
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+C82 a_n1137_n75# a_n753_n75# 0.03fF
+C83 a_687_n75# a_399_n75# 0.05fF
+C84 a_n465_n75# a_n369_n75# 0.22fF
+C85 a_495_n75# a_591_n75# 0.22fF
+C86 a_111_n75# a_15_n75# 0.22fF
+C87 a_n1041_n75# a_n1229_n75# 0.08fF
+C88 a_687_n75# a_879_n75# 0.08fF
+C89 a_n81_n75# a_15_n75# 0.22fF
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C94 a_1167_n75# w_n1367_n285# 0.10fF
C95 a_1071_n75# w_n1367_n285# 0.07fF
C96 a_975_n75# w_n1367_n285# 0.06fF
@@ -421,81 +421,81 @@
X17 a_n129_n75# a_n927_n101# a_n225_n75# w_n1127_n285# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=750000u l=150000u
X18 a_n897_n75# a_n927_n101# a_n989_n75# w_n1127_n285# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=750000u l=150000u
X19 a_n609_n75# a_n927_n101# a_n705_n75# w_n1127_n285# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=750000u l=150000u
-C0 a_543_n75# a_639_n75# 0.22fF
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C76 a_831_n150# VSUBS 0.03fF
C77 a_735_n150# VSUBS 0.03fF
@@ -659,16 +659,16 @@
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X9 a_n1461_n44# a_n1761_n132# a_n1819_n44# w_n1957_n254# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=750000u l=1.5e+06u
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-C3 a_n177_n150# a_n369_n150# 0.16fF
-C4 a_n849_n150# a_n465_n150# 0.07fF
-C5 a_n1041_n150# a_n1229_n150# 0.16fF
-C6 a_495_n150# a_399_n150# 0.43fF
-C7 a_n945_n150# a_n1229_n150# 0.10fF
-C8 a_783_n150# a_1071_n150# 0.10fF
-C9 w_n1367_n369# a_879_n150# 0.04fF
-C10 a_n753_n150# a_n849_n150# 0.43fF
-C11 a_n81_n150# a_207_n150# 0.10fF
-C12 a_207_n150# a_399_n150# 0.16fF
-C13 a_111_n150# a_303_n150# 0.16fF
-C14 a_303_n150# a_495_n150# 0.16fF
-C15 a_n465_n150# a_n657_n150# 0.16fF
-C16 a_303_n150# a_207_n150# 0.43fF
-C17 w_n1367_n369# a_975_n150# 0.05fF
-C18 a_591_n150# a_495_n150# 0.43fF
-C19 a_n753_n150# a_n657_n150# 0.43fF
-C20 a_879_n150# a_495_n150# 0.07fF
-C21 a_n1041_n150# a_n849_n150# 0.16fF
-C22 a_n177_n150# a_15_n150# 0.16fF
-C23 a_n849_n150# a_n945_n150# 0.43fF
-C24 a_n177_n150# a_n465_n150# 0.10fF
-C25 a_591_n150# a_207_n150# 0.07fF
-C26 a_n273_n150# a_n657_n150# 0.07fF
-C27 a_687_n150# a_495_n150# 0.16fF
-C28 a_1167_n150# a_879_n150# 0.10fF
-C29 a_n177_n150# a_n273_n150# 0.43fF
-C30 a_n1041_n150# a_n657_n150# 0.07fF
-C31 a_n945_n150# a_n657_n150# 0.10fF
-C32 a_n1137_n150# a_n753_n150# 0.07fF
-C33 a_783_n150# a_495_n150# 0.10fF
-C34 a_303_n150# a_n81_n150# 0.07fF
-C35 a_303_n150# a_399_n150# 0.43fF
-C36 a_15_n150# a_n369_n150# 0.07fF
-C37 a_n369_n150# a_n465_n150# 0.43fF
-C38 a_1167_n150# a_975_n150# 0.16fF
-C39 a_n177_n150# a_111_n150# 0.10fF
-C40 a_n753_n150# a_n369_n150# 0.07fF
-C41 a_591_n150# a_399_n150# 0.16fF
-C42 a_n849_n150# a_n561_n150# 0.10fF
-C43 a_783_n150# a_1167_n150# 0.07fF
-C44 a_n273_n150# a_n369_n150# 0.43fF
-C45 a_n1137_n150# a_n1041_n150# 0.43fF
-C46 a_n1137_n150# a_n945_n150# 0.16fF
-C47 a_n177_n150# a_207_n150# 0.07fF
-C48 a_687_n150# a_399_n150# 0.10fF
-C49 a_n849_n150# a_n1229_n150# 0.07fF
-C50 a_303_n150# a_591_n150# 0.10fF
-C51 a_n561_n150# a_n657_n150# 0.43fF
-C52 a_303_n150# a_687_n150# 0.07fF
-C53 w_n1367_n369# a_1071_n150# 0.07fF
-C54 a_783_n150# a_399_n150# 0.07fF
-C55 a_879_n150# a_591_n150# 0.10fF
-C56 a_n753_n150# a_n465_n150# 0.10fF
-C57 a_n177_n150# a_n561_n150# 0.07fF
-C58 a_687_n150# a_591_n150# 0.43fF
-C59 a_n273_n150# a_15_n150# 0.10fF
-C60 a_n273_n150# a_n465_n150# 0.16fF
-C61 a_687_n150# a_879_n150# 0.16fF
-C62 a_n177_n150# a_n81_n150# 0.43fF
-C63 a_591_n150# a_975_n150# 0.07fF
-C64 a_879_n150# a_975_n150# 0.43fF
-C65 a_783_n150# a_591_n150# 0.16fF
-C66 a_783_n150# a_879_n150# 0.43fF
-C67 a_687_n150# a_975_n150# 0.10fF
-C68 a_n1137_n150# a_n1229_n150# 0.43fF
-C69 a_111_n150# a_15_n150# 0.43fF
-C70 a_n369_n150# a_n561_n150# 0.16fF
-C71 a_n1041_n150# a_n753_n150# 0.10fF
-C72 a_n849_n150# a_n657_n150# 0.16fF
-C73 a_n753_n150# a_n945_n150# 0.16fF
-C74 a_783_n150# a_687_n150# 0.43fF
-C75 a_n369_n150# a_n81_n150# 0.10fF
-C76 a_1167_n150# a_1071_n150# 0.43fF
-C77 a_15_n150# a_207_n150# 0.16fF
-C78 a_783_n150# a_975_n150# 0.16fF
-C79 a_111_n150# a_n273_n150# 0.07fF
-C80 a_n1041_n150# a_n945_n150# 0.43fF
-C81 a_n1137_n150# a_n849_n150# 0.10fF
-C82 a_1167_n150# w_n1367_n369# 0.14fF
-C83 a_111_n150# a_495_n150# 0.07fF
-C84 a_n465_n150# a_n561_n150# 0.43fF
-C85 a_15_n150# a_n81_n150# 0.43fF
-C86 a_n81_n150# a_n465_n150# 0.07fF
-C87 a_15_n150# a_399_n150# 0.07fF
-C88 a_111_n150# a_207_n150# 0.43fF
-C89 a_n753_n150# a_n561_n150# 0.16fF
-C90 a_495_n150# a_207_n150# 0.10fF
-C91 a_n273_n150# a_n561_n150# 0.10fF
-C92 a_303_n150# a_15_n150# 0.10fF
-C93 a_n273_n150# a_n81_n150# 0.16fF
-C94 a_879_n150# a_1071_n150# 0.16fF
-C95 a_n369_n150# a_n657_n150# 0.10fF
-C96 a_n945_n150# a_n561_n150# 0.07fF
-C97 a_687_n150# a_1071_n150# 0.07fF
+C0 a_399_n150# a_207_n150# 0.16fF
+C1 a_n657_n150# a_n849_n150# 0.16fF
+C2 a_1167_n150# w_n1367_n369# 0.14fF
+C3 a_n369_n150# a_15_n150# 0.07fF
+C4 a_n1137_n150# a_n849_n150# 0.10fF
+C5 a_n177_n150# a_207_n150# 0.07fF
+C6 a_111_n150# a_303_n150# 0.16fF
+C7 a_495_n150# a_303_n150# 0.16fF
+C8 a_111_n150# a_207_n150# 0.43fF
+C9 a_399_n150# a_783_n150# 0.07fF
+C10 a_n177_n150# a_n273_n150# 0.43fF
+C11 a_495_n150# a_207_n150# 0.10fF
+C12 a_n657_n150# a_n753_n150# 0.43fF
+C13 a_687_n150# a_975_n150# 0.10fF
+C14 a_111_n150# a_n273_n150# 0.07fF
+C15 a_n1137_n150# a_n1229_n150# 0.43fF
+C16 a_879_n150# a_783_n150# 0.43fF
+C17 a_975_n150# a_591_n150# 0.07fF
+C18 a_975_n150# w_n1367_n369# 0.05fF
+C19 a_n1137_n150# a_n753_n150# 0.07fF
+C20 a_n81_n150# a_n369_n150# 0.10fF
+C21 a_n1229_n150# a_n849_n150# 0.07fF
+C22 a_n81_n150# a_n465_n150# 0.07fF
+C23 a_303_n150# a_15_n150# 0.10fF
+C24 a_207_n150# a_15_n150# 0.16fF
+C25 a_1071_n150# a_783_n150# 0.10fF
+C26 a_n753_n150# a_n849_n150# 0.43fF
+C27 a_n273_n150# a_15_n150# 0.10fF
+C28 a_495_n150# a_783_n150# 0.10fF
+C29 a_111_n150# a_399_n150# 0.10fF
+C30 a_879_n150# a_1071_n150# 0.16fF
+C31 a_495_n150# a_399_n150# 0.43fF
+C32 a_n1041_n150# a_n945_n150# 0.43fF
+C33 a_1167_n150# a_783_n150# 0.07fF
+C34 a_n81_n150# a_303_n150# 0.07fF
+C35 a_687_n150# a_591_n150# 0.43fF
+C36 a_495_n150# a_879_n150# 0.07fF
+C37 a_n81_n150# a_207_n150# 0.10fF
+C38 a_n561_n150# a_n945_n150# 0.07fF
+C39 a_n81_n150# a_n273_n150# 0.16fF
+C40 a_879_n150# a_1167_n150# 0.10fF
+C41 a_n177_n150# a_111_n150# 0.10fF
+C42 a_399_n150# a_15_n150# 0.07fF
+C43 a_n465_n150# a_n369_n150# 0.43fF
+C44 a_n561_n150# a_n369_n150# 0.16fF
+C45 a_495_n150# a_111_n150# 0.07fF
+C46 a_n465_n150# a_n561_n150# 0.43fF
+C47 a_975_n150# a_783_n150# 0.16fF
+C48 a_1071_n150# a_1167_n150# 0.43fF
+C49 a_687_n150# a_303_n150# 0.07fF
+C50 a_n177_n150# a_15_n150# 0.16fF
+C51 a_591_n150# a_303_n150# 0.10fF
+C52 a_111_n150# a_15_n150# 0.43fF
+C53 a_591_n150# a_207_n150# 0.07fF
+C54 a_879_n150# a_975_n150# 0.43fF
+C55 a_n657_n150# a_n945_n150# 0.10fF
+C56 a_n273_n150# a_n369_n150# 0.43fF
+C57 a_n1137_n150# a_n945_n150# 0.16fF
+C58 a_n657_n150# a_n1041_n150# 0.07fF
+C59 a_n465_n150# a_n273_n150# 0.16fF
+C60 a_n657_n150# a_n369_n150# 0.10fF
+C61 a_1071_n150# a_975_n150# 0.43fF
+C62 a_n561_n150# a_n273_n150# 0.10fF
+C63 a_n177_n150# a_n81_n150# 0.43fF
+C64 a_n657_n150# a_n465_n150# 0.16fF
+C65 a_n1137_n150# a_n1041_n150# 0.43fF
+C66 a_n849_n150# a_n945_n150# 0.43fF
+C67 a_687_n150# a_783_n150# 0.43fF
+C68 a_n657_n150# a_n561_n150# 0.43fF
+C69 a_111_n150# a_n81_n150# 0.16fF
+C70 a_591_n150# a_783_n150# 0.16fF
+C71 a_687_n150# a_399_n150# 0.10fF
+C72 a_n1041_n150# a_n849_n150# 0.16fF
+C73 a_303_n150# a_207_n150# 0.43fF
+C74 a_399_n150# a_591_n150# 0.16fF
+C75 a_879_n150# a_687_n150# 0.16fF
+C76 a_975_n150# a_1167_n150# 0.16fF
+C77 a_n1229_n150# a_n945_n150# 0.10fF
+C78 a_n465_n150# a_n849_n150# 0.07fF
+C79 a_879_n150# a_591_n150# 0.10fF
+C80 a_n561_n150# a_n849_n150# 0.10fF
+C81 a_879_n150# w_n1367_n369# 0.04fF
+C82 a_n753_n150# a_n945_n150# 0.16fF
+C83 a_n81_n150# a_15_n150# 0.43fF
+C84 a_n1041_n150# a_n1229_n150# 0.16fF
+C85 a_687_n150# a_1071_n150# 0.07fF
+C86 a_n753_n150# a_n1041_n150# 0.10fF
+C87 a_n657_n150# a_n273_n150# 0.07fF
+C88 a_n753_n150# a_n369_n150# 0.07fF
+C89 a_1071_n150# w_n1367_n369# 0.07fF
+C90 a_495_n150# a_687_n150# 0.16fF
+C91 a_n177_n150# a_n369_n150# 0.16fF
+C92 a_n465_n150# a_n753_n150# 0.10fF
+C93 a_n177_n150# a_n465_n150# 0.10fF
+C94 a_495_n150# a_591_n150# 0.43fF
+C95 a_n753_n150# a_n561_n150# 0.16fF
+C96 a_399_n150# a_303_n150# 0.43fF
+C97 a_n177_n150# a_n561_n150# 0.07fF
C98 a_1167_n150# VSUBS 0.03fF
C99 a_1071_n150# VSUBS 0.03fF
C100 a_975_n150# VSUBS 0.03fF
@@ -842,7 +842,7 @@
.ends
.subckt charge_pump vss pswitch nswitch out vdd biasp nUp Down w_2544_775# iref nDown
-+ Up
++ Up w_1008_774#
Xsky130_fd_pr__pfet_01v8_4ML9WA_0 vss pswitch vdd pswitch pswitch pswitch nUp pswitch
+ pswitch pswitch pswitch pswitch pswitch pswitch sky130_fd_pr__pfet_01v8_4ML9WA
Xsky130_fd_pr__nfet_01v8_YCGG98_0 vss out out vss vss vss out out vss vss out vss
@@ -865,25 +865,25 @@
Xsky130_fd_pr__pfet_01v8_ND88ZC_1 vss biasp vdd vdd vdd vdd biasp vdd biasp vdd biasp
+ biasp biasp biasp vdd vdd biasp biasp vdd vdd biasp biasp biasp vdd vdd vdd vdd
+ biasp biasp sky130_fd_pr__pfet_01v8_ND88ZC
-C0 vdd pswitch 3.98fF
-C1 biasp pswitch 3.11fF
-C2 vdd out 6.66fF
-C3 iref nswitch 1.91fF
-C4 nDown nswitch 0.31fF
-C5 pswitch nswitch 0.06fF
-C6 out nswitch 1.28fF
-C7 Down nswitch 2.27fF
-C8 vdd biasp 2.64fF
-C9 out pswitch 4.91fF
-C10 Down nDown 0.13fF
-C11 Up pswitch 0.70fF
-C12 nUp pswitch 5.66fF
-C13 nUp out 0.31fF
-C14 nUp Up 0.15fF
-C15 nUp Down 0.25fF
-C16 vdd nswitch 0.07fF
-C17 biasp nswitch 0.03fF
-C18 biasp iref 0.80fF
+C0 Down nswitch 2.27fF
+C1 Up nUp 0.15fF
+C2 pswitch Up 0.70fF
+C3 pswitch nUp 5.66fF
+C4 pswitch biasp 3.11fF
+C5 Down nUp 0.25fF
+C6 out vdd 6.66fF
+C7 nDown nswitch 0.31fF
+C8 iref nswitch 1.91fF
+C9 nswitch vdd 0.07fF
+C10 out nswitch 1.28fF
+C11 iref biasp 0.80fF
+C12 vdd biasp 2.64fF
+C13 out nUp 0.31fF
+C14 pswitch vdd 3.98fF
+C15 nDown Down 0.13fF
+C16 pswitch out 4.91fF
+C17 nswitch biasp 0.03fF
+C18 pswitch nswitch 0.06fF
C19 vdd vss 35.71fF
C20 Down vss 4.77fF
C21 Up vss 1.17fF
@@ -901,18 +901,18 @@
X0 a_n81_n125# a_n111_n156# a_n173_n125# w_n311_n344# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X1 a_15_n125# a_n15_n156# a_n81_n125# w_n311_n344# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X2 a_111_n125# a_81_n156# a_15_n125# w_n311_n344# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
-C0 a_n173_n125# a_15_n125# 0.13fF
-C1 w_n311_n344# a_15_n125# 0.09fF
-C2 a_n111_n156# a_n15_n156# 0.02fF
-C3 a_n173_n125# a_111_n125# 0.08fF
-C4 w_n311_n344# a_111_n125# 0.14fF
-C5 a_n173_n125# w_n311_n344# 0.14fF
-C6 a_n81_n125# a_15_n125# 0.36fF
-C7 a_n81_n125# a_111_n125# 0.13fF
-C8 a_n173_n125# a_n81_n125# 0.36fF
-C9 w_n311_n344# a_n81_n125# 0.09fF
-C10 a_n15_n156# a_81_n156# 0.02fF
-C11 a_15_n125# a_111_n125# 0.36fF
+C0 w_n311_n344# a_n81_n125# 0.09fF
+C1 a_n173_n125# a_n81_n125# 0.36fF
+C2 a_111_n125# w_n311_n344# 0.14fF
+C3 a_111_n125# a_n173_n125# 0.08fF
+C4 a_111_n125# a_n81_n125# 0.13fF
+C5 a_81_n156# a_n15_n156# 0.02fF
+C6 w_n311_n344# a_15_n125# 0.09fF
+C7 a_15_n125# a_n173_n125# 0.13fF
+C8 w_n311_n344# a_n173_n125# 0.14fF
+C9 a_15_n125# a_n81_n125# 0.36fF
+C10 a_n111_n156# a_n15_n156# 0.02fF
+C11 a_111_n125# a_15_n125# 0.36fF
C12 a_111_n125# VSUBS 0.03fF
C13 a_15_n125# VSUBS 0.03fF
C14 a_n81_n125# VSUBS 0.03fF
@@ -928,14 +928,14 @@
X0 a_111_n125# a_81_n151# a_15_n125# w_n311_n335# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X1 a_n81_n125# a_n111_n151# a_n173_n125# w_n311_n335# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X2 a_15_n125# a_n15_n151# a_n81_n125# w_n311_n335# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
-C0 a_111_n125# a_n173_n125# 0.08fF
-C1 a_111_n125# a_n81_n125# 0.13fF
-C2 a_111_n125# a_15_n125# 0.36fF
+C0 a_15_n125# a_n81_n125# 0.36fF
+C1 a_15_n125# a_111_n125# 0.36fF
+C2 a_n173_n125# a_n81_n125# 0.36fF
C3 a_n15_n151# a_81_n151# 0.02fF
-C4 a_n111_n151# a_n15_n151# 0.02fF
-C5 a_n81_n125# a_n173_n125# 0.36fF
-C6 a_15_n125# a_n173_n125# 0.13fF
-C7 a_n81_n125# a_15_n125# 0.36fF
+C4 a_n173_n125# a_111_n125# 0.08fF
+C5 a_n15_n151# a_n111_n151# 0.02fF
+C6 a_n173_n125# a_15_n125# 0.13fF
+C7 a_111_n125# a_n81_n125# 0.13fF
C8 a_111_n125# w_n311_n335# 0.17fF
C9 a_15_n125# w_n311_n335# 0.12fF
C10 a_n81_n125# w_n311_n335# 0.12fF
@@ -950,9 +950,9 @@
+ vss vss m1_187_n605# sky130_fd_pr__pfet_01v8_4798MH
Xsky130_fd_pr__nfet_01v8_BHR94T_0 vdd vss vdd m1_187_n605# m1_45_n513# m1_45_n513#
+ vdd m1_187_n605# sky130_fd_pr__nfet_01v8_BHR94T
-C0 m1_187_n605# vdd 0.55fF
+C0 m1_45_n513# m1_187_n605# 0.36fF
C1 m1_45_n513# vdd 0.69fF
-C2 m1_187_n605# m1_45_n513# 0.36fF
+C2 vdd m1_187_n605# 0.55fF
C3 m1_187_n605# vss 0.93fF
C4 m1_45_n513# vss 1.31fF
C5 vdd vss 3.36fF
@@ -963,16 +963,16 @@
X0 a_n81_n125# a_n111_n186# a_n173_n125# w_n311_n344# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X1 a_15_n125# a_n111_n186# a_n81_n125# w_n311_n344# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X2 a_111_n125# a_n111_n186# a_15_n125# w_n311_n344# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
-C0 w_n311_n344# a_111_n125# 0.14fF
-C1 a_n173_n125# w_n311_n344# 0.14fF
-C2 a_15_n125# w_n311_n344# 0.09fF
-C3 a_n81_n125# a_111_n125# 0.13fF
-C4 a_n173_n125# a_n81_n125# 0.36fF
-C5 a_15_n125# a_n81_n125# 0.36fF
-C6 a_n173_n125# a_111_n125# 0.08fF
-C7 a_15_n125# a_111_n125# 0.36fF
-C8 a_15_n125# a_n173_n125# 0.13fF
-C9 a_n81_n125# w_n311_n344# 0.09fF
+C0 a_111_n125# w_n311_n344# 0.14fF
+C1 a_n173_n125# a_n81_n125# 0.36fF
+C2 a_n173_n125# a_15_n125# 0.13fF
+C3 a_111_n125# a_n173_n125# 0.08fF
+C4 a_15_n125# a_n81_n125# 0.36fF
+C5 a_n173_n125# w_n311_n344# 0.14fF
+C6 a_111_n125# a_n81_n125# 0.13fF
+C7 a_n81_n125# w_n311_n344# 0.09fF
+C8 a_111_n125# a_15_n125# 0.36fF
+C9 a_15_n125# w_n311_n344# 0.09fF
C10 a_111_n125# VSUBS 0.03fF
C11 a_15_n125# VSUBS 0.03fF
C12 a_n81_n125# VSUBS 0.03fF
@@ -987,11 +987,11 @@
X1 a_n81_n125# a_n111_n151# a_n173_n125# w_n311_n335# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X2 a_15_n125# a_n111_n151# a_n81_n125# w_n311_n335# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
C0 a_n81_n125# a_15_n125# 0.36fF
-C1 a_111_n125# a_15_n125# 0.36fF
-C2 a_111_n125# a_n81_n125# 0.13fF
-C3 a_n173_n125# a_15_n125# 0.13fF
-C4 a_n81_n125# a_n173_n125# 0.36fF
-C5 a_111_n125# a_n173_n125# 0.08fF
+C1 a_n81_n125# a_111_n125# 0.13fF
+C2 a_n173_n125# a_n81_n125# 0.36fF
+C3 a_111_n125# a_15_n125# 0.36fF
+C4 a_n173_n125# a_15_n125# 0.13fF
+C5 a_n173_n125# a_111_n125# 0.08fF
C6 a_111_n125# w_n311_n335# 0.17fF
C7 a_15_n125# w_n311_n335# 0.12fF
C8 a_n81_n125# w_n311_n335# 0.12fF
@@ -1015,15 +1015,15 @@
Xinverter_cp_x1_0 inverter_cp_x1_0/out CLK vss vdd inverter_cp_x1
Xinverter_cp_x1_1 inverter_cp_x1_2/in CLK vss vdd inverter_cp_x1
Xinverter_cp_x1_2 CLK_d inverter_cp_x1_2/in vss vdd inverter_cp_x1
-C0 nCLK_d inverter_cp_x1_0/out 0.11fF
-C1 CLK inverter_cp_x1_0/out 0.31fF
-C2 nCLK_d vdd 0.03fF
-C3 inverter_cp_x1_0/out vdd 0.28fF
-C4 CLK inverter_cp_x1_2/in 0.31fF
-C5 CLK vdd 0.36fF
-C6 inverter_cp_x1_2/in vdd 0.21fF
-C7 CLK_d inverter_cp_x1_2/in 0.12fF
-C8 CLK_d vdd 0.03fF
+C0 nCLK_d vdd 0.03fF
+C1 inverter_cp_x1_2/in vdd 0.21fF
+C2 inverter_cp_x1_0/out CLK 0.31fF
+C3 inverter_cp_x1_0/out nCLK_d 0.11fF
+C4 inverter_cp_x1_2/in CLK_d 0.12fF
+C5 inverter_cp_x1_2/in CLK 0.31fF
+C6 inverter_cp_x1_0/out vdd 0.28fF
+C7 CLK_d vdd 0.03fF
+C8 CLK vdd 0.36fF
C9 CLK_d vss 0.96fF
C10 inverter_cp_x1_2/in vss 2.01fF
C11 inverter_cp_x1_0/out vss 1.97fF
@@ -1036,12 +1036,12 @@
+ a_n63_n192#
X0 a_63_n95# a_n63_n192# a_n33_n95# w_n263_n314# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=950000u l=150000u
X1 a_n33_n95# a_n63_n192# a_n125_n95# w_n263_n314# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=950000u l=150000u
-C0 a_n33_n95# w_n263_n314# 0.08fF
-C1 a_n33_n95# a_n125_n95# 0.28fF
-C2 a_n125_n95# w_n263_n314# 0.11fF
-C3 a_n33_n95# a_63_n95# 0.28fF
-C4 w_n263_n314# a_63_n95# 0.11fF
-C5 a_n125_n95# a_63_n95# 0.10fF
+C0 a_n125_n95# a_n33_n95# 0.28fF
+C1 a_n125_n95# w_n263_n314# 0.11fF
+C2 w_n263_n314# a_n33_n95# 0.08fF
+C3 a_n125_n95# a_63_n95# 0.10fF
+C4 a_63_n95# a_n33_n95# 0.28fF
+C5 a_63_n95# w_n263_n314# 0.11fF
C6 a_63_n95# VSUBS 0.03fF
C7 a_n33_n95# VSUBS 0.03fF
C8 a_n125_n95# VSUBS 0.03fF
@@ -1054,16 +1054,16 @@
X0 a_111_n125# a_n129_n213# a_15_n125# w_n311_n335# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X1 a_n81_n125# a_n129_n213# a_n173_n125# w_n311_n335# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X2 a_15_n125# a_n129_n213# a_n81_n125# w_n311_n335# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
-C0 a_15_n125# a_n129_n213# 0.10fF
-C1 a_15_n125# a_n81_n125# 0.36fF
+C0 a_n173_n125# a_n129_n213# 0.02fF
+C1 a_n81_n125# a_15_n125# 0.36fF
C2 a_n81_n125# a_n129_n213# 0.10fF
-C3 a_n173_n125# a_111_n125# 0.08fF
-C4 a_15_n125# a_n173_n125# 0.13fF
-C5 a_n173_n125# a_n129_n213# 0.02fF
+C3 a_n129_n213# a_15_n125# 0.10fF
+C4 a_n173_n125# a_111_n125# 0.08fF
+C5 a_n81_n125# a_111_n125# 0.13fF
C6 a_n173_n125# a_n81_n125# 0.36fF
-C7 a_15_n125# a_111_n125# 0.36fF
-C8 a_n129_n213# a_111_n125# 0.01fF
-C9 a_n81_n125# a_111_n125# 0.13fF
+C7 a_111_n125# a_15_n125# 0.36fF
+C8 a_111_n125# a_n129_n213# 0.01fF
+C9 a_n173_n125# a_15_n125# 0.13fF
C10 a_111_n125# w_n311_n335# 0.05fF
C11 a_15_n125# w_n311_n335# 0.05fF
C12 a_n81_n125# w_n311_n335# 0.05fF
@@ -1074,8 +1074,8 @@
.subckt sky130_fd_pr__nfet_01v8_KU9PSX a_n125_n95# a_n33_n95# a_n81_n183# w_n263_n305#
X0 a_n33_n95# a_n81_n183# a_n125_n95# w_n263_n305# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=950000u l=150000u
X1 a_n125_n95# a_n81_n183# a_n33_n95# w_n263_n305# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=950000u l=150000u
-C0 a_n33_n95# a_n81_n183# 0.10fF
-C1 a_n125_n95# a_n81_n183# 0.16fF
+C0 a_n125_n95# a_n81_n183# 0.16fF
+C1 a_n33_n95# a_n81_n183# 0.10fF
C2 a_n125_n95# a_n33_n95# 0.88fF
C3 a_n33_n95# w_n263_n305# 0.07fF
C4 a_n125_n95# w_n263_n305# 0.13fF
@@ -1088,16 +1088,16 @@
Xsky130_fd_pr__nfet_01v8_2BS854_0 vss CLK vss m1_657_280# m1_657_280# vss sky130_fd_pr__nfet_01v8_2BS854
Xsky130_fd_pr__nfet_01v8_KU9PSX_0 m1_657_280# Q nD vss sky130_fd_pr__nfet_01v8_KU9PSX
Xsky130_fd_pr__nfet_01v8_KU9PSX_1 m1_657_280# nQ D vss sky130_fd_pr__nfet_01v8_KU9PSX
-C0 nQ D 0.05fF
-C1 nQ nD 0.05fF
-C2 Q vdd 0.16fF
-C3 m1_657_280# Q 0.94fF
-C4 nQ Q 0.93fF
-C5 nQ vdd 0.16fF
-C6 m1_657_280# nQ 1.41fF
-C7 m1_657_280# CLK 0.24fF
+C0 m1_657_280# CLK 0.24fF
+C1 m1_657_280# Q 0.94fF
+C2 nQ D 0.05fF
+C3 nQ m1_657_280# 1.41fF
+C4 nD Q 0.05fF
+C5 nQ Q 0.93fF
+C6 vdd Q 0.16fF
+C7 nQ nD 0.05fF
C8 Q D 0.05fF
-C9 Q nD 0.05fF
+C9 nQ vdd 0.16fF
C10 nQ vss 1.16fF
C11 D vss 0.53fF
C12 Q vss -0.55fF
@@ -1116,25 +1116,25 @@
+ latch_diff_0/nD latch_diff_0/D latch_diff
Xlatch_diff_1 latch_diff_1/m1_657_280# nQ Q vss nCLK vdd latch_diff_1/nD latch_diff_1/D
+ latch_diff
-C0 latch_diff_1/D vdd 0.03fF
-C1 nQ latch_diff_1/D 0.11fF
-C2 latch_diff_1/nD latch_diff_0/D 0.04fF
-C3 latch_diff_0/m1_657_280# latch_diff_0/D 0.37fF
-C4 latch_diff_1/m1_657_280# latch_diff_1/D 0.32fF
-C5 latch_diff_0/m1_657_280# latch_diff_1/nD 0.14fF
-C6 latch_diff_0/m1_657_280# latch_diff_0/nD 0.38fF
-C7 Q latch_diff_1/nD 0.01fF
-C8 latch_diff_1/D latch_diff_0/D 0.11fF
-C9 latch_diff_0/D vdd 0.09fF
-C10 latch_diff_1/D latch_diff_1/nD 0.33fF
-C11 latch_diff_0/m1_657_280# latch_diff_1/D 0.43fF
-C12 latch_diff_1/D latch_diff_0/nD 0.41fF
-C13 latch_diff_1/nD vdd 0.02fF
-C14 nQ latch_diff_1/nD 0.08fF
-C15 latch_diff_0/nD vdd 0.14fF
-C16 latch_diff_1/m1_657_280# latch_diff_1/nD 0.42fF
-C17 latch_diff_0/m1_657_280# latch_diff_1/m1_657_280# 0.18fF
-C18 clock_inverter_0/inverter_cp_x1_0/out vdd 0.03fF
+C0 latch_diff_1/D latch_diff_1/m1_657_280# 0.32fF
+C1 clock_inverter_0/inverter_cp_x1_0/out vdd 0.03fF
+C2 latch_diff_1/D latch_diff_0/nD 0.41fF
+C3 latch_diff_1/D nQ 0.11fF
+C4 latch_diff_1/nD latch_diff_0/m1_657_280# 0.14fF
+C5 latch_diff_0/D latch_diff_0/m1_657_280# 0.37fF
+C6 latch_diff_1/nD vdd 0.02fF
+C7 latch_diff_1/nD latch_diff_0/D 0.04fF
+C8 latch_diff_1/m1_657_280# latch_diff_0/m1_657_280# 0.18fF
+C9 vdd latch_diff_0/D 0.09fF
+C10 latch_diff_1/nD latch_diff_1/m1_657_280# 0.42fF
+C11 latch_diff_0/m1_657_280# latch_diff_0/nD 0.38fF
+C12 Q latch_diff_1/nD 0.01fF
+C13 nQ latch_diff_1/nD 0.08fF
+C14 latch_diff_1/D latch_diff_0/m1_657_280# 0.43fF
+C15 vdd latch_diff_0/nD 0.14fF
+C16 latch_diff_1/D latch_diff_1/nD 0.33fF
+C17 latch_diff_1/D vdd 0.03fF
+C18 latch_diff_1/D latch_diff_0/D 0.11fF
C19 nQ vss 0.57fF
C20 Q vss -0.92fF
C21 latch_diff_1/m1_657_280# vss 0.64fF
@@ -1157,24 +1157,24 @@
X1 a_63_n84# a_33_n110# a_n33_n84# w_n359_n303# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=840000u l=150000u
X2 a_n33_n84# a_n63_n110# a_n129_n84# w_n359_n303# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=840000u l=150000u
X3 a_159_n84# a_129_n110# a_63_n84# w_n359_n303# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=840000u l=150000u
-C0 a_n221_n84# a_63_n84# 0.05fF
-C1 a_n33_n84# a_159_n84# 0.09fF
-C2 a_n33_n84# a_n129_n84# 0.24fF
-C3 a_159_n84# a_63_n84# 0.24fF
-C4 a_n129_n84# a_63_n84# 0.09fF
+C0 a_33_n110# a_129_n110# 0.02fF
+C1 a_n221_n84# a_159_n84# 0.04fF
+C2 a_n221_n84# a_n33_n84# 0.09fF
+C3 a_n63_n110# a_n159_n110# 0.02fF
+C4 a_n221_n84# a_n129_n84# 0.24fF
C5 w_n359_n303# a_n221_n84# 0.08fF
-C6 a_n63_n110# a_n159_n110# 0.02fF
-C7 a_n33_n84# a_63_n84# 0.24fF
-C8 a_33_n110# a_129_n110# 0.02fF
-C9 w_n359_n303# a_159_n84# 0.08fF
-C10 a_n129_n84# w_n359_n303# 0.06fF
-C11 a_n33_n84# w_n359_n303# 0.05fF
-C12 w_n359_n303# a_63_n84# 0.06fF
-C13 a_159_n84# a_n221_n84# 0.04fF
-C14 a_n129_n84# a_n221_n84# 0.24fF
-C15 a_n33_n84# a_n221_n84# 0.09fF
-C16 a_n129_n84# a_159_n84# 0.05fF
-C17 a_n63_n110# a_33_n110# 0.02fF
+C6 a_n33_n84# a_159_n84# 0.09fF
+C7 a_n129_n84# a_159_n84# 0.05fF
+C8 w_n359_n303# a_159_n84# 0.08fF
+C9 a_n33_n84# a_n129_n84# 0.24fF
+C10 w_n359_n303# a_n33_n84# 0.05fF
+C11 w_n359_n303# a_n129_n84# 0.06fF
+C12 a_n221_n84# a_63_n84# 0.05fF
+C13 a_63_n84# a_159_n84# 0.24fF
+C14 a_n63_n110# a_33_n110# 0.02fF
+C15 a_n33_n84# a_63_n84# 0.24fF
+C16 a_63_n84# a_n129_n84# 0.09fF
+C17 w_n359_n303# a_63_n84# 0.06fF
C18 a_159_n84# VSUBS 0.03fF
C19 a_63_n84# VSUBS 0.03fF
C20 a_n33_n84# VSUBS 0.03fF
@@ -1193,19 +1193,19 @@
X1 a_n33_n42# a_n63_n68# a_n129_n42# w_n359_n252# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u
X2 a_159_n42# a_129_n68# a_63_n42# w_n359_n252# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u
X3 a_n129_n42# a_n159_n68# a_n221_n42# w_n359_n252# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u
-C0 a_n129_n42# a_159_n42# 0.03fF
-C1 a_n221_n42# a_63_n42# 0.03fF
-C2 a_129_n68# a_33_n68# 0.02fF
-C3 a_n63_n68# a_n159_n68# 0.02fF
-C4 a_n129_n42# a_n221_n42# 0.12fF
-C5 a_159_n42# a_n33_n42# 0.05fF
-C6 a_n63_n68# a_33_n68# 0.02fF
-C7 a_n221_n42# a_n33_n42# 0.05fF
-C8 a_159_n42# a_n221_n42# 0.02fF
-C9 a_n129_n42# a_63_n42# 0.05fF
-C10 a_n33_n42# a_63_n42# 0.12fF
-C11 a_159_n42# a_63_n42# 0.12fF
-C12 a_n129_n42# a_n33_n42# 0.12fF
+C0 a_n221_n42# a_n33_n42# 0.05fF
+C1 a_159_n42# a_63_n42# 0.12fF
+C2 a_159_n42# a_n221_n42# 0.02fF
+C3 a_63_n42# a_n129_n42# 0.05fF
+C4 a_159_n42# a_n33_n42# 0.05fF
+C5 a_n221_n42# a_n129_n42# 0.12fF
+C6 a_33_n68# a_n63_n68# 0.02fF
+C7 a_n33_n42# a_n129_n42# 0.12fF
+C8 a_n159_n68# a_n63_n68# 0.02fF
+C9 a_n221_n42# a_63_n42# 0.03fF
+C10 a_129_n68# a_33_n68# 0.02fF
+C11 a_63_n42# a_n33_n42# 0.12fF
+C12 a_159_n42# a_n129_n42# 0.03fF
C13 a_159_n42# w_n359_n252# 0.07fF
C14 a_63_n42# w_n359_n252# 0.06fF
C15 a_n33_n42# w_n359_n252# 0.06fF
@@ -1220,9 +1220,9 @@
.subckt inverter_min_x4 in vss out vdd
Xsky130_fd_pr__pfet_01v8_ZP3U9B_0 vss out out vdd in vdd in in vdd in out sky130_fd_pr__pfet_01v8_ZP3U9B
Xsky130_fd_pr__nfet_01v8_DXA56D_0 vss out in in out out vss in in vss sky130_fd_pr__nfet_01v8_DXA56D
-C0 in out 0.67fF
-C1 in vdd 0.33fF
-C2 vdd out 0.62fF
+C0 vdd out 0.62fF
+C1 in out 0.67fF
+C2 in vdd 0.33fF
C3 out vss 0.66fF
C4 in vss 1.89fF
C5 vdd vss 3.87fF
@@ -1232,10 +1232,10 @@
+ a_n125_n42# a_63_n42#
X0 a_63_n42# a_33_n68# a_n33_n42# w_n263_n252# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u
X1 a_n33_n42# a_n63_n68# a_n125_n42# w_n263_n252# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u
-C0 a_63_n42# a_n125_n42# 0.05fF
-C1 a_33_n68# a_n63_n68# 0.02fF
-C2 a_n33_n42# a_n125_n42# 0.12fF
-C3 a_63_n42# a_n33_n42# 0.12fF
+C0 a_n33_n42# a_n125_n42# 0.12fF
+C1 a_n63_n68# a_33_n68# 0.02fF
+C2 a_n125_n42# a_63_n42# 0.05fF
+C3 a_n33_n42# a_63_n42# 0.12fF
C4 a_63_n42# w_n263_n252# 0.09fF
C5 a_n33_n42# w_n263_n252# 0.07fF
C6 a_n125_n42# w_n263_n252# 0.09fF
@@ -1247,13 +1247,13 @@
+ w_n263_n303# a_n33_n84#
X0 a_63_n84# a_33_n110# a_n33_n84# w_n263_n303# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=840000u l=150000u
X1 a_n33_n84# a_n63_n110# a_n125_n84# w_n263_n303# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=840000u l=150000u
-C0 a_n33_n84# a_63_n84# 0.24fF
-C1 a_63_n84# w_n263_n303# 0.10fF
-C2 a_n33_n84# w_n263_n303# 0.07fF
-C3 a_33_n110# a_n63_n110# 0.02fF
-C4 a_n125_n84# a_63_n84# 0.09fF
-C5 a_n33_n84# a_n125_n84# 0.24fF
-C6 a_n125_n84# w_n263_n303# 0.10fF
+C0 a_n125_n84# a_63_n84# 0.09fF
+C1 a_n125_n84# w_n263_n303# 0.10fF
+C2 a_33_n110# a_n63_n110# 0.02fF
+C3 a_63_n84# a_n33_n84# 0.24fF
+C4 w_n263_n303# a_n33_n84# 0.07fF
+C5 a_63_n84# w_n263_n303# 0.10fF
+C6 a_n125_n84# a_n33_n84# 0.24fF
C7 a_63_n84# VSUBS 0.03fF
C8 a_n33_n84# VSUBS 0.03fF
C9 a_n125_n84# VSUBS 0.03fF
@@ -1285,41 +1285,41 @@
Xinverter_min_x4_1 o2 vss nCLK_2 vdd inverter_min_x4
Xinverter_min_x2_0 nout_div o2 vss vdd inverter_min_x2
Xinverter_min_x2_1 out_div o1 vss vdd inverter_min_x2
-C0 vdd DFlipFlop_0/nCLK 0.30fF
-C1 vdd o1 0.14fF
-C2 vdd o2 0.14fF
-C3 nout_div DFlipFlop_0/latch_diff_1/m1_657_280# 0.21fF
-C4 DFlipFlop_0/CLK DFlipFlop_0/latch_diff_1/D -0.48fF
-C5 vdd nCLK_2 0.08fF
-C6 nout_div DFlipFlop_0/latch_diff_0/D 0.09fF
-C7 nout_div DFlipFlop_0/nCLK 0.43fF
-C8 nout_div DFlipFlop_0/latch_diff_1/D 0.64fF
-C9 DFlipFlop_0/CLK DFlipFlop_0/latch_diff_1/nD 0.11fF
-C10 CLK_2 o1 0.11fF
-C11 DFlipFlop_0/nCLK DFlipFlop_0/latch_diff_1/m1_657_280# 0.26fF
-C12 vdd out_div 0.03fF
-C13 o1 DFlipFlop_0/latch_diff_1/m1_657_280# 0.02fF
-C14 nout_div DFlipFlop_0/latch_diff_1/nD 1.18fF
-C15 o2 DFlipFlop_0/latch_diff_1/m1_657_280# 0.02fF
-C16 vdd DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in 0.03fF
-C17 DFlipFlop_0/latch_diff_0/D DFlipFlop_0/nCLK 0.13fF
-C18 DFlipFlop_0/nCLK DFlipFlop_0/latch_diff_1/D 0.08fF
-C19 DFlipFlop_0/CLK DFlipFlop_0/latch_diff_0/nD 0.12fF
-C20 nout_div out_div 0.22fF
-C21 vdd DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out 0.03fF
-C22 DFlipFlop_0/CLK DFlipFlop_0/latch_diff_0/m1_657_280# 0.26fF
-C23 DFlipFlop_0/CLK vdd 0.40fF
-C24 DFlipFlop_0/CLK DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out 0.29fF
-C25 vdd clock_inverter_0/inverter_cp_x1_0/out 0.10fF
-C26 DFlipFlop_0/nCLK DFlipFlop_0/latch_diff_1/nD -0.09fF
-C27 o2 nCLK_2 0.11fF
-C28 nout_div DFlipFlop_0/latch_diff_0/nD 0.07fF
-C29 nout_div DFlipFlop_0/latch_diff_0/m1_657_280# 0.24fF
-C30 nout_div vdd 0.16fF
-C31 nout_div DFlipFlop_0/CLK 0.42fF
-C32 vdd CLK_2 0.08fF
-C33 o1 out_div 0.01fF
-C34 DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in DFlipFlop_0/nCLK 0.46fF
+C0 nout_div out_div 0.22fF
+C1 DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in vdd 0.03fF
+C2 o2 nCLK_2 0.11fF
+C3 DFlipFlop_0/latch_diff_1/m1_657_280# DFlipFlop_0/nCLK 0.26fF
+C4 nout_div DFlipFlop_0/latch_diff_0/D 0.09fF
+C5 DFlipFlop_0/latch_diff_0/m1_657_280# DFlipFlop_0/CLK 0.26fF
+C6 DFlipFlop_0/latch_diff_0/nD DFlipFlop_0/CLK 0.12fF
+C7 vdd out_div 0.03fF
+C8 clock_inverter_0/inverter_cp_x1_0/out vdd 0.10fF
+C9 o2 vdd 0.14fF
+C10 DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out vdd 0.03fF
+C11 DFlipFlop_0/latch_diff_1/nD DFlipFlop_0/nCLK -0.09fF
+C12 DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in DFlipFlop_0/nCLK 0.46fF
+C13 o1 vdd 0.14fF
+C14 DFlipFlop_0/latch_diff_1/nD DFlipFlop_0/CLK 0.11fF
+C15 DFlipFlop_0/latch_diff_0/D DFlipFlop_0/nCLK 0.13fF
+C16 nout_div vdd 0.16fF
+C17 DFlipFlop_0/latch_diff_1/D nout_div 0.64fF
+C18 o2 DFlipFlop_0/latch_diff_1/m1_657_280# 0.02fF
+C19 nCLK_2 vdd 0.08fF
+C20 DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out DFlipFlop_0/CLK 0.29fF
+C21 o1 CLK_2 0.11fF
+C22 o1 DFlipFlop_0/latch_diff_1/m1_657_280# 0.02fF
+C23 nout_div DFlipFlop_0/nCLK 0.43fF
+C24 nout_div DFlipFlop_0/latch_diff_0/nD 0.07fF
+C25 DFlipFlop_0/latch_diff_0/m1_657_280# nout_div 0.24fF
+C26 nout_div DFlipFlop_0/CLK 0.42fF
+C27 DFlipFlop_0/nCLK vdd 0.30fF
+C28 nout_div DFlipFlop_0/latch_diff_1/m1_657_280# 0.21fF
+C29 DFlipFlop_0/latch_diff_1/D DFlipFlop_0/nCLK 0.08fF
+C30 o1 out_div 0.01fF
+C31 CLK_2 vdd 0.08fF
+C32 nout_div DFlipFlop_0/latch_diff_1/nD 1.18fF
+C33 DFlipFlop_0/CLK vdd 0.40fF
+C34 DFlipFlop_0/latch_diff_1/D DFlipFlop_0/CLK -0.48fF
C35 nCLK_2 vss 1.08fF
C36 o2 vss 2.21fF
C37 CLK_2 vss 1.08fF
@@ -1348,9 +1348,9 @@
X1 a_n129_n600# a_n257_n777# a_n221_n600# w_n257_n702# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=6e+06u l=150000u
X2 a_n129_n600# a_n257_n777# a_n221_n600# w_n257_n702# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=6e+06u l=150000u
X3 a_n221_n600# a_n257_n777# a_n129_n600# w_n257_n702# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=6e+06u l=150000u
-C0 a_n221_n600# a_n257_n777# 0.25fF
-C1 a_n221_n600# a_n129_n600# 7.87fF
-C2 a_n129_n600# a_n257_n777# 0.29fF
+C0 a_n129_n600# a_n221_n600# 7.87fF
+C1 a_n129_n600# a_n257_n777# 0.29fF
+C2 a_n257_n777# a_n221_n600# 0.25fF
C3 a_n129_n600# VSUBS 0.10fF
C4 a_n221_n600# VSUBS 0.25fF
C5 a_n257_n777# VSUBS 1.05fF
@@ -1362,15 +1362,15 @@
X1 a_n129_n300# a_n257_n404# a_n221_n300# w_n257_n327# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=150000u
X2 a_n129_n300# a_n257_n404# a_n221_n300# w_n257_n327# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=150000u
X3 a_n221_n300# a_n257_n404# a_n129_n300# w_n257_n327# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=150000u
-C0 a_n129_n300# a_n257_n404# 0.30fF
+C0 a_n257_n404# a_n129_n300# 0.30fF
C1 a_n257_n404# a_n221_n300# 0.21fF
-C2 a_n129_n300# a_n221_n300# 4.05fF
+C2 a_n221_n300# a_n129_n300# 4.05fF
C3 a_n129_n300# w_n257_n327# 0.11fF
C4 a_n221_n300# w_n257_n327# 0.25fF
C5 a_n257_n404# w_n257_n327# 1.11fF
.ends
-.subckt buffer_salida a_678_n100# out in vss vdd
+.subckt buffer_salida a_678_n100# out in a_3996_n100# vss vdd
Xsky130_fd_pr__pfet_01v8_58ZKDE_1 vss a_678_n100# a_3996_n100# vdd vdd sky130_fd_pr__pfet_01v8_58ZKDE
Xsky130_fd_pr__pfet_01v8_58ZKDE_2 vss a_678_n100# a_3996_n100# vdd vdd sky130_fd_pr__pfet_01v8_58ZKDE
Xsky130_fd_pr__pfet_01v8_58ZKDE_3 vss a_678_n100# a_3996_n100# vdd vdd sky130_fd_pr__pfet_01v8_58ZKDE
@@ -1517,13 +1517,13 @@
Xsky130_fd_pr__pfet_01v8_58ZKDE_29 vss a_3996_n100# out vdd vdd sky130_fd_pr__pfet_01v8_58ZKDE
Xsky130_fd_pr__pfet_01v8_58ZKDE_19 vss a_3996_n100# out vdd vdd sky130_fd_pr__pfet_01v8_58ZKDE
Xsky130_fd_pr__pfet_01v8_58ZKDE_0 vss in a_678_n100# vdd vdd sky130_fd_pr__pfet_01v8_58ZKDE
-C0 a_678_n100# in 0.81fF
+C0 a_678_n100# vdd 0.08fF
C1 in vdd 0.02fF
-C2 a_3996_n100# out 55.19fF
-C3 out vdd 47.17fF
-C4 a_678_n100# a_3996_n100# 6.52fF
-C5 a_678_n100# vdd 0.08fF
-C6 a_3996_n100# vdd 3.68fF
+C2 out vdd 47.17fF
+C3 in a_678_n100# 0.81fF
+C4 a_3996_n100# vdd 3.68fF
+C5 a_3996_n100# a_678_n100# 6.52fF
+C6 a_3996_n100# out 55.19fF
C7 vdd vss 20.93fF
C8 out vss 35.17fF
C9 a_3996_n100# vss 49.53fF
@@ -1533,9 +1533,9 @@
.subckt sky130_fd_pr__nfet_01v8_CBAU6Y a_n73_n150# a_n33_n238# w_n211_n360# a_15_n150#
X0 a_15_n150# a_n33_n238# a_n73_n150# w_n211_n360# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=150000u
-C0 a_n73_n150# a_15_n150# 0.51fF
-C1 a_n33_n238# a_15_n150# 0.02fF
-C2 a_n73_n150# a_n33_n238# 0.02fF
+C0 a_n33_n238# a_15_n150# 0.02fF
+C1 a_n73_n150# a_15_n150# 0.51fF
+C2 a_n33_n238# a_n73_n150# 0.02fF
C3 a_15_n150# w_n211_n360# 0.23fF
C4 a_n73_n150# w_n211_n360# 0.23fF
C5 a_n33_n238# w_n211_n360# 0.17fF
@@ -1543,12 +1543,12 @@
.subckt sky130_fd_pr__pfet_01v8_4757AC VSUBS a_n73_n150# a_n33_181# w_n211_n369# a_15_n150#
X0 a_15_n150# a_n33_181# a_n73_n150# w_n211_n369# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=150000u
-C0 a_n33_181# a_n73_n150# 0.01fF
-C1 a_n33_181# a_15_n150# 0.01fF
-C2 w_n211_n369# a_n73_n150# 0.20fF
-C3 w_n211_n369# a_15_n150# 0.20fF
-C4 a_15_n150# a_n73_n150# 0.51fF
-C5 a_n33_181# w_n211_n369# 0.05fF
+C0 w_n211_n369# a_n73_n150# 0.20fF
+C1 a_n33_181# a_n73_n150# 0.01fF
+C2 a_15_n150# w_n211_n369# 0.20fF
+C3 a_15_n150# a_n33_181# 0.01fF
+C4 w_n211_n369# a_n33_181# 0.05fF
+C5 a_15_n150# a_n73_n150# 0.51fF
C6 a_15_n150# VSUBS 0.03fF
C7 a_n73_n150# VSUBS 0.03fF
C8 a_n33_181# VSUBS 0.13fF
@@ -1568,51 +1568,51 @@
X7 a_351_n150# a_n465_172# a_255_n150# w_n647_n360# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=150000u
X8 a_255_n150# a_n465_172# a_159_n150# w_n647_n360# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=150000u
X9 a_n321_n150# a_n465_172# a_n417_n150# w_n647_n360# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=150000u
-C0 a_159_n150# a_n33_n150# 0.16fF
-C1 a_63_n150# a_255_n150# 0.16fF
-C2 a_n509_n150# a_n129_n150# 0.07fF
-C3 a_n417_n150# a_n33_n150# 0.07fF
-C4 a_n225_n150# a_n417_n150# 0.16fF
-C5 a_351_n150# a_159_n150# 0.16fF
-C6 a_n509_n150# a_n417_n150# 0.43fF
-C7 a_n321_n150# a_n33_n150# 0.10fF
-C8 a_n321_n150# a_n225_n150# 0.43fF
-C9 a_n465_172# a_n129_n150# 0.10fF
-C10 a_447_n150# a_255_n150# 0.16fF
-C11 a_n465_172# a_159_n150# 0.10fF
-C12 a_n509_n150# a_n321_n150# 0.16fF
-C13 a_n465_172# a_n417_n150# 0.10fF
-C14 a_159_n150# a_n129_n150# 0.10fF
-C15 a_n33_n150# a_255_n150# 0.10fF
-C16 a_63_n150# a_447_n150# 0.07fF
-C17 a_n465_172# a_n321_n150# 0.10fF
-C18 a_n417_n150# a_n129_n150# 0.10fF
-C19 a_351_n150# a_255_n150# 0.43fF
-C20 a_n321_n150# a_n129_n150# 0.16fF
-C21 a_63_n150# a_n33_n150# 0.43fF
-C22 a_63_n150# a_n225_n150# 0.10fF
-C23 a_n465_172# a_255_n150# 0.10fF
-C24 a_351_n150# a_63_n150# 0.10fF
-C25 a_n321_n150# a_n417_n150# 0.43fF
-C26 a_n129_n150# a_255_n150# 0.07fF
-C27 a_159_n150# a_255_n150# 0.43fF
-C28 a_63_n150# a_n465_172# 0.10fF
-C29 a_351_n150# a_447_n150# 0.43fF
-C30 a_n225_n150# a_n33_n150# 0.16fF
-C31 a_63_n150# a_n129_n150# 0.16fF
-C32 a_63_n150# a_159_n150# 0.43fF
-C33 a_n509_n150# a_n225_n150# 0.10fF
-C34 a_447_n150# a_n465_172# 0.01fF
-C35 a_351_n150# a_n33_n150# 0.07fF
-C36 a_63_n150# a_n321_n150# 0.07fF
-C37 a_447_n150# a_159_n150# 0.10fF
-C38 a_n465_172# a_n225_n150# 0.10fF
-C39 a_n465_172# a_n33_n150# 0.10fF
-C40 a_n509_n150# a_n465_172# 0.01fF
-C41 a_351_n150# a_n465_172# 0.10fF
-C42 a_n129_n150# a_n33_n150# 0.43fF
-C43 a_n225_n150# a_n129_n150# 0.43fF
-C44 a_159_n150# a_n225_n150# 0.07fF
+C0 a_63_n150# a_159_n150# 0.43fF
+C1 a_n465_172# a_n417_n150# 0.10fF
+C2 a_255_n150# a_63_n150# 0.16fF
+C3 a_n321_n150# a_63_n150# 0.07fF
+C4 a_n129_n150# a_63_n150# 0.16fF
+C5 a_n33_n150# a_351_n150# 0.07fF
+C6 a_n465_172# a_351_n150# 0.10fF
+C7 a_n33_n150# a_63_n150# 0.43fF
+C8 a_447_n150# a_159_n150# 0.10fF
+C9 a_255_n150# a_447_n150# 0.16fF
+C10 a_n465_172# a_63_n150# 0.10fF
+C11 a_n225_n150# a_n509_n150# 0.10fF
+C12 a_255_n150# a_159_n150# 0.43fF
+C13 a_n129_n150# a_159_n150# 0.10fF
+C14 a_n509_n150# a_n417_n150# 0.43fF
+C15 a_255_n150# a_n129_n150# 0.07fF
+C16 a_n321_n150# a_n129_n150# 0.16fF
+C17 a_n465_172# a_447_n150# 0.01fF
+C18 a_n33_n150# a_159_n150# 0.16fF
+C19 a_255_n150# a_n33_n150# 0.10fF
+C20 a_n321_n150# a_n33_n150# 0.10fF
+C21 a_n465_172# a_159_n150# 0.10fF
+C22 a_n33_n150# a_n129_n150# 0.43fF
+C23 a_255_n150# a_n465_172# 0.10fF
+C24 a_n321_n150# a_n465_172# 0.10fF
+C25 a_n465_172# a_n129_n150# 0.10fF
+C26 a_n465_172# a_n33_n150# 0.10fF
+C27 a_n225_n150# a_n417_n150# 0.16fF
+C28 a_n321_n150# a_n509_n150# 0.16fF
+C29 a_n225_n150# a_63_n150# 0.10fF
+C30 a_n129_n150# a_n509_n150# 0.07fF
+C31 a_n465_172# a_n509_n150# 0.01fF
+C32 a_351_n150# a_63_n150# 0.10fF
+C33 a_n225_n150# a_159_n150# 0.07fF
+C34 a_n321_n150# a_n225_n150# 0.43fF
+C35 a_n225_n150# a_n129_n150# 0.43fF
+C36 a_n321_n150# a_n417_n150# 0.43fF
+C37 a_351_n150# a_447_n150# 0.43fF
+C38 a_n129_n150# a_n417_n150# 0.10fF
+C39 a_447_n150# a_63_n150# 0.07fF
+C40 a_n33_n150# a_n225_n150# 0.16fF
+C41 a_351_n150# a_159_n150# 0.16fF
+C42 a_n465_172# a_n225_n150# 0.10fF
+C43 a_n33_n150# a_n417_n150# 0.07fF
+C44 a_255_n150# a_351_n150# 0.43fF
C45 a_447_n150# w_n647_n360# 0.17fF
C46 a_351_n150# w_n647_n360# 0.10fF
C47 a_255_n150# w_n647_n360# 0.08fF
@@ -1640,61 +1640,61 @@
X7 a_159_n150# a_n465_n247# a_63_n150# w_n647_n369# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=150000u
X8 a_n225_n150# a_n465_n247# a_n321_n150# w_n647_n369# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=150000u
X9 a_447_n150# a_n465_n247# a_351_n150# w_n647_n369# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=150000u
-C0 a_n129_n150# a_n321_n150# 0.16fF
-C1 a_n509_n150# w_n647_n369# 0.14fF
-C2 a_n129_n150# a_63_n150# 0.16fF
-C3 a_159_n150# a_255_n150# 0.43fF
-C4 a_n417_n150# a_n321_n150# 0.43fF
-C5 a_n225_n150# a_n129_n150# 0.43fF
-C6 a_n129_n150# a_n465_n247# 0.08fF
-C7 a_255_n150# a_351_n150# 0.43fF
-C8 a_n129_n150# a_n33_n150# 0.43fF
-C9 a_n225_n150# a_n417_n150# 0.16fF
-C10 a_n417_n150# a_n465_n247# 0.08fF
-C11 a_159_n150# a_63_n150# 0.43fF
-C12 a_n417_n150# a_n33_n150# 0.07fF
-C13 a_n225_n150# a_159_n150# 0.07fF
-C14 a_159_n150# a_n465_n247# 0.08fF
-C15 a_351_n150# a_63_n150# 0.10fF
-C16 a_n509_n150# a_n321_n150# 0.16fF
-C17 a_n33_n150# a_159_n150# 0.16fF
-C18 a_447_n150# w_n647_n369# 0.14fF
-C19 a_351_n150# a_n465_n247# 0.08fF
-C20 a_n33_n150# a_351_n150# 0.07fF
-C21 a_n509_n150# a_n225_n150# 0.10fF
-C22 a_n417_n150# a_n129_n150# 0.10fF
-C23 a_447_n150# a_255_n150# 0.16fF
-C24 w_n647_n369# a_255_n150# 0.05fF
-C25 a_n129_n150# a_159_n150# 0.10fF
-C26 w_n647_n369# a_n321_n150# 0.05fF
-C27 a_447_n150# a_63_n150# 0.07fF
-C28 w_n647_n369# a_63_n150# 0.02fF
-C29 a_n225_n150# w_n647_n369# 0.04fF
-C30 a_n509_n150# a_n129_n150# 0.07fF
-C31 w_n647_n369# a_n465_n247# 0.47fF
-C32 a_159_n150# a_351_n150# 0.16fF
-C33 w_n647_n369# a_n33_n150# 0.02fF
-C34 a_n509_n150# a_n417_n150# 0.43fF
-C35 a_255_n150# a_63_n150# 0.16fF
-C36 a_255_n150# a_n465_n247# 0.08fF
-C37 a_63_n150# a_n321_n150# 0.07fF
-C38 a_n33_n150# a_255_n150# 0.10fF
-C39 a_n225_n150# a_n321_n150# 0.43fF
-C40 a_n321_n150# a_n465_n247# 0.08fF
-C41 a_n225_n150# a_63_n150# 0.10fF
-C42 a_n33_n150# a_n321_n150# 0.10fF
-C43 w_n647_n369# a_n129_n150# 0.02fF
-C44 a_63_n150# a_n465_n247# 0.08fF
-C45 a_n225_n150# a_n465_n247# 0.08fF
-C46 a_n33_n150# a_63_n150# 0.43fF
-C47 a_n225_n150# a_n33_n150# 0.16fF
-C48 a_n417_n150# w_n647_n369# 0.07fF
-C49 a_447_n150# a_159_n150# 0.10fF
-C50 a_n33_n150# a_n465_n247# 0.08fF
-C51 w_n647_n369# a_159_n150# 0.04fF
-C52 a_n129_n150# a_255_n150# 0.07fF
-C53 a_447_n150# a_351_n150# 0.43fF
-C54 w_n647_n369# a_351_n150# 0.07fF
+C0 a_n33_n150# a_63_n150# 0.43fF
+C1 a_n33_n150# a_n129_n150# 0.43fF
+C2 a_63_n150# a_n129_n150# 0.16fF
+C3 a_n509_n150# a_n225_n150# 0.10fF
+C4 a_n33_n150# a_159_n150# 0.16fF
+C5 a_63_n150# a_159_n150# 0.43fF
+C6 a_n321_n150# a_n417_n150# 0.43fF
+C7 a_n33_n150# a_351_n150# 0.07fF
+C8 a_159_n150# a_n129_n150# 0.10fF
+C9 a_351_n150# a_63_n150# 0.10fF
+C10 a_351_n150# a_159_n150# 0.16fF
+C11 a_255_n150# a_447_n150# 0.16fF
+C12 a_n321_n150# w_n647_n369# 0.05fF
+C13 a_n417_n150# w_n647_n369# 0.07fF
+C14 a_n465_n247# a_n321_n150# 0.08fF
+C15 a_n465_n247# a_n417_n150# 0.08fF
+C16 a_n321_n150# a_n225_n150# 0.43fF
+C17 a_n225_n150# a_n417_n150# 0.16fF
+C18 a_n465_n247# w_n647_n369# 0.47fF
+C19 a_63_n150# a_447_n150# 0.07fF
+C20 a_n225_n150# w_n647_n369# 0.04fF
+C21 a_159_n150# a_447_n150# 0.10fF
+C22 a_n465_n247# a_n225_n150# 0.08fF
+C23 a_351_n150# a_447_n150# 0.43fF
+C24 a_n509_n150# a_n129_n150# 0.07fF
+C25 a_255_n150# w_n647_n369# 0.05fF
+C26 a_n465_n247# a_255_n150# 0.08fF
+C27 a_n33_n150# a_n321_n150# 0.10fF
+C28 a_63_n150# a_n321_n150# 0.07fF
+C29 a_n33_n150# a_n417_n150# 0.07fF
+C30 a_n321_n150# a_n129_n150# 0.16fF
+C31 a_n417_n150# a_n129_n150# 0.10fF
+C32 a_n33_n150# w_n647_n369# 0.02fF
+C33 a_63_n150# w_n647_n369# 0.02fF
+C34 a_n129_n150# w_n647_n369# 0.02fF
+C35 a_n465_n247# a_n33_n150# 0.08fF
+C36 a_n465_n247# a_63_n150# 0.08fF
+C37 a_n465_n247# a_n129_n150# 0.08fF
+C38 a_159_n150# w_n647_n369# 0.04fF
+C39 a_351_n150# w_n647_n369# 0.07fF
+C40 a_n465_n247# a_159_n150# 0.08fF
+C41 a_n33_n150# a_n225_n150# 0.16fF
+C42 a_63_n150# a_n225_n150# 0.10fF
+C43 a_n465_n247# a_351_n150# 0.08fF
+C44 a_n225_n150# a_n129_n150# 0.43fF
+C45 a_n225_n150# a_159_n150# 0.07fF
+C46 a_447_n150# w_n647_n369# 0.14fF
+C47 a_n33_n150# a_255_n150# 0.10fF
+C48 a_63_n150# a_255_n150# 0.16fF
+C49 a_255_n150# a_n129_n150# 0.07fF
+C50 a_n509_n150# a_n321_n150# 0.16fF
+C51 a_n509_n150# a_n417_n150# 0.43fF
+C52 a_255_n150# a_159_n150# 0.43fF
+C53 a_351_n150# a_255_n150# 0.43fF
+C54 a_n509_n150# w_n647_n369# 0.14fF
C55 a_447_n150# VSUBS 0.03fF
C56 a_351_n150# VSUBS 0.03fF
C57 a_255_n150# VSUBS 0.03fF
@@ -1712,9 +1712,9 @@
.subckt sky130_fd_pr__nfet_01v8_EDT3AT a_15_n11# a_n33_n99# w_n211_n221# a_n73_n11#
X0 a_15_n11# a_n33_n99# a_n73_n11# w_n211_n221# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=420000u l=150000u
-C0 a_n73_n11# a_15_n11# 0.15fF
-C1 a_n73_n11# a_n33_n99# 0.02fF
-C2 a_15_n11# a_n33_n99# 0.02fF
+C0 a_n33_n99# a_n73_n11# 0.02fF
+C1 a_n33_n99# a_15_n11# 0.02fF
+C2 a_15_n11# a_n73_n11# 0.15fF
C3 a_15_n11# w_n211_n221# 0.09fF
C4 a_n73_n11# w_n211_n221# 0.09fF
C5 a_n33_n99# w_n211_n221# 0.17fF
@@ -1722,7 +1722,7 @@
.subckt sky130_fd_pr__nfet_01v8_AQR2CW a_n33_66# a_n78_n106# w_n216_n254# a_20_n106#
X0 a_20_n106# a_n33_66# a_n78_n106# w_n216_n254# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=750000u l=200000u
-C0 a_n78_n106# a_20_n106# 0.21fF
+C0 a_20_n106# a_n78_n106# 0.21fF
C1 a_20_n106# w_n216_n254# 0.14fF
C2 a_n78_n106# w_n216_n254# 0.14fF
C3 a_n33_66# w_n216_n254# 0.12fF
@@ -1731,9 +1731,9 @@
.subckt sky130_fd_pr__pfet_01v8_HRYSXS VSUBS a_n33_n211# a_n78_n114# w_n216_n334#
+ a_20_n114#
X0 a_20_n114# a_n33_n211# a_n78_n114# w_n216_n334# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.5e+06u l=200000u
-C0 a_n78_n114# a_20_n114# 0.42fF
-C1 a_20_n114# w_n216_n334# 0.20fF
-C2 a_n78_n114# w_n216_n334# 0.20fF
+C0 a_20_n114# w_n216_n334# 0.20fF
+C1 w_n216_n334# a_n78_n114# 0.20fF
+C2 a_20_n114# a_n78_n114# 0.42fF
C3 a_20_n114# VSUBS 0.03fF
C4 a_n78_n114# VSUBS 0.03fF
C5 a_n33_n211# VSUBS 0.12fF
@@ -1743,10 +1743,10 @@
.subckt inverter_csvco in vbulkn out vbulkp vdd vss
Xsky130_fd_pr__nfet_01v8_AQR2CW_0 in vss vbulkn out sky130_fd_pr__nfet_01v8_AQR2CW
Xsky130_fd_pr__pfet_01v8_HRYSXS_0 vbulkn in vdd vbulkp out sky130_fd_pr__pfet_01v8_HRYSXS
-C0 vss in 0.01fF
+C0 in vss 0.01fF
C1 in vdd 0.01fF
-C2 vbulkp vdd 0.04fF
-C3 out in 0.11fF
+C2 in out 0.11fF
+C3 vdd vbulkp 0.04fF
C4 out vbulkp 0.08fF
C5 vbulkp vbulkn 2.49fF
C6 out vbulkn 0.60fF
@@ -1765,20 +1765,20 @@
+ vdd vdd sky130_fd_pr__pfet_01v8_8DL6ZL
Xsky130_fd_pr__nfet_01v8_EDT3AT_0 cap_vco_0/t D0 vss out sky130_fd_pr__nfet_01v8_EDT3AT
Xinverter_csvco_0 in vss out vdd inverter_csvco_0/vdd inverter_csvco_0/vss inverter_csvco
-C0 D0 inverter_csvco_0/vss 0.02fF
-C1 out D0 0.09fF
-C2 vctrl inverter_csvco_0/vss 0.87fF
-C3 in inverter_csvco_0/vss 0.01fF
-C4 in out 0.06fF
-C5 cap_vco_0/t vdd 0.04fF
-C6 in inverter_csvco_0/vdd 0.01fF
+C0 out inverter_csvco_0/vss 0.03fF
+C1 D0 out 0.09fF
+C2 D0 inverter_csvco_0/vss 0.02fF
+C3 vdd cap_vco_0/t 0.04fF
+C4 inverter_csvco_0/vss vctrl 0.87fF
+C5 inverter_csvco_0/vdd cap_vco_0/t 0.10fF
+C6 inverter_csvco_0/vdd in 0.01fF
C7 vdd vbp 1.21fF
C8 inverter_csvco_0/vdd vdd 1.89fF
-C9 out inverter_csvco_0/vss 0.03fF
+C9 inverter_csvco_0/vdd vbp 0.75fF
C10 cap_vco_0/t out 0.70fF
-C11 cap_vco_0/t inverter_csvco_0/vdd 0.10fF
-C12 inverter_csvco_0/vdd vbp 0.75fF
-C13 out inverter_csvco_0/vdd 0.02fF
+C11 out in 0.06fF
+C12 inverter_csvco_0/vdd out 0.02fF
+C13 inverter_csvco_0/vss in 0.01fF
C14 out vss 0.93fF
C15 inverter_csvco_0/vdd vss 0.26fF
C16 in vss 0.69fF
@@ -1805,21 +1805,21 @@
Xcsvco_branch_1 vctrl csvco_branch_1/inverter_csvco_0/vdd csvco_branch_1/in csvco_branch_2/vbp
+ csvco_branch_1/cap_vco_0/t D0 csvco_branch_2/in csvco_branch_1/inverter_csvco_0/vss
+ vss vdd csvco_branch
-C0 csvco_branch_2/inverter_csvco_0/vss D0 0.68fF
-C1 csvco_branch_0/inverter_csvco_0/vss D0 0.49fF
-C2 csvco_branch_1/inverter_csvco_0/vss D0 0.68fF
-C3 csvco_branch_2/vbp csvco_branch_0/inverter_csvco_0/vdd 0.06fF
-C4 vctrl csvco_branch_2/vbp 0.06fF
+C0 D0 csvco_branch_0/inverter_csvco_0/vss 0.49fF
+C1 vdd csvco_branch_0/inverter_csvco_0/vdd 0.13fF
+C2 csvco_branch_2/vbp csvco_branch_0/inverter_csvco_0/vss 0.06fF
+C3 vdd csvco_branch_1/inverter_csvco_0/vdd 0.19fF
+C4 csvco_branch_0/cap_vco_0/t out_vco 0.03fF
C5 csvco_branch_2/vbp vdd 1.49fF
-C6 out_vco csvco_branch_1/in 0.76fF
-C7 out_vco csvco_branch_2/in 0.58fF
-C8 vdd csvco_branch_0/inverter_csvco_0/vdd 0.13fF
-C9 csvco_branch_1/cap_vco_0/t out_vco 0.03fF
-C10 vctrl D0 4.41fF
-C11 csvco_branch_2/inverter_csvco_0/vdd vdd 0.10fF
-C12 csvco_branch_2/vbp csvco_branch_0/inverter_csvco_0/vss 0.06fF
-C13 out_vco csvco_branch_0/cap_vco_0/t 0.03fF
-C14 csvco_branch_1/inverter_csvco_0/vdd vdd 0.19fF
+C6 D0 csvco_branch_1/inverter_csvco_0/vss 0.68fF
+C7 csvco_branch_2/inverter_csvco_0/vdd vdd 0.10fF
+C8 vctrl D0 4.41fF
+C9 csvco_branch_2/vbp csvco_branch_0/inverter_csvco_0/vdd 0.06fF
+C10 D0 csvco_branch_2/inverter_csvco_0/vss 0.68fF
+C11 vctrl csvco_branch_2/vbp 0.06fF
+C12 csvco_branch_2/in out_vco 0.58fF
+C13 csvco_branch_1/cap_vco_0/t out_vco 0.03fF
+C14 csvco_branch_1/in out_vco 0.76fF
C15 csvco_branch_2/in vss 1.60fF
C16 csvco_branch_1/inverter_csvco_0/vdd vss 0.16fF
C17 csvco_branch_1/cap_vco_0/t vss 7.10fF
@@ -1842,10 +1842,10 @@
Xinverter_min_x4_0 o1 vss out_div vdd inverter_min_x4
Xinverter_min_x4_1 out_div vss out_pad vdd inverter_min_x4
Xinverter_min_x2_0 in_vco o1 vss vdd inverter_min_x2
-C0 out_pad vdd 0.10fF
-C1 vdd out_div 0.17fF
-C2 o1 out_div 0.11fF
-C3 o1 vdd 0.09fF
+C0 vdd o1 0.09fF
+C1 o1 out_div 0.11fF
+C2 vdd out_div 0.17fF
+C3 vdd out_pad 0.10fF
C4 out_pad out_div 0.15fF
C5 in_vco vss 0.83fF
C6 out_pad vss 0.70fF
@@ -1866,27 +1866,27 @@
X7 a_455_87# A VGND VNB sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=740000u l=150000u
X8 VGND B a_194_125# VNB sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=550000u l=150000u
X9 VGND a_194_125# X VNB sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=740000u l=150000u
-C0 a_158_392# a_194_125# 0.06fF
-C1 X VGND 0.28fF
-C2 B X 0.13fF
-C3 a_194_125# VPWR 0.33fF
-C4 B VGND 0.10fF
-C5 a_355_368# VPWR 0.37fF
-C6 A VGND 0.31fF
-C7 A B 0.28fF
-C8 a_355_368# a_194_125# 0.51fF
-C9 X VPWR 0.07fF
-C10 VPWR VGND 0.01fF
-C11 B VPWR 0.09fF
-C12 A VPWR 0.15fF
-C13 a_194_125# X 0.29fF
-C14 a_355_368# X 0.17fF
-C15 a_194_125# VGND 0.25fF
-C16 a_194_125# B 0.57fF
-C17 VPB VPWR 0.06fF
-C18 a_355_368# B 0.08fF
-C19 A a_194_125# 0.18fF
-C20 a_355_368# A 0.02fF
+C0 a_355_368# B 0.08fF
+C1 VPWR X 0.07fF
+C2 a_194_125# a_355_368# 0.51fF
+C3 A B 0.28fF
+C4 a_194_125# A 0.18fF
+C5 VGND B 0.10fF
+C6 a_194_125# VGND 0.25fF
+C7 A a_355_368# 0.02fF
+C8 X B 0.13fF
+C9 a_194_125# X 0.29fF
+C10 VGND A 0.31fF
+C11 X a_355_368# 0.17fF
+C12 VPWR B 0.09fF
+C13 VPWR a_194_125# 0.33fF
+C14 VPWR a_355_368# 0.37fF
+C15 VGND X 0.28fF
+C16 a_194_125# a_158_392# 0.06fF
+C17 VPWR VPB 0.06fF
+C18 VPWR A 0.15fF
+C19 VPWR VGND 0.01fF
+C20 a_194_125# B 0.57fF
C21 VGND VNB 0.78fF
C22 X VNB 0.21fF
C23 VPWR VNB 0.78fF
@@ -1904,20 +1904,20 @@
X3 a_143_136# A a_56_136# VNB sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=640000u l=150000u
X4 a_56_136# A VPWR VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=840000u l=150000u
X5 X a_56_136# VPWR VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.12e+06u l=150000u
-C0 B A 0.08fF
-C1 VGND a_56_136# 0.06fF
-C2 VPWR A 0.07fF
-C3 a_56_136# A 0.17fF
-C4 B X 0.02fF
-C5 VPWR B 0.02fF
-C6 VPWR X 0.20fF
-C7 VGND A 0.21fF
-C8 B a_56_136# 0.30fF
-C9 a_56_136# X 0.26fF
-C10 VPWR a_56_136# 0.57fF
-C11 VPB VPWR 0.04fF
-C12 VGND B 0.03fF
-C13 VGND X 0.15fF
+C0 a_56_136# VGND 0.06fF
+C1 VGND A 0.21fF
+C2 a_56_136# A 0.17fF
+C3 B VPWR 0.02fF
+C4 VPWR VPB 0.04fF
+C5 VPWR X 0.20fF
+C6 B X 0.02fF
+C7 B VGND 0.03fF
+C8 VGND X 0.15fF
+C9 a_56_136# VPWR 0.57fF
+C10 a_56_136# B 0.30fF
+C11 a_56_136# X 0.26fF
+C12 VPWR A 0.07fF
+C13 B A 0.08fF
C14 VGND VNB 0.50fF
C15 X VNB 0.23fF
C16 VPWR VNB 0.50fF
@@ -1934,19 +1934,19 @@
X3 X a_63_368# VPWR VPB sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.12e+06u l=150000u
X4 a_63_368# B VGND VNB sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=550000u l=150000u
X5 VGND A a_63_368# VNB sky130_fd_pr__nfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=550000u l=150000u
-C0 VPWR A 0.05fF
-C1 VPWR X 0.18fF
-C2 a_63_368# a_152_368# 0.03fF
-C3 a_63_368# A 0.28fF
+C0 VGND B 0.11fF
+C1 B a_63_368# 0.14fF
+C2 VGND X 0.16fF
+C3 VPWR B 0.01fF
C4 a_63_368# X 0.33fF
-C5 VPWR a_63_368# 0.29fF
-C6 B A 0.10fF
-C7 VPB VPWR 0.04fF
-C8 B VPWR 0.01fF
-C9 VGND X 0.16fF
-C10 B a_63_368# 0.14fF
-C11 VGND a_63_368# 0.27fF
-C12 VGND B 0.11fF
+C5 a_63_368# A 0.28fF
+C6 VPWR X 0.18fF
+C7 VPWR A 0.05fF
+C8 a_152_368# a_63_368# 0.03fF
+C9 VGND a_63_368# 0.27fF
+C10 B A 0.10fF
+C11 VPWR VPB 0.04fF
+C12 VPWR a_63_368# 0.29fF
C13 X A 0.02fF
C14 VGND VNB 0.53fF
C15 X VNB 0.24fF
@@ -1996,163 +1996,163 @@
+ sky130_fd_sc_hs__and2_1_1/a_56_136# sky130_fd_sc_hs__and2_1
Xsky130_fd_sc_hs__or2_1_0 Q1 Q1_shift vss vss vdd vdd CLK_5 sky130_fd_sc_hs__or2_1_0/a_152_368#
+ sky130_fd_sc_hs__or2_1_0/a_63_368# sky130_fd_sc_hs__or2_1
-C0 DFlipFlop_1/latch_diff_0/D nCLK 0.11fF
-C1 CLK DFlipFlop_2/latch_diff_1/D 0.14fF
-C2 Q0 nQ2 0.23fF
-C3 DFlipFlop_3/latch_diff_0/m1_657_280# Q1 0.28fF
-C4 Q1_shift sky130_fd_sc_hs__or2_1_0/a_63_368# -0.27fF
-C5 CLK DFlipFlop_2/clock_inverter_0/inverter_cp_x1_0/out -0.31fF
-C6 CLK DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in 0.03fF
-C7 vdd DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out 0.02fF
-C8 Q0 DFlipFlop_0/Q 0.21fF
-C9 DFlipFlop_3/latch_diff_0/D CLK 0.11fF
-C10 vdd nQ0 0.11fF
-C11 CLK DFlipFlop_2/latch_diff_1/nD 0.09fF
-C12 vdd Q0 5.33fF
-C13 DFlipFlop_2/latch_diff_1/m1_657_280# nCLK 0.28fF
-C14 DFlipFlop_3/latch_diff_1/m1_657_280# Q1 0.28fF
-C15 DFlipFlop_1/D nCLK 0.14fF
-C16 DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in nCLK 0.14fF
-C17 sky130_fd_sc_hs__and2_1_1/a_56_136# nQ2 0.01fF
-C18 Q0 nQ0 0.33fF
-C19 Q1 nQ2 0.07fF
-C20 DFlipFlop_2/nQ CLK 0.13fF
-C21 Q1 DFlipFlop_3/latch_diff_1/D 0.79fF
-C22 Q1 DFlipFlop_3/latch_diff_1/nD 1.24fF
-C23 DFlipFlop_3/latch_diff_0/m1_657_280# nCLK 0.27fF
-C24 DFlipFlop_0/latch_diff_1/m1_657_280# nQ2 0.05fF
-C25 vdd CLK_5 0.15fF
-C26 Q1 DFlipFlop_0/Q 0.13fF
-C27 DFlipFlop_1/latch_diff_0/nD nQ0 0.08fF
-C28 CLK DFlipFlop_2/latch_diff_0/m1_657_280# 0.28fF
-C29 vdd sky130_fd_sc_hs__and2_1_1/a_56_136# 0.04fF
-C30 vdd DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in 0.03fF
-C31 vdd DFlipFlop_2/D 0.07fF
-C32 vdd Q1 9.49fF
-C33 Q0 DFlipFlop_0/latch_diff_1/nD 0.21fF
-C34 sky130_fd_sc_hs__and2_1_1/a_56_136# nQ0 0.01fF
-C35 DFlipFlop_2/latch_diff_0/D Q1 0.42fF
-C36 Q1 nQ0 0.06fF
-C37 DFlipFlop_1/D CLK 0.21fF
-C38 DFlipFlop_2/D sky130_fd_sc_hs__xor2_1_0/a_455_87# 0.08fF
-C39 DFlipFlop_0/D vdd 0.19fF
-C40 vdd DFlipFlop_3/nQ 0.02fF
-C41 Q0 DFlipFlop_2/D 0.25fF
-C42 Q1 Q0 9.65fF
-C43 nQ0 DFlipFlop_1/latch_diff_1/D 0.91fF
-C44 nCLK nQ2 0.10fF
-C45 nCLK DFlipFlop_3/latch_diff_1/D 0.14fF
-C46 CLK sky130_fd_sc_hs__and2_1_1/a_143_136# 0.03fF
-C47 Q1_shift sky130_fd_sc_hs__or2_1_0/a_152_368# -0.04fF
-C48 DFlipFlop_3/latch_diff_1/nD nCLK 0.09fF
-C49 Q0 DFlipFlop_1/latch_diff_1/D 0.06fF
-C50 DFlipFlop_0/D Q0 0.39fF
-C51 vdd sky130_fd_sc_hs__and2_1_0/a_56_136# 0.02fF
-C52 DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in vdd 0.02fF
-C53 nQ0 DFlipFlop_1/latch_diff_0/m1_657_280# 0.25fF
-C54 nCLK DFlipFlop_0/Q 0.11fF
-C55 Q1 DFlipFlop_0/latch_diff_1/nD 0.10fF
-C56 DFlipFlop_1/latch_diff_1/nD nQ0 0.88fF
-C57 sky130_fd_sc_hs__and2_1_0/a_56_136# Q0 0.17fF
-C58 vdd nCLK 0.34fF
-C59 DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in Q0 0.33fF
-C60 Q1 DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in 0.20fF
-C61 DFlipFlop_0/latch_diff_1/D Q0 0.23fF
-C62 Q1 DFlipFlop_2/D 0.10fF
-C63 DFlipFlop_1/latch_diff_1/nD Q0 0.21fF
-C64 DFlipFlop_2/latch_diff_0/D nCLK 0.11fF
-C65 nQ0 nCLK 0.09fF
-C66 DFlipFlop_2/latch_diff_0/nD CLK 0.08fF
-C67 DFlipFlop_3/latch_diff_1/m1_657_280# CLK 0.27fF
-C68 vdd DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in 0.03fF
-C69 vdd sky130_fd_sc_hs__or2_1_0/a_63_368# 0.02fF
-C70 nCLK sky130_fd_sc_hs__xor2_1_0/a_455_87# 0.02fF
-C71 vdd DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out 0.03fF
-C72 Q0 nCLK 0.20fF
-C73 CLK nQ2 0.17fF
-C74 Q1 DFlipFlop_1/latch_diff_1/D -0.10fF
-C75 DFlipFlop_1/latch_diff_1/m1_657_280# nQ0 0.21fF
-C76 DFlipFlop_0/D Q1 0.13fF
-C77 Q1 DFlipFlop_3/nQ 0.10fF
-C78 sky130_fd_sc_hs__xor2_1_0/a_194_125# vdd 0.03fF
-C79 CLK DFlipFlop_3/latch_diff_1/D 0.08fF
-C80 CLK DFlipFlop_3/latch_diff_1/nD 0.16fF
-C81 Q0 DFlipFlop_1/latch_diff_1/m1_657_280# 0.01fF
-C82 vdd DFlipFlop_2/nQ 0.02fF
-C83 CLK DFlipFlop_0/Q 0.08fF
-C84 vdd Q1_shift 0.10fF
-C85 Q1 sky130_fd_sc_hs__and2_1_0/a_56_136# 0.14fF
-C86 sky130_fd_sc_hs__xor2_1_0/a_194_125# Q0 0.26fF
-C87 nCLK DFlipFlop_0/latch_diff_1/nD 0.05fF
-C88 DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in Q1 0.09fF
-C89 DFlipFlop_0/latch_diff_1/D Q1 0.06fF
-C90 vdd CLK 0.41fF
-C91 DFlipFlop_1/latch_diff_1/nD Q1 0.10fF
-C92 CLK DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out 0.15fF
-C93 DFlipFlop_1/latch_diff_0/D nQ0 0.09fF
-C94 sky130_fd_sc_hs__and2_1_0/a_143_136# Q0 0.03fF
-C95 DFlipFlop_0/D sky130_fd_sc_hs__and2_1_0/a_56_136# 0.04fF
-C96 Q1 DFlipFlop_2/latch_diff_1/D 0.23fF
-C97 CLK nQ0 0.19fF
-C98 DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in nCLK -0.33fF
-C99 DFlipFlop_0/D DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in 0.02fF
-C100 DFlipFlop_2/D nCLK 0.41fF
-C101 vdd sky130_fd_sc_hs__xor2_1_0/a_355_368# 0.03fF
-C102 CLK_5 sky130_fd_sc_hs__or2_1_0/a_63_368# 0.06fF
-C103 Q1 nCLK -0.01fF
-C104 DFlipFlop_1/latch_diff_0/D Q0 0.42fF
-C105 sky130_fd_sc_hs__and2_1_1/a_143_136# nQ2 0.01fF
-C106 Q0 CLK 0.08fF
-C107 DFlipFlop_1/latch_diff_1/m1_657_280# DFlipFlop_2/D 0.04fF
-C108 Q1 sky130_fd_sc_hs__or2_1_0/a_63_368# 0.10fF
-C109 DFlipFlop_1/latch_diff_1/D nCLK 0.08fF
-C110 Q1 DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out 0.15fF
-C111 DFlipFlop_3/nQ nCLK 0.02fF
-C112 sky130_fd_sc_hs__xor2_1_0/a_355_368# Q0 0.03fF
-C113 DFlipFlop_3/latch_diff_0/D Q1 0.09fF
-C114 vdd DFlipFlop_1/D 0.25fF
-C115 DFlipFlop_0/latch_diff_1/m1_657_280# nCLK 0.28fF
-C116 DFlipFlop_1/D DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out 0.03fF
-C117 sky130_fd_sc_hs__xor2_1_0/a_194_125# DFlipFlop_2/D 0.08fF
-C118 Q1 DFlipFlop_2/latch_diff_1/nD 0.21fF
-C119 DFlipFlop_1/D nQ0 0.12fF
-C120 CLK DFlipFlop_0/latch_diff_0/m1_657_280# 0.28fF
-C121 DFlipFlop_1/latch_diff_0/nD CLK 0.08fF
-C122 CLK DFlipFlop_0/latch_diff_1/nD 0.02fF
-C123 Q1 DFlipFlop_3/latch_diff_0/nD 0.08fF
-C124 Q1 sky130_fd_sc_hs__and2_1_0/a_143_136# 0.02fF
-C125 DFlipFlop_1/D Q0 0.07fF
-C126 Q0 DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in 0.42fF
-C127 DFlipFlop_2/nQ Q1 0.31fF
-C128 Q1 Q1_shift 0.36fF
-C129 Q0 DFlipFlop_0/latch_diff_0/D 0.42fF
-C130 DFlipFlop_1/latch_diff_1/nD nCLK 0.16fF
-C131 Q1 DFlipFlop_1/latch_diff_0/D 0.18fF
-C132 sky130_fd_sc_hs__and2_1_1/a_56_136# CLK 0.06fF
-C133 sky130_fd_sc_hs__and2_1_1/a_143_136# nQ0 0.04fF
-C134 CLK DFlipFlop_2/D 0.14fF
-C135 DFlipFlop_2/latch_diff_1/D nCLK 0.08fF
-C136 Q1 CLK -0.10fF
-C137 Q1_shift DFlipFlop_3/nQ 0.04fF
-C138 CLK DFlipFlop_1/latch_diff_1/D 0.14fF
-C139 DFlipFlop_1/latch_diff_1/m1_657_280# nCLK 0.28fF
-C140 CLK DFlipFlop_3/nQ 0.01fF
-C141 DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out nCLK 0.05fF
-C142 DFlipFlop_0/Q nQ2 0.09fF
-C143 DFlipFlop_1/D sky130_fd_sc_hs__and2_1_1/a_56_136# 0.04fF
-C144 sky130_fd_sc_hs__xor2_1_0/a_194_125# nCLK 0.11fF
-C145 Q1 DFlipFlop_2/latch_diff_1/m1_657_280# 0.03fF
-C146 Q1 DFlipFlop_1/D 0.03fF
-C147 Q1 DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in 0.21fF
-C148 CLK DFlipFlop_1/latch_diff_0/m1_657_280# 0.28fF
-C149 DFlipFlop_2/latch_diff_1/nD nCLK 0.16fF
-C150 vdd nQ2 0.04fF
-C151 Q1 DFlipFlop_0/latch_diff_0/D 0.15fF
-C152 DFlipFlop_3/latch_diff_0/nD nCLK 0.08fF
-C153 nQ0 nQ2 0.03fF
-C154 DFlipFlop_0/latch_diff_1/D CLK 0.03fF
-C155 DFlipFlop_2/nQ nCLK 0.09fF
-C156 DFlipFlop_1/latch_diff_1/nD CLK 0.09fF
+C0 DFlipFlop_3/latch_diff_0/nD nCLK 0.08fF
+C1 DFlipFlop_1/latch_diff_1/m1_657_280# nQ0 0.21fF
+C2 CLK DFlipFlop_1/latch_diff_1/D 0.14fF
+C3 DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out vdd 0.03fF
+C4 DFlipFlop_1/latch_diff_1/D Q1 -0.10fF
+C5 DFlipFlop_1/D sky130_fd_sc_hs__and2_1_1/a_56_136# 0.04fF
+C6 DFlipFlop_1/latch_diff_1/m1_657_280# DFlipFlop_2/D 0.04fF
+C7 DFlipFlop_1/latch_diff_1/m1_657_280# nCLK 0.28fF
+C8 vdd sky130_fd_sc_hs__and2_1_1/a_56_136# 0.04fF
+C9 DFlipFlop_2/latch_diff_1/nD nCLK 0.16fF
+C10 vdd DFlipFlop_1/D 0.25fF
+C11 vdd sky130_fd_sc_hs__and2_1_0/a_56_136# 0.02fF
+C12 DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out Q1 0.15fF
+C13 DFlipFlop_1/latch_diff_1/m1_657_280# Q0 0.01fF
+C14 DFlipFlop_2/nQ vdd 0.02fF
+C15 CLK_5 vdd 0.15fF
+C16 nCLK DFlipFlop_2/latch_diff_1/D 0.08fF
+C17 CLK DFlipFlop_1/latch_diff_0/nD 0.08fF
+C18 CLK sky130_fd_sc_hs__and2_1_1/a_56_136# 0.06fF
+C19 CLK DFlipFlop_3/latch_diff_1/D 0.08fF
+C20 DFlipFlop_0/latch_diff_1/D Q0 0.23fF
+C21 CLK DFlipFlop_1/D 0.21fF
+C22 CLK sky130_fd_sc_hs__and2_1_1/a_143_136# 0.03fF
+C23 DFlipFlop_3/latch_diff_1/D Q1 0.79fF
+C24 nCLK DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in -0.33fF
+C25 CLK DFlipFlop_2/nQ 0.13fF
+C26 Q1 DFlipFlop_1/D 0.03fF
+C27 nCLK DFlipFlop_3/latch_diff_0/m1_657_280# 0.27fF
+C28 Q1 sky130_fd_sc_hs__and2_1_0/a_56_136# 0.14fF
+C29 Q1 DFlipFlop_2/latch_diff_0/D 0.42fF
+C30 DFlipFlop_2/nQ Q1 0.31fF
+C31 CLK vdd 0.41fF
+C32 Q1 vdd 9.49fF
+C33 CLK DFlipFlop_2/clock_inverter_0/inverter_cp_x1_0/out -0.31fF
+C34 vdd DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in 0.02fF
+C35 DFlipFlop_1/latch_diff_0/m1_657_280# nQ0 0.25fF
+C36 DFlipFlop_2/latch_diff_1/m1_657_280# Q1 0.03fF
+C37 CLK Q1 -0.10fF
+C38 Q0 DFlipFlop_0/D 0.39fF
+C39 sky130_fd_sc_hs__xor2_1_0/a_194_125# DFlipFlop_2/D 0.08fF
+C40 nCLK sky130_fd_sc_hs__xor2_1_0/a_194_125# 0.11fF
+C41 Q1 DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in 0.09fF
+C42 CLK DFlipFlop_0/latch_diff_0/m1_657_280# 0.28fF
+C43 sky130_fd_sc_hs__xor2_1_0/a_194_125# Q0 0.26fF
+C44 Q1 DFlipFlop_0/latch_diff_0/D 0.15fF
+C45 CLK DFlipFlop_0/latch_diff_1/nD 0.02fF
+C46 DFlipFlop_1/latch_diff_0/D nQ0 0.09fF
+C47 Q1 DFlipFlop_0/latch_diff_1/nD 0.10fF
+C48 vdd DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in 0.03fF
+C49 DFlipFlop_1/latch_diff_1/D nQ0 0.91fF
+C50 nCLK DFlipFlop_3/nQ 0.02fF
+C51 nCLK DFlipFlop_1/latch_diff_0/D 0.11fF
+C52 CLK DFlipFlop_2/latch_diff_0/m1_657_280# 0.28fF
+C53 CLK DFlipFlop_1/latch_diff_1/nD 0.09fF
+C54 CLK DFlipFlop_3/latch_diff_1/nD 0.16fF
+C55 Q1 DFlipFlop_1/latch_diff_1/nD 0.10fF
+C56 Q1 DFlipFlop_3/latch_diff_1/nD 1.24fF
+C57 CLK DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in 0.03fF
+C58 Q0 DFlipFlop_1/latch_diff_0/D 0.42fF
+C59 nCLK DFlipFlop_1/latch_diff_1/D 0.08fF
+C60 DFlipFlop_1/latch_diff_1/D Q0 0.06fF
+C61 Q1 sky130_fd_sc_hs__and2_1_0/a_143_136# 0.02fF
+C62 Q1 DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in 0.21fF
+C63 DFlipFlop_1/latch_diff_0/nD nQ0 0.08fF
+C64 nCLK DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out 0.05fF
+C65 sky130_fd_sc_hs__and2_1_1/a_56_136# nQ0 0.01fF
+C66 DFlipFlop_1/D nQ0 0.12fF
+C67 sky130_fd_sc_hs__and2_1_1/a_143_136# nQ0 0.04fF
+C68 Q1_shift sky130_fd_sc_hs__or2_1_0/a_63_368# -0.27fF
+C69 vdd nQ0 0.11fF
+C70 nCLK DFlipFlop_3/latch_diff_1/D 0.14fF
+C71 DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out DFlipFlop_1/D 0.03fF
+C72 nCLK DFlipFlop_1/D 0.14fF
+C73 nCLK DFlipFlop_2/latch_diff_0/D 0.11fF
+C74 nCLK DFlipFlop_2/nQ 0.09fF
+C75 nQ2 sky130_fd_sc_hs__and2_1_1/a_56_136# 0.01fF
+C76 DFlipFlop_2/D vdd 0.07fF
+C77 Q0 sky130_fd_sc_hs__and2_1_0/a_56_136# 0.17fF
+C78 Q0 DFlipFlop_1/D 0.07fF
+C79 nQ2 sky130_fd_sc_hs__and2_1_1/a_143_136# 0.01fF
+C80 DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out vdd 0.02fF
+C81 CLK nQ0 0.19fF
+C82 nCLK vdd 0.34fF
+C83 Q1 nQ0 0.06fF
+C84 nCLK DFlipFlop_0/latch_diff_1/m1_657_280# 0.28fF
+C85 nQ2 vdd 0.04fF
+C86 Q0 vdd 5.33fF
+C87 nCLK DFlipFlop_2/latch_diff_1/m1_657_280# 0.28fF
+C88 nQ2 DFlipFlop_0/latch_diff_1/m1_657_280# 0.05fF
+C89 CLK DFlipFlop_2/D 0.14fF
+C90 sky130_fd_sc_hs__xor2_1_0/a_355_368# vdd 0.03fF
+C91 CLK DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out 0.15fF
+C92 Q1 DFlipFlop_2/D 0.10fF
+C93 nCLK Q1 -0.01fF
+C94 CLK DFlipFlop_0/Q 0.08fF
+C95 Q1 DFlipFlop_0/Q 0.13fF
+C96 CLK nQ2 0.17fF
+C97 CLK Q0 0.08fF
+C98 nQ2 Q1 0.07fF
+C99 Q0 Q1 9.65fF
+C100 Q0 DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in 0.33fF
+C101 DFlipFlop_3/nQ Q1_shift 0.04fF
+C102 nCLK DFlipFlop_0/latch_diff_1/nD 0.05fF
+C103 DFlipFlop_1/latch_diff_1/nD nQ0 0.88fF
+C104 Q0 DFlipFlop_0/latch_diff_0/D 0.42fF
+C105 Q0 DFlipFlop_0/latch_diff_1/nD 0.21fF
+C106 DFlipFlop_3/latch_diff_0/nD Q1 0.08fF
+C107 nCLK DFlipFlop_1/latch_diff_1/nD 0.16fF
+C108 nCLK DFlipFlop_3/latch_diff_1/nD 0.09fF
+C109 Q0 DFlipFlop_1/latch_diff_1/nD 0.21fF
+C110 sky130_fd_sc_hs__or2_1_0/a_152_368# Q1_shift -0.04fF
+C111 nCLK DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in 0.14fF
+C112 DFlipFlop_2/latch_diff_1/nD CLK 0.09fF
+C113 Q0 sky130_fd_sc_hs__and2_1_0/a_143_136# 0.03fF
+C114 CLK_5 sky130_fd_sc_hs__or2_1_0/a_63_368# 0.06fF
+C115 vdd DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in 0.03fF
+C116 DFlipFlop_2/latch_diff_1/nD Q1 0.21fF
+C117 CLK DFlipFlop_3/latch_diff_1/m1_657_280# 0.27fF
+C118 Q1 DFlipFlop_3/latch_diff_1/m1_657_280# 0.28fF
+C119 vdd sky130_fd_sc_hs__or2_1_0/a_63_368# 0.02fF
+C120 CLK DFlipFlop_2/latch_diff_1/D 0.14fF
+C121 DFlipFlop_0/latch_diff_1/D CLK 0.03fF
+C122 Q0 DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in 0.42fF
+C123 DFlipFlop_2/latch_diff_1/D Q1 0.23fF
+C124 DFlipFlop_0/latch_diff_1/D Q1 0.06fF
+C125 DFlipFlop_0/D sky130_fd_sc_hs__and2_1_0/a_56_136# 0.04fF
+C126 vdd Q1_shift 0.10fF
+C127 Q1 DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in 0.20fF
+C128 Q1 DFlipFlop_3/latch_diff_0/m1_657_280# 0.28fF
+C129 DFlipFlop_0/D vdd 0.19fF
+C130 Q1 sky130_fd_sc_hs__or2_1_0/a_63_368# 0.10fF
+C131 CLK DFlipFlop_2/latch_diff_0/nD 0.08fF
+C132 nCLK nQ0 0.09fF
+C133 Q1 Q1_shift 0.36fF
+C134 sky130_fd_sc_hs__xor2_1_0/a_194_125# vdd 0.03fF
+C135 nQ2 nQ0 0.03fF
+C136 Q0 nQ0 0.33fF
+C137 Q1 DFlipFlop_0/D 0.13fF
+C138 nCLK DFlipFlop_2/D 0.41fF
+C139 DFlipFlop_0/D DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in 0.02fF
+C140 nCLK DFlipFlop_0/Q 0.11fF
+C141 CLK DFlipFlop_1/latch_diff_0/m1_657_280# 0.28fF
+C142 Q0 DFlipFlop_2/D 0.25fF
+C143 nCLK nQ2 0.10fF
+C144 nCLK Q0 0.20fF
+C145 sky130_fd_sc_hs__xor2_1_0/a_455_87# DFlipFlop_2/D 0.08fF
+C146 nQ2 DFlipFlop_0/Q 0.09fF
+C147 nCLK sky130_fd_sc_hs__xor2_1_0/a_455_87# 0.02fF
+C148 Q0 DFlipFlop_0/Q 0.21fF
+C149 nQ2 Q0 0.23fF
+C150 DFlipFlop_3/nQ vdd 0.02fF
+C151 Q0 sky130_fd_sc_hs__xor2_1_0/a_355_368# 0.03fF
+C152 CLK DFlipFlop_3/latch_diff_0/D 0.11fF
+C153 Q1 DFlipFlop_3/latch_diff_0/D 0.09fF
+C154 CLK DFlipFlop_3/nQ 0.01fF
+C155 Q1 DFlipFlop_3/nQ 0.10fF
+C156 Q1 DFlipFlop_1/latch_diff_0/D 0.18fF
C157 CLK_5 vss -0.18fF
C158 sky130_fd_sc_hs__or2_1_0/a_63_368# vss 0.38fF
C159 sky130_fd_sc_hs__and2_1_1/a_56_136# vss 0.41fF
@@ -2216,29 +2216,29 @@
X3 a_n129_n125# a_n159_n151# a_n225_n125# w_n455_n335# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X4 a_n33_n125# a_n63_n151# a_n129_n125# w_n455_n335# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X5 a_255_n125# a_225_n151# a_159_n125# w_n455_n335# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
-C0 a_159_n125# a_63_n125# 0.36fF
-C1 a_225_n151# a_129_n151# 0.02fF
-C2 a_159_n125# a_n129_n125# 0.08fF
-C3 a_255_n125# a_63_n125# 0.13fF
-C4 a_33_n151# a_n63_n151# 0.02fF
-C5 a_n317_n125# a_n33_n125# 0.08fF
-C6 a_n129_n125# a_255_n125# 0.06fF
-C7 a_33_n151# a_129_n151# 0.02fF
-C8 a_n317_n125# a_n225_n125# 0.36fF
-C9 a_n33_n125# a_n225_n125# 0.13fF
-C10 a_n317_n125# a_63_n125# 0.06fF
-C11 a_n33_n125# a_63_n125# 0.36fF
-C12 a_n129_n125# a_n317_n125# 0.13fF
+C0 a_255_n125# a_63_n125# 0.13fF
+C1 a_63_n125# a_n317_n125# 0.06fF
+C2 a_n129_n125# a_159_n125# 0.08fF
+C3 a_n225_n125# a_n317_n125# 0.36fF
+C4 a_n255_n151# a_n159_n151# 0.02fF
+C5 a_n159_n151# a_n63_n151# 0.02fF
+C6 a_n33_n125# a_255_n125# 0.08fF
+C7 a_n33_n125# a_n317_n125# 0.08fF
+C8 a_n129_n125# a_63_n125# 0.13fF
+C9 a_33_n151# a_129_n151# 0.02fF
+C10 a_n129_n125# a_n225_n125# 0.36fF
+C11 a_33_n151# a_n63_n151# 0.02fF
+C12 a_159_n125# a_63_n125# 0.36fF
C13 a_n129_n125# a_n33_n125# 0.36fF
-C14 a_159_n125# a_255_n125# 0.36fF
-C15 a_n225_n125# a_63_n125# 0.08fF
-C16 a_n159_n151# a_n255_n151# 0.02fF
-C17 a_n129_n125# a_n225_n125# 0.36fF
-C18 a_n129_n125# a_63_n125# 0.13fF
-C19 a_n159_n151# a_n63_n151# 0.02fF
-C20 a_159_n125# a_n33_n125# 0.13fF
-C21 a_n33_n125# a_255_n125# 0.08fF
-C22 a_159_n125# a_n225_n125# 0.06fF
+C14 a_n225_n125# a_159_n125# 0.06fF
+C15 a_129_n151# a_225_n151# 0.02fF
+C16 a_n129_n125# a_255_n125# 0.06fF
+C17 a_n129_n125# a_n317_n125# 0.13fF
+C18 a_n33_n125# a_159_n125# 0.13fF
+C19 a_n225_n125# a_63_n125# 0.08fF
+C20 a_255_n125# a_159_n125# 0.36fF
+C21 a_n33_n125# a_63_n125# 0.36fF
+C22 a_n225_n125# a_n33_n125# 0.13fF
C23 a_255_n125# w_n455_n335# 0.14fF
C24 a_159_n125# w_n455_n335# 0.08fF
C25 a_63_n125# w_n455_n335# 0.07fF
@@ -2263,36 +2263,36 @@
X3 a_159_n125# a_129_n154# a_63_n125# w_n455_n344# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X4 a_n225_n125# a_n255_n154# a_n317_n125# w_n455_n344# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
X5 a_63_n125# a_33_n154# a_n33_n125# w_n455_n344# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=1.25e+06u l=150000u
-C0 a_n129_n125# a_n225_n125# 0.36fF
-C1 a_n129_n125# w_n455_n344# 0.04fF
-C2 a_n317_n125# a_n33_n125# 0.08fF
-C3 a_n317_n125# a_n225_n125# 0.36fF
-C4 a_n317_n125# w_n455_n344# 0.11fF
-C5 a_n63_n154# a_n159_n154# 0.02fF
-C6 a_n129_n125# a_255_n125# 0.06fF
-C7 a_129_n154# a_225_n154# 0.02fF
-C8 a_n129_n125# a_n317_n125# 0.13fF
-C9 a_63_n125# a_159_n125# 0.36fF
-C10 a_n255_n154# a_n159_n154# 0.02fF
-C11 a_n33_n125# a_159_n125# 0.13fF
-C12 a_n225_n125# a_159_n125# 0.06fF
-C13 w_n455_n344# a_159_n125# 0.06fF
-C14 a_n63_n154# a_33_n154# 0.02fF
-C15 a_n33_n125# a_63_n125# 0.36fF
-C16 a_n225_n125# a_63_n125# 0.08fF
-C17 w_n455_n344# a_63_n125# 0.04fF
-C18 a_255_n125# a_159_n125# 0.36fF
-C19 a_255_n125# a_63_n125# 0.13fF
-C20 a_n225_n125# a_n33_n125# 0.13fF
-C21 w_n455_n344# a_n33_n125# 0.05fF
-C22 a_n129_n125# a_159_n125# 0.08fF
-C23 w_n455_n344# a_n225_n125# 0.06fF
-C24 a_n129_n125# a_63_n125# 0.13fF
-C25 a_n33_n125# a_255_n125# 0.08fF
-C26 a_n317_n125# a_63_n125# 0.06fF
-C27 w_n455_n344# a_255_n125# 0.11fF
-C28 a_129_n154# a_33_n154# 0.02fF
-C29 a_n129_n125# a_n33_n125# 0.36fF
+C0 w_n455_n344# a_255_n125# 0.11fF
+C1 a_159_n125# a_n129_n125# 0.08fF
+C2 w_n455_n344# a_n33_n125# 0.05fF
+C3 a_n225_n125# a_n33_n125# 0.13fF
+C4 w_n455_n344# a_63_n125# 0.04fF
+C5 a_255_n125# a_n33_n125# 0.08fF
+C6 a_n129_n125# a_n317_n125# 0.13fF
+C7 a_n225_n125# a_63_n125# 0.08fF
+C8 a_159_n125# w_n455_n344# 0.06fF
+C9 a_255_n125# a_63_n125# 0.13fF
+C10 a_n33_n125# a_63_n125# 0.36fF
+C11 a_159_n125# a_n225_n125# 0.06fF
+C12 a_n63_n154# a_n159_n154# 0.02fF
+C13 a_159_n125# a_255_n125# 0.36fF
+C14 w_n455_n344# a_n317_n125# 0.11fF
+C15 a_159_n125# a_n33_n125# 0.13fF
+C16 w_n455_n344# a_n129_n125# 0.04fF
+C17 a_n225_n125# a_n317_n125# 0.36fF
+C18 a_n225_n125# a_n129_n125# 0.36fF
+C19 a_33_n154# a_129_n154# 0.02fF
+C20 a_159_n125# a_63_n125# 0.36fF
+C21 a_n129_n125# a_255_n125# 0.06fF
+C22 a_n317_n125# a_n33_n125# 0.08fF
+C23 a_n129_n125# a_n33_n125# 0.36fF
+C24 a_33_n154# a_n63_n154# 0.02fF
+C25 a_n317_n125# a_63_n125# 0.06fF
+C26 a_n129_n125# a_63_n125# 0.13fF
+C27 a_n255_n154# a_n159_n154# 0.02fF
+C28 w_n455_n344# a_n225_n125# 0.06fF
+C29 a_225_n154# a_129_n154# 0.02fF
C30 a_255_n125# VSUBS 0.03fF
C31 a_159_n125# VSUBS 0.03fF
C32 a_63_n125# VSUBS 0.03fF
@@ -2314,9 +2314,9 @@
+ sky130_fd_pr__nfet_01v8_AZESM8
Xsky130_fd_pr__pfet_01v8_XJXT7S_0 vss vdd in in vdd in out out in in out vdd out vdd
+ in sky130_fd_pr__pfet_01v8_XJXT7S
-C0 vdd in 0.04fF
-C1 vdd out 0.29fF
-C2 in out 0.85fF
+C0 out vdd 0.29fF
+C1 in out 0.85fF
+C2 in vdd 0.04fF
C3 vdd vss 5.90fF
C4 out vss 1.30fF
C5 in vss 1.82fF
@@ -2330,19 +2330,19 @@
Xinverter_cp_x1_0 inverter_cp_x1_0/out QB vss vdd inverter_cp_x1
Xinverter_cp_x1_2 Up inverter_cp_x1_2/in vss vdd inverter_cp_x1
Xinverter_cp_x1_1 inverter_cp_x1_2/in QA vss vdd inverter_cp_x1
-C0 Up vdd 0.60fF
-C1 nUp vdd 0.14fF
-C2 QA vdd 0.02fF
-C3 nUp Up 0.20fF
-C4 inverter_cp_x1_0/out nDown 0.11fF
-C5 QB vdd 0.02fF
-C6 inverter_cp_x1_0/out Down 0.12fF
-C7 inverter_cp_x1_0/out vdd 0.25fF
-C8 inverter_cp_x1_2/in vdd 0.42fF
-C9 Down nDown 0.23fF
-C10 inverter_cp_x1_2/in Up 0.12fF
-C11 nDown vdd 0.80fF
-C12 Down vdd 0.09fF
+C0 inverter_cp_x1_2/in Up 0.12fF
+C1 inverter_cp_x1_2/in vdd 0.42fF
+C2 inverter_cp_x1_0/out nDown 0.11fF
+C3 Up vdd 0.60fF
+C4 QB vdd 0.02fF
+C5 Down vdd 0.09fF
+C6 nUp Up 0.20fF
+C7 nDown Down 0.23fF
+C8 inverter_cp_x1_0/out Down 0.12fF
+C9 nDown vdd 0.80fF
+C10 inverter_cp_x1_0/out vdd 0.25fF
+C11 nUp vdd 0.14fF
+C12 QA vdd 0.02fF
C13 inverter_cp_x1_2/in vss 2.01fF
C14 QA vss 1.09fF
C15 inverter_cp_x1_0/out vss 2.00fF
@@ -2360,22 +2360,22 @@
X1 a_n129_n90# a_n159_n207# a_n221_n90# w_n359_n309# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=900000u l=150000u
X2 a_63_n90# a_n159_n207# a_n33_n90# w_n359_n309# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=900000u l=150000u
X3 a_n33_n90# a_n63_n116# a_n129_n90# w_n359_n309# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=900000u l=150000u
-C0 a_n33_n90# a_159_n90# 0.09fF
-C1 a_n221_n90# a_159_n90# 0.04fF
-C2 w_n359_n309# a_159_n90# 0.09fF
-C3 a_n129_n90# a_63_n90# 0.09fF
-C4 a_63_n90# a_n33_n90# 0.26fF
-C5 a_n221_n90# a_63_n90# 0.06fF
-C6 w_n359_n309# a_63_n90# 0.06fF
-C7 a_n129_n90# a_n33_n90# 0.26fF
-C8 a_n221_n90# a_n129_n90# 0.26fF
-C9 a_n129_n90# w_n359_n309# 0.06fF
-C10 a_63_n90# a_159_n90# 0.26fF
-C11 a_n221_n90# a_n33_n90# 0.09fF
-C12 w_n359_n309# a_n33_n90# 0.05fF
-C13 a_n129_n90# a_159_n90# 0.06fF
-C14 a_n221_n90# w_n359_n309# 0.09fF
-C15 a_n63_n116# a_n159_n207# 0.12fF
+C0 a_159_n90# a_63_n90# 0.26fF
+C1 w_n359_n309# a_n129_n90# 0.06fF
+C2 a_n129_n90# a_n33_n90# 0.26fF
+C3 a_159_n90# a_n221_n90# 0.04fF
+C4 a_n221_n90# a_63_n90# 0.06fF
+C5 w_n359_n309# a_n33_n90# 0.05fF
+C6 a_159_n90# a_n129_n90# 0.06fF
+C7 a_n129_n90# a_63_n90# 0.09fF
+C8 a_159_n90# w_n359_n309# 0.09fF
+C9 a_n221_n90# a_n129_n90# 0.26fF
+C10 a_159_n90# a_n33_n90# 0.09fF
+C11 w_n359_n309# a_63_n90# 0.06fF
+C12 a_n33_n90# a_63_n90# 0.26fF
+C13 a_n63_n116# a_n159_n207# 0.12fF
+C14 w_n359_n309# a_n221_n90# 0.09fF
+C15 a_n221_n90# a_n33_n90# 0.09fF
C16 a_159_n90# VSUBS 0.03fF
C17 a_63_n90# VSUBS 0.03fF
C18 a_n33_n90# VSUBS 0.03fF
@@ -2390,10 +2390,10 @@
+ a_n125_n45# a_63_n45#
X0 a_63_n45# a_33_n71# a_n33_n45# w_n263_n255# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=450000u l=150000u
X1 a_n33_n45# a_n129_71# a_n125_n45# w_n263_n255# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=450000u l=150000u
-C0 a_n125_n45# a_n33_n45# 0.13fF
-C1 a_n129_71# a_33_n71# 0.04fF
-C2 a_63_n45# a_n33_n45# 0.13fF
-C3 a_63_n45# a_n125_n45# 0.05fF
+C0 a_n125_n45# a_63_n45# 0.05fF
+C1 a_n33_n45# a_n125_n45# 0.13fF
+C2 a_n33_n45# a_63_n45# 0.13fF
+C3 a_n129_71# a_33_n71# 0.04fF
C4 a_63_n45# w_n263_n255# 0.04fF
C5 a_n33_n45# w_n263_n255# 0.04fF
C6 a_n125_n45# w_n263_n255# 0.04fF
@@ -2406,14 +2406,14 @@
Xsky130_fd_pr__pfet_01v8_4F35BC_0 vss sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90#
+ vdd B A sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# out vdd vdd sky130_fd_pr__pfet_01v8_4F35BC
Xsky130_fd_pr__nfet_01v8_C3YG4M_0 out B A vss vss vss sky130_fd_pr__nfet_01v8_C3YG4M
-C0 sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vdd 0.02fF
-C1 out vdd 0.11fF
-C2 out B 0.40fF
-C3 A vdd 0.09fF
-C4 A B 0.24fF
-C5 out sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# 0.08fF
-C6 out A 0.06fF
-C7 vdd sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# 0.02fF
+C0 B A 0.24fF
+C1 vdd A 0.09fF
+C2 vdd sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# 0.02fF
+C3 sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# out 0.08fF
+C4 A out 0.06fF
+C5 sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vdd 0.02fF
+C6 B out 0.40fF
+C7 vdd out 0.11fF
C8 sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vss 0.03fF
C9 out vss 0.45fF
C10 sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vss 0.03fF
@@ -2431,26 +2431,26 @@
+ vss vdd nor_pfd_2/A nor_pfd_2/B nor_pfd
Xnor_pfd_3 nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# nor_pfd_2/B nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90#
+ vss vdd nor_pfd_3/A Reset nor_pfd
-C0 Q nor_pfd_3/A 0.98fF
-C1 Q Reset 0.14fF
-C2 Q nor_pfd_2/B 2.22fF
-C3 Q vdd 0.08fF
-C4 nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vdd 0.06fF
-C5 nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vdd 0.06fF
-C6 nor_pfd_2/A Q 1.38fF
-C7 nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vdd 0.06fF
-C8 nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vdd 0.06fF
-C9 Reset nor_pfd_3/A 0.12fF
-C10 nor_pfd_2/B nor_pfd_3/A 0.58fF
-C11 nor_pfd_3/A vdd 0.09fF
-C12 nor_pfd_2/A nor_pfd_3/A 0.38fF
-C13 nor_pfd_2/B Reset 0.43fF
-C14 nor_pfd_2/B vdd 0.02fF
-C15 nor_pfd_2/A nor_pfd_2/B 0.05fF
-C16 nor_pfd_2/A vdd -0.01fF
-C17 nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vdd 0.06fF
-C18 CLK Q 0.04fF
-C19 nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vdd 0.06fF
+C0 nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vdd 0.06fF
+C1 nor_pfd_3/A nor_pfd_2/A 0.38fF
+C2 vdd nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# 0.06fF
+C3 vdd nor_pfd_2/A -0.01fF
+C4 Q Reset 0.14fF
+C5 nor_pfd_2/B Reset 0.43fF
+C6 nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vdd 0.06fF
+C7 nor_pfd_3/A vdd 0.09fF
+C8 vdd nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# 0.06fF
+C9 Q nor_pfd_2/A 1.38fF
+C10 nor_pfd_2/B nor_pfd_2/A 0.05fF
+C11 nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vdd 0.06fF
+C12 nor_pfd_3/A Q 0.98fF
+C13 nor_pfd_2/B nor_pfd_3/A 0.58fF
+C14 Q vdd 0.08fF
+C15 nor_pfd_2/B vdd 0.02fF
+C16 CLK Q 0.04fF
+C17 nor_pfd_3/A Reset 0.12fF
+C18 nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vdd 0.06fF
+C19 nor_pfd_2/B Q 2.22fF
C20 nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vss 0.03fF
C21 nor_pfd_2/B vss 1.42fF
C22 nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vss 0.03fF
@@ -2474,17 +2474,17 @@
X1 a_n33_n45# a_n63_n71# a_n129_n45# w_n359_n255# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=450000u l=150000u
X2 a_159_n45# a_n63_n71# a_63_n45# w_n359_n255# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=450000u l=150000u
X3 a_n129_n45# a_n159_n173# a_n221_n45# w_n359_n255# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=450000u l=150000u
-C0 a_n129_n45# a_n33_n45# 0.13fF
-C1 a_n63_n71# a_n159_n173# 0.10fF
-C2 a_63_n45# a_159_n45# 0.13fF
-C3 a_n129_n45# a_63_n45# 0.05fF
-C4 a_n221_n45# a_n33_n45# 0.05fF
-C5 a_n129_n45# a_159_n45# 0.03fF
-C6 a_n221_n45# a_63_n45# 0.03fF
-C7 a_n221_n45# a_159_n45# 0.02fF
-C8 a_63_n45# a_n33_n45# 0.13fF
-C9 a_n33_n45# a_159_n45# 0.05fF
-C10 a_n221_n45# a_n129_n45# 0.13fF
+C0 a_n129_n45# a_n221_n45# 0.13fF
+C1 a_63_n45# a_n221_n45# 0.03fF
+C2 a_n33_n45# a_n129_n45# 0.13fF
+C3 a_63_n45# a_n33_n45# 0.13fF
+C4 a_63_n45# a_n129_n45# 0.05fF
+C5 a_n159_n173# a_n63_n71# 0.10fF
+C6 a_159_n45# a_n221_n45# 0.02fF
+C7 a_n33_n45# a_159_n45# 0.05fF
+C8 a_n33_n45# a_n221_n45# 0.05fF
+C9 a_159_n45# a_n129_n45# 0.03fF
+C10 a_63_n45# a_159_n45# 0.13fF
C11 a_159_n45# w_n359_n255# 0.04fF
C12 a_63_n45# w_n359_n255# 0.05fF
C13 a_n33_n45# w_n359_n255# 0.05fF
@@ -2498,10 +2498,10 @@
+ a_n33_n90# w_n263_n309#
X0 a_63_n90# a_33_n187# a_n33_n90# w_n263_n309# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=900000u l=150000u
X1 a_n33_n90# a_n99_n187# a_n125_n90# w_n263_n309# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=900000u l=150000u
-C0 a_63_n90# a_n33_n90# 0.26fF
-C1 a_n125_n90# a_63_n90# 0.09fF
-C2 a_n125_n90# a_n33_n90# 0.26fF
-C3 a_33_n187# a_n99_n187# 0.04fF
+C0 a_n99_n187# a_33_n187# 0.04fF
+C1 a_63_n90# a_n125_n90# 0.09fF
+C2 a_n33_n90# a_63_n90# 0.26fF
+C3 a_n33_n90# a_n125_n90# 0.26fF
C4 a_63_n90# VSUBS 0.03fF
C5 a_n33_n90# VSUBS 0.03fF
C6 a_n125_n90# VSUBS 0.03fF
@@ -2512,7 +2512,7 @@
.subckt sky130_fd_pr__nfet_01v8_ZXAV3F a_n73_n45# a_n33_67# a_15_n45# w_n211_n255#
X0 a_15_n45# a_n33_67# a_n73_n45# w_n211_n255# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=450000u l=150000u
-C0 a_15_n45# a_n73_n45# 0.16fF
+C0 a_n73_n45# a_15_n45# 0.16fF
C1 a_15_n45# w_n211_n255# 0.08fF
C2 a_n73_n45# w_n211_n255# 0.06fF
C3 a_n33_67# w_n211_n255# 0.10fF
@@ -2520,8 +2520,8 @@
.subckt sky130_fd_pr__pfet_01v8_4F7GBC VSUBS a_n51_n187# a_n73_n90# a_15_n90# w_n211_n309#
X0 a_15_n90# a_n51_n187# a_n73_n90# w_n211_n309# sky130_fd_pr__pfet_01v8 ad=0p pd=0u as=0p ps=0u w=900000u l=150000u
-C0 a_15_n90# w_n211_n309# 0.09fF
-C1 a_n73_n90# w_n211_n309# 0.04fF
+C0 w_n211_n309# a_n73_n90# 0.04fF
+C1 w_n211_n309# a_15_n90# 0.09fF
C2 a_15_n90# a_n73_n90# 0.31fF
C3 a_15_n90# VSUBS 0.03fF
C4 a_n73_n90# VSUBS 0.03fF
@@ -2535,16 +2535,16 @@
Xsky130_fd_pr__pfet_01v8_7T83YG_0 vss vdd vdd B A a_656_410# vdd sky130_fd_pr__pfet_01v8_7T83YG
Xsky130_fd_pr__nfet_01v8_ZXAV3F_0 vss a_656_410# out vss sky130_fd_pr__nfet_01v8_ZXAV3F
Xsky130_fd_pr__pfet_01v8_4F7GBC_0 vss a_656_410# vdd out vdd sky130_fd_pr__pfet_01v8_4F7GBC
-C0 A B 0.33fF
-C1 a_656_410# B 0.30fF
-C2 vdd A 0.05fF
-C3 sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_n129_n45# B 0.02fF
-C4 a_656_410# sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_63_n45# 0.07fF
-C5 a_656_410# vdd 0.20fF
-C6 a_656_410# A 0.04fF
-C7 out sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_63_n45# 0.03fF
-C8 out vdd 0.10fF
-C9 a_656_410# out 0.20fF
+C0 A a_656_410# 0.04fF
+C1 A vdd 0.05fF
+C2 B a_656_410# 0.30fF
+C3 B sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_n129_n45# 0.02fF
+C4 sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_63_n45# a_656_410# 0.07fF
+C5 out a_656_410# 0.20fF
+C6 out sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_63_n45# 0.03fF
+C7 A B 0.33fF
+C8 vdd a_656_410# 0.20fF
+C9 out vdd 0.10fF
C10 vdd vss 4.85fF
C11 out vss 0.47fF
C12 a_656_410# vss 1.00fF
@@ -2560,16 +2560,16 @@
Xdff_pfd_1 vdd vss dff_pfd_1/nor_pfd_2/A Down B dff_pfd_1/nor_pfd_3/A dff_pfd_1/nor_pfd_2/B
+ Reset dff_pfd
Xand_pfd_0 and_pfd_0/a_656_410# vss Reset vdd Up Down and_pfd
-C0 dff_pfd_1/nor_pfd_2/B vdd 0.04fF
-C1 dff_pfd_0/nor_pfd_3/A vdd 0.08fF
-C2 Down Up 0.06fF
-C3 dff_pfd_1/nor_pfd_2/A vdd 0.13fF
-C4 Reset vdd 0.02fF
-C5 dff_pfd_1/nor_pfd_3/A vdd 0.08fF
-C6 vdd dff_pfd_0/nor_pfd_2/A 0.13fF
-C7 Down vdd 0.08fF
-C8 dff_pfd_0/nor_pfd_2/B vdd 0.11fF
-C9 Up vdd 1.62fF
+C0 Up vdd 1.62fF
+C1 vdd dff_pfd_0/nor_pfd_2/A 0.13fF
+C2 Down vdd 0.08fF
+C3 vdd dff_pfd_1/nor_pfd_2/A 0.13fF
+C4 vdd dff_pfd_0/nor_pfd_2/B 0.11fF
+C5 dff_pfd_0/nor_pfd_3/A vdd 0.08fF
+C6 dff_pfd_1/nor_pfd_2/B vdd 0.04fF
+C7 vdd Reset 0.02fF
+C8 dff_pfd_1/nor_pfd_3/A vdd 0.08fF
+C9 Down Up 0.06fF
C10 and_pfd_0/a_656_410# vss 0.99fF
C11 and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_63_n45# vss 0.05fF
C12 and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_n129_n45# vss 0.05fF
@@ -2603,17 +2603,19 @@
C40 A vss 1.07fF
.ends
-.subckt top_pll_v1 vco_vctrl ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd vdd charge_pump_0/w_2544_775#
-+ pswitch biasp ring_osc_0/csvco_branch_2/vbp in_ref Down w_13905_n238# vss vco_D0
-+ QA ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd iref_cp out_to_div nDown out_to_pad
-+ ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd Up nUp
+.subckt top_pll_v1 vco_vctrl vdd pswitch ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd
++ charge_pump_0/w_2544_775# ring_osc_0/csvco_branch_2/vbp biasp in_ref Down vss w_13905_n238#
++ vco_D0 buffer_salida_0/a_3996_n100# ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd
++ QA charge_pump_0/w_1008_774# iref_cp ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd
++ out_to_div nDown out_to_pad Up nUp
Xloop_filter_0 lf_vc vco_vctrl vss loop_filter
Xcharge_pump_0 vss pswitch nswitch vco_vctrl vdd biasp nUp Down charge_pump_0/w_2544_775#
-+ iref_cp nDown Up charge_pump
++ iref_cp nDown Up charge_pump_0/w_1008_774# charge_pump
Xdiv_by_2_0 vss vdd div_by_2_0/clock_inverter_0/inverter_cp_x1_2/in out_by_2 n_out_by_2
+ out_buffer_div_2 out_to_div out_div_2 n_out_buffer_div_2 div_by_2_0/clock_inverter_0/inverter_cp_x1_0/out
+ n_out_div_2 div_by_2
-Xbuffer_salida_0 buffer_salida_0/a_678_n100# out_to_pad out_to_buffer vss vdd buffer_salida
+Xbuffer_salida_0 buffer_salida_0/a_678_n100# out_to_pad out_to_buffer buffer_salida_0/a_3996_n100#
++ vss vdd buffer_salida
Xring_osc_0 ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd vco_vctrl ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd
+ ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd vdd vss ring_osc_0/csvco_branch_2/vbp
+ ring_osc_0/csvco_branch_0/inverter_csvco_0/vss vco_D0 ring_osc_0/csvco_branch_2/cap_vco_0/t
@@ -2639,114 +2641,114 @@
Xpfd_cp_interface_0 vss pfd_cp_interface_0/inverter_cp_x1_2/in vdd pfd_cp_interface_0/inverter_cp_x1_0/out
+ Down QA QB nDown Up nUp pfd_cp_interface
XPFD_0 vss vdd QB QA in_ref out_div_by_5 pfd_reset PFD
-C0 n_out_by_2 div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_194_125# -0.05fF
-C1 n_out_by_2 div_by_5_0/DFlipFlop_1/latch_diff_1/D 0.10fF
-C2 n_out_by_2 div_by_5_0/DFlipFlop_0/latch_diff_1/D 0.17fF
-C3 nDown biasp 0.26fF
-C4 Down nDown 2.55fF
-C5 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_143_136# vco_vctrl -0.11fF
-C6 n_out_by_2 div_by_5_0/DFlipFlop_2/latch_diff_1/D 0.10fF
-C7 vco_vctrl div_5_Q0 0.48fF
-C8 vco_vctrl out_by_2 0.53fF
-C9 vco_vctrl nUp 0.02fF
-C10 n_out_by_2 div_5_nQ2 0.10fF
-C11 div_5_Q1 out_by_2 0.42fF
-C12 n_out_by_2 div_by_5_0/DFlipFlop_1/latch_diff_0/D 0.12fF
-C13 div_by_5_0/DFlipFlop_0/latch_diff_0/nD out_by_2 0.17fF
-C14 ring_osc_0/csvco_branch_2/cap_vco_0/t out_first_buffer 0.03fF
+C0 div_5_Q1_shift out_div_by_5 0.05fF
+C1 div_by_5_0/DFlipFlop_2/latch_diff_1/nD out_by_2 0.09fF
+C2 Up pswitch 1.98fF
+C3 nswitch vco_vctrl -0.06fF
+C4 biasp Up 0.26fF
+C5 div_by_5_0/DFlipFlop_1/latch_diff_0/nD out_by_2 0.10fF
+C6 n_out_by_2 div_by_5_0/DFlipFlop_3/latch_diff_1/nD 0.10fF
+C7 vdd buffer_salida_0/a_678_n100# 0.24fF
+C8 vdd ring_osc_0/csvco_branch_2/cap_vco_0/t 0.02fF
+C9 div_by_2_0/clock_inverter_0/inverter_cp_x1_0/out out_to_div -0.12fF
+C10 nUp vco_vctrl 0.02fF
+C11 n_out_by_2 div_by_5_0/DFlipFlop_0/Q -0.23fF
+C12 vdd nDown 0.22fF
+C13 div_by_5_0/DFlipFlop_2/latch_diff_0/nD out_by_2 0.10fF
+C14 vdd iref_cp 0.15fF
C15 div_by_2_0/clock_inverter_0/inverter_cp_x1_2/in out_to_div -0.16fF
-C16 div_by_5_0/DFlipFlop_0/D vco_vctrl -0.45fF
-C17 Down iref_cp 0.09fF
-C18 vdd vco_D0 0.03fF
-C19 vdd vco_vctrl -1.02fF
-C20 Up pswitch 1.98fF
-C21 div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out out_by_2 0.28fF
-C22 div_by_5_0/DFlipFlop_1/D out_by_2 0.38fF
-C23 buffer_salida_0/a_678_n100# out_to_buffer 0.22fF
-C24 Up nUp 2.72fF
-C25 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# vco_vctrl -0.36fF
-C26 div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in out_by_2 -0.22fF
-C27 n_out_by_2 vco_vctrl 0.52fF
-C28 div_by_5_0/DFlipFlop_2/D out_by_2 0.22fF
-C29 out_to_buffer out_to_div 0.13fF
-C30 Down nswitch 0.54fF
-C31 vdd buffer_salida_0/a_678_n100# 0.24fF
-C32 n_out_by_2 div_by_5_0/DFlipFlop_0/latch_diff_0/D 0.24fF
-C33 div_by_5_0/DFlipFlop_3/latch_diff_1/nD out_by_2 0.23fF
-C34 div_5_Q1 out_div_by_5 0.01fF
-C35 vdd out_to_div 0.21fF
-C36 vdd ring_osc_0/csvco_branch_2/vbp 0.03fF
-C37 n_out_by_2 div_5_Q1 1.04fF
-C38 Down biasp 1.24fF
-C39 div_by_5_0/DFlipFlop_0/latch_diff_1/nD out_by_2 0.17fF
-C40 vdd Up 0.28fF
-C41 pswitch nUp 0.85fF
-C42 div_5_Q0 out_by_2 0.09fF
-C43 vco_vctrl ring_osc_0/csvco_branch_0/inverter_csvco_0/vss 0.04fF
-C44 vco_vctrl nswitch -0.06fF
-C45 div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_143_136# out_by_2 -0.02fF
-C46 n_out_by_2 div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_355_368# 0.03fF
-C47 nDown pswitch 0.53fF
-C48 div_by_5_0/DFlipFlop_1/D n_out_by_2 0.22fF
-C49 div_by_5_0/DFlipFlop_2/latch_diff_1/nD out_by_2 0.09fF
-C50 nDown nUp -0.09fF
-C51 div_by_5_0/DFlipFlop_3/latch_diff_1/D out_by_2 0.09fF
-C52 lf_vc vdd 0.02fF
-C53 div_by_5_0/DFlipFlop_2/D n_out_by_2 0.19fF
-C54 div_by_5_0/DFlipFlop_0/Q out_by_2 0.09fF
-C55 div_5_nQ0 out_by_2 0.32fF
-C56 div_by_5_0/DFlipFlop_3/latch_diff_0/nD n_out_by_2 0.11fF
-C57 div_by_5_0/DFlipFlop_2/nQ out_by_2 0.23fF
-C58 div_by_5_0/DFlipFlop_0/D out_by_2 0.35fF
-C59 n_out_by_2 div_by_5_0/DFlipFlop_3/latch_diff_1/nD 0.10fF
-C60 n_out_by_2 div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in -0.20fF
-C61 vdd out_by_2 0.97fF
-C62 vdd nUp 0.05fF
-C63 div_by_5_0/DFlipFlop_1/latch_diff_1/nD out_by_2 0.09fF
-C64 vdd pfd_cp_interface_0/inverter_cp_x1_2/in 0.01fF
-C65 vdd div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out 0.04fF
-C66 n_out_by_2 div_by_5_0/DFlipFlop_0/latch_diff_1/nD 0.33fF
-C67 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_143_136# n_out_by_2 0.02fF
-C68 div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in n_out_by_2 -0.51fF
-C69 n_out_by_2 div_5_Q0 -0.12fF
-C70 vdd nDown 0.22fF
-C71 vdd out_to_buffer 0.07fF
-C72 n_out_by_2 div_by_5_0/DFlipFlop_2/latch_diff_0/D 0.12fF
-C73 div_by_5_0/DFlipFlop_3/latch_diff_0/D out_by_2 0.11fF
-C74 div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_56_136# out_by_2 0.10fF
-C75 vdd QA -0.04fF
-C76 div_by_5_0/DFlipFlop_2/latch_diff_0/nD out_by_2 0.10fF
-C77 div_by_2_0/clock_inverter_0/inverter_cp_x1_0/out out_to_div -0.12fF
+C16 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# n_out_by_2 0.12fF
+C17 div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_56_136# out_by_2 0.10fF
+C18 n_out_by_2 div_by_5_0/DFlipFlop_1/latch_diff_0/D 0.12fF
+C19 out_by_2 div_by_5_0/DFlipFlop_3/latch_diff_1/nD 0.23fF
+C20 div_by_5_0/DFlipFlop_0/Q out_by_2 0.09fF
+C21 vco_vctrl div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_143_136# -0.11fF
+C22 vdd QA -0.04fF
+C23 vdd out_to_div 0.21fF
+C24 Down nswitch 0.54fF
+C25 n_out_by_2 div_5_nQ2 0.10fF
+C26 n_out_by_2 div_by_5_0/DFlipFlop_2/latch_diff_1/D 0.10fF
+C27 nswitch nDown 0.76fF
+C28 vdd vco_D0 0.03fF
+C29 ring_osc_0/csvco_branch_2/vbp vco_vctrl 0.26fF
+C30 n_out_by_2 vco_vctrl 0.52fF
+C31 n_out_by_2 div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_194_125# -0.05fF
+C32 n_out_by_2 div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in -0.51fF
+C33 nUp nDown -0.09fF
+C34 div_5_nQ2 out_by_2 0.16fF
+C35 div_by_5_0/DFlipFlop_1/latch_diff_1/nD n_out_by_2 0.24fF
+C36 div_by_5_0/DFlipFlop_2/latch_diff_1/D out_by_2 0.23fF
+C37 div_5_Q1 out_div_by_5 0.01fF
+C38 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# vco_vctrl -0.36fF
+C39 out_by_2 div_by_5_0/DFlipFlop_0/latch_diff_0/nD 0.17fF
+C40 vco_vctrl out_by_2 0.53fF
+C41 vdd lf_vc 0.02fF
+C42 vdd div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out 0.04fF
+C43 div_by_5_0/DFlipFlop_1/latch_diff_1/nD out_by_2 0.09fF
+C44 n_out_by_2 div_by_5_0/DFlipFlop_2/nQ 0.10fF
+C45 div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in out_by_2 -0.22fF
+C46 Down biasp 1.24fF
+C47 n_out_by_2 div_by_5_0/DFlipFlop_0/latch_diff_0/D 0.24fF
+C48 nDown pswitch 0.53fF
+C49 div_by_5_0/DFlipFlop_2/nQ out_by_2 0.23fF
+C50 biasp nDown 0.26fF
+C51 vdd out_div_by_5 0.28fF
+C52 vdd nUp 0.05fF
+C53 n_out_by_2 div_by_5_0/DFlipFlop_1/latch_diff_1/D 0.10fF
+C54 n_out_by_2 div_5_Q1 1.04fF
+C55 div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_0/out out_by_2 0.09fF
+C56 div_by_5_0/DFlipFlop_0/latch_diff_1/D n_out_by_2 0.17fF
+C57 vco_vctrl ring_osc_0/csvco_branch_0/inverter_csvco_0/vss 0.04fF
+C58 n_out_by_2 div_by_5_0/DFlipFlop_2/D 0.19fF
+C59 n_out_by_2 div_by_5_0/DFlipFlop_0/latch_diff_1/nD 0.33fF
+C60 div_by_5_0/DFlipFlop_1/latch_diff_1/D out_by_2 0.23fF
+C61 div_5_Q1 out_by_2 0.42fF
+C62 div_by_5_0/DFlipFlop_0/latch_diff_1/D out_by_2 0.33fF
+C63 div_by_5_0/DFlipFlop_3/latch_diff_1/D n_out_by_2 0.24fF
+C64 div_by_5_0/DFlipFlop_2/D out_by_2 0.22fF
+C65 buffer_salida_0/a_678_n100# out_to_buffer 0.22fF
+C66 n_out_by_2 div_by_5_0/DFlipFlop_2/latch_diff_0/D 0.12fF
+C67 div_by_5_0/DFlipFlop_0/latch_diff_1/nD out_by_2 0.17fF
+C68 vdd Up 0.28fF
+C69 n_out_by_2 div_by_5_0/DFlipFlop_1/D 0.22fF
+C70 div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out out_by_2 -0.04fF
+C71 n_out_by_2 div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_158_392# 0.01fF
+C72 out_first_buffer ring_osc_0/csvco_branch_2/cap_vco_0/t 0.03fF
+C73 vdd ring_osc_0/csvco_branch_2/vbp 0.03fF
+C74 vdd n_out_by_2 1.03fF
+C75 n_out_by_2 div_by_5_0/DFlipFlop_3/latch_diff_0/nD 0.11fF
+C76 div_5_nQ0 n_out_by_2 0.10fF
+C77 div_by_5_0/DFlipFlop_3/latch_diff_1/D out_by_2 0.09fF
C78 n_out_by_2 div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out -0.11fF
-C79 div_by_5_0/DFlipFlop_1/latch_diff_1/D out_by_2 0.23fF
-C80 div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_0/out out_by_2 0.09fF
-C81 n_out_by_2 div_by_5_0/DFlipFlop_2/latch_diff_1/nD 0.24fF
-C82 Up biasp 0.26fF
-C83 div_by_5_0/DFlipFlop_0/latch_diff_1/D out_by_2 0.33fF
-C84 vco_vctrl div_5_Q1 0.14fF
-C85 div_by_5_0/sky130_fd_sc_hs__or2_1_0/a_63_368# out_div_by_5 0.18fF
-C86 div_by_5_0/DFlipFlop_3/latch_diff_1/D n_out_by_2 0.24fF
-C87 div_by_5_0/DFlipFlop_2/latch_diff_1/D out_by_2 0.23fF
-C88 n_out_by_2 div_by_5_0/DFlipFlop_0/Q -0.23fF
-C89 vdd ring_osc_0/csvco_branch_2/cap_vco_0/t 0.02fF
-C90 n_out_by_2 div_5_nQ0 0.10fF
-C91 n_out_by_2 div_by_5_0/DFlipFlop_2/nQ 0.10fF
-C92 vdd out_div_by_5 0.28fF
-C93 div_by_5_0/DFlipFlop_0/D n_out_by_2 -1.48fF
-C94 vdd div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# 0.03fF
-C95 div_by_5_0/DFlipFlop_1/latch_diff_0/nD out_by_2 0.10fF
-C96 vco_vctrl ring_osc_0/csvco_branch_2/vbp 0.26fF
-C97 vdd n_out_by_2 1.03fF
-C98 n_out_by_2 div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in 0.27fF
-C99 n_out_by_2 div_by_5_0/DFlipFlop_1/latch_diff_1/nD 0.24fF
-C100 div_5_Q1_shift out_div_by_5 0.05fF
-C101 vdd iref_cp 0.15fF
-C102 div_5_nQ2 out_by_2 0.16fF
-C103 n_out_by_2 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# 0.12fF
-C104 nDown nswitch 0.76fF
-C105 div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out out_by_2 -0.04fF
-C106 div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_158_392# n_out_by_2 0.01fF
-C107 biasp nUp -0.17fF
+C79 n_out_by_2 div_by_5_0/DFlipFlop_0/D -1.48fF
+C80 div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_143_136# out_by_2 -0.02fF
+C81 vco_vctrl div_5_Q1 0.14fF
+C82 vdd div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# 0.03fF
+C83 n_out_by_2 div_5_Q0 -0.12fF
+C84 n_out_by_2 div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_355_368# 0.03fF
+C85 div_by_5_0/DFlipFlop_1/D out_by_2 0.38fF
+C86 vdd out_by_2 0.97fF
+C87 out_to_buffer out_to_div 0.13fF
+C88 div_5_nQ0 out_by_2 0.32fF
+C89 n_out_by_2 div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in 0.27fF
+C90 out_by_2 div_by_5_0/DFlipFlop_0/D 0.35fF
+C91 Down nDown 2.55fF
+C92 iref_cp Down 0.09fF
+C93 div_5_Q0 out_by_2 0.09fF
+C94 div_by_5_0/DFlipFlop_3/latch_diff_0/D out_by_2 0.11fF
+C95 nUp Up 2.72fF
+C96 nUp pswitch 0.85fF
+C97 nUp biasp -0.17fF
+C98 vdd vco_vctrl -1.02fF
+C99 vco_vctrl div_by_5_0/DFlipFlop_0/D -0.45fF
+C100 vdd pfd_cp_interface_0/inverter_cp_x1_2/in 0.01fF
+C101 div_by_5_0/sky130_fd_sc_hs__or2_1_0/a_63_368# out_div_by_5 0.18fF
+C102 vdd out_to_buffer 0.07fF
+C103 div_by_5_0/DFlipFlop_2/latch_diff_1/nD n_out_by_2 0.24fF
+C104 vco_vctrl div_5_Q0 0.48fF
+C105 n_out_by_2 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_143_136# 0.02fF
+C106 n_out_by_2 div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in -0.20fF
+C107 div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out out_by_2 0.28fF
C108 PFD_0/and_pfd_0/a_656_410# vss 0.96fF
C109 PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_63_n45# vss 0.05fF
C110 PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_n129_n45# vss 0.07fF
@@ -2879,6 +2881,12 @@
C237 loop_filter_0/res_loop_filter_2/out vss 7.90fF
.ends
+.subckt sky130_fd_pr__cap_mim_m3_2_2Y8F6P VSUBS c2_n3251_n3000# m4_n3351_n3100#
+X0 c2_n3251_n3000# m4_n3351_n3100# sky130_fd_pr__cap_mim_m3_2 l=3e+07u w=3e+07u
+C0 m4_n3351_n3100# c2_n3251_n3000# 72.82fF
+C1 m4_n3351_n3100# VSUBS 14.58fF
+.ends
+
.subckt sky130_fd_pr__pfet_01v8_lvt_8P223X VSUBS a_n2017_n1317# a_n1731_n1219# a_n1879_n1219#
+ a_n2017_n61# w_n2018_n202#
X0 a_n1731_n1219# a_n2017_n61# w_n2018_n202# w_n2018_n202# sky130_fd_pr__pfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=4.5e+06u l=450000u
@@ -2931,16 +2939,16 @@
X47 w_n2018_n202# a_n2017_n61# a_n1731_n1219# w_n2018_n202# sky130_fd_pr__pfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=4.5e+06u l=450000u
X48 a_n1731_n1219# a_n2017_n1317# a_n1879_n1219# w_n2018_n202# sky130_fd_pr__pfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=4.5e+06u l=450000u
X49 a_n1731_n1219# a_n2017_n1317# a_n1879_n1219# w_n2018_n202# sky130_fd_pr__pfet_01v8_lvt ad=0p pd=0u as=0p ps=0u w=4.5e+06u l=450000u
-C0 a_n2017_n61# w_n2018_n202# 1.37fF
-C1 w_n2018_n202# a_n1879_n1219# 0.25fF
-C2 a_n2017_n1317# a_n1731_n1219# 4.73fF
-C3 a_n2017_n61# a_n1731_n1219# 5.23fF
-C4 a_n1879_n1219# a_n1731_n1219# 19.29fF
-C5 a_n2017_n61# a_n2017_n1317# 2.88fF
-C6 w_n2018_n202# a_n1731_n1219# 19.90fF
-C7 a_n2017_n1317# a_n1879_n1219# 2.66fF
-C8 a_n2017_n61# a_n1879_n1219# 0.16fF
-C9 a_n2017_n1317# w_n2018_n202# 0.16fF
+C0 w_n2018_n202# a_n2017_n61# 1.37fF
+C1 w_n2018_n202# a_n1731_n1219# 19.90fF
+C2 w_n2018_n202# a_n2017_n1317# 0.16fF
+C3 w_n2018_n202# a_n1879_n1219# 0.25fF
+C4 a_n1731_n1219# a_n2017_n61# 5.23fF
+C5 a_n2017_n1317# a_n2017_n61# 2.88fF
+C6 a_n1731_n1219# a_n2017_n1317# 4.73fF
+C7 a_n1879_n1219# a_n2017_n61# 0.16fF
+C8 a_n1879_n1219# a_n1731_n1219# 19.29fF
+C9 a_n1879_n1219# a_n2017_n1317# 2.66fF
C10 a_n1879_n1219# VSUBS 1.53fF
C11 a_n2017_n1317# VSUBS 5.03fF
C12 a_n1731_n1219# VSUBS 2.60fF
@@ -2948,7 +2956,7 @@
C14 w_n2018_n202# VSUBS 37.43fF
.ends
-.subckt bias VSUBS vdd iref_1 iref_2 iref
+.subckt bias VSUBS vdd iref_0 iref_1 iref_2 iref
Xsky130_fd_pr__pfet_01v8_lvt_8P223X_5 VSUBS iref m1_20168_984# iref m1_20168_984#
+ vdd sky130_fd_pr__pfet_01v8_lvt_8P223X
Xsky130_fd_pr__pfet_01v8_lvt_8P223X_6 VSUBS iref sky130_fd_pr__pfet_01v8_lvt_8P223X_6/a_n1731_n1219#
@@ -2971,44 +2979,44 @@
+ iref_3 m1_20168_984# vdd sky130_fd_pr__pfet_01v8_lvt_8P223X
Xsky130_fd_pr__pfet_01v8_lvt_8P223X_4 VSUBS iref sky130_fd_pr__pfet_01v8_lvt_8P223X_4/a_n1731_n1219#
+ iref_4 m1_20168_984# vdd sky130_fd_pr__pfet_01v8_lvt_8P223X
-C0 iref_7 iref_8 0.05fF
-C1 sky130_fd_pr__pfet_01v8_lvt_8P223X_1/a_n1731_n1219# sky130_fd_pr__pfet_01v8_lvt_8P223X_0/a_n1731_n1219# 0.67fF
-C2 sky130_fd_pr__pfet_01v8_lvt_8P223X_1/a_n1731_n1219# m1_20168_984# -0.39fF
-C3 sky130_fd_pr__pfet_01v8_lvt_8P223X_8/a_n1731_n1219# vdd 0.24fF
-C4 sky130_fd_pr__pfet_01v8_lvt_8P223X_7/a_n1731_n1219# vdd 0.24fF
-C5 sky130_fd_pr__pfet_01v8_lvt_8P223X_7/a_n1731_n1219# iref_5 0.24fF
-C6 sky130_fd_pr__pfet_01v8_lvt_8P223X_10/a_n1731_n1219# vdd 0.24fF
-C7 sky130_fd_pr__pfet_01v8_lvt_8P223X_1/a_n1731_n1219# iref -0.15fF
-C8 iref m1_20168_984# 0.07fF
-C9 sky130_fd_pr__pfet_01v8_lvt_8P223X_10/a_n1731_n1219# iref_8 0.24fF
-C10 vdd m1_20168_984# 0.25fF
-C11 iref_5 iref_6 0.05fF
-C12 iref_9 iref -0.01fF
-C13 sky130_fd_pr__pfet_01v8_lvt_8P223X_3/a_n1731_n1219# m1_20168_984# 0.01fF
-C14 sky130_fd_pr__pfet_01v8_lvt_8P223X_6/a_n1731_n1219# m1_20168_984# 0.54fF
-C15 iref vdd -0.07fF
-C16 iref_7 iref_6 0.05fF
-C17 iref_5 iref 0.05fF
-C18 iref_9 iref_8 0.05fF
-C19 sky130_fd_pr__pfet_01v8_lvt_8P223X_9/a_n1731_n1219# vdd 0.24fF
-C20 sky130_fd_pr__pfet_01v8_lvt_8P223X_4/a_n1731_n1219# m1_20168_984# 0.01fF
-C21 iref iref_8 -0.03fF
-C22 iref_2 iref -0.01fF
-C23 sky130_fd_pr__pfet_01v8_lvt_8P223X_3/a_n1731_n1219# vdd 0.24fF
-C24 iref_1 iref -0.02fF
-C25 iref_4 iref 0.30fF
-C26 sky130_fd_pr__pfet_01v8_lvt_8P223X_2/a_n1731_n1219# vdd 0.24fF
-C27 iref_1 iref_0 0.05fF
-C28 iref_2 iref_3 0.05fF
-C29 sky130_fd_pr__pfet_01v8_lvt_8P223X_4/a_n1731_n1219# iref 0.02fF
-C30 sky130_fd_pr__pfet_01v8_lvt_8P223X_8/a_n1731_n1219# iref_6 0.24fF
-C31 iref_2 sky130_fd_pr__pfet_01v8_lvt_8P223X_3/a_n1731_n1219# 0.24fF
-C32 iref_4 iref_3 0.05fF
-C33 sky130_fd_pr__pfet_01v8_lvt_8P223X_9/a_n1731_n1219# iref_7 0.24fF
-C34 sky130_fd_pr__pfet_01v8_lvt_8P223X_4/a_n1731_n1219# vdd 0.24fF
-C35 iref_1 sky130_fd_pr__pfet_01v8_lvt_8P223X_2/a_n1731_n1219# 0.24fF
-C36 iref_1 iref_2 0.05fF
-C37 sky130_fd_pr__pfet_01v8_lvt_8P223X_4/a_n1731_n1219# iref_3 0.24fF
+C0 sky130_fd_pr__pfet_01v8_lvt_8P223X_2/a_n1731_n1219# iref_1 0.24fF
+C1 iref iref_2 -0.01fF
+C2 iref m1_20168_984# 0.07fF
+C3 iref sky130_fd_pr__pfet_01v8_lvt_8P223X_4/a_n1731_n1219# 0.02fF
+C4 vdd iref -0.07fF
+C5 vdd sky130_fd_pr__pfet_01v8_lvt_8P223X_9/a_n1731_n1219# 0.24fF
+C6 iref_7 sky130_fd_pr__pfet_01v8_lvt_8P223X_9/a_n1731_n1219# 0.24fF
+C7 iref iref_1 -0.02fF
+C8 iref iref_5 0.05fF
+C9 iref_2 iref_3 0.05fF
+C10 sky130_fd_pr__pfet_01v8_lvt_8P223X_4/a_n1731_n1219# iref_3 0.24fF
+C11 vdd sky130_fd_pr__pfet_01v8_lvt_8P223X_10/a_n1731_n1219# 0.24fF
+C12 vdd sky130_fd_pr__pfet_01v8_lvt_8P223X_7/a_n1731_n1219# 0.24fF
+C13 iref iref_4 0.30fF
+C14 sky130_fd_pr__pfet_01v8_lvt_8P223X_1/a_n1731_n1219# m1_20168_984# -0.39fF
+C15 iref iref_8 -0.03fF
+C16 sky130_fd_pr__pfet_01v8_lvt_8P223X_7/a_n1731_n1219# iref_5 0.24fF
+C17 iref_3 iref_4 0.05fF
+C18 sky130_fd_pr__pfet_01v8_lvt_8P223X_10/a_n1731_n1219# iref_8 0.24fF
+C19 sky130_fd_pr__pfet_01v8_lvt_8P223X_4/a_n1731_n1219# m1_20168_984# 0.01fF
+C20 vdd m1_20168_984# 0.25fF
+C21 vdd sky130_fd_pr__pfet_01v8_lvt_8P223X_4/a_n1731_n1219# 0.24fF
+C22 vdd sky130_fd_pr__pfet_01v8_lvt_8P223X_8/a_n1731_n1219# 0.24fF
+C23 iref_0 iref_1 0.05fF
+C24 iref_2 iref_1 0.05fF
+C25 iref_9 iref_8 0.05fF
+C26 sky130_fd_pr__pfet_01v8_lvt_8P223X_1/a_n1731_n1219# sky130_fd_pr__pfet_01v8_lvt_8P223X_0/a_n1731_n1219# 0.67fF
+C27 sky130_fd_pr__pfet_01v8_lvt_8P223X_8/a_n1731_n1219# iref_6 0.24fF
+C28 iref_7 iref_6 0.05fF
+C29 iref_5 iref_6 0.05fF
+C30 sky130_fd_pr__pfet_01v8_lvt_8P223X_6/a_n1731_n1219# m1_20168_984# 0.54fF
+C31 iref sky130_fd_pr__pfet_01v8_lvt_8P223X_1/a_n1731_n1219# -0.15fF
+C32 iref_7 iref_8 0.05fF
+C33 iref_9 iref -0.01fF
+C34 iref_2 sky130_fd_pr__pfet_01v8_lvt_8P223X_3/a_n1731_n1219# 0.24fF
+C35 m1_20168_984# sky130_fd_pr__pfet_01v8_lvt_8P223X_3/a_n1731_n1219# 0.01fF
+C36 vdd sky130_fd_pr__pfet_01v8_lvt_8P223X_2/a_n1731_n1219# 0.24fF
+C37 vdd sky130_fd_pr__pfet_01v8_lvt_8P223X_3/a_n1731_n1219# 0.24fF
C38 iref_4 VSUBS 1.17fF
C39 sky130_fd_pr__pfet_01v8_lvt_8P223X_4/a_n1731_n1219# VSUBS 2.60fF
C40 iref_3 VSUBS 0.64fF
@@ -3034,6 +3042,15 @@
C60 sky130_fd_pr__pfet_01v8_lvt_8P223X_6/a_n1731_n1219# VSUBS 2.60fF
.ends
+.subckt mimcap_decoup_1x5 VSUBS t b
+Xdecap[0] VSUBS t b sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xdecap[1] VSUBS t b sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xdecap[2] VSUBS t b sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xdecap[3] VSUBS t b sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xdecap[4] VSUBS t b sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+C0 b VSUBS 68.24fF
+.ends
+
.subckt sky130_fd_pr__cap_mim_m3_1_WHJTNJ VSUBS m3_n4309_50# m3_n4309_n4250# c1_n4209_n4150#
+ c1_110_n4150# m3_10_n4250#
X0 c1_n4209_n4150# m3_n4309_n4250# sky130_fd_pr__cap_mim_m3_1 l=2e+07u w=2e+07u
@@ -3041,12 +3058,12 @@
X2 c1_n4209_n4150# m3_n4309_50# sky130_fd_pr__cap_mim_m3_1 l=2e+07u w=2e+07u
X3 c1_110_n4150# m3_10_n4250# sky130_fd_pr__cap_mim_m3_1 l=2e+07u w=2e+07u
C0 m3_10_n4250# c1_110_n4150# 81.11fF
-C1 c1_110_n4150# c1_n4209_n4150# 1.32fF
-C2 m3_10_n4250# m3_n4309_50# 1.75fF
-C3 m3_n4309_50# c1_n4209_n4150# 38.10fF
-C4 m3_10_n4250# m3_n4309_n4250# 1.75fF
-C5 m3_n4309_n4250# c1_n4209_n4150# 38.10fF
-C6 m3_n4309_50# m3_n4309_n4250# 2.63fF
+C1 m3_n4309_n4250# c1_n4209_n4150# 38.10fF
+C2 m3_10_n4250# m3_n4309_n4250# 1.75fF
+C3 m3_n4309_50# m3_n4309_n4250# 2.63fF
+C4 m3_n4309_50# c1_n4209_n4150# 38.10fF
+C5 m3_n4309_50# m3_10_n4250# 1.75fF
+C6 c1_110_n4150# c1_n4209_n4150# 1.32fF
C7 c1_110_n4150# VSUBS 0.12fF
C8 c1_n4209_n4150# VSUBS 0.12fF
C9 m3_n4309_n4250# VSUBS 8.68fF
@@ -3063,7 +3080,7 @@
.subckt sky130_fd_pr__nfet_01v8_U2JGXT w_n226_n510# a_n118_n388# a_n88_n300# a_30_n300#
X0 a_30_n300# a_n118_n388# a_n88_n300# w_n226_n510# sky130_fd_pr__nfet_01v8 ad=0p pd=0u as=0p ps=0u w=3e+06u l=300000u
-C0 a_n88_n300# a_n118_n388# 0.11fF
+C0 a_n118_n388# a_n88_n300# 0.11fF
C1 a_n88_n300# a_30_n300# 0.61fF
C2 a_30_n300# w_n226_n510# 0.40fF
C3 a_n88_n300# w_n226_n510# 0.40fF
@@ -3078,9 +3095,9 @@
Xres_loop_filter_0 vss res_loop_filter_2/out in res_loop_filter
Xres_loop_filter_1 vss res_loop_filter_2/out vc_pex res_loop_filter
Xres_loop_filter_2 vss res_loop_filter_2/out vc_pex res_loop_filter
-C0 in cap3_loop_filter_0/in 0.79fF
+C0 vc_pex in 0.18fF
C1 D0_cap in 0.07fF
-C2 in vc_pex 0.18fF
+C2 cap3_loop_filter_0/in in 0.79fF
C3 vc_pex vss -38.13fF
C4 res_loop_filter_2/out vss 8.49fF
C5 D0_cap vss 0.04fF
@@ -3093,12 +3110,13 @@
+ vco_vctrl Down w_13905_n238# vss D0_vco iref_cp ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd
+ out_to_div DO_cap nDown biasp out_to_pad Up nUp
Xcharge_pump_0 vss pswitch nswitch vco_vctrl vdd biasp nUp Down charge_pump_0/w_2544_775#
-+ iref_cp nDown Up charge_pump
++ iref_cp nDown Up charge_pump_0/w_1008_774# charge_pump
Xloop_filter_v2_0 lf_vc DO_cap vco_vctrl vss loop_filter_v2
Xdiv_by_2_0 vss vdd div_by_2_0/clock_inverter_0/inverter_cp_x1_2/in out_by_2 n_out_by_2
+ out_buffer_div_2 out_to_div out_div_2 n_out_buffer_div_2 div_by_2_0/clock_inverter_0/inverter_cp_x1_0/out
+ n_out_div_2 div_by_2
-Xbuffer_salida_0 buffer_salida_0/a_678_n100# out_to_pad out_to_buffer vss vdd buffer_salida
+Xbuffer_salida_0 buffer_salida_0/a_678_n100# out_to_pad out_to_buffer buffer_salida_0/a_3996_n100#
++ vss vdd buffer_salida
Xring_osc_0 ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd vco_vctrl ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd
+ ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd vdd vss ring_osc_0/csvco_branch_2/vbp
+ ring_osc_0/csvco_branch_0/inverter_csvco_0/vss D0_vco ring_osc_0/csvco_branch_2/cap_vco_0/t
@@ -3124,114 +3142,114 @@
Xpfd_cp_interface_0 vss pfd_cp_interface_0/inverter_cp_x1_2/in vdd pfd_cp_interface_0/inverter_cp_x1_0/out
+ Down QA QB nDown Up nUp pfd_cp_interface
XPFD_0 vss vdd QB QA in_ref out_div_by_5 pfd_reset PFD
-C0 div_5_nQ0 out_by_2 0.32fF
-C1 out_by_2 vco_vctrl 0.53fF
-C2 out_by_2 div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out 0.28fF
-C3 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# vdd 0.03fF
-C4 div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out vdd 0.04fF
-C5 n_out_by_2 div_by_5_0/DFlipFlop_0/D -1.48fF
-C6 div_by_5_0/DFlipFlop_2/D n_out_by_2 0.19fF
-C7 Up biasp 0.26fF
-C8 div_by_5_0/DFlipFlop_2/latch_diff_0/D n_out_by_2 0.12fF
-C9 Up pswitch 1.98fF
-C10 Up nUp 2.72fF
-C11 out_to_buffer buffer_salida_0/a_678_n100# 0.22fF
-C12 out_div_by_5 div_5_Q1 0.01fF
-C13 out_by_2 div_by_5_0/DFlipFlop_2/latch_diff_0/nD 0.10fF
-C14 div_by_5_0/DFlipFlop_0/latch_diff_0/nD out_by_2 0.17fF
-C15 div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_158_392# n_out_by_2 0.01fF
-C16 out_div_by_5 div_5_Q1_shift 0.05fF
-C17 div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in n_out_by_2 -0.20fF
-C18 vco_vctrl nswitch -0.06fF
-C19 div_by_5_0/DFlipFlop_3/latch_diff_0/nD n_out_by_2 0.11fF
-C20 vco_vctrl div_by_5_0/DFlipFlop_0/D -0.45fF
-C21 div_5_nQ0 n_out_by_2 0.10fF
-C22 vco_vctrl n_out_by_2 0.52fF
-C23 vco_vctrl ring_osc_0/csvco_branch_0/inverter_csvco_0/vss 0.04fF
-C24 div_by_5_0/DFlipFlop_1/latch_diff_0/D n_out_by_2 0.12fF
-C25 ring_osc_0/csvco_branch_2/vbp vco_vctrl 0.26fF
-C26 out_div_by_5 vdd 0.28fF
-C27 div_by_5_0/DFlipFlop_3/latch_diff_1/D out_by_2 0.09fF
-C28 div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_194_125# n_out_by_2 -0.05fF
-C29 div_5_nQ2 out_by_2 0.16fF
-C30 out_to_div vdd 0.21fF
-C31 out_by_2 div_by_5_0/DFlipFlop_1/latch_diff_0/nD 0.10fF
-C32 div_by_2_0/clock_inverter_0/inverter_cp_x1_0/out out_to_div -0.12fF
-C33 nUp vdd 0.05fF
-C34 div_5_Q1 out_by_2 0.42fF
-C35 out_by_2 div_by_5_0/DFlipFlop_0/latch_diff_1/D 0.33fF
-C36 div_by_5_0/DFlipFlop_0/latch_diff_0/D n_out_by_2 0.24fF
-C37 nDown vdd 0.22fF
-C38 ring_osc_0/csvco_branch_2/cap_vco_0/t vdd 0.02fF
-C39 div_by_5_0/DFlipFlop_0/latch_diff_1/nD out_by_2 0.17fF
-C40 out_by_2 div_by_5_0/DFlipFlop_1/latch_diff_1/D 0.23fF
-C41 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_143_136# n_out_by_2 0.02fF
-C42 D0_vco vdd 0.03fF
-C43 out_by_2 div_5_Q0 0.09fF
-C44 biasp nUp -0.17fF
-C45 pswitch nUp 0.85fF
-C46 Down biasp 1.24fF
-C47 div_by_2_0/clock_inverter_0/inverter_cp_x1_2/in out_to_div -0.16fF
-C48 ring_osc_0/csvco_branch_2/cap_vco_0/t out_first_buffer 0.03fF
-C49 div_by_5_0/sky130_fd_sc_hs__or2_1_0/a_63_368# out_div_by_5 0.18fF
-C50 out_by_2 vdd 0.97fF
-C51 lf_vc vdd 0.02fF
-C52 div_by_5_0/DFlipFlop_3/latch_diff_1/D n_out_by_2 0.24fF
-C53 div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in n_out_by_2 0.27fF
-C54 biasp nDown 0.26fF
-C55 div_5_nQ2 n_out_by_2 0.10fF
-C56 pswitch nDown 0.53fF
-C57 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# n_out_by_2 0.12fF
-C58 div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out n_out_by_2 -0.11fF
-C59 nUp nDown -0.09fF
-C60 out_by_2 div_by_5_0/DFlipFlop_3/latch_diff_1/nD 0.23fF
-C61 out_to_buffer vdd 0.07fF
-C62 Down nDown 2.55fF
-C63 div_5_Q1 n_out_by_2 1.04fF
-C64 div_by_5_0/DFlipFlop_0/latch_diff_1/D n_out_by_2 0.17fF
-C65 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_143_136# vco_vctrl -0.11fF
-C66 iref_cp vdd 0.15fF
-C67 div_by_5_0/DFlipFlop_0/latch_diff_1/nD n_out_by_2 0.33fF
-C68 div_by_5_0/DFlipFlop_0/Q out_by_2 0.09fF
-C69 div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_56_136# out_by_2 0.10fF
-C70 QA vdd -0.04fF
-C71 div_by_5_0/DFlipFlop_1/latch_diff_1/D n_out_by_2 0.10fF
-C72 out_to_buffer out_to_div 0.13fF
-C73 div_5_Q0 n_out_by_2 -0.12fF
-C74 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# vco_vctrl -0.36fF
-C75 div_5_Q1 vco_vctrl 0.14fF
-C76 div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in out_by_2 -0.22fF
-C77 n_out_by_2 vdd 1.03fF
-C78 div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in n_out_by_2 -0.51fF
-C79 ring_osc_0/csvco_branch_2/vbp vdd 0.03fF
-C80 Down iref_cp 0.09fF
-C81 div_by_5_0/DFlipFlop_3/latch_diff_1/nD n_out_by_2 0.10fF
-C82 div_by_5_0/DFlipFlop_2/latch_diff_1/D out_by_2 0.23fF
-C83 div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_355_368# n_out_by_2 0.03fF
-C84 vco_vctrl div_5_Q0 0.48fF
-C85 Down nswitch 0.54fF
-C86 div_by_5_0/DFlipFlop_1/D out_by_2 0.38fF
-C87 out_by_2 div_by_5_0/DFlipFlop_2/nQ 0.23fF
-C88 div_by_5_0/DFlipFlop_1/latch_diff_1/nD out_by_2 0.09fF
-C89 vdd pfd_cp_interface_0/inverter_cp_x1_2/in 0.01fF
-C90 div_by_5_0/DFlipFlop_0/Q n_out_by_2 -0.23fF
-C91 vco_vctrl vdd -1.02fF
-C92 out_by_2 div_by_5_0/DFlipFlop_2/latch_diff_1/nD 0.09fF
-C93 out_by_2 div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_0/out 0.09fF
-C94 nswitch nDown 0.76fF
-C95 buffer_salida_0/a_678_n100# vdd 0.24fF
-C96 div_by_5_0/DFlipFlop_3/latch_diff_0/D out_by_2 0.11fF
-C97 div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_143_136# out_by_2 -0.02fF
-C98 out_by_2 div_by_5_0/DFlipFlop_0/D 0.35fF
-C99 div_by_5_0/DFlipFlop_2/D out_by_2 0.22fF
-C100 vco_vctrl nUp 0.02fF
-C101 div_by_5_0/DFlipFlop_2/latch_diff_1/D n_out_by_2 0.10fF
-C102 out_by_2 div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out -0.04fF
-C103 n_out_by_2 div_by_5_0/DFlipFlop_2/nQ 0.10fF
-C104 div_by_5_0/DFlipFlop_1/D n_out_by_2 0.22fF
-C105 div_by_5_0/DFlipFlop_1/latch_diff_1/nD n_out_by_2 0.24fF
-C106 div_by_5_0/DFlipFlop_2/latch_diff_1/nD n_out_by_2 0.24fF
-C107 Up vdd 0.28fF
+C0 n_out_by_2 div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out -0.11fF
+C1 out_to_buffer out_to_div 0.13fF
+C2 n_out_by_2 div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_355_368# 0.03fF
+C3 div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_143_136# out_by_2 -0.02fF
+C4 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# vco_vctrl -0.36fF
+C5 nswitch vco_vctrl -0.06fF
+C6 div_by_5_0/DFlipFlop_3/latch_diff_0/nD n_out_by_2 0.11fF
+C7 Down iref_cp 0.09fF
+C8 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_143_136# vco_vctrl -0.11fF
+C9 D0_vco vdd 0.03fF
+C10 n_out_by_2 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# 0.12fF
+C11 div_5_Q1 vco_vctrl 0.14fF
+C12 nDown biasp 0.26fF
+C13 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_143_136# n_out_by_2 0.02fF
+C14 Down nswitch 0.54fF
+C15 div_by_5_0/DFlipFlop_0/latch_diff_1/D out_by_2 0.33fF
+C16 div_by_5_0/DFlipFlop_0/latch_diff_1/D n_out_by_2 0.17fF
+C17 ring_osc_0/csvco_branch_2/vbp vdd 0.03fF
+C18 div_5_Q1 out_by_2 0.42fF
+C19 n_out_by_2 div_5_Q1 1.04fF
+C20 Up biasp 0.26fF
+C21 div_by_5_0/DFlipFlop_0/D vco_vctrl -0.45fF
+C22 out_div_by_5 div_by_5_0/sky130_fd_sc_hs__or2_1_0/a_63_368# 0.18fF
+C23 n_out_by_2 div_by_5_0/DFlipFlop_1/latch_diff_0/D 0.12fF
+C24 vco_vctrl vdd -1.02fF
+C25 pfd_cp_interface_0/inverter_cp_x1_2/in vdd 0.01fF
+C26 div_by_5_0/DFlipFlop_0/D out_by_2 0.35fF
+C27 n_out_by_2 div_by_5_0/DFlipFlop_0/D -1.48fF
+C28 div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in out_by_2 -0.22fF
+C29 div_by_5_0/DFlipFlop_2/latch_diff_0/nD out_by_2 0.10fF
+C30 ring_osc_0/csvco_branch_2/vbp vco_vctrl 0.26fF
+C31 vco_vctrl ring_osc_0/csvco_branch_0/inverter_csvco_0/vss 0.04fF
+C32 out_by_2 div_by_5_0/DFlipFlop_2/nQ 0.23fF
+C33 n_out_by_2 div_by_5_0/DFlipFlop_2/nQ 0.10fF
+C34 out_by_2 vdd 0.97fF
+C35 vdd lf_vc 0.02fF
+C36 div_by_5_0/DFlipFlop_0/latch_diff_1/nD out_by_2 0.17fF
+C37 n_out_by_2 vdd 1.03fF
+C38 div_by_5_0/DFlipFlop_1/latch_diff_1/D out_by_2 0.23fF
+C39 div_by_5_0/DFlipFlop_0/latch_diff_1/nD n_out_by_2 0.33fF
+C40 div_by_5_0/DFlipFlop_1/latch_diff_1/D n_out_by_2 0.10fF
+C41 nUp vdd 0.05fF
+C42 out_to_buffer vdd 0.07fF
+C43 div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out out_by_2 0.28fF
+C44 nDown nswitch 0.76fF
+C45 div_by_5_0/DFlipFlop_3/latch_diff_0/D out_by_2 0.11fF
+C46 nUp pswitch 0.85fF
+C47 vco_vctrl out_by_2 0.53fF
+C48 div_5_nQ2 out_by_2 0.16fF
+C49 n_out_by_2 vco_vctrl 0.52fF
+C50 div_5_nQ2 n_out_by_2 0.10fF
+C51 div_by_2_0/clock_inverter_0/inverter_cp_x1_0/out out_to_div -0.12fF
+C52 div_by_5_0/DFlipFlop_1/latch_diff_1/nD out_by_2 0.09fF
+C53 out_div_by_5 div_5_Q1 0.01fF
+C54 div_by_5_0/DFlipFlop_1/latch_diff_1/nD n_out_by_2 0.24fF
+C55 out_to_div div_by_2_0/clock_inverter_0/inverter_cp_x1_2/in -0.16fF
+C56 nUp vco_vctrl 0.02fF
+C57 div_by_5_0/DFlipFlop_0/latch_diff_0/nD out_by_2 0.17fF
+C58 out_div_by_5 div_5_Q1_shift 0.05fF
+C59 div_by_5_0/DFlipFlop_3/latch_diff_1/D out_by_2 0.09fF
+C60 vco_vctrl div_5_Q0 0.48fF
+C61 div_by_5_0/DFlipFlop_3/latch_diff_1/D n_out_by_2 0.24fF
+C62 div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_56_136# out_by_2 0.10fF
+C63 div_by_5_0/DFlipFlop_2/latch_diff_0/D n_out_by_2 0.12fF
+C64 ring_osc_0/csvco_branch_2/cap_vco_0/t vdd 0.02fF
+C65 div_5_Q0 out_by_2 0.09fF
+C66 n_out_by_2 div_5_Q0 -0.12fF
+C67 out_div_by_5 vdd 0.28fF
+C68 nDown vdd 0.22fF
+C69 div_by_5_0/DFlipFlop_0/latch_diff_0/D n_out_by_2 0.24fF
+C70 Up vdd 0.28fF
+C71 div_by_5_0/DFlipFlop_3/latch_diff_1/nD out_by_2 0.23fF
+C72 div_by_5_0/DFlipFlop_3/latch_diff_1/nD n_out_by_2 0.10fF
+C73 nDown pswitch 0.53fF
+C74 out_by_2 div_by_5_0/DFlipFlop_2/D 0.22fF
+C75 n_out_by_2 div_by_5_0/DFlipFlop_2/D 0.19fF
+C76 div_by_5_0/DFlipFlop_0/Q out_by_2 0.09fF
+C77 div_by_5_0/DFlipFlop_0/Q n_out_by_2 -0.23fF
+C78 vdd buffer_salida_0/a_678_n100# 0.24fF
+C79 div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_194_125# n_out_by_2 -0.05fF
+C80 Up pswitch 1.98fF
+C81 div_by_5_0/DFlipFlop_2/latch_diff_1/nD out_by_2 0.09fF
+C82 div_by_5_0/DFlipFlop_2/latch_diff_1/nD n_out_by_2 0.24fF
+C83 out_by_2 div_5_nQ0 0.32fF
+C84 nUp nDown -0.09fF
+C85 n_out_by_2 div_5_nQ0 0.10fF
+C86 n_out_by_2 div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_158_392# 0.01fF
+C87 nDown Down 2.55fF
+C88 div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in n_out_by_2 0.27fF
+C89 nUp Up 2.72fF
+C90 out_to_div vdd 0.21fF
+C91 div_by_5_0/DFlipFlop_1/D out_by_2 0.38fF
+C92 div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out vdd 0.04fF
+C93 div_by_5_0/DFlipFlop_1/D n_out_by_2 0.22fF
+C94 div_by_5_0/DFlipFlop_2/latch_diff_1/D out_by_2 0.23fF
+C95 div_by_5_0/DFlipFlop_2/latch_diff_1/D n_out_by_2 0.10fF
+C96 vdd iref_cp 0.15fF
+C97 div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in n_out_by_2 -0.20fF
+C98 div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in n_out_by_2 -0.51fF
+C99 QA vdd -0.04fF
+C100 out_to_buffer buffer_salida_0/a_678_n100# 0.22fF
+C101 nUp biasp -0.17fF
+C102 out_first_buffer ring_osc_0/csvco_branch_2/cap_vco_0/t 0.03fF
+C103 Down biasp 1.24fF
+C104 div_by_5_0/DFlipFlop_1/latch_diff_0/nD out_by_2 0.10fF
+C105 div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# vdd 0.03fF
+C106 div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_0/out out_by_2 0.09fF
+C107 div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out out_by_2 -0.04fF
C108 PFD_0/and_pfd_0/a_656_410# vss 0.96fF
C109 PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_63_n45# vss 0.05fF
C110 PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_n129_n45# vss 0.07fF
@@ -3471,960 +3489,1157 @@
+ wbs_dat_o[26] wbs_dat_o[27] wbs_dat_o[28] wbs_dat_o[29] wbs_dat_o[2] wbs_dat_o[30]
+ wbs_dat_o[31] wbs_dat_o[3] wbs_dat_o[4] wbs_dat_o[5] wbs_dat_o[6] wbs_dat_o[7] wbs_dat_o[8]
+ wbs_dat_o[9] wbs_sel_i[0] wbs_sel_i[1] wbs_sel_i[2] wbs_sel_i[3] wbs_stb_i wbs_we_i
-Xtop_pll_v1_0 top_pll_v1_0/vco_vctrl top_pll_v1_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd
-+ vdda1 top_pll_v1_0/charge_pump_0/w_2544_775# top_pll_v1_0/pswitch top_pll_v1_0/biasp
-+ top_pll_v1_0/ring_osc_0/csvco_branch_2/vbp io_analog[10] top_pll_v1_0/Down vssa1
-+ vssa1 gpio_noesd[7] top_pll_v1_0/QA top_pll_v1_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd
-+ bias_0/iref_2 top_pll_v1_0/out_to_div top_pll_v1_0/nDown io_analog[9] top_pll_v1_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd
-+ top_pll_v1_0/Up top_pll_v1_0/nUp top_pll_v1
-Xbias_0 vssa1 vdda1 bias_0/iref_1 bias_0/iref_2 io_analog[5] bias
+Xtop_pll_v1_0 top_pll_v1_0/vco_vctrl vdda1 top_pll_v1_0/pswitch top_pll_v1_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd
++ top_pll_v1_0/charge_pump_0/w_2544_775# top_pll_v1_0/ring_osc_0/csvco_branch_2/vbp
++ top_pll_v1_0/biasp io_analog[10] top_pll_v1_0/Down vssa1 vssa1 gpio_noesd[7] top_pll_v1_0/buffer_salida_0/a_3996_n100#
++ top_pll_v1_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd top_pll_v1_0/QA top_pll_v1_0/charge_pump_0/w_1008_774#
++ bias_0/iref_2 top_pll_v1_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd top_pll_v1_0/out_to_div
++ top_pll_v1_0/nDown io_analog[9] top_pll_v1_0/Up top_pll_v1_0/nUp top_pll_v1
+Xtop_pll_v1_1 top_pll_v1_1/vco_vctrl vdda1 top_pll_v1_1/pswitch top_pll_v1_1/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd
++ top_pll_v1_1/charge_pump_0/w_2544_775# top_pll_v1_1/ring_osc_0/csvco_branch_2/vbp
++ top_pll_v1_1/biasp io_analog[10] top_pll_v1_1/Down vssa1 vssa1 gpio_noesd[7] top_pll_v1_1/buffer_salida_0/a_3996_n100#
++ top_pll_v1_1/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd top_pll_v1_1/QA top_pll_v1_1/charge_pump_0/w_1008_774#
++ bias_0/iref_0 top_pll_v1_1/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd top_pll_v1_1/out_to_div
++ top_pll_v1_1/nDown io_analog[7] top_pll_v1_1/Up top_pll_v1_1/nUp top_pll_v1
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[0] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[1] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[2] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[3] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[4] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[5] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[6] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[7] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_0[8] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xbias_0 vssa1 vdda1 bias_0/iref_0 bias_0/iref_1 bias_0/iref_2 io_analog[5] bias
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[0] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[1] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[2] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[3] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[4] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[5] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[6] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[7] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_1[8] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xmimcap_decoup_1x5_0[0] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_0[1] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_0[2] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_1[0] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_1[1] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_1[2] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[0] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[1] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[2] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[3] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[4] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[5] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[6] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[7] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xsky130_fd_pr__cap_mim_m3_2_2Y8F6P_2[8] vssa1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2_2Y8F6P
+Xmimcap_decoup_1x5_2[0] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_2[1] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_2[2] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_3[0] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_3[1] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_3[2] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_4[0] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_4[1] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_4[2] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_5[0] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_5[1] vssa1 vdda1 vssa1 mimcap_decoup_1x5
+Xmimcap_decoup_1x5_5[2] vssa1 vdda1 vssa1 mimcap_decoup_1x5
Xtop_pll_v2_0 top_pll_v2_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd top_pll_v2_0/pswitch
+ vdda1 top_pll_v2_0/charge_pump_0/w_2544_775# top_pll_v2_0/ring_osc_0/csvco_branch_2/vbp
+ top_pll_v2_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd io_analog[10] top_pll_v2_0/vco_vctrl
+ top_pll_v2_0/Down vssa1 vssa1 gpio_noesd[7] bias_0/iref_1 top_pll_v2_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd
+ top_pll_v2_0/out_to_div gpio_noesd[8] top_pll_v2_0/nDown top_pll_v2_0/biasp io_analog[8]
+ top_pll_v2_0/Up top_pll_v2_0/nUp top_pll_v2
-C0 top_pll_v1_0/QA io_analog[10] 0.03fF
-C1 gpio_noesd[7] top_pll_v2_0/vco_vctrl 0.05fF
-C2 top_pll_v2_0/Up bias_0/iref_1 0.54fF
-C3 top_pll_v2_0/biasp bias_0/iref_1 2.20fF
-C4 top_pll_v1_0/ring_osc_0/csvco_branch_2/vbp vdda1 1.01fF
-C5 io_analog[9] bias_0/iref_2 14.44fF
-C6 io_clamp_low[0] io_analog[4] 0.53fF
-C7 top_pll_v2_0/charge_pump_0/w_2544_775# bias_0/iref_1 0.09fF
-C8 top_pll_v1_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd vdda1 0.04fF
-C9 top_pll_v2_0/biasp vdda1 0.03fF
-C10 io_analog[8] vdda1 29.93fF
-C11 vdda1 top_pll_v1_0/biasp 0.03fF
-C12 vdda1 bias_0/iref_2 3.90fF
-C13 top_pll_v1_0/charge_pump_0/w_2544_775# bias_0/iref_2 0.02fF
-C14 gpio_noesd[7] top_pll_v1_0/vco_vctrl 0.05fF
-C15 top_pll_v1_0/nUp vdda1 0.01fF
-C16 top_pll_v2_0/nUp bias_0/iref_1 0.22fF
-C17 gpio_noesd[7] io_analog[10] 14.37fF
-C18 io_analog[10] gpio_noesd[8] 3.51fF
-C19 top_pll_v2_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd vdda1 0.17fF
-C20 io_clamp_low[2] io_clamp_high[2] 0.53fF
-C21 top_pll_v1_0/nDown bias_0/iref_2 0.70fF
-C22 gpio_noesd[7] top_pll_v2_0/out_to_div 0.23fF
-C23 io_analog[8] bias_0/iref_2 14.44fF
-C24 top_pll_v2_0/nDown bias_0/iref_1 0.54fF
-C25 top_pll_v1_0/biasp bias_0/iref_2 3.20fF
-C26 io_clamp_high[2] io_analog[6] 0.53fF
-C27 top_pll_v1_0/nUp bias_0/iref_2 0.70fF
-C28 gpio_noesd[7] top_pll_v1_0/out_to_div 0.23fF
-C29 top_pll_v2_0/pswitch vdda1 0.34fF
-C30 top_pll_v2_0/nUp vdda1 0.01fF
-C31 top_pll_v2_0/Down bias_0/iref_1 0.91fF
-C32 top_pll_v2_0/vco_vctrl vdda1 0.59fF
-C33 vdda1 top_pll_v1_0/pswitch 0.38fF
-C34 gpio_noesd[7] vdda1 49.34fF
-C35 gpio_noesd[8] vdda1 57.83fF
-C36 io_clamp_low[0] io_clamp_high[0] 0.53fF
-C37 m3_222594_702300# io_analog[5] 0.53fF
-C38 io_clamp_high[0] io_analog[4] 0.53fF
-C39 top_pll_v2_0/ring_osc_0/csvco_branch_2/vbp vdda1 2.10fF
-C40 top_pll_v2_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd vdda1 0.17fF
-C41 top_pll_v1_0/Up bias_0/iref_2 0.70fF
-C42 top_pll_v1_0/Down bias_0/iref_2 1.11fF
-C43 vdda1 top_pll_v1_0/buffer_salida_0/a_3996_n100# 0.06fF
-C44 top_pll_v2_0/buffer_salida_0/a_3996_n100# vdda1 0.05fF
-C45 vdda1 top_pll_v1_0/vco_vctrl 0.43fF
-C46 top_pll_v2_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd vdda1 0.17fF
-C47 io_analog[10] vdda1 0.01fF
-C48 vdda1 bias_0/iref_1 15.26fF
-C49 top_pll_v1_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd vdda1 0.04fF
-C50 top_pll_v1_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd vdda1 0.04fF
-C51 m3_226242_702300# io_analog[5] 0.53fF
-C52 io_clamp_low[2] io_analog[6] 0.53fF
-C53 io_analog[9] vdda1 30.05fF
-C54 io_in_3v3[0] vssa1 0.41fF
-C55 io_oeb[26] vssa1 0.61fF
-C56 io_in[0] vssa1 0.41fF
-C57 io_out[26] vssa1 0.61fF
-C58 io_out[0] vssa1 0.41fF
-C59 io_in[26] vssa1 0.61fF
-C60 io_oeb[0] vssa1 0.41fF
-C61 io_in_3v3[26] vssa1 0.61fF
-C62 io_in_3v3[1] vssa1 0.41fF
-C63 io_oeb[25] vssa1 0.61fF
-C64 io_in[1] vssa1 0.41fF
-C65 io_out[25] vssa1 0.61fF
-C66 io_out[1] vssa1 0.41fF
-C67 io_in[25] vssa1 0.61fF
-C68 io_oeb[1] vssa1 0.41fF
-C69 io_in_3v3[25] vssa1 0.61fF
-C70 io_in_3v3[2] vssa1 0.41fF
-C71 io_oeb[24] vssa1 0.61fF
-C72 io_in[2] vssa1 0.41fF
-C73 io_out[24] vssa1 0.61fF
-C74 io_out[2] vssa1 0.41fF
-C75 io_in[24] vssa1 0.61fF
-C76 io_oeb[2] vssa1 -0.20fF
-C77 io_in_3v3[3] vssa1 0.41fF
-C78 gpio_noesd[17] vssa1 0.61fF
-C79 io_in[3] vssa1 0.41fF
-C80 gpio_analog[17] vssa1 0.61fF
-C81 io_out[3] vssa1 0.41fF
-C82 io_oeb[3] vssa1 0.41fF
-C83 io_in_3v3[4] vssa1 0.41fF
-C84 io_in[4] vssa1 0.41fF
-C85 io_out[4] vssa1 0.41fF
-C86 io_oeb[4] vssa1 0.41fF
-C87 io_oeb[23] vssa1 0.61fF
-C88 io_out[23] vssa1 0.61fF
-C89 io_in[23] vssa1 0.61fF
-C90 io_in_3v3[23] vssa1 0.61fF
-C91 gpio_noesd[16] vssa1 0.61fF
-C92 io_in_3v3[5] vssa1 0.41fF
-C93 io_in[5] vssa1 -0.20fF
-C94 io_out[5] vssa1 0.41fF
-C95 io_oeb[5] vssa1 0.41fF
-C96 io_oeb[22] vssa1 0.61fF
-C97 io_out[22] vssa1 0.61fF
-C98 io_in[22] vssa1 0.61fF
-C99 io_in_3v3[22] vssa1 0.61fF
-C100 gpio_analog[15] vssa1 0.61fF
-C101 io_in_3v3[6] vssa1 -0.20fF
-C102 io_in[6] vssa1 0.41fF
-C103 io_out[6] vssa1 0.41fF
-C104 io_oeb[6] vssa1 0.41fF
-C105 io_oeb[21] vssa1 0.61fF
-C106 io_out[21] vssa1 0.61fF
-C107 io_in[21] vssa1 0.61fF
-C108 io_in_3v3[21] vssa1 0.61fF
-C109 gpio_noesd[14] vssa1 0.61fF
-C110 gpio_analog[14] vssa1 0.61fF
-C111 vssd2 vssa1 -5.19fF
-C112 vssd1 vssa1 1.13fF
-C113 vdda2 vssa1 -5.19fF
-C114 io_oeb[20] vssa1 0.61fF
-C115 io_out[20] vssa1 0.61fF
-C116 io_in[20] vssa1 0.61fF
-C117 io_in_3v3[20] vssa1 0.61fF
-C118 gpio_noesd[13] vssa1 0.61fF
-C119 gpio_analog[13] vssa1 0.61fF
-C120 gpio_analog[0] vssa1 0.41fF
-C121 gpio_noesd[0] vssa1 0.41fF
-C122 io_in_3v3[7] vssa1 0.41fF
-C123 io_in[7] vssa1 0.41fF
-C124 io_out[7] vssa1 0.41fF
-C125 io_oeb[7] vssa1 0.41fF
-C126 io_oeb[19] vssa1 0.61fF
-C127 io_out[19] vssa1 0.61fF
-C128 io_in[19] vssa1 0.61fF
-C129 io_in_3v3[19] vssa1 0.61fF
-C130 gpio_noesd[12] vssa1 0.61fF
-C131 gpio_analog[12] vssa1 0.61fF
-C132 gpio_analog[1] vssa1 0.41fF
-C133 gpio_noesd[1] vssa1 0.41fF
-C134 io_in_3v3[8] vssa1 0.41fF
-C135 io_in[8] vssa1 0.41fF
-C136 io_out[8] vssa1 -0.20fF
-C137 io_oeb[8] vssa1 0.41fF
-C138 io_oeb[18] vssa1 0.61fF
-C139 io_out[18] vssa1 0.61fF
-C140 io_in_3v3[18] vssa1 0.61fF
-C141 gpio_noesd[11] vssa1 0.61fF
-C142 gpio_analog[11] vssa1 0.61fF
-C143 gpio_analog[2] vssa1 0.41fF
-C144 gpio_noesd[2] vssa1 0.41fF
-C145 io_in_3v3[9] vssa1 0.41fF
-C146 io_in[9] vssa1 0.41fF
-C147 io_out[9] vssa1 0.41fF
-C148 io_oeb[9] vssa1 0.41fF
-C149 io_oeb[17] vssa1 0.61fF
-C150 io_in[17] vssa1 0.61fF
-C151 io_in_3v3[17] vssa1 0.61fF
-C152 gpio_noesd[10] vssa1 0.61fF
-C153 gpio_analog[10] vssa1 0.61fF
-C154 gpio_analog[3] vssa1 0.41fF
-C155 gpio_noesd[3] vssa1 0.41fF
-C156 io_in_3v3[10] vssa1 0.41fF
-C157 io_in[10] vssa1 0.41fF
-C158 io_out[10] vssa1 0.41fF
-C159 io_oeb[10] vssa1 0.41fF
-C160 io_out[16] vssa1 0.61fF
-C161 io_in[16] vssa1 0.61fF
-C162 io_in_3v3[16] vssa1 0.61fF
-C163 gpio_noesd[9] vssa1 0.61fF
-C164 gpio_analog[9] vssa1 0.61fF
-C165 gpio_analog[4] vssa1 0.41fF
-C166 gpio_noesd[4] vssa1 0.41fF
-C167 io_in_3v3[11] vssa1 0.41fF
-C168 io_in[11] vssa1 0.41fF
-C169 io_out[11] vssa1 0.41fF
-C170 io_oeb[11] vssa1 0.41fF
-C171 io_oeb[15] vssa1 0.61fF
-C172 io_out[15] vssa1 0.61fF
-C173 io_in[15] vssa1 0.61fF
-C174 io_in_3v3[15] vssa1 0.61fF
-C175 gpio_analog[5] vssa1 0.41fF
-C176 gpio_noesd[5] vssa1 0.41fF
-C177 io_in_3v3[12] vssa1 0.41fF
-C178 io_in[12] vssa1 0.41fF
-C179 io_out[12] vssa1 0.41fF
-C180 io_oeb[12] vssa1 0.41fF
-C181 gpio_analog[6] vssa1 0.60fF
-C182 gpio_noesd[6] vssa1 0.60fF
-C183 io_in_3v3[13] vssa1 0.60fF
-C184 io_in[13] vssa1 0.60fF
-C185 io_out[13] vssa1 0.60fF
-C186 io_oeb[13] vssa1 0.60fF
-C187 vccd1 vssa1 0.85fF
-C188 gpio_analog[8] vssa1 0.61fF
-C189 io_oeb[14] vssa1 0.61fF
-C190 io_out[14] vssa1 0.61fF
-C191 io_in[14] vssa1 0.61fF
-C192 io_in_3v3[14] vssa1 0.61fF
-C193 vssa2 vssa1 1.66fF
-C194 io_analog[0] vssa1 -6.01fF
-C195 io_analog[1] vssa1 0.76fF
-C196 vccd2 vssa1 0.91fF
-C197 io_analog[2] vssa1 -5.85fF
-C198 io_analog[3] vssa1 -5.74fF
-C199 io_analog[4] vssa1 -5.03fF
-C200 io_clamp_high[0] vssa1 -2.60fF
-C201 io_clamp_low[0] vssa1 0.82fF
-C202 io_analog[6] vssa1 -4.92fF
-C203 io_clamp_high[2] vssa1 0.66fF
-C204 io_clamp_low[2] vssa1 0.50fF
-C205 io_analog[7] vssa1 0.66fF
-C206 user_irq[2] vssa1 0.63fF
-C207 user_irq[1] vssa1 0.63fF
-C208 user_irq[0] vssa1 0.63fF
-C209 user_clock2 vssa1 0.63fF
-C210 la_oenb[127] vssa1 0.63fF
-C211 la_data_in[127] vssa1 0.63fF
-C212 la_oenb[126] vssa1 0.63fF
-C213 la_data_out[126] vssa1 0.63fF
-C214 la_data_in[126] vssa1 0.63fF
-C215 la_oenb[125] vssa1 0.63fF
-C216 la_data_out[125] vssa1 0.63fF
-C217 la_data_in[125] vssa1 0.63fF
-C218 la_oenb[124] vssa1 0.63fF
-C219 la_data_out[124] vssa1 0.63fF
-C220 la_data_in[124] vssa1 0.63fF
-C221 la_oenb[123] vssa1 0.63fF
-C222 la_data_out[123] vssa1 0.63fF
-C223 la_oenb[122] vssa1 0.63fF
-C224 la_data_out[122] vssa1 0.63fF
-C225 la_data_in[122] vssa1 0.63fF
-C226 la_oenb[121] vssa1 0.63fF
-C227 la_data_out[121] vssa1 0.63fF
-C228 la_data_in[121] vssa1 0.63fF
-C229 la_oenb[120] vssa1 0.63fF
-C230 la_data_out[120] vssa1 0.63fF
-C231 la_data_in[120] vssa1 0.63fF
-C232 la_oenb[119] vssa1 0.63fF
-C233 la_data_out[119] vssa1 0.63fF
-C234 la_data_in[119] vssa1 0.63fF
-C235 la_oenb[118] vssa1 0.63fF
-C236 la_data_out[118] vssa1 0.63fF
-C237 la_data_in[118] vssa1 0.63fF
-C238 la_oenb[117] vssa1 0.63fF
-C239 la_data_out[117] vssa1 0.63fF
-C240 la_data_in[117] vssa1 0.63fF
-C241 la_data_out[116] vssa1 0.63fF
-C242 la_data_in[116] vssa1 0.63fF
-C243 la_oenb[115] vssa1 0.63fF
-C244 la_data_out[115] vssa1 0.63fF
-C245 la_data_in[115] vssa1 0.63fF
-C246 la_oenb[114] vssa1 0.63fF
-C247 la_data_out[114] vssa1 0.63fF
-C248 la_data_in[114] vssa1 0.63fF
-C249 la_oenb[113] vssa1 0.63fF
-C250 la_data_out[113] vssa1 0.63fF
-C251 la_data_in[113] vssa1 0.63fF
-C252 la_oenb[112] vssa1 0.63fF
-C253 la_data_in[112] vssa1 0.63fF
-C254 la_oenb[111] vssa1 0.63fF
-C255 la_data_out[111] vssa1 0.63fF
-C256 la_data_in[111] vssa1 0.63fF
-C257 la_oenb[110] vssa1 0.63fF
-C258 la_data_out[110] vssa1 0.63fF
-C259 la_data_in[110] vssa1 0.63fF
-C260 la_oenb[109] vssa1 0.63fF
-C261 la_data_out[109] vssa1 0.63fF
-C262 la_data_in[109] vssa1 0.63fF
-C263 la_oenb[108] vssa1 0.63fF
-C264 la_data_out[108] vssa1 0.63fF
-C265 la_oenb[107] vssa1 0.63fF
-C266 la_data_out[107] vssa1 0.63fF
-C267 la_data_in[107] vssa1 0.63fF
-C268 la_oenb[106] vssa1 0.63fF
-C269 la_data_out[106] vssa1 0.63fF
-C270 la_oenb[105] vssa1 0.63fF
-C271 la_data_out[105] vssa1 0.63fF
-C272 la_data_in[105] vssa1 0.63fF
-C273 la_oenb[104] vssa1 0.63fF
-C274 la_data_out[104] vssa1 0.63fF
-C275 la_data_in[104] vssa1 0.63fF
-C276 la_oenb[103] vssa1 0.63fF
-C277 la_data_out[103] vssa1 0.63fF
-C278 la_data_in[103] vssa1 0.63fF
-C279 la_oenb[102] vssa1 0.63fF
-C280 la_data_out[102] vssa1 0.63fF
-C281 la_data_in[102] vssa1 0.63fF
-C282 la_data_out[101] vssa1 0.63fF
-C283 la_data_in[101] vssa1 0.63fF
-C284 la_oenb[100] vssa1 0.63fF
-C285 la_data_out[100] vssa1 0.63fF
-C286 la_data_in[100] vssa1 0.63fF
-C287 la_oenb[99] vssa1 0.63fF
-C288 la_data_out[99] vssa1 0.63fF
-C289 la_data_in[99] vssa1 0.63fF
-C290 la_oenb[98] vssa1 0.63fF
-C291 la_data_out[98] vssa1 0.63fF
-C292 la_data_in[98] vssa1 0.63fF
-C293 la_oenb[97] vssa1 0.63fF
-C294 la_data_in[97] vssa1 0.63fF
-C295 la_oenb[96] vssa1 0.63fF
-C296 la_data_out[96] vssa1 0.63fF
-C297 la_data_in[96] vssa1 0.63fF
-C298 la_oenb[95] vssa1 0.63fF
-C299 la_data_out[95] vssa1 0.63fF
-C300 la_data_in[95] vssa1 0.63fF
-C301 la_oenb[94] vssa1 0.63fF
-C302 la_data_out[94] vssa1 0.63fF
-C303 la_data_in[94] vssa1 0.63fF
-C304 la_oenb[93] vssa1 0.63fF
-C305 la_data_out[93] vssa1 0.63fF
-C306 la_oenb[92] vssa1 0.63fF
-C307 la_data_out[92] vssa1 0.63fF
-C308 la_data_in[92] vssa1 0.63fF
-C309 la_oenb[91] vssa1 0.63fF
-C310 la_data_out[91] vssa1 0.63fF
-C311 la_oenb[90] vssa1 0.63fF
-C312 la_data_out[90] vssa1 0.63fF
-C313 la_data_in[90] vssa1 0.63fF
-C314 la_oenb[89] vssa1 0.63fF
-C315 la_data_out[89] vssa1 0.63fF
-C316 la_data_in[89] vssa1 0.63fF
-C317 la_oenb[88] vssa1 0.63fF
-C318 la_data_out[88] vssa1 0.63fF
-C319 la_data_in[88] vssa1 0.63fF
-C320 la_oenb[87] vssa1 0.63fF
-C321 la_data_out[87] vssa1 0.63fF
-C322 la_data_in[87] vssa1 0.63fF
-C323 la_data_out[86] vssa1 0.63fF
-C324 la_data_in[86] vssa1 0.63fF
-C325 la_oenb[85] vssa1 0.63fF
-C326 la_data_out[85] vssa1 0.63fF
-C327 la_data_in[85] vssa1 0.63fF
-C328 la_oenb[84] vssa1 0.63fF
-C329 la_data_out[84] vssa1 0.63fF
-C330 la_data_in[84] vssa1 0.63fF
-C331 la_oenb[83] vssa1 0.63fF
-C332 la_data_out[83] vssa1 0.63fF
-C333 la_data_in[83] vssa1 0.63fF
-C334 la_oenb[82] vssa1 0.63fF
-C335 la_data_in[82] vssa1 0.63fF
-C336 la_oenb[81] vssa1 0.63fF
-C337 la_data_out[81] vssa1 0.63fF
-C338 la_data_in[81] vssa1 0.63fF
-C339 la_oenb[80] vssa1 0.63fF
-C340 la_data_out[80] vssa1 0.63fF
-C341 la_data_in[80] vssa1 0.63fF
-C342 la_oenb[79] vssa1 0.63fF
-C343 la_data_out[79] vssa1 0.63fF
-C344 la_data_in[79] vssa1 0.63fF
-C345 la_oenb[78] vssa1 0.63fF
-C346 la_data_out[78] vssa1 0.63fF
-C347 la_data_in[78] vssa1 0.63fF
-C348 la_oenb[77] vssa1 0.63fF
-C349 la_data_out[77] vssa1 0.63fF
-C350 la_data_in[77] vssa1 0.63fF
-C351 la_oenb[76] vssa1 0.63fF
-C352 la_data_out[76] vssa1 0.63fF
-C353 la_oenb[75] vssa1 0.63fF
-C354 la_data_out[75] vssa1 0.63fF
-C355 la_data_in[75] vssa1 0.63fF
-C356 la_oenb[74] vssa1 0.63fF
-C357 la_data_out[74] vssa1 0.63fF
-C358 la_data_in[74] vssa1 0.63fF
-C359 la_oenb[73] vssa1 0.63fF
-C360 la_data_out[73] vssa1 0.63fF
-C361 la_data_in[73] vssa1 0.63fF
-C362 la_oenb[72] vssa1 0.63fF
-C363 la_data_out[72] vssa1 0.63fF
-C364 la_data_in[72] vssa1 0.63fF
-C365 la_data_out[71] vssa1 0.63fF
-C366 la_data_in[71] vssa1 0.63fF
-C367 la_oenb[70] vssa1 0.63fF
-C368 la_data_out[70] vssa1 0.63fF
-C369 la_data_in[70] vssa1 0.63fF
-C370 la_oenb[69] vssa1 0.63fF
-C371 la_data_out[69] vssa1 0.63fF
-C372 la_data_in[69] vssa1 0.63fF
-C373 la_oenb[68] vssa1 0.63fF
-C374 la_data_out[68] vssa1 0.63fF
-C375 la_data_in[68] vssa1 0.63fF
-C376 la_oenb[67] vssa1 0.63fF
-C377 la_data_in[67] vssa1 0.63fF
-C378 la_oenb[66] vssa1 0.63fF
-C379 la_data_out[66] vssa1 0.63fF
-C380 la_data_in[66] vssa1 0.63fF
-C381 la_oenb[65] vssa1 0.63fF
-C382 la_data_out[65] vssa1 0.26fF
-C383 la_data_in[65] vssa1 0.63fF
-C384 la_oenb[64] vssa1 0.63fF
-C385 la_data_out[64] vssa1 0.63fF
-C386 la_data_in[64] vssa1 0.63fF
-C387 la_oenb[63] vssa1 0.63fF
-C388 la_data_out[63] vssa1 0.63fF
-C389 la_data_in[63] vssa1 0.63fF
-C390 la_oenb[62] vssa1 0.63fF
-C391 la_data_out[62] vssa1 0.63fF
-C392 la_data_in[62] vssa1 0.63fF
-C393 la_oenb[61] vssa1 0.63fF
-C394 la_data_out[61] vssa1 0.63fF
-C395 la_oenb[60] vssa1 0.63fF
-C396 la_data_out[60] vssa1 0.63fF
-C397 la_data_in[60] vssa1 0.63fF
-C398 la_oenb[59] vssa1 0.63fF
-C399 la_data_out[59] vssa1 0.63fF
-C400 la_data_in[59] vssa1 0.63fF
-C401 la_oenb[58] vssa1 0.63fF
-C402 la_data_out[58] vssa1 0.63fF
-C403 la_data_in[58] vssa1 0.63fF
-C404 la_oenb[57] vssa1 0.63fF
-C405 la_data_out[57] vssa1 0.63fF
-C406 la_data_in[57] vssa1 0.63fF
-C407 la_data_out[56] vssa1 0.63fF
-C408 la_data_in[56] vssa1 0.63fF
-C409 la_oenb[55] vssa1 0.63fF
-C410 la_data_out[55] vssa1 0.63fF
-C411 la_data_in[55] vssa1 0.63fF
-C412 la_oenb[54] vssa1 0.63fF
-C413 la_data_out[54] vssa1 0.63fF
-C414 la_data_in[54] vssa1 0.63fF
-C415 la_oenb[53] vssa1 0.63fF
-C416 la_data_out[53] vssa1 0.63fF
-C417 la_data_in[53] vssa1 0.63fF
-C418 la_oenb[52] vssa1 0.63fF
-C419 la_data_in[52] vssa1 0.63fF
-C420 la_oenb[51] vssa1 0.63fF
-C421 la_data_out[51] vssa1 0.63fF
-C422 la_data_in[51] vssa1 0.63fF
-C423 la_oenb[50] vssa1 0.63fF
-C424 la_data_in[50] vssa1 0.63fF
-C425 la_oenb[49] vssa1 0.63fF
-C426 la_data_out[49] vssa1 0.63fF
-C427 la_data_in[49] vssa1 0.63fF
-C428 la_oenb[48] vssa1 0.63fF
-C429 la_data_out[48] vssa1 0.63fF
-C430 la_data_in[48] vssa1 0.63fF
-C431 la_oenb[47] vssa1 0.63fF
-C432 la_data_out[47] vssa1 0.63fF
-C433 la_data_in[47] vssa1 0.63fF
-C434 la_oenb[46] vssa1 0.63fF
-C435 la_data_out[46] vssa1 0.63fF
-C436 la_oenb[45] vssa1 0.63fF
-C437 la_data_out[45] vssa1 0.63fF
-C438 la_data_in[45] vssa1 0.63fF
-C439 la_oenb[44] vssa1 0.63fF
-C440 la_data_out[44] vssa1 0.63fF
-C441 la_data_in[44] vssa1 0.63fF
-C442 la_oenb[43] vssa1 0.63fF
-C443 la_data_out[43] vssa1 0.63fF
-C444 la_data_in[43] vssa1 0.63fF
-C445 la_oenb[42] vssa1 0.63fF
-C446 la_data_out[42] vssa1 0.63fF
-C447 la_data_in[42] vssa1 0.63fF
-C448 la_data_out[41] vssa1 0.63fF
-C449 la_data_in[41] vssa1 0.63fF
-C450 la_oenb[40] vssa1 0.63fF
-C451 la_data_out[40] vssa1 0.63fF
-C452 la_data_in[40] vssa1 0.63fF
-C453 la_oenb[39] vssa1 0.63fF
-C454 la_data_out[39] vssa1 0.63fF
-C455 la_data_in[39] vssa1 0.63fF
-C456 la_oenb[38] vssa1 0.63fF
-C457 la_data_out[38] vssa1 0.63fF
-C458 la_data_in[38] vssa1 0.63fF
-C459 la_oenb[37] vssa1 0.63fF
-C460 la_data_out[37] vssa1 0.26fF
-C461 la_data_in[37] vssa1 0.63fF
-C462 la_oenb[36] vssa1 0.63fF
-C463 la_data_out[36] vssa1 0.63fF
-C464 la_data_in[36] vssa1 0.63fF
-C465 la_oenb[35] vssa1 0.63fF
-C466 la_data_in[35] vssa1 0.63fF
-C467 la_oenb[34] vssa1 0.63fF
-C468 la_data_out[34] vssa1 0.63fF
-C469 la_data_in[34] vssa1 0.63fF
-C470 la_oenb[33] vssa1 0.63fF
-C471 la_data_out[33] vssa1 0.63fF
-C472 la_data_in[33] vssa1 0.63fF
-C473 la_oenb[32] vssa1 0.63fF
-C474 la_data_out[32] vssa1 0.63fF
-C475 la_data_in[32] vssa1 0.63fF
-C476 la_oenb[31] vssa1 0.63fF
-C477 la_data_out[31] vssa1 0.63fF
-C478 la_oenb[30] vssa1 0.63fF
-C479 la_data_out[30] vssa1 0.63fF
-C480 la_data_in[30] vssa1 0.63fF
-C481 la_oenb[29] vssa1 0.63fF
-C482 la_data_out[29] vssa1 0.63fF
-C483 la_data_in[29] vssa1 0.63fF
-C484 la_oenb[28] vssa1 0.63fF
-C485 la_data_out[28] vssa1 0.63fF
-C486 la_data_in[28] vssa1 0.63fF
-C487 la_oenb[27] vssa1 0.63fF
-C488 la_data_out[27] vssa1 0.63fF
-C489 la_data_in[27] vssa1 0.63fF
-C490 la_data_out[26] vssa1 0.63fF
-C491 la_data_in[26] vssa1 0.63fF
-C492 la_oenb[25] vssa1 0.63fF
-C493 la_data_out[25] vssa1 0.63fF
-C494 la_data_in[25] vssa1 0.63fF
-C495 la_oenb[24] vssa1 0.63fF
-C496 la_data_out[24] vssa1 0.63fF
-C497 la_data_in[24] vssa1 0.63fF
-C498 la_oenb[23] vssa1 0.63fF
-C499 la_data_out[23] vssa1 0.63fF
-C500 la_data_in[23] vssa1 0.63fF
-C501 la_oenb[22] vssa1 0.63fF
-C502 la_data_out[22] vssa1 0.63fF
-C503 la_data_in[22] vssa1 0.63fF
-C504 la_oenb[21] vssa1 0.63fF
-C505 la_data_out[21] vssa1 0.63fF
-C506 la_data_in[21] vssa1 0.63fF
-C507 la_oenb[20] vssa1 0.63fF
-C508 la_data_in[20] vssa1 0.63fF
-C509 la_oenb[19] vssa1 0.63fF
-C510 la_data_out[19] vssa1 0.63fF
-C511 la_data_in[19] vssa1 0.63fF
-C512 la_oenb[18] vssa1 0.63fF
-C513 la_data_out[18] vssa1 0.63fF
-C514 la_data_in[18] vssa1 0.63fF
-C515 la_oenb[17] vssa1 0.63fF
-C516 la_data_out[17] vssa1 0.63fF
-C517 la_data_in[17] vssa1 0.63fF
-C518 la_oenb[16] vssa1 0.63fF
-C519 la_data_out[16] vssa1 0.63fF
-C520 la_oenb[15] vssa1 0.63fF
-C521 la_data_out[15] vssa1 0.63fF
-C522 la_data_in[15] vssa1 0.63fF
-C523 la_oenb[14] vssa1 0.63fF
-C524 la_data_out[14] vssa1 0.63fF
-C525 la_data_in[14] vssa1 0.63fF
-C526 la_oenb[13] vssa1 0.63fF
-C527 la_data_out[13] vssa1 0.63fF
-C528 la_data_in[13] vssa1 0.63fF
-C529 la_oenb[12] vssa1 0.63fF
-C530 la_data_out[12] vssa1 0.63fF
-C531 la_data_in[12] vssa1 0.63fF
-C532 la_data_out[11] vssa1 0.63fF
-C533 la_data_in[11] vssa1 0.63fF
-C534 la_oenb[10] vssa1 0.63fF
-C535 la_data_out[10] vssa1 0.63fF
-C536 la_data_in[10] vssa1 0.63fF
-C537 la_data_out[9] vssa1 0.63fF
-C538 la_data_in[9] vssa1 0.63fF
-C539 la_oenb[8] vssa1 0.63fF
-C540 la_data_out[8] vssa1 0.63fF
-C541 la_data_in[8] vssa1 0.63fF
-C542 la_oenb[7] vssa1 0.63fF
-C543 la_data_out[7] vssa1 0.63fF
-C544 la_data_in[7] vssa1 0.63fF
-C545 la_oenb[6] vssa1 0.63fF
-C546 la_data_out[6] vssa1 0.63fF
-C547 la_data_in[6] vssa1 0.63fF
-C548 la_oenb[5] vssa1 0.63fF
-C549 la_data_in[5] vssa1 0.63fF
-C550 la_oenb[4] vssa1 0.63fF
-C551 la_data_out[4] vssa1 0.63fF
-C552 la_data_in[4] vssa1 0.63fF
-C553 la_oenb[3] vssa1 0.63fF
-C554 la_data_out[3] vssa1 0.63fF
-C555 la_data_in[3] vssa1 0.63fF
-C556 la_oenb[2] vssa1 0.63fF
-C557 la_data_out[2] vssa1 0.63fF
-C558 la_data_in[2] vssa1 0.63fF
-C559 la_oenb[1] vssa1 0.63fF
-C560 la_data_out[1] vssa1 0.63fF
-C561 la_oenb[0] vssa1 0.63fF
-C562 la_data_out[0] vssa1 0.63fF
-C563 la_data_in[0] vssa1 0.63fF
-C564 wbs_dat_o[31] vssa1 0.63fF
-C565 wbs_dat_i[31] vssa1 0.63fF
-C566 wbs_adr_i[31] vssa1 0.63fF
-C567 wbs_dat_o[30] vssa1 0.63fF
-C568 wbs_dat_i[30] vssa1 0.63fF
-C569 wbs_adr_i[30] vssa1 0.63fF
-C570 wbs_dat_o[29] vssa1 0.63fF
-C571 wbs_dat_i[29] vssa1 0.63fF
-C572 wbs_adr_i[29] vssa1 0.63fF
-C573 wbs_dat_i[28] vssa1 0.63fF
-C574 wbs_adr_i[28] vssa1 0.63fF
-C575 wbs_dat_o[27] vssa1 0.63fF
-C576 wbs_dat_i[27] vssa1 0.63fF
-C577 wbs_adr_i[27] vssa1 0.63fF
-C578 wbs_dat_i[26] vssa1 0.63fF
-C579 wbs_adr_i[26] vssa1 0.63fF
-C580 wbs_dat_o[25] vssa1 0.63fF
-C581 wbs_dat_i[25] vssa1 0.63fF
-C582 wbs_adr_i[25] vssa1 0.63fF
-C583 wbs_dat_o[24] vssa1 0.63fF
-C584 wbs_dat_i[24] vssa1 0.63fF
-C585 wbs_adr_i[24] vssa1 0.63fF
-C586 wbs_dat_o[23] vssa1 0.63fF
-C587 wbs_dat_i[23] vssa1 0.63fF
-C588 wbs_adr_i[23] vssa1 0.63fF
-C589 wbs_dat_o[22] vssa1 0.63fF
-C590 wbs_adr_i[22] vssa1 0.63fF
-C591 wbs_dat_o[21] vssa1 0.63fF
-C592 wbs_dat_i[21] vssa1 0.63fF
-C593 wbs_adr_i[21] vssa1 0.63fF
-C594 wbs_dat_o[20] vssa1 0.63fF
-C595 wbs_dat_i[20] vssa1 0.63fF
-C596 wbs_adr_i[20] vssa1 0.63fF
-C597 wbs_dat_o[19] vssa1 0.63fF
-C598 wbs_dat_i[19] vssa1 0.63fF
-C599 wbs_adr_i[19] vssa1 0.63fF
-C600 wbs_dat_o[18] vssa1 0.63fF
-C601 wbs_dat_i[18] vssa1 0.63fF
-C602 wbs_dat_o[17] vssa1 0.63fF
-C603 wbs_dat_i[17] vssa1 0.63fF
-C604 wbs_adr_i[17] vssa1 0.63fF
-C605 wbs_dat_o[16] vssa1 0.63fF
-C606 wbs_dat_i[16] vssa1 0.63fF
-C607 wbs_adr_i[16] vssa1 0.63fF
-C608 wbs_dat_o[15] vssa1 0.63fF
-C609 wbs_dat_i[15] vssa1 0.63fF
-C610 wbs_adr_i[15] vssa1 0.63fF
-C611 wbs_dat_o[14] vssa1 0.63fF
-C612 wbs_dat_i[14] vssa1 0.63fF
-C613 wbs_adr_i[14] vssa1 0.63fF
-C614 wbs_dat_o[13] vssa1 0.63fF
-C615 wbs_dat_i[13] vssa1 0.63fF
-C616 wbs_adr_i[13] vssa1 0.63fF
-C617 wbs_dat_o[12] vssa1 0.63fF
-C618 wbs_dat_i[12] vssa1 0.63fF
-C619 wbs_adr_i[12] vssa1 0.63fF
-C620 wbs_dat_i[11] vssa1 0.63fF
-C621 wbs_adr_i[11] vssa1 0.63fF
-C622 wbs_dat_o[10] vssa1 0.63fF
-C623 wbs_dat_i[10] vssa1 0.63fF
-C624 wbs_adr_i[10] vssa1 0.63fF
-C625 wbs_dat_o[9] vssa1 0.63fF
-C626 wbs_dat_i[9] vssa1 0.63fF
-C627 wbs_adr_i[9] vssa1 0.63fF
-C628 wbs_dat_o[8] vssa1 0.63fF
-C629 wbs_dat_i[8] vssa1 0.63fF
-C630 wbs_adr_i[8] vssa1 0.63fF
-C631 wbs_dat_o[7] vssa1 0.63fF
-C632 wbs_adr_i[7] vssa1 0.63fF
-C633 wbs_dat_o[6] vssa1 0.63fF
-C634 wbs_dat_i[6] vssa1 0.63fF
-C635 wbs_adr_i[6] vssa1 0.63fF
-C636 wbs_dat_o[5] vssa1 0.63fF
-C637 wbs_dat_i[5] vssa1 0.63fF
-C638 wbs_adr_i[5] vssa1 0.63fF
-C639 wbs_dat_o[4] vssa1 0.63fF
-C640 wbs_dat_i[4] vssa1 0.63fF
-C641 wbs_adr_i[4] vssa1 0.63fF
-C642 wbs_sel_i[3] vssa1 0.63fF
-C643 wbs_dat_o[3] vssa1 0.63fF
-C644 wbs_adr_i[3] vssa1 0.63fF
-C645 wbs_sel_i[2] vssa1 0.63fF
-C646 wbs_dat_o[2] vssa1 0.63fF
-C647 wbs_dat_i[2] vssa1 0.63fF
-C648 wbs_adr_i[2] vssa1 0.63fF
-C649 wbs_dat_o[1] vssa1 0.63fF
-C650 wbs_dat_i[1] vssa1 0.63fF
-C651 wbs_adr_i[1] vssa1 0.63fF
-C652 wbs_sel_i[0] vssa1 0.63fF
-C653 wbs_dat_o[0] vssa1 0.63fF
-C654 wbs_dat_i[0] vssa1 0.63fF
-C655 wbs_adr_i[0] vssa1 0.63fF
-C656 wbs_we_i vssa1 0.63fF
-C657 wbs_stb_i vssa1 0.63fF
-C658 wbs_cyc_i vssa1 0.63fF
-C659 wbs_ack_o vssa1 0.63fF
-C660 wb_rst_i vssa1 0.63fF
-C661 m3_226242_702300# vssa1 -1.31fF $ **FLOATING
-C662 m3_222594_702300# vssa1 0.55fF $ **FLOATING
-C663 top_pll_v2_0/PFD_0/and_pfd_0/a_656_410# vssa1 0.96fF
-C664 top_pll_v2_0/PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_63_n45# vssa1 0.05fF
-C665 top_pll_v2_0/PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_n129_n45# vssa1 0.05fF
-C666 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C667 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_2/B vssa1 1.40fF
-C668 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C669 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_3/A vssa1 3.14fF
-C670 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C671 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C672 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_2/A vssa1 2.55fF
-C673 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C674 top_pll_v2_0/QB vssa1 4.35fF
-C675 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C676 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C677 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C678 top_pll_v2_0/out_div_by_5 vssa1 -0.40fF
-C679 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C680 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_2/B vssa1 1.40fF
-C681 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C682 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_3/A vssa1 3.14fF
-C683 top_pll_v2_0/pfd_reset vssa1 2.17fF
-C684 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C685 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C686 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_2/A vssa1 2.55fF
-C687 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C688 top_pll_v2_0/QA vssa1 4.22fF
-C689 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C690 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C691 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C692 top_pll_v2_0/pfd_cp_interface_0/inverter_cp_x1_2/in vssa1 1.85fF
-C693 top_pll_v2_0/pfd_cp_interface_0/inverter_cp_x1_0/out vssa1 1.77fF
-C694 top_pll_v2_0/nUp vssa1 5.39fF
-C695 top_pll_v2_0/Up vssa1 1.85fF
-C696 top_pll_v2_0/Down vssa1 6.19fF
-C697 top_pll_v2_0/nDown vssa1 -3.53fF
-C698 top_pll_v2_0/div_by_5_0/sky130_fd_sc_hs__or2_1_0/a_63_368# vssa1 0.37fF
-C699 top_pll_v2_0/div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_56_136# vssa1 0.38fF
-C700 top_pll_v2_0/div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# vssa1 0.38fF
-C701 top_pll_v2_0/div_by_5_0/DFlipFlop_3/nQ vssa1 0.48fF
-C702 top_pll_v2_0/div_5_Q1_shift vssa1 -0.14fF
-C703 top_pll_v2_0/div_by_5_0/DFlipFlop_3/latch_diff_1/m1_657_280# vssa1 0.57fF
-C704 top_pll_v2_0/div_by_5_0/DFlipFlop_3/latch_diff_1/nD vssa1 0.57fF
-C705 top_pll_v2_0/div_by_5_0/DFlipFlop_3/latch_diff_1/D vssa1 -1.73fF
-C706 top_pll_v2_0/div_by_5_0/DFlipFlop_3/latch_diff_0/m1_657_280# vssa1 0.57fF
-C707 top_pll_v2_0/div_by_5_0/DFlipFlop_3/latch_diff_0/D vssa1 0.96fF
-C708 top_pll_v2_0/div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
-C709 top_pll_v2_0/div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
-C710 top_pll_v2_0/div_by_5_0/DFlipFlop_3/latch_diff_0/nD vssa1 1.14fF
-C711 top_pll_v2_0/div_by_5_0/DFlipFlop_2/nQ vssa1 0.48fF
-C712 top_pll_v2_0/div_5_Q1 vssa1 4.25fF
-C713 top_pll_v2_0/div_by_5_0/DFlipFlop_2/latch_diff_1/m1_657_280# vssa1 0.57fF
-C714 top_pll_v2_0/div_by_5_0/DFlipFlop_2/latch_diff_1/nD vssa1 0.57fF
-C715 top_pll_v2_0/div_by_5_0/DFlipFlop_2/latch_diff_1/D vssa1 -1.73fF
-C716 top_pll_v2_0/div_by_5_0/DFlipFlop_2/latch_diff_0/m1_657_280# vssa1 0.57fF
-C717 top_pll_v2_0/div_by_5_0/DFlipFlop_2/latch_diff_0/D vssa1 0.96fF
-C718 top_pll_v2_0/div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
-C719 top_pll_v2_0/div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
-C720 top_pll_v2_0/div_by_5_0/DFlipFlop_2/D vssa1 3.13fF
-C721 top_pll_v2_0/div_by_5_0/DFlipFlop_2/latch_diff_0/nD vssa1 1.14fF
-C722 top_pll_v2_0/div_5_nQ0 vssa1 0.59fF
-C723 top_pll_v2_0/div_5_Q0 vssa1 0.01fF
-C724 top_pll_v2_0/div_by_5_0/DFlipFlop_1/latch_diff_1/m1_657_280# vssa1 0.57fF
-C725 top_pll_v2_0/div_by_5_0/DFlipFlop_1/latch_diff_1/nD vssa1 0.57fF
-C726 top_pll_v2_0/div_by_5_0/DFlipFlop_1/latch_diff_1/D vssa1 -1.73fF
-C727 top_pll_v2_0/div_by_5_0/DFlipFlop_1/latch_diff_0/m1_657_280# vssa1 0.57fF
-C728 top_pll_v2_0/div_by_5_0/DFlipFlop_1/latch_diff_0/D vssa1 0.96fF
-C729 top_pll_v2_0/div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
-C730 top_pll_v2_0/div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
-C731 top_pll_v2_0/div_by_5_0/DFlipFlop_1/D vssa1 3.64fF
-C732 top_pll_v2_0/div_by_5_0/DFlipFlop_1/latch_diff_0/nD vssa1 1.14fF
-C733 top_pll_v2_0/div_5_nQ2 vssa1 1.24fF
-C734 top_pll_v2_0/div_by_5_0/DFlipFlop_0/Q vssa1 -0.94fF
-C735 top_pll_v2_0/div_by_5_0/DFlipFlop_0/latch_diff_1/m1_657_280# vssa1 0.57fF
-C736 top_pll_v2_0/n_out_by_2 vssa1 -2.75fF
-C737 top_pll_v2_0/div_by_5_0/DFlipFlop_0/latch_diff_1/nD vssa1 0.57fF
-C738 top_pll_v2_0/div_by_5_0/DFlipFlop_0/latch_diff_1/D vssa1 -1.73fF
-C739 top_pll_v2_0/div_by_5_0/DFlipFlop_0/latch_diff_0/m1_657_280# vssa1 0.57fF
-C740 top_pll_v2_0/out_by_2 vssa1 -5.01fF
-C741 top_pll_v2_0/div_by_5_0/DFlipFlop_0/latch_diff_0/D vssa1 0.96fF
-C742 top_pll_v2_0/div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
-C743 top_pll_v2_0/div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
-C744 top_pll_v2_0/div_by_5_0/DFlipFlop_0/D vssa1 3.96fF
-C745 top_pll_v2_0/div_by_5_0/DFlipFlop_0/latch_diff_0/nD vssa1 1.14fF
-C746 top_pll_v2_0/div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_355_368# vssa1 0.08fF
-C747 top_pll_v2_0/div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_194_125# vssa1 0.40fF
-C748 top_pll_v2_0/out_to_buffer vssa1 1.54fF
-C749 top_pll_v2_0/out_to_div vssa1 4.23fF
-C750 top_pll_v2_0/out_first_buffer vssa1 2.88fF
-C751 top_pll_v2_0/ring_osc_0/csvco_branch_2/in vssa1 1.60fF
-C752 top_pll_v2_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd vssa1 0.16fF
-C753 top_pll_v2_0/ring_osc_0/csvco_branch_1/cap_vco_0/t vssa1 7.10fF
-C754 top_pll_v2_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vss vssa1 0.52fF
-C755 top_pll_v2_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd vssa1 0.16fF
-C756 top_pll_v2_0/ring_osc_0/csvco_branch_2/cap_vco_0/t vssa1 7.10fF
-C757 top_pll_v2_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vss vssa1 0.52fF
-C758 top_pll_v2_0/ring_osc_0/csvco_branch_1/in vssa1 1.58fF
-C759 top_pll_v2_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd vssa1 0.16fF
-C760 top_pll_v2_0/vco_out vssa1 1.01fF
-C761 top_pll_v2_0/ring_osc_0/csvco_branch_0/cap_vco_0/t vssa1 7.10fF
-C762 top_pll_v2_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vss vssa1 0.52fF
-C763 top_pll_v2_0/ring_osc_0/csvco_branch_2/vbp vssa1 0.36fF
-C764 io_analog[8] vssa1 7.79fF
-C765 top_pll_v2_0/buffer_salida_0/a_3996_n100# vssa1 48.23fF
-C766 top_pll_v2_0/buffer_salida_0/a_678_n100# vssa1 13.21fF
-C767 top_pll_v2_0/n_out_buffer_div_2 vssa1 1.63fF
-C768 top_pll_v2_0/out_buffer_div_2 vssa1 1.60fF
-C769 top_pll_v2_0/div_by_2_0/DFlipFlop_0/CLK vssa1 0.31fF
-C770 top_pll_v2_0/div_by_2_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
-C771 top_pll_v2_0/div_by_2_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
-C772 top_pll_v2_0/div_by_2_0/DFlipFlop_0/nCLK vssa1 1.03fF
-C773 top_pll_v2_0/out_div_2 vssa1 -1.30fF
-C774 top_pll_v2_0/div_by_2_0/DFlipFlop_0/latch_diff_1/m1_657_280# vssa1 0.57fF
-C775 top_pll_v2_0/div_by_2_0/DFlipFlop_0/latch_diff_1/nD vssa1 0.57fF
-C776 top_pll_v2_0/div_by_2_0/DFlipFlop_0/latch_diff_1/D vssa1 -1.73fF
-C777 top_pll_v2_0/div_by_2_0/DFlipFlop_0/latch_diff_0/m1_657_280# vssa1 0.57fF
-C778 top_pll_v2_0/div_by_2_0/DFlipFlop_0/latch_diff_0/D vssa1 0.96fF
-C779 top_pll_v2_0/div_by_2_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
-C780 top_pll_v2_0/div_by_2_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
-C781 top_pll_v2_0/n_out_div_2 vssa1 1.95fF
-C782 top_pll_v2_0/div_by_2_0/DFlipFlop_0/latch_diff_0/nD vssa1 1.14fF
-C783 top_pll_v2_0/lf_vc vssa1 -59.89fF
-C784 top_pll_v2_0/loop_filter_v2_0/res_loop_filter_2/out vssa1 7.90fF
-C785 gpio_noesd[8] vssa1 66.95fF
-C786 top_pll_v2_0/loop_filter_v2_0/cap3_loop_filter_0/in vssa1 -12.03fF
-C787 top_pll_v2_0/nswitch vssa1 3.73fF
-C788 top_pll_v2_0/biasp vssa1 5.44fF
-C789 bias_0/iref_1 vssa1 -95.39fF
-C790 top_pll_v2_0/vco_vctrl vssa1 -20.08fF
-C791 top_pll_v2_0/pswitch vssa1 3.57fF
-C792 bias_0/iref_4 vssa1 1.17fF
-C793 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_4/a_n1731_n1219# vssa1 2.60fF
-C794 bias_0/iref_3 vssa1 0.64fF
-C795 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_3/a_n1731_n1219# vssa1 2.60fF
-C796 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_2/a_n1731_n1219# vssa1 2.60fF
-C797 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_1/a_n1731_n1219# vssa1 2.60fF
-C798 bias_0/iref_0 vssa1 1.88fF
-C799 io_analog[5] vssa1 33.29fF
-C800 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_0/a_n1731_n1219# vssa1 2.60fF
-C801 bias_0/m1_20168_984# vssa1 56.92fF
-C802 bias_0/iref_9 vssa1 -1.13fF
-C803 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_10/a_n1731_n1219# vssa1 2.60fF
-C804 bias_0/iref_7 vssa1 -1.38fF
-C805 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_8/a_n1731_n1219# vssa1 2.60fF
-C806 bias_0/iref_8 vssa1 -1.19fF
-C807 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_9/a_n1731_n1219# vssa1 2.60fF
-C808 bias_0/iref_6 vssa1 -1.00fF
-C809 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_7/a_n1731_n1219# vssa1 2.60fF
-C810 bias_0/iref_5 vssa1 1.40fF
-C811 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_6/a_n1731_n1219# vssa1 2.60fF
-C812 top_pll_v1_0/PFD_0/and_pfd_0/a_656_410# vssa1 0.96fF
-C813 top_pll_v1_0/PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_63_n45# vssa1 0.05fF
-C814 top_pll_v1_0/PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_n129_n45# vssa1 0.05fF
-C815 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C816 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_2/B vssa1 1.40fF
-C817 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C818 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_3/A vssa1 3.14fF
-C819 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C820 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C821 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_2/A vssa1 2.55fF
-C822 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C823 top_pll_v1_0/QB vssa1 4.35fF
-C824 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C825 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C826 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C827 top_pll_v1_0/out_div_by_5 vssa1 -0.40fF
-C828 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C829 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_2/B vssa1 1.40fF
-C830 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C831 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_3/A vssa1 3.14fF
-C832 top_pll_v1_0/pfd_reset vssa1 2.17fF
-C833 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C834 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C835 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_2/A vssa1 2.55fF
-C836 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C837 top_pll_v1_0/QA vssa1 4.22fF
-C838 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C839 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
-C840 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
-C841 io_analog[10] vssa1 293.41fF
-C842 top_pll_v1_0/pfd_cp_interface_0/inverter_cp_x1_2/in vssa1 1.85fF
-C843 top_pll_v1_0/pfd_cp_interface_0/inverter_cp_x1_0/out vssa1 1.77fF
-C844 top_pll_v1_0/nUp vssa1 5.39fF
-C845 top_pll_v1_0/Up vssa1 1.85fF
-C846 top_pll_v1_0/Down vssa1 6.19fF
-C847 top_pll_v1_0/nDown vssa1 -3.53fF
-C848 top_pll_v1_0/div_by_5_0/sky130_fd_sc_hs__or2_1_0/a_63_368# vssa1 0.37fF
-C849 top_pll_v1_0/div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_56_136# vssa1 0.38fF
-C850 top_pll_v1_0/div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# vssa1 0.38fF
-C851 top_pll_v1_0/div_by_5_0/DFlipFlop_3/nQ vssa1 0.48fF
-C852 top_pll_v1_0/div_5_Q1_shift vssa1 -0.14fF
-C853 top_pll_v1_0/div_by_5_0/DFlipFlop_3/latch_diff_1/m1_657_280# vssa1 0.57fF
-C854 top_pll_v1_0/div_by_5_0/DFlipFlop_3/latch_diff_1/nD vssa1 0.57fF
-C855 top_pll_v1_0/div_by_5_0/DFlipFlop_3/latch_diff_1/D vssa1 -1.73fF
-C856 top_pll_v1_0/div_by_5_0/DFlipFlop_3/latch_diff_0/m1_657_280# vssa1 0.57fF
-C857 top_pll_v1_0/div_by_5_0/DFlipFlop_3/latch_diff_0/D vssa1 0.96fF
-C858 top_pll_v1_0/div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
-C859 top_pll_v1_0/div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
-C860 top_pll_v1_0/div_by_5_0/DFlipFlop_3/latch_diff_0/nD vssa1 1.14fF
-C861 top_pll_v1_0/div_by_5_0/DFlipFlop_2/nQ vssa1 0.48fF
-C862 top_pll_v1_0/div_5_Q1 vssa1 4.25fF
-C863 top_pll_v1_0/div_by_5_0/DFlipFlop_2/latch_diff_1/m1_657_280# vssa1 0.57fF
-C864 top_pll_v1_0/div_by_5_0/DFlipFlop_2/latch_diff_1/nD vssa1 0.57fF
-C865 top_pll_v1_0/div_by_5_0/DFlipFlop_2/latch_diff_1/D vssa1 -1.73fF
-C866 top_pll_v1_0/div_by_5_0/DFlipFlop_2/latch_diff_0/m1_657_280# vssa1 0.57fF
-C867 top_pll_v1_0/div_by_5_0/DFlipFlop_2/latch_diff_0/D vssa1 0.96fF
-C868 top_pll_v1_0/div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
-C869 top_pll_v1_0/div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
-C870 top_pll_v1_0/div_by_5_0/DFlipFlop_2/D vssa1 3.13fF
-C871 top_pll_v1_0/div_by_5_0/DFlipFlop_2/latch_diff_0/nD vssa1 1.14fF
-C872 top_pll_v1_0/div_5_nQ0 vssa1 0.59fF
-C873 top_pll_v1_0/div_5_Q0 vssa1 0.01fF
-C874 top_pll_v1_0/div_by_5_0/DFlipFlop_1/latch_diff_1/m1_657_280# vssa1 0.57fF
-C875 top_pll_v1_0/div_by_5_0/DFlipFlop_1/latch_diff_1/nD vssa1 0.57fF
-C876 top_pll_v1_0/div_by_5_0/DFlipFlop_1/latch_diff_1/D vssa1 -1.73fF
-C877 top_pll_v1_0/div_by_5_0/DFlipFlop_1/latch_diff_0/m1_657_280# vssa1 0.57fF
-C878 top_pll_v1_0/div_by_5_0/DFlipFlop_1/latch_diff_0/D vssa1 0.96fF
-C879 top_pll_v1_0/div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
-C880 top_pll_v1_0/div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
-C881 top_pll_v1_0/div_by_5_0/DFlipFlop_1/D vssa1 3.64fF
-C882 top_pll_v1_0/div_by_5_0/DFlipFlop_1/latch_diff_0/nD vssa1 1.14fF
-C883 top_pll_v1_0/div_5_nQ2 vssa1 1.24fF
-C884 top_pll_v1_0/div_by_5_0/DFlipFlop_0/Q vssa1 -0.94fF
-C885 top_pll_v1_0/div_by_5_0/DFlipFlop_0/latch_diff_1/m1_657_280# vssa1 0.57fF
-C886 top_pll_v1_0/n_out_by_2 vssa1 -2.75fF
-C887 top_pll_v1_0/div_by_5_0/DFlipFlop_0/latch_diff_1/nD vssa1 0.57fF
-C888 top_pll_v1_0/div_by_5_0/DFlipFlop_0/latch_diff_1/D vssa1 -1.73fF
-C889 top_pll_v1_0/div_by_5_0/DFlipFlop_0/latch_diff_0/m1_657_280# vssa1 0.57fF
-C890 top_pll_v1_0/out_by_2 vssa1 -5.01fF
-C891 top_pll_v1_0/div_by_5_0/DFlipFlop_0/latch_diff_0/D vssa1 0.96fF
-C892 top_pll_v1_0/div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
-C893 top_pll_v1_0/div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
-C894 top_pll_v1_0/div_by_5_0/DFlipFlop_0/D vssa1 3.96fF
-C895 top_pll_v1_0/div_by_5_0/DFlipFlop_0/latch_diff_0/nD vssa1 1.14fF
-C896 vdda1 vssa1 6982.37fF
-C897 top_pll_v1_0/div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_355_368# vssa1 0.08fF
-C898 top_pll_v1_0/div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_194_125# vssa1 0.40fF
-C899 top_pll_v1_0/out_to_buffer vssa1 1.54fF
-C900 top_pll_v1_0/out_to_div vssa1 4.23fF
-C901 top_pll_v1_0/out_first_buffer vssa1 2.88fF
-C902 top_pll_v1_0/ring_osc_0/csvco_branch_2/in vssa1 1.60fF
-C903 top_pll_v1_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd vssa1 0.16fF
-C904 top_pll_v1_0/ring_osc_0/csvco_branch_1/cap_vco_0/t vssa1 7.10fF
-C905 top_pll_v1_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vss vssa1 0.52fF
-C906 top_pll_v1_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd vssa1 0.16fF
-C907 top_pll_v1_0/ring_osc_0/csvco_branch_2/cap_vco_0/t vssa1 7.10fF
-C908 top_pll_v1_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vss vssa1 0.52fF
-C909 top_pll_v1_0/ring_osc_0/csvco_branch_1/in vssa1 1.58fF
-C910 top_pll_v1_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd vssa1 0.16fF
-C911 top_pll_v1_0/vco_out vssa1 1.01fF
-C912 gpio_noesd[7] vssa1 44.01fF
-C913 top_pll_v1_0/ring_osc_0/csvco_branch_0/cap_vco_0/t vssa1 7.10fF
-C914 top_pll_v1_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vss vssa1 0.52fF
-C915 top_pll_v1_0/ring_osc_0/csvco_branch_2/vbp vssa1 0.36fF
-C916 io_analog[9] vssa1 7.89fF
-C917 top_pll_v1_0/buffer_salida_0/a_3996_n100# vssa1 48.23fF
-C918 top_pll_v1_0/buffer_salida_0/a_678_n100# vssa1 13.21fF
-C919 top_pll_v1_0/n_out_buffer_div_2 vssa1 1.63fF
-C920 top_pll_v1_0/out_buffer_div_2 vssa1 1.60fF
-C921 top_pll_v1_0/div_by_2_0/DFlipFlop_0/CLK vssa1 0.31fF
-C922 top_pll_v1_0/div_by_2_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
-C923 top_pll_v1_0/div_by_2_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
-C924 top_pll_v1_0/div_by_2_0/DFlipFlop_0/nCLK vssa1 1.03fF
-C925 top_pll_v1_0/out_div_2 vssa1 -1.30fF
-C926 top_pll_v1_0/div_by_2_0/DFlipFlop_0/latch_diff_1/m1_657_280# vssa1 0.57fF
-C927 top_pll_v1_0/div_by_2_0/DFlipFlop_0/latch_diff_1/nD vssa1 0.57fF
-C928 top_pll_v1_0/div_by_2_0/DFlipFlop_0/latch_diff_1/D vssa1 -1.73fF
-C929 top_pll_v1_0/div_by_2_0/DFlipFlop_0/latch_diff_0/m1_657_280# vssa1 0.57fF
-C930 top_pll_v1_0/div_by_2_0/DFlipFlop_0/latch_diff_0/D vssa1 0.96fF
-C931 top_pll_v1_0/div_by_2_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
-C932 top_pll_v1_0/div_by_2_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
-C933 top_pll_v1_0/n_out_div_2 vssa1 1.95fF
-C934 top_pll_v1_0/div_by_2_0/DFlipFlop_0/latch_diff_0/nD vssa1 1.14fF
-C935 top_pll_v1_0/nswitch vssa1 3.73fF
-C936 top_pll_v1_0/biasp vssa1 5.44fF
-C937 bias_0/iref_2 vssa1 -188.47fF
-C938 top_pll_v1_0/vco_vctrl vssa1 -18.17fF
-C939 top_pll_v1_0/pswitch vssa1 3.57fF
-C940 top_pll_v1_0/lf_vc vssa1 -59.89fF
-C941 top_pll_v1_0/loop_filter_0/res_loop_filter_2/out vssa1 7.90fF
+C0 io_clamp_high[2] io_analog[6] 0.53fF
+C1 vdda1 top_pll_v1_1/pswitch 0.48fF
+C2 top_pll_v2_0/biasp vdda1 0.03fF
+C3 vdda1 bias_0/iref_2 3.90fF
+C4 io_analog[10] gpio_noesd[7] 29.88fF
+C5 io_analog[7] top_pll_v1_1/buffer_salida_0/a_3996_n100# -0.08fF
+C6 io_analog[7] bias_0/iref_2 13.22fF
+C7 vdda1 gpio_noesd[7] 120.83fF
+C8 top_pll_v2_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd vdda1 0.17fF
+C9 gpio_noesd[7] top_pll_v1_1/vco_vctrl 0.04fF
+C10 vdda1 top_pll_v1_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd 0.04fF
+C11 io_clamp_low[0] io_clamp_high[0] 0.53fF
+C12 bias_0/iref_1 vdda1 15.26fF
+C13 bias_0/iref_2 top_pll_v1_0/nDown 0.70fF
+C14 io_analog[10] vdda1 0.01fF
+C15 bias_0/iref_1 top_pll_v2_0/nUp 0.22fF
+C16 io_analog[7] bias_0/iref_1 13.22fF
+C17 io_clamp_high[0] io_analog[4] 0.53fF
+C18 top_pll_v2_0/nUp vdda1 0.01fF
+C19 gpio_noesd[7] top_pll_v1_0/vco_vctrl 0.05fF
+C20 top_pll_v1_1/charge_pump_0/w_1008_774# bias_0/iref_0 0.21fF
+C21 io_analog[7] vdda1 29.48fF
+C22 vdda1 top_pll_v1_1/vco_vctrl 0.54fF
+C23 top_pll_v1_0/charge_pump_0/w_2544_775# bias_0/iref_2 0.02fF
+C24 bias_0/iref_1 top_pll_v2_0/nDown 0.54fF
+C25 gpio_noesd[7] top_pll_v1_0/out_to_div 0.23fF
+C26 vdda1 top_pll_v1_0/vco_vctrl 0.43fF
+C27 top_pll_v1_1/charge_pump_0/w_2544_775# bias_0/iref_0 0.21fF
+C28 vdda1 top_pll_v1_0/buffer_salida_0/a_3996_n100# 0.06fF
+C29 top_pll_v1_0/ring_osc_0/csvco_branch_2/vbp vdda1 1.01fF
+C30 top_pll_v1_1/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd vdda1 0.12fF
+C31 gpio_noesd[8] gpio_noesd[7] 1.88fF
+C32 bias_0/iref_1 top_pll_v2_0/Down 0.91fF
+C33 top_pll_v2_0/ring_osc_0/csvco_branch_2/vbp vdda1 2.10fF
+C34 top_pll_v2_0/vco_vctrl gpio_noesd[7] 0.05fF
+C35 top_pll_v1_1/Up bias_0/iref_0 0.74fF
+C36 io_analog[10] gpio_noesd[8] 20.65fF
+C37 vdda1 top_pll_v1_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd 0.04fF
+C38 top_pll_v2_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd vdda1 0.17fF
+C39 io_clamp_low[2] io_analog[6] 0.53fF
+C40 top_pll_v1_1/nUp bias_0/iref_0 0.74fF
+C41 top_pll_v1_1/biasp bias_0/iref_0 3.13fF
+C42 gpio_noesd[8] vdda1 76.96fF
+C43 top_pll_v2_0/buffer_salida_0/a_3996_n100# vdda1 0.05fF
+C44 top_pll_v2_0/out_to_div gpio_noesd[7] 0.23fF
+C45 top_pll_v1_0/nUp bias_0/iref_2 0.70fF
+C46 bias_0/iref_2 top_pll_v1_0/Down 1.11fF
+C47 top_pll_v2_0/vco_vctrl vdda1 0.59fF
+C48 top_pll_v2_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd vdda1 0.17fF
+C49 io_clamp_low[0] io_analog[4] 0.53fF
+C50 top_pll_v1_1/ring_osc_0/csvco_branch_2/vbp vdda1 1.14fF
+C51 bias_0/iref_1 top_pll_v2_0/charge_pump_0/w_2544_775# 0.09fF
+C52 top_pll_v1_0/nUp vdda1 0.01fF
+C53 vdda1 bias_0/iref_0 15.18fF
+C54 top_pll_v2_0/pswitch vdda1 0.34fF
+C55 vdda1 top_pll_v1_0/pswitch 0.38fF
+C56 bias_0/iref_2 top_pll_v1_0/biasp 3.20fF
+C57 io_analog[10] top_pll_v1_0/QA 0.03fF
+C58 top_pll_v1_1/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd vdda1 0.12fF
+C59 io_analog[5] m3_222594_702300# 0.53fF
+C60 io_analog[8] bias_0/iref_2 14.44fF
+C61 io_analog[9] bias_0/iref_2 14.44fF
+C62 top_pll_v1_1/out_to_div gpio_noesd[7] 0.15fF
+C63 top_pll_v1_1/nDown bias_0/iref_0 0.74fF
+C64 io_analog[5] m3_226242_702300# 0.53fF
+C65 top_pll_v1_1/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd vdda1 0.12fF
+C66 top_pll_v1_1/Down bias_0/iref_0 1.08fF
+C67 vdda1 top_pll_v1_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd 0.04fF
+C68 vdda1 top_pll_v1_0/biasp 0.03fF
+C69 bias_0/iref_1 top_pll_v2_0/Up 0.54fF
+C70 io_clamp_low[2] io_clamp_high[2] 0.53fF
+C71 io_analog[8] vdda1 29.93fF
+C72 bias_0/iref_2 top_pll_v1_0/Up 0.70fF
+C73 vdda1 io_analog[9] 30.05fF
+C74 bias_0/iref_1 top_pll_v2_0/biasp 2.20fF
+C75 io_in_3v3[0] vssa1 0.41fF
+C76 io_oeb[26] vssa1 0.61fF
+C77 io_in[0] vssa1 0.41fF
+C78 io_out[26] vssa1 0.61fF
+C79 io_out[0] vssa1 0.41fF
+C80 io_in[26] vssa1 0.61fF
+C81 io_oeb[0] vssa1 0.41fF
+C82 io_in_3v3[26] vssa1 0.61fF
+C83 io_in_3v3[1] vssa1 0.41fF
+C84 io_oeb[25] vssa1 0.61fF
+C85 io_in[1] vssa1 0.41fF
+C86 io_out[25] vssa1 0.61fF
+C87 io_out[1] vssa1 0.41fF
+C88 io_in[25] vssa1 0.61fF
+C89 io_oeb[1] vssa1 0.41fF
+C90 io_in_3v3[25] vssa1 0.61fF
+C91 io_in_3v3[2] vssa1 0.41fF
+C92 io_oeb[24] vssa1 0.61fF
+C93 io_in[2] vssa1 0.41fF
+C94 io_out[24] vssa1 0.61fF
+C95 io_out[2] vssa1 0.41fF
+C96 io_in[24] vssa1 0.61fF
+C97 io_oeb[2] vssa1 -0.20fF
+C98 io_in_3v3[3] vssa1 0.41fF
+C99 gpio_noesd[17] vssa1 0.61fF
+C100 io_in[3] vssa1 0.41fF
+C101 gpio_analog[17] vssa1 0.61fF
+C102 io_out[3] vssa1 0.41fF
+C103 io_oeb[3] vssa1 0.41fF
+C104 io_in_3v3[4] vssa1 0.41fF
+C105 io_in[4] vssa1 0.41fF
+C106 io_out[4] vssa1 0.41fF
+C107 io_oeb[4] vssa1 0.41fF
+C108 io_oeb[23] vssa1 0.61fF
+C109 io_out[23] vssa1 0.61fF
+C110 io_in[23] vssa1 0.61fF
+C111 io_in_3v3[23] vssa1 0.61fF
+C112 gpio_noesd[16] vssa1 0.61fF
+C113 io_in_3v3[5] vssa1 0.41fF
+C114 io_in[5] vssa1 -0.20fF
+C115 io_out[5] vssa1 0.41fF
+C116 io_oeb[5] vssa1 0.41fF
+C117 io_oeb[22] vssa1 0.61fF
+C118 io_out[22] vssa1 0.61fF
+C119 io_in[22] vssa1 0.61fF
+C120 io_in_3v3[22] vssa1 0.61fF
+C121 gpio_analog[15] vssa1 0.61fF
+C122 io_in_3v3[6] vssa1 -0.20fF
+C123 io_in[6] vssa1 0.41fF
+C124 io_out[6] vssa1 0.41fF
+C125 io_oeb[6] vssa1 0.41fF
+C126 io_oeb[21] vssa1 0.61fF
+C127 io_out[21] vssa1 0.61fF
+C128 io_in[21] vssa1 0.61fF
+C129 io_in_3v3[21] vssa1 0.61fF
+C130 gpio_noesd[14] vssa1 0.61fF
+C131 gpio_analog[14] vssa1 0.61fF
+C132 vssd2 vssa1 -5.19fF
+C133 vssd1 vssa1 1.13fF
+C134 vdda2 vssa1 -5.19fF
+C135 io_oeb[20] vssa1 0.61fF
+C136 io_out[20] vssa1 0.61fF
+C137 io_in[20] vssa1 0.61fF
+C138 io_in_3v3[20] vssa1 0.61fF
+C139 gpio_noesd[13] vssa1 0.61fF
+C140 gpio_analog[13] vssa1 0.61fF
+C141 gpio_analog[0] vssa1 0.41fF
+C142 gpio_noesd[0] vssa1 0.41fF
+C143 io_in_3v3[7] vssa1 0.41fF
+C144 io_in[7] vssa1 0.41fF
+C145 io_out[7] vssa1 0.41fF
+C146 io_oeb[7] vssa1 0.41fF
+C147 io_oeb[19] vssa1 0.61fF
+C148 io_out[19] vssa1 0.61fF
+C149 io_in[19] vssa1 0.61fF
+C150 io_in_3v3[19] vssa1 0.61fF
+C151 gpio_noesd[12] vssa1 0.61fF
+C152 gpio_analog[12] vssa1 0.61fF
+C153 gpio_analog[1] vssa1 0.41fF
+C154 gpio_noesd[1] vssa1 0.41fF
+C155 io_in_3v3[8] vssa1 0.41fF
+C156 io_in[8] vssa1 0.41fF
+C157 io_out[8] vssa1 -0.20fF
+C158 io_oeb[8] vssa1 0.41fF
+C159 io_oeb[18] vssa1 0.61fF
+C160 io_out[18] vssa1 0.61fF
+C161 io_in_3v3[18] vssa1 0.61fF
+C162 gpio_noesd[11] vssa1 0.61fF
+C163 gpio_analog[11] vssa1 0.61fF
+C164 gpio_analog[2] vssa1 0.41fF
+C165 gpio_noesd[2] vssa1 0.41fF
+C166 io_in_3v3[9] vssa1 0.41fF
+C167 io_in[9] vssa1 0.41fF
+C168 io_out[9] vssa1 0.41fF
+C169 io_oeb[9] vssa1 0.41fF
+C170 io_oeb[17] vssa1 0.61fF
+C171 io_in[17] vssa1 0.61fF
+C172 io_in_3v3[17] vssa1 0.61fF
+C173 gpio_noesd[10] vssa1 0.61fF
+C174 gpio_analog[10] vssa1 0.61fF
+C175 gpio_analog[3] vssa1 0.41fF
+C176 gpio_noesd[3] vssa1 0.41fF
+C177 io_in_3v3[10] vssa1 0.41fF
+C178 io_in[10] vssa1 0.41fF
+C179 io_out[10] vssa1 0.41fF
+C180 io_oeb[10] vssa1 0.41fF
+C181 io_out[16] vssa1 0.61fF
+C182 io_in[16] vssa1 0.61fF
+C183 io_in_3v3[16] vssa1 0.61fF
+C184 gpio_noesd[9] vssa1 0.61fF
+C185 gpio_analog[9] vssa1 0.61fF
+C186 gpio_analog[4] vssa1 0.41fF
+C187 gpio_noesd[4] vssa1 0.41fF
+C188 io_in_3v3[11] vssa1 0.41fF
+C189 io_in[11] vssa1 0.41fF
+C190 io_out[11] vssa1 0.41fF
+C191 io_oeb[11] vssa1 0.41fF
+C192 io_oeb[15] vssa1 0.61fF
+C193 io_out[15] vssa1 0.61fF
+C194 io_in[15] vssa1 0.61fF
+C195 io_in_3v3[15] vssa1 0.61fF
+C196 gpio_analog[5] vssa1 0.41fF
+C197 gpio_noesd[5] vssa1 0.41fF
+C198 io_in_3v3[12] vssa1 0.41fF
+C199 io_in[12] vssa1 0.41fF
+C200 io_out[12] vssa1 0.41fF
+C201 io_oeb[12] vssa1 0.41fF
+C202 gpio_analog[6] vssa1 0.60fF
+C203 gpio_noesd[6] vssa1 0.60fF
+C204 io_in_3v3[13] vssa1 0.60fF
+C205 io_in[13] vssa1 0.60fF
+C206 io_out[13] vssa1 0.60fF
+C207 io_oeb[13] vssa1 0.60fF
+C208 vccd1 vssa1 0.85fF
+C209 gpio_analog[8] vssa1 0.61fF
+C210 io_oeb[14] vssa1 0.61fF
+C211 io_out[14] vssa1 0.61fF
+C212 io_in[14] vssa1 0.61fF
+C213 io_in_3v3[14] vssa1 0.61fF
+C214 io_analog[0] vssa1 -6.01fF
+C215 io_analog[1] vssa1 0.76fF
+C216 vssa2 vssa1 1.66fF
+C217 vccd2 vssa1 0.91fF
+C218 io_analog[2] vssa1 -5.85fF
+C219 io_analog[3] vssa1 -5.74fF
+C220 io_analog[4] vssa1 -5.03fF
+C221 io_clamp_high[0] vssa1 -2.60fF
+C222 io_clamp_low[0] vssa1 0.82fF
+C223 io_analog[6] vssa1 -4.92fF
+C224 io_clamp_high[2] vssa1 0.66fF
+C225 io_clamp_low[2] vssa1 0.50fF
+C226 user_irq[2] vssa1 0.63fF
+C227 user_irq[1] vssa1 0.63fF
+C228 user_irq[0] vssa1 0.63fF
+C229 user_clock2 vssa1 0.63fF
+C230 la_oenb[127] vssa1 0.63fF
+C231 la_data_in[127] vssa1 0.63fF
+C232 la_oenb[126] vssa1 0.63fF
+C233 la_data_out[126] vssa1 0.63fF
+C234 la_data_in[126] vssa1 0.63fF
+C235 la_oenb[125] vssa1 0.63fF
+C236 la_data_out[125] vssa1 0.63fF
+C237 la_data_in[125] vssa1 0.63fF
+C238 la_oenb[124] vssa1 0.63fF
+C239 la_data_out[124] vssa1 0.63fF
+C240 la_data_in[124] vssa1 0.63fF
+C241 la_oenb[123] vssa1 0.63fF
+C242 la_data_out[123] vssa1 0.63fF
+C243 la_oenb[122] vssa1 0.63fF
+C244 la_data_out[122] vssa1 0.63fF
+C245 la_data_in[122] vssa1 0.63fF
+C246 la_oenb[121] vssa1 0.63fF
+C247 la_data_out[121] vssa1 0.63fF
+C248 la_data_in[121] vssa1 0.63fF
+C249 la_oenb[120] vssa1 0.63fF
+C250 la_data_out[120] vssa1 0.63fF
+C251 la_data_in[120] vssa1 0.63fF
+C252 la_oenb[119] vssa1 0.63fF
+C253 la_data_out[119] vssa1 0.63fF
+C254 la_data_in[119] vssa1 0.63fF
+C255 la_oenb[118] vssa1 0.63fF
+C256 la_data_out[118] vssa1 0.63fF
+C257 la_data_in[118] vssa1 0.63fF
+C258 la_oenb[117] vssa1 0.63fF
+C259 la_data_out[117] vssa1 0.63fF
+C260 la_data_in[117] vssa1 0.63fF
+C261 la_data_out[116] vssa1 0.63fF
+C262 la_data_in[116] vssa1 0.63fF
+C263 la_oenb[115] vssa1 0.63fF
+C264 la_data_out[115] vssa1 0.63fF
+C265 la_data_in[115] vssa1 0.63fF
+C266 la_oenb[114] vssa1 0.63fF
+C267 la_data_out[114] vssa1 0.63fF
+C268 la_data_in[114] vssa1 0.63fF
+C269 la_oenb[113] vssa1 0.63fF
+C270 la_data_out[113] vssa1 0.63fF
+C271 la_data_in[113] vssa1 0.63fF
+C272 la_oenb[112] vssa1 0.63fF
+C273 la_data_in[112] vssa1 0.63fF
+C274 la_oenb[111] vssa1 0.63fF
+C275 la_data_out[111] vssa1 0.63fF
+C276 la_data_in[111] vssa1 0.63fF
+C277 la_oenb[110] vssa1 0.63fF
+C278 la_data_out[110] vssa1 0.63fF
+C279 la_data_in[110] vssa1 0.63fF
+C280 la_oenb[109] vssa1 0.63fF
+C281 la_data_out[109] vssa1 0.63fF
+C282 la_data_in[109] vssa1 0.63fF
+C283 la_oenb[108] vssa1 0.63fF
+C284 la_data_out[108] vssa1 0.63fF
+C285 la_oenb[107] vssa1 0.63fF
+C286 la_data_out[107] vssa1 0.63fF
+C287 la_data_in[107] vssa1 0.63fF
+C288 la_oenb[106] vssa1 0.63fF
+C289 la_data_out[106] vssa1 0.63fF
+C290 la_oenb[105] vssa1 0.63fF
+C291 la_data_out[105] vssa1 0.63fF
+C292 la_data_in[105] vssa1 0.63fF
+C293 la_oenb[104] vssa1 0.63fF
+C294 la_data_out[104] vssa1 0.63fF
+C295 la_data_in[104] vssa1 0.63fF
+C296 la_oenb[103] vssa1 0.63fF
+C297 la_data_out[103] vssa1 0.63fF
+C298 la_data_in[103] vssa1 0.63fF
+C299 la_oenb[102] vssa1 0.63fF
+C300 la_data_out[102] vssa1 0.63fF
+C301 la_data_in[102] vssa1 0.63fF
+C302 la_data_out[101] vssa1 0.63fF
+C303 la_data_in[101] vssa1 0.63fF
+C304 la_oenb[100] vssa1 0.63fF
+C305 la_data_out[100] vssa1 0.63fF
+C306 la_data_in[100] vssa1 0.63fF
+C307 la_oenb[99] vssa1 0.63fF
+C308 la_data_out[99] vssa1 0.63fF
+C309 la_data_in[99] vssa1 0.63fF
+C310 la_oenb[98] vssa1 0.63fF
+C311 la_data_out[98] vssa1 0.63fF
+C312 la_data_in[98] vssa1 0.63fF
+C313 la_oenb[97] vssa1 0.63fF
+C314 la_data_in[97] vssa1 0.63fF
+C315 la_oenb[96] vssa1 0.63fF
+C316 la_data_out[96] vssa1 0.63fF
+C317 la_data_in[96] vssa1 0.63fF
+C318 la_oenb[95] vssa1 0.63fF
+C319 la_data_out[95] vssa1 0.63fF
+C320 la_data_in[95] vssa1 0.63fF
+C321 la_oenb[94] vssa1 0.63fF
+C322 la_data_out[94] vssa1 0.63fF
+C323 la_data_in[94] vssa1 0.63fF
+C324 la_oenb[93] vssa1 0.63fF
+C325 la_data_out[93] vssa1 0.63fF
+C326 la_oenb[92] vssa1 0.63fF
+C327 la_data_out[92] vssa1 0.63fF
+C328 la_data_in[92] vssa1 0.63fF
+C329 la_oenb[91] vssa1 0.63fF
+C330 la_data_out[91] vssa1 0.63fF
+C331 la_oenb[90] vssa1 0.63fF
+C332 la_data_out[90] vssa1 0.63fF
+C333 la_data_in[90] vssa1 0.63fF
+C334 la_oenb[89] vssa1 0.63fF
+C335 la_data_out[89] vssa1 0.63fF
+C336 la_data_in[89] vssa1 0.63fF
+C337 la_oenb[88] vssa1 0.63fF
+C338 la_data_out[88] vssa1 0.63fF
+C339 la_data_in[88] vssa1 0.63fF
+C340 la_oenb[87] vssa1 0.63fF
+C341 la_data_out[87] vssa1 0.63fF
+C342 la_data_in[87] vssa1 0.63fF
+C343 la_data_out[86] vssa1 0.63fF
+C344 la_data_in[86] vssa1 0.63fF
+C345 la_oenb[85] vssa1 0.63fF
+C346 la_data_out[85] vssa1 0.63fF
+C347 la_data_in[85] vssa1 0.63fF
+C348 la_oenb[84] vssa1 0.63fF
+C349 la_data_out[84] vssa1 0.63fF
+C350 la_data_in[84] vssa1 0.63fF
+C351 la_oenb[83] vssa1 0.63fF
+C352 la_data_out[83] vssa1 0.63fF
+C353 la_data_in[83] vssa1 0.63fF
+C354 la_oenb[82] vssa1 0.63fF
+C355 la_data_in[82] vssa1 0.63fF
+C356 la_oenb[81] vssa1 0.63fF
+C357 la_data_out[81] vssa1 0.63fF
+C358 la_data_in[81] vssa1 0.63fF
+C359 la_oenb[80] vssa1 0.63fF
+C360 la_data_out[80] vssa1 0.63fF
+C361 la_data_in[80] vssa1 0.63fF
+C362 la_oenb[79] vssa1 0.63fF
+C363 la_data_out[79] vssa1 0.63fF
+C364 la_data_in[79] vssa1 0.63fF
+C365 la_oenb[78] vssa1 0.63fF
+C366 la_data_out[78] vssa1 0.63fF
+C367 la_data_in[78] vssa1 0.63fF
+C368 la_oenb[77] vssa1 0.63fF
+C369 la_data_out[77] vssa1 0.63fF
+C370 la_data_in[77] vssa1 0.63fF
+C371 la_oenb[76] vssa1 0.63fF
+C372 la_data_out[76] vssa1 0.63fF
+C373 la_oenb[75] vssa1 0.63fF
+C374 la_data_out[75] vssa1 0.63fF
+C375 la_data_in[75] vssa1 0.63fF
+C376 la_oenb[74] vssa1 0.63fF
+C377 la_data_out[74] vssa1 0.63fF
+C378 la_data_in[74] vssa1 0.63fF
+C379 la_oenb[73] vssa1 0.63fF
+C380 la_data_out[73] vssa1 0.63fF
+C381 la_data_in[73] vssa1 0.63fF
+C382 la_oenb[72] vssa1 0.63fF
+C383 la_data_out[72] vssa1 0.63fF
+C384 la_data_in[72] vssa1 0.63fF
+C385 la_data_out[71] vssa1 0.63fF
+C386 la_data_in[71] vssa1 0.63fF
+C387 la_oenb[70] vssa1 0.63fF
+C388 la_data_out[70] vssa1 0.63fF
+C389 la_data_in[70] vssa1 0.63fF
+C390 la_oenb[69] vssa1 0.63fF
+C391 la_data_out[69] vssa1 0.63fF
+C392 la_data_in[69] vssa1 0.63fF
+C393 la_oenb[68] vssa1 0.63fF
+C394 la_data_out[68] vssa1 0.63fF
+C395 la_data_in[68] vssa1 0.63fF
+C396 la_oenb[67] vssa1 0.63fF
+C397 la_data_in[67] vssa1 0.63fF
+C398 la_oenb[66] vssa1 0.63fF
+C399 la_data_out[66] vssa1 0.63fF
+C400 la_data_in[66] vssa1 0.63fF
+C401 la_oenb[65] vssa1 0.63fF
+C402 la_data_out[65] vssa1 0.26fF
+C403 la_data_in[65] vssa1 0.63fF
+C404 la_oenb[64] vssa1 0.63fF
+C405 la_data_out[64] vssa1 0.63fF
+C406 la_data_in[64] vssa1 0.63fF
+C407 la_oenb[63] vssa1 0.63fF
+C408 la_data_out[63] vssa1 0.63fF
+C409 la_data_in[63] vssa1 0.63fF
+C410 la_oenb[62] vssa1 0.63fF
+C411 la_data_out[62] vssa1 0.63fF
+C412 la_data_in[62] vssa1 0.63fF
+C413 la_oenb[61] vssa1 0.63fF
+C414 la_data_out[61] vssa1 0.63fF
+C415 la_oenb[60] vssa1 0.63fF
+C416 la_data_out[60] vssa1 0.63fF
+C417 la_data_in[60] vssa1 0.63fF
+C418 la_oenb[59] vssa1 0.63fF
+C419 la_data_out[59] vssa1 0.63fF
+C420 la_data_in[59] vssa1 0.63fF
+C421 la_oenb[58] vssa1 0.63fF
+C422 la_data_out[58] vssa1 0.63fF
+C423 la_data_in[58] vssa1 0.63fF
+C424 la_oenb[57] vssa1 0.63fF
+C425 la_data_out[57] vssa1 0.63fF
+C426 la_data_in[57] vssa1 0.63fF
+C427 la_data_out[56] vssa1 0.63fF
+C428 la_data_in[56] vssa1 0.63fF
+C429 la_oenb[55] vssa1 0.63fF
+C430 la_data_out[55] vssa1 0.63fF
+C431 la_data_in[55] vssa1 0.63fF
+C432 la_oenb[54] vssa1 0.63fF
+C433 la_data_out[54] vssa1 0.63fF
+C434 la_data_in[54] vssa1 0.63fF
+C435 la_oenb[53] vssa1 0.63fF
+C436 la_data_out[53] vssa1 0.63fF
+C437 la_data_in[53] vssa1 0.63fF
+C438 la_oenb[52] vssa1 0.63fF
+C439 la_data_in[52] vssa1 0.63fF
+C440 la_oenb[51] vssa1 0.63fF
+C441 la_data_out[51] vssa1 0.63fF
+C442 la_data_in[51] vssa1 0.63fF
+C443 la_oenb[50] vssa1 0.63fF
+C444 la_data_in[50] vssa1 0.63fF
+C445 la_oenb[49] vssa1 0.63fF
+C446 la_data_out[49] vssa1 0.63fF
+C447 la_data_in[49] vssa1 0.63fF
+C448 la_oenb[48] vssa1 0.63fF
+C449 la_data_out[48] vssa1 0.63fF
+C450 la_data_in[48] vssa1 0.63fF
+C451 la_oenb[47] vssa1 0.63fF
+C452 la_data_out[47] vssa1 0.63fF
+C453 la_data_in[47] vssa1 0.63fF
+C454 la_oenb[46] vssa1 0.63fF
+C455 la_data_out[46] vssa1 0.63fF
+C456 la_oenb[45] vssa1 0.63fF
+C457 la_data_out[45] vssa1 0.63fF
+C458 la_data_in[45] vssa1 0.63fF
+C459 la_oenb[44] vssa1 0.63fF
+C460 la_data_out[44] vssa1 0.63fF
+C461 la_data_in[44] vssa1 0.63fF
+C462 la_oenb[43] vssa1 0.63fF
+C463 la_data_out[43] vssa1 0.63fF
+C464 la_data_in[43] vssa1 0.63fF
+C465 la_oenb[42] vssa1 0.63fF
+C466 la_data_out[42] vssa1 0.63fF
+C467 la_data_in[42] vssa1 0.63fF
+C468 la_data_out[41] vssa1 0.63fF
+C469 la_data_in[41] vssa1 0.63fF
+C470 la_oenb[40] vssa1 0.63fF
+C471 la_data_out[40] vssa1 0.63fF
+C472 la_data_in[40] vssa1 0.63fF
+C473 la_oenb[39] vssa1 0.63fF
+C474 la_data_out[39] vssa1 0.63fF
+C475 la_data_in[39] vssa1 0.63fF
+C476 la_oenb[38] vssa1 0.63fF
+C477 la_data_out[38] vssa1 0.63fF
+C478 la_data_in[38] vssa1 0.63fF
+C479 la_oenb[37] vssa1 0.63fF
+C480 la_data_out[37] vssa1 0.26fF
+C481 la_data_in[37] vssa1 0.63fF
+C482 la_oenb[36] vssa1 0.63fF
+C483 la_data_out[36] vssa1 0.63fF
+C484 la_data_in[36] vssa1 0.63fF
+C485 la_oenb[35] vssa1 0.63fF
+C486 la_data_in[35] vssa1 0.63fF
+C487 la_oenb[34] vssa1 0.63fF
+C488 la_data_out[34] vssa1 0.63fF
+C489 la_data_in[34] vssa1 0.63fF
+C490 la_oenb[33] vssa1 0.63fF
+C491 la_data_out[33] vssa1 0.63fF
+C492 la_data_in[33] vssa1 0.63fF
+C493 la_oenb[32] vssa1 0.63fF
+C494 la_data_out[32] vssa1 0.63fF
+C495 la_data_in[32] vssa1 0.63fF
+C496 la_oenb[31] vssa1 0.63fF
+C497 la_data_out[31] vssa1 0.63fF
+C498 la_oenb[30] vssa1 0.63fF
+C499 la_data_out[30] vssa1 0.63fF
+C500 la_data_in[30] vssa1 0.63fF
+C501 la_oenb[29] vssa1 0.63fF
+C502 la_data_out[29] vssa1 0.63fF
+C503 la_data_in[29] vssa1 0.63fF
+C504 la_oenb[28] vssa1 0.63fF
+C505 la_data_out[28] vssa1 0.63fF
+C506 la_data_in[28] vssa1 0.63fF
+C507 la_oenb[27] vssa1 0.63fF
+C508 la_data_out[27] vssa1 0.63fF
+C509 la_data_in[27] vssa1 0.63fF
+C510 la_data_out[26] vssa1 0.63fF
+C511 la_data_in[26] vssa1 0.63fF
+C512 la_oenb[25] vssa1 0.63fF
+C513 la_data_out[25] vssa1 0.63fF
+C514 la_data_in[25] vssa1 0.63fF
+C515 la_oenb[24] vssa1 0.63fF
+C516 la_data_out[24] vssa1 0.63fF
+C517 la_data_in[24] vssa1 0.63fF
+C518 la_oenb[23] vssa1 0.63fF
+C519 la_data_out[23] vssa1 0.63fF
+C520 la_data_in[23] vssa1 0.63fF
+C521 la_oenb[22] vssa1 0.63fF
+C522 la_data_out[22] vssa1 0.63fF
+C523 la_data_in[22] vssa1 0.63fF
+C524 la_oenb[21] vssa1 0.63fF
+C525 la_data_out[21] vssa1 0.63fF
+C526 la_data_in[21] vssa1 0.63fF
+C527 la_oenb[20] vssa1 0.63fF
+C528 la_data_in[20] vssa1 0.63fF
+C529 la_oenb[19] vssa1 0.63fF
+C530 la_data_out[19] vssa1 0.63fF
+C531 la_data_in[19] vssa1 0.63fF
+C532 la_oenb[18] vssa1 0.63fF
+C533 la_data_out[18] vssa1 0.63fF
+C534 la_data_in[18] vssa1 0.63fF
+C535 la_oenb[17] vssa1 0.63fF
+C536 la_data_out[17] vssa1 0.63fF
+C537 la_data_in[17] vssa1 0.63fF
+C538 la_oenb[16] vssa1 0.63fF
+C539 la_data_out[16] vssa1 0.63fF
+C540 la_oenb[15] vssa1 0.63fF
+C541 la_data_out[15] vssa1 0.63fF
+C542 la_data_in[15] vssa1 0.63fF
+C543 la_oenb[14] vssa1 0.63fF
+C544 la_data_out[14] vssa1 0.63fF
+C545 la_data_in[14] vssa1 0.63fF
+C546 la_oenb[13] vssa1 0.63fF
+C547 la_data_out[13] vssa1 0.63fF
+C548 la_data_in[13] vssa1 0.63fF
+C549 la_oenb[12] vssa1 0.63fF
+C550 la_data_out[12] vssa1 0.63fF
+C551 la_data_in[12] vssa1 0.63fF
+C552 la_data_out[11] vssa1 0.63fF
+C553 la_data_in[11] vssa1 0.63fF
+C554 la_oenb[10] vssa1 0.63fF
+C555 la_data_out[10] vssa1 0.63fF
+C556 la_data_in[10] vssa1 0.63fF
+C557 la_data_out[9] vssa1 0.63fF
+C558 la_data_in[9] vssa1 0.63fF
+C559 la_oenb[8] vssa1 0.63fF
+C560 la_data_out[8] vssa1 0.63fF
+C561 la_data_in[8] vssa1 0.63fF
+C562 la_oenb[7] vssa1 0.63fF
+C563 la_data_out[7] vssa1 0.63fF
+C564 la_data_in[7] vssa1 0.63fF
+C565 la_oenb[6] vssa1 0.63fF
+C566 la_data_out[6] vssa1 0.63fF
+C567 la_data_in[6] vssa1 0.63fF
+C568 la_oenb[5] vssa1 0.63fF
+C569 la_data_in[5] vssa1 0.63fF
+C570 la_oenb[4] vssa1 0.63fF
+C571 la_data_out[4] vssa1 0.63fF
+C572 la_data_in[4] vssa1 0.63fF
+C573 la_oenb[3] vssa1 0.63fF
+C574 la_data_out[3] vssa1 0.63fF
+C575 la_data_in[3] vssa1 0.63fF
+C576 la_oenb[2] vssa1 0.63fF
+C577 la_data_out[2] vssa1 0.63fF
+C578 la_data_in[2] vssa1 0.63fF
+C579 la_oenb[1] vssa1 0.63fF
+C580 la_data_out[1] vssa1 0.63fF
+C581 la_oenb[0] vssa1 0.63fF
+C582 la_data_out[0] vssa1 0.63fF
+C583 la_data_in[0] vssa1 0.63fF
+C584 wbs_dat_o[31] vssa1 0.63fF
+C585 wbs_dat_i[31] vssa1 0.63fF
+C586 wbs_adr_i[31] vssa1 0.63fF
+C587 wbs_dat_o[30] vssa1 0.63fF
+C588 wbs_dat_i[30] vssa1 0.63fF
+C589 wbs_adr_i[30] vssa1 0.63fF
+C590 wbs_dat_o[29] vssa1 0.63fF
+C591 wbs_dat_i[29] vssa1 0.63fF
+C592 wbs_adr_i[29] vssa1 0.63fF
+C593 wbs_dat_i[28] vssa1 0.63fF
+C594 wbs_adr_i[28] vssa1 0.63fF
+C595 wbs_dat_o[27] vssa1 0.63fF
+C596 wbs_dat_i[27] vssa1 0.63fF
+C597 wbs_adr_i[27] vssa1 0.63fF
+C598 wbs_dat_i[26] vssa1 0.63fF
+C599 wbs_adr_i[26] vssa1 0.63fF
+C600 wbs_dat_o[25] vssa1 0.63fF
+C601 wbs_dat_i[25] vssa1 0.63fF
+C602 wbs_adr_i[25] vssa1 0.63fF
+C603 wbs_dat_o[24] vssa1 0.63fF
+C604 wbs_dat_i[24] vssa1 0.63fF
+C605 wbs_adr_i[24] vssa1 0.63fF
+C606 wbs_dat_o[23] vssa1 0.63fF
+C607 wbs_dat_i[23] vssa1 0.63fF
+C608 wbs_adr_i[23] vssa1 0.63fF
+C609 wbs_dat_o[22] vssa1 0.63fF
+C610 wbs_adr_i[22] vssa1 0.63fF
+C611 wbs_dat_o[21] vssa1 0.63fF
+C612 wbs_dat_i[21] vssa1 0.63fF
+C613 wbs_adr_i[21] vssa1 0.63fF
+C614 wbs_dat_o[20] vssa1 0.63fF
+C615 wbs_dat_i[20] vssa1 0.63fF
+C616 wbs_adr_i[20] vssa1 0.63fF
+C617 wbs_dat_o[19] vssa1 0.63fF
+C618 wbs_dat_i[19] vssa1 0.63fF
+C619 wbs_adr_i[19] vssa1 0.63fF
+C620 wbs_dat_o[18] vssa1 0.63fF
+C621 wbs_dat_i[18] vssa1 0.63fF
+C622 wbs_dat_o[17] vssa1 0.63fF
+C623 wbs_dat_i[17] vssa1 0.63fF
+C624 wbs_adr_i[17] vssa1 0.63fF
+C625 wbs_dat_o[16] vssa1 0.63fF
+C626 wbs_dat_i[16] vssa1 0.63fF
+C627 wbs_adr_i[16] vssa1 0.63fF
+C628 wbs_dat_o[15] vssa1 0.63fF
+C629 wbs_dat_i[15] vssa1 0.63fF
+C630 wbs_adr_i[15] vssa1 0.63fF
+C631 wbs_dat_o[14] vssa1 0.63fF
+C632 wbs_dat_i[14] vssa1 0.63fF
+C633 wbs_adr_i[14] vssa1 0.63fF
+C634 wbs_dat_o[13] vssa1 0.63fF
+C635 wbs_dat_i[13] vssa1 0.63fF
+C636 wbs_adr_i[13] vssa1 0.63fF
+C637 wbs_dat_o[12] vssa1 0.63fF
+C638 wbs_dat_i[12] vssa1 0.63fF
+C639 wbs_adr_i[12] vssa1 0.63fF
+C640 wbs_dat_i[11] vssa1 0.63fF
+C641 wbs_adr_i[11] vssa1 0.63fF
+C642 wbs_dat_o[10] vssa1 0.63fF
+C643 wbs_dat_i[10] vssa1 0.63fF
+C644 wbs_adr_i[10] vssa1 0.63fF
+C645 wbs_dat_o[9] vssa1 0.63fF
+C646 wbs_dat_i[9] vssa1 0.63fF
+C647 wbs_adr_i[9] vssa1 0.63fF
+C648 wbs_dat_o[8] vssa1 0.63fF
+C649 wbs_dat_i[8] vssa1 0.63fF
+C650 wbs_adr_i[8] vssa1 0.63fF
+C651 wbs_dat_o[7] vssa1 0.63fF
+C652 wbs_adr_i[7] vssa1 0.63fF
+C653 wbs_dat_o[6] vssa1 0.63fF
+C654 wbs_dat_i[6] vssa1 0.63fF
+C655 wbs_adr_i[6] vssa1 0.63fF
+C656 wbs_dat_o[5] vssa1 0.63fF
+C657 wbs_dat_i[5] vssa1 0.63fF
+C658 wbs_adr_i[5] vssa1 0.63fF
+C659 wbs_dat_o[4] vssa1 0.63fF
+C660 wbs_dat_i[4] vssa1 0.63fF
+C661 wbs_adr_i[4] vssa1 0.63fF
+C662 wbs_sel_i[3] vssa1 0.63fF
+C663 wbs_dat_o[3] vssa1 0.63fF
+C664 wbs_adr_i[3] vssa1 0.63fF
+C665 wbs_sel_i[2] vssa1 0.63fF
+C666 wbs_dat_o[2] vssa1 0.63fF
+C667 wbs_dat_i[2] vssa1 0.63fF
+C668 wbs_adr_i[2] vssa1 0.63fF
+C669 wbs_dat_o[1] vssa1 0.63fF
+C670 wbs_dat_i[1] vssa1 0.63fF
+C671 wbs_adr_i[1] vssa1 0.63fF
+C672 wbs_sel_i[0] vssa1 0.63fF
+C673 wbs_dat_o[0] vssa1 0.63fF
+C674 wbs_dat_i[0] vssa1 0.63fF
+C675 wbs_adr_i[0] vssa1 0.63fF
+C676 wbs_we_i vssa1 0.63fF
+C677 wbs_stb_i vssa1 0.63fF
+C678 wbs_cyc_i vssa1 0.63fF
+C679 wbs_ack_o vssa1 0.63fF
+C680 wb_rst_i vssa1 0.63fF
+C681 m3_226242_702300# vssa1 -1.31fF $ **FLOATING
+C682 m3_222594_702300# vssa1 0.55fF $ **FLOATING
+C683 top_pll_v2_0/PFD_0/and_pfd_0/a_656_410# vssa1 0.96fF
+C684 top_pll_v2_0/PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_63_n45# vssa1 0.05fF
+C685 top_pll_v2_0/PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_n129_n45# vssa1 0.05fF
+C686 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C687 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_2/B vssa1 1.40fF
+C688 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C689 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_3/A vssa1 3.14fF
+C690 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C691 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C692 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_2/A vssa1 2.55fF
+C693 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C694 top_pll_v2_0/QB vssa1 4.35fF
+C695 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C696 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C697 top_pll_v2_0/PFD_0/dff_pfd_1/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C698 top_pll_v2_0/out_div_by_5 vssa1 -0.40fF
+C699 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C700 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_2/B vssa1 1.40fF
+C701 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C702 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_3/A vssa1 3.14fF
+C703 top_pll_v2_0/pfd_reset vssa1 2.17fF
+C704 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C705 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C706 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_2/A vssa1 2.55fF
+C707 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C708 top_pll_v2_0/QA vssa1 4.22fF
+C709 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C710 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C711 top_pll_v2_0/PFD_0/dff_pfd_0/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C712 top_pll_v2_0/pfd_cp_interface_0/inverter_cp_x1_2/in vssa1 1.85fF
+C713 top_pll_v2_0/pfd_cp_interface_0/inverter_cp_x1_0/out vssa1 1.77fF
+C714 top_pll_v2_0/nUp vssa1 5.39fF
+C715 top_pll_v2_0/Up vssa1 1.85fF
+C716 top_pll_v2_0/Down vssa1 6.19fF
+C717 top_pll_v2_0/nDown vssa1 -3.53fF
+C718 top_pll_v2_0/div_by_5_0/sky130_fd_sc_hs__or2_1_0/a_63_368# vssa1 0.37fF
+C719 top_pll_v2_0/div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_56_136# vssa1 0.38fF
+C720 top_pll_v2_0/div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# vssa1 0.38fF
+C721 top_pll_v2_0/div_by_5_0/DFlipFlop_3/nQ vssa1 0.48fF
+C722 top_pll_v2_0/div_5_Q1_shift vssa1 -0.14fF
+C723 top_pll_v2_0/div_by_5_0/DFlipFlop_3/latch_diff_1/m1_657_280# vssa1 0.57fF
+C724 top_pll_v2_0/div_by_5_0/DFlipFlop_3/latch_diff_1/nD vssa1 0.57fF
+C725 top_pll_v2_0/div_by_5_0/DFlipFlop_3/latch_diff_1/D vssa1 -1.73fF
+C726 top_pll_v2_0/div_by_5_0/DFlipFlop_3/latch_diff_0/m1_657_280# vssa1 0.57fF
+C727 top_pll_v2_0/div_by_5_0/DFlipFlop_3/latch_diff_0/D vssa1 0.96fF
+C728 top_pll_v2_0/div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C729 top_pll_v2_0/div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C730 top_pll_v2_0/div_by_5_0/DFlipFlop_3/latch_diff_0/nD vssa1 1.14fF
+C731 top_pll_v2_0/div_by_5_0/DFlipFlop_2/nQ vssa1 0.48fF
+C732 top_pll_v2_0/div_5_Q1 vssa1 4.25fF
+C733 top_pll_v2_0/div_by_5_0/DFlipFlop_2/latch_diff_1/m1_657_280# vssa1 0.57fF
+C734 top_pll_v2_0/div_by_5_0/DFlipFlop_2/latch_diff_1/nD vssa1 0.57fF
+C735 top_pll_v2_0/div_by_5_0/DFlipFlop_2/latch_diff_1/D vssa1 -1.73fF
+C736 top_pll_v2_0/div_by_5_0/DFlipFlop_2/latch_diff_0/m1_657_280# vssa1 0.57fF
+C737 top_pll_v2_0/div_by_5_0/DFlipFlop_2/latch_diff_0/D vssa1 0.96fF
+C738 top_pll_v2_0/div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C739 top_pll_v2_0/div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C740 top_pll_v2_0/div_by_5_0/DFlipFlop_2/D vssa1 3.13fF
+C741 top_pll_v2_0/div_by_5_0/DFlipFlop_2/latch_diff_0/nD vssa1 1.14fF
+C742 top_pll_v2_0/div_5_nQ0 vssa1 0.59fF
+C743 top_pll_v2_0/div_5_Q0 vssa1 0.01fF
+C744 top_pll_v2_0/div_by_5_0/DFlipFlop_1/latch_diff_1/m1_657_280# vssa1 0.57fF
+C745 top_pll_v2_0/div_by_5_0/DFlipFlop_1/latch_diff_1/nD vssa1 0.57fF
+C746 top_pll_v2_0/div_by_5_0/DFlipFlop_1/latch_diff_1/D vssa1 -1.73fF
+C747 top_pll_v2_0/div_by_5_0/DFlipFlop_1/latch_diff_0/m1_657_280# vssa1 0.57fF
+C748 top_pll_v2_0/div_by_5_0/DFlipFlop_1/latch_diff_0/D vssa1 0.96fF
+C749 top_pll_v2_0/div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C750 top_pll_v2_0/div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C751 top_pll_v2_0/div_by_5_0/DFlipFlop_1/D vssa1 3.64fF
+C752 top_pll_v2_0/div_by_5_0/DFlipFlop_1/latch_diff_0/nD vssa1 1.14fF
+C753 top_pll_v2_0/div_5_nQ2 vssa1 1.24fF
+C754 top_pll_v2_0/div_by_5_0/DFlipFlop_0/Q vssa1 -0.94fF
+C755 top_pll_v2_0/div_by_5_0/DFlipFlop_0/latch_diff_1/m1_657_280# vssa1 0.57fF
+C756 top_pll_v2_0/n_out_by_2 vssa1 -2.75fF
+C757 top_pll_v2_0/div_by_5_0/DFlipFlop_0/latch_diff_1/nD vssa1 0.57fF
+C758 top_pll_v2_0/div_by_5_0/DFlipFlop_0/latch_diff_1/D vssa1 -1.73fF
+C759 top_pll_v2_0/div_by_5_0/DFlipFlop_0/latch_diff_0/m1_657_280# vssa1 0.57fF
+C760 top_pll_v2_0/out_by_2 vssa1 -5.01fF
+C761 top_pll_v2_0/div_by_5_0/DFlipFlop_0/latch_diff_0/D vssa1 0.96fF
+C762 top_pll_v2_0/div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C763 top_pll_v2_0/div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C764 top_pll_v2_0/div_by_5_0/DFlipFlop_0/D vssa1 3.96fF
+C765 top_pll_v2_0/div_by_5_0/DFlipFlop_0/latch_diff_0/nD vssa1 1.14fF
+C766 top_pll_v2_0/div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_355_368# vssa1 0.08fF
+C767 top_pll_v2_0/div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_194_125# vssa1 0.40fF
+C768 top_pll_v2_0/out_to_buffer vssa1 1.54fF
+C769 top_pll_v2_0/out_to_div vssa1 4.23fF
+C770 top_pll_v2_0/out_first_buffer vssa1 2.88fF
+C771 top_pll_v2_0/ring_osc_0/csvco_branch_2/in vssa1 1.60fF
+C772 top_pll_v2_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd vssa1 0.16fF
+C773 top_pll_v2_0/ring_osc_0/csvco_branch_1/cap_vco_0/t vssa1 7.10fF
+C774 top_pll_v2_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vss vssa1 0.52fF
+C775 top_pll_v2_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd vssa1 0.16fF
+C776 top_pll_v2_0/ring_osc_0/csvco_branch_2/cap_vco_0/t vssa1 7.10fF
+C777 top_pll_v2_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vss vssa1 0.52fF
+C778 top_pll_v2_0/ring_osc_0/csvco_branch_1/in vssa1 1.58fF
+C779 top_pll_v2_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd vssa1 0.16fF
+C780 top_pll_v2_0/vco_out vssa1 1.01fF
+C781 top_pll_v2_0/ring_osc_0/csvco_branch_0/cap_vco_0/t vssa1 7.10fF
+C782 top_pll_v2_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vss vssa1 0.52fF
+C783 top_pll_v2_0/ring_osc_0/csvco_branch_2/vbp vssa1 0.36fF
+C784 io_analog[8] vssa1 13.78fF
+C785 top_pll_v2_0/buffer_salida_0/a_3996_n100# vssa1 48.23fF
+C786 top_pll_v2_0/buffer_salida_0/a_678_n100# vssa1 13.21fF
+C787 top_pll_v2_0/n_out_buffer_div_2 vssa1 1.63fF
+C788 top_pll_v2_0/out_buffer_div_2 vssa1 1.60fF
+C789 top_pll_v2_0/div_by_2_0/DFlipFlop_0/CLK vssa1 0.31fF
+C790 top_pll_v2_0/div_by_2_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C791 top_pll_v2_0/div_by_2_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C792 top_pll_v2_0/div_by_2_0/DFlipFlop_0/nCLK vssa1 1.03fF
+C793 top_pll_v2_0/out_div_2 vssa1 -1.30fF
+C794 top_pll_v2_0/div_by_2_0/DFlipFlop_0/latch_diff_1/m1_657_280# vssa1 0.57fF
+C795 top_pll_v2_0/div_by_2_0/DFlipFlop_0/latch_diff_1/nD vssa1 0.57fF
+C796 top_pll_v2_0/div_by_2_0/DFlipFlop_0/latch_diff_1/D vssa1 -1.73fF
+C797 top_pll_v2_0/div_by_2_0/DFlipFlop_0/latch_diff_0/m1_657_280# vssa1 0.57fF
+C798 top_pll_v2_0/div_by_2_0/DFlipFlop_0/latch_diff_0/D vssa1 0.96fF
+C799 top_pll_v2_0/div_by_2_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C800 top_pll_v2_0/div_by_2_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C801 top_pll_v2_0/n_out_div_2 vssa1 1.95fF
+C802 top_pll_v2_0/div_by_2_0/DFlipFlop_0/latch_diff_0/nD vssa1 1.14fF
+C803 top_pll_v2_0/lf_vc vssa1 -59.89fF
+C804 top_pll_v2_0/loop_filter_v2_0/res_loop_filter_2/out vssa1 7.90fF
+C805 gpio_noesd[8] vssa1 210.79fF
+C806 top_pll_v2_0/loop_filter_v2_0/cap3_loop_filter_0/in vssa1 -12.03fF
+C807 top_pll_v2_0/nswitch vssa1 3.73fF
+C808 top_pll_v2_0/biasp vssa1 5.44fF
+C809 bias_0/iref_1 vssa1 -93.46fF
+C810 top_pll_v2_0/vco_vctrl vssa1 -20.08fF
+C811 top_pll_v2_0/pswitch vssa1 3.57fF
+C812 bias_0/iref_4 vssa1 1.17fF
+C813 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_4/a_n1731_n1219# vssa1 2.60fF
+C814 bias_0/iref_3 vssa1 0.64fF
+C815 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_3/a_n1731_n1219# vssa1 2.60fF
+C816 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_2/a_n1731_n1219# vssa1 2.60fF
+C817 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_1/a_n1731_n1219# vssa1 2.60fF
+C818 io_analog[5] vssa1 33.29fF
+C819 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_0/a_n1731_n1219# vssa1 2.60fF
+C820 bias_0/m1_20168_984# vssa1 56.92fF
+C821 bias_0/iref_9 vssa1 -1.13fF
+C822 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_10/a_n1731_n1219# vssa1 2.60fF
+C823 bias_0/iref_7 vssa1 -1.38fF
+C824 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_8/a_n1731_n1219# vssa1 2.60fF
+C825 bias_0/iref_8 vssa1 -1.19fF
+C826 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_9/a_n1731_n1219# vssa1 2.60fF
+C827 bias_0/iref_6 vssa1 -1.00fF
+C828 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_7/a_n1731_n1219# vssa1 2.60fF
+C829 bias_0/iref_5 vssa1 1.40fF
+C830 bias_0/sky130_fd_pr__pfet_01v8_lvt_8P223X_6/a_n1731_n1219# vssa1 2.60fF
+C831 top_pll_v1_1/PFD_0/and_pfd_0/a_656_410# vssa1 0.96fF
+C832 top_pll_v1_1/PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_63_n45# vssa1 0.05fF
+C833 top_pll_v1_1/PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_n129_n45# vssa1 0.05fF
+C834 top_pll_v1_1/PFD_0/dff_pfd_1/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C835 top_pll_v1_1/PFD_0/dff_pfd_1/nor_pfd_2/B vssa1 1.40fF
+C836 top_pll_v1_1/PFD_0/dff_pfd_1/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C837 top_pll_v1_1/PFD_0/dff_pfd_1/nor_pfd_3/A vssa1 3.14fF
+C838 top_pll_v1_1/PFD_0/dff_pfd_1/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C839 top_pll_v1_1/PFD_0/dff_pfd_1/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C840 top_pll_v1_1/PFD_0/dff_pfd_1/nor_pfd_2/A vssa1 2.55fF
+C841 top_pll_v1_1/PFD_0/dff_pfd_1/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C842 top_pll_v1_1/QB vssa1 4.35fF
+C843 top_pll_v1_1/PFD_0/dff_pfd_1/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C844 top_pll_v1_1/PFD_0/dff_pfd_1/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C845 top_pll_v1_1/PFD_0/dff_pfd_1/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C846 top_pll_v1_1/out_div_by_5 vssa1 -0.40fF
+C847 top_pll_v1_1/PFD_0/dff_pfd_0/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C848 top_pll_v1_1/PFD_0/dff_pfd_0/nor_pfd_2/B vssa1 1.40fF
+C849 top_pll_v1_1/PFD_0/dff_pfd_0/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C850 top_pll_v1_1/PFD_0/dff_pfd_0/nor_pfd_3/A vssa1 3.14fF
+C851 top_pll_v1_1/pfd_reset vssa1 2.17fF
+C852 top_pll_v1_1/PFD_0/dff_pfd_0/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C853 top_pll_v1_1/PFD_0/dff_pfd_0/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C854 top_pll_v1_1/PFD_0/dff_pfd_0/nor_pfd_2/A vssa1 2.55fF
+C855 top_pll_v1_1/PFD_0/dff_pfd_0/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C856 top_pll_v1_1/QA vssa1 4.22fF
+C857 top_pll_v1_1/PFD_0/dff_pfd_0/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C858 top_pll_v1_1/PFD_0/dff_pfd_0/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C859 top_pll_v1_1/PFD_0/dff_pfd_0/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C860 io_analog[10] vssa1 503.33fF
+C861 top_pll_v1_1/pfd_cp_interface_0/inverter_cp_x1_2/in vssa1 1.85fF
+C862 top_pll_v1_1/pfd_cp_interface_0/inverter_cp_x1_0/out vssa1 1.77fF
+C863 top_pll_v1_1/nUp vssa1 5.39fF
+C864 top_pll_v1_1/Up vssa1 1.85fF
+C865 top_pll_v1_1/Down vssa1 6.19fF
+C866 top_pll_v1_1/nDown vssa1 -3.53fF
+C867 top_pll_v1_1/div_by_5_0/sky130_fd_sc_hs__or2_1_0/a_63_368# vssa1 0.37fF
+C868 top_pll_v1_1/div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_56_136# vssa1 0.38fF
+C869 top_pll_v1_1/div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# vssa1 0.38fF
+C870 top_pll_v1_1/div_by_5_0/DFlipFlop_3/nQ vssa1 0.48fF
+C871 top_pll_v1_1/div_5_Q1_shift vssa1 -0.14fF
+C872 top_pll_v1_1/div_by_5_0/DFlipFlop_3/latch_diff_1/m1_657_280# vssa1 0.57fF
+C873 top_pll_v1_1/div_by_5_0/DFlipFlop_3/latch_diff_1/nD vssa1 0.57fF
+C874 top_pll_v1_1/div_by_5_0/DFlipFlop_3/latch_diff_1/D vssa1 -1.73fF
+C875 top_pll_v1_1/div_by_5_0/DFlipFlop_3/latch_diff_0/m1_657_280# vssa1 0.57fF
+C876 top_pll_v1_1/div_by_5_0/DFlipFlop_3/latch_diff_0/D vssa1 0.96fF
+C877 top_pll_v1_1/div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C878 top_pll_v1_1/div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C879 top_pll_v1_1/div_by_5_0/DFlipFlop_3/latch_diff_0/nD vssa1 1.14fF
+C880 top_pll_v1_1/div_by_5_0/DFlipFlop_2/nQ vssa1 0.48fF
+C881 top_pll_v1_1/div_5_Q1 vssa1 4.25fF
+C882 top_pll_v1_1/div_by_5_0/DFlipFlop_2/latch_diff_1/m1_657_280# vssa1 0.57fF
+C883 top_pll_v1_1/div_by_5_0/DFlipFlop_2/latch_diff_1/nD vssa1 0.57fF
+C884 top_pll_v1_1/div_by_5_0/DFlipFlop_2/latch_diff_1/D vssa1 -1.73fF
+C885 top_pll_v1_1/div_by_5_0/DFlipFlop_2/latch_diff_0/m1_657_280# vssa1 0.57fF
+C886 top_pll_v1_1/div_by_5_0/DFlipFlop_2/latch_diff_0/D vssa1 0.96fF
+C887 top_pll_v1_1/div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C888 top_pll_v1_1/div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C889 top_pll_v1_1/div_by_5_0/DFlipFlop_2/D vssa1 3.13fF
+C890 top_pll_v1_1/div_by_5_0/DFlipFlop_2/latch_diff_0/nD vssa1 1.14fF
+C891 top_pll_v1_1/div_5_nQ0 vssa1 0.59fF
+C892 top_pll_v1_1/div_5_Q0 vssa1 0.01fF
+C893 top_pll_v1_1/div_by_5_0/DFlipFlop_1/latch_diff_1/m1_657_280# vssa1 0.57fF
+C894 top_pll_v1_1/div_by_5_0/DFlipFlop_1/latch_diff_1/nD vssa1 0.57fF
+C895 top_pll_v1_1/div_by_5_0/DFlipFlop_1/latch_diff_1/D vssa1 -1.73fF
+C896 top_pll_v1_1/div_by_5_0/DFlipFlop_1/latch_diff_0/m1_657_280# vssa1 0.57fF
+C897 top_pll_v1_1/div_by_5_0/DFlipFlop_1/latch_diff_0/D vssa1 0.96fF
+C898 top_pll_v1_1/div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C899 top_pll_v1_1/div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C900 top_pll_v1_1/div_by_5_0/DFlipFlop_1/D vssa1 3.64fF
+C901 top_pll_v1_1/div_by_5_0/DFlipFlop_1/latch_diff_0/nD vssa1 1.14fF
+C902 top_pll_v1_1/div_5_nQ2 vssa1 1.24fF
+C903 top_pll_v1_1/div_by_5_0/DFlipFlop_0/Q vssa1 -0.94fF
+C904 top_pll_v1_1/div_by_5_0/DFlipFlop_0/latch_diff_1/m1_657_280# vssa1 0.57fF
+C905 top_pll_v1_1/n_out_by_2 vssa1 -2.75fF
+C906 top_pll_v1_1/div_by_5_0/DFlipFlop_0/latch_diff_1/nD vssa1 0.57fF
+C907 top_pll_v1_1/div_by_5_0/DFlipFlop_0/latch_diff_1/D vssa1 -1.73fF
+C908 top_pll_v1_1/div_by_5_0/DFlipFlop_0/latch_diff_0/m1_657_280# vssa1 0.57fF
+C909 top_pll_v1_1/out_by_2 vssa1 -5.01fF
+C910 top_pll_v1_1/div_by_5_0/DFlipFlop_0/latch_diff_0/D vssa1 0.96fF
+C911 top_pll_v1_1/div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C912 top_pll_v1_1/div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C913 top_pll_v1_1/div_by_5_0/DFlipFlop_0/D vssa1 3.96fF
+C914 top_pll_v1_1/div_by_5_0/DFlipFlop_0/latch_diff_0/nD vssa1 1.14fF
+C915 top_pll_v1_1/div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_355_368# vssa1 0.08fF
+C916 top_pll_v1_1/div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_194_125# vssa1 0.40fF
+C917 top_pll_v1_1/out_to_buffer vssa1 1.54fF
+C918 top_pll_v1_1/out_to_div vssa1 4.23fF
+C919 top_pll_v1_1/out_first_buffer vssa1 2.88fF
+C920 top_pll_v1_1/ring_osc_0/csvco_branch_2/in vssa1 1.60fF
+C921 top_pll_v1_1/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd vssa1 0.16fF
+C922 top_pll_v1_1/ring_osc_0/csvco_branch_1/cap_vco_0/t vssa1 7.10fF
+C923 top_pll_v1_1/ring_osc_0/csvco_branch_1/inverter_csvco_0/vss vssa1 0.52fF
+C924 top_pll_v1_1/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd vssa1 0.16fF
+C925 top_pll_v1_1/ring_osc_0/csvco_branch_2/cap_vco_0/t vssa1 7.10fF
+C926 top_pll_v1_1/ring_osc_0/csvco_branch_2/inverter_csvco_0/vss vssa1 0.52fF
+C927 top_pll_v1_1/ring_osc_0/csvco_branch_1/in vssa1 1.58fF
+C928 top_pll_v1_1/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd vssa1 0.16fF
+C929 top_pll_v1_1/vco_out vssa1 1.01fF
+C930 top_pll_v1_1/ring_osc_0/csvco_branch_0/cap_vco_0/t vssa1 7.10fF
+C931 top_pll_v1_1/ring_osc_0/csvco_branch_0/inverter_csvco_0/vss vssa1 0.52fF
+C932 top_pll_v1_1/ring_osc_0/csvco_branch_2/vbp vssa1 0.36fF
+C933 io_analog[7] vssa1 24.61fF
+C934 top_pll_v1_1/buffer_salida_0/a_3996_n100# vssa1 48.11fF
+C935 top_pll_v1_1/buffer_salida_0/a_678_n100# vssa1 13.21fF
+C936 top_pll_v1_1/n_out_buffer_div_2 vssa1 1.63fF
+C937 top_pll_v1_1/out_buffer_div_2 vssa1 1.60fF
+C938 top_pll_v1_1/div_by_2_0/DFlipFlop_0/CLK vssa1 0.31fF
+C939 top_pll_v1_1/div_by_2_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C940 top_pll_v1_1/div_by_2_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C941 top_pll_v1_1/div_by_2_0/DFlipFlop_0/nCLK vssa1 1.03fF
+C942 top_pll_v1_1/out_div_2 vssa1 -1.30fF
+C943 top_pll_v1_1/div_by_2_0/DFlipFlop_0/latch_diff_1/m1_657_280# vssa1 0.57fF
+C944 top_pll_v1_1/div_by_2_0/DFlipFlop_0/latch_diff_1/nD vssa1 0.57fF
+C945 top_pll_v1_1/div_by_2_0/DFlipFlop_0/latch_diff_1/D vssa1 -1.73fF
+C946 top_pll_v1_1/div_by_2_0/DFlipFlop_0/latch_diff_0/m1_657_280# vssa1 0.57fF
+C947 top_pll_v1_1/div_by_2_0/DFlipFlop_0/latch_diff_0/D vssa1 0.96fF
+C948 top_pll_v1_1/div_by_2_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C949 top_pll_v1_1/div_by_2_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C950 top_pll_v1_1/n_out_div_2 vssa1 1.95fF
+C951 top_pll_v1_1/div_by_2_0/DFlipFlop_0/latch_diff_0/nD vssa1 1.14fF
+C952 top_pll_v1_1/nswitch vssa1 3.73fF
+C953 top_pll_v1_1/biasp vssa1 5.44fF
+C954 bias_0/iref_0 vssa1 -81.35fF
+C955 top_pll_v1_1/vco_vctrl vssa1 -18.17fF
+C956 top_pll_v1_1/pswitch vssa1 3.57fF
+C957 top_pll_v1_1/lf_vc vssa1 -59.89fF
+C958 top_pll_v1_1/loop_filter_0/res_loop_filter_2/out vssa1 7.90fF
+C959 top_pll_v1_0/PFD_0/and_pfd_0/a_656_410# vssa1 0.96fF
+C960 top_pll_v1_0/PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_63_n45# vssa1 0.05fF
+C961 top_pll_v1_0/PFD_0/and_pfd_0/sky130_fd_pr__nfet_01v8_ZCYAJJ_0/a_n129_n45# vssa1 0.05fF
+C962 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C963 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_2/B vssa1 1.40fF
+C964 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C965 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_3/A vssa1 3.14fF
+C966 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C967 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C968 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_2/A vssa1 2.55fF
+C969 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C970 top_pll_v1_0/QB vssa1 4.35fF
+C971 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C972 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C973 top_pll_v1_0/PFD_0/dff_pfd_1/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C974 top_pll_v1_0/out_div_by_5 vssa1 -0.40fF
+C975 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C976 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_2/B vssa1 1.40fF
+C977 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_3/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C978 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_3/A vssa1 3.14fF
+C979 top_pll_v1_0/pfd_reset vssa1 2.17fF
+C980 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C981 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_2/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C982 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_2/A vssa1 2.55fF
+C983 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C984 top_pll_v1_0/QA vssa1 4.22fF
+C985 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_1/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C986 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_63_n90# vssa1 0.03fF
+C987 top_pll_v1_0/PFD_0/dff_pfd_0/nor_pfd_0/sky130_fd_pr__pfet_01v8_4F35BC_0/a_n129_n90# vssa1 0.03fF
+C988 top_pll_v1_0/pfd_cp_interface_0/inverter_cp_x1_2/in vssa1 1.85fF
+C989 top_pll_v1_0/pfd_cp_interface_0/inverter_cp_x1_0/out vssa1 1.77fF
+C990 top_pll_v1_0/nUp vssa1 5.39fF
+C991 top_pll_v1_0/Up vssa1 1.85fF
+C992 top_pll_v1_0/Down vssa1 6.19fF
+C993 top_pll_v1_0/nDown vssa1 -3.53fF
+C994 top_pll_v1_0/div_by_5_0/sky130_fd_sc_hs__or2_1_0/a_63_368# vssa1 0.37fF
+C995 top_pll_v1_0/div_by_5_0/sky130_fd_sc_hs__and2_1_1/a_56_136# vssa1 0.38fF
+C996 top_pll_v1_0/div_by_5_0/sky130_fd_sc_hs__and2_1_0/a_56_136# vssa1 0.38fF
+C997 top_pll_v1_0/div_by_5_0/DFlipFlop_3/nQ vssa1 0.48fF
+C998 top_pll_v1_0/div_5_Q1_shift vssa1 -0.14fF
+C999 top_pll_v1_0/div_by_5_0/DFlipFlop_3/latch_diff_1/m1_657_280# vssa1 0.57fF
+C1000 top_pll_v1_0/div_by_5_0/DFlipFlop_3/latch_diff_1/nD vssa1 0.57fF
+C1001 top_pll_v1_0/div_by_5_0/DFlipFlop_3/latch_diff_1/D vssa1 -1.73fF
+C1002 top_pll_v1_0/div_by_5_0/DFlipFlop_3/latch_diff_0/m1_657_280# vssa1 0.57fF
+C1003 top_pll_v1_0/div_by_5_0/DFlipFlop_3/latch_diff_0/D vssa1 0.96fF
+C1004 top_pll_v1_0/div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C1005 top_pll_v1_0/div_by_5_0/DFlipFlop_3/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C1006 top_pll_v1_0/div_by_5_0/DFlipFlop_3/latch_diff_0/nD vssa1 1.14fF
+C1007 top_pll_v1_0/div_by_5_0/DFlipFlop_2/nQ vssa1 0.48fF
+C1008 top_pll_v1_0/div_5_Q1 vssa1 4.25fF
+C1009 top_pll_v1_0/div_by_5_0/DFlipFlop_2/latch_diff_1/m1_657_280# vssa1 0.57fF
+C1010 top_pll_v1_0/div_by_5_0/DFlipFlop_2/latch_diff_1/nD vssa1 0.57fF
+C1011 top_pll_v1_0/div_by_5_0/DFlipFlop_2/latch_diff_1/D vssa1 -1.73fF
+C1012 top_pll_v1_0/div_by_5_0/DFlipFlop_2/latch_diff_0/m1_657_280# vssa1 0.57fF
+C1013 top_pll_v1_0/div_by_5_0/DFlipFlop_2/latch_diff_0/D vssa1 0.96fF
+C1014 top_pll_v1_0/div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C1015 top_pll_v1_0/div_by_5_0/DFlipFlop_2/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C1016 top_pll_v1_0/div_by_5_0/DFlipFlop_2/D vssa1 3.13fF
+C1017 top_pll_v1_0/div_by_5_0/DFlipFlop_2/latch_diff_0/nD vssa1 1.14fF
+C1018 top_pll_v1_0/div_5_nQ0 vssa1 0.59fF
+C1019 top_pll_v1_0/div_5_Q0 vssa1 0.01fF
+C1020 top_pll_v1_0/div_by_5_0/DFlipFlop_1/latch_diff_1/m1_657_280# vssa1 0.57fF
+C1021 top_pll_v1_0/div_by_5_0/DFlipFlop_1/latch_diff_1/nD vssa1 0.57fF
+C1022 top_pll_v1_0/div_by_5_0/DFlipFlop_1/latch_diff_1/D vssa1 -1.73fF
+C1023 top_pll_v1_0/div_by_5_0/DFlipFlop_1/latch_diff_0/m1_657_280# vssa1 0.57fF
+C1024 top_pll_v1_0/div_by_5_0/DFlipFlop_1/latch_diff_0/D vssa1 0.96fF
+C1025 top_pll_v1_0/div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C1026 top_pll_v1_0/div_by_5_0/DFlipFlop_1/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C1027 top_pll_v1_0/div_by_5_0/DFlipFlop_1/D vssa1 3.64fF
+C1028 top_pll_v1_0/div_by_5_0/DFlipFlop_1/latch_diff_0/nD vssa1 1.14fF
+C1029 top_pll_v1_0/div_5_nQ2 vssa1 1.24fF
+C1030 top_pll_v1_0/div_by_5_0/DFlipFlop_0/Q vssa1 -0.94fF
+C1031 top_pll_v1_0/div_by_5_0/DFlipFlop_0/latch_diff_1/m1_657_280# vssa1 0.57fF
+C1032 top_pll_v1_0/n_out_by_2 vssa1 -2.75fF
+C1033 top_pll_v1_0/div_by_5_0/DFlipFlop_0/latch_diff_1/nD vssa1 0.57fF
+C1034 top_pll_v1_0/div_by_5_0/DFlipFlop_0/latch_diff_1/D vssa1 -1.73fF
+C1035 top_pll_v1_0/div_by_5_0/DFlipFlop_0/latch_diff_0/m1_657_280# vssa1 0.57fF
+C1036 top_pll_v1_0/out_by_2 vssa1 -5.01fF
+C1037 top_pll_v1_0/div_by_5_0/DFlipFlop_0/latch_diff_0/D vssa1 0.96fF
+C1038 top_pll_v1_0/div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C1039 top_pll_v1_0/div_by_5_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C1040 top_pll_v1_0/div_by_5_0/DFlipFlop_0/D vssa1 3.96fF
+C1041 top_pll_v1_0/div_by_5_0/DFlipFlop_0/latch_diff_0/nD vssa1 1.14fF
+C1042 vdda1 vssa1 6838.97fF
+C1043 top_pll_v1_0/div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_355_368# vssa1 0.08fF
+C1044 top_pll_v1_0/div_by_5_0/sky130_fd_sc_hs__xor2_1_0/a_194_125# vssa1 0.40fF
+C1045 top_pll_v1_0/out_to_buffer vssa1 1.54fF
+C1046 top_pll_v1_0/out_to_div vssa1 4.23fF
+C1047 top_pll_v1_0/out_first_buffer vssa1 2.88fF
+C1048 top_pll_v1_0/ring_osc_0/csvco_branch_2/in vssa1 1.60fF
+C1049 top_pll_v1_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vdd vssa1 0.16fF
+C1050 top_pll_v1_0/ring_osc_0/csvco_branch_1/cap_vco_0/t vssa1 7.10fF
+C1051 top_pll_v1_0/ring_osc_0/csvco_branch_1/inverter_csvco_0/vss vssa1 0.52fF
+C1052 top_pll_v1_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vdd vssa1 0.16fF
+C1053 top_pll_v1_0/ring_osc_0/csvco_branch_2/cap_vco_0/t vssa1 7.10fF
+C1054 top_pll_v1_0/ring_osc_0/csvco_branch_2/inverter_csvco_0/vss vssa1 0.52fF
+C1055 top_pll_v1_0/ring_osc_0/csvco_branch_1/in vssa1 1.58fF
+C1056 top_pll_v1_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vdd vssa1 0.16fF
+C1057 top_pll_v1_0/vco_out vssa1 1.01fF
+C1058 gpio_noesd[7] vssa1 272.21fF
+C1059 top_pll_v1_0/ring_osc_0/csvco_branch_0/cap_vco_0/t vssa1 7.10fF
+C1060 top_pll_v1_0/ring_osc_0/csvco_branch_0/inverter_csvco_0/vss vssa1 0.52fF
+C1061 top_pll_v1_0/ring_osc_0/csvco_branch_2/vbp vssa1 0.36fF
+C1062 io_analog[9] vssa1 7.89fF
+C1063 top_pll_v1_0/buffer_salida_0/a_3996_n100# vssa1 48.23fF
+C1064 top_pll_v1_0/buffer_salida_0/a_678_n100# vssa1 13.21fF
+C1065 top_pll_v1_0/n_out_buffer_div_2 vssa1 1.63fF
+C1066 top_pll_v1_0/out_buffer_div_2 vssa1 1.60fF
+C1067 top_pll_v1_0/div_by_2_0/DFlipFlop_0/CLK vssa1 0.31fF
+C1068 top_pll_v1_0/div_by_2_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C1069 top_pll_v1_0/div_by_2_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C1070 top_pll_v1_0/div_by_2_0/DFlipFlop_0/nCLK vssa1 1.03fF
+C1071 top_pll_v1_0/out_div_2 vssa1 -1.30fF
+C1072 top_pll_v1_0/div_by_2_0/DFlipFlop_0/latch_diff_1/m1_657_280# vssa1 0.57fF
+C1073 top_pll_v1_0/div_by_2_0/DFlipFlop_0/latch_diff_1/nD vssa1 0.57fF
+C1074 top_pll_v1_0/div_by_2_0/DFlipFlop_0/latch_diff_1/D vssa1 -1.73fF
+C1075 top_pll_v1_0/div_by_2_0/DFlipFlop_0/latch_diff_0/m1_657_280# vssa1 0.57fF
+C1076 top_pll_v1_0/div_by_2_0/DFlipFlop_0/latch_diff_0/D vssa1 0.96fF
+C1077 top_pll_v1_0/div_by_2_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_2/in vssa1 1.86fF
+C1078 top_pll_v1_0/div_by_2_0/DFlipFlop_0/clock_inverter_0/inverter_cp_x1_0/out vssa1 1.76fF
+C1079 top_pll_v1_0/n_out_div_2 vssa1 1.95fF
+C1080 top_pll_v1_0/div_by_2_0/DFlipFlop_0/latch_diff_0/nD vssa1 1.14fF
+C1081 top_pll_v1_0/nswitch vssa1 3.73fF
+C1082 top_pll_v1_0/biasp vssa1 5.44fF
+C1083 bias_0/iref_2 vssa1 -186.53fF
+C1084 top_pll_v1_0/vco_vctrl vssa1 -18.17fF
+C1085 top_pll_v1_0/pswitch vssa1 3.57fF
+C1086 top_pll_v1_0/lf_vc vssa1 -59.89fF
+C1087 top_pll_v1_0/loop_filter_0/res_loop_filter_2/out vssa1 7.90fF
.ends
diff --git a/mag/user_analog_project_wrapper.mag b/mag/user_analog_project_wrapper.mag
index 9437f5b..19b388a 100644
--- a/mag/user_analog_project_wrapper.mag
+++ b/mag/user_analog_project_wrapper.mag
@@ -1,7 +1,7 @@
magic
tech sky130A
magscale 1 2
-timestamp 1624385832
+timestamp 1624376995
<< nwell >>
rect 14730 660108 64962 661110
rect 14730 660034 64841 660108
@@ -66,6 +66,8 @@
rect 124778 660180 132540 660424
rect 132540 660180 132556 660424
<< metal1 >>
+rect 202956 687835 202966 688225
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rect 207113 687795 207123 688222
rect 210595 687795 210605 688222
rect 211166 687819 211176 688246
@@ -123,6 +125,8 @@
rect 119074 659953 119177 660062
rect 125643 660015 133067 660062
rect 112601 659944 119177 659953
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rect 12990 659376 14703 659415
rect 12990 659103 13065 659376
rect 14624 659270 14703 659376
@@ -144,7 +148,12 @@
rect 68582 657870 68592 657999
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rect 21150 657532 21160 657665
@@ -161,25 +170,45 @@
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rect 126700 657529 126710 657669
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+rect 205405 651403 208245 652403
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rect 124847 637057 124857 637281
rect 125442 637057 125452 637281
<< via1 >>
+rect 202966 687835 206549 688225
rect 207123 687795 210595 688222
rect 211176 687819 214648 688246
rect 223060 687834 226864 688186
@@ -224,20 +253,34 @@
rect 132556 660180 133038 660424
rect 120252 660106 133038 660180
rect 112657 659953 119074 660076
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rect 13065 659103 14624 659376
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rect 79848 657985 82308 658972
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rect 34979 657163 35060 657242
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rect 124336 657529 126700 657669
+rect 149997 657395 152333 658524
rect 112670 657160 112802 657243
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rect 112636 656348 112797 656533
+rect 186140 656623 186225 656702
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rect 124857 637057 125442 637281
<< metal2 >>
rect 211169 688703 214642 688713
rect 207123 688623 210596 688633
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@@ -264,6 +307,7 @@
rect 14834 660111 23042 660121
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@@ -271,6 +315,7 @@
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@@ -288,30 +333,54 @@
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@@ -320,14 +389,21 @@
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rect 144160 636927 145498 636937
+rect 152624 510676 153820 510686
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rect 368680 633573 368815 633583
-rect 1323 510540 74118 510561
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rect 74070 510260 74118 510540
rect 2171 510236 74118 510260
rect 1323 510212 74118 510236
@@ -833,6 +909,7 @@
rect 582068 -800 582180 480
rect 583250 -800 583362 480
<< via2 >>
+rect 198295 687830 199269 688219
rect 207123 688222 210596 688623
rect 207123 687795 210595 688222
rect 210595 687795 210596 688222
@@ -868,19 +945,26 @@
rect 112657 660179 119074 660332
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rect 120252 660179 124085 660445
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rect 1358 510236 2171 510538
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+rect 152624 510205 153820 510676
rect 1361 467014 2174 467316
rect 144170 467013 145472 467320
<< metal3 >>
@@ -934,6 +1018,8 @@
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rect 79826 658972 82326 697468
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@@ -1002,6 +1088,17 @@
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@@ -1033,12 +1130,29 @@
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<< metal5 >>
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rect 451976 378918 467642 540149
rect 451976 363464 452093 378918
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@@ -2019,7 +3084,13 @@
rect 338617 136461 338641 136722
rect 354383 136722 354541 151653
rect 545384 137728 561540 417276
+rect 545384 151702 561540 417276
+rect 545384 137728 545482 151702
rect 354383 136461 354407 136722
+rect 545458 136619 545482 137728
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+rect 545458 136595 561472 136619
rect 338617 136437 354407 136461
<< comment >>
rect -100 704000 584100 704100
@@ -2030,18 +3101,67 @@
timestamp 1624371743
transform 1 0 349695 0 1 630386
box -5005 -972 31038 12726
-use top_pll_v2 top_pll_v2_0
-timestamp 1624316735
-transform -1 0 133068 0 1 657248
-box -642 -33679 50180 2860
-use top_pll_v1 *top_pll_v1_0
-timestamp 1624316735
+use sky130_fd_pr__cap_mim_m3_2_2Y8F6P sky130_fd_pr__cap_mim_m3_2_2Y8F6P_0
+array 0 0 6724 0 8 6522
+timestamp 1624129585
+transform 1 0 74005 0 1 616157
+box -3351 -3261 3373 3261
+use mimcap_decoup_1x5 mimcap_decoup_1x5_0
+array 0 0 34500 0 2 6522
+timestamp 1624376995
+transform 1 0 38481 0 1 560871
+box 0 -159 34500 6363
+use mimcap_decoup_1x5 mimcap_decoup_1x5_1
+array 0 0 34500 0 2 6522
+timestamp 1624376995
+transform 1 0 126717 0 1 559996
+box 0 -159 34500 6363
+use mimcap_decoup_1x5 mimcap_decoup_1x5_2
+array 0 0 34500 0 2 6522
+timestamp 1624376995
+transform 1 0 197202 0 1 560156
+box 0 -159 34500 6363
+use sky130_fd_pr__cap_mim_m3_2_2Y8F6P sky130_fd_pr__cap_mim_m3_2_2Y8F6P_1
+array 0 0 6724 0 8 6522
+timestamp 1624129585
+transform 1 0 144463 0 1 616442
+box -3351 -3261 3373 3261
+use sky130_fd_pr__cap_mim_m3_2_2Y8F6P sky130_fd_pr__cap_mim_m3_2_2Y8F6P_2
+array 0 0 6724 0 8 6522
+timestamp 1624129585
+transform -1 0 224277 0 1 616942
+box -3351 -3261 3373 3261
+use top_pll_v1 top_pll_v1_0
+timestamp 1624049879
transform 1 0 14782 0 1 657248
box -642 -33679 50180 2860
+use top_pll_v2 *top_pll_v2_0
+timestamp 1624054096
+transform -1 0 133068 0 1 657248
+box -642 -33679 50180 2860
use bias bias_0
timestamp 1624049879
transform 1 0 202834 0 -1 687483
box -54 -412 44317 2238
+use top_pll_v1 top_pll_v1_1
+timestamp 1624049879
+transform -1 0 206380 0 1 656706
+box -642 -33679 50180 2860
+use mimcap_decoup_1x5 mimcap_decoup_1x5_5
+array 0 0 34500 0 2 6522
+timestamp 1624376995
+transform 1 0 489384 0 1 560611
+box 0 -159 34500 6363
+use mimcap_decoup_1x5 mimcap_decoup_1x5_4
+array 0 0 34500 0 2 6522
+timestamp 1624376995
+transform 1 0 382888 0 1 560156
+box 0 -159 34500 6363
+use mimcap_decoup_1x5 mimcap_decoup_1x5_3
+array 0 0 34500 0 2 6522
+timestamp 1624376995
+transform 1 0 291410 0 1 559700
+box 0 -159 34500 6363
<< labels >>
flabel metal3 s 583520 269230 584800 269342 0 FreeSans 1120 0 0 0 gpio_analog[0]
port 0 nsew signal bidirectional
diff --git a/xschem/simulations/user_analog_project_wrapper.spice b/xschem/simulations/user_analog_project_wrapper.spice
index 84bfc59..60eacf8 100644
--- a/xschem/simulations/user_analog_project_wrapper.spice
+++ b/xschem/simulations/user_analog_project_wrapper.spice
@@ -62,10 +62,22 @@
x1 iref_cp2 vssa1 vdda1 net13 net12 net6 net1 net5 io_analog[10] io_analog[9] net4 net7 net2
+ gpio_noesd[7] net11 net14 net8 net9 net3 net10 net20 net15 net27 net21 net23 net25 net24 net18 net19 net22 net17
+ net26 net16 net28 top_pll_v1
-x2 vdda1 io_analog[5] net29 iref_cp1 iref_cp2 net30 net31 net32 net33 net34 net35 net36 bias
-x3 iref_cp1 vssa1 vdda1 net49 net48 net42 net37 net41 io_analog[10] io_analog[8] net40 net43 net38
-+ gpio_noesd[7] net47 net50 net44 net45 net39 net46 net56 net51 net63 net57 net59 net61 net60 net54 net55 net58
-+ net53 net62 net52 net64 gpio_noesd[8] top_pll_v2
+x2 vdda1 io_analog[5] iref_cp0 iref_cp1 iref_cp2 net29 net30 net31 net32 net33 net34 net35 bias
+x3 iref_cp1 vssa1 vdda1 net48 net47 net41 net36 net40 io_analog[10] io_analog[8] net39 net42 net37
++ gpio_noesd[7] net46 net49 net43 net44 net38 net45 net55 net50 net62 net56 net58 net60 net59 net53 net54 net57
++ net52 net61 net51 net63 gpio_noesd[8] top_pll_v2
+x4 iref_cp0 vssa1 vdda1 net76 net75 net69 net64 net68 io_analog[10] io_analog[7] net67 net70 net65
++ gpio_noesd[7] net74 net77 net71 net72 net66 net73 net83 net78 net90 net84 net86 net88 net87 net81 net82 net85
++ net80 net89 net79 net91 top_pll_v1
+XC1 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=9 m=9
+XC2 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=9 m=9
+XC3 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=9 m=9
+XC4 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=15 m=15
+XC5 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=15 m=15
+XC6 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=15 m=15
+XC7 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=15 m=15
+XC8 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=15 m=15
+XC9 vdda1 vssa1 sky130_fd_pr__cap_mim_m3_2 W=30 L=30 MF=15 m=15
**.ends
* expanding symbol: top_pll_v1.sym # of pins=34
diff --git a/xschem/user_analog_project_wrapper.sch b/xschem/user_analog_project_wrapper.sch
index 57f18fc..1d46956 100644
--- a/xschem/user_analog_project_wrapper.sch
+++ b/xschem/user_analog_project_wrapper.sch
@@ -71,88 +71,169 @@
N 3950 -290 3990 -290 { lab=iref_cp2}
N 3780 350 3820 350 { lab=io_analog[10]}
N 3890 -110 3890 -50 { lab=io_analog[5]}
-N 4000 -330 4050 -330 { lab=#net29}
-N 3950 -330 4000 -330 { lab=#net29}
-N 4000 -270 4050 -270 { lab=#net30}
-N 3950 -270 4000 -270 { lab=#net30}
-N 4000 -250 4050 -250 { lab=#net31}
-N 3950 -250 4000 -250 { lab=#net31}
-N 4000 -230 4050 -230 { lab=#net32}
-N 3950 -230 4000 -230 { lab=#net32}
-N 4000 -210 4050 -210 { lab=#net33}
-N 3950 -210 4000 -210 { lab=#net33}
-N 4000 -190 4050 -190 { lab=#net34}
-N 3950 -190 4000 -190 { lab=#net34}
-N 4000 -170 4050 -170 { lab=#net35}
-N 3950 -170 4000 -170 { lab=#net35}
-N 4000 -150 4050 -150 { lab=#net36}
-N 3950 -150 4000 -150 { lab=#net36}
+N 4000 -270 4050 -270 { lab=#net29}
+N 3950 -270 4000 -270 { lab=#net29}
+N 4000 -250 4050 -250 { lab=#net30}
+N 3950 -250 4000 -250 { lab=#net30}
+N 4000 -230 4050 -230 { lab=#net31}
+N 3950 -230 4000 -230 { lab=#net31}
+N 4000 -210 4050 -210 { lab=#net32}
+N 3950 -210 4000 -210 { lab=#net32}
+N 4000 -190 4050 -190 { lab=#net33}
+N 3950 -190 4000 -190 { lab=#net33}
+N 4000 -170 4050 -170 { lab=#net34}
+N 3950 -170 4000 -170 { lab=#net34}
+N 4000 -150 4050 -150 { lab=#net35}
+N 3950 -150 4000 -150 { lab=#net35}
N 5660 160 5660 220 { lab=vdda1}
N 5720 160 5720 220 { lab=vssa1}
-N 5240 530 5240 580 { lab=#net37}
-N 5240 480 5240 530 { lab=#net37}
-N 5220 530 5220 580 { lab=#net38}
-N 5220 480 5220 530 { lab=#net38}
-N 5200 530 5200 580 { lab=#net39}
-N 5200 480 5200 530 { lab=#net39}
-N 5310 530 5310 580 { lab=#net40}
-N 5310 480 5310 530 { lab=#net40}
-N 5290 530 5290 580 { lab=#net41}
-N 5290 480 5290 530 { lab=#net41}
-N 5270 530 5270 580 { lab=#net42}
-N 5270 480 5270 530 { lab=#net42}
-N 5330 530 5330 580 { lab=#net43}
-N 5330 480 5330 530 { lab=#net43}
-N 5400 530 5400 580 { lab=#net44}
-N 5400 480 5400 530 { lab=#net44}
-N 5380 530 5380 580 { lab=#net45}
-N 5380 480 5380 530 { lab=#net45}
-N 5360 530 5360 580 { lab=#net46}
-N 5360 480 5360 530 { lab=#net46}
-N 5430 530 5430 580 { lab=#net47}
-N 5430 480 5430 530 { lab=#net47}
-N 5460 530 5460 580 { lab=#net48}
-N 5460 480 5460 530 { lab=#net48}
-N 5480 530 5480 580 { lab=#net49}
-N 5480 480 5480 530 { lab=#net49}
-N 5500 530 5500 580 { lab=#net50}
-N 5500 480 5500 530 { lab=#net50}
-N 5520 530 5520 580 { lab=#net51}
-N 5520 480 5520 530 { lab=#net51}
-N 5550 530 5550 580 { lab=#net52}
-N 5550 480 5550 530 { lab=#net52}
-N 5570 530 5570 580 { lab=#net53}
-N 5570 480 5570 530 { lab=#net53}
-N 5590 530 5590 580 { lab=#net54}
-N 5590 480 5590 530 { lab=#net54}
-N 5610 530 5610 580 { lab=#net55}
-N 5610 480 5610 530 { lab=#net55}
-N 5630 530 5630 580 { lab=#net56}
-N 5630 480 5630 530 { lab=#net56}
-N 5650 530 5650 580 { lab=#net57}
-N 5650 480 5650 530 { lab=#net57}
-N 5680 530 5680 580 { lab=#net58}
-N 5680 480 5680 530 { lab=#net58}
-N 5700 530 5700 580 { lab=#net59}
-N 5700 480 5700 530 { lab=#net59}
-N 5720 530 5720 580 { lab=#net60}
-N 5720 480 5720 530 { lab=#net60}
-N 5740 530 5740 580 { lab=#net61}
-N 5740 480 5740 530 { lab=#net61}
-N 5760 530 5760 580 { lab=#net62}
-N 5760 480 5760 530 { lab=#net62}
-N 5780 530 5780 580 { lab=#net63}
-N 5780 480 5780 530 { lab=#net63}
-N 5830 530 5830 580 { lab=#net64}
-N 5830 480 5830 530 { lab=#net64}
+N 5240 530 5240 580 { lab=#net36}
+N 5240 480 5240 530 { lab=#net36}
+N 5220 530 5220 580 { lab=#net37}
+N 5220 480 5220 530 { lab=#net37}
+N 5200 530 5200 580 { lab=#net38}
+N 5200 480 5200 530 { lab=#net38}
+N 5310 530 5310 580 { lab=#net39}
+N 5310 480 5310 530 { lab=#net39}
+N 5290 530 5290 580 { lab=#net40}
+N 5290 480 5290 530 { lab=#net40}
+N 5270 530 5270 580 { lab=#net41}
+N 5270 480 5270 530 { lab=#net41}
+N 5330 530 5330 580 { lab=#net42}
+N 5330 480 5330 530 { lab=#net42}
+N 5400 530 5400 580 { lab=#net43}
+N 5400 480 5400 530 { lab=#net43}
+N 5380 530 5380 580 { lab=#net44}
+N 5380 480 5380 530 { lab=#net44}
+N 5360 530 5360 580 { lab=#net45}
+N 5360 480 5360 530 { lab=#net45}
+N 5430 530 5430 580 { lab=#net46}
+N 5430 480 5430 530 { lab=#net46}
+N 5460 530 5460 580 { lab=#net47}
+N 5460 480 5460 530 { lab=#net47}
+N 5480 530 5480 580 { lab=#net48}
+N 5480 480 5480 530 { lab=#net48}
+N 5500 530 5500 580 { lab=#net49}
+N 5500 480 5500 530 { lab=#net49}
+N 5520 530 5520 580 { lab=#net50}
+N 5520 480 5520 530 { lab=#net50}
+N 5550 530 5550 580 { lab=#net51}
+N 5550 480 5550 530 { lab=#net51}
+N 5570 530 5570 580 { lab=#net52}
+N 5570 480 5570 530 { lab=#net52}
+N 5590 530 5590 580 { lab=#net53}
+N 5590 480 5590 530 { lab=#net53}
+N 5610 530 5610 580 { lab=#net54}
+N 5610 480 5610 530 { lab=#net54}
+N 5630 530 5630 580 { lab=#net55}
+N 5630 480 5630 530 { lab=#net55}
+N 5650 530 5650 580 { lab=#net56}
+N 5650 480 5650 530 { lab=#net56}
+N 5680 530 5680 580 { lab=#net57}
+N 5680 480 5680 530 { lab=#net57}
+N 5700 530 5700 580 { lab=#net58}
+N 5700 480 5700 530 { lab=#net58}
+N 5720 530 5720 580 { lab=#net59}
+N 5720 480 5720 530 { lab=#net59}
+N 5740 530 5740 580 { lab=#net60}
+N 5740 480 5740 530 { lab=#net60}
+N 5760 530 5760 580 { lab=#net61}
+N 5760 480 5760 530 { lab=#net61}
+N 5780 530 5780 580 { lab=#net62}
+N 5780 480 5780 530 { lab=#net62}
+N 5830 530 5830 580 { lab=#net63}
+N 5830 480 5830 530 { lab=#net63}
N 5950 350 6000 350 { lab=io_analog[8]}
N 5900 350 5950 350 { lab=io_analog[8]}
N 5070 350 5140 350 { lab=io_analog[10]}
N 5200 150 5200 220 { lab=iref_cp1}
-N 5280 150 5280 220 { lab=io_in[14]}
+N 5280 150 5280 220 { lab=gpio_noesd[7]}
N 5030 350 5070 350 { lab=io_analog[10]}
N 3950 -310 3990 -310 { lab=iref_cp1}
N 5340 150 5340 220 { lab=gpio_noesd[8]}
+N 6880 160 6880 220 { lab=vdda1}
+N 6940 160 6940 220 { lab=vssa1}
+N 6460 530 6460 580 { lab=#net64}
+N 6460 480 6460 530 { lab=#net64}
+N 6440 530 6440 580 { lab=#net65}
+N 6440 480 6440 530 { lab=#net65}
+N 6420 530 6420 580 { lab=#net66}
+N 6420 480 6420 530 { lab=#net66}
+N 6530 530 6530 580 { lab=#net67}
+N 6530 480 6530 530 { lab=#net67}
+N 6510 530 6510 580 { lab=#net68}
+N 6510 480 6510 530 { lab=#net68}
+N 6490 530 6490 580 { lab=#net69}
+N 6490 480 6490 530 { lab=#net69}
+N 6550 530 6550 580 { lab=#net70}
+N 6550 480 6550 530 { lab=#net70}
+N 6620 530 6620 580 { lab=#net71}
+N 6620 480 6620 530 { lab=#net71}
+N 6600 530 6600 580 { lab=#net72}
+N 6600 480 6600 530 { lab=#net72}
+N 6580 530 6580 580 { lab=#net73}
+N 6580 480 6580 530 { lab=#net73}
+N 6650 530 6650 580 { lab=#net74}
+N 6650 480 6650 530 { lab=#net74}
+N 6680 530 6680 580 { lab=#net75}
+N 6680 480 6680 530 { lab=#net75}
+N 6700 530 6700 580 { lab=#net76}
+N 6700 480 6700 530 { lab=#net76}
+N 6720 530 6720 580 { lab=#net77}
+N 6720 480 6720 530 { lab=#net77}
+N 6740 530 6740 580 { lab=#net78}
+N 6740 480 6740 530 { lab=#net78}
+N 6770 530 6770 580 { lab=#net79}
+N 6770 480 6770 530 { lab=#net79}
+N 6790 530 6790 580 { lab=#net80}
+N 6790 480 6790 530 { lab=#net80}
+N 6810 530 6810 580 { lab=#net81}
+N 6810 480 6810 530 { lab=#net81}
+N 6830 530 6830 580 { lab=#net82}
+N 6830 480 6830 530 { lab=#net82}
+N 6850 530 6850 580 { lab=#net83}
+N 6850 480 6850 530 { lab=#net83}
+N 6870 530 6870 580 { lab=#net84}
+N 6870 480 6870 530 { lab=#net84}
+N 6900 530 6900 580 { lab=#net85}
+N 6900 480 6900 530 { lab=#net85}
+N 6920 530 6920 580 { lab=#net86}
+N 6920 480 6920 530 { lab=#net86}
+N 6940 530 6940 580 { lab=#net87}
+N 6940 480 6940 530 { lab=#net87}
+N 6960 530 6960 580 { lab=#net88}
+N 6960 480 6960 530 { lab=#net88}
+N 6980 530 6980 580 { lab=#net89}
+N 6980 480 6980 530 { lab=#net89}
+N 7000 530 7000 580 { lab=#net90}
+N 7000 480 7000 530 { lab=#net90}
+N 7050 530 7050 580 { lab=#net91}
+N 7050 480 7050 530 { lab=#net91}
+N 7170 350 7220 350 { lab=io_analog[7]}
+N 7120 350 7170 350 { lab=io_analog[7]}
+N 6290 350 6360 350 { lab=io_analog[10]}
+N 6420 150 6420 220 { lab=iref_cp0}
+N 6500 150 6500 220 { lab=gpio_noesd[7]}
+N 6250 350 6290 350 { lab=io_analog[10]}
+N 3950 -330 3990 -330 { lab=iref_cp0}
+N 4540 -360 4540 -300 { lab=vdda1}
+N 4540 -240 4540 -180 { lab=vssa1}
+N 4680 -360 4680 -300 { lab=vdda1}
+N 4680 -240 4680 -180 { lab=vssa1}
+N 4820 -360 4820 -300 { lab=vdda1}
+N 4820 -240 4820 -180 { lab=vssa1}
+N 5050 -360 5050 -300 { lab=vdda1}
+N 5050 -240 5050 -180 { lab=vssa1}
+N 5190 -360 5190 -300 { lab=vdda1}
+N 5190 -240 5190 -180 { lab=vssa1}
+N 5330 -360 5330 -300 { lab=vdda1}
+N 5330 -240 5330 -180 { lab=vssa1}
+N 5470 -360 5470 -300 { lab=vdda1}
+N 5470 -240 5470 -180 { lab=vssa1}
+N 5600 -360 5600 -300 { lab=vdda1}
+N 5600 -240 5600 -180 { lab=vssa1}
+N 5750 -360 5750 -300 { lab=vdda1}
+N 5750 -240 5750 -180 { lab=vssa1}
C {iopin.sym} 3240 -470 0 0 {name=p1 lab=vdda1}
C {iopin.sym} 3240 -440 0 0 {name=p2 lab=vdda2}
C {iopin.sym} 3240 -410 0 0 {name=p3 lab=vssa1}
@@ -220,7 +301,6 @@
C {lab_pin.sym} 3890 -430 1 0 {name=l42 sig_type=std_logic lab=vdda1}
C {lab_pin.sym} 3990 -290 2 0 {name=l43 sig_type=std_logic lab=iref_cp2}
C {lab_pin.sym} 3950 150 1 0 {name=l44 sig_type=std_logic lab=iref_cp2}
-C {noconn.sym} 4050 -330 2 0 {name=l46}
C {noconn.sym} 4050 -270 2 0 {name=l48}
C {noconn.sym} 4050 -250 2 0 {name=l49}
C {noconn.sym} 4050 -230 2 0 {name=l50}
@@ -269,3 +349,66 @@
C {lab_pin.sym} 3990 -310 2 0 {name=l81 sig_type=std_logic lab=iref_cp1}
C {top_pll_v2.sym} 5490 350 0 0 {name=x3}
C {lab_pin.sym} 5340 150 3 1 {name=l47 sig_type=std_logic lab=gpio_noesd[8]}
+C {top_pll_v1.sym} 6710 350 0 0 {name=x4}
+C {lab_pin.sym} 6880 160 1 0 {name=l82 sig_type=std_logic lab=vdda1}
+C {lab_pin.sym} 6940 160 1 0 {name=l83 sig_type=std_logic lab=vssa1}
+C {noconn.sym} 6460 580 3 0 {name=l84}
+C {noconn.sym} 6440 580 3 0 {name=l85}
+C {noconn.sym} 6420 580 3 0 {name=l86}
+C {noconn.sym} 6530 580 3 0 {name=l87}
+C {noconn.sym} 6510 580 3 0 {name=l88}
+C {noconn.sym} 6490 580 3 0 {name=l89}
+C {noconn.sym} 6550 580 3 0 {name=l90}
+C {noconn.sym} 6620 580 3 0 {name=l91}
+C {noconn.sym} 6600 580 3 0 {name=l92}
+C {noconn.sym} 6580 580 3 0 {name=l93}
+C {noconn.sym} 6650 580 3 0 {name=l94}
+C {noconn.sym} 6680 580 3 0 {name=l95}
+C {noconn.sym} 6700 580 3 0 {name=l96}
+C {noconn.sym} 6720 580 3 0 {name=l97}
+C {noconn.sym} 6740 580 3 0 {name=l98}
+C {noconn.sym} 6770 580 3 0 {name=l99}
+C {noconn.sym} 6790 580 3 0 {name=l100}
+C {noconn.sym} 6810 580 3 0 {name=l101}
+C {noconn.sym} 6830 580 3 0 {name=l102}
+C {noconn.sym} 6850 580 3 0 {name=l103}
+C {noconn.sym} 6870 580 3 0 {name=l104}
+C {noconn.sym} 6900 580 3 0 {name=l105}
+C {noconn.sym} 6920 580 3 0 {name=l106}
+C {noconn.sym} 6940 580 3 0 {name=l107}
+C {noconn.sym} 6960 580 3 0 {name=l108}
+C {noconn.sym} 6980 580 3 0 {name=l109}
+C {noconn.sym} 7000 580 3 0 {name=l110}
+C {noconn.sym} 7050 580 3 0 {name=l111}
+C {lab_pin.sym} 6420 150 1 0 {name=l112 sig_type=std_logic lab=iref_cp0}
+C {lab_pin.sym} 6250 350 0 0 {name=l113 sig_type=std_logic lab=io_analog[10]}
+C {lab_pin.sym} 7220 350 2 0 {name=l114 sig_type=std_logic lab=io_analog[7]}
+C {lab_pin.sym} 6500 150 3 1 {name=l115 sig_type=std_logic lab=gpio_noesd[7]}
+C {lab_pin.sym} 3990 -330 2 0 {name=l46 sig_type=std_logic lab=iref_cp0}
+C {sky130_fd_pr/cap_mim_m3_2.sym} 4540 -270 0 0 {name=C1 model=cap_mim_m3_2 W=30 L=30 MF=9 spiceprefix=X}
+C {lab_pin.sym} 4540 -360 1 0 {name=l116 sig_type=std_logic lab=vdda1}
+C {lab_pin.sym} 4540 -180 3 0 {name=l117 sig_type=std_logic lab=vssa1}
+C {sky130_fd_pr/cap_mim_m3_2.sym} 4680 -270 0 0 {name=C2 model=cap_mim_m3_2 W=30 L=30 MF=9 spiceprefix=X}
+C {lab_pin.sym} 4680 -360 1 0 {name=l118 sig_type=std_logic lab=vdda1}
+C {lab_pin.sym} 4680 -180 3 0 {name=l119 sig_type=std_logic lab=vssa1}
+C {sky130_fd_pr/cap_mim_m3_2.sym} 4820 -270 0 0 {name=C3 model=cap_mim_m3_2 W=30 L=30 MF=9 spiceprefix=X}
+C {lab_pin.sym} 4820 -360 1 0 {name=l120 sig_type=std_logic lab=vdda1}
+C {lab_pin.sym} 4820 -180 3 0 {name=l121 sig_type=std_logic lab=vssa1}
+C {sky130_fd_pr/cap_mim_m3_2.sym} 5050 -270 0 0 {name=C4 model=cap_mim_m3_2 W=30 L=30 MF=15 spiceprefix=X}
+C {lab_pin.sym} 5050 -360 1 0 {name=l122 sig_type=std_logic lab=vdda1}
+C {lab_pin.sym} 5050 -180 3 0 {name=l123 sig_type=std_logic lab=vssa1}
+C {sky130_fd_pr/cap_mim_m3_2.sym} 5190 -270 0 0 {name=C5 model=cap_mim_m3_2 W=30 L=30 MF=15 spiceprefix=X}
+C {lab_pin.sym} 5190 -360 1 0 {name=l124 sig_type=std_logic lab=vdda1}
+C {lab_pin.sym} 5190 -180 3 0 {name=l125 sig_type=std_logic lab=vssa1}
+C {sky130_fd_pr/cap_mim_m3_2.sym} 5330 -270 0 0 {name=C6 model=cap_mim_m3_2 W=30 L=30 MF=15 spiceprefix=X}
+C {lab_pin.sym} 5330 -360 1 0 {name=l126 sig_type=std_logic lab=vdda1}
+C {lab_pin.sym} 5330 -180 3 0 {name=l127 sig_type=std_logic lab=vssa1}
+C {sky130_fd_pr/cap_mim_m3_2.sym} 5470 -270 0 0 {name=C7 model=cap_mim_m3_2 W=30 L=30 MF=15 spiceprefix=X}
+C {lab_pin.sym} 5470 -360 1 0 {name=l128 sig_type=std_logic lab=vdda1}
+C {lab_pin.sym} 5470 -180 3 0 {name=l129 sig_type=std_logic lab=vssa1}
+C {sky130_fd_pr/cap_mim_m3_2.sym} 5600 -270 0 0 {name=C8 model=cap_mim_m3_2 W=30 L=30 MF=15 spiceprefix=X}
+C {lab_pin.sym} 5600 -360 1 0 {name=l130 sig_type=std_logic lab=vdda1}
+C {lab_pin.sym} 5600 -180 3 0 {name=l131 sig_type=std_logic lab=vssa1}
+C {sky130_fd_pr/cap_mim_m3_2.sym} 5750 -270 0 0 {name=C9 model=cap_mim_m3_2 W=30 L=30 MF=15 spiceprefix=X}
+C {lab_pin.sym} 5750 -360 1 0 {name=l132 sig_type=std_logic lab=vdda1}
+C {lab_pin.sym} 5750 -180 3 0 {name=l133 sig_type=std_logic lab=vssa1}
